radeon/vce: implement VCE two pipe support
[mesa.git] / src / gallium / drivers / radeon / radeon_vce.h
1 /**************************************************************************
2 *
3 * Copyright 2013 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #ifndef RADEON_VCE_H
35 #define RADEON_VCE_H
36
37 #include "util/list.h"
38
39 #define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value))
40 #define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd)
41 #define RVCE_READ(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off))
42 #define RVCE_WRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off))
43 #define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
44 #define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
45
46 #define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5)
47 #define RVCE_MAX_AUX_BUFFER_NUM 4
48
49 struct r600_common_screen;
50
51 /* driver dependent callback */
52 typedef void (*rvce_get_buffer)(struct pipe_resource *resource,
53 struct radeon_winsys_cs_handle **handle,
54 struct radeon_surf **surface);
55
56 /* Coded picture buffer slot */
57 struct rvce_cpb_slot {
58 struct list_head list;
59
60 unsigned index;
61 enum pipe_h264_enc_picture_type picture_type;
62 unsigned frame_num;
63 unsigned pic_order_cnt;
64 };
65
66 /* VCE encoder representation */
67 struct rvce_encoder {
68 struct pipe_video_codec base;
69
70 /* version specific packets */
71 void (*session)(struct rvce_encoder *enc);
72 void (*create)(struct rvce_encoder *enc);
73 void (*feedback)(struct rvce_encoder *enc);
74 void (*rate_control)(struct rvce_encoder *enc);
75 void (*config_extension)(struct rvce_encoder *enc);
76 void (*pic_control)(struct rvce_encoder *enc);
77 void (*motion_estimation)(struct rvce_encoder *enc);
78 void (*rdo)(struct rvce_encoder *enc);
79 void (*vui)(struct rvce_encoder *enc);
80 void (*encode)(struct rvce_encoder *enc);
81 void (*destroy)(struct rvce_encoder *enc);
82
83 unsigned stream_handle;
84
85 struct pipe_screen *screen;
86 struct radeon_winsys* ws;
87 struct radeon_winsys_cs* cs;
88
89 rvce_get_buffer get_buffer;
90
91 struct radeon_winsys_cs_handle* handle;
92 struct radeon_surf* luma;
93 struct radeon_surf* chroma;
94
95 struct radeon_winsys_cs_handle* bs_handle;
96 unsigned bs_size;
97
98 struct rvce_cpb_slot *cpb_array;
99 struct list_head cpb_slots;
100 unsigned cpb_num;
101
102 struct rvid_buffer *fb;
103 struct rvid_buffer cpb;
104 struct pipe_h264_enc_picture_desc pic;
105 bool use_vm;
106 bool use_vui;
107 bool use_2p;
108 };
109
110 /* CPB handling functions */
111 struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc);
112 struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc);
113 struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc);
114 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
115 unsigned *luma_offset, unsigned *chroma_offset);
116
117 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
118 const struct pipe_video_codec *templat,
119 struct radeon_winsys* ws,
120 rvce_get_buffer get_buffer);
121
122 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen);
123
124 void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf,
125 enum radeon_bo_usage usage, enum radeon_bo_domain domain,
126 uint32_t offset);
127
128 /* init vce fw 40.2.2 specific callbacks */
129 void radeon_vce_40_2_2_init(struct rvce_encoder *enc);
130
131 /* init vce fw 50 specific callbacks */
132 void radeon_vce_50_init(struct rvce_encoder *enc);
133
134 #endif