1 /**************************************************************************
3 * Copyright 2013 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * Christian König <christian.koenig@amd.com>
36 #include "pipe/p_video_codec.h"
38 #include "util/u_video.h"
39 #include "util/u_memory.h"
41 #include "vl/vl_video_buffer.h"
43 #include "radeon/drm/radeon_winsys.h"
44 #include "r600_pipe_common.h"
45 #include "radeon_video.h"
46 #include "radeon_vce.h"
48 static const unsigned profiles
[7] = { 66, 77, 88, 100, 110, 122, 244 };
50 static struct rvce_cpb_slot
*current_slot(struct rvce_encoder
*enc
)
52 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.prev
, list
);
55 static struct rvce_cpb_slot
*l0_slot(struct rvce_encoder
*enc
)
57 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
, list
);
60 static struct rvce_cpb_slot
*l1_slot(struct rvce_encoder
*enc
)
62 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
->next
, list
);
65 static void frame_offset(struct rvce_encoder
*enc
, struct rvce_cpb_slot
*slot
,
66 unsigned *luma_offset
, unsigned *chroma_offset
)
68 unsigned pitch
= align(enc
->luma
->level
[0].pitch_bytes
, 128);
69 unsigned vpitch
= align(enc
->luma
->npix_y
, 16);
70 unsigned fsize
= pitch
* (vpitch
+ vpitch
/ 2);
72 *luma_offset
= slot
->index
* fsize
;
73 *chroma_offset
= *luma_offset
+ pitch
* vpitch
;
76 static void session(struct rvce_encoder
*enc
)
78 RVCE_BEGIN(0x00000001); // session cmd
79 RVCE_CS(enc
->stream_handle
);
83 static void task_info(struct rvce_encoder
*enc
, uint32_t taskOperation
)
85 RVCE_BEGIN(0x00000002); // task info
86 RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
87 RVCE_CS(taskOperation
); // taskOperation
88 RVCE_CS(0x00000000); // referencePictureDependency
89 RVCE_CS(0x00000000); // collocateFlagDependency
90 RVCE_CS(0x00000000); // feedbackIndex
91 RVCE_CS(0x00000000); // videoBitstreamRingIndex
95 static void feedback(struct rvce_encoder
*enc
)
97 RVCE_BEGIN(0x05000005); // feedback buffer
98 RVCE_WRITE(enc
->fb
->res
->cs_buf
, enc
->fb
->res
->domains
); // feedbackRingAddressHi
99 RVCE_CS(0x00000000); // feedbackRingAddressLo
100 RVCE_CS(0x00000001); // feedbackRingSize
104 static void create(struct rvce_encoder
*enc
)
106 task_info(enc
, 0x00000000);
108 RVCE_BEGIN(0x01000001); // create cmd
109 RVCE_CS(0x00000000); // encUseCircularBuffer
110 RVCE_CS(profiles
[enc
->base
.profile
-
111 PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE
]); // encProfile
112 RVCE_CS(enc
->base
.level
); // encLevel
113 RVCE_CS(0x00000000); // encPicStructRestriction
114 RVCE_CS(enc
->base
.width
); // encImageWidth
115 RVCE_CS(enc
->base
.height
); // encImageHeight
116 RVCE_CS(enc
->luma
->level
[0].pitch_bytes
); // encRefPicLumaPitch
117 RVCE_CS(enc
->chroma
->level
[0].pitch_bytes
); // encRefPicChromaPitch
118 RVCE_CS(align(enc
->luma
->npix_y
, 16) / 8); // encRefYHeightInQw
119 RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
123 static void rate_control(struct rvce_encoder
*enc
)
125 RVCE_BEGIN(0x04000005); // rate control
126 RVCE_CS(enc
->pic
.rate_ctrl
.rate_ctrl_method
); // encRateControlMethod
127 RVCE_CS(enc
->pic
.rate_ctrl
.target_bitrate
); // encRateControlTargetBitRate
128 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bitrate
); // encRateControlPeakBitRate
129 RVCE_CS(enc
->pic
.rate_ctrl
.frame_rate_num
); // encRateControlFrameRateNum
130 RVCE_CS(0x00000000); // encGOPSize
131 RVCE_CS(enc
->pic
.quant_i_frames
); // encQP_I
132 RVCE_CS(enc
->pic
.quant_p_frames
); // encQP_P
133 RVCE_CS(enc
->pic
.quant_b_frames
); // encQP_B
134 RVCE_CS(enc
->pic
.rate_ctrl
.vbv_buffer_size
); // encVBVBufferSize
135 RVCE_CS(enc
->pic
.rate_ctrl
.frame_rate_den
); // encRateControlFrameRateDen
136 RVCE_CS(0x00000000); // encVBVBufferLevel
137 RVCE_CS(0x00000000); // encMaxAUSize
138 RVCE_CS(0x00000000); // encQPInitialMode
139 RVCE_CS(enc
->pic
.rate_ctrl
.target_bits_picture
); // encTargetBitsPerPicture
140 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bits_picture_integer
); // encPeakBitsPerPictureInteger
141 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bits_picture_fraction
); // encPeakBitsPerPictureFractional
142 RVCE_CS(0x00000000); // encMinQP
143 RVCE_CS(0x00000033); // encMaxQP
144 RVCE_CS(0x00000000); // encSkipFrameEnable
145 RVCE_CS(0x00000000); // encFillerDataEnable
146 RVCE_CS(0x00000000); // encEnforceHRD
147 RVCE_CS(0x00000000); // encBPicsDeltaQP
148 RVCE_CS(0x00000000); // encReferenceBPicsDeltaQP
149 RVCE_CS(0x00000000); // encRateControlReInitDisable
153 static void config_extension(struct rvce_encoder
*enc
)
155 RVCE_BEGIN(0x04000001); // config extension
156 RVCE_CS(0x00000003); // encEnablePerfLogging
160 static void pic_control(struct rvce_encoder
*enc
)
162 unsigned encNumMBsPerSlice
;
164 encNumMBsPerSlice
= align(enc
->base
.width
, 16) / 16;
165 encNumMBsPerSlice
*= align(enc
->base
.height
, 16) / 16;
167 RVCE_BEGIN(0x04000002); // pic control
168 RVCE_CS(0x00000000); // encUseConstrainedIntraPred
169 RVCE_CS(0x00000000); // encCABACEnable
170 RVCE_CS(0x00000000); // encCABACIDC
171 RVCE_CS(0x00000000); // encLoopFilterDisable
172 RVCE_CS(0x00000000); // encLFBetaOffset
173 RVCE_CS(0x00000000); // encLFAlphaC0Offset
174 RVCE_CS(0x00000000); // encCropLeftOffset
175 RVCE_CS((align(enc
->base
.width
, 16) - enc
->base
.width
) >> 1); // encCropRightOffset
176 RVCE_CS(0x00000000); // encCropTopOffset
177 RVCE_CS((align(enc
->base
.height
, 16) - enc
->base
.height
) >> 1); // encCropBottomOffset
178 RVCE_CS(encNumMBsPerSlice
); // encNumMBsPerSlice
179 RVCE_CS(0x00000000); // encIntraRefreshNumMBsPerSlot
180 RVCE_CS(0x00000000); // encForceIntraRefresh
181 RVCE_CS(0x00000000); // encForceIMBPeriod
182 RVCE_CS(0x00000000); // encPicOrderCntType
183 RVCE_CS(0x00000000); // log2_max_pic_order_cnt_lsb_minus4
184 RVCE_CS(0x00000000); // encSPSID
185 RVCE_CS(0x00000000); // encPPSID
186 RVCE_CS(0x00000040); // encConstraintSetFlags
187 RVCE_CS(MAX2(enc
->base
.max_references
, 1) - 1); // encBPicPattern
188 RVCE_CS(0x00000000); // weightPredModeBPicture
189 RVCE_CS(MIN2(enc
->base
.max_references
, 2)); // encNumberOfReferenceFrames
190 RVCE_CS(enc
->base
.max_references
+ 1); // encMaxNumRefFrames
191 RVCE_CS(0x00000001); // encNumDefaultActiveRefL0
192 RVCE_CS(0x00000001); // encNumDefaultActiveRefL1
193 RVCE_CS(0x00000000); // encSliceMode
194 RVCE_CS(0x00000000); // encMaxSliceSize
198 static void motion_estimation(struct rvce_encoder
*enc
)
200 RVCE_BEGIN(0x04000007); // motion estimation
201 RVCE_CS(0x00000001); // encIMEDecimationSearch
202 RVCE_CS(0x00000001); // motionEstHalfPixel
203 RVCE_CS(0x00000000); // motionEstQuarterPixel
204 RVCE_CS(0x00000000); // disableFavorPMVPoint
205 RVCE_CS(0x00000000); // forceZeroPointCenter
206 RVCE_CS(0x00000000); // LSMVert
207 RVCE_CS(0x00000010); // encSearchRangeX
208 RVCE_CS(0x00000010); // encSearchRangeY
209 RVCE_CS(0x00000010); // encSearch1RangeX
210 RVCE_CS(0x00000010); // encSearch1RangeY
211 RVCE_CS(0x00000000); // disable16x16Frame1
212 RVCE_CS(0x00000000); // disableSATD
213 RVCE_CS(0x00000000); // enableAMD
214 RVCE_CS(0x000000fe); // encDisableSubMode
215 RVCE_CS(0x00000000); // encIMESkipX
216 RVCE_CS(0x00000000); // encIMESkipY
217 RVCE_CS(0x00000000); // encEnImeOverwDisSubm
218 RVCE_CS(0x00000000); // encImeOverwDisSubmNo
219 RVCE_CS(0x00000001); // encIME2SearchRangeX
220 RVCE_CS(0x00000001); // encIME2SearchRangeY
221 RVCE_CS(0x00000000); // parallelModeSpeedupEnable
222 RVCE_CS(0x00000000); // fme0_encDisableSubMode
223 RVCE_CS(0x00000000); // fme1_encDisableSubMode
224 RVCE_CS(0x00000000); // imeSWSpeedupEnable
228 static void rdo(struct rvce_encoder
*enc
)
230 RVCE_BEGIN(0x04000008); // rdo
231 RVCE_CS(0x00000000); // encDisableTbePredIFrame
232 RVCE_CS(0x00000000); // encDisableTbePredPFrame
233 RVCE_CS(0x00000000); // useFmeInterpolY
234 RVCE_CS(0x00000000); // useFmeInterpolUV
235 RVCE_CS(0x00000000); // useFmeIntrapolY
236 RVCE_CS(0x00000000); // useFmeIntrapolUV
237 RVCE_CS(0x00000000); // useFmeInterpolY_1
238 RVCE_CS(0x00000000); // useFmeInterpolUV_1
239 RVCE_CS(0x00000000); // useFmeIntrapolY_1
240 RVCE_CS(0x00000000); // useFmeIntrapolUV_1
241 RVCE_CS(0x00000000); // enc16x16CostAdj
242 RVCE_CS(0x00000000); // encSkipCostAdj
243 RVCE_CS(0x00000000); // encForce16x16skip
244 RVCE_CS(0x00000000); // encDisableThresholdCalcA
245 RVCE_CS(0x00000000); // encLumaCoeffCost
246 RVCE_CS(0x00000000); // encLumaMBCoeffCost
247 RVCE_CS(0x00000000); // encChromaCoeffCost
251 static void encode(struct rvce_encoder
*enc
)
254 unsigned luma_offset
, chroma_offset
;
256 task_info(enc
, 0x00000003);
258 RVCE_BEGIN(0x05000001); // context buffer
259 RVCE_READWRITE(enc
->cpb
.res
->cs_buf
, enc
->cpb
.res
->domains
); // encodeContextAddressHi
260 RVCE_CS(0x00000000); // encodeContextAddressLo
263 RVCE_BEGIN(0x05000004); // video bitstream buffer
264 RVCE_WRITE(enc
->bs_handle
, RADEON_DOMAIN_GTT
); // videoBitstreamRingAddressHi
265 RVCE_CS(0x00000000); // videoBitstreamRingAddressLo
266 RVCE_CS(enc
->bs_size
); // videoBitstreamRingSize
269 RVCE_BEGIN(0x03000001); // encode
270 RVCE_CS(0x00000000); // insertHeaders
271 RVCE_CS(0x00000000); // pictureStructure
272 RVCE_CS(enc
->bs_size
); // allowedMaxBitstreamSize
273 RVCE_CS(0x00000000); // forceRefreshMap
274 RVCE_CS(0x00000000); // insertAUD
275 RVCE_CS(0x00000000); // endOfSequence
276 RVCE_CS(0x00000000); // endOfStream
277 RVCE_READ(enc
->handle
, RADEON_DOMAIN_VRAM
); // inputPictureLumaAddressHi
278 RVCE_CS(enc
->luma
->level
[0].offset
); // inputPictureLumaAddressLo
279 RVCE_READ(enc
->handle
, RADEON_DOMAIN_VRAM
); // inputPictureChromaAddressHi
280 RVCE_CS(enc
->chroma
->level
[0].offset
); // inputPictureChromaAddressLo
281 RVCE_CS(align(enc
->luma
->npix_y
, 16)); // encInputFrameYPitch
282 RVCE_CS(enc
->luma
->level
[0].pitch_bytes
); // encInputPicLumaPitch
283 RVCE_CS(enc
->chroma
->level
[0].pitch_bytes
); // encInputPicChromaPitch
284 RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode
285 RVCE_CS(0x00000000); // encInputPicTileConfig
286 RVCE_CS(enc
->pic
.picture_type
); // encPicType
287 RVCE_CS(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_IDR
); // encIdrFlag
288 RVCE_CS(0x00000000); // encIdrPicId
289 RVCE_CS(0x00000000); // encMGSKeyPic
290 RVCE_CS(!enc
->pic
.not_referenced
); // encReferenceFlag
291 RVCE_CS(0x00000000); // encTemporalLayerIndex
292 RVCE_CS(0x00000000); // num_ref_idx_active_override_flag
293 RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1
294 RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
296 i
= enc
->pic
.frame_num
- enc
->pic
.ref_idx_l0
;
297 if (i
> 1 && enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
) {
298 RVCE_CS(0x00000001); // encRefListModificationOp
299 RVCE_CS(i
- 1); // encRefListModificationNum
301 RVCE_CS(0x00000000); // encRefListModificationOp
302 RVCE_CS(0x00000000); // encRefListModificationNum
305 for (i
= 0; i
< 3; ++i
) {
306 RVCE_CS(0x00000000); // encRefListModificationOp
307 RVCE_CS(0x00000000); // encRefListModificationNum
309 for (i
= 0; i
< 4; ++i
) {
310 RVCE_CS(0x00000000); // encDecodedPictureMarkingOp
311 RVCE_CS(0x00000000); // encDecodedPictureMarkingNum
312 RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx
313 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp
314 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum
317 // encReferencePictureL0[0]
318 RVCE_CS(0x00000000); // pictureStructure
319 if(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
||
320 enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
) {
321 struct rvce_cpb_slot
*l0
= l0_slot(enc
);
322 frame_offset(enc
, l0
, &luma_offset
, &chroma_offset
);
323 RVCE_CS(l0
->picture_type
); // encPicType
324 RVCE_CS(l0
->frame_num
); // frameNumber
325 RVCE_CS(l0
->pic_order_cnt
); // pictureOrderCount
326 RVCE_CS(luma_offset
); // lumaOffset
327 RVCE_CS(chroma_offset
); // chromaOffset
329 RVCE_CS(0x00000000); // encPicType
330 RVCE_CS(0x00000000); // frameNumber
331 RVCE_CS(0x00000000); // pictureOrderCount
332 RVCE_CS(0xffffffff); // lumaOffset
333 RVCE_CS(0xffffffff); // chromaOffset
336 // encReferencePictureL0[1]
337 RVCE_CS(0x00000000); // pictureStructure
338 RVCE_CS(0x00000000); // encPicType
339 RVCE_CS(0x00000000); // frameNumber
340 RVCE_CS(0x00000000); // pictureOrderCount
341 RVCE_CS(0xffffffff); // lumaOffset
342 RVCE_CS(0xffffffff); // chromaOffset
344 // encReferencePictureL1[0]
345 RVCE_CS(0x00000000); // pictureStructure
346 if(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
) {
347 struct rvce_cpb_slot
*l1
= l1_slot(enc
);
348 frame_offset(enc
, l1
, &luma_offset
, &chroma_offset
);
349 RVCE_CS(l1
->picture_type
); // encPicType
350 RVCE_CS(l1
->frame_num
); // frameNumber
351 RVCE_CS(l1
->pic_order_cnt
); // pictureOrderCount
352 RVCE_CS(luma_offset
); // lumaOffset
353 RVCE_CS(chroma_offset
); // chromaOffset
355 RVCE_CS(0x00000000); // encPicType
356 RVCE_CS(0x00000000); // frameNumber
357 RVCE_CS(0x00000000); // pictureOrderCount
358 RVCE_CS(0xffffffff); // lumaOffset
359 RVCE_CS(0xffffffff); // chromaOffset
362 frame_offset(enc
, current_slot(enc
), &luma_offset
, &chroma_offset
);
363 RVCE_CS(luma_offset
); // encReconstructedLumaOffset
364 RVCE_CS(chroma_offset
); // encReconstructedChromaOffset
365 RVCE_CS(0x00000000); // encColocBufferOffset
366 RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
367 RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset
368 RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset
369 RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset
370 RVCE_CS(0x00000000); // pictureCount
371 RVCE_CS(enc
->pic
.frame_num
); // frameNumber
372 RVCE_CS(enc
->pic
.pic_order_cnt
); // pictureOrderCount
373 RVCE_CS(0x00000000); // numIPicRemainInRCGOP
374 RVCE_CS(0x00000000); // numPPicRemainInRCGOP
375 RVCE_CS(0x00000000); // numBPicRemainInRCGOP
376 RVCE_CS(0x00000000); // numIRPicRemainInRCGOP
377 RVCE_CS(0x00000000); // enableIntraRefresh
381 static void destroy(struct rvce_encoder
*enc
)
383 task_info(enc
, 0x00000001);
385 RVCE_BEGIN(0x02000001); // destroy
389 void radeon_vce_40_2_2_init(struct rvce_encoder
*enc
)
391 enc
->session
= session
;
392 enc
->create
= create
;
393 enc
->feedback
= feedback
;
394 enc
->rate_control
= rate_control
;
395 enc
->config_extension
= config_extension
;
396 enc
->pic_control
= pic_control
;
397 enc
->motion_estimation
= motion_estimation
;
399 enc
->encode
= encode
;
400 enc
->destroy
= destroy
;