1 /**************************************************************************
3 * Copyright 2013 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * Christian König <christian.koenig@amd.com>
36 #include "pipe/p_video_codec.h"
38 #include "util/u_video.h"
39 #include "util/u_memory.h"
41 #include "vl/vl_video_buffer.h"
43 #include "../../winsys/radeon/drm/radeon_winsys.h"
44 #include "radeon_video.h"
45 #include "radeon_vce.h"
47 static const unsigned profiles
[7] = { 66, 77, 88, 100, 110, 122, 244 };
49 static struct rvce_cpb_slot
*current_slot(struct rvce_encoder
*enc
)
51 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.prev
, list
);
54 static struct rvce_cpb_slot
*l0_slot(struct rvce_encoder
*enc
)
56 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
, list
);
59 static struct rvce_cpb_slot
*l1_slot(struct rvce_encoder
*enc
)
61 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
->next
, list
);
64 static void frame_offset(struct rvce_encoder
*enc
, struct rvce_cpb_slot
*slot
,
65 unsigned *luma_offset
, unsigned *chroma_offset
)
67 unsigned pitch
= align(enc
->luma
->level
[0].pitch_bytes
, 128);
68 unsigned vpitch
= align(enc
->luma
->npix_y
, 16);
69 unsigned fsize
= pitch
* (vpitch
+ vpitch
/ 2);
71 *luma_offset
= slot
->index
* fsize
;
72 *chroma_offset
= *luma_offset
+ pitch
* vpitch
;
75 static void session(struct rvce_encoder
*enc
)
77 RVCE_BEGIN(0x00000001); // session cmd
78 RVCE_CS(enc
->stream_handle
);
82 static void task_info(struct rvce_encoder
*enc
, uint32_t taskOperation
)
84 RVCE_BEGIN(0x00000002); // task info
85 RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
86 RVCE_CS(taskOperation
); // taskOperation
87 RVCE_CS(0x00000000); // referencePictureDependency
88 RVCE_CS(0x00000000); // collocateFlagDependency
89 RVCE_CS(0x00000000); // feedbackIndex
90 RVCE_CS(0x00000000); // videoBitstreamRingIndex
94 static void feedback(struct rvce_encoder
*enc
)
96 RVCE_BEGIN(0x05000005); // feedback buffer
97 RVCE_WRITE(enc
->fb
->cs_handle
, enc
->fb
->domain
); // feedbackRingAddressHi
98 RVCE_CS(0x00000000); // feedbackRingAddressLo
99 RVCE_CS(0x00000001); // feedbackRingSize
103 static void create(struct rvce_encoder
*enc
)
105 task_info(enc
, 0x00000000);
107 RVCE_BEGIN(0x01000001); // create cmd
108 RVCE_CS(0x00000000); // encUseCircularBuffer
109 RVCE_CS(profiles
[enc
->base
.profile
-
110 PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE
]); // encProfile
111 RVCE_CS(enc
->base
.level
); // encLevel
112 RVCE_CS(0x00000000); // encPicStructRestriction
113 RVCE_CS(enc
->base
.width
); // encImageWidth
114 RVCE_CS(enc
->base
.height
); // encImageHeight
115 RVCE_CS(enc
->luma
->level
[0].pitch_bytes
); // encRefPicLumaPitch
116 RVCE_CS(enc
->chroma
->level
[0].pitch_bytes
); // encRefPicChromaPitch
117 RVCE_CS(align(enc
->luma
->npix_y
, 16) / 8); // encRefYHeightInQw
118 RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
122 static void rate_control(struct rvce_encoder
*enc
)
124 RVCE_BEGIN(0x04000005); // rate control
125 RVCE_CS(enc
->pic
.rate_ctrl
.rate_ctrl_method
); // encRateControlMethod
126 RVCE_CS(enc
->pic
.rate_ctrl
.target_bitrate
); // encRateControlTargetBitRate
127 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bitrate
); // encRateControlPeakBitRate
128 RVCE_CS(enc
->pic
.rate_ctrl
.frame_rate_num
); // encRateControlFrameRateNum
129 RVCE_CS(0x00000000); // encGOPSize
130 RVCE_CS(enc
->pic
.quant_i_frames
); // encQP_I
131 RVCE_CS(enc
->pic
.quant_p_frames
); // encQP_P
132 RVCE_CS(enc
->pic
.quant_b_frames
); // encQP_B
133 RVCE_CS(enc
->pic
.rate_ctrl
.vbv_buffer_size
); // encVBVBufferSize
134 RVCE_CS(enc
->pic
.rate_ctrl
.frame_rate_den
); // encRateControlFrameRateDen
135 RVCE_CS(0x00000000); // encVBVBufferLevel
136 RVCE_CS(0x00000000); // encMaxAUSize
137 RVCE_CS(0x00000000); // encQPInitialMode
138 RVCE_CS(enc
->pic
.rate_ctrl
.target_bits_picture
); // encTargetBitsPerPicture
139 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bits_picture_integer
); // encPeakBitsPerPictureInteger
140 RVCE_CS(enc
->pic
.rate_ctrl
.peak_bits_picture_fraction
); // encPeakBitsPerPictureFractional
141 RVCE_CS(0x00000000); // encMinQP
142 RVCE_CS(0x00000033); // encMaxQP
143 RVCE_CS(0x00000000); // encSkipFrameEnable
144 RVCE_CS(0x00000000); // encFillerDataEnable
145 RVCE_CS(0x00000000); // encEnforceHRD
146 RVCE_CS(0x00000000); // encBPicsDeltaQP
147 RVCE_CS(0x00000000); // encReferenceBPicsDeltaQP
148 RVCE_CS(0x00000000); // encRateControlReInitDisable
152 static void config_extension(struct rvce_encoder
*enc
)
154 RVCE_BEGIN(0x04000001); // config extension
155 RVCE_CS(0x00000003); // encEnablePerfLogging
159 static void pic_control(struct rvce_encoder
*enc
)
161 unsigned encNumMBsPerSlice
;
163 encNumMBsPerSlice
= align(enc
->base
.width
, 16) / 16;
164 encNumMBsPerSlice
*= align(enc
->base
.height
, 16) / 16;
166 RVCE_BEGIN(0x04000002); // pic control
167 RVCE_CS(0x00000000); // encUseConstrainedIntraPred
168 RVCE_CS(0x00000000); // encCABACEnable
169 RVCE_CS(0x00000000); // encCABACIDC
170 RVCE_CS(0x00000000); // encLoopFilterDisable
171 RVCE_CS(0x00000000); // encLFBetaOffset
172 RVCE_CS(0x00000000); // encLFAlphaC0Offset
173 RVCE_CS(0x00000000); // encCropLeftOffset
174 RVCE_CS((align(enc
->base
.width
, 16) - enc
->base
.width
) >> 1); // encCropRightOffset
175 RVCE_CS(0x00000000); // encCropTopOffset
176 RVCE_CS((align(enc
->base
.height
, 16) - enc
->base
.height
) >> 1); // encCropBottomOffset
177 RVCE_CS(encNumMBsPerSlice
); // encNumMBsPerSlice
178 RVCE_CS(0x00000000); // encIntraRefreshNumMBsPerSlot
179 RVCE_CS(0x00000000); // encForceIntraRefresh
180 RVCE_CS(0x00000000); // encForceIMBPeriod
181 RVCE_CS(0x00000000); // encPicOrderCntType
182 RVCE_CS(0x00000000); // log2_max_pic_order_cnt_lsb_minus4
183 RVCE_CS(0x00000000); // encSPSID
184 RVCE_CS(0x00000000); // encPPSID
185 RVCE_CS(0x00000040); // encConstraintSetFlags
186 RVCE_CS(MAX2(enc
->base
.max_references
, 1) - 1); // encBPicPattern
187 RVCE_CS(0x00000000); // weightPredModeBPicture
188 RVCE_CS(MIN2(enc
->base
.max_references
, 2)); // encNumberOfReferenceFrames
189 RVCE_CS(enc
->base
.max_references
+ 1); // encMaxNumRefFrames
190 RVCE_CS(0x00000001); // encNumDefaultActiveRefL0
191 RVCE_CS(0x00000001); // encNumDefaultActiveRefL1
192 RVCE_CS(0x00000000); // encSliceMode
193 RVCE_CS(0x00000000); // encMaxSliceSize
197 static void motion_estimation(struct rvce_encoder
*enc
)
199 RVCE_BEGIN(0x04000007); // motion estimation
200 RVCE_CS(0x00000001); // encIMEDecimationSearch
201 RVCE_CS(0x00000001); // motionEstHalfPixel
202 RVCE_CS(0x00000000); // motionEstQuarterPixel
203 RVCE_CS(0x00000000); // disableFavorPMVPoint
204 RVCE_CS(0x00000000); // forceZeroPointCenter
205 RVCE_CS(0x00000000); // LSMVert
206 RVCE_CS(0x00000010); // encSearchRangeX
207 RVCE_CS(0x00000010); // encSearchRangeY
208 RVCE_CS(0x00000010); // encSearch1RangeX
209 RVCE_CS(0x00000010); // encSearch1RangeY
210 RVCE_CS(0x00000000); // disable16x16Frame1
211 RVCE_CS(0x00000000); // disableSATD
212 RVCE_CS(0x00000000); // enableAMD
213 RVCE_CS(0x000000fe); // encDisableSubMode
214 RVCE_CS(0x00000000); // encIMESkipX
215 RVCE_CS(0x00000000); // encIMESkipY
216 RVCE_CS(0x00000000); // encEnImeOverwDisSubm
217 RVCE_CS(0x00000000); // encImeOverwDisSubmNo
218 RVCE_CS(0x00000001); // encIME2SearchRangeX
219 RVCE_CS(0x00000001); // encIME2SearchRangeY
220 RVCE_CS(0x00000000); // parallelModeSpeedupEnable
221 RVCE_CS(0x00000000); // fme0_encDisableSubMode
222 RVCE_CS(0x00000000); // fme1_encDisableSubMode
223 RVCE_CS(0x00000000); // imeSWSpeedupEnable
227 static void rdo(struct rvce_encoder
*enc
)
229 RVCE_BEGIN(0x04000008); // rdo
230 RVCE_CS(0x00000000); // encDisableTbePredIFrame
231 RVCE_CS(0x00000000); // encDisableTbePredPFrame
232 RVCE_CS(0x00000000); // useFmeInterpolY
233 RVCE_CS(0x00000000); // useFmeInterpolUV
234 RVCE_CS(0x00000000); // useFmeIntrapolY
235 RVCE_CS(0x00000000); // useFmeIntrapolUV
236 RVCE_CS(0x00000000); // useFmeInterpolY_1
237 RVCE_CS(0x00000000); // useFmeInterpolUV_1
238 RVCE_CS(0x00000000); // useFmeIntrapolY_1
239 RVCE_CS(0x00000000); // useFmeIntrapolUV_1
240 RVCE_CS(0x00000000); // enc16x16CostAdj
241 RVCE_CS(0x00000000); // encSkipCostAdj
242 RVCE_CS(0x00000000); // encForce16x16skip
243 RVCE_CS(0x00000000); // encDisableThresholdCalcA
244 RVCE_CS(0x00000000); // encLumaCoeffCost
245 RVCE_CS(0x00000000); // encLumaMBCoeffCost
246 RVCE_CS(0x00000000); // encChromaCoeffCost
250 static void encode(struct rvce_encoder
*enc
)
253 unsigned luma_offset
, chroma_offset
;
255 task_info(enc
, 0x00000003);
257 RVCE_BEGIN(0x05000001); // context buffer
258 RVCE_READWRITE(enc
->cpb
.cs_handle
, enc
->cpb
.domain
); // encodeContextAddressHi
259 RVCE_CS(0x00000000); // encodeContextAddressLo
262 RVCE_BEGIN(0x05000004); // video bitstream buffer
263 RVCE_WRITE(enc
->bs_handle
, RADEON_DOMAIN_GTT
); // videoBitstreamRingAddressHi
264 RVCE_CS(0x00000000); // videoBitstreamRingAddressLo
265 RVCE_CS(enc
->bs_size
); // videoBitstreamRingSize
268 RVCE_BEGIN(0x03000001); // encode
269 RVCE_CS(0x00000000); // insertHeaders
270 RVCE_CS(0x00000000); // pictureStructure
271 RVCE_CS(enc
->bs_size
); // allowedMaxBitstreamSize
272 RVCE_CS(0x00000000); // forceRefreshMap
273 RVCE_CS(0x00000000); // insertAUD
274 RVCE_CS(0x00000000); // endOfSequence
275 RVCE_CS(0x00000000); // endOfStream
276 RVCE_READ(enc
->handle
, RADEON_DOMAIN_VRAM
); // inputPictureLumaAddressHi
277 RVCE_CS(enc
->luma
->level
[0].offset
); // inputPictureLumaAddressLo
278 RVCE_READ(enc
->handle
, RADEON_DOMAIN_VRAM
); // inputPictureChromaAddressHi
279 RVCE_CS(enc
->chroma
->level
[0].offset
); // inputPictureChromaAddressLo
280 RVCE_CS(align(enc
->luma
->npix_y
, 16)); // encInputFrameYPitch
281 RVCE_CS(enc
->luma
->level
[0].pitch_bytes
); // encInputPicLumaPitch
282 RVCE_CS(enc
->chroma
->level
[0].pitch_bytes
); // encInputPicChromaPitch
283 RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode
284 RVCE_CS(0x00000000); // encInputPicTileConfig
285 RVCE_CS(enc
->pic
.picture_type
); // encPicType
286 RVCE_CS(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_IDR
); // encIdrFlag
287 RVCE_CS(0x00000000); // encIdrPicId
288 RVCE_CS(0x00000000); // encMGSKeyPic
289 RVCE_CS(!enc
->pic
.not_referenced
); // encReferenceFlag
290 RVCE_CS(0x00000000); // encTemporalLayerIndex
291 RVCE_CS(0x00000000); // num_ref_idx_active_override_flag
292 RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1
293 RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
295 i
= enc
->pic
.frame_num
- enc
->pic
.ref_idx_l0
;
296 if (i
> 1 && enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
) {
297 RVCE_CS(0x00000001); // encRefListModificationOp
298 RVCE_CS(i
- 1); // encRefListModificationNum
300 RVCE_CS(0x00000000); // encRefListModificationOp
301 RVCE_CS(0x00000000); // encRefListModificationNum
304 for (i
= 0; i
< 3; ++i
) {
305 RVCE_CS(0x00000000); // encRefListModificationOp
306 RVCE_CS(0x00000000); // encRefListModificationNum
308 for (i
= 0; i
< 4; ++i
) {
309 RVCE_CS(0x00000000); // encDecodedPictureMarkingOp
310 RVCE_CS(0x00000000); // encDecodedPictureMarkingNum
311 RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx
312 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp
313 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum
316 // encReferencePictureL0[0]
317 RVCE_CS(0x00000000); // pictureStructure
318 if(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
||
319 enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
) {
320 struct rvce_cpb_slot
*l0
= l0_slot(enc
);
321 frame_offset(enc
, l0
, &luma_offset
, &chroma_offset
);
322 RVCE_CS(l0
->picture_type
); // encPicType
323 RVCE_CS(l0
->frame_num
); // frameNumber
324 RVCE_CS(l0
->pic_order_cnt
); // pictureOrderCount
325 RVCE_CS(luma_offset
); // lumaOffset
326 RVCE_CS(chroma_offset
); // chromaOffset
328 RVCE_CS(0x00000000); // encPicType
329 RVCE_CS(0x00000000); // frameNumber
330 RVCE_CS(0x00000000); // pictureOrderCount
331 RVCE_CS(0xffffffff); // lumaOffset
332 RVCE_CS(0xffffffff); // chromaOffset
335 // encReferencePictureL0[1]
336 RVCE_CS(0x00000000); // pictureStructure
337 RVCE_CS(0x00000000); // encPicType
338 RVCE_CS(0x00000000); // frameNumber
339 RVCE_CS(0x00000000); // pictureOrderCount
340 RVCE_CS(0xffffffff); // lumaOffset
341 RVCE_CS(0xffffffff); // chromaOffset
343 // encReferencePictureL1[0]
344 RVCE_CS(0x00000000); // pictureStructure
345 if(enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
) {
346 struct rvce_cpb_slot
*l1
= l1_slot(enc
);
347 frame_offset(enc
, l1
, &luma_offset
, &chroma_offset
);
348 RVCE_CS(l1
->picture_type
); // encPicType
349 RVCE_CS(l1
->frame_num
); // frameNumber
350 RVCE_CS(l1
->pic_order_cnt
); // pictureOrderCount
351 RVCE_CS(luma_offset
); // lumaOffset
352 RVCE_CS(chroma_offset
); // chromaOffset
354 RVCE_CS(0x00000000); // encPicType
355 RVCE_CS(0x00000000); // frameNumber
356 RVCE_CS(0x00000000); // pictureOrderCount
357 RVCE_CS(0xffffffff); // lumaOffset
358 RVCE_CS(0xffffffff); // chromaOffset
361 frame_offset(enc
, current_slot(enc
), &luma_offset
, &chroma_offset
);
362 RVCE_CS(luma_offset
); // encReconstructedLumaOffset
363 RVCE_CS(chroma_offset
); // encReconstructedChromaOffset
364 RVCE_CS(0x00000000); // encColocBufferOffset
365 RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
366 RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset
367 RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset
368 RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset
369 RVCE_CS(0x00000000); // pictureCount
370 RVCE_CS(enc
->pic
.frame_num
); // frameNumber
371 RVCE_CS(enc
->pic
.pic_order_cnt
); // pictureOrderCount
372 RVCE_CS(0x00000000); // numIPicRemainInRCGOP
373 RVCE_CS(0x00000000); // numPPicRemainInRCGOP
374 RVCE_CS(0x00000000); // numBPicRemainInRCGOP
375 RVCE_CS(0x00000000); // numIRPicRemainInRCGOP
376 RVCE_CS(0x00000000); // enableIntraRefresh
380 static void destroy(struct rvce_encoder
*enc
)
382 task_info(enc
, 0x00000001);
384 RVCE_BEGIN(0x02000001); // destroy
388 void radeon_vce_40_2_2_init(struct rvce_encoder
*enc
)
390 enc
->session
= session
;
391 enc
->create
= create
;
392 enc
->feedback
= feedback
;
393 enc
->rate_control
= rate_control
;
394 enc
->config_extension
= config_extension
;
395 enc
->pic_control
= pic_control
;
396 enc
->motion_estimation
= motion_estimation
;
398 enc
->encode
= encode
;
399 enc
->destroy
= destroy
;