src/gallium/drivers/radeon/radeon_vce_40_2_2.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <stdio.h>
  35
  36 #include "pipe/p_video_codec.h"
  37
  38 #include "util/u_video.h"
  39 #include "util/u_memory.h"
  40
  41 #include "vl/vl_video_buffer.h"
  42
  43 #include "../../winsys/radeon/drm/radeon_winsys.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 static struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
  48 {
  49         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
  50 }
  51
  52 static struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
  53 {
  54         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
  55 }
  56
  57 static void frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
  58                          unsigned *luma_offset, unsigned *chroma_offset)
  59 {
  60         unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
  61         unsigned vpitch = align(enc->luma->npix_y, 16);
  62         unsigned fsize = pitch * (vpitch + vpitch / 2);
  63
  64         *luma_offset = slot->index * fsize;
  65         *chroma_offset = *luma_offset + pitch * vpitch;
  66 }
  67
  68 static void session(struct rvce_encoder *enc)
  69 {
  70         RVCE_BEGIN(0x00000001); // session cmd
  71         RVCE_CS(enc->stream_handle);
  72         RVCE_END();
  73 }
  74
  75 static void task_info(struct rvce_encoder *enc, uint32_t taskOperation)
  76 {
  77         RVCE_BEGIN(0x00000002); // task info
  78         RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
  79         RVCE_CS(taskOperation); // taskOperation
  80         RVCE_CS(0x00000000); // referencePictureDependency
  81         RVCE_CS(0x00000000); // collocateFlagDependency
  82         RVCE_CS(0x00000000); // feedbackIndex
  83         RVCE_CS(0x00000000); // videoBitstreamRingIndex
  84         RVCE_END();
  85 }
  86
  87 static void feedback(struct rvce_encoder *enc)
  88 {
  89         RVCE_BEGIN(0x05000005); // feedback buffer
  90         RVCE_WRITE(enc->fb->cs_handle, enc->fb->domain); // feedbackRingAddressHi
  91         RVCE_CS(0x00000000); // feedbackRingAddressLo
  92         RVCE_CS(0x00000001); // feedbackRingSize
  93         RVCE_END();
  94 }
  95
  96 static void create(struct rvce_encoder *enc)
  97 {
  98         task_info(enc, 0x00000000);
  99
 100         RVCE_BEGIN(0x01000001); // create cmd
 101         RVCE_CS(0x00000000); // encUseCircularBuffer
 102         RVCE_CS(0x00000041); // encProfile
 103         RVCE_CS(0x0000000a); // encLevel
 104         RVCE_CS(0x00000000); // encPicStructRestriction
 105         RVCE_CS(enc->base.width); // encImageWidth
 106         RVCE_CS(enc->base.height); // encImageHeight
 107         RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch
 108         RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch
 109         RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw
 110         RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
 111         RVCE_END();
 112 }
 113
 114 static void rate_control(struct rvce_encoder *enc)
 115 {
 116         RVCE_BEGIN(0x04000005); // rate control
 117         RVCE_CS(enc->pic.rate_ctrl.rate_ctrl_method); // encRateControlMethod
 118         RVCE_CS(enc->pic.rate_ctrl.target_bitrate); // encRateControlTargetBitRate
 119         RVCE_CS(enc->pic.rate_ctrl.peak_bitrate); // encRateControlPeakBitRate
 120         RVCE_CS(enc->pic.rate_ctrl.frame_rate_num); // encRateControlFrameRateNum
 121         RVCE_CS(0x00000000); // encGOPSize
 122         RVCE_CS(enc->pic.quant_i_frames); // encQP_I
 123         RVCE_CS(enc->pic.quant_p_frames); // encQP_P
 124         RVCE_CS(enc->pic.quant_b_frames); // encQP_B
 125         RVCE_CS(enc->pic.rate_ctrl.vbv_buffer_size); // encVBVBufferSize
 126         RVCE_CS(enc->pic.rate_ctrl.frame_rate_den); // encRateControlFrameRateDen
 127         RVCE_CS(0x00000000); // encVBVBufferLevel
 128         RVCE_CS(0x00000000); // encMaxAUSize
 129         RVCE_CS(0x00000000); // encQPInitialMode
 130         RVCE_CS(enc->pic.rate_ctrl.target_bits_picture); // encTargetBitsPerPicture
 131         RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_integer); // encPeakBitsPerPictureInteger
 132         RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_fraction); // encPeakBitsPerPictureFractional
 133         RVCE_CS(0x00000000); // encMinQP
 134         RVCE_CS(0x00000033); // encMaxQP
 135         RVCE_CS(0x00000000); // encSkipFrameEnable
 136         RVCE_CS(0x00000000); // encFillerDataEnable
 137         RVCE_CS(0x00000000); // encEnforceHRD
 138         RVCE_CS(0x00000000); // encBPicsDeltaQP
 139         RVCE_CS(0x00000000); // encReferenceBPicsDeltaQP
 140         RVCE_CS(0x00000000); // encRateControlReInitDisable
 141         RVCE_END();
 142 }
 143
 144 static void config_extension(struct rvce_encoder *enc)
 145 {
 146         RVCE_BEGIN(0x04000001); // config extension
 147         RVCE_CS(0x00000003); // encEnablePerfLogging
 148         RVCE_END();
 149 }
 150
 151 static void pic_control(struct rvce_encoder *enc)
 152 {
 153         unsigned encNumMBsPerSlice;
 154
 155         encNumMBsPerSlice = align(enc->base.width, 16) / 16;
 156         encNumMBsPerSlice *= align(enc->base.height, 16) / 16;
 157
 158         RVCE_BEGIN(0x04000002); // pic control
 159         RVCE_CS(0x00000000); // encUseConstrainedIntraPred
 160         RVCE_CS(0x00000000); // encCABACEnable
 161         RVCE_CS(0x00000000); // encCABACIDC
 162         RVCE_CS(0x00000000); // encLoopFilterDisable
 163         RVCE_CS(0x00000000); // encLFBetaOffset
 164         RVCE_CS(0x00000000); // encLFAlphaC0Offset
 165         RVCE_CS(0x00000000); // encCropLeftOffset
 166         RVCE_CS((align(enc->base.width, 16) - enc->base.width) >> 1); // encCropRightOffset
 167         RVCE_CS(0x00000000); // encCropTopOffset
 168         RVCE_CS((align(enc->base.height, 16) - enc->base.height) >> 1); // encCropBottomOffset
 169         RVCE_CS(encNumMBsPerSlice); // encNumMBsPerSlice
 170         RVCE_CS(0x00000000); // encIntraRefreshNumMBsPerSlot
 171         RVCE_CS(0x00000000); // encForceIntraRefresh
 172         RVCE_CS(0x00000000); // encForceIMBPeriod
 173         RVCE_CS(0x00000000); // encPicOrderCntType
 174         RVCE_CS(0x00000000); // log2_max_pic_order_cnt_lsb_minus4
 175         RVCE_CS(0x00000000); // encSPSID
 176         RVCE_CS(0x00000000); // encPPSID
 177         RVCE_CS(0x00000040); // encConstraintSetFlags
 178         RVCE_CS(0x00000000); // encBPicPattern
 179         RVCE_CS(0x00000000); // weightPredModeBPicture
 180         RVCE_CS(MIN2(enc->base.max_references, 2)); // encNumberOfReferenceFrames
 181         RVCE_CS(enc->base.max_references + 1); // encMaxNumRefFrames
 182         RVCE_CS(0x00000000); // encNumDefaultActiveRefL0
 183         RVCE_CS(0x00000000); // encNumDefaultActiveRefL1
 184         RVCE_CS(0x00000000); // encSliceMode
 185         RVCE_CS(0x00000000); // encMaxSliceSize
 186         RVCE_END();
 187 }
 188
 189 static void motion_estimation(struct rvce_encoder *enc)
 190 {
 191         RVCE_BEGIN(0x04000007); // motion estimation
 192         RVCE_CS(0x00000001); // encIMEDecimationSearch
 193         RVCE_CS(0x00000001); // motionEstHalfPixel
 194         RVCE_CS(0x00000000); // motionEstQuarterPixel
 195         RVCE_CS(0x00000000); // disableFavorPMVPoint
 196         RVCE_CS(0x00000000); // forceZeroPointCenter
 197         RVCE_CS(0x00000000); // LSMVert
 198         RVCE_CS(0x00000010); // encSearchRangeX
 199         RVCE_CS(0x00000010); // encSearchRangeY
 200         RVCE_CS(0x00000010); // encSearch1RangeX
 201         RVCE_CS(0x00000010); // encSearch1RangeY
 202         RVCE_CS(0x00000000); // disable16x16Frame1
 203         RVCE_CS(0x00000000); // disableSATD
 204         RVCE_CS(0x00000000); // enableAMD
 205         RVCE_CS(0x000000fe); // encDisableSubMode
 206         RVCE_CS(0x00000000); // encIMESkipX
 207         RVCE_CS(0x00000000); // encIMESkipY
 208         RVCE_CS(0x00000000); // encEnImeOverwDisSubm
 209         RVCE_CS(0x00000000); // encImeOverwDisSubmNo
 210         RVCE_CS(0x00000001); // encIME2SearchRangeX
 211         RVCE_CS(0x00000001); // encIME2SearchRangeY
 212         RVCE_CS(0x00000000); // parallelModeSpeedupEnable
 213         RVCE_CS(0x00000000); // fme0_encDisableSubMode
 214         RVCE_CS(0x00000000); // fme1_encDisableSubMode
 215         RVCE_CS(0x00000000); // imeSWSpeedupEnable
 216         RVCE_END();
 217 }
 218
 219 static void rdo(struct rvce_encoder *enc)
 220 {
 221         RVCE_BEGIN(0x04000008); // rdo
 222         RVCE_CS(0x00000000); // encDisableTbePredIFrame
 223         RVCE_CS(0x00000000); // encDisableTbePredPFrame
 224         RVCE_CS(0x00000000); // useFmeInterpolY
 225         RVCE_CS(0x00000000); // useFmeInterpolUV
 226         RVCE_CS(0x00000000); // useFmeIntrapolY
 227         RVCE_CS(0x00000000); // useFmeIntrapolUV
 228         RVCE_CS(0x00000000); // useFmeInterpolY_1
 229         RVCE_CS(0x00000000); // useFmeInterpolUV_1
 230         RVCE_CS(0x00000000); // useFmeIntrapolY_1
 231         RVCE_CS(0x00000000); // useFmeIntrapolUV_1
 232         RVCE_CS(0x00000000); // enc16x16CostAdj
 233         RVCE_CS(0x00000000); // encSkipCostAdj
 234         RVCE_CS(0x00000000); // encForce16x16skip
 235         RVCE_CS(0x00000000); // encDisableThresholdCalcA
 236         RVCE_CS(0x00000000); // encLumaCoeffCost
 237         RVCE_CS(0x00000000); // encLumaMBCoeffCost
 238         RVCE_CS(0x00000000); // encChromaCoeffCost
 239         RVCE_END();
 240 }
 241
 242 static void encode(struct rvce_encoder *enc)
 243 {
 244         int i;
 245         unsigned luma_offset, chroma_offset;
 246
 247         task_info(enc, 0x00000003);
 248
 249         RVCE_BEGIN(0x05000001); // context buffer
 250         RVCE_READWRITE(enc->cpb.cs_handle, enc->cpb.domain); // encodeContextAddressHi
 251         RVCE_CS(0x00000000); // encodeContextAddressLo
 252         RVCE_END();
 253
 254         RVCE_BEGIN(0x05000004); // video bitstream buffer
 255         RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT); // videoBitstreamRingAddressHi
 256         RVCE_CS(0x00000000); // videoBitstreamRingAddressLo
 257         RVCE_CS(enc->bs_size); // videoBitstreamRingSize
 258         RVCE_END();
 259
 260         RVCE_BEGIN(0x03000001); // encode
 261         RVCE_CS(0x00000000); // insertHeaders
 262         RVCE_CS(0x00000000); // pictureStructure
 263         RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
 264         RVCE_CS(0x00000000); // forceRefreshMap
 265         RVCE_CS(0x00000000); // insertAUD
 266         RVCE_CS(0x00000000); // endOfSequence
 267         RVCE_CS(0x00000000); // endOfStream
 268         RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM); // inputPictureLumaAddressHi
 269         RVCE_CS(enc->luma->level[0].offset); // inputPictureLumaAddressLo
 270         RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM); // inputPictureChromaAddressHi
 271         RVCE_CS(enc->chroma->level[0].offset); // inputPictureChromaAddressLo
 272         RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
 273         RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
 274         RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
 275         RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode
 276         RVCE_CS(0x00000000); // encInputPicTileConfig
 277         RVCE_CS(enc->pic.picture_type); // encPicType
 278         RVCE_CS(enc->pic.picture_type == 3); // encIdrFlag
 279         RVCE_CS(0x00000000); // encIdrPicId
 280         RVCE_CS(0x00000000); // encMGSKeyPic
 281         RVCE_CS(0x00000001); // encReferenceFlag
 282         RVCE_CS(0x00000000); // encTemporalLayerIndex
 283         RVCE_CS(0x00000000); // num_ref_idx_active_override_flag
 284         RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1
 285         RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
 286         for (i = 0; i < 4; ++i) {
 287                 RVCE_CS(0x00000000); // encRefListModificationOp
 288                 RVCE_CS(0x00000000); // encRefListModificationNum
 289         }
 290         for (i = 0; i < 4; ++i) {
 291                 RVCE_CS(0x00000000); // encDecodedPictureMarkingOp
 292                 RVCE_CS(0x00000000); // encDecodedPictureMarkingNum
 293                 RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx
 294         }
 295         for (i = 0; i < 4; ++i) {
 296                 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp
 297                 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum
 298         }
 299
 300         RVCE_CS(0x00000000); // pictureStructure
 301
 302         if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) {
 303                 RVCE_CS(0x00000000); // encPicType
 304                 RVCE_CS(0x00000000); // frameNumber
 305                 RVCE_CS(0x00000000); // pictureOrderCount
 306                 RVCE_CS(0xffffffff); // lumaOffset
 307                 RVCE_CS(0xffffffff); // chromaOffset
 308         }
 309         else if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
 310                 struct rvce_cpb_slot *l0 = l0_slot(enc);
 311                 frame_offset(enc, l0, &luma_offset, &chroma_offset);
 312                 RVCE_CS(l0->picture_type); // encPicType
 313                 RVCE_CS(l0->frame_num); // frameNumber
 314                 RVCE_CS(l0->pic_order_cnt); // pictureOrderCount
 315                 RVCE_CS(luma_offset); // lumaOffset
 316                 RVCE_CS(chroma_offset); // chromaOffset
 317         }
 318         for (i = 0; i < 2; ++i) {
 319                 RVCE_CS(0x00000000); // pictureStructure
 320                 RVCE_CS(0x00000000); // encPicType
 321                 RVCE_CS(0x00000000); // frameNumber
 322                 RVCE_CS(0x00000000); // pictureOrderCount
 323                 RVCE_CS(0xffffffff); // lumaOffset
 324                 RVCE_CS(0xffffffff); // chromaOffset
 325         }
 326
 327         frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset);
 328         RVCE_CS(luma_offset); // encReconstructedLumaOffset
 329         RVCE_CS(chroma_offset); // encReconstructedChromaOffset
 330         RVCE_CS(0x00000000); // encColocBufferOffset
 331         RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
 332         RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset
 333         RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset
 334         RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset
 335         RVCE_CS(0x00000000); // pictureCount
 336         RVCE_CS(enc->pic.frame_num); // frameNumber
 337         RVCE_CS(enc->pic.pic_order_cnt); // pictureOrderCount
 338         RVCE_CS(0x00000000); // numIPicRemainInRCGOP
 339         RVCE_CS(0x00000000); // numPPicRemainInRCGOP
 340         RVCE_CS(0x00000000); // numBPicRemainInRCGOP
 341         RVCE_CS(0x00000000); // numIRPicRemainInRCGOP
 342         RVCE_CS(0x00000000); // enableIntraRefresh
 343         RVCE_END();
 344 }
 345
 346 static void destroy(struct rvce_encoder *enc)
 347 {
 348         task_info(enc, 0x00000001);
 349
 350         RVCE_BEGIN(0x02000001); // destroy
 351         RVCE_END();
 352 }
 353
 354 void radeon_vce_40_2_2_init(struct rvce_encoder *enc)
 355 {
 356         enc->session = session;
 357         enc->create = create;
 358         enc->feedback = feedback;
 359         enc->rate_control = rate_control;
 360         enc->config_extension = config_extension;
 361         enc->pic_control = pic_control;
 362         enc->motion_estimation = motion_estimation;
 363         enc->rdo = rdo;
 364         enc->encode = encode;
 365         enc->destroy = destroy;
 366 }