radeon/vce: use util function to get h264 profile idc
[mesa.git] / src / gallium / drivers / radeon / radeon_vce_50.c
1 /**************************************************************************
2 *
3 * Copyright 2013 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <stdio.h>
29
30 #include "pipe/p_video_codec.h"
31
32 #include "util/u_video.h"
33 #include "util/u_memory.h"
34
35 #include "vl/vl_video_buffer.h"
36
37 #include "si_pipe.h"
38 #include "radeon_video.h"
39 #include "radeon_vce.h"
40
41 static void rate_control(struct rvce_encoder *enc)
42 {
43 RVCE_BEGIN(0x04000005); // rate control
44 RVCE_CS(enc->pic.rate_ctrl.rate_ctrl_method); // encRateControlMethod
45 RVCE_CS(enc->pic.rate_ctrl.target_bitrate); // encRateControlTargetBitRate
46 RVCE_CS(enc->pic.rate_ctrl.peak_bitrate); // encRateControlPeakBitRate
47 RVCE_CS(enc->pic.rate_ctrl.frame_rate_num); // encRateControlFrameRateNum
48 RVCE_CS(0x00000000); // encGOPSize
49 RVCE_CS(enc->pic.quant_i_frames); // encQP_I
50 RVCE_CS(enc->pic.quant_p_frames); // encQP_P
51 RVCE_CS(enc->pic.quant_b_frames); // encQP_B
52 RVCE_CS(enc->pic.rate_ctrl.vbv_buffer_size); // encVBVBufferSize
53 RVCE_CS(enc->pic.rate_ctrl.frame_rate_den); // encRateControlFrameRateDen
54 RVCE_CS(0x00000000); // encVBVBufferLevel
55 RVCE_CS(0x00000000); // encMaxAUSize
56 RVCE_CS(0x00000000); // encQPInitialMode
57 RVCE_CS(enc->pic.rate_ctrl.target_bits_picture); // encTargetBitsPerPicture
58 RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_integer); // encPeakBitsPerPictureInteger
59 RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_fraction); // encPeakBitsPerPictureFractional
60 RVCE_CS(0x00000000); // encMinQP
61 RVCE_CS(0x00000033); // encMaxQP
62 RVCE_CS(0x00000000); // encSkipFrameEnable
63 RVCE_CS(0x00000000); // encFillerDataEnable
64 RVCE_CS(0x00000000); // encEnforceHRD
65 RVCE_CS(0x00000000); // encBPicsDeltaQP
66 RVCE_CS(0x00000000); // encReferenceBPicsDeltaQP
67 RVCE_CS(0x00000000); // encRateControlReInitDisable
68 RVCE_CS(0x00000000); // encLCVBRInitQPFlag
69 RVCE_CS(0x00000000); // encLCVBRSATDBasedNonlinearBitBudgetFlag
70 RVCE_END();
71 }
72
73 static void encode(struct rvce_encoder *enc)
74 {
75 signed luma_offset, chroma_offset, bs_offset;
76 unsigned dep, bs_idx = enc->bs_idx++;
77 int i;
78
79 if (enc->dual_inst) {
80 if (bs_idx == 0)
81 dep = 1;
82 else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
83 dep = 0;
84 else
85 dep = 2;
86 } else
87 dep = 0;
88
89 enc->task_info(enc, 0x00000003, dep, 0, bs_idx);
90
91 RVCE_BEGIN(0x05000001); // context buffer
92 RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo
93 RVCE_END();
94
95 bs_offset = -(signed)(bs_idx * enc->bs_size);
96
97 RVCE_BEGIN(0x05000004); // video bitstream buffer
98 RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, bs_offset); // videoBitstreamRingAddressHi/Lo
99 RVCE_CS(enc->bs_size); // videoBitstreamRingSize
100 RVCE_END();
101
102 if (enc->dual_pipe) {
103 unsigned aux_offset = enc->cpb.res->buf->size -
104 RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
105 RVCE_BEGIN(0x05000002); // auxiliary buffer
106 for (i = 0; i < 8; ++i) {
107 RVCE_CS(aux_offset);
108 aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
109 }
110 for (i = 0; i < 8; ++i)
111 RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
112 RVCE_END();
113 }
114
115 RVCE_BEGIN(0x03000001); // encode
116 RVCE_CS(enc->pic.frame_num ? 0x0 : 0x11); // insertHeaders
117 RVCE_CS(0x00000000); // pictureStructure
118 RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
119 RVCE_CS(0x00000000); // forceRefreshMap
120 RVCE_CS(0x00000000); // insertAUD
121 RVCE_CS(0x00000000); // endOfSequence
122 RVCE_CS(0x00000000); // endOfStream
123 RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
124 enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
125 RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
126 enc->chroma->u.legacy.level[0].offset); // inputPictureChromaAddressHi/Lo
127 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
128 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
129 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
130 if (enc->dual_pipe)
131 RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
132 else
133 RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
134 RVCE_CS(0x00000000); // encInputPicTileConfig
135 RVCE_CS(enc->pic.picture_type); // encPicType
136 RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
137 RVCE_CS(0x00000000); // encIdrPicId
138 RVCE_CS(0x00000000); // encMGSKeyPic
139 RVCE_CS(!enc->pic.not_referenced); // encReferenceFlag
140 RVCE_CS(0x00000000); // encTemporalLayerIndex
141 RVCE_CS(0x00000000); // num_ref_idx_active_override_flag
142 RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1
143 RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
144
145 i = enc->pic.frame_num - enc->pic.ref_idx_l0;
146 if (i > 1 && enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
147 RVCE_CS(0x00000001); // encRefListModificationOp
148 RVCE_CS(i - 1); // encRefListModificationNum
149 } else {
150 RVCE_CS(0x00000000); // encRefListModificationOp
151 RVCE_CS(0x00000000); // encRefListModificationNum
152 }
153
154 for (i = 0; i < 3; ++i) {
155 RVCE_CS(0x00000000); // encRefListModificationOp
156 RVCE_CS(0x00000000); // encRefListModificationNum
157 }
158 for (i = 0; i < 4; ++i) {
159 RVCE_CS(0x00000000); // encDecodedPictureMarkingOp
160 RVCE_CS(0x00000000); // encDecodedPictureMarkingNum
161 RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx
162 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp
163 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum
164 }
165
166 // encReferencePictureL0[0]
167 RVCE_CS(0x00000000); // pictureStructure
168 if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
169 enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
170 struct rvce_cpb_slot *l0 = si_l0_slot(enc);
171 si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
172 RVCE_CS(l0->picture_type); // encPicType
173 RVCE_CS(l0->frame_num); // frameNumber
174 RVCE_CS(l0->pic_order_cnt); // pictureOrderCount
175 RVCE_CS(luma_offset); // lumaOffset
176 RVCE_CS(chroma_offset); // chromaOffset
177 } else {
178 RVCE_CS(0x00000000); // encPicType
179 RVCE_CS(0x00000000); // frameNumber
180 RVCE_CS(0x00000000); // pictureOrderCount
181 RVCE_CS(0xffffffff); // lumaOffset
182 RVCE_CS(0xffffffff); // chromaOffset
183 }
184
185 // encReferencePictureL0[1]
186 RVCE_CS(0x00000000); // pictureStructure
187 RVCE_CS(0x00000000); // encPicType
188 RVCE_CS(0x00000000); // frameNumber
189 RVCE_CS(0x00000000); // pictureOrderCount
190 RVCE_CS(0xffffffff); // lumaOffset
191 RVCE_CS(0xffffffff); // chromaOffset
192
193 // encReferencePictureL1[0]
194 RVCE_CS(0x00000000); // pictureStructure
195 if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
196 struct rvce_cpb_slot *l1 = si_l1_slot(enc);
197 si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
198 RVCE_CS(l1->picture_type); // encPicType
199 RVCE_CS(l1->frame_num); // frameNumber
200 RVCE_CS(l1->pic_order_cnt); // pictureOrderCount
201 RVCE_CS(luma_offset); // lumaOffset
202 RVCE_CS(chroma_offset); // chromaOffset
203 } else {
204 RVCE_CS(0x00000000); // encPicType
205 RVCE_CS(0x00000000); // frameNumber
206 RVCE_CS(0x00000000); // pictureOrderCount
207 RVCE_CS(0xffffffff); // lumaOffset
208 RVCE_CS(0xffffffff); // chromaOffset
209 }
210
211 si_vce_frame_offset(enc, si_current_slot(enc), &luma_offset, &chroma_offset);
212 RVCE_CS(luma_offset); // encReconstructedLumaOffset
213 RVCE_CS(chroma_offset); // encReconstructedChromaOffset
214 RVCE_CS(0x00000000); // encColocBufferOffset
215 RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
216 RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset
217 RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset
218 RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset
219 RVCE_CS(0x00000000); // pictureCount
220 RVCE_CS(enc->pic.frame_num); // frameNumber
221 RVCE_CS(enc->pic.pic_order_cnt); // pictureOrderCount
222 RVCE_CS(0x00000000); // numIPicRemainInRCGOP
223 RVCE_CS(0x00000000); // numPPicRemainInRCGOP
224 RVCE_CS(0x00000000); // numBPicRemainInRCGOP
225 RVCE_CS(0x00000000); // numIRPicRemainInRCGOP
226 RVCE_CS(0x00000000); // enableIntraRefresh
227 RVCE_END();
228 }
229
230 void si_vce_50_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
231 {
232 }
233
234 void si_vce_50_init(struct rvce_encoder *enc)
235 {
236 si_vce_40_2_2_init(enc);
237
238 /* only the two below are different */
239 enc->rate_control = rate_control;
240 enc->encode = encode;
241 }