1 /**************************************************************************
3 * Copyright 2017 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
31 #include "pipe/p_video_codec.h"
33 #include "util/u_memory.h"
34 #include "util/u_video.h"
36 #include "vl/vl_mpeg12_decoder.h"
38 #include "radeonsi/si_pipe.h"
39 #include "radeon_video.h"
40 #include "radeon_vcn_dec.h"
41 #include "vl/vl_probs_table.h"
43 #define FB_BUFFER_OFFSET 0x1000
44 #define FB_BUFFER_SIZE 2048
45 #define IT_SCALING_TABLE_SIZE 992
46 #define VP9_PROBS_TABLE_SIZE (RDECODE_VP9_PROBS_DATA_SIZE + 256)
47 #define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
49 #define RDECODE_GPCOM_VCPU_CMD 0x2070c
50 #define RDECODE_GPCOM_VCPU_DATA0 0x20710
51 #define RDECODE_GPCOM_VCPU_DATA1 0x20714
52 #define RDECODE_ENGINE_CNTL 0x20718
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57 #define NUM_VP9_REFS 8
59 static rvcn_dec_message_avc_t
get_h264_msg(struct radeon_decoder
*dec
,
60 struct pipe_h264_picture_desc
*pic
)
62 rvcn_dec_message_avc_t result
;
64 memset(&result
, 0, sizeof(result
));
65 switch (pic
->base
.profile
) {
66 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE
:
67 case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE
:
68 result
.profile
= RDECODE_H264_PROFILE_BASELINE
;
71 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN
:
72 result
.profile
= RDECODE_H264_PROFILE_MAIN
;
75 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH
:
76 result
.profile
= RDECODE_H264_PROFILE_HIGH
;
84 result
.level
= dec
->base
.level
;
86 result
.sps_info_flags
= 0;
87 result
.sps_info_flags
|= pic
->pps
->sps
->direct_8x8_inference_flag
<< 0;
88 result
.sps_info_flags
|= pic
->pps
->sps
->mb_adaptive_frame_field_flag
<< 1;
89 result
.sps_info_flags
|= pic
->pps
->sps
->frame_mbs_only_flag
<< 2;
90 result
.sps_info_flags
|= pic
->pps
->sps
->delta_pic_order_always_zero_flag
<< 3;
91 result
.sps_info_flags
|= 1 << RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT
;
93 result
.bit_depth_luma_minus8
= pic
->pps
->sps
->bit_depth_luma_minus8
;
94 result
.bit_depth_chroma_minus8
= pic
->pps
->sps
->bit_depth_chroma_minus8
;
95 result
.log2_max_frame_num_minus4
= pic
->pps
->sps
->log2_max_frame_num_minus4
;
96 result
.pic_order_cnt_type
= pic
->pps
->sps
->pic_order_cnt_type
;
97 result
.log2_max_pic_order_cnt_lsb_minus4
=
98 pic
->pps
->sps
->log2_max_pic_order_cnt_lsb_minus4
;
100 switch (dec
->base
.chroma_format
) {
101 case PIPE_VIDEO_CHROMA_FORMAT_NONE
:
103 case PIPE_VIDEO_CHROMA_FORMAT_400
:
104 result
.chroma_format
= 0;
106 case PIPE_VIDEO_CHROMA_FORMAT_420
:
107 result
.chroma_format
= 1;
109 case PIPE_VIDEO_CHROMA_FORMAT_422
:
110 result
.chroma_format
= 2;
112 case PIPE_VIDEO_CHROMA_FORMAT_444
:
113 result
.chroma_format
= 3;
117 result
.pps_info_flags
= 0;
118 result
.pps_info_flags
|= pic
->pps
->transform_8x8_mode_flag
<< 0;
119 result
.pps_info_flags
|= pic
->pps
->redundant_pic_cnt_present_flag
<< 1;
120 result
.pps_info_flags
|= pic
->pps
->constrained_intra_pred_flag
<< 2;
121 result
.pps_info_flags
|= pic
->pps
->deblocking_filter_control_present_flag
<< 3;
122 result
.pps_info_flags
|= pic
->pps
->weighted_bipred_idc
<< 4;
123 result
.pps_info_flags
|= pic
->pps
->weighted_pred_flag
<< 6;
124 result
.pps_info_flags
|= pic
->pps
->bottom_field_pic_order_in_frame_present_flag
<< 7;
125 result
.pps_info_flags
|= pic
->pps
->entropy_coding_mode_flag
<< 8;
127 result
.num_slice_groups_minus1
= pic
->pps
->num_slice_groups_minus1
;
128 result
.slice_group_map_type
= pic
->pps
->slice_group_map_type
;
129 result
.slice_group_change_rate_minus1
= pic
->pps
->slice_group_change_rate_minus1
;
130 result
.pic_init_qp_minus26
= pic
->pps
->pic_init_qp_minus26
;
131 result
.chroma_qp_index_offset
= pic
->pps
->chroma_qp_index_offset
;
132 result
.second_chroma_qp_index_offset
= pic
->pps
->second_chroma_qp_index_offset
;
134 memcpy(result
.scaling_list_4x4
, pic
->pps
->ScalingList4x4
, 6*16);
135 memcpy(result
.scaling_list_8x8
, pic
->pps
->ScalingList8x8
, 2*64);
137 memcpy(dec
->it
, result
.scaling_list_4x4
, 6*16);
138 memcpy((dec
->it
+ 96), result
.scaling_list_8x8
, 2*64);
140 result
.num_ref_frames
= pic
->num_ref_frames
;
142 result
.num_ref_idx_l0_active_minus1
= pic
->num_ref_idx_l0_active_minus1
;
143 result
.num_ref_idx_l1_active_minus1
= pic
->num_ref_idx_l1_active_minus1
;
145 result
.frame_num
= pic
->frame_num
;
146 memcpy(result
.frame_num_list
, pic
->frame_num_list
, 4*16);
147 result
.curr_field_order_cnt_list
[0] = pic
->field_order_cnt
[0];
148 result
.curr_field_order_cnt_list
[1] = pic
->field_order_cnt
[1];
149 memcpy(result
.field_order_cnt_list
, pic
->field_order_cnt_list
, 4*16*2);
151 result
.decoded_pic_idx
= pic
->frame_num
;
156 static void radeon_dec_destroy_associated_data(void *data
)
158 /* NOOP, since we only use an intptr */
161 static rvcn_dec_message_hevc_t
get_h265_msg(struct radeon_decoder
*dec
,
162 struct pipe_video_buffer
*target
,
163 struct pipe_h265_picture_desc
*pic
)
165 rvcn_dec_message_hevc_t result
;
168 memset(&result
, 0, sizeof(result
));
169 result
.sps_info_flags
= 0;
170 result
.sps_info_flags
|= pic
->pps
->sps
->scaling_list_enabled_flag
<< 0;
171 result
.sps_info_flags
|= pic
->pps
->sps
->amp_enabled_flag
<< 1;
172 result
.sps_info_flags
|= pic
->pps
->sps
->sample_adaptive_offset_enabled_flag
<< 2;
173 result
.sps_info_flags
|= pic
->pps
->sps
->pcm_enabled_flag
<< 3;
174 result
.sps_info_flags
|= pic
->pps
->sps
->pcm_loop_filter_disabled_flag
<< 4;
175 result
.sps_info_flags
|= pic
->pps
->sps
->long_term_ref_pics_present_flag
<< 5;
176 result
.sps_info_flags
|= pic
->pps
->sps
->sps_temporal_mvp_enabled_flag
<< 6;
177 result
.sps_info_flags
|= pic
->pps
->sps
->strong_intra_smoothing_enabled_flag
<< 7;
178 result
.sps_info_flags
|= pic
->pps
->sps
->separate_colour_plane_flag
<< 8;
179 if (((struct si_screen
*)dec
->screen
)->info
.family
== CHIP_CARRIZO
)
180 result
.sps_info_flags
|= 1 << 9;
181 if (pic
->UseRefPicList
== true)
182 result
.sps_info_flags
|= 1 << 10;
184 result
.chroma_format
= pic
->pps
->sps
->chroma_format_idc
;
185 result
.bit_depth_luma_minus8
= pic
->pps
->sps
->bit_depth_luma_minus8
;
186 result
.bit_depth_chroma_minus8
= pic
->pps
->sps
->bit_depth_chroma_minus8
;
187 result
.log2_max_pic_order_cnt_lsb_minus4
= pic
->pps
->sps
->log2_max_pic_order_cnt_lsb_minus4
;
188 result
.sps_max_dec_pic_buffering_minus1
= pic
->pps
->sps
->sps_max_dec_pic_buffering_minus1
;
189 result
.log2_min_luma_coding_block_size_minus3
=
190 pic
->pps
->sps
->log2_min_luma_coding_block_size_minus3
;
191 result
.log2_diff_max_min_luma_coding_block_size
=
192 pic
->pps
->sps
->log2_diff_max_min_luma_coding_block_size
;
193 result
.log2_min_transform_block_size_minus2
=
194 pic
->pps
->sps
->log2_min_transform_block_size_minus2
;
195 result
.log2_diff_max_min_transform_block_size
=
196 pic
->pps
->sps
->log2_diff_max_min_transform_block_size
;
197 result
.max_transform_hierarchy_depth_inter
=
198 pic
->pps
->sps
->max_transform_hierarchy_depth_inter
;
199 result
.max_transform_hierarchy_depth_intra
=
200 pic
->pps
->sps
->max_transform_hierarchy_depth_intra
;
201 result
.pcm_sample_bit_depth_luma_minus1
= pic
->pps
->sps
->pcm_sample_bit_depth_luma_minus1
;
202 result
.pcm_sample_bit_depth_chroma_minus1
=
203 pic
->pps
->sps
->pcm_sample_bit_depth_chroma_minus1
;
204 result
.log2_min_pcm_luma_coding_block_size_minus3
=
205 pic
->pps
->sps
->log2_min_pcm_luma_coding_block_size_minus3
;
206 result
.log2_diff_max_min_pcm_luma_coding_block_size
=
207 pic
->pps
->sps
->log2_diff_max_min_pcm_luma_coding_block_size
;
208 result
.num_short_term_ref_pic_sets
= pic
->pps
->sps
->num_short_term_ref_pic_sets
;
210 result
.pps_info_flags
= 0;
211 result
.pps_info_flags
|= pic
->pps
->dependent_slice_segments_enabled_flag
<< 0;
212 result
.pps_info_flags
|= pic
->pps
->output_flag_present_flag
<< 1;
213 result
.pps_info_flags
|= pic
->pps
->sign_data_hiding_enabled_flag
<< 2;
214 result
.pps_info_flags
|= pic
->pps
->cabac_init_present_flag
<< 3;
215 result
.pps_info_flags
|= pic
->pps
->constrained_intra_pred_flag
<< 4;
216 result
.pps_info_flags
|= pic
->pps
->transform_skip_enabled_flag
<< 5;
217 result
.pps_info_flags
|= pic
->pps
->cu_qp_delta_enabled_flag
<< 6;
218 result
.pps_info_flags
|= pic
->pps
->pps_slice_chroma_qp_offsets_present_flag
<< 7;
219 result
.pps_info_flags
|= pic
->pps
->weighted_pred_flag
<< 8;
220 result
.pps_info_flags
|= pic
->pps
->weighted_bipred_flag
<< 9;
221 result
.pps_info_flags
|= pic
->pps
->transquant_bypass_enabled_flag
<< 10;
222 result
.pps_info_flags
|= pic
->pps
->tiles_enabled_flag
<< 11;
223 result
.pps_info_flags
|= pic
->pps
->entropy_coding_sync_enabled_flag
<< 12;
224 result
.pps_info_flags
|= pic
->pps
->uniform_spacing_flag
<< 13;
225 result
.pps_info_flags
|= pic
->pps
->loop_filter_across_tiles_enabled_flag
<< 14;
226 result
.pps_info_flags
|= pic
->pps
->pps_loop_filter_across_slices_enabled_flag
<< 15;
227 result
.pps_info_flags
|= pic
->pps
->deblocking_filter_override_enabled_flag
<< 16;
228 result
.pps_info_flags
|= pic
->pps
->pps_deblocking_filter_disabled_flag
<< 17;
229 result
.pps_info_flags
|= pic
->pps
->lists_modification_present_flag
<< 18;
230 result
.pps_info_flags
|= pic
->pps
->slice_segment_header_extension_present_flag
<< 19;
232 result
.num_extra_slice_header_bits
= pic
->pps
->num_extra_slice_header_bits
;
233 result
.num_long_term_ref_pic_sps
= pic
->pps
->sps
->num_long_term_ref_pics_sps
;
234 result
.num_ref_idx_l0_default_active_minus1
= pic
->pps
->num_ref_idx_l0_default_active_minus1
;
235 result
.num_ref_idx_l1_default_active_minus1
= pic
->pps
->num_ref_idx_l1_default_active_minus1
;
236 result
.pps_cb_qp_offset
= pic
->pps
->pps_cb_qp_offset
;
237 result
.pps_cr_qp_offset
= pic
->pps
->pps_cr_qp_offset
;
238 result
.pps_beta_offset_div2
= pic
->pps
->pps_beta_offset_div2
;
239 result
.pps_tc_offset_div2
= pic
->pps
->pps_tc_offset_div2
;
240 result
.diff_cu_qp_delta_depth
= pic
->pps
->diff_cu_qp_delta_depth
;
241 result
.num_tile_columns_minus1
= pic
->pps
->num_tile_columns_minus1
;
242 result
.num_tile_rows_minus1
= pic
->pps
->num_tile_rows_minus1
;
243 result
.log2_parallel_merge_level_minus2
= pic
->pps
->log2_parallel_merge_level_minus2
;
244 result
.init_qp_minus26
= pic
->pps
->init_qp_minus26
;
246 for (i
= 0; i
< 19; ++i
)
247 result
.column_width_minus1
[i
] = pic
->pps
->column_width_minus1
[i
];
249 for (i
= 0; i
< 21; ++i
)
250 result
.row_height_minus1
[i
] = pic
->pps
->row_height_minus1
[i
];
252 result
.num_delta_pocs_ref_rps_idx
= pic
->NumDeltaPocsOfRefRpsIdx
;
253 result
.curr_poc
= pic
->CurrPicOrderCntVal
;
255 for (i
= 0 ; i
< 16 ; i
++) {
256 for (j
= 0; (pic
->ref
[j
] != NULL
) && (j
< 16) ; j
++) {
257 if (dec
->render_pic_list
[i
] == pic
->ref
[j
])
260 dec
->render_pic_list
[i
] = NULL
;
261 else if (pic
->ref
[j
+1] == NULL
)
262 dec
->render_pic_list
[i
] = NULL
;
265 for (i
= 0 ; i
< 16 ; i
++) {
266 if (dec
->render_pic_list
[i
] == NULL
) {
267 dec
->render_pic_list
[i
] = target
;
273 vl_video_buffer_set_associated_data(target
, &dec
->base
,
274 (void *)(uintptr_t)result
.curr_idx
,
275 &radeon_dec_destroy_associated_data
);
277 for (i
= 0; i
< 16; ++i
) {
278 struct pipe_video_buffer
*ref
= pic
->ref
[i
];
279 uintptr_t ref_pic
= 0;
281 result
.poc_list
[i
] = pic
->PicOrderCntVal
[i
];
284 ref_pic
= (uintptr_t)vl_video_buffer_get_associated_data(ref
, &dec
->base
);
287 result
.ref_pic_list
[i
] = ref_pic
;
290 for (i
= 0; i
< 8; ++i
) {
291 result
.ref_pic_set_st_curr_before
[i
] = 0xFF;
292 result
.ref_pic_set_st_curr_after
[i
] = 0xFF;
293 result
.ref_pic_set_lt_curr
[i
] = 0xFF;
296 for (i
= 0; i
< pic
->NumPocStCurrBefore
; ++i
)
297 result
.ref_pic_set_st_curr_before
[i
] = pic
->RefPicSetStCurrBefore
[i
];
299 for (i
= 0; i
< pic
->NumPocStCurrAfter
; ++i
)
300 result
.ref_pic_set_st_curr_after
[i
] = pic
->RefPicSetStCurrAfter
[i
];
302 for (i
= 0; i
< pic
->NumPocLtCurr
; ++i
)
303 result
.ref_pic_set_lt_curr
[i
] = pic
->RefPicSetLtCurr
[i
];
305 for (i
= 0; i
< 6; ++i
)
306 result
.ucScalingListDCCoefSizeID2
[i
] = pic
->pps
->sps
->ScalingListDCCoeff16x16
[i
];
308 for (i
= 0; i
< 2; ++i
)
309 result
.ucScalingListDCCoefSizeID3
[i
] = pic
->pps
->sps
->ScalingListDCCoeff32x32
[i
];
311 memcpy(dec
->it
, pic
->pps
->sps
->ScalingList4x4
, 6 * 16);
312 memcpy(dec
->it
+ 96, pic
->pps
->sps
->ScalingList8x8
, 6 * 64);
313 memcpy(dec
->it
+ 480, pic
->pps
->sps
->ScalingList16x16
, 6 * 64);
314 memcpy(dec
->it
+ 864, pic
->pps
->sps
->ScalingList32x32
, 2 * 64);
316 for (i
= 0 ; i
< 2 ; i
++) {
317 for (j
= 0 ; j
< 15 ; j
++)
318 result
.direct_reflist
[i
][j
] = pic
->RefPicList
[i
][j
];
321 if (pic
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
) {
322 if (target
->buffer_format
== PIPE_FORMAT_P016
) {
323 result
.p010_mode
= 1;
326 result
.p010_mode
= 0;
327 result
.luma_10to8
= 5;
328 result
.chroma_10to8
= 5;
329 result
.hevc_reserved
[0] = 4; /* sclr_luma10to8 */
330 result
.hevc_reserved
[1] = 4; /* sclr_chroma10to8 */
337 static void fill_probs_table(void *ptr
)
339 rvcn_dec_vp9_probs_t
*probs
= (rvcn_dec_vp9_probs_t
*)ptr
;
341 memcpy(&probs
->coef_probs
[0], default_coef_probs_4x4
, sizeof(default_coef_probs_4x4
));
342 memcpy(&probs
->coef_probs
[1], default_coef_probs_8x8
, sizeof(default_coef_probs_8x8
));
343 memcpy(&probs
->coef_probs
[2], default_coef_probs_16x16
, sizeof(default_coef_probs_16x16
));
344 memcpy(&probs
->coef_probs
[3], default_coef_probs_32x32
, sizeof(default_coef_probs_32x32
));
345 memcpy(probs
->y_mode_prob
, default_if_y_probs
, sizeof(default_if_y_probs
));
346 memcpy(probs
->uv_mode_prob
, default_if_uv_probs
, sizeof(default_if_uv_probs
));
347 memcpy(probs
->single_ref_prob
, default_single_ref_p
, sizeof(default_single_ref_p
));
348 memcpy(probs
->switchable_interp_prob
, default_switchable_interp_prob
, sizeof(default_switchable_interp_prob
));
349 memcpy(probs
->partition_prob
, default_partition_probs
, sizeof(default_partition_probs
));
350 memcpy(probs
->inter_mode_probs
, default_inter_mode_probs
, sizeof(default_inter_mode_probs
));
351 memcpy(probs
->mbskip_probs
, default_skip_probs
, sizeof(default_skip_probs
));
352 memcpy(probs
->intra_inter_prob
, default_intra_inter_p
, sizeof(default_intra_inter_p
));
353 memcpy(probs
->comp_inter_prob
, default_comp_inter_p
, sizeof(default_comp_inter_p
));
354 memcpy(probs
->comp_ref_prob
, default_comp_ref_p
, sizeof(default_comp_ref_p
));
355 memcpy(probs
->tx_probs_32x32
, default_tx_probs_32x32
, sizeof(default_tx_probs_32x32
));
356 memcpy(probs
->tx_probs_16x16
, default_tx_probs_16x16
, sizeof(default_tx_probs_16x16
));
357 memcpy(probs
->tx_probs_8x8
, default_tx_probs_8x8
, sizeof(default_tx_probs_8x8
));
358 memcpy(probs
->mv_joints
, default_nmv_joints
, sizeof(default_nmv_joints
));
359 memcpy(&probs
->mv_comps
[0], default_nmv_components
, sizeof(default_nmv_components
));
360 memset(&probs
->nmvc_mask
, 0, sizeof(rvcn_dec_vp9_nmv_ctx_mask_t
));
363 static rvcn_dec_message_vp9_t
get_vp9_msg(struct radeon_decoder
*dec
,
364 struct pipe_video_buffer
*target
,
365 struct pipe_vp9_picture_desc
*pic
)
367 rvcn_dec_message_vp9_t result
;
370 memset(&result
, 0, sizeof(result
));
373 rvcn_dec_vp9_probs_segment_t
*prbs
= (rvcn_dec_vp9_probs_segment_t
*)(dec
->probs
);
375 if (pic
->picture_parameter
.pic_fields
.segmentation_enabled
) {
376 for (i
= 0; i
< 8; ++i
) {
377 prbs
->seg
.feature_data
[i
] =
378 (pic
->slice_parameter
.seg_param
[i
].alt_quant
& 0xffff) |
379 ((pic
->slice_parameter
.seg_param
[i
].alt_lf
& 0xff) << 16) |
380 ((pic
->slice_parameter
.seg_param
[i
].segment_flags
.segment_reference
& 0xf) << 24);
381 prbs
->seg
.feature_mask
[i
] =
382 (pic
->slice_parameter
.seg_param
[i
].alt_quant_enabled
<< 0) |
383 (pic
->slice_parameter
.seg_param
[i
].alt_lf_enabled
<< 1) |
384 (pic
->slice_parameter
.seg_param
[i
].segment_flags
.segment_reference_enabled
<< 2) |
385 (pic
->slice_parameter
.seg_param
[i
].segment_flags
.segment_reference_skipped
<< 3);
388 for (i
= 0; i
< 7; ++i
)
389 prbs
->seg
.tree_probs
[i
] = pic
->picture_parameter
.mb_segment_tree_probs
[i
];
391 for (i
= 0; i
< 3; ++i
)
392 prbs
->seg
.pred_probs
[i
] = pic
->picture_parameter
.segment_pred_probs
[i
];
394 prbs
->seg
.abs_delta
= 0;
396 memset(&prbs
->seg
, 0, 256);
398 result
.frame_header_flags
=
399 (pic
->picture_parameter
.pic_fields
.frame_type
<<
400 RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT
) &
401 RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK
;
403 result
.frame_header_flags
|=
404 (pic
->picture_parameter
.pic_fields
.error_resilient_mode
<<
405 RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT
) &
406 RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK
;
408 result
.frame_header_flags
|=
409 (pic
->picture_parameter
.pic_fields
.intra_only
<<
410 RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT
) &
411 RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK
;
413 result
.frame_header_flags
|=
414 (pic
->picture_parameter
.pic_fields
.allow_high_precision_mv
<<
415 RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT
) &
416 RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK
;
418 result
.frame_header_flags
|=
419 (pic
->picture_parameter
.pic_fields
.frame_parallel_decoding_mode
<<
420 RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT
) &
421 RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK
;
423 result
.frame_header_flags
|=
424 (pic
->picture_parameter
.pic_fields
.refresh_frame_context
<<
425 RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT
) &
426 RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK
;
428 result
.frame_header_flags
|=
429 (pic
->picture_parameter
.pic_fields
.segmentation_enabled
<<
430 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT
) &
431 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK
;
433 result
.frame_header_flags
|=
434 (pic
->picture_parameter
.pic_fields
.segmentation_update_map
<<
435 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT
) &
436 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK
;
438 result
.frame_header_flags
|=
439 (pic
->picture_parameter
.pic_fields
.segmentation_temporal_update
<<
440 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT
) &
441 RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK
;
443 result
.frame_header_flags
|=
444 (pic
->picture_parameter
.mode_ref_delta_enabled
<<
445 RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT
) &
446 RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK
;
448 result
.frame_header_flags
|=
449 (pic
->picture_parameter
.mode_ref_delta_update
<<
450 RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT
) &
451 RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK
;
453 result
.frame_header_flags
|= ((dec
->show_frame
&&
454 !pic
->picture_parameter
.pic_fields
.error_resilient_mode
)
455 << RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT
) &
456 RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK
;
457 dec
->show_frame
= pic
->picture_parameter
.pic_fields
.show_frame
;
459 result
.interp_filter
= pic
->picture_parameter
.pic_fields
.mcomp_filter_type
;
461 result
.frame_context_idx
= pic
->picture_parameter
.pic_fields
.frame_context_idx
;
462 result
.reset_frame_context
= pic
->picture_parameter
.pic_fields
.reset_frame_context
;
464 result
.filter_level
= pic
->picture_parameter
.filter_level
;
465 result
.sharpness_level
= pic
->picture_parameter
.sharpness_level
;
467 for (i
= 0; i
< 8; ++i
)
468 memcpy(result
.lf_adj_level
[i
], pic
->slice_parameter
.seg_param
[i
].filter_level
, 4 * 2);
470 if (pic
->picture_parameter
.pic_fields
.lossless_flag
) {
471 result
.base_qindex
= 0;
472 result
.y_dc_delta_q
= 0;
473 result
.uv_ac_delta_q
= 0;
474 result
.uv_dc_delta_q
= 0;
476 result
.base_qindex
= pic
->picture_parameter
.base_qindex
;
477 result
.y_dc_delta_q
= pic
->picture_parameter
.y_dc_delta_q
;
478 result
.uv_ac_delta_q
= pic
->picture_parameter
.uv_ac_delta_q
;
479 result
.uv_dc_delta_q
= pic
->picture_parameter
.uv_dc_delta_q
;
482 result
.log2_tile_cols
= pic
->picture_parameter
.log2_tile_columns
;
483 result
.log2_tile_rows
= pic
->picture_parameter
.log2_tile_rows
;
484 result
.chroma_format
= 1;
485 result
.bit_depth_luma_minus8
= result
.bit_depth_chroma_minus8
486 = (pic
->picture_parameter
.bit_depth
- 8);
488 result
.vp9_frame_size
= align(dec
->bs_size
, 128);
489 result
.uncompressed_header_size
= pic
->picture_parameter
.frame_header_length_in_bytes
;
490 result
.compressed_header_size
= pic
->picture_parameter
.first_partition_size
;
492 assert(dec
->base
.max_references
+ 1 <= 16);
494 for (i
= 0 ; i
< 16 ; ++i
) {
495 if (dec
->render_pic_list
[i
] && dec
->render_pic_list
[i
] == target
) {
496 result
.curr_pic_idx
=
497 (uintptr_t)vl_video_buffer_get_associated_data(target
, &dec
->base
);
499 } else if (!dec
->render_pic_list
[i
]) {
500 dec
->render_pic_list
[i
] = target
;
501 result
.curr_pic_idx
= dec
->ref_idx
;
502 vl_video_buffer_set_associated_data(target
, &dec
->base
,
503 (void *)(uintptr_t)dec
->ref_idx
++,
504 &radeon_dec_destroy_associated_data
);
509 for (i
= 0 ; i
< 8; i
++) {
510 result
.ref_frame_map
[i
] = (pic
->ref
[i
]) ?
511 (uintptr_t)vl_video_buffer_get_associated_data(pic
->ref
[i
], &dec
->base
) :
515 result
.frame_refs
[0] = result
.ref_frame_map
[pic
->picture_parameter
.pic_fields
.last_ref_frame
];
516 result
.ref_frame_sign_bias
[0] = pic
->picture_parameter
.pic_fields
.last_ref_frame_sign_bias
;
517 result
.frame_refs
[1] = result
.ref_frame_map
[pic
->picture_parameter
.pic_fields
.golden_ref_frame
];
518 result
.ref_frame_sign_bias
[1] = pic
->picture_parameter
.pic_fields
.golden_ref_frame_sign_bias
;
519 result
.frame_refs
[2] = result
.ref_frame_map
[pic
->picture_parameter
.pic_fields
.alt_ref_frame
];
520 result
.ref_frame_sign_bias
[2] = pic
->picture_parameter
.pic_fields
.alt_ref_frame_sign_bias
;
522 if (pic
->base
.profile
== PIPE_VIDEO_PROFILE_VP9_PROFILE2
) {
523 if (target
->buffer_format
== PIPE_FORMAT_P016
) {
524 result
.p010_mode
= 1;
527 result
.p010_mode
= 0;
528 result
.luma_10to8
= 1;
529 result
.chroma_10to8
= 1;
536 static unsigned calc_ctx_size_h265_main(struct radeon_decoder
*dec
)
538 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
539 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
541 unsigned max_references
= dec
->base
.max_references
+ 1;
543 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
544 max_references
= MAX2(max_references
, 8);
546 max_references
= MAX2(max_references
, 17);
548 width
= align (width
, 16);
549 height
= align (height
, 16);
550 return ((width
+ 255) / 16) * ((height
+ 255) / 16) * 16 * max_references
+ 52 * 1024;
553 static unsigned calc_ctx_size_h265_main10(struct radeon_decoder
*dec
, struct pipe_h265_picture_desc
*pic
)
555 unsigned log2_ctb_size
, width_in_ctb
, height_in_ctb
, num_16x16_block_per_ctb
;
556 unsigned context_buffer_size_per_ctb_row
, cm_buffer_size
, max_mb_address
, db_left_tile_pxl_size
;
557 unsigned db_left_tile_ctx_size
= 4096 / 16 * (32 + 16 * 4);
559 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
560 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
561 unsigned coeff_10bit
= (pic
->pps
->sps
->bit_depth_luma_minus8
||
562 pic
->pps
->sps
->bit_depth_chroma_minus8
) ? 2 : 1;
564 unsigned max_references
= dec
->base
.max_references
+ 1;
566 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
567 max_references
= MAX2(max_references
, 8);
569 max_references
= MAX2(max_references
, 17);
571 log2_ctb_size
= pic
->pps
->sps
->log2_min_luma_coding_block_size_minus3
+ 3 +
572 pic
->pps
->sps
->log2_diff_max_min_luma_coding_block_size
;
574 width_in_ctb
= (width
+ ((1 << log2_ctb_size
) - 1)) >> log2_ctb_size
;
575 height_in_ctb
= (height
+ ((1 << log2_ctb_size
) - 1)) >> log2_ctb_size
;
577 num_16x16_block_per_ctb
= ((1 << log2_ctb_size
) >> 4) * ((1 << log2_ctb_size
) >> 4);
578 context_buffer_size_per_ctb_row
= align(width_in_ctb
* num_16x16_block_per_ctb
* 16, 256);
579 max_mb_address
= (unsigned) ceil(height
* 8 / 2048.0);
581 cm_buffer_size
= max_references
* context_buffer_size_per_ctb_row
* height_in_ctb
;
582 db_left_tile_pxl_size
= coeff_10bit
* (max_mb_address
* 2 * 2048 + 1024);
584 return cm_buffer_size
+ db_left_tile_ctx_size
+ db_left_tile_pxl_size
;
587 static rvcn_dec_message_vc1_t
get_vc1_msg(struct pipe_vc1_picture_desc
*pic
)
589 rvcn_dec_message_vc1_t result
;
591 memset(&result
, 0, sizeof(result
));
592 switch(pic
->base
.profile
) {
593 case PIPE_VIDEO_PROFILE_VC1_SIMPLE
:
594 result
.profile
= RDECODE_VC1_PROFILE_SIMPLE
;
598 case PIPE_VIDEO_PROFILE_VC1_MAIN
:
599 result
.profile
= RDECODE_VC1_PROFILE_MAIN
;
603 case PIPE_VIDEO_PROFILE_VC1_ADVANCED
:
604 result
.profile
= RDECODE_VC1_PROFILE_ADVANCED
;
612 result
.sps_info_flags
|= pic
->postprocflag
<< 7;
613 result
.sps_info_flags
|= pic
->pulldown
<< 6;
614 result
.sps_info_flags
|= pic
->interlace
<< 5;
615 result
.sps_info_flags
|= pic
->tfcntrflag
<< 4;
616 result
.sps_info_flags
|= pic
->finterpflag
<< 3;
617 result
.sps_info_flags
|= pic
->psf
<< 1;
619 result
.pps_info_flags
|= pic
->range_mapy_flag
<< 31;
620 result
.pps_info_flags
|= pic
->range_mapy
<< 28;
621 result
.pps_info_flags
|= pic
->range_mapuv_flag
<< 27;
622 result
.pps_info_flags
|= pic
->range_mapuv
<< 24;
623 result
.pps_info_flags
|= pic
->multires
<< 21;
624 result
.pps_info_flags
|= pic
->maxbframes
<< 16;
625 result
.pps_info_flags
|= pic
->overlap
<< 11;
626 result
.pps_info_flags
|= pic
->quantizer
<< 9;
627 result
.pps_info_flags
|= pic
->panscan_flag
<< 7;
628 result
.pps_info_flags
|= pic
->refdist_flag
<< 6;
629 result
.pps_info_flags
|= pic
->vstransform
<< 0;
631 if (pic
->base
.profile
!= PIPE_VIDEO_PROFILE_VC1_SIMPLE
) {
632 result
.pps_info_flags
|= pic
->syncmarker
<< 20;
633 result
.pps_info_flags
|= pic
->rangered
<< 19;
634 result
.pps_info_flags
|= pic
->loopfilter
<< 5;
635 result
.pps_info_flags
|= pic
->fastuvmc
<< 4;
636 result
.pps_info_flags
|= pic
->extended_mv
<< 3;
637 result
.pps_info_flags
|= pic
->extended_dmv
<< 8;
638 result
.pps_info_flags
|= pic
->dquant
<< 1;
641 result
.chroma_format
= 1;
646 static uint32_t get_ref_pic_idx(struct radeon_decoder
*dec
, struct pipe_video_buffer
*ref
)
648 uint32_t min
= MAX2(dec
->frame_number
, NUM_MPEG2_REFS
) - NUM_MPEG2_REFS
;
649 uint32_t max
= MAX2(dec
->frame_number
, 1) - 1;
652 /* seems to be the most sane fallback */
656 /* get the frame number from the associated data */
657 frame
= (uintptr_t)vl_video_buffer_get_associated_data(ref
, &dec
->base
);
659 /* limit the frame number to a valid range */
660 return MAX2(MIN2(frame
, max
), min
);
663 static rvcn_dec_message_mpeg2_vld_t
get_mpeg2_msg(struct radeon_decoder
*dec
,
664 struct pipe_mpeg12_picture_desc
*pic
)
666 const int *zscan
= pic
->alternate_scan
? vl_zscan_alternate
: vl_zscan_normal
;
667 rvcn_dec_message_mpeg2_vld_t result
;
670 memset(&result
, 0, sizeof(result
));
671 result
.decoded_pic_idx
= dec
->frame_number
;
673 result
.forward_ref_pic_idx
= get_ref_pic_idx(dec
, pic
->ref
[0]);
674 result
.backward_ref_pic_idx
= get_ref_pic_idx(dec
, pic
->ref
[1]);
676 if(pic
->intra_matrix
) {
677 result
.load_intra_quantiser_matrix
= 1;
678 for (i
= 0; i
< 64; ++i
) {
679 result
.intra_quantiser_matrix
[i
] = pic
->intra_matrix
[zscan
[i
]];
682 if(pic
->non_intra_matrix
) {
683 result
.load_nonintra_quantiser_matrix
= 1;
684 for (i
= 0; i
< 64; ++i
) {
685 result
.nonintra_quantiser_matrix
[i
] = pic
->non_intra_matrix
[zscan
[i
]];
689 result
.profile_and_level_indication
= 0;
690 result
.chroma_format
= 0x1;
692 result
.picture_coding_type
= pic
->picture_coding_type
;
693 result
.f_code
[0][0] = pic
->f_code
[0][0] + 1;
694 result
.f_code
[0][1] = pic
->f_code
[0][1] + 1;
695 result
.f_code
[1][0] = pic
->f_code
[1][0] + 1;
696 result
.f_code
[1][1] = pic
->f_code
[1][1] + 1;
697 result
.intra_dc_precision
= pic
->intra_dc_precision
;
698 result
.pic_structure
= pic
->picture_structure
;
699 result
.top_field_first
= pic
->top_field_first
;
700 result
.frame_pred_frame_dct
= pic
->frame_pred_frame_dct
;
701 result
.concealment_motion_vectors
= pic
->concealment_motion_vectors
;
702 result
.q_scale_type
= pic
->q_scale_type
;
703 result
.intra_vlc_format
= pic
->intra_vlc_format
;
704 result
.alternate_scan
= pic
->alternate_scan
;
709 static rvcn_dec_message_mpeg4_asp_vld_t
get_mpeg4_msg(struct radeon_decoder
*dec
,
710 struct pipe_mpeg4_picture_desc
*pic
)
712 rvcn_dec_message_mpeg4_asp_vld_t result
;
715 memset(&result
, 0, sizeof(result
));
716 result
.decoded_pic_idx
= dec
->frame_number
;
718 result
.forward_ref_pic_idx
= get_ref_pic_idx(dec
, pic
->ref
[0]);
719 result
.backward_ref_pic_idx
= get_ref_pic_idx(dec
, pic
->ref
[1]);
721 result
.variant_type
= 0;
722 result
.profile_and_level_indication
= 0xF0;
724 result
.video_object_layer_verid
= 0x5;
725 result
.video_object_layer_shape
= 0x0;
727 result
.video_object_layer_width
= dec
->base
.width
;
728 result
.video_object_layer_height
= dec
->base
.height
;
730 result
.vop_time_increment_resolution
= pic
->vop_time_increment_resolution
;
732 result
.short_video_header
= pic
->short_video_header
;
733 result
.interlaced
= pic
->interlaced
;
734 result
.load_intra_quant_mat
= 1;
735 result
.load_nonintra_quant_mat
= 1;
736 result
.quarter_sample
= pic
->quarter_sample
;
737 result
.complexity_estimation_disable
= 1;
738 result
.resync_marker_disable
= pic
->resync_marker_disable
;
739 result
.newpred_enable
= 0;
740 result
.reduced_resolution_vop_enable
= 0;
742 result
.quant_type
= pic
->quant_type
;
744 for (i
= 0; i
< 64; ++i
) {
745 result
.intra_quant_mat
[i
] = pic
->intra_matrix
[vl_zscan_normal
[i
]];
746 result
.nonintra_quant_mat
[i
] = pic
->non_intra_matrix
[vl_zscan_normal
[i
]];
752 static void rvcn_dec_message_create(struct radeon_decoder
*dec
)
754 rvcn_dec_message_header_t
*header
= dec
->msg
;
755 rvcn_dec_message_create_t
*create
= dec
->msg
+ sizeof(rvcn_dec_message_header_t
);
756 unsigned sizes
= sizeof(rvcn_dec_message_header_t
) + sizeof(rvcn_dec_message_create_t
);
758 memset(dec
->msg
, 0, sizes
);
759 header
->header_size
= sizeof(rvcn_dec_message_header_t
);
760 header
->total_size
= sizes
;
761 header
->num_buffers
= 1;
762 header
->msg_type
= RDECODE_MSG_CREATE
;
763 header
->stream_handle
= dec
->stream_handle
;
764 header
->status_report_feedback_number
= 0;
766 header
->index
[0].message_id
= RDECODE_MESSAGE_CREATE
;
767 header
->index
[0].offset
= sizeof(rvcn_dec_message_header_t
);
768 header
->index
[0].size
= sizeof(rvcn_dec_message_create_t
);
769 header
->index
[0].filled
= 0;
771 create
->stream_type
= dec
->stream_type
;
772 create
->session_flags
= 0;
773 create
->width_in_samples
= dec
->base
.width
;
774 create
->height_in_samples
= dec
->base
.height
;
777 static struct pb_buffer
*rvcn_dec_message_decode(struct radeon_decoder
*dec
,
778 struct pipe_video_buffer
*target
,
779 struct pipe_picture_desc
*picture
)
781 struct si_texture
*luma
= (struct si_texture
*)
782 ((struct vl_video_buffer
*)target
)->resources
[0];
783 struct si_texture
*chroma
= (struct si_texture
*)
784 ((struct vl_video_buffer
*)target
)->resources
[1];
785 rvcn_dec_message_header_t
*header
;
786 rvcn_dec_message_index_t
*index
;
787 rvcn_dec_message_decode_t
*decode
;
788 unsigned sizes
= 0, offset_decode
, offset_codec
;
792 sizes
+= sizeof(rvcn_dec_message_header_t
);
793 index
= (void*)header
+ sizeof(rvcn_dec_message_header_t
);
794 sizes
+= sizeof(rvcn_dec_message_index_t
);
795 offset_decode
= sizes
;
796 decode
= (void*)index
+ sizeof(rvcn_dec_message_index_t
);
797 sizes
+= sizeof(rvcn_dec_message_decode_t
);
798 offset_codec
= sizes
;
799 codec
= (void*)decode
+ sizeof(rvcn_dec_message_decode_t
);
801 memset(dec
->msg
, 0, sizes
);
802 header
->header_size
= sizeof(rvcn_dec_message_header_t
);
803 header
->total_size
= sizes
;
804 header
->num_buffers
= 2;
805 header
->msg_type
= RDECODE_MSG_DECODE
;
806 header
->stream_handle
= dec
->stream_handle
;
807 header
->status_report_feedback_number
= dec
->frame_number
;
809 header
->index
[0].message_id
= RDECODE_MESSAGE_DECODE
;
810 header
->index
[0].offset
= offset_decode
;
811 header
->index
[0].size
= sizeof(rvcn_dec_message_decode_t
);
812 header
->index
[0].filled
= 0;
814 index
->offset
= offset_codec
;
815 index
->size
= sizeof(rvcn_dec_message_avc_t
);
818 decode
->stream_type
= dec
->stream_type
;
819 decode
->decode_flags
= 0x1;
820 decode
->width_in_samples
= dec
->base
.width
;
821 decode
->height_in_samples
= dec
->base
.height
;
823 decode
->bsd_size
= align(dec
->bs_size
, 128);
824 decode
->dpb_size
= dec
->dpb
.res
->buf
->size
;
826 si_resource(((struct vl_video_buffer
*)target
)->resources
[0])->buf
->size
+
827 si_resource(((struct vl_video_buffer
*)target
)->resources
[1])->buf
->size
;
829 decode
->sct_size
= 0;
830 decode
->sc_coeff_size
= 0;
832 decode
->sw_ctxt_size
= RDECODE_SESSION_CONTEXT_SIZE
;
833 decode
->db_pitch
= align(dec
->base
.width
, 32);
834 decode
->db_surf_tile_config
= 0;
836 decode
->dt_pitch
= luma
->surface
.u
.gfx9
.surf_pitch
* luma
->surface
.blk_w
;
837 decode
->dt_uv_pitch
= decode
->dt_pitch
/ 2;
839 decode
->dt_tiling_mode
= 0;
840 decode
->dt_swizzle_mode
= RDECODE_SW_MODE_LINEAR
;
841 decode
->dt_array_mode
= RDECODE_ARRAY_MODE_LINEAR
;
842 decode
->dt_field_mode
= ((struct vl_video_buffer
*)target
)->base
.interlaced
;
843 decode
->dt_surf_tile_config
= 0;
844 decode
->dt_uv_surf_tile_config
= 0;
846 decode
->dt_luma_top_offset
= luma
->surface
.u
.gfx9
.surf_offset
;
847 decode
->dt_chroma_top_offset
= chroma
->surface
.u
.gfx9
.surf_offset
;
848 if (decode
->dt_field_mode
) {
849 decode
->dt_luma_bottom_offset
= luma
->surface
.u
.gfx9
.surf_offset
+
850 luma
->surface
.u
.gfx9
.surf_slice_size
;
851 decode
->dt_chroma_bottom_offset
= chroma
->surface
.u
.gfx9
.surf_offset
+
852 chroma
->surface
.u
.gfx9
.surf_slice_size
;
854 decode
->dt_luma_bottom_offset
= decode
->dt_luma_top_offset
;
855 decode
->dt_chroma_bottom_offset
= decode
->dt_chroma_top_offset
;
858 switch (u_reduce_video_profile(picture
->profile
)) {
859 case PIPE_VIDEO_FORMAT_MPEG4_AVC
: {
860 rvcn_dec_message_avc_t avc
=
861 get_h264_msg(dec
, (struct pipe_h264_picture_desc
*)picture
);
862 memcpy(codec
, (void*)&avc
, sizeof(rvcn_dec_message_avc_t
));
863 index
->message_id
= RDECODE_MESSAGE_AVC
;
866 case PIPE_VIDEO_FORMAT_HEVC
: {
867 rvcn_dec_message_hevc_t hevc
=
868 get_h265_msg(dec
, target
, (struct pipe_h265_picture_desc
*)picture
);
870 memcpy(codec
, (void*)&hevc
, sizeof(rvcn_dec_message_hevc_t
));
871 index
->message_id
= RDECODE_MESSAGE_HEVC
;
872 if (dec
->ctx
.res
== NULL
) {
874 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
)
875 ctx_size
= calc_ctx_size_h265_main10(dec
,
876 (struct pipe_h265_picture_desc
*)picture
);
878 ctx_size
= calc_ctx_size_h265_main(dec
);
879 if (!si_vid_create_buffer(dec
->screen
, &dec
->ctx
, ctx_size
, PIPE_USAGE_DEFAULT
))
880 RVID_ERR("Can't allocated context buffer.\n");
881 si_vid_clear_buffer(dec
->base
.context
, &dec
->ctx
);
885 case PIPE_VIDEO_FORMAT_VC1
: {
886 rvcn_dec_message_vc1_t vc1
= get_vc1_msg((struct pipe_vc1_picture_desc
*)picture
);
888 memcpy(codec
, (void*)&vc1
, sizeof(rvcn_dec_message_vc1_t
));
889 if ((picture
->profile
== PIPE_VIDEO_PROFILE_VC1_SIMPLE
) ||
890 (picture
->profile
== PIPE_VIDEO_PROFILE_VC1_MAIN
)) {
891 decode
->width_in_samples
= align(decode
->width_in_samples
, 16) / 16;
892 decode
->height_in_samples
= align(decode
->height_in_samples
, 16) / 16;
894 index
->message_id
= RDECODE_MESSAGE_VC1
;
898 case PIPE_VIDEO_FORMAT_MPEG12
: {
899 rvcn_dec_message_mpeg2_vld_t mpeg2
=
900 get_mpeg2_msg(dec
, (struct pipe_mpeg12_picture_desc
*)picture
);
902 memcpy(codec
, (void*)&mpeg2
, sizeof(rvcn_dec_message_mpeg2_vld_t
));
903 index
->message_id
= RDECODE_MESSAGE_MPEG2_VLD
;
906 case PIPE_VIDEO_FORMAT_MPEG4
: {
907 rvcn_dec_message_mpeg4_asp_vld_t mpeg4
=
908 get_mpeg4_msg(dec
, (struct pipe_mpeg4_picture_desc
*)picture
);
910 memcpy(codec
, (void*)&mpeg4
, sizeof(rvcn_dec_message_mpeg4_asp_vld_t
));
911 index
->message_id
= RDECODE_MESSAGE_MPEG4_ASP_VLD
;
914 case PIPE_VIDEO_FORMAT_VP9
: {
915 rvcn_dec_message_vp9_t vp9
=
916 get_vp9_msg(dec
, target
, (struct pipe_vp9_picture_desc
*)picture
);
918 memcpy(codec
, (void*)&vp9
, sizeof(rvcn_dec_message_vp9_t
));
919 index
->message_id
= RDECODE_MESSAGE_VP9
;
921 if (dec
->ctx
.res
== NULL
) {
925 /* default probability + probability data */
928 /* SRE collocated context data */
929 ctx_size
+= 32 * 2 * 64 * 64;
931 /* SMP collocated context data */
932 ctx_size
+= 9 * 64 * 2 * 64 * 64;
934 /* SDB left tile pixel */
935 ctx_size
+= 8 * 2 * 4096;
937 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_VP9_PROFILE2
)
938 ctx_size
+= 8 * 2 * 4096;
940 if (!si_vid_create_buffer(dec
->screen
, &dec
->ctx
, ctx_size
, PIPE_USAGE_DEFAULT
))
941 RVID_ERR("Can't allocated context buffer.\n");
942 si_vid_clear_buffer(dec
->base
.context
, &dec
->ctx
);
944 /* ctx needs probs table */
945 ptr
= dec
->ws
->buffer_map(
946 dec
->ctx
.res
->buf
, dec
->cs
,
947 PIPE_TRANSFER_WRITE
| RADEON_TRANSFER_TEMPORARY
);
948 fill_probs_table(ptr
);
949 dec
->ws
->buffer_unmap(dec
->ctx
.res
->buf
);
959 decode
->hw_ctxt_size
= dec
->ctx
.res
->buf
->size
;
961 return luma
->buffer
.buf
;
964 static void rvcn_dec_message_destroy(struct radeon_decoder
*dec
)
966 rvcn_dec_message_header_t
*header
= dec
->msg
;
968 memset(dec
->msg
, 0, sizeof(rvcn_dec_message_header_t
));
969 header
->header_size
= sizeof(rvcn_dec_message_header_t
);
970 header
->total_size
= sizeof(rvcn_dec_message_header_t
) -
971 sizeof(rvcn_dec_message_index_t
);
972 header
->num_buffers
= 0;
973 header
->msg_type
= RDECODE_MSG_DESTROY
;
974 header
->stream_handle
= dec
->stream_handle
;
975 header
->status_report_feedback_number
= 0;
978 static void rvcn_dec_message_feedback(struct radeon_decoder
*dec
)
980 rvcn_dec_feedback_header_t
*header
= (void*)dec
->fb
;
982 header
->header_size
= sizeof(rvcn_dec_feedback_header_t
);
983 header
->total_size
= sizeof(rvcn_dec_feedback_header_t
);
984 header
->num_buffers
= 0;
987 /* flush IB to the hardware */
988 static int flush(struct radeon_decoder
*dec
, unsigned flags
)
990 return dec
->ws
->cs_flush(dec
->cs
, flags
, NULL
);
993 /* add a new set register command to the IB */
994 static void set_reg(struct radeon_decoder
*dec
, unsigned reg
, uint32_t val
)
996 radeon_emit(dec
->cs
, RDECODE_PKT0(reg
>> 2, 0));
997 radeon_emit(dec
->cs
, val
);
1000 /* send a command to the VCPU through the GPCOM registers */
1001 static void send_cmd(struct radeon_decoder
*dec
, unsigned cmd
,
1002 struct pb_buffer
* buf
, uint32_t off
,
1003 enum radeon_bo_usage usage
, enum radeon_bo_domain domain
)
1007 dec
->ws
->cs_add_buffer(dec
->cs
, buf
, usage
| RADEON_USAGE_SYNCHRONIZED
,
1009 addr
= dec
->ws
->buffer_get_virtual_address(buf
);
1012 set_reg(dec
, RDECODE_GPCOM_VCPU_DATA0
, addr
);
1013 set_reg(dec
, RDECODE_GPCOM_VCPU_DATA1
, addr
>> 32);
1014 set_reg(dec
, RDECODE_GPCOM_VCPU_CMD
, cmd
<< 1);
1017 /* do the codec needs an IT buffer ?*/
1018 static bool have_it(struct radeon_decoder
*dec
)
1020 return dec
->stream_type
== RDECODE_CODEC_H264_PERF
||
1021 dec
->stream_type
== RDECODE_CODEC_H265
;
1024 /* do the codec needs an probs buffer? */
1025 static bool have_probs(struct radeon_decoder
*dec
)
1027 return dec
->stream_type
== RDECODE_CODEC_VP9
;
1030 /* map the next available message/feedback/itscaling buffer */
1031 static void map_msg_fb_it_probs_buf(struct radeon_decoder
*dec
)
1033 struct rvid_buffer
* buf
;
1036 /* grab the current message/feedback buffer */
1037 buf
= &dec
->msg_fb_it_probs_buffers
[dec
->cur_buffer
];
1039 /* and map it for CPU access */
1040 ptr
= dec
->ws
->buffer_map(buf
->res
->buf
, dec
->cs
,
1041 PIPE_TRANSFER_WRITE
| RADEON_TRANSFER_TEMPORARY
);
1043 /* calc buffer offsets */
1046 dec
->fb
= (uint32_t *)(ptr
+ FB_BUFFER_OFFSET
);
1048 dec
->it
= (uint8_t *)(ptr
+ FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
);
1049 else if (have_probs(dec
))
1050 dec
->probs
= (uint8_t *)(ptr
+ FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
);
1053 /* unmap and send a message command to the VCPU */
1054 static void send_msg_buf(struct radeon_decoder
*dec
)
1056 struct rvid_buffer
* buf
;
1058 /* ignore the request if message/feedback buffer isn't mapped */
1059 if (!dec
->msg
|| !dec
->fb
)
1062 /* grab the current message buffer */
1063 buf
= &dec
->msg_fb_it_probs_buffers
[dec
->cur_buffer
];
1065 /* unmap the buffer */
1066 dec
->ws
->buffer_unmap(buf
->res
->buf
);
1072 if (dec
->sessionctx
.res
)
1073 send_cmd(dec
, RDECODE_CMD_SESSION_CONTEXT_BUFFER
,
1074 dec
->sessionctx
.res
->buf
, 0, RADEON_USAGE_READWRITE
,
1075 RADEON_DOMAIN_VRAM
);
1077 /* and send it to the hardware */
1078 send_cmd(dec
, RDECODE_CMD_MSG_BUFFER
, buf
->res
->buf
, 0,
1079 RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1082 /* cycle to the next set of buffers */
1083 static void next_buffer(struct radeon_decoder
*dec
)
1086 dec
->cur_buffer
%= NUM_BUFFERS
;
1089 static unsigned calc_ctx_size_h264_perf(struct radeon_decoder
*dec
)
1091 unsigned width_in_mb
, height_in_mb
, ctx_size
;
1092 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
1093 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
1095 unsigned max_references
= dec
->base
.max_references
+ 1;
1097 // picture width & height in 16 pixel units
1098 width_in_mb
= width
/ VL_MACROBLOCK_WIDTH
;
1099 height_in_mb
= align(height
/ VL_MACROBLOCK_HEIGHT
, 2);
1101 unsigned fs_in_mb
= width_in_mb
* height_in_mb
;
1102 unsigned num_dpb_buffer
;
1103 switch(dec
->base
.level
) {
1105 num_dpb_buffer
= 8100 / fs_in_mb
;
1108 num_dpb_buffer
= 18000 / fs_in_mb
;
1111 num_dpb_buffer
= 20480 / fs_in_mb
;
1114 num_dpb_buffer
= 32768 / fs_in_mb
;
1117 num_dpb_buffer
= 34816 / fs_in_mb
;
1120 num_dpb_buffer
= 110400 / fs_in_mb
;
1123 num_dpb_buffer
= 184320 / fs_in_mb
;
1126 num_dpb_buffer
= 184320 / fs_in_mb
;
1130 max_references
= MAX2(MIN2(NUM_H264_REFS
, num_dpb_buffer
), max_references
);
1131 ctx_size
= max_references
* align(width_in_mb
* height_in_mb
* 192, 256);
1136 /* calculate size of reference picture buffer */
1137 static unsigned calc_dpb_size(struct radeon_decoder
*dec
)
1139 unsigned width_in_mb
, height_in_mb
, image_size
, dpb_size
;
1141 // always align them to MB size for dpb calculation
1142 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
1143 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
1145 // always one more for currently decoded picture
1146 unsigned max_references
= dec
->base
.max_references
+ 1;
1148 // aligned size of a single frame
1149 image_size
= align(width
, 32) * height
;
1150 image_size
+= image_size
/ 2;
1151 image_size
= align(image_size
, 1024);
1153 // picture width & height in 16 pixel units
1154 width_in_mb
= width
/ VL_MACROBLOCK_WIDTH
;
1155 height_in_mb
= align(height
/ VL_MACROBLOCK_HEIGHT
, 2);
1157 switch (u_reduce_video_profile(dec
->base
.profile
)) {
1158 case PIPE_VIDEO_FORMAT_MPEG4_AVC
: {
1159 unsigned fs_in_mb
= width_in_mb
* height_in_mb
;
1160 unsigned num_dpb_buffer
;
1162 switch(dec
->base
.level
) {
1164 num_dpb_buffer
= 8100 / fs_in_mb
;
1167 num_dpb_buffer
= 18000 / fs_in_mb
;
1170 num_dpb_buffer
= 20480 / fs_in_mb
;
1173 num_dpb_buffer
= 32768 / fs_in_mb
;
1176 num_dpb_buffer
= 34816 / fs_in_mb
;
1179 num_dpb_buffer
= 110400 / fs_in_mb
;
1182 num_dpb_buffer
= 184320 / fs_in_mb
;
1185 num_dpb_buffer
= 184320 / fs_in_mb
;
1189 max_references
= MAX2(MIN2(NUM_H264_REFS
, num_dpb_buffer
), max_references
);
1190 dpb_size
= image_size
* max_references
;
1194 case PIPE_VIDEO_FORMAT_HEVC
:
1195 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
1196 max_references
= MAX2(max_references
, 8);
1198 max_references
= MAX2(max_references
, 17);
1200 width
= align (width
, 16);
1201 height
= align (height
, 16);
1202 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
)
1203 dpb_size
= align((align(width
, 32) * height
* 9) / 4, 256) * max_references
;
1205 dpb_size
= align((align(width
, 32) * height
* 3) / 2, 256) * max_references
;
1208 case PIPE_VIDEO_FORMAT_VC1
:
1209 // the firmware seems to allways assume a minimum of ref frames
1210 max_references
= MAX2(NUM_VC1_REFS
, max_references
);
1212 // reference picture buffer
1213 dpb_size
= image_size
* max_references
;
1216 dpb_size
+= width_in_mb
* height_in_mb
* 128;
1218 // IT surface buffer
1219 dpb_size
+= width_in_mb
* 64;
1221 // DB surface buffer
1222 dpb_size
+= width_in_mb
* 128;
1225 dpb_size
+= align(MAX2(width_in_mb
, height_in_mb
) * 7 * 16, 64);
1228 case PIPE_VIDEO_FORMAT_MPEG12
:
1229 // reference picture buffer, must be big enough for all frames
1230 dpb_size
= image_size
* NUM_MPEG2_REFS
;
1233 case PIPE_VIDEO_FORMAT_MPEG4
:
1234 // reference picture buffer
1235 dpb_size
= image_size
* max_references
;
1238 dpb_size
+= width_in_mb
* height_in_mb
* 64;
1240 // IT surface buffer
1241 dpb_size
+= align(width_in_mb
* height_in_mb
* 32, 64);
1243 dpb_size
= MAX2(dpb_size
, 30 * 1024 * 1024);
1246 case PIPE_VIDEO_FORMAT_VP9
:
1247 max_references
= MAX2(max_references
, 9);
1249 dpb_size
= (4096 * 3000 * 3 / 2) * max_references
;
1250 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_VP9_PROFILE2
)
1251 dpb_size
*= (3 / 2);
1254 case PIPE_VIDEO_FORMAT_JPEG
:
1259 // something is missing here
1262 // at least use a sane default value
1263 dpb_size
= 32 * 1024 * 1024;
1270 * destroy this video decoder
1272 static void radeon_dec_destroy(struct pipe_video_codec
*decoder
)
1274 struct radeon_decoder
*dec
= (struct radeon_decoder
*)decoder
;
1279 map_msg_fb_it_probs_buf(dec
);
1280 rvcn_dec_message_destroy(dec
);
1285 dec
->ws
->cs_destroy(dec
->cs
);
1287 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1288 si_vid_destroy_buffer(&dec
->msg_fb_it_probs_buffers
[i
]);
1289 si_vid_destroy_buffer(&dec
->bs_buffers
[i
]);
1292 si_vid_destroy_buffer(&dec
->dpb
);
1293 si_vid_destroy_buffer(&dec
->ctx
);
1294 si_vid_destroy_buffer(&dec
->sessionctx
);
1300 * start decoding of a new frame
1302 static void radeon_dec_begin_frame(struct pipe_video_codec
*decoder
,
1303 struct pipe_video_buffer
*target
,
1304 struct pipe_picture_desc
*picture
)
1306 struct radeon_decoder
*dec
= (struct radeon_decoder
*)decoder
;
1311 frame
= ++dec
->frame_number
;
1312 if (dec
->stream_type
!= RDECODE_CODEC_VP9
)
1313 vl_video_buffer_set_associated_data(target
, decoder
, (void *)frame
,
1314 &radeon_dec_destroy_associated_data
);
1317 dec
->bs_ptr
= dec
->ws
->buffer_map(
1318 dec
->bs_buffers
[dec
->cur_buffer
].res
->buf
,
1319 dec
->cs
, PIPE_TRANSFER_WRITE
| RADEON_TRANSFER_TEMPORARY
);
1323 * decode a macroblock
1325 static void radeon_dec_decode_macroblock(struct pipe_video_codec
*decoder
,
1326 struct pipe_video_buffer
*target
,
1327 struct pipe_picture_desc
*picture
,
1328 const struct pipe_macroblock
*macroblocks
,
1329 unsigned num_macroblocks
)
1331 /* not supported (yet) */
1336 * decode a bitstream
1338 static void radeon_dec_decode_bitstream(struct pipe_video_codec
*decoder
,
1339 struct pipe_video_buffer
*target
,
1340 struct pipe_picture_desc
*picture
,
1341 unsigned num_buffers
,
1342 const void * const *buffers
,
1343 const unsigned *sizes
)
1345 struct radeon_decoder
*dec
= (struct radeon_decoder
*)decoder
;
1353 for (i
= 0; i
< num_buffers
; ++i
) {
1354 struct rvid_buffer
*buf
= &dec
->bs_buffers
[dec
->cur_buffer
];
1355 unsigned new_size
= dec
->bs_size
+ sizes
[i
];
1357 if (new_size
> buf
->res
->buf
->size
) {
1358 dec
->ws
->buffer_unmap(buf
->res
->buf
);
1359 if (!si_vid_resize_buffer(dec
->screen
, dec
->cs
, buf
, new_size
)) {
1360 RVID_ERR("Can't resize bitstream buffer!");
1364 dec
->bs_ptr
= dec
->ws
->buffer_map(
1365 buf
->res
->buf
, dec
->cs
,
1366 PIPE_TRANSFER_WRITE
| RADEON_TRANSFER_TEMPORARY
);
1370 dec
->bs_ptr
+= dec
->bs_size
;
1373 memcpy(dec
->bs_ptr
, buffers
[i
], sizes
[i
]);
1374 dec
->bs_size
+= sizes
[i
];
1375 dec
->bs_ptr
+= sizes
[i
];
1380 * send cmd for vcn dec
1382 void send_cmd_dec(struct radeon_decoder
*dec
,
1383 struct pipe_video_buffer
*target
,
1384 struct pipe_picture_desc
*picture
)
1386 struct pb_buffer
*dt
;
1387 struct rvid_buffer
*msg_fb_it_probs_buf
, *bs_buf
;
1389 msg_fb_it_probs_buf
= &dec
->msg_fb_it_probs_buffers
[dec
->cur_buffer
];
1390 bs_buf
= &dec
->bs_buffers
[dec
->cur_buffer
];
1392 memset(dec
->bs_ptr
, 0, align(dec
->bs_size
, 128) - dec
->bs_size
);
1393 dec
->ws
->buffer_unmap(bs_buf
->res
->buf
);
1395 map_msg_fb_it_probs_buf(dec
);
1396 dt
= rvcn_dec_message_decode(dec
, target
, picture
);
1397 rvcn_dec_message_feedback(dec
);
1400 send_cmd(dec
, RDECODE_CMD_DPB_BUFFER
, dec
->dpb
.res
->buf
, 0,
1401 RADEON_USAGE_READWRITE
, RADEON_DOMAIN_VRAM
);
1403 send_cmd(dec
, RDECODE_CMD_CONTEXT_BUFFER
, dec
->ctx
.res
->buf
, 0,
1404 RADEON_USAGE_READWRITE
, RADEON_DOMAIN_VRAM
);
1405 send_cmd(dec
, RDECODE_CMD_BITSTREAM_BUFFER
, bs_buf
->res
->buf
,
1406 0, RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1407 send_cmd(dec
, RDECODE_CMD_DECODING_TARGET_BUFFER
, dt
, 0,
1408 RADEON_USAGE_WRITE
, RADEON_DOMAIN_VRAM
);
1409 send_cmd(dec
, RDECODE_CMD_FEEDBACK_BUFFER
, msg_fb_it_probs_buf
->res
->buf
,
1410 FB_BUFFER_OFFSET
, RADEON_USAGE_WRITE
, RADEON_DOMAIN_GTT
);
1412 send_cmd(dec
, RDECODE_CMD_IT_SCALING_TABLE_BUFFER
, msg_fb_it_probs_buf
->res
->buf
,
1413 FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
, RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1414 else if (have_probs(dec
))
1415 send_cmd(dec
, RDECODE_CMD_PROB_TBL_BUFFER
, msg_fb_it_probs_buf
->res
->buf
,
1416 FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
, RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1417 set_reg(dec
, RDECODE_ENGINE_CNTL
, 1);
1421 * end decoding of the current frame
1423 static void radeon_dec_end_frame(struct pipe_video_codec
*decoder
,
1424 struct pipe_video_buffer
*target
,
1425 struct pipe_picture_desc
*picture
)
1427 struct radeon_decoder
*dec
= (struct radeon_decoder
*)decoder
;
1434 dec
->send_cmd(dec
, target
, picture
);
1436 flush(dec
, PIPE_FLUSH_ASYNC
);
1441 * flush any outstanding command buffers to the hardware
1443 static void radeon_dec_flush(struct pipe_video_codec
*decoder
)
1448 * create and HW decoder
1450 struct pipe_video_codec
*radeon_create_decoder(struct pipe_context
*context
,
1451 const struct pipe_video_codec
*templ
)
1453 struct si_context
*sctx
= (struct si_context
*)context
;
1454 struct radeon_winsys
*ws
= sctx
->ws
;
1455 unsigned width
= templ
->width
, height
= templ
->height
;
1456 unsigned dpb_size
, bs_buf_size
, stream_type
= 0, ring
= RING_VCN_DEC
;
1457 struct radeon_decoder
*dec
;
1460 switch(u_reduce_video_profile(templ
->profile
)) {
1461 case PIPE_VIDEO_FORMAT_MPEG12
:
1462 if (templ
->entrypoint
> PIPE_VIDEO_ENTRYPOINT_BITSTREAM
)
1463 return vl_create_mpeg12_decoder(context
, templ
);
1464 stream_type
= RDECODE_CODEC_MPEG2_VLD
;
1466 case PIPE_VIDEO_FORMAT_MPEG4
:
1467 width
= align(width
, VL_MACROBLOCK_WIDTH
);
1468 height
= align(height
, VL_MACROBLOCK_HEIGHT
);
1469 stream_type
= RDECODE_CODEC_MPEG4
;
1471 case PIPE_VIDEO_FORMAT_VC1
:
1472 stream_type
= RDECODE_CODEC_VC1
;
1474 case PIPE_VIDEO_FORMAT_MPEG4_AVC
:
1475 width
= align(width
, VL_MACROBLOCK_WIDTH
);
1476 height
= align(height
, VL_MACROBLOCK_HEIGHT
);
1477 stream_type
= RDECODE_CODEC_H264_PERF
;
1479 case PIPE_VIDEO_FORMAT_HEVC
:
1480 stream_type
= RDECODE_CODEC_H265
;
1482 case PIPE_VIDEO_FORMAT_VP9
:
1483 stream_type
= RDECODE_CODEC_VP9
;
1485 case PIPE_VIDEO_FORMAT_JPEG
:
1486 stream_type
= RDECODE_CODEC_JPEG
;
1487 ring
= RING_VCN_JPEG
;
1494 dec
= CALLOC_STRUCT(radeon_decoder
);
1500 dec
->base
.context
= context
;
1501 dec
->base
.width
= width
;
1502 dec
->base
.height
= height
;
1504 dec
->base
.destroy
= radeon_dec_destroy
;
1505 dec
->base
.begin_frame
= radeon_dec_begin_frame
;
1506 dec
->base
.decode_macroblock
= radeon_dec_decode_macroblock
;
1507 dec
->base
.decode_bitstream
= radeon_dec_decode_bitstream
;
1508 dec
->base
.end_frame
= radeon_dec_end_frame
;
1509 dec
->base
.flush
= radeon_dec_flush
;
1511 dec
->stream_type
= stream_type
;
1512 dec
->stream_handle
= si_vid_alloc_stream_handle();
1513 dec
->screen
= context
->screen
;
1515 dec
->cs
= ws
->cs_create(sctx
->ctx
, ring
, NULL
, NULL
, false);
1517 RVID_ERR("Can't get command submission context.\n");
1521 for (i
= 0; i
< 16; i
++)
1522 dec
->render_pic_list
[i
] = NULL
;
1523 bs_buf_size
= width
* height
* (512 / (16 * 16));
1524 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1525 unsigned msg_fb_it_probs_size
= FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
;
1527 msg_fb_it_probs_size
+= IT_SCALING_TABLE_SIZE
;
1528 else if (have_probs(dec
))
1529 msg_fb_it_probs_size
+= VP9_PROBS_TABLE_SIZE
;
1530 /* use vram to improve performance, workaround an unknown bug */
1531 if (!si_vid_create_buffer(dec
->screen
, &dec
->msg_fb_it_probs_buffers
[i
],
1532 msg_fb_it_probs_size
, PIPE_USAGE_DEFAULT
)) {
1533 RVID_ERR("Can't allocated message buffers.\n");
1537 if (!si_vid_create_buffer(dec
->screen
, &dec
->bs_buffers
[i
],
1538 bs_buf_size
, PIPE_USAGE_STAGING
)) {
1539 RVID_ERR("Can't allocated bitstream buffers.\n");
1543 si_vid_clear_buffer(context
, &dec
->msg_fb_it_probs_buffers
[i
]);
1544 si_vid_clear_buffer(context
, &dec
->bs_buffers
[i
]);
1546 if (have_probs(dec
)) {
1547 struct rvid_buffer
* buf
;
1550 buf
= &dec
->msg_fb_it_probs_buffers
[i
];
1551 ptr
= dec
->ws
->buffer_map(
1552 buf
->res
->buf
, dec
->cs
,
1553 PIPE_TRANSFER_WRITE
| RADEON_TRANSFER_TEMPORARY
);
1554 ptr
+= FB_BUFFER_OFFSET
+ FB_BUFFER_SIZE
;
1555 fill_probs_table(ptr
);
1556 dec
->ws
->buffer_unmap(buf
->res
->buf
);
1560 dpb_size
= calc_dpb_size(dec
);
1562 if (!si_vid_create_buffer(dec
->screen
, &dec
->dpb
, dpb_size
, PIPE_USAGE_DEFAULT
)) {
1563 RVID_ERR("Can't allocated dpb.\n");
1566 si_vid_clear_buffer(context
, &dec
->dpb
);
1569 if (dec
->stream_type
== RDECODE_CODEC_H264_PERF
) {
1570 unsigned ctx_size
= calc_ctx_size_h264_perf(dec
);
1571 if (!si_vid_create_buffer(dec
->screen
, &dec
->ctx
, ctx_size
, PIPE_USAGE_DEFAULT
)) {
1572 RVID_ERR("Can't allocated context buffer.\n");
1575 si_vid_clear_buffer(context
, &dec
->ctx
);
1578 if (!si_vid_create_buffer(dec
->screen
, &dec
->sessionctx
,
1579 RDECODE_SESSION_CONTEXT_SIZE
,
1580 PIPE_USAGE_DEFAULT
)) {
1581 RVID_ERR("Can't allocated session ctx.\n");
1584 si_vid_clear_buffer(context
, &dec
->sessionctx
);
1586 map_msg_fb_it_probs_buf(dec
);
1587 rvcn_dec_message_create(dec
);
1595 if (stream_type
== RDECODE_CODEC_JPEG
)
1596 dec
->send_cmd
= send_cmd_jpeg
;
1598 dec
->send_cmd
= send_cmd_dec
;
1603 if (dec
->cs
) dec
->ws
->cs_destroy(dec
->cs
);
1605 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1606 si_vid_destroy_buffer(&dec
->msg_fb_it_probs_buffers
[i
]);
1607 si_vid_destroy_buffer(&dec
->bs_buffers
[i
]);
1610 si_vid_destroy_buffer(&dec
->dpb
);
1611 si_vid_destroy_buffer(&dec
->ctx
);
1612 si_vid_destroy_buffer(&dec
->sessionctx
);