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[mesa.git] / src / gallium / drivers / radeon / radeon_vcn_dec.h
1 /**************************************************************************
2 *
3 * Copyright 2017 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef _RADEON_VCN_DEC_H
29 #define _RADEON_VCN_DEC_H
30
31 #define RDECODE_PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30)
32 #define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3)
33 #define RDECODE_PKT_TYPE_C 0x3FFFFFFF
34 #define RDECODE_PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16)
35 #define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF)
36 #define RDECODE_PKT_COUNT_C 0xC000FFFF
37 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0)
38 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
39 #define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000
40 #define RDECODE_PKT0(index, count) (RDECODE_PKT_TYPE_S(0) | \
41 RDECODE_PKT0_BASE_INDEX_S(index) | \
42 RDECODE_PKT_COUNT_S(count))
43
44 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2))
45
46 #define RDECODE_CMD_MSG_BUFFER 0x00000000
47 #define RDECODE_CMD_DPB_BUFFER 0x00000001
48 #define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002
49 #define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003
50 #define RDECODE_CMD_PROB_TBL_BUFFER 0x00000004
51 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005
52 #define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100
53 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204
54 #define RDECODE_CMD_CONTEXT_BUFFER 0x00000206
55
56 #define RDECODE_MSG_CREATE 0x00000000
57 #define RDECODE_MSG_DECODE 0x00000001
58 #define RDECODE_MSG_DESTROY 0x00000002
59
60 #define RDECODE_CODEC_H264 0x00000000
61 #define RDECODE_CODEC_VC1 0x00000001
62 #define RDECODE_CODEC_MPEG2_VLD 0x00000003
63 #define RDECODE_CODEC_MPEG4 0x00000004
64 #define RDECODE_CODEC_H264_PERF 0x00000007
65 #define RDECODE_CODEC_H265 0x00000010
66 #define RDECODE_CODEC_VP9 0x00000011
67
68 #define RDECODE_ARRAY_MODE_LINEAR 0x00000000
69 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001
70 #define RDECODE_ARRAY_MODE_1D_THIN 0x00000002
71 #define RDECODE_ARRAY_MODE_2D_THIN 0x00000004
72 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004
73 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005
74
75 #define RDECODE_H264_PROFILE_BASELINE 0x00000000
76 #define RDECODE_H264_PROFILE_MAIN 0x00000001
77 #define RDECODE_H264_PROFILE_HIGH 0x00000002
78 #define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003
79 #define RDECODE_H264_PROFILE_MVC 0x00000004
80
81 #define RDECODE_VC1_PROFILE_SIMPLE 0x00000000
82 #define RDECODE_VC1_PROFILE_MAIN 0x00000001
83 #define RDECODE_VC1_PROFILE_ADVANCED 0x00000002
84
85 #define RDECODE_SW_MODE_LINEAR 0x00000000
86 #define RDECODE_256B_S 0x00000001
87 #define RDECODE_256B_D 0x00000002
88 #define RDECODE_4KB_S 0x00000005
89 #define RDECODE_4KB_D 0x00000006
90 #define RDECODE_64KB_S 0x00000009
91 #define RDECODE_64KB_D 0x0000000A
92 #define RDECODE_4KB_S_X 0x00000015
93 #define RDECODE_4KB_D_X 0x00000016
94 #define RDECODE_64KB_S_X 0x00000019
95 #define RDECODE_64KB_D_X 0x0000001A
96
97 #define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000
98 #define RDECODE_MESSAGE_CREATE 0x00000001
99 #define RDECODE_MESSAGE_DECODE 0x00000002
100 #define RDECODE_MESSAGE_AVC 0x00000006
101 #define RDECODE_MESSAGE_VC1 0x00000007
102 #define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A
103 #define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B
104 #define RDECODE_MESSAGE_HEVC 0x0000000D
105 #define RDECODE_MESSAGE_VP9 0x0000000E
106
107 #define RDECODE_FEEDBACK_PROFILING 0x00000001
108
109 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
110
111 #define NUM_BUFFERS 4
112
113 #define RDECODE_VP9_PROBS_DATA_SIZE 2304
114
115 /* VP9 Frame header flags */
116 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT (13)
117 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT (12)
118 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT (11)
119 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT (10)
120 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9)
121 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT (8)
122 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT (7)
123 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6)
124 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT (5)
125 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT (4)
126 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT (3)
127 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT (2)
128 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT (1)
129 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT (0)
130
131 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK (0x00002000)
132 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK (0x00001000)
133 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK (0x00000800)
134 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK (0x00000400)
135 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200)
136 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK (0x00000100)
137 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK (0x00000080)
138 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040)
139 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK (0x00000020)
140 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK (0x00000010)
141 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK (0x00000008)
142 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK (0x00000004)
143 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK (0x00000002)
144 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK (0x00000001)
145
146 typedef struct rvcn_dec_message_index_s {
147 unsigned int message_id;
148 unsigned int offset;
149 unsigned int size;
150 unsigned int filled;
151 } rvcn_dec_message_index_t;
152
153 typedef struct rvcn_dec_message_header_s {
154 unsigned int header_size;
155 unsigned int total_size;
156 unsigned int num_buffers;
157 unsigned int msg_type;
158 unsigned int stream_handle;
159 unsigned int status_report_feedback_number;
160
161 rvcn_dec_message_index_t index[1];
162 } rvcn_dec_message_header_t;
163
164 typedef struct rvcn_dec_message_create_s {
165 unsigned int stream_type;
166 unsigned int session_flags;
167 unsigned int width_in_samples;
168 unsigned int height_in_samples;
169 } rvcn_dec_message_create_t;
170
171 typedef struct rvcn_dec_message_decode_s {
172 unsigned int stream_type;
173 unsigned int decode_flags;
174 unsigned int width_in_samples;
175 unsigned int height_in_samples;
176
177 unsigned int bsd_size;
178 unsigned int dpb_size;
179 unsigned int dt_size;
180 unsigned int sct_size;
181 unsigned int sc_coeff_size;
182 unsigned int hw_ctxt_size;
183 unsigned int sw_ctxt_size;
184 unsigned int pic_param_size;
185 unsigned int mb_cntl_size;
186 unsigned int reserved0[4];
187 unsigned int decode_buffer_flags;
188
189 unsigned int db_pitch;
190 unsigned int db_aligned_height;
191 unsigned int db_tiling_mode;
192 unsigned int db_swizzle_mode;
193 unsigned int db_array_mode;
194 unsigned int db_field_mode;
195 unsigned int db_surf_tile_config;
196
197 unsigned int dt_pitch;
198 unsigned int dt_uv_pitch;
199 unsigned int dt_tiling_mode;
200 unsigned int dt_swizzle_mode;
201 unsigned int dt_array_mode;
202 unsigned int dt_field_mode;
203 unsigned int dt_out_format;
204 unsigned int dt_surf_tile_config;
205 unsigned int dt_uv_surf_tile_config;
206 unsigned int dt_luma_top_offset;
207 unsigned int dt_luma_bottom_offset;
208 unsigned int dt_chroma_top_offset;
209 unsigned int dt_chroma_bottom_offset;
210 unsigned int dt_chromaV_top_offset;
211 unsigned int dt_chromaV_bottom_offset;
212
213 unsigned char dpbRefArraySlice[16];
214 unsigned char dpbCurArraySlice;
215 unsigned char dpbReserved[3];
216 } rvcn_dec_message_decode_t;
217
218 typedef struct {
219 unsigned short viewOrderIndex;
220 unsigned short viewId;
221 unsigned short numOfAnchorRefsInL0;
222 unsigned short viewIdOfAnchorRefsInL0[15];
223 unsigned short numOfAnchorRefsInL1;
224 unsigned short viewIdOfAnchorRefsInL1[15];
225 unsigned short numOfNonAnchorRefsInL0;
226 unsigned short viewIdOfNonAnchorRefsInL0[15];
227 unsigned short numOfNonAnchorRefsInL1;
228 unsigned short viewIdOfNonAnchorRefsInL1[15];
229 } radeon_mvcElement_t;
230
231 typedef struct rvcn_dec_message_avc_s {
232 unsigned int profile;
233 unsigned int level;
234
235 unsigned int sps_info_flags;
236 unsigned int pps_info_flags;
237 unsigned char chroma_format;
238 unsigned char bit_depth_luma_minus8;
239 unsigned char bit_depth_chroma_minus8;
240 unsigned char log2_max_frame_num_minus4;
241
242 unsigned char pic_order_cnt_type;
243 unsigned char log2_max_pic_order_cnt_lsb_minus4;
244 unsigned char num_ref_frames;
245 unsigned char reserved_8bit;
246
247 signed char pic_init_qp_minus26;
248 signed char pic_init_qs_minus26;
249 signed char chroma_qp_index_offset;
250 signed char second_chroma_qp_index_offset;
251
252 unsigned char num_slice_groups_minus1;
253 unsigned char slice_group_map_type;
254 unsigned char num_ref_idx_l0_active_minus1;
255 unsigned char num_ref_idx_l1_active_minus1;
256
257 unsigned short slice_group_change_rate_minus1;
258 unsigned short reserved_16bit_1;
259
260 unsigned char scaling_list_4x4[6][16];
261 unsigned char scaling_list_8x8[2][64];
262
263 unsigned int frame_num;
264 unsigned int frame_num_list[16];
265 int curr_field_order_cnt_list[2];
266 int field_order_cnt_list[16][2];
267
268 unsigned int decoded_pic_idx;
269 unsigned int curr_pic_ref_frame_num;
270 unsigned char ref_frame_list[16];
271
272 unsigned int reserved[122];
273
274 struct {
275 unsigned int numViews;
276 unsigned int viewId0;
277 radeon_mvcElement_t mvcElements[1];
278 } mvc;
279
280 } rvcn_dec_message_avc_t;
281
282 typedef struct rvcn_dec_message_vc1_s {
283 unsigned int profile;
284 unsigned int level;
285 unsigned int sps_info_flags;
286 unsigned int pps_info_flags;
287 unsigned int pic_structure;
288 unsigned int chroma_format;
289 unsigned short decoded_pic_idx;
290 unsigned short deblocked_pic_idx;
291 unsigned short forward_ref_idx;
292 unsigned short backward_ref_idx;
293 unsigned int cached_frame_flag;
294 } rvcn_dec_message_vc1_t;
295
296 typedef struct rvcn_dec_message_mpeg2_vld_s {
297 unsigned int decoded_pic_idx;
298 unsigned int forward_ref_pic_idx;
299 unsigned int backward_ref_pic_idx;
300
301 unsigned char load_intra_quantiser_matrix;
302 unsigned char load_nonintra_quantiser_matrix;
303 unsigned char reserved_quantiser_alignement[2];
304 unsigned char intra_quantiser_matrix[64];
305 unsigned char nonintra_quantiser_matrix[64];
306
307 unsigned char profile_and_level_indication;
308 unsigned char chroma_format;
309
310 unsigned char picture_coding_type;
311
312 unsigned char reserved_1;
313
314 unsigned char f_code[2][2];
315 unsigned char intra_dc_precision;
316 unsigned char pic_structure;
317 unsigned char top_field_first;
318 unsigned char frame_pred_frame_dct;
319 unsigned char concealment_motion_vectors;
320 unsigned char q_scale_type;
321 unsigned char intra_vlc_format;
322 unsigned char alternate_scan;
323 } rvcn_dec_message_mpeg2_vld_t;
324
325 typedef struct rvcn_dec_message_mpeg4_asp_vld_s {
326 unsigned int decoded_pic_idx;
327 unsigned int forward_ref_pic_idx;
328 unsigned int backward_ref_pic_idx;
329
330 unsigned int variant_type;
331 unsigned char profile_and_level_indication;
332
333 unsigned char video_object_layer_verid;
334 unsigned char video_object_layer_shape;
335
336 unsigned char reserved_1;
337
338 unsigned short video_object_layer_width;
339 unsigned short video_object_layer_height;
340
341 unsigned short vop_time_increment_resolution;
342
343 unsigned short reserved_2;
344
345 struct {
346 unsigned int short_video_header :1;
347 unsigned int obmc_disable :1;
348 unsigned int interlaced :1;
349 unsigned int load_intra_quant_mat :1;
350 unsigned int load_nonintra_quant_mat :1;
351 unsigned int quarter_sample :1;
352 unsigned int complexity_estimation_disable :1;
353 unsigned int resync_marker_disable :1;
354 unsigned int data_partitioned :1;
355 unsigned int reversible_vlc :1;
356 unsigned int newpred_enable :1;
357 unsigned int reduced_resolution_vop_enable :1;
358 unsigned int scalability :1;
359 unsigned int is_object_layer_identifier :1;
360 unsigned int fixed_vop_rate :1;
361 unsigned int newpred_segment_type :1;
362 unsigned int reserved_bits :16;
363 };
364
365 unsigned char quant_type;
366 unsigned char reserved_3[3];
367 unsigned char intra_quant_mat[64];
368 unsigned char nonintra_quant_mat[64];
369
370 struct {
371 unsigned char sprite_enable;
372
373 unsigned char reserved_4[3];
374
375 unsigned short sprite_width;
376 unsigned short sprite_height;
377 short sprite_left_coordinate;
378 short sprite_top_coordinate;
379
380 unsigned char no_of_sprite_warping_points;
381 unsigned char sprite_warping_accuracy;
382 unsigned char sprite_brightness_change;
383 unsigned char low_latency_sprite_enable;
384 } sprite_config;
385
386 struct {
387 struct {
388 unsigned int check_skip :1;
389 unsigned int switch_rounding :1;
390 unsigned int t311 :1;
391 unsigned int reserved_bits :29;
392 };
393
394 unsigned char vol_mode;
395
396 unsigned char reserved_5[3];
397 } divx_311_config;
398
399 struct {
400 unsigned char vop_data_present;
401 unsigned char vop_coding_type;
402 unsigned char vop_quant;
403 unsigned char vop_coded;
404 unsigned char vop_rounding_type;
405 unsigned char intra_dc_vlc_thr;
406 unsigned char top_field_first;
407 unsigned char alternate_vertical_scan_flag;
408 unsigned char vop_fcode_forward;
409 unsigned char vop_fcode_backward;
410 unsigned int TRB[2];
411 unsigned int TRD[2];
412 } vop;
413
414 } rvcn_dec_message_mpeg4_asp_vld_t;
415
416 typedef struct rvcn_dec_message_hevc_s {
417 unsigned int sps_info_flags;
418 unsigned int pps_info_flags;
419 unsigned char chroma_format;
420 unsigned char bit_depth_luma_minus8;
421 unsigned char bit_depth_chroma_minus8;
422 unsigned char log2_max_pic_order_cnt_lsb_minus4;
423
424 unsigned char sps_max_dec_pic_buffering_minus1;
425 unsigned char log2_min_luma_coding_block_size_minus3;
426 unsigned char log2_diff_max_min_luma_coding_block_size;
427 unsigned char log2_min_transform_block_size_minus2;
428
429 unsigned char log2_diff_max_min_transform_block_size;
430 unsigned char max_transform_hierarchy_depth_inter;
431 unsigned char max_transform_hierarchy_depth_intra;
432 unsigned char pcm_sample_bit_depth_luma_minus1;
433
434 unsigned char pcm_sample_bit_depth_chroma_minus1;
435 unsigned char log2_min_pcm_luma_coding_block_size_minus3;
436 unsigned char log2_diff_max_min_pcm_luma_coding_block_size;
437 unsigned char num_extra_slice_header_bits;
438
439 unsigned char num_short_term_ref_pic_sets;
440 unsigned char num_long_term_ref_pic_sps;
441 unsigned char num_ref_idx_l0_default_active_minus1;
442 unsigned char num_ref_idx_l1_default_active_minus1;
443
444 signed char pps_cb_qp_offset;
445 signed char pps_cr_qp_offset;
446 signed char pps_beta_offset_div2;
447 signed char pps_tc_offset_div2;
448
449 unsigned char diff_cu_qp_delta_depth;
450 unsigned char num_tile_columns_minus1;
451 unsigned char num_tile_rows_minus1;
452 unsigned char log2_parallel_merge_level_minus2;
453
454 unsigned short column_width_minus1[19];
455 unsigned short row_height_minus1[21];
456
457 signed char init_qp_minus26;
458 unsigned char num_delta_pocs_ref_rps_idx;
459 unsigned char curr_idx;
460 unsigned char reserved[1];
461 int curr_poc;
462 unsigned char ref_pic_list[16];
463 int poc_list[16];
464 unsigned char ref_pic_set_st_curr_before[8];
465 unsigned char ref_pic_set_st_curr_after[8];
466 unsigned char ref_pic_set_lt_curr[8];
467
468 unsigned char ucScalingListDCCoefSizeID2[6];
469 unsigned char ucScalingListDCCoefSizeID3[2];
470
471 unsigned char highestTid;
472 unsigned char isNonRef;
473
474 unsigned char p010_mode;
475 unsigned char msb_mode;
476 unsigned char luma_10to8;
477 unsigned char chroma_10to8;
478
479 unsigned char hevc_reserved[2];
480
481 unsigned char direct_reflist[2][15];
482 } rvcn_dec_message_hevc_t;
483
484 typedef struct rvcn_dec_message_vp9_s {
485 unsigned int frame_header_flags;
486
487 unsigned char frame_context_idx;
488 unsigned char reset_frame_context;
489
490 unsigned char curr_pic_idx;
491 unsigned char interp_filter;
492
493 unsigned char filter_level;
494 unsigned char sharpness_level;
495 unsigned char lf_adj_level[8][4][2];
496 unsigned char base_qindex;
497 signed char y_dc_delta_q;
498 signed char uv_ac_delta_q;
499 signed char uv_dc_delta_q;
500
501 unsigned char log2_tile_cols;
502 unsigned char log2_tile_rows;
503 unsigned char tx_mode;
504 unsigned char reference_mode;
505 unsigned char chroma_format;
506
507 unsigned char ref_frame_map[8];
508
509 unsigned char frame_refs[3];
510 unsigned char ref_frame_sign_bias[3];
511 unsigned char frame_to_show;
512 unsigned char bit_depth_luma_minus8;
513 unsigned char bit_depth_chroma_minus8;
514
515 unsigned char p010_mode;
516 unsigned char msb_mode;
517 unsigned char luma_10to8;
518 unsigned char chroma_10to8;
519
520 unsigned int vp9_frame_size;
521 unsigned int compressed_header_size;
522 unsigned int uncompressed_header_size;
523 } rvcn_dec_message_vp9_t;
524
525 typedef struct rvcn_dec_feature_index_s {
526 unsigned int feature_id;
527 unsigned int offset;
528 unsigned int size;
529 unsigned int filled;
530 } rvcn_dec_feature_index_t;
531
532 typedef struct rvcn_dec_feedback_header_s {
533 unsigned int header_size;
534 unsigned int total_size;
535 unsigned int num_buffers;
536 unsigned int status_report_feedback_number;
537 unsigned int status;
538 unsigned int value;
539 unsigned int errorBits;
540 rvcn_dec_feature_index_t index[1];
541 } rvcn_dec_feedback_header_t;
542
543 typedef struct rvcn_dec_feedback_profiling_s {
544 unsigned int size;
545
546 unsigned int decodingTime;
547 unsigned int decodePlusOverhead;
548 unsigned int masterTimerHits;
549 unsigned int uvdLBSIREWaitCount;
550
551 unsigned int avgMPCMemLatency;
552 unsigned int maxMPCMemLatency;
553 unsigned int uvdMPCLumaHits;
554 unsigned int uvdMPCLumaHitPend;
555 unsigned int uvdMPCLumaSearch;
556 unsigned int uvdMPCChromaHits;
557 unsigned int uvdMPCChromaHitPend;
558 unsigned int uvdMPCChromaSearch;
559
560 unsigned int uvdLMIPerfCountLo;
561 unsigned int uvdLMIPerfCountHi;
562 unsigned int uvdLMIAvgLatCntrEnvHit;
563 unsigned int uvdLMILatCntr;
564
565 unsigned int frameCRC0;
566 unsigned int frameCRC1;
567 unsigned int frameCRC2;
568 unsigned int frameCRC3;
569
570 unsigned int uvdLMIPerfMonCtrl;
571 unsigned int uvdLMILatCtrl;
572 unsigned int uvdMPCCntl;
573 unsigned int reserved0[4];
574 unsigned int decoderID;
575 unsigned int codec;
576
577 unsigned int dmaHwCrc32Enable;
578 unsigned int dmaHwCrc32Value;
579 unsigned int dmaHwCrc32Value2;
580 } rvcn_dec_feedback_profiling_t;
581
582 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s {
583 unsigned short classes_mask[2];
584 unsigned short bits_mask[2];
585 unsigned char joints_mask;
586 unsigned char sign_mask[2];
587 unsigned char class0_mask[2];
588 unsigned char class0_fp_mask[2];
589 unsigned char fp_mask[2];
590 unsigned char class0_hp_mask[2];
591 unsigned char hp_mask[2];
592 unsigned char reserve[11];
593 } rvcn_dec_vp9_nmv_ctx_mask_t;
594
595 typedef struct rvcn_dec_vp9_nmv_component_s{
596 unsigned char sign;
597 unsigned char classes[10];
598 unsigned char class0[1];
599 unsigned char bits[10];
600 unsigned char class0_fp[2][3];
601 unsigned char fp[3];
602 unsigned char class0_hp;
603 unsigned char hp;
604 } rvcn_dec_vp9_nmv_component_t;
605
606 typedef struct rvcn_dec_vp9_probs_s {
607 rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask;
608 unsigned char coef_probs[4][2][2][6][6][3];
609 unsigned char y_mode_prob[4][9];
610 unsigned char uv_mode_prob[10][9];
611 unsigned char single_ref_prob[5][2];
612 unsigned char switchable_interp_prob[4][2];
613 unsigned char partition_prob[16][3];
614 unsigned char inter_mode_probs[7][3];
615 unsigned char mbskip_probs[3];
616 unsigned char intra_inter_prob[4];
617 unsigned char comp_inter_prob[5];
618 unsigned char comp_ref_prob[5];
619 unsigned char tx_probs_32x32[2][3];
620 unsigned char tx_probs_16x16[2][2];
621 unsigned char tx_probs_8x8[2][1];
622 unsigned char mv_joints[3];
623 rvcn_dec_vp9_nmv_component_t mv_comps[2];
624 } rvcn_dec_vp9_probs_t;
625
626 typedef struct rvcn_dec_vp9_probs_segment_s {
627 union {
628 rvcn_dec_vp9_probs_t probs;
629 unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE];
630 };
631
632 union {
633 struct {
634 unsigned int feature_data[8];
635 unsigned char tree_probs[7];
636 unsigned char pred_probs[3];
637 unsigned char abs_delta;
638 unsigned char feature_mask[8];
639 } seg;
640 unsigned char segment_data[256];
641 };
642 } rvcn_dec_vp9_probs_segment_t;
643
644 struct radeon_decoder {
645 struct pipe_video_codec base;
646
647 unsigned stream_handle;
648 unsigned stream_type;
649 unsigned frame_number;
650
651 struct pipe_screen *screen;
652 struct radeon_winsys *ws;
653 struct radeon_cmdbuf *cs;
654
655 void *msg;
656 uint32_t *fb;
657 uint8_t *it;
658 uint8_t *probs;
659 void *bs_ptr;
660
661 struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS];
662 struct rvid_buffer bs_buffers[NUM_BUFFERS];
663 struct rvid_buffer dpb;
664 struct rvid_buffer ctx;
665 struct rvid_buffer sessionctx;
666
667 unsigned bs_size;
668 unsigned cur_buffer;
669 void *render_pic_list[16];
670 bool show_frame;
671 unsigned ref_idx;
672 };
673
674 struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
675 const struct pipe_video_codec *templat);
676
677 #endif