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radeon/vcn: get VP9 msg buffer
[mesa.git] / src / gallium / drivers / radeon / radeon_vcn_dec.h
1 /**************************************************************************
2 *
3 * Copyright 2017 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef _RADEON_VCN_DEC_H
29 #define _RADEON_VCN_DEC_H
30
31 #define RDECODE_PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30)
32 #define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3)
33 #define RDECODE_PKT_TYPE_C 0x3FFFFFFF
34 #define RDECODE_PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16)
35 #define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF)
36 #define RDECODE_PKT_COUNT_C 0xC000FFFF
37 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0)
38 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
39 #define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000
40 #define RDECODE_PKT0(index, count) (RDECODE_PKT_TYPE_S(0) | \
41 RDECODE_PKT0_BASE_INDEX_S(index) | \
42 RDECODE_PKT_COUNT_S(count))
43
44 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2))
45
46 #define RDECODE_CMD_MSG_BUFFER 0x00000000
47 #define RDECODE_CMD_DPB_BUFFER 0x00000001
48 #define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002
49 #define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003
50 #define RDECODE_CMD_PROB_TBL_BUFFER 0x00000004
51 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005
52 #define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100
53 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204
54 #define RDECODE_CMD_CONTEXT_BUFFER 0x00000206
55
56 #define RDECODE_MSG_CREATE 0x00000000
57 #define RDECODE_MSG_DECODE 0x00000001
58 #define RDECODE_MSG_DESTROY 0x00000002
59
60 #define RDECODE_CODEC_H264 0x00000000
61 #define RDECODE_CODEC_VC1 0x00000001
62 #define RDECODE_CODEC_MPEG2_VLD 0x00000003
63 #define RDECODE_CODEC_MPEG4 0x00000004
64 #define RDECODE_CODEC_H264_PERF 0x00000007
65 #define RDECODE_CODEC_H265 0x00000010
66 #define RDECODE_CODEC_VP9 0x00000011
67
68 #define RDECODE_ARRAY_MODE_LINEAR 0x00000000
69 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001
70 #define RDECODE_ARRAY_MODE_1D_THIN 0x00000002
71 #define RDECODE_ARRAY_MODE_2D_THIN 0x00000004
72 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004
73 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005
74
75 #define RDECODE_H264_PROFILE_BASELINE 0x00000000
76 #define RDECODE_H264_PROFILE_MAIN 0x00000001
77 #define RDECODE_H264_PROFILE_HIGH 0x00000002
78 #define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003
79 #define RDECODE_H264_PROFILE_MVC 0x00000004
80
81 #define RDECODE_VC1_PROFILE_SIMPLE 0x00000000
82 #define RDECODE_VC1_PROFILE_MAIN 0x00000001
83 #define RDECODE_VC1_PROFILE_ADVANCED 0x00000002
84
85 #define RDECODE_SW_MODE_LINEAR 0x00000000
86 #define RDECODE_256B_S 0x00000001
87 #define RDECODE_256B_D 0x00000002
88 #define RDECODE_4KB_S 0x00000005
89 #define RDECODE_4KB_D 0x00000006
90 #define RDECODE_64KB_S 0x00000009
91 #define RDECODE_64KB_D 0x0000000A
92 #define RDECODE_4KB_S_X 0x00000015
93 #define RDECODE_4KB_D_X 0x00000016
94 #define RDECODE_64KB_S_X 0x00000019
95 #define RDECODE_64KB_D_X 0x0000001A
96
97 #define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000
98 #define RDECODE_MESSAGE_CREATE 0x00000001
99 #define RDECODE_MESSAGE_DECODE 0x00000002
100 #define RDECODE_MESSAGE_AVC 0x00000006
101 #define RDECODE_MESSAGE_VC1 0x00000007
102 #define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A
103 #define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B
104 #define RDECODE_MESSAGE_HEVC 0x0000000D
105 #define RDECODE_MESSAGE_VP9 0x0000000E
106
107 #define RDECODE_FEEDBACK_PROFILING 0x00000001
108
109 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
110
111 #define RDECODE_VP9_PROBS_DATA_SIZE 2304
112
113 /* VP9 Frame header flags */
114 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT (13)
115 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT (12)
116 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT (11)
117 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT (10)
118 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9)
119 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT (8)
120 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT (7)
121 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6)
122 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT (5)
123 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT (4)
124 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT (3)
125 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT (2)
126 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT (1)
127 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT (0)
128
129 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK (0x00002000)
130 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK (0x00001000)
131 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK (0x00000800)
132 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK (0x00000400)
133 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200)
134 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK (0x00000100)
135 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK (0x00000080)
136 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040)
137 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK (0x00000020)
138 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK (0x00000010)
139 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK (0x00000008)
140 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK (0x00000004)
141 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK (0x00000002)
142 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK (0x00000001)
143
144 typedef struct rvcn_dec_message_index_s {
145 unsigned int message_id;
146 unsigned int offset;
147 unsigned int size;
148 unsigned int filled;
149 } rvcn_dec_message_index_t;
150
151 typedef struct rvcn_dec_message_header_s {
152 unsigned int header_size;
153 unsigned int total_size;
154 unsigned int num_buffers;
155 unsigned int msg_type;
156 unsigned int stream_handle;
157 unsigned int status_report_feedback_number;
158
159 rvcn_dec_message_index_t index[1];
160 } rvcn_dec_message_header_t;
161
162 typedef struct rvcn_dec_message_create_s {
163 unsigned int stream_type;
164 unsigned int session_flags;
165 unsigned int width_in_samples;
166 unsigned int height_in_samples;
167 } rvcn_dec_message_create_t;
168
169 typedef struct rvcn_dec_message_decode_s {
170 unsigned int stream_type;
171 unsigned int decode_flags;
172 unsigned int width_in_samples;
173 unsigned int height_in_samples;
174
175 unsigned int bsd_size;
176 unsigned int dpb_size;
177 unsigned int dt_size;
178 unsigned int sct_size;
179 unsigned int sc_coeff_size;
180 unsigned int hw_ctxt_size;
181 unsigned int sw_ctxt_size;
182 unsigned int pic_param_size;
183 unsigned int mb_cntl_size;
184 unsigned int reserved0[4];
185 unsigned int decode_buffer_flags;
186
187 unsigned int db_pitch;
188 unsigned int db_aligned_height;
189 unsigned int db_tiling_mode;
190 unsigned int db_swizzle_mode;
191 unsigned int db_array_mode;
192 unsigned int db_field_mode;
193 unsigned int db_surf_tile_config;
194
195 unsigned int dt_pitch;
196 unsigned int dt_uv_pitch;
197 unsigned int dt_tiling_mode;
198 unsigned int dt_swizzle_mode;
199 unsigned int dt_array_mode;
200 unsigned int dt_field_mode;
201 unsigned int dt_out_format;
202 unsigned int dt_surf_tile_config;
203 unsigned int dt_uv_surf_tile_config;
204 unsigned int dt_luma_top_offset;
205 unsigned int dt_luma_bottom_offset;
206 unsigned int dt_chroma_top_offset;
207 unsigned int dt_chroma_bottom_offset;
208 unsigned int dt_chromaV_top_offset;
209 unsigned int dt_chromaV_bottom_offset;
210
211 unsigned char dpbRefArraySlice[16];
212 unsigned char dpbCurArraySlice;
213 unsigned char dpbReserved[3];
214 } rvcn_dec_message_decode_t;
215
216 typedef struct {
217 unsigned short viewOrderIndex;
218 unsigned short viewId;
219 unsigned short numOfAnchorRefsInL0;
220 unsigned short viewIdOfAnchorRefsInL0[15];
221 unsigned short numOfAnchorRefsInL1;
222 unsigned short viewIdOfAnchorRefsInL1[15];
223 unsigned short numOfNonAnchorRefsInL0;
224 unsigned short viewIdOfNonAnchorRefsInL0[15];
225 unsigned short numOfNonAnchorRefsInL1;
226 unsigned short viewIdOfNonAnchorRefsInL1[15];
227 } radeon_mvcElement_t;
228
229 typedef struct rvcn_dec_message_avc_s {
230 unsigned int profile;
231 unsigned int level;
232
233 unsigned int sps_info_flags;
234 unsigned int pps_info_flags;
235 unsigned char chroma_format;
236 unsigned char bit_depth_luma_minus8;
237 unsigned char bit_depth_chroma_minus8;
238 unsigned char log2_max_frame_num_minus4;
239
240 unsigned char pic_order_cnt_type;
241 unsigned char log2_max_pic_order_cnt_lsb_minus4;
242 unsigned char num_ref_frames;
243 unsigned char reserved_8bit;
244
245 signed char pic_init_qp_minus26;
246 signed char pic_init_qs_minus26;
247 signed char chroma_qp_index_offset;
248 signed char second_chroma_qp_index_offset;
249
250 unsigned char num_slice_groups_minus1;
251 unsigned char slice_group_map_type;
252 unsigned char num_ref_idx_l0_active_minus1;
253 unsigned char num_ref_idx_l1_active_minus1;
254
255 unsigned short slice_group_change_rate_minus1;
256 unsigned short reserved_16bit_1;
257
258 unsigned char scaling_list_4x4[6][16];
259 unsigned char scaling_list_8x8[2][64];
260
261 unsigned int frame_num;
262 unsigned int frame_num_list[16];
263 int curr_field_order_cnt_list[2];
264 int field_order_cnt_list[16][2];
265
266 unsigned int decoded_pic_idx;
267 unsigned int curr_pic_ref_frame_num;
268 unsigned char ref_frame_list[16];
269
270 unsigned int reserved[122];
271
272 struct {
273 unsigned int numViews;
274 unsigned int viewId0;
275 radeon_mvcElement_t mvcElements[1];
276 } mvc;
277
278 } rvcn_dec_message_avc_t;
279
280 typedef struct rvcn_dec_message_vc1_s {
281 unsigned int profile;
282 unsigned int level;
283 unsigned int sps_info_flags;
284 unsigned int pps_info_flags;
285 unsigned int pic_structure;
286 unsigned int chroma_format;
287 unsigned short decoded_pic_idx;
288 unsigned short deblocked_pic_idx;
289 unsigned short forward_ref_idx;
290 unsigned short backward_ref_idx;
291 unsigned int cached_frame_flag;
292 } rvcn_dec_message_vc1_t;
293
294 typedef struct rvcn_dec_message_mpeg2_vld_s {
295 unsigned int decoded_pic_idx;
296 unsigned int forward_ref_pic_idx;
297 unsigned int backward_ref_pic_idx;
298
299 unsigned char load_intra_quantiser_matrix;
300 unsigned char load_nonintra_quantiser_matrix;
301 unsigned char reserved_quantiser_alignement[2];
302 unsigned char intra_quantiser_matrix[64];
303 unsigned char nonintra_quantiser_matrix[64];
304
305 unsigned char profile_and_level_indication;
306 unsigned char chroma_format;
307
308 unsigned char picture_coding_type;
309
310 unsigned char reserved_1;
311
312 unsigned char f_code[2][2];
313 unsigned char intra_dc_precision;
314 unsigned char pic_structure;
315 unsigned char top_field_first;
316 unsigned char frame_pred_frame_dct;
317 unsigned char concealment_motion_vectors;
318 unsigned char q_scale_type;
319 unsigned char intra_vlc_format;
320 unsigned char alternate_scan;
321 } rvcn_dec_message_mpeg2_vld_t;
322
323 typedef struct rvcn_dec_message_mpeg4_asp_vld_s {
324 unsigned int decoded_pic_idx;
325 unsigned int forward_ref_pic_idx;
326 unsigned int backward_ref_pic_idx;
327
328 unsigned int variant_type;
329 unsigned char profile_and_level_indication;
330
331 unsigned char video_object_layer_verid;
332 unsigned char video_object_layer_shape;
333
334 unsigned char reserved_1;
335
336 unsigned short video_object_layer_width;
337 unsigned short video_object_layer_height;
338
339 unsigned short vop_time_increment_resolution;
340
341 unsigned short reserved_2;
342
343 struct {
344 unsigned int short_video_header :1;
345 unsigned int obmc_disable :1;
346 unsigned int interlaced :1;
347 unsigned int load_intra_quant_mat :1;
348 unsigned int load_nonintra_quant_mat :1;
349 unsigned int quarter_sample :1;
350 unsigned int complexity_estimation_disable :1;
351 unsigned int resync_marker_disable :1;
352 unsigned int data_partitioned :1;
353 unsigned int reversible_vlc :1;
354 unsigned int newpred_enable :1;
355 unsigned int reduced_resolution_vop_enable :1;
356 unsigned int scalability :1;
357 unsigned int is_object_layer_identifier :1;
358 unsigned int fixed_vop_rate :1;
359 unsigned int newpred_segment_type :1;
360 unsigned int reserved_bits :16;
361 };
362
363 unsigned char quant_type;
364 unsigned char reserved_3[3];
365 unsigned char intra_quant_mat[64];
366 unsigned char nonintra_quant_mat[64];
367
368 struct {
369 unsigned char sprite_enable;
370
371 unsigned char reserved_4[3];
372
373 unsigned short sprite_width;
374 unsigned short sprite_height;
375 short sprite_left_coordinate;
376 short sprite_top_coordinate;
377
378 unsigned char no_of_sprite_warping_points;
379 unsigned char sprite_warping_accuracy;
380 unsigned char sprite_brightness_change;
381 unsigned char low_latency_sprite_enable;
382 } sprite_config;
383
384 struct {
385 struct {
386 unsigned int check_skip :1;
387 unsigned int switch_rounding :1;
388 unsigned int t311 :1;
389 unsigned int reserved_bits :29;
390 };
391
392 unsigned char vol_mode;
393
394 unsigned char reserved_5[3];
395 } divx_311_config;
396
397 struct {
398 unsigned char vop_data_present;
399 unsigned char vop_coding_type;
400 unsigned char vop_quant;
401 unsigned char vop_coded;
402 unsigned char vop_rounding_type;
403 unsigned char intra_dc_vlc_thr;
404 unsigned char top_field_first;
405 unsigned char alternate_vertical_scan_flag;
406 unsigned char vop_fcode_forward;
407 unsigned char vop_fcode_backward;
408 unsigned int TRB[2];
409 unsigned int TRD[2];
410 } vop;
411
412 } rvcn_dec_message_mpeg4_asp_vld_t;
413
414 typedef struct rvcn_dec_message_hevc_s {
415 unsigned int sps_info_flags;
416 unsigned int pps_info_flags;
417 unsigned char chroma_format;
418 unsigned char bit_depth_luma_minus8;
419 unsigned char bit_depth_chroma_minus8;
420 unsigned char log2_max_pic_order_cnt_lsb_minus4;
421
422 unsigned char sps_max_dec_pic_buffering_minus1;
423 unsigned char log2_min_luma_coding_block_size_minus3;
424 unsigned char log2_diff_max_min_luma_coding_block_size;
425 unsigned char log2_min_transform_block_size_minus2;
426
427 unsigned char log2_diff_max_min_transform_block_size;
428 unsigned char max_transform_hierarchy_depth_inter;
429 unsigned char max_transform_hierarchy_depth_intra;
430 unsigned char pcm_sample_bit_depth_luma_minus1;
431
432 unsigned char pcm_sample_bit_depth_chroma_minus1;
433 unsigned char log2_min_pcm_luma_coding_block_size_minus3;
434 unsigned char log2_diff_max_min_pcm_luma_coding_block_size;
435 unsigned char num_extra_slice_header_bits;
436
437 unsigned char num_short_term_ref_pic_sets;
438 unsigned char num_long_term_ref_pic_sps;
439 unsigned char num_ref_idx_l0_default_active_minus1;
440 unsigned char num_ref_idx_l1_default_active_minus1;
441
442 signed char pps_cb_qp_offset;
443 signed char pps_cr_qp_offset;
444 signed char pps_beta_offset_div2;
445 signed char pps_tc_offset_div2;
446
447 unsigned char diff_cu_qp_delta_depth;
448 unsigned char num_tile_columns_minus1;
449 unsigned char num_tile_rows_minus1;
450 unsigned char log2_parallel_merge_level_minus2;
451
452 unsigned short column_width_minus1[19];
453 unsigned short row_height_minus1[21];
454
455 signed char init_qp_minus26;
456 unsigned char num_delta_pocs_ref_rps_idx;
457 unsigned char curr_idx;
458 unsigned char reserved[1];
459 int curr_poc;
460 unsigned char ref_pic_list[16];
461 int poc_list[16];
462 unsigned char ref_pic_set_st_curr_before[8];
463 unsigned char ref_pic_set_st_curr_after[8];
464 unsigned char ref_pic_set_lt_curr[8];
465
466 unsigned char ucScalingListDCCoefSizeID2[6];
467 unsigned char ucScalingListDCCoefSizeID3[2];
468
469 unsigned char highestTid;
470 unsigned char isNonRef;
471
472 unsigned char p010_mode;
473 unsigned char msb_mode;
474 unsigned char luma_10to8;
475 unsigned char chroma_10to8;
476
477 unsigned char hevc_reserved[2];
478
479 unsigned char direct_reflist[2][15];
480 } rvcn_dec_message_hevc_t;
481
482 typedef struct rvcn_dec_message_vp9_s {
483 unsigned int frame_header_flags;
484
485 unsigned char frame_context_idx;
486 unsigned char reset_frame_context;
487
488 unsigned char curr_pic_idx;
489 unsigned char interp_filter;
490
491 unsigned char filter_level;
492 unsigned char sharpness_level;
493 unsigned char lf_adj_level[8][4][2];
494 unsigned char base_qindex;
495 signed char y_dc_delta_q;
496 signed char uv_ac_delta_q;
497 signed char uv_dc_delta_q;
498
499 unsigned char log2_tile_cols;
500 unsigned char log2_tile_rows;
501 unsigned char tx_mode;
502 unsigned char reference_mode;
503 unsigned char chroma_format;
504
505 unsigned char ref_frame_map[8];
506
507 unsigned char frame_refs[3];
508 unsigned char ref_frame_sign_bias[3];
509 unsigned char frame_to_show;
510 unsigned char bit_depth_luma_minus8;
511 unsigned char bit_depth_chroma_minus8;
512
513 unsigned char p010_mode;
514 unsigned char msb_mode;
515 unsigned char luma_10to8;
516 unsigned char chroma_10to8;
517
518 unsigned int vp9_frame_size;
519 unsigned int compressed_header_size;
520 unsigned int uncompressed_header_size;
521 } rvcn_dec_message_vp9_t;
522
523 typedef struct rvcn_dec_feature_index_s {
524 unsigned int feature_id;
525 unsigned int offset;
526 unsigned int size;
527 unsigned int filled;
528 } rvcn_dec_feature_index_t;
529
530 typedef struct rvcn_dec_feedback_header_s {
531 unsigned int header_size;
532 unsigned int total_size;
533 unsigned int num_buffers;
534 unsigned int status_report_feedback_number;
535 unsigned int status;
536 unsigned int value;
537 unsigned int errorBits;
538 rvcn_dec_feature_index_t index[1];
539 } rvcn_dec_feedback_header_t;
540
541 typedef struct rvcn_dec_feedback_profiling_s {
542 unsigned int size;
543
544 unsigned int decodingTime;
545 unsigned int decodePlusOverhead;
546 unsigned int masterTimerHits;
547 unsigned int uvdLBSIREWaitCount;
548
549 unsigned int avgMPCMemLatency;
550 unsigned int maxMPCMemLatency;
551 unsigned int uvdMPCLumaHits;
552 unsigned int uvdMPCLumaHitPend;
553 unsigned int uvdMPCLumaSearch;
554 unsigned int uvdMPCChromaHits;
555 unsigned int uvdMPCChromaHitPend;
556 unsigned int uvdMPCChromaSearch;
557
558 unsigned int uvdLMIPerfCountLo;
559 unsigned int uvdLMIPerfCountHi;
560 unsigned int uvdLMIAvgLatCntrEnvHit;
561 unsigned int uvdLMILatCntr;
562
563 unsigned int frameCRC0;
564 unsigned int frameCRC1;
565 unsigned int frameCRC2;
566 unsigned int frameCRC3;
567
568 unsigned int uvdLMIPerfMonCtrl;
569 unsigned int uvdLMILatCtrl;
570 unsigned int uvdMPCCntl;
571 unsigned int reserved0[4];
572 unsigned int decoderID;
573 unsigned int codec;
574
575 unsigned int dmaHwCrc32Enable;
576 unsigned int dmaHwCrc32Value;
577 unsigned int dmaHwCrc32Value2;
578 } rvcn_dec_feedback_profiling_t;
579
580 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s {
581 unsigned short classes_mask[2];
582 unsigned short bits_mask[2];
583 unsigned char joints_mask;
584 unsigned char sign_mask[2];
585 unsigned char class0_mask[2];
586 unsigned char class0_fp_mask[2];
587 unsigned char fp_mask[2];
588 unsigned char class0_hp_mask[2];
589 unsigned char hp_mask[2];
590 unsigned char reserve[11];
591 } rvcn_dec_vp9_nmv_ctx_mask_t;
592
593 typedef struct rvcn_dec_vp9_nmv_component_s{
594 unsigned char sign;
595 unsigned char classes[10];
596 unsigned char class0[1];
597 unsigned char bits[10];
598 unsigned char class0_fp[2][3];
599 unsigned char fp[3];
600 unsigned char class0_hp;
601 unsigned char hp;
602 } rvcn_dec_vp9_nmv_component_t;
603
604 typedef struct rvcn_dec_vp9_probs_s {
605 rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask;
606 unsigned char coef_probs[4][2][2][6][6][3];
607 unsigned char y_mode_prob[4][9];
608 unsigned char uv_mode_prob[10][9];
609 unsigned char single_ref_prob[5][2];
610 unsigned char switchable_interp_prob[4][2];
611 unsigned char partition_prob[16][3];
612 unsigned char inter_mode_probs[7][3];
613 unsigned char mbskip_probs[3];
614 unsigned char intra_inter_prob[4];
615 unsigned char comp_inter_prob[5];
616 unsigned char comp_ref_prob[5];
617 unsigned char tx_probs_32x32[2][3];
618 unsigned char tx_probs_16x16[2][2];
619 unsigned char tx_probs_8x8[2][1];
620 unsigned char mv_joints[3];
621 rvcn_dec_vp9_nmv_component_t mv_comps[2];
622 } rvcn_dec_vp9_probs_t;
623
624 typedef struct rvcn_dec_vp9_probs_segment_s {
625 union {
626 rvcn_dec_vp9_probs_t probs;
627 unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE];
628 };
629
630 union {
631 struct {
632 unsigned int feature_data[8];
633 unsigned char tree_probs[7];
634 unsigned char pred_probs[3];
635 unsigned char abs_delta;
636 unsigned char feature_mask[8];
637 } seg;
638 unsigned char segment_data[256];
639 };
640 } rvcn_dec_vp9_probs_segment_t;
641
642 struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
643 const struct pipe_video_codec *templat);
644
645 #endif