src/gallium/drivers/radeon/radeon_video.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <unistd.h>
  35
  36 #include "util/u_memory.h"
  37 #include "util/u_video.h"
  38
  39 #include "vl/vl_defines.h"
  40 #include "vl/vl_video_buffer.h"
  41
  42 #include "radeon/drm/radeon_winsys.h"
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 /* generate an stream handle */
  48 unsigned rvid_alloc_stream_handle()
  49 {
  50         static unsigned counter = 0;
  51         unsigned stream_handle = 0;
  52         unsigned pid = getpid();
  53         int i;
  54
  55         for (i = 0; i < 32; ++i)
  56                 stream_handle |= ((pid >> i) & 1) << (31 - i);
  57
  58         stream_handle ^= ++counter;
  59         return stream_handle;
  60 }
  61
  62 /* create a buffer in the winsys */
  63 bool rvid_create_buffer(struct pipe_screen *screen, struct rvid_buffer *buffer,
  64                         unsigned size, unsigned usage)
  65 {
  66         memset(buffer, 0, sizeof(*buffer));
  67         buffer->usage = usage;
  68         buffer->res = (struct r600_resource *)
  69                 pipe_buffer_create(screen, PIPE_BIND_CUSTOM, usage, size);
  70
  71         return buffer->res != NULL;
  72 }
  73
  74 /* destroy a buffer */
  75 void rvid_destroy_buffer(struct rvid_buffer *buffer)
  76 {
  77         pipe_resource_reference((struct pipe_resource **)&buffer->res, NULL);
  78 }
  79
  80 /* reallocate a buffer, preserving its content */
  81 bool rvid_resize_buffer(struct pipe_screen *screen, struct radeon_winsys_cs *cs,
  82                         struct rvid_buffer *new_buf, unsigned new_size)
  83 {
  84         struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
  85         struct radeon_winsys* ws = rscreen->ws;
  86         unsigned bytes = MIN2(new_buf->res->buf->size, new_size);
  87         struct rvid_buffer old_buf = *new_buf;
  88         void *src = NULL, *dst = NULL;
  89
  90         if (!rvid_create_buffer(screen, new_buf, new_size, new_buf->usage))
  91                 goto error;
  92
  93         src = ws->buffer_map(old_buf.res->cs_buf, cs, PIPE_TRANSFER_READ);
  94         if (!src)
  95                 goto error;
  96
  97         dst = ws->buffer_map(new_buf->res->cs_buf, cs, PIPE_TRANSFER_WRITE);
  98         if (!dst)
  99                 goto error;
 100
 101         memcpy(dst, src, bytes);
 102         if (new_size > bytes) {
 103                 new_size -= bytes;
 104                 dst += bytes;
 105                 memset(dst, 0, new_size);
 106         }
 107         ws->buffer_unmap(new_buf->res->cs_buf);
 108         ws->buffer_unmap(old_buf.res->cs_buf);
 109         rvid_destroy_buffer(&old_buf);
 110         return true;
 111
 112 error:
 113         if (src)
 114                 ws->buffer_unmap(old_buf.res->cs_buf);
 115         rvid_destroy_buffer(new_buf);
 116         *new_buf = old_buf;
 117         return false;
 118 }
 119
 120 /* clear the buffer with zeros */
 121 void rvid_clear_buffer(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, struct rvid_buffer* buffer)
 122 {
 123         void *ptr = ws->buffer_map(buffer->res->cs_buf, cs, PIPE_TRANSFER_WRITE);
 124         if (!ptr)
 125                 return;
 126
 127         memset(ptr, 0, buffer->res->buf->size);
 128         ws->buffer_unmap(buffer->res->cs_buf);
 129 }
 130
 131 /**
 132  * join surfaces into the same buffer with identical tiling params
 133  * sumup their sizes and replace the backend buffers with a single bo
 134  */
 135 void rvid_join_surfaces(struct radeon_winsys* ws, unsigned bind,
 136                         struct pb_buffer** buffers[VL_NUM_COMPONENTS],
 137                         struct radeon_surface *surfaces[VL_NUM_COMPONENTS])
 138 {
 139         unsigned best_tiling, best_wh, off;
 140         unsigned size, alignment;
 141         struct pb_buffer *pb;
 142         unsigned i, j;
 143
 144         for (i = 0, best_tiling = 0, best_wh = ~0; i < VL_NUM_COMPONENTS; ++i) {
 145                 unsigned wh;
 146
 147                 if (!surfaces[i])
 148                         continue;
 149
 150                 /* choose the smallest bank w/h for now */
 151                 wh = surfaces[i]->bankw * surfaces[i]->bankh;
 152                 if (wh < best_wh) {
 153                         best_wh = wh;
 154                         best_tiling = i;
 155                 }
 156         }
 157
 158         for (i = 0, off = 0; i < VL_NUM_COMPONENTS; ++i) {
 159                 if (!surfaces[i])
 160                         continue;
 161
 162                 /* copy the tiling parameters */
 163                 surfaces[i]->bankw = surfaces[best_tiling]->bankw;
 164                 surfaces[i]->bankh = surfaces[best_tiling]->bankh;
 165                 surfaces[i]->mtilea = surfaces[best_tiling]->mtilea;
 166                 surfaces[i]->tile_split = surfaces[best_tiling]->tile_split;
 167
 168                 /* adjust the texture layer offsets */
 169                 off = align(off, surfaces[i]->bo_alignment);
 170                 for (j = 0; j < Elements(surfaces[i]->level); ++j)
 171                         surfaces[i]->level[j].offset += off;
 172                 off += surfaces[i]->bo_size;
 173         }
 174
 175         for (i = 0, size = 0, alignment = 0; i < VL_NUM_COMPONENTS; ++i) {
 176                 if (!buffers[i] || !*buffers[i])
 177                         continue;
 178
 179                 size = align(size, (*buffers[i])->alignment);
 180                 size += (*buffers[i])->size;
 181                 alignment = MAX2(alignment, (*buffers[i])->alignment * 1);
 182         }
 183
 184         if (!size)
 185                 return;
 186
 187         /* TODO: 2D tiling workaround */
 188         alignment *= 2;
 189
 190         pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM, 0);
 191         if (!pb)
 192                 return;
 193
 194         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
 195                 if (!buffers[i] || !*buffers[i])
 196                         continue;
 197
 198                 pb_reference(buffers[i], pb);
 199         }
 200
 201         pb_reference(&pb, NULL);
 202 }
 203
 204 int rvid_get_video_param(struct pipe_screen *screen,
 205                          enum pipe_video_profile profile,
 206                          enum pipe_video_entrypoint entrypoint,
 207                          enum pipe_video_cap param)
 208 {
 209         struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
 210
 211         if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
 212                 switch (param) {
 213                 case PIPE_VIDEO_CAP_SUPPORTED:
 214                         return u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC &&
 215                                 rvce_is_fw_version_supported(rscreen);
 216                 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 217                         return 1;
 218                 case PIPE_VIDEO_CAP_MAX_WIDTH:
 219                         return 2048;
 220                 case PIPE_VIDEO_CAP_MAX_HEIGHT:
 221                         return 1152;
 222                 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 223                         return PIPE_FORMAT_NV12;
 224                 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 225                         return false;
 226                 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 227                         return false;
 228                 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 229                         return true;
 230                 default:
 231                         return 0;
 232                 }
 233         }
 234
 235         /* UVD 2.x limits */
 236         if (rscreen->family < CHIP_PALM) {
 237                 enum pipe_video_format codec = u_reduce_video_profile(profile);
 238                 switch (param) {
 239                 case PIPE_VIDEO_CAP_SUPPORTED:
 240                         /* no support for MPEG4 */
 241                         return codec != PIPE_VIDEO_FORMAT_MPEG4 &&
 242                                /* FIXME: VC-1 simple/main profile is broken */
 243                                profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE &&
 244                                profile != PIPE_VIDEO_PROFILE_VC1_MAIN;
 245                 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 246                 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 247                         /* MPEG2 only with shaders and no support for
 248                            interlacing on R6xx style UVD */
 249                         return codec != PIPE_VIDEO_FORMAT_MPEG12 &&
 250                                rscreen->family > CHIP_RV770;
 251                 default:
 252                         break;
 253                 }
 254         }
 255
 256         switch (param) {
 257         case PIPE_VIDEO_CAP_SUPPORTED:
 258                 switch (u_reduce_video_profile(profile)) {
 259                 case PIPE_VIDEO_FORMAT_MPEG12:
 260                 case PIPE_VIDEO_FORMAT_MPEG4:
 261                 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
 262                         return entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
 263                 case PIPE_VIDEO_FORMAT_VC1:
 264                         /* FIXME: VC-1 simple/main profile is broken */
 265                         return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED &&
 266                                entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
 267                 default:
 268                         return false;
 269                 }
 270         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 271                 return 1;
 272         case PIPE_VIDEO_CAP_MAX_WIDTH:
 273                 return 2048;
 274         case PIPE_VIDEO_CAP_MAX_HEIGHT:
 275                 return 1152;
 276         case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 277                 return PIPE_FORMAT_NV12;
 278         case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 279                 return true;
 280         case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 281                 return true;
 282         case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 283                 return true;
 284         case PIPE_VIDEO_CAP_MAX_LEVEL:
 285                 switch (profile) {
 286                 case PIPE_VIDEO_PROFILE_MPEG1:
 287                         return 0;
 288                 case PIPE_VIDEO_PROFILE_MPEG2_SIMPLE:
 289                 case PIPE_VIDEO_PROFILE_MPEG2_MAIN:
 290                         return 3;
 291                 case PIPE_VIDEO_PROFILE_MPEG4_SIMPLE:
 292                         return 3;
 293                 case PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE:
 294                         return 5;
 295                 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
 296                         return 1;
 297                 case PIPE_VIDEO_PROFILE_VC1_MAIN:
 298                         return 2;
 299                 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
 300                         return 4;
 301                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
 302                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
 303                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
 304                         return 41;
 305                 default:
 306                         return 0;
 307                 }
 308         default:
 309                 return 0;
 310         }
 311 }
 312
 313 boolean rvid_is_format_supported(struct pipe_screen *screen,
 314                                  enum pipe_format format,
 315                                  enum pipe_video_profile profile,
 316                                  enum pipe_video_entrypoint entrypoint)
 317 {
 318         /* we can only handle this one with UVD */
 319         if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
 320                 return format == PIPE_FORMAT_NV12;
 321
 322         return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
 323 }