src/gallium/drivers/radeon/radeon_video.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <unistd.h>
  35
  36 #include "util/u_memory.h"
  37 #include "util/u_video.h"
  38
  39 #include "vl/vl_defines.h"
  40 #include "vl/vl_video_buffer.h"
  41
  42 #include "../../winsys/radeon/drm/radeon_winsys.h"
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 /* generate an stream handle */
  48 unsigned rvid_alloc_stream_handle()
  49 {
  50         static unsigned counter = 0;
  51         unsigned stream_handle = 0;
  52         unsigned pid = getpid();
  53         int i;
  54
  55         for (i = 0; i < 32; ++i)
  56                 stream_handle |= ((pid >> i) & 1) << (31 - i);
  57
  58         stream_handle ^= ++counter;
  59         return stream_handle;
  60 }
  61
  62 /* create a buffer in the winsys */
  63 bool rvid_create_buffer(struct radeon_winsys *ws, struct rvid_buffer *buffer,
  64                         unsigned size, enum radeon_bo_domain domain)
  65 {
  66         buffer->domain = domain;
  67
  68         buffer->buf = ws->buffer_create(ws, size, 4096, false, domain);
  69         if (!buffer->buf)
  70                 return false;
  71
  72         buffer->cs_handle = ws->buffer_get_cs_handle(buffer->buf);
  73         if (!buffer->cs_handle)
  74                 return false;
  75
  76         return true;
  77 }
  78
  79 /* destroy a buffer */
  80 void rvid_destroy_buffer(struct rvid_buffer *buffer)
  81 {
  82         pb_reference(&buffer->buf, NULL);
  83         buffer->cs_handle = NULL;
  84 }
  85
  86 /* reallocate a buffer, preserving its content */
  87 bool rvid_resize_buffer(struct radeon_winsys *ws, struct radeon_winsys_cs *cs,
  88                         struct rvid_buffer *new_buf, unsigned new_size)
  89 {
  90         unsigned bytes = MIN2(new_buf->buf->size, new_size);
  91         struct rvid_buffer old_buf = *new_buf;
  92         void *src = NULL, *dst = NULL;
  93
  94         if (!rvid_create_buffer(ws, new_buf, new_size, new_buf->domain))
  95                 goto error;
  96
  97         src = ws->buffer_map(old_buf.cs_handle, cs, PIPE_TRANSFER_READ);
  98         if (!src)
  99                 goto error;
 100
 101         dst = ws->buffer_map(new_buf->cs_handle, cs, PIPE_TRANSFER_WRITE);
 102         if (!dst)
 103                 goto error;
 104
 105         memcpy(dst, src, bytes);
 106         if (new_size > bytes) {
 107                 new_size -= bytes;
 108                 dst += bytes;
 109                 memset(dst, 0, new_size);
 110         }
 111         ws->buffer_unmap(new_buf->cs_handle);
 112         ws->buffer_unmap(old_buf.cs_handle);
 113         rvid_destroy_buffer(&old_buf);
 114         return true;
 115
 116 error:
 117         if (src)
 118                 ws->buffer_unmap(old_buf.cs_handle);
 119         rvid_destroy_buffer(new_buf);
 120         *new_buf = old_buf;
 121         return false;
 122 }
 123
 124 /* clear the buffer with zeros */
 125 void rvid_clear_buffer(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, struct rvid_buffer* buffer)
 126 {
 127         void *ptr = ws->buffer_map(buffer->cs_handle, cs, PIPE_TRANSFER_WRITE);
 128         if (!ptr)
 129                 return;
 130
 131         memset(ptr, 0, buffer->buf->size);
 132         ws->buffer_unmap(buffer->cs_handle);
 133 }
 134
 135 /**
 136  * join surfaces into the same buffer with identical tiling params
 137  * sumup their sizes and replace the backend buffers with a single bo
 138  */
 139 void rvid_join_surfaces(struct radeon_winsys* ws, unsigned bind,
 140                         struct pb_buffer** buffers[VL_NUM_COMPONENTS],
 141                         struct radeon_surface *surfaces[VL_NUM_COMPONENTS])
 142 {
 143         unsigned best_tiling, best_wh, off;
 144         unsigned size, alignment;
 145         struct pb_buffer *pb;
 146         unsigned i, j;
 147
 148         for (i = 0, best_tiling = 0, best_wh = ~0; i < VL_NUM_COMPONENTS; ++i) {
 149                 unsigned wh;
 150
 151                 if (!surfaces[i])
 152                         continue;
 153
 154                 /* choose the smallest bank w/h for now */
 155                 wh = surfaces[i]->bankw * surfaces[i]->bankh;
 156                 if (wh < best_wh) {
 157                         best_wh = wh;
 158                         best_tiling = i;
 159                 }
 160         }
 161
 162         for (i = 0, off = 0; i < VL_NUM_COMPONENTS; ++i) {
 163                 if (!surfaces[i])
 164                         continue;
 165
 166                 /* copy the tiling parameters */
 167                 surfaces[i]->bankw = surfaces[best_tiling]->bankw;
 168                 surfaces[i]->bankh = surfaces[best_tiling]->bankh;
 169                 surfaces[i]->mtilea = surfaces[best_tiling]->mtilea;
 170                 surfaces[i]->tile_split = surfaces[best_tiling]->tile_split;
 171
 172                 /* adjust the texture layer offsets */
 173                 off = align(off, surfaces[i]->bo_alignment);
 174                 for (j = 0; j < Elements(surfaces[i]->level); ++j)
 175                         surfaces[i]->level[j].offset += off;
 176                 off += surfaces[i]->bo_size;
 177         }
 178
 179         for (i = 0, size = 0, alignment = 0; i < VL_NUM_COMPONENTS; ++i) {
 180                 if (!buffers[i] || !*buffers[i])
 181                         continue;
 182
 183                 size = align(size, (*buffers[i])->alignment);
 184                 size += (*buffers[i])->size;
 185                 alignment = MAX2(alignment, (*buffers[i])->alignment * 1);
 186         }
 187
 188         if (!size)
 189                 return;
 190
 191         /* TODO: 2D tiling workaround */
 192         alignment *= 2;
 193
 194         pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM);
 195         if (!pb)
 196                 return;
 197
 198         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
 199                 if (!buffers[i] || !*buffers[i])
 200                         continue;
 201
 202                 pb_reference(buffers[i], pb);
 203         }
 204
 205         pb_reference(&pb, NULL);
 206 }
 207
 208 int rvid_get_video_param(struct pipe_screen *screen,
 209                          enum pipe_video_profile profile,
 210                          enum pipe_video_entrypoint entrypoint,
 211                          enum pipe_video_cap param)
 212 {
 213         struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
 214
 215         if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
 216                 switch (param) {
 217                 case PIPE_VIDEO_CAP_SUPPORTED:
 218                         return u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC &&
 219                                 rvce_is_fw_version_supported(rscreen);
 220                 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 221                         return 1;
 222                 case PIPE_VIDEO_CAP_MAX_WIDTH:
 223                         return 2048;
 224                 case PIPE_VIDEO_CAP_MAX_HEIGHT:
 225                         return 1152;
 226                 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 227                         return PIPE_FORMAT_NV12;
 228                 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 229                         return false;
 230                 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 231                         return false;
 232                 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 233                         return true;
 234                 default:
 235                         return 0;
 236                 }
 237         }
 238
 239         /* UVD 2.x limits */
 240         if (rscreen->family < CHIP_PALM) {
 241                 enum pipe_video_format codec = u_reduce_video_profile(profile);
 242                 switch (param) {
 243                 case PIPE_VIDEO_CAP_SUPPORTED:
 244                         /* no support for MPEG4 */
 245                         return codec != PIPE_VIDEO_FORMAT_MPEG4 &&
 246                                /* FIXME: VC-1 simple/main profile is broken */
 247                                profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE &&
 248                                profile != PIPE_VIDEO_PROFILE_VC1_MAIN;
 249                 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 250                 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 251                         /* and MPEG2 only with shaders */
 252                         return codec != PIPE_VIDEO_FORMAT_MPEG12;
 253                 default:
 254                         break;
 255                 }
 256         }
 257
 258         switch (param) {
 259         case PIPE_VIDEO_CAP_SUPPORTED:
 260                 switch (u_reduce_video_profile(profile)) {
 261                 case PIPE_VIDEO_FORMAT_MPEG12:
 262                 case PIPE_VIDEO_FORMAT_MPEG4:
 263                 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
 264                         return entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
 265                 case PIPE_VIDEO_FORMAT_VC1:
 266                         /* FIXME: VC-1 simple/main profile is broken */
 267                         return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED &&
 268                                entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
 269                 default:
 270                         return false;
 271                 }
 272         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 273                 return 1;
 274         case PIPE_VIDEO_CAP_MAX_WIDTH:
 275                 return 2048;
 276         case PIPE_VIDEO_CAP_MAX_HEIGHT:
 277                 return 1152;
 278         case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 279                 return PIPE_FORMAT_NV12;
 280         case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 281                 return true;
 282         case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 283                 return true;
 284         case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 285                 return true;
 286         case PIPE_VIDEO_CAP_MAX_LEVEL:
 287                 switch (profile) {
 288                 case PIPE_VIDEO_PROFILE_MPEG1:
 289                         return 0;
 290                 case PIPE_VIDEO_PROFILE_MPEG2_SIMPLE:
 291                 case PIPE_VIDEO_PROFILE_MPEG2_MAIN:
 292                         return 3;
 293                 case PIPE_VIDEO_PROFILE_MPEG4_SIMPLE:
 294                         return 3;
 295                 case PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE:
 296                         return 5;
 297                 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
 298                         return 1;
 299                 case PIPE_VIDEO_PROFILE_VC1_MAIN:
 300                         return 2;
 301                 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
 302                         return 4;
 303                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
 304                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
 305                 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
 306                         return 41;
 307                 default:
 308                         return 0;
 309                 }
 310         default:
 311                 return 0;
 312         }
 313 }
 314
 315 boolean rvid_is_format_supported(struct pipe_screen *screen,
 316                                  enum pipe_format format,
 317                                  enum pipe_video_profile profile,
 318                                  enum pipe_video_entrypoint entrypoint)
 319 {
 320         /* we can only handle this one with UVD */
 321         if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
 322                 return format == PIPE_FORMAT_NV12;
 323
 324         return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
 325 }