src/gallium/drivers/radeonsi/radeonsi_pipe.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef RADEONSI_PIPE_H
  27 #define RADEONSI_PIPE_H
  28
  29 #include "../radeon/r600_pipe_common.h"
  30
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_context.h"
  33 #include "util/u_format.h"
  34 #include "util/u_math.h"
  35 #include "util/u_slab.h"
  36 #include "r600.h"
  37 #include "radeonsi_public.h"
  38 #include "radeonsi_pm4.h"
  39 #include "si_state.h"
  40 #include "r600_resource.h"
  41 #include "sid.h"
  42
  43 #ifdef PIPE_ARCH_BIG_ENDIAN
  44 #define R600_BIG_ENDIAN 1
  45 #else
  46 #define R600_BIG_ENDIAN 0
  47 #endif
  48
  49 #define R600_TRACE_CS 0
  50 #define R600_TRACE_CS_DWORDS            6
  51
  52 #define SI_MAX_DRAW_CS_DWORDS 18
  53
  54 struct si_pipe_compute;
  55
  56 struct r600_pipe_fences {
  57         struct r600_resource            *bo;
  58         unsigned                        *data;
  59         unsigned                        next_index;
  60         /* linked list of preallocated blocks */
  61         struct list_head                blocks;
  62         /* linked list of freed fences */
  63         struct list_head                pool;
  64         pipe_mutex                      mutex;
  65 };
  66
  67 struct r600_screen {
  68         struct r600_common_screen       b;
  69         struct r600_pipe_fences         fences;
  70 #if R600_TRACE_CS
  71         struct r600_resource            *trace_bo;
  72         uint32_t                        *trace_ptr;
  73         unsigned                        cs_count;
  74 #endif
  75 };
  76
  77 struct si_pipe_sampler_view {
  78         struct pipe_sampler_view        base;
  79         struct r600_resource            *resource;
  80         uint32_t                        state[8];
  81         uint32_t                        fmask_state[8];
  82 };
  83
  84 struct si_pipe_sampler_state {
  85         uint32_t                        val[4];
  86         uint32_t                        border_color[4];
  87 };
  88
  89 struct si_cs_shader_state {
  90         struct si_pipe_compute          *program;
  91 };
  92
  93 struct r600_textures_info {
  94         struct si_sampler_views         views;
  95         struct si_pipe_sampler_state    *samplers[NUM_TEX_UNITS];
  96         unsigned                        n_views;
  97         uint32_t                        depth_texture_mask; /* which textures are depth */
  98         uint32_t                        compressed_colortex_mask;
  99         unsigned                        n_samplers;
 100 };
 101
 102 struct r600_fence {
 103         struct pipe_reference           reference;
 104         unsigned                        index; /* in the shared bo */
 105         struct r600_resource            *sleep_bo;
 106         struct list_head                head;
 107 };
 108
 109 #define FENCE_BLOCK_SIZE 16
 110
 111 struct r600_fence_block {
 112         struct r600_fence               fences[FENCE_BLOCK_SIZE];
 113         struct list_head                head;
 114 };
 115
 116 #define SI_NUM_ATOMS(rctx) (sizeof((rctx)->atoms)/sizeof((rctx)->atoms.array[0]))
 117 #define SI_NUM_SHADERS (PIPE_SHADER_FRAGMENT+1)
 118
 119 struct r600_context {
 120         struct r600_common_context      b;
 121         struct blitter_context          *blitter;
 122         void                            *custom_dsa_flush_depth_stencil[8];
 123         void                            *custom_dsa_flush_depth[8];
 124         void                            *custom_dsa_flush_stencil[8];
 125         void                            *custom_dsa_flush_inplace;
 126         void                            *custom_blend_resolve;
 127         void                            *custom_blend_decompress;
 128         struct r600_screen              *screen;
 129
 130         union {
 131                 struct {
 132                         /* The order matters. */
 133                         struct r600_atom *const_buffers[SI_NUM_SHADERS];
 134                         struct r600_atom *sampler_views[SI_NUM_SHADERS];
 135                         struct r600_atom *streamout_buffers;
 136                         /* Caches must be flushed after resource descriptors are
 137                          * updated in memory. */
 138                         struct r600_atom *cache_flush;
 139                         struct r600_atom *streamout_begin;
 140                 };
 141                 struct r600_atom *array[0];
 142         } atoms;
 143
 144         struct si_vertex_element        *vertex_elements;
 145         struct pipe_framebuffer_state   framebuffer;
 146         unsigned                        fb_log_samples;
 147         unsigned                        fb_cb0_is_integer;
 148         unsigned                        fb_compressed_cb_mask;
 149         unsigned                        pa_sc_line_stipple;
 150         unsigned                        pa_su_sc_mode_cntl;
 151         /* for saving when using blitter */
 152         struct pipe_stencil_ref         stencil_ref;
 153         struct si_pipe_shader_selector  *ps_shader;
 154         struct si_pipe_shader_selector  *vs_shader;
 155         struct si_cs_shader_state       cs_shader_state;
 156         struct pipe_query               *current_render_cond;
 157         unsigned                        current_render_cond_mode;
 158         boolean                         current_render_cond_cond;
 159         struct pipe_query               *saved_render_cond;
 160         unsigned                        saved_render_cond_mode;
 161         boolean                         saved_render_cond_cond;
 162         /* shader information */
 163         unsigned                        sprite_coord_enable;
 164         unsigned                        export_16bpc;
 165         struct si_buffer_resources      const_buffers[SI_NUM_SHADERS];
 166         struct si_buffer_resources      streamout_buffers;
 167         struct r600_textures_info       samplers[SI_NUM_SHADERS];
 168         struct r600_resource            *border_color_table;
 169         unsigned                        border_color_offset;
 170
 171         struct u_upload_mgr             *uploader;
 172         struct util_slab_mempool        pool_transfers;
 173
 174         unsigned default_ps_gprs, default_vs_gprs;
 175
 176         /* Below are variables from the old r600_context.
 177          */
 178         unsigned                pm4_dirty_cdwords;
 179
 180         /* The list of active queries. Only one query of each type can be active. */
 181         struct list_head        active_nontimer_query_list;
 182         unsigned                num_cs_dw_nontimer_queries_suspend;
 183         /* If queries have been suspended. */
 184         bool                    nontimer_queries_suspended;
 185
 186         unsigned                backend_mask;
 187         unsigned                max_db; /* for OQ */
 188         boolean                 predicate_drawing;
 189
 190         /* Vertex and index buffers. */
 191         bool                    vertex_buffers_dirty;
 192         struct pipe_index_buffer index_buffer;
 193         struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 194         unsigned                nr_vertex_buffers;
 195
 196         /* With rasterizer discard, there doesn't have to be a pixel shader.
 197          * In that case, we bind this one: */
 198         struct si_pipe_shader   *dummy_pixel_shader;
 199         struct r600_atom        cache_flush;
 200
 201         /* SI state handling */
 202         union si_state  queued;
 203         union si_state  emitted;
 204 };
 205
 206 /* r600_blit.c */
 207 void si_init_blit_functions(struct r600_context *rctx);
 208 void si_flush_depth_textures(struct r600_context *rctx,
 209                              struct r600_textures_info *textures);
 210 void r600_decompress_color_textures(struct r600_context *rctx,
 211                                     struct r600_textures_info *textures);
 212
 213 /* r600_buffer.c */
 214 struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
 215                                        const struct pipe_resource *templ);
 216 void r600_upload_index_buffer(struct r600_context *rctx,
 217                               struct pipe_index_buffer *ib, unsigned count);
 218
 219
 220 /* r600_pipe.c */
 221 void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
 222                     unsigned flags);
 223 const char *r600_get_llvm_processor_name(enum radeon_family family);
 224
 225 /* r600_query.c */
 226 void r600_init_query_functions(struct r600_context *rctx);
 227
 228 /* r600_resource.c */
 229 void r600_init_context_resource_functions(struct r600_context *r600);
 230
 231 /* r600_translate.c */
 232 void r600_translate_index_buffer(struct r600_context *r600,
 233                                  struct pipe_index_buffer *ib,
 234                                  unsigned count);
 235
 236 #if R600_TRACE_CS
 237 void r600_trace_emit(struct r600_context *rctx);
 238 #endif
 239
 240 /* radeonsi_compute.c */
 241 void si_init_compute_functions(struct r600_context *rctx);
 242
 243 /* radeonsi_uvd.c */
 244 struct pipe_video_codec *radeonsi_uvd_create_decoder(struct pipe_context *context,
 245                                                      const struct pipe_video_codec *templ);
 246
 247 struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
 248                                                        const struct pipe_video_buffer *tmpl);
 249
 250 /*
 251  * common helpers
 252  */
 253 static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
 254 {
 255         return value * (1 << frac_bits);
 256 }
 257 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 258
 259 static INLINE unsigned si_map_swizzle(unsigned swizzle)
 260 {
 261         switch (swizzle) {
 262         case UTIL_FORMAT_SWIZZLE_Y:
 263                 return V_008F0C_SQ_SEL_Y;
 264         case UTIL_FORMAT_SWIZZLE_Z:
 265                 return V_008F0C_SQ_SEL_Z;
 266         case UTIL_FORMAT_SWIZZLE_W:
 267                 return V_008F0C_SQ_SEL_W;
 268         case UTIL_FORMAT_SWIZZLE_0:
 269                 return V_008F0C_SQ_SEL_0;
 270         case UTIL_FORMAT_SWIZZLE_1:
 271                 return V_008F0C_SQ_SEL_1;
 272         default: /* UTIL_FORMAT_SWIZZLE_X */
 273                 return V_008F0C_SQ_SEL_X;
 274         }
 275 }
 276
 277 static inline unsigned r600_tex_aniso_filter(unsigned filter)
 278 {
 279         if (filter <= 1)   return 0;
 280         if (filter <= 2)   return 1;
 281         if (filter <= 4)   return 2;
 282         if (filter <= 8)   return 3;
 283          /* else */        return 4;
 284 }
 285
 286 /* 12.4 fixed-point */
 287 static INLINE unsigned r600_pack_float_12p4(float x)
 288 {
 289         return x <= 0    ? 0 :
 290                x >= 4096 ? 0xffff : x * 16;
 291 }
 292
 293 #endif