2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef RADEONSI_PIPE_H
27 #define RADEONSI_PIPE_H
29 #include "../radeon/r600_pipe_common.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_context.h"
33 #include "util/u_format.h"
34 #include "util/u_math.h"
35 #include "util/u_slab.h"
37 #include "radeonsi_public.h"
38 #include "radeonsi_pm4.h"
40 #include "r600_resource.h"
43 #ifdef PIPE_ARCH_BIG_ENDIAN
44 #define R600_BIG_ENDIAN 1
46 #define R600_BIG_ENDIAN 0
49 #define R600_TRACE_CS 0
50 #define R600_TRACE_CS_DWORDS 6
52 #define SI_MAX_DRAW_CS_DWORDS 18
54 struct si_pipe_compute
;
56 struct r600_pipe_fences
{
57 struct r600_resource
*bo
;
60 /* linked list of preallocated blocks */
61 struct list_head blocks
;
62 /* linked list of freed fences */
63 struct list_head pool
;
68 struct r600_common_screen b
;
69 struct r600_tiling_info tiling_info
;
70 struct util_slab_mempool pool_buffers
;
71 struct r600_pipe_fences fences
;
73 struct r600_resource
*trace_bo
;
79 struct si_pipe_sampler_view
{
80 struct pipe_sampler_view base
;
81 struct r600_resource
*resource
;
83 uint32_t fmask_state
[8];
86 struct si_pipe_sampler_state
{
88 uint32_t border_color
[4];
91 struct si_cs_shader_state
{
92 struct si_pipe_compute
*program
;
95 struct r600_textures_info
{
96 struct si_sampler_views views
;
97 struct si_pipe_sampler_state
*samplers
[NUM_TEX_UNITS
];
99 uint32_t depth_texture_mask
; /* which textures are depth */
100 uint32_t compressed_colortex_mask
;
105 struct pipe_reference reference
;
106 unsigned index
; /* in the shared bo */
107 struct r600_resource
*sleep_bo
;
108 struct list_head head
;
111 #define FENCE_BLOCK_SIZE 16
113 struct r600_fence_block
{
114 struct r600_fence fences
[FENCE_BLOCK_SIZE
];
115 struct list_head head
;
118 #define SI_NUM_ATOMS(rctx) (sizeof((rctx)->atoms)/sizeof((rctx)->atoms.array[0]))
119 #define SI_NUM_SHADERS (PIPE_SHADER_FRAGMENT+1)
121 struct r600_context
{
122 struct r600_common_context b
;
123 struct blitter_context
*blitter
;
124 void *custom_dsa_flush_depth_stencil
[8];
125 void *custom_dsa_flush_depth
[8];
126 void *custom_dsa_flush_stencil
[8];
127 void *custom_dsa_flush_inplace
;
128 void *custom_blend_resolve
;
129 void *custom_blend_decompress
;
130 struct r600_screen
*screen
;
134 struct r600_atom
*const_buffers
[SI_NUM_SHADERS
];
135 struct r600_atom
*sampler_views
[SI_NUM_SHADERS
];
137 struct r600_atom
*array
[0];
140 struct si_vertex_element
*vertex_elements
;
141 struct pipe_framebuffer_state framebuffer
;
142 unsigned fb_log_samples
;
143 unsigned fb_cb0_is_integer
;
144 unsigned fb_compressed_cb_mask
;
145 unsigned pa_sc_line_stipple
;
146 unsigned pa_su_sc_mode_cntl
;
147 /* for saving when using blitter */
148 struct pipe_stencil_ref stencil_ref
;
149 struct si_pipe_shader_selector
*ps_shader
;
150 struct si_pipe_shader_selector
*vs_shader
;
151 struct si_cs_shader_state cs_shader_state
;
152 struct pipe_query
*current_render_cond
;
153 unsigned current_render_cond_mode
;
154 boolean current_render_cond_cond
;
155 struct pipe_query
*saved_render_cond
;
156 unsigned saved_render_cond_mode
;
157 boolean saved_render_cond_cond
;
158 /* shader information */
159 unsigned sprite_coord_enable
;
160 unsigned export_16bpc
;
161 struct si_buffer_resources const_buffers
[SI_NUM_SHADERS
];
162 struct r600_textures_info samplers
[SI_NUM_SHADERS
];
163 struct r600_resource
*border_color_table
;
164 unsigned border_color_offset
;
166 struct u_upload_mgr
*uploader
;
167 struct util_slab_mempool pool_transfers
;
169 unsigned default_ps_gprs
, default_vs_gprs
;
171 /* Below are variables from the old r600_context.
173 unsigned pm4_dirty_cdwords
;
175 /* The list of active queries. Only one query of each type can be active. */
176 struct list_head active_nontimer_query_list
;
177 unsigned num_cs_dw_nontimer_queries_suspend
;
178 unsigned num_cs_dw_streamout_end
;
180 unsigned backend_mask
;
181 unsigned max_db
; /* for OQ */
183 boolean predicate_drawing
;
185 unsigned num_so_targets
;
186 struct r600_so_target
*so_targets
[PIPE_MAX_SO_BUFFERS
];
187 boolean streamout_start
;
188 unsigned streamout_append_bitmask
;
189 unsigned *vs_so_stride_in_dw
;
190 unsigned *vs_shader_so_strides
;
192 /* Vertex and index buffers. */
193 bool vertex_buffers_dirty
;
194 struct pipe_index_buffer index_buffer
;
195 struct pipe_vertex_buffer vertex_buffer
[PIPE_MAX_ATTRIBS
];
196 unsigned nr_vertex_buffers
;
198 /* With rasterizer discard, there doesn't have to be a pixel shader.
199 * In that case, we bind this one: */
200 struct si_pipe_shader
*dummy_pixel_shader
;
202 /* SI state handling */
203 union si_state queued
;
204 union si_state emitted
;
206 bool flush_and_inv_cb_meta
;
210 void si_init_blit_functions(struct r600_context
*rctx
);
211 void r600_blit_decompress_depth(struct pipe_context
*ctx
,
212 struct r600_texture
*texture
,
213 struct r600_texture
*staging
,
214 unsigned first_level
, unsigned last_level
,
215 unsigned first_layer
, unsigned last_layer
,
216 unsigned first_sample
, unsigned last_sample
);
217 void si_flush_depth_textures(struct r600_context
*rctx
,
218 struct r600_textures_info
*textures
);
219 void r600_decompress_color_textures(struct r600_context
*rctx
,
220 struct r600_textures_info
*textures
);
223 bool si_init_resource(struct r600_screen
*rscreen
,
224 struct r600_resource
*res
,
225 unsigned size
, unsigned alignment
,
226 boolean use_reusable_pool
, unsigned usage
);
227 struct pipe_resource
*si_buffer_create(struct pipe_screen
*screen
,
228 const struct pipe_resource
*templ
);
229 void r600_upload_index_buffer(struct r600_context
*rctx
,
230 struct pipe_index_buffer
*ib
, unsigned count
);
234 void radeonsi_flush(struct pipe_context
*ctx
, struct pipe_fence_handle
**fence
,
236 const char *r600_get_llvm_processor_name(enum radeon_family family
);
239 void r600_init_query_functions(struct r600_context
*rctx
);
241 /* r600_resource.c */
242 void r600_init_context_resource_functions(struct r600_context
*r600
);
245 void r600_init_screen_texture_functions(struct pipe_screen
*screen
);
246 void si_init_surface_functions(struct r600_context
*r600
);
248 /* r600_translate.c */
249 void r600_translate_index_buffer(struct r600_context
*r600
,
250 struct pipe_index_buffer
*ib
,
254 void r600_trace_emit(struct r600_context
*rctx
);
257 /* radeonsi_compute.c */
258 void si_init_compute_functions(struct r600_context
*rctx
);
261 struct pipe_video_codec
*radeonsi_uvd_create_decoder(struct pipe_context
*context
,
262 const struct pipe_video_codec
*templ
);
264 struct pipe_video_buffer
*radeonsi_video_buffer_create(struct pipe_context
*pipe
,
265 const struct pipe_video_buffer
*tmpl
);
270 static INLINE
uint32_t S_FIXED(float value
, uint32_t frac_bits
)
272 return value
* (1 << frac_bits
);
274 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
276 static INLINE
unsigned si_map_swizzle(unsigned swizzle
)
279 case UTIL_FORMAT_SWIZZLE_Y
:
280 return V_008F0C_SQ_SEL_Y
;
281 case UTIL_FORMAT_SWIZZLE_Z
:
282 return V_008F0C_SQ_SEL_Z
;
283 case UTIL_FORMAT_SWIZZLE_W
:
284 return V_008F0C_SQ_SEL_W
;
285 case UTIL_FORMAT_SWIZZLE_0
:
286 return V_008F0C_SQ_SEL_0
;
287 case UTIL_FORMAT_SWIZZLE_1
:
288 return V_008F0C_SQ_SEL_1
;
289 default: /* UTIL_FORMAT_SWIZZLE_X */
290 return V_008F0C_SQ_SEL_X
;
294 static inline unsigned r600_tex_aniso_filter(unsigned filter
)
296 if (filter
<= 1) return 0;
297 if (filter
<= 2) return 1;
298 if (filter
<= 4) return 2;
299 if (filter
<= 8) return 3;
303 /* 12.4 fixed-point */
304 static INLINE
unsigned r600_pack_float_12p4(float x
)
307 x
>= 4096 ? 0xffff : x
* 16;