src/gallium/drivers/radeonsi/radeonsi_pipe.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef RADEONSI_PIPE_H
  27 #define RADEONSI_PIPE_H
  28
  29 #include "../radeon/r600_pipe_common.h"
  30
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_context.h"
  33 #include "util/u_format.h"
  34 #include "util/u_math.h"
  35 #include "util/u_slab.h"
  36 #include "r600.h"
  37 #include "radeonsi_public.h"
  38 #include "radeonsi_pm4.h"
  39 #include "si_state.h"
  40 #include "r600_resource.h"
  41 #include "sid.h"
  42
  43 #ifdef PIPE_ARCH_BIG_ENDIAN
  44 #define R600_BIG_ENDIAN 1
  45 #else
  46 #define R600_BIG_ENDIAN 0
  47 #endif
  48
  49 #define R600_TRACE_CS 0
  50 #define R600_TRACE_CS_DWORDS            6
  51
  52 #define SI_MAX_DRAW_CS_DWORDS 18
  53
  54 struct si_pipe_compute;
  55
  56 struct r600_screen {
  57         struct r600_common_screen       b;
  58 #if R600_TRACE_CS
  59         struct r600_resource            *trace_bo;
  60         uint32_t                        *trace_ptr;
  61         unsigned                        cs_count;
  62 #endif
  63 };
  64
  65 struct si_pipe_sampler_view {
  66         struct pipe_sampler_view        base;
  67         struct r600_resource            *resource;
  68         uint32_t                        state[8];
  69         uint32_t                        fmask_state[8];
  70 };
  71
  72 struct si_pipe_sampler_state {
  73         uint32_t                        val[4];
  74         uint32_t                        border_color[4];
  75 };
  76
  77 struct si_cs_shader_state {
  78         struct si_pipe_compute          *program;
  79 };
  80
  81 struct r600_textures_info {
  82         struct si_sampler_views         views;
  83         struct si_pipe_sampler_state    *samplers[NUM_TEX_UNITS];
  84         unsigned                        n_views;
  85         uint32_t                        depth_texture_mask; /* which textures are depth */
  86         uint32_t                        compressed_colortex_mask;
  87         unsigned                        n_samplers;
  88 };
  89
  90 #define SI_NUM_ATOMS(rctx) (sizeof((rctx)->atoms)/sizeof((rctx)->atoms.array[0]))
  91 #define SI_NUM_SHADERS (PIPE_SHADER_FRAGMENT+1)
  92
  93 struct r600_context {
  94         struct r600_common_context      b;
  95         struct blitter_context          *blitter;
  96         void                            *custom_dsa_flush_depth_stencil[8];
  97         void                            *custom_dsa_flush_depth[8];
  98         void                            *custom_dsa_flush_stencil[8];
  99         void                            *custom_dsa_flush_inplace;
 100         void                            *custom_blend_resolve;
 101         void                            *custom_blend_decompress;
 102         struct r600_screen              *screen;
 103
 104         union {
 105                 struct {
 106                         /* The order matters. */
 107                         struct r600_atom *const_buffers[SI_NUM_SHADERS];
 108                         struct r600_atom *sampler_views[SI_NUM_SHADERS];
 109                         struct r600_atom *streamout_buffers;
 110                         /* Caches must be flushed after resource descriptors are
 111                          * updated in memory. */
 112                         struct r600_atom *cache_flush;
 113                         struct r600_atom *streamout_begin;
 114                 };
 115                 struct r600_atom *array[0];
 116         } atoms;
 117
 118         struct si_vertex_element        *vertex_elements;
 119         struct pipe_framebuffer_state   framebuffer;
 120         unsigned                        fb_log_samples;
 121         unsigned                        fb_cb0_is_integer;
 122         unsigned                        fb_compressed_cb_mask;
 123         unsigned                        pa_sc_line_stipple;
 124         unsigned                        pa_su_sc_mode_cntl;
 125         /* for saving when using blitter */
 126         struct pipe_stencil_ref         stencil_ref;
 127         struct si_pipe_shader_selector  *ps_shader;
 128         struct si_pipe_shader_selector  *vs_shader;
 129         struct si_cs_shader_state       cs_shader_state;
 130         struct pipe_query               *current_render_cond;
 131         unsigned                        current_render_cond_mode;
 132         boolean                         current_render_cond_cond;
 133         struct pipe_query               *saved_render_cond;
 134         unsigned                        saved_render_cond_mode;
 135         boolean                         saved_render_cond_cond;
 136         /* shader information */
 137         unsigned                        sprite_coord_enable;
 138         unsigned                        export_16bpc;
 139         struct si_buffer_resources      const_buffers[SI_NUM_SHADERS];
 140         struct si_buffer_resources      streamout_buffers;
 141         struct r600_textures_info       samplers[SI_NUM_SHADERS];
 142         struct r600_resource            *border_color_table;
 143         unsigned                        border_color_offset;
 144
 145         struct u_upload_mgr             *uploader;
 146         struct util_slab_mempool        pool_transfers;
 147
 148         unsigned default_ps_gprs, default_vs_gprs;
 149
 150         /* Below are variables from the old r600_context.
 151          */
 152         unsigned                pm4_dirty_cdwords;
 153
 154         /* The list of active queries. Only one query of each type can be active. */
 155         struct list_head        active_nontimer_query_list;
 156         unsigned                num_cs_dw_nontimer_queries_suspend;
 157         /* If queries have been suspended. */
 158         bool                    nontimer_queries_suspended;
 159
 160         unsigned                backend_mask;
 161         unsigned                max_db; /* for OQ */
 162         boolean                 predicate_drawing;
 163
 164         /* Vertex and index buffers. */
 165         bool                    vertex_buffers_dirty;
 166         struct pipe_index_buffer index_buffer;
 167         struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 168         unsigned                nr_vertex_buffers;
 169
 170         /* With rasterizer discard, there doesn't have to be a pixel shader.
 171          * In that case, we bind this one: */
 172         struct si_pipe_shader   *dummy_pixel_shader;
 173         struct r600_atom        cache_flush;
 174         struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
 175
 176         /* SI state handling */
 177         union si_state  queued;
 178         union si_state  emitted;
 179 };
 180
 181 /* r600_blit.c */
 182 void si_init_blit_functions(struct r600_context *rctx);
 183 void si_flush_depth_textures(struct r600_context *rctx,
 184                              struct r600_textures_info *textures);
 185 void r600_decompress_color_textures(struct r600_context *rctx,
 186                                     struct r600_textures_info *textures);
 187
 188 /* r600_buffer.c */
 189 struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
 190                                        const struct pipe_resource *templ);
 191 void r600_upload_index_buffer(struct r600_context *rctx,
 192                               struct pipe_index_buffer *ib, unsigned count);
 193
 194
 195 /* r600_pipe.c */
 196 void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
 197                     unsigned flags);
 198 const char *r600_get_llvm_processor_name(enum radeon_family family);
 199
 200 /* r600_query.c */
 201 void r600_init_query_functions(struct r600_context *rctx);
 202
 203 /* r600_resource.c */
 204 void r600_init_context_resource_functions(struct r600_context *r600);
 205
 206 /* r600_translate.c */
 207 void r600_translate_index_buffer(struct r600_context *r600,
 208                                  struct pipe_index_buffer *ib,
 209                                  unsigned count);
 210
 211 #if R600_TRACE_CS
 212 void r600_trace_emit(struct r600_context *rctx);
 213 #endif
 214
 215 /* radeonsi_compute.c */
 216 void si_init_compute_functions(struct r600_context *rctx);
 217
 218 /* radeonsi_uvd.c */
 219 struct pipe_video_codec *radeonsi_uvd_create_decoder(struct pipe_context *context,
 220                                                      const struct pipe_video_codec *templ);
 221
 222 struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
 223                                                        const struct pipe_video_buffer *tmpl);
 224
 225 /*
 226  * common helpers
 227  */
 228 static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
 229 {
 230         return value * (1 << frac_bits);
 231 }
 232 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 233
 234 static INLINE unsigned si_map_swizzle(unsigned swizzle)
 235 {
 236         switch (swizzle) {
 237         case UTIL_FORMAT_SWIZZLE_Y:
 238                 return V_008F0C_SQ_SEL_Y;
 239         case UTIL_FORMAT_SWIZZLE_Z:
 240                 return V_008F0C_SQ_SEL_Z;
 241         case UTIL_FORMAT_SWIZZLE_W:
 242                 return V_008F0C_SQ_SEL_W;
 243         case UTIL_FORMAT_SWIZZLE_0:
 244                 return V_008F0C_SQ_SEL_0;
 245         case UTIL_FORMAT_SWIZZLE_1:
 246                 return V_008F0C_SQ_SEL_1;
 247         default: /* UTIL_FORMAT_SWIZZLE_X */
 248                 return V_008F0C_SQ_SEL_X;
 249         }
 250 }
 251
 252 static inline unsigned r600_tex_aniso_filter(unsigned filter)
 253 {
 254         if (filter <= 1)   return 0;
 255         if (filter <= 2)   return 1;
 256         if (filter <= 4)   return 2;
 257         if (filter <= 8)   return 3;
 258          /* else */        return 4;
 259 }
 260
 261 /* 12.4 fixed-point */
 262 static INLINE unsigned r600_pack_float_12p4(float x)
 263 {
 264         return x <= 0    ? 0 :
 265                x >= 4096 ? 0xffff : x * 16;
 266 }
 267
 268 #endif