2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef RADEONSI_PIPE_H
27 #define RADEONSI_PIPE_H
29 #include "../radeon/r600_pipe_common.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_context.h"
33 #include "util/u_format.h"
34 #include "util/u_math.h"
35 #include "util/u_slab.h"
37 #include "radeonsi_public.h"
38 #include "radeonsi_pm4.h"
40 #include "r600_resource.h"
43 #ifdef PIPE_ARCH_BIG_ENDIAN
44 #define R600_BIG_ENDIAN 1
46 #define R600_BIG_ENDIAN 0
49 #define R600_TRACE_CS 0
50 #define R600_TRACE_CS_DWORDS 6
52 #define SI_MAX_DRAW_CS_DWORDS 18
54 struct si_pipe_compute
;
57 struct r600_common_screen b
;
59 struct r600_resource
*trace_bo
;
65 struct si_pipe_sampler_view
{
66 struct pipe_sampler_view base
;
67 struct r600_resource
*resource
;
69 uint32_t fmask_state
[8];
72 struct si_pipe_sampler_state
{
74 uint32_t border_color
[4];
77 struct si_cs_shader_state
{
78 struct si_pipe_compute
*program
;
81 struct r600_textures_info
{
82 struct si_sampler_views views
;
83 struct si_pipe_sampler_state
*samplers
[NUM_TEX_UNITS
];
85 uint32_t depth_texture_mask
; /* which textures are depth */
86 uint32_t compressed_colortex_mask
;
90 #define SI_NUM_ATOMS(rctx) (sizeof((rctx)->atoms)/sizeof((rctx)->atoms.array[0]))
91 #define SI_NUM_SHADERS (PIPE_SHADER_FRAGMENT+1)
94 struct r600_common_context b
;
95 struct blitter_context
*blitter
;
96 void *custom_dsa_flush_depth_stencil
[8];
97 void *custom_dsa_flush_depth
[8];
98 void *custom_dsa_flush_stencil
[8];
99 void *custom_dsa_flush_inplace
;
100 void *custom_blend_resolve
;
101 void *custom_blend_decompress
;
102 struct r600_screen
*screen
;
106 /* The order matters. */
107 struct r600_atom
*const_buffers
[SI_NUM_SHADERS
];
108 struct r600_atom
*sampler_views
[SI_NUM_SHADERS
];
109 struct r600_atom
*streamout_buffers
;
110 /* Caches must be flushed after resource descriptors are
111 * updated in memory. */
112 struct r600_atom
*cache_flush
;
113 struct r600_atom
*streamout_begin
;
115 struct r600_atom
*array
[0];
118 struct si_vertex_element
*vertex_elements
;
119 struct pipe_framebuffer_state framebuffer
;
120 unsigned fb_log_samples
;
121 unsigned fb_cb0_is_integer
;
122 unsigned fb_compressed_cb_mask
;
123 unsigned pa_sc_line_stipple
;
124 unsigned pa_su_sc_mode_cntl
;
125 /* for saving when using blitter */
126 struct pipe_stencil_ref stencil_ref
;
127 struct si_pipe_shader_selector
*ps_shader
;
128 struct si_pipe_shader_selector
*vs_shader
;
129 struct si_cs_shader_state cs_shader_state
;
130 struct pipe_query
*current_render_cond
;
131 unsigned current_render_cond_mode
;
132 boolean current_render_cond_cond
;
133 struct pipe_query
*saved_render_cond
;
134 unsigned saved_render_cond_mode
;
135 boolean saved_render_cond_cond
;
136 /* shader information */
137 unsigned sprite_coord_enable
;
138 unsigned export_16bpc
;
139 struct si_buffer_resources const_buffers
[SI_NUM_SHADERS
];
140 struct si_buffer_resources streamout_buffers
;
141 struct r600_textures_info samplers
[SI_NUM_SHADERS
];
142 struct r600_resource
*border_color_table
;
143 unsigned border_color_offset
;
145 unsigned default_ps_gprs
, default_vs_gprs
;
147 /* Below are variables from the old r600_context.
149 unsigned pm4_dirty_cdwords
;
151 /* The list of active queries. Only one query of each type can be active. */
152 struct list_head active_nontimer_query_list
;
153 unsigned num_cs_dw_nontimer_queries_suspend
;
154 /* If queries have been suspended. */
155 bool nontimer_queries_suspended
;
157 unsigned backend_mask
;
158 unsigned max_db
; /* for OQ */
159 boolean predicate_drawing
;
161 /* Vertex and index buffers. */
162 bool vertex_buffers_dirty
;
163 struct pipe_index_buffer index_buffer
;
164 struct pipe_vertex_buffer vertex_buffer
[PIPE_MAX_ATTRIBS
];
165 unsigned nr_vertex_buffers
;
167 /* With rasterizer discard, there doesn't have to be a pixel shader.
168 * In that case, we bind this one: */
169 struct si_pipe_shader
*dummy_pixel_shader
;
170 struct r600_atom cache_flush
;
171 struct pipe_constant_buffer null_const_buf
; /* used for set_constant_buffer(NULL) on CIK */
173 /* SI state handling */
174 union si_state queued
;
175 union si_state emitted
;
179 void si_init_blit_functions(struct r600_context
*rctx
);
180 void si_flush_depth_textures(struct r600_context
*rctx
,
181 struct r600_textures_info
*textures
);
182 void r600_decompress_color_textures(struct r600_context
*rctx
,
183 struct r600_textures_info
*textures
);
186 void r600_upload_index_buffer(struct r600_context
*rctx
,
187 struct pipe_index_buffer
*ib
, unsigned count
);
191 void radeonsi_flush(struct pipe_context
*ctx
, struct pipe_fence_handle
**fence
,
193 const char *r600_get_llvm_processor_name(enum radeon_family family
);
196 void r600_init_query_functions(struct r600_context
*rctx
);
198 /* r600_resource.c */
199 void r600_init_context_resource_functions(struct r600_context
*r600
);
201 /* r600_translate.c */
202 void r600_translate_index_buffer(struct r600_context
*r600
,
203 struct pipe_index_buffer
*ib
,
207 void r600_trace_emit(struct r600_context
*rctx
);
210 /* radeonsi_compute.c */
211 void si_init_compute_functions(struct r600_context
*rctx
);
214 struct pipe_video_codec
*radeonsi_uvd_create_decoder(struct pipe_context
*context
,
215 const struct pipe_video_codec
*templ
);
217 struct pipe_video_buffer
*radeonsi_video_buffer_create(struct pipe_context
*pipe
,
218 const struct pipe_video_buffer
*tmpl
);
223 static INLINE
uint32_t S_FIXED(float value
, uint32_t frac_bits
)
225 return value
* (1 << frac_bits
);
227 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
229 static INLINE
unsigned si_map_swizzle(unsigned swizzle
)
232 case UTIL_FORMAT_SWIZZLE_Y
:
233 return V_008F0C_SQ_SEL_Y
;
234 case UTIL_FORMAT_SWIZZLE_Z
:
235 return V_008F0C_SQ_SEL_Z
;
236 case UTIL_FORMAT_SWIZZLE_W
:
237 return V_008F0C_SQ_SEL_W
;
238 case UTIL_FORMAT_SWIZZLE_0
:
239 return V_008F0C_SQ_SEL_0
;
240 case UTIL_FORMAT_SWIZZLE_1
:
241 return V_008F0C_SQ_SEL_1
;
242 default: /* UTIL_FORMAT_SWIZZLE_X */
243 return V_008F0C_SQ_SEL_X
;
247 static inline unsigned r600_tex_aniso_filter(unsigned filter
)
249 if (filter
<= 1) return 0;
250 if (filter
<= 2) return 1;
251 if (filter
<= 4) return 2;
252 if (filter
<= 8) return 3;
256 /* 12.4 fixed-point */
257 static INLINE
unsigned r600_pack_float_12p4(float x
)
260 x
>= 4096 ? 0xffff : x
* 16;