radeonsi: bind streamout buffers to VGT and the vertex shader
[mesa.git] / src / gallium / drivers / radeonsi / radeonsi_shader.h
1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
27 */
28
29 #ifndef RADEONSI_SHADER_H
30 #define RADEONSI_SHADER_H
31
32 #include <llvm-c/Core.h> /* LLVMModuleRef */
33
34 #define SI_SGPR_CONST 0
35 #define SI_SGPR_SAMPLER 2
36 #define SI_SGPR_RESOURCE 4
37 #define SI_SGPR_VERTEX_BUFFER 6 /* VS only */
38 #define SI_SGPR_SO_BUFFER 8 /* VS only, stream-out */
39 #define SI_SGPR_START_INSTANCE 10 /* VS only */
40
41 #define SI_VS_NUM_USER_SGPR 11
42 #define SI_PS_NUM_USER_SGPR 6
43
44 /* LLVM function parameter indices */
45 #define SI_PARAM_CONST 0
46 #define SI_PARAM_SAMPLER 1
47 #define SI_PARAM_RESOURCE 2
48
49 /* VS only parameters */
50 #define SI_PARAM_VERTEX_BUFFER 3
51 #define SI_PARAM_SO_BUFFER 4
52 #define SI_PARAM_START_INSTANCE 5
53 #define SI_PARAM_VERTEX_ID 6
54 #define SI_PARAM_DUMMY_0 7
55 #define SI_PARAM_DUMMY_1 8
56 #define SI_PARAM_INSTANCE_ID 9
57
58 /* PS only parameters */
59 #define SI_PARAM_PRIM_MASK 3
60 #define SI_PARAM_PERSP_SAMPLE 4
61 #define SI_PARAM_PERSP_CENTER 5
62 #define SI_PARAM_PERSP_CENTROID 6
63 #define SI_PARAM_PERSP_PULL_MODEL 7
64 #define SI_PARAM_LINEAR_SAMPLE 8
65 #define SI_PARAM_LINEAR_CENTER 9
66 #define SI_PARAM_LINEAR_CENTROID 10
67 #define SI_PARAM_LINE_STIPPLE_TEX 11
68 #define SI_PARAM_POS_X_FLOAT 12
69 #define SI_PARAM_POS_Y_FLOAT 13
70 #define SI_PARAM_POS_Z_FLOAT 14
71 #define SI_PARAM_POS_W_FLOAT 15
72 #define SI_PARAM_FRONT_FACE 16
73 #define SI_PARAM_ANCILLARY 17
74 #define SI_PARAM_SAMPLE_COVERAGE 18
75 #define SI_PARAM_POS_FIXED_PT 19
76
77 struct si_shader_io {
78 unsigned name;
79 int sid;
80 unsigned param_offset;
81 unsigned interpolate;
82 bool centroid;
83 };
84
85 struct si_pipe_shader;
86
87 struct si_pipe_shader_selector {
88 struct si_pipe_shader *current;
89
90 struct tgsi_token *tokens;
91 struct pipe_stream_output_info so;
92
93 unsigned num_shaders;
94
95 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
96 unsigned type;
97
98 /* 1 when the shader contains
99 * TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS, otherwise it's 0.
100 * Used to determine whether we need to include nr_cbufs in the key */
101 unsigned fs_write_all;
102 };
103
104 struct si_shader {
105 unsigned ninput;
106 struct si_shader_io input[40];
107
108 unsigned noutput;
109 struct si_shader_io output[40];
110
111 unsigned ninterp;
112 bool uses_kill;
113 bool uses_instanceid;
114 bool fs_write_all;
115 bool vs_out_misc_write;
116 bool vs_out_point_size;
117 unsigned nr_cbufs;
118 unsigned nr_pos_exports;
119 unsigned clip_dist_write;
120 };
121
122 union si_shader_key {
123 struct {
124 unsigned export_16bpc:8;
125 unsigned nr_cbufs:4;
126 unsigned color_two_side:1;
127 unsigned alpha_func:3;
128 unsigned flatshade:1;
129 unsigned alpha_to_one:1;
130 float alpha_ref;
131 } ps;
132 struct {
133 unsigned instance_divisors[PIPE_MAX_ATTRIBS];
134 unsigned ucps_enabled:2;
135 } vs;
136 };
137
138 struct si_pipe_shader {
139 struct si_pipe_shader_selector *selector;
140 struct si_pipe_shader *next_variant;
141 struct si_shader shader;
142 struct si_pm4_state *pm4;
143 struct r600_resource *bo;
144 unsigned num_sgprs;
145 unsigned num_vgprs;
146 unsigned lds_size;
147 unsigned spi_ps_input_ena;
148 unsigned spi_shader_col_format;
149 unsigned cb_shader_mask;
150 bool cb0_is_integer;
151 unsigned sprite_coord_enable;
152 union si_shader_key key;
153 };
154
155 /* radeonsi_shader.c */
156 int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
157 int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
158 int si_compile_llvm(struct r600_context *rctx, struct si_pipe_shader *shader,
159 LLVMModuleRef mod);
160 void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
161
162 #endif