radeonsi: disable alpha-to-coverage for integer colorbuffers
[mesa.git] / src / gallium / drivers / radeonsi / radeonsi_shader.h
1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
27 */
28
29 #ifndef RADEONSI_SHADER_H
30 #define RADEONSI_SHADER_H
31
32 #include <llvm-c/Core.h> /* LLVMModuleRef */
33
34 #define SI_SGPR_CONST 0
35 #define SI_SGPR_SAMPLER 2
36 #define SI_SGPR_RESOURCE 4
37 #define SI_SGPR_VERTEX_BUFFER 6
38 #define SI_SGPR_START_INSTANCE 8
39
40 #define SI_VS_NUM_USER_SGPR 9
41 #define SI_PS_NUM_USER_SGPR 6
42
43 /* LLVM function parameter indices */
44 #define SI_PARAM_CONST 0
45 #define SI_PARAM_SAMPLER 1
46 #define SI_PARAM_RESOURCE 2
47
48 /* VS only parameters */
49 #define SI_PARAM_VERTEX_BUFFER 3
50 #define SI_PARAM_START_INSTANCE 4
51 #define SI_PARAM_VERTEX_ID 5
52 #define SI_PARAM_DUMMY_0 6
53 #define SI_PARAM_DUMMY_1 7
54 #define SI_PARAM_INSTANCE_ID 8
55
56 /* PS only parameters */
57 #define SI_PARAM_PRIM_MASK 3
58 #define SI_PARAM_PERSP_SAMPLE 4
59 #define SI_PARAM_PERSP_CENTER 5
60 #define SI_PARAM_PERSP_CENTROID 6
61 #define SI_PARAM_PERSP_PULL_MODEL 7
62 #define SI_PARAM_LINEAR_SAMPLE 8
63 #define SI_PARAM_LINEAR_CENTER 9
64 #define SI_PARAM_LINEAR_CENTROID 10
65 #define SI_PARAM_LINE_STIPPLE_TEX 11
66 #define SI_PARAM_POS_X_FLOAT 12
67 #define SI_PARAM_POS_Y_FLOAT 13
68 #define SI_PARAM_POS_Z_FLOAT 14
69 #define SI_PARAM_POS_W_FLOAT 15
70 #define SI_PARAM_FRONT_FACE 16
71 #define SI_PARAM_ANCILLARY 17
72 #define SI_PARAM_SAMPLE_COVERAGE 18
73 #define SI_PARAM_POS_FIXED_PT 19
74
75 struct si_shader_io {
76 unsigned name;
77 int sid;
78 unsigned param_offset;
79 unsigned interpolate;
80 bool centroid;
81 };
82
83 struct si_pipe_shader;
84
85 struct si_pipe_shader_selector {
86 struct si_pipe_shader *current;
87
88 struct tgsi_token *tokens;
89 struct pipe_stream_output_info so;
90
91 unsigned num_shaders;
92
93 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
94 unsigned type;
95
96 /* 1 when the shader contains
97 * TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS, otherwise it's 0.
98 * Used to determine whether we need to include nr_cbufs in the key */
99 unsigned fs_write_all;
100 };
101
102 struct si_shader {
103 unsigned ninput;
104 struct si_shader_io input[40];
105
106 unsigned noutput;
107 struct si_shader_io output[40];
108
109 unsigned ninterp;
110 bool uses_kill;
111 bool uses_instanceid;
112 bool fs_write_all;
113 bool vs_out_misc_write;
114 bool vs_out_point_size;
115 unsigned nr_cbufs;
116 unsigned nr_pos_exports;
117 unsigned clip_dist_write;
118 };
119
120 union si_shader_key {
121 struct {
122 unsigned export_16bpc:8;
123 unsigned nr_cbufs:4;
124 unsigned color_two_side:1;
125 unsigned alpha_func:3;
126 unsigned flatshade:1;
127 unsigned alpha_to_one:1;
128 float alpha_ref;
129 } ps;
130 struct {
131 unsigned instance_divisors[PIPE_MAX_ATTRIBS];
132 unsigned ucps_enabled:2;
133 } vs;
134 };
135
136 struct si_pipe_shader {
137 struct si_pipe_shader_selector *selector;
138 struct si_pipe_shader *next_variant;
139 struct si_shader shader;
140 struct si_pm4_state *pm4;
141 struct si_resource *bo;
142 unsigned num_sgprs;
143 unsigned num_vgprs;
144 unsigned lds_size;
145 unsigned spi_ps_input_ena;
146 unsigned spi_shader_col_format;
147 unsigned cb_shader_mask;
148 bool cb0_is_integer;
149 unsigned sprite_coord_enable;
150 unsigned so_strides[4];
151 union si_shader_key key;
152 };
153
154 /* radeonsi_shader.c */
155 int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
156 int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
157 int si_compile_llvm(struct r600_context *rctx, struct si_pipe_shader *shader,
158 LLVMModuleRef mod);
159 void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
160
161 #endif