radeonsi: support thread-safe shaders shared by multiple contexts
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_DISABLE_RENDER_COND = 4,
33
34 SI_CLEAR = 0,
35
36 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER,
37
38 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
39 SI_DISABLE_RENDER_COND,
40
41 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES,
42
43 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_DISABLE_RENDER_COND,
44
45 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER
46 };
47
48 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
49 {
50 struct si_context *sctx = (struct si_context *)ctx;
51
52 r600_suspend_nontimer_queries(&sctx->b);
53
54 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
55 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
56 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
57 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
58 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
59 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
62 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
63 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
64 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
65 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
66 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
67 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
68 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
69 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
70
71 if (op & SI_SAVE_FRAMEBUFFER)
72 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
73
74 if (op & SI_SAVE_TEXTURES) {
75 util_blitter_save_fragment_sampler_states(
76 sctx->blitter, 2,
77 sctx->samplers[PIPE_SHADER_FRAGMENT].states.saved_states);
78
79 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
80 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
81 }
82
83 if ((op & SI_DISABLE_RENDER_COND) && sctx->b.current_render_cond) {
84 util_blitter_save_render_condition(sctx->blitter,
85 sctx->b.current_render_cond,
86 sctx->b.current_render_cond_cond,
87 sctx->b.current_render_cond_mode);
88 }
89 }
90
91 static void si_blitter_end(struct pipe_context *ctx)
92 {
93 struct si_context *sctx = (struct si_context *)ctx;
94 r600_resume_nontimer_queries(&sctx->b);
95 }
96
97 static unsigned u_max_sample(struct pipe_resource *r)
98 {
99 return r->nr_samples ? r->nr_samples - 1 : 0;
100 }
101
102 static void si_blit_decompress_depth(struct pipe_context *ctx,
103 struct r600_texture *texture,
104 struct r600_texture *staging,
105 unsigned first_level, unsigned last_level,
106 unsigned first_layer, unsigned last_layer,
107 unsigned first_sample, unsigned last_sample)
108 {
109 struct si_context *sctx = (struct si_context *)ctx;
110 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
111 float depth = 1.0f;
112 const struct util_format_description *desc;
113 struct r600_texture *flushed_depth_texture = staging ?
114 staging : texture->flushed_depth_texture;
115
116 if (!staging && !texture->dirty_level_mask)
117 return;
118
119 max_sample = u_max_sample(&texture->resource.b.b);
120
121 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
122
123 if (util_format_has_depth(desc))
124 sctx->dbcb_depth_copy_enabled = true;
125 if (util_format_has_stencil(desc))
126 sctx->dbcb_stencil_copy_enabled = true;
127
128 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
129
130 for (level = first_level; level <= last_level; level++) {
131 if (!staging && !(texture->dirty_level_mask & (1 << level)))
132 continue;
133
134 /* The smaller the mipmap level, the less layers there are
135 * as far as 3D textures are concerned. */
136 max_layer = util_max_layer(&texture->resource.b.b, level);
137 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
138
139 for (layer = first_layer; layer <= checked_last_layer; layer++) {
140 for (sample = first_sample; sample <= last_sample; sample++) {
141 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
142
143 sctx->dbcb_copy_sample = sample;
144 si_mark_atom_dirty(sctx, &sctx->db_render_state);
145
146 surf_tmpl.format = texture->resource.b.b.format;
147 surf_tmpl.u.tex.level = level;
148 surf_tmpl.u.tex.first_layer = layer;
149 surf_tmpl.u.tex.last_layer = layer;
150
151 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
152
153 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
154 cbsurf = ctx->create_surface(ctx,
155 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
156
157 si_blitter_begin(ctx, SI_DECOMPRESS);
158 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
159 sctx->custom_dsa_flush, depth);
160 si_blitter_end(ctx);
161
162 pipe_surface_reference(&zsurf, NULL);
163 pipe_surface_reference(&cbsurf, NULL);
164 }
165 }
166
167 /* The texture will always be dirty if some layers aren't flushed.
168 * I don't think this case can occur though. */
169 if (!staging &&
170 first_layer == 0 && last_layer == max_layer &&
171 first_sample == 0 && last_sample == max_sample) {
172 texture->dirty_level_mask &= ~(1 << level);
173 }
174 }
175
176 sctx->dbcb_depth_copy_enabled = false;
177 sctx->dbcb_stencil_copy_enabled = false;
178 si_mark_atom_dirty(sctx, &sctx->db_render_state);
179 }
180
181 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
182 struct r600_texture *texture,
183 bool is_stencil_sampler,
184 unsigned first_level, unsigned last_level,
185 unsigned first_layer, unsigned last_layer)
186 {
187 struct pipe_surface *zsurf, surf_tmpl = {{0}};
188 unsigned layer, max_layer, checked_last_layer, level;
189 unsigned *dirty_level_mask;
190
191 if (is_stencil_sampler) {
192 sctx->db_flush_stencil_inplace = true;
193 dirty_level_mask = &texture->stencil_dirty_level_mask;
194 } else {
195 sctx->db_flush_depth_inplace = true;
196 dirty_level_mask = &texture->dirty_level_mask;
197 }
198 si_mark_atom_dirty(sctx, &sctx->db_render_state);
199
200 surf_tmpl.format = texture->resource.b.b.format;
201
202 for (level = first_level; level <= last_level; level++) {
203 if (!(*dirty_level_mask & (1 << level)))
204 continue;
205
206 surf_tmpl.u.tex.level = level;
207
208 /* The smaller the mipmap level, the less layers there are
209 * as far as 3D textures are concerned. */
210 max_layer = util_max_layer(&texture->resource.b.b, level);
211 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
212
213 for (layer = first_layer; layer <= checked_last_layer; layer++) {
214 surf_tmpl.u.tex.first_layer = layer;
215 surf_tmpl.u.tex.last_layer = layer;
216
217 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
218
219 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
220 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
221 sctx->custom_dsa_flush,
222 1.0f);
223 si_blitter_end(&sctx->b.b);
224
225 pipe_surface_reference(&zsurf, NULL);
226 }
227
228 /* The texture will always be dirty if some layers aren't flushed.
229 * I don't think this case occurs often though. */
230 if (first_layer == 0 && last_layer == max_layer) {
231 *dirty_level_mask &= ~(1 << level);
232 }
233 }
234
235 sctx->db_flush_depth_inplace = false;
236 sctx->db_flush_stencil_inplace = false;
237 si_mark_atom_dirty(sctx, &sctx->db_render_state);
238 }
239
240 void si_flush_depth_textures(struct si_context *sctx,
241 struct si_textures_info *textures)
242 {
243 unsigned i;
244 unsigned mask = textures->depth_texture_mask;
245
246 while (mask) {
247 struct pipe_sampler_view *view;
248 struct si_sampler_view *sview;
249 struct r600_texture *tex;
250
251 i = u_bit_scan(&mask);
252
253 view = textures->views.views[i];
254 assert(view);
255 sview = (struct si_sampler_view*)view;
256
257 tex = (struct r600_texture *)view->texture;
258 assert(tex->is_depth && !tex->is_flushing_texture);
259
260 si_blit_decompress_depth_in_place(sctx, tex,
261 sview->is_stencil_sampler,
262 view->u.tex.first_level, view->u.tex.last_level,
263 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
264 }
265 }
266
267 static void si_blit_decompress_color(struct pipe_context *ctx,
268 struct r600_texture *rtex,
269 unsigned first_level, unsigned last_level,
270 unsigned first_layer, unsigned last_layer)
271 {
272 struct si_context *sctx = (struct si_context *)ctx;
273 unsigned layer, level, checked_last_layer, max_layer;
274
275 if (!rtex->dirty_level_mask)
276 return;
277
278 for (level = first_level; level <= last_level; level++) {
279 if (!(rtex->dirty_level_mask & (1 << level)))
280 continue;
281
282 /* The smaller the mipmap level, the less layers there are
283 * as far as 3D textures are concerned. */
284 max_layer = util_max_layer(&rtex->resource.b.b, level);
285 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
286
287 for (layer = first_layer; layer <= checked_last_layer; layer++) {
288 struct pipe_surface *cbsurf, surf_tmpl;
289
290 surf_tmpl.format = rtex->resource.b.b.format;
291 surf_tmpl.u.tex.level = level;
292 surf_tmpl.u.tex.first_layer = layer;
293 surf_tmpl.u.tex.last_layer = layer;
294 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
295
296 si_blitter_begin(ctx, SI_DECOMPRESS);
297 util_blitter_custom_color(sctx->blitter, cbsurf,
298 rtex->fmask.size ? sctx->custom_blend_decompress :
299 sctx->custom_blend_fastclear);
300 si_blitter_end(ctx);
301
302 pipe_surface_reference(&cbsurf, NULL);
303 }
304
305 /* The texture will always be dirty if some layers aren't flushed.
306 * I don't think this case occurs often though. */
307 if (first_layer == 0 && last_layer == max_layer) {
308 rtex->dirty_level_mask &= ~(1 << level);
309 }
310 }
311 }
312
313 void si_decompress_color_textures(struct si_context *sctx,
314 struct si_textures_info *textures)
315 {
316 unsigned i;
317 unsigned mask = textures->compressed_colortex_mask;
318
319 while (mask) {
320 struct pipe_sampler_view *view;
321 struct r600_texture *tex;
322
323 i = u_bit_scan(&mask);
324
325 view = textures->views.views[i];
326 assert(view);
327
328 tex = (struct r600_texture *)view->texture;
329 assert(tex->cmask.size || tex->fmask.size);
330
331 si_blit_decompress_color(&sctx->b.b, tex,
332 view->u.tex.first_level, view->u.tex.last_level,
333 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
334 }
335 }
336
337 static void si_clear(struct pipe_context *ctx, unsigned buffers,
338 const union pipe_color_union *color,
339 double depth, unsigned stencil)
340 {
341 struct si_context *sctx = (struct si_context *)ctx;
342 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
343 struct pipe_surface *zsbuf = fb->zsbuf;
344 struct r600_texture *zstex =
345 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
346
347 if (buffers & PIPE_CLEAR_COLOR) {
348 evergreen_do_fast_color_clear(&sctx->b, fb,
349 &sctx->framebuffer.atom, &buffers,
350 &sctx->framebuffer.dirty_cbufs,
351 color);
352 if (!buffers)
353 return; /* all buffers have been fast cleared */
354 }
355
356 if (buffers & PIPE_CLEAR_COLOR) {
357 int i;
358
359 /* These buffers cannot use fast clear, make sure to disable expansion. */
360 for (i = 0; i < fb->nr_cbufs; i++) {
361 struct r600_texture *tex;
362
363 /* If not clearing this buffer, skip. */
364 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
365 continue;
366
367 if (!fb->cbufs[i])
368 continue;
369
370 tex = (struct r600_texture *)fb->cbufs[i]->texture;
371 if (tex->fmask.size == 0)
372 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
373 }
374 }
375
376 if (buffers & PIPE_CLEAR_DEPTH &&
377 zstex && zstex->htile_buffer &&
378 zsbuf->u.tex.level == 0 &&
379 zsbuf->u.tex.first_layer == 0 &&
380 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
381 /* Need to disable EXPCLEAR temporarily if clearing
382 * to a new value. */
383 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
384 sctx->db_depth_disable_expclear = true;
385 }
386
387 zstex->depth_clear_value = depth;
388 sctx->framebuffer.dirty_zsbuf = true;
389 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
390 sctx->db_depth_clear = true;
391 si_mark_atom_dirty(sctx, &sctx->db_render_state);
392 }
393
394 si_blitter_begin(ctx, SI_CLEAR);
395 util_blitter_clear(sctx->blitter, fb->width, fb->height,
396 util_framebuffer_get_num_layers(fb),
397 buffers, color, depth, stencil);
398 si_blitter_end(ctx);
399
400 if (sctx->db_depth_clear) {
401 sctx->db_depth_clear = false;
402 sctx->db_depth_disable_expclear = false;
403 zstex->depth_cleared = true;
404 si_mark_atom_dirty(sctx, &sctx->db_render_state);
405 }
406 }
407
408 static void si_clear_render_target(struct pipe_context *ctx,
409 struct pipe_surface *dst,
410 const union pipe_color_union *color,
411 unsigned dstx, unsigned dsty,
412 unsigned width, unsigned height)
413 {
414 struct si_context *sctx = (struct si_context *)ctx;
415
416 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
417 util_blitter_clear_render_target(sctx->blitter, dst, color,
418 dstx, dsty, width, height);
419 si_blitter_end(ctx);
420 }
421
422 static void si_clear_depth_stencil(struct pipe_context *ctx,
423 struct pipe_surface *dst,
424 unsigned clear_flags,
425 double depth,
426 unsigned stencil,
427 unsigned dstx, unsigned dsty,
428 unsigned width, unsigned height)
429 {
430 struct si_context *sctx = (struct si_context *)ctx;
431
432 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
433 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
434 dstx, dsty, width, height);
435 si_blitter_end(ctx);
436 }
437
438 /* Helper for decompressing a portion of a color or depth resource before
439 * blitting if any decompression is needed.
440 * The driver doesn't decompress resources automatically while u_blitter is
441 * rendering. */
442 static void si_decompress_subresource(struct pipe_context *ctx,
443 struct pipe_resource *tex,
444 unsigned level,
445 unsigned first_layer, unsigned last_layer)
446 {
447 struct si_context *sctx = (struct si_context *)ctx;
448 struct r600_texture *rtex = (struct r600_texture*)tex;
449
450 if (rtex->is_depth && !rtex->is_flushing_texture) {
451 si_blit_decompress_depth_in_place(sctx, rtex, false,
452 level, level,
453 first_layer, last_layer);
454 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
455 si_blit_decompress_depth_in_place(sctx, rtex, true,
456 level, level,
457 first_layer, last_layer);
458 } else if (rtex->fmask.size || rtex->cmask.size) {
459 si_blit_decompress_color(ctx, rtex, level, level,
460 first_layer, last_layer);
461 }
462 }
463
464 struct texture_orig_info {
465 unsigned format;
466 unsigned width0;
467 unsigned height0;
468 unsigned npix_x;
469 unsigned npix_y;
470 unsigned npix0_x;
471 unsigned npix0_y;
472 };
473
474 void si_resource_copy_region(struct pipe_context *ctx,
475 struct pipe_resource *dst,
476 unsigned dst_level,
477 unsigned dstx, unsigned dsty, unsigned dstz,
478 struct pipe_resource *src,
479 unsigned src_level,
480 const struct pipe_box *src_box)
481 {
482 struct si_context *sctx = (struct si_context *)ctx;
483 struct pipe_surface *dst_view, dst_templ;
484 struct pipe_sampler_view src_templ, *src_view;
485 unsigned dst_width, dst_height, src_width0, src_height0;
486 unsigned src_force_level = 0;
487 struct pipe_box sbox, dstbox;
488
489 /* Handle buffers first. */
490 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
491 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
492 return;
493 }
494
495 assert(u_max_sample(dst) == u_max_sample(src));
496
497 /* The driver doesn't decompress resources automatically while
498 * u_blitter is rendering. */
499 si_decompress_subresource(ctx, src, src_level,
500 src_box->z, src_box->z + src_box->depth - 1);
501
502 dst_width = u_minify(dst->width0, dst_level);
503 dst_height = u_minify(dst->height0, dst_level);
504 src_width0 = src->width0;
505 src_height0 = src->height0;
506
507 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
508 util_blitter_default_src_texture(&src_templ, src, src_level);
509
510 if (util_format_is_compressed(src->format) &&
511 util_format_is_compressed(dst->format)) {
512 unsigned blocksize = util_format_get_blocksize(src->format);
513
514 if (blocksize == 8)
515 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
516 else
517 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
518 dst_templ.format = src_templ.format;
519
520 dst_width = util_format_get_nblocksx(dst->format, dst_width);
521 dst_height = util_format_get_nblocksy(dst->format, dst_height);
522 src_width0 = util_format_get_nblocksx(src->format, src_width0);
523 src_height0 = util_format_get_nblocksy(src->format, src_height0);
524
525 dstx = util_format_get_nblocksx(dst->format, dstx);
526 dsty = util_format_get_nblocksy(dst->format, dsty);
527
528 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
529 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
530 sbox.z = src_box->z;
531 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
532 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
533 sbox.depth = src_box->depth;
534 src_box = &sbox;
535
536 src_force_level = src_level;
537 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
538 /* also *8_SNORM has precision issues, use UNORM instead */
539 util_format_is_snorm(src->format)) {
540 if (util_format_is_subsampled_422(src->format)) {
541 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
542 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
543
544 dst_width = util_format_get_nblocksx(dst->format, dst_width);
545 src_width0 = util_format_get_nblocksx(src->format, src_width0);
546
547 dstx = util_format_get_nblocksx(dst->format, dstx);
548
549 sbox = *src_box;
550 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
551 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
552 src_box = &sbox;
553 } else {
554 unsigned blocksize = util_format_get_blocksize(src->format);
555
556 switch (blocksize) {
557 case 1:
558 dst_templ.format = PIPE_FORMAT_R8_UNORM;
559 src_templ.format = PIPE_FORMAT_R8_UNORM;
560 break;
561 case 2:
562 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
563 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
564 break;
565 case 4:
566 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
567 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
568 break;
569 case 8:
570 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
571 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
572 break;
573 case 16:
574 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
575 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
576 break;
577 default:
578 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
579 util_format_short_name(src->format), blocksize);
580 assert(0);
581 }
582 }
583 }
584
585 /* Initialize the surface. */
586 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
587 dst_width, dst_height);
588
589 /* Initialize the sampler view. */
590 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
591 src_width0, src_height0,
592 src_force_level);
593
594 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
595 abs(src_box->depth), &dstbox);
596
597 /* Copy. */
598 si_blitter_begin(ctx, SI_COPY);
599 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
600 src_view, src_box, src_width0, src_height0,
601 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
602 FALSE);
603 si_blitter_end(ctx);
604
605 pipe_surface_reference(&dst_view, NULL);
606 pipe_sampler_view_reference(&src_view, NULL);
607 }
608
609 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
610 static enum pipe_format int_to_norm_format(enum pipe_format format)
611 {
612 switch (format) {
613 #define REPLACE_FORMAT_SIGN(format,sign) \
614 case PIPE_FORMAT_##format##_##sign##INT: \
615 return PIPE_FORMAT_##format##_##sign##NORM
616 #define REPLACE_FORMAT(format) \
617 REPLACE_FORMAT_SIGN(format, U); \
618 REPLACE_FORMAT_SIGN(format, S)
619
620 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
621 REPLACE_FORMAT(R8);
622 REPLACE_FORMAT(R8G8);
623 REPLACE_FORMAT(R8G8B8X8);
624 REPLACE_FORMAT(R8G8B8A8);
625 REPLACE_FORMAT(A8);
626 REPLACE_FORMAT(I8);
627 REPLACE_FORMAT(L8);
628 REPLACE_FORMAT(L8A8);
629 REPLACE_FORMAT(R16);
630 REPLACE_FORMAT(R16G16);
631 REPLACE_FORMAT(R16G16B16X16);
632 REPLACE_FORMAT(R16G16B16A16);
633 REPLACE_FORMAT(A16);
634 REPLACE_FORMAT(I16);
635 REPLACE_FORMAT(L16);
636 REPLACE_FORMAT(L16A16);
637
638 #undef REPLACE_FORMAT
639 #undef REPLACE_FORMAT_SIGN
640 default:
641 return format;
642 }
643 }
644
645 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
646 const struct pipe_blit_info *info)
647 {
648 struct si_context *sctx = (struct si_context*)ctx;
649 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
650 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
651 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
652 enum pipe_format format = int_to_norm_format(info->dst.format);
653 unsigned sample_mask = ~0;
654
655 if (info->src.resource->nr_samples > 1 &&
656 info->dst.resource->nr_samples <= 1 &&
657 util_max_layer(info->src.resource, 0) == 0 &&
658 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
659 info->dst.format == info->src.format &&
660 !util_format_is_pure_integer(format) &&
661 !util_format_is_depth_or_stencil(format) &&
662 !info->scissor_enable &&
663 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
664 dst_width == info->src.resource->width0 &&
665 dst_height == info->src.resource->height0 &&
666 info->dst.box.x == 0 &&
667 info->dst.box.y == 0 &&
668 info->dst.box.width == dst_width &&
669 info->dst.box.height == dst_height &&
670 info->dst.box.depth == 1 &&
671 info->src.box.x == 0 &&
672 info->src.box.y == 0 &&
673 info->src.box.width == dst_width &&
674 info->src.box.height == dst_height &&
675 info->src.box.depth == 1 &&
676 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
677 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
678 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
679 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
680 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
681 util_blitter_custom_resolve_color(sctx->blitter,
682 info->dst.resource, info->dst.level,
683 info->dst.box.z,
684 info->src.resource, info->src.box.z,
685 sample_mask, sctx->custom_blend_resolve,
686 format);
687 si_blitter_end(ctx);
688 return true;
689 }
690 return false;
691 }
692
693 static void si_blit(struct pipe_context *ctx,
694 const struct pipe_blit_info *info)
695 {
696 struct si_context *sctx = (struct si_context*)ctx;
697
698 if (do_hardware_msaa_resolve(ctx, info)) {
699 return;
700 }
701
702 assert(util_blitter_is_blit_supported(sctx->blitter, info));
703
704 /* The driver doesn't decompress resources automatically while
705 * u_blitter is rendering. */
706 si_decompress_subresource(ctx, info->src.resource, info->src.level,
707 info->src.box.z,
708 info->src.box.z + info->src.box.depth - 1);
709
710 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
711 util_try_blit_via_copy_region(ctx, info))
712 return;
713
714 si_blitter_begin(ctx, SI_BLIT |
715 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
716 util_blitter_blit(sctx->blitter, info);
717 si_blitter_end(ctx);
718 }
719
720 static void si_flush_resource(struct pipe_context *ctx,
721 struct pipe_resource *res)
722 {
723 struct r600_texture *rtex = (struct r600_texture*)res;
724
725 assert(res->target != PIPE_BUFFER);
726
727 if (!rtex->is_depth && rtex->cmask.size) {
728 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
729 0, util_max_layer(res, 0));
730 }
731 }
732
733 void si_init_blit_functions(struct si_context *sctx)
734 {
735 sctx->b.b.clear = si_clear;
736 sctx->b.b.clear_render_target = si_clear_render_target;
737 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
738 sctx->b.b.resource_copy_region = si_resource_copy_region;
739 sctx->b.b.blit = si_blit;
740 sctx->b.b.flush_resource = si_flush_resource;
741 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
742 }