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93fa67a953ec313851b05f8edb10097daca84578
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_DISABLE_RENDER_COND = 4,
33
34 SI_CLEAR = 0,
35
36 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER,
37
38 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
39 SI_DISABLE_RENDER_COND,
40
41 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES,
42
43 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_DISABLE_RENDER_COND,
44
45 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER
46 };
47
48 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
49 {
50 struct si_context *sctx = (struct si_context *)ctx;
51
52 r600_suspend_nontimer_queries(&sctx->b);
53
54 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
55 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
56 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
57 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
58 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader);
59 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader);
62 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader);
63 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
64 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
65 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
66 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
67 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
68 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
69 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
70
71 if (op & SI_SAVE_FRAMEBUFFER)
72 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
73
74 if (op & SI_SAVE_TEXTURES) {
75 util_blitter_save_fragment_sampler_states(
76 sctx->blitter, 2,
77 sctx->samplers[PIPE_SHADER_FRAGMENT].states.saved_states);
78
79 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
80 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
81 }
82
83 if ((op & SI_DISABLE_RENDER_COND) && sctx->b.current_render_cond) {
84 util_blitter_save_render_condition(sctx->blitter,
85 sctx->b.current_render_cond,
86 sctx->b.current_render_cond_cond,
87 sctx->b.current_render_cond_mode);
88 }
89 }
90
91 static void si_blitter_end(struct pipe_context *ctx)
92 {
93 struct si_context *sctx = (struct si_context *)ctx;
94 r600_resume_nontimer_queries(&sctx->b);
95 }
96
97 static unsigned u_max_sample(struct pipe_resource *r)
98 {
99 return r->nr_samples ? r->nr_samples - 1 : 0;
100 }
101
102 static void si_blit_decompress_depth(struct pipe_context *ctx,
103 struct r600_texture *texture,
104 struct r600_texture *staging,
105 unsigned first_level, unsigned last_level,
106 unsigned first_layer, unsigned last_layer,
107 unsigned first_sample, unsigned last_sample)
108 {
109 struct si_context *sctx = (struct si_context *)ctx;
110 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
111 float depth = 1.0f;
112 const struct util_format_description *desc;
113 struct r600_texture *flushed_depth_texture = staging ?
114 staging : texture->flushed_depth_texture;
115
116 if (!staging && !texture->dirty_level_mask)
117 return;
118
119 max_sample = u_max_sample(&texture->resource.b.b);
120
121 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
122
123 if (util_format_has_depth(desc))
124 sctx->dbcb_depth_copy_enabled = true;
125 if (util_format_has_stencil(desc))
126 sctx->dbcb_stencil_copy_enabled = true;
127
128 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
129
130 for (level = first_level; level <= last_level; level++) {
131 if (!staging && !(texture->dirty_level_mask & (1 << level)))
132 continue;
133
134 /* The smaller the mipmap level, the less layers there are
135 * as far as 3D textures are concerned. */
136 max_layer = util_max_layer(&texture->resource.b.b, level);
137 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
138
139 for (layer = first_layer; layer <= checked_last_layer; layer++) {
140 for (sample = first_sample; sample <= last_sample; sample++) {
141 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
142
143 sctx->dbcb_copy_sample = sample;
144 si_mark_atom_dirty(sctx, &sctx->db_render_state);
145
146 surf_tmpl.format = texture->resource.b.b.format;
147 surf_tmpl.u.tex.level = level;
148 surf_tmpl.u.tex.first_layer = layer;
149 surf_tmpl.u.tex.last_layer = layer;
150
151 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
152
153 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
154 cbsurf = ctx->create_surface(ctx,
155 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
156
157 si_blitter_begin(ctx, SI_DECOMPRESS);
158 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
159 sctx->custom_dsa_flush, depth);
160 si_blitter_end(ctx);
161
162 pipe_surface_reference(&zsurf, NULL);
163 pipe_surface_reference(&cbsurf, NULL);
164 }
165 }
166
167 /* The texture will always be dirty if some layers aren't flushed.
168 * I don't think this case can occur though. */
169 if (!staging &&
170 first_layer == 0 && last_layer == max_layer &&
171 first_sample == 0 && last_sample == max_sample) {
172 texture->dirty_level_mask &= ~(1 << level);
173 }
174 }
175
176 sctx->dbcb_depth_copy_enabled = false;
177 sctx->dbcb_stencil_copy_enabled = false;
178 si_mark_atom_dirty(sctx, &sctx->db_render_state);
179 }
180
181 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
182 struct r600_texture *texture,
183 unsigned first_level, unsigned last_level,
184 unsigned first_layer, unsigned last_layer)
185 {
186 struct pipe_surface *zsurf, surf_tmpl = {{0}};
187 unsigned layer, max_layer, checked_last_layer, level;
188
189 sctx->db_inplace_flush_enabled = true;
190 si_mark_atom_dirty(sctx, &sctx->db_render_state);
191
192 surf_tmpl.format = texture->resource.b.b.format;
193
194 for (level = first_level; level <= last_level; level++) {
195 if (!(texture->dirty_level_mask & (1 << level)))
196 continue;
197
198 surf_tmpl.u.tex.level = level;
199
200 /* The smaller the mipmap level, the less layers there are
201 * as far as 3D textures are concerned. */
202 max_layer = util_max_layer(&texture->resource.b.b, level);
203 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
204
205 for (layer = first_layer; layer <= checked_last_layer; layer++) {
206 surf_tmpl.u.tex.first_layer = layer;
207 surf_tmpl.u.tex.last_layer = layer;
208
209 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
210
211 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
212 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
213 sctx->custom_dsa_flush,
214 1.0f);
215 si_blitter_end(&sctx->b.b);
216
217 pipe_surface_reference(&zsurf, NULL);
218 }
219
220 /* The texture will always be dirty if some layers aren't flushed.
221 * I don't think this case occurs often though. */
222 if (first_layer == 0 && last_layer == max_layer) {
223 texture->dirty_level_mask &= ~(1 << level);
224 }
225 }
226
227 sctx->db_inplace_flush_enabled = false;
228 si_mark_atom_dirty(sctx, &sctx->db_render_state);
229 }
230
231 void si_flush_depth_textures(struct si_context *sctx,
232 struct si_textures_info *textures)
233 {
234 unsigned i;
235 unsigned mask = textures->depth_texture_mask;
236
237 while (mask) {
238 struct pipe_sampler_view *view;
239 struct r600_texture *tex;
240
241 i = u_bit_scan(&mask);
242
243 view = textures->views.views[i];
244 assert(view);
245
246 tex = (struct r600_texture *)view->texture;
247 assert(tex->is_depth && !tex->is_flushing_texture);
248
249 si_blit_decompress_depth_in_place(sctx, tex,
250 view->u.tex.first_level, view->u.tex.last_level,
251 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
252 }
253 }
254
255 static void si_blit_decompress_color(struct pipe_context *ctx,
256 struct r600_texture *rtex,
257 unsigned first_level, unsigned last_level,
258 unsigned first_layer, unsigned last_layer)
259 {
260 struct si_context *sctx = (struct si_context *)ctx;
261 unsigned layer, level, checked_last_layer, max_layer;
262
263 if (!rtex->dirty_level_mask)
264 return;
265
266 for (level = first_level; level <= last_level; level++) {
267 if (!(rtex->dirty_level_mask & (1 << level)))
268 continue;
269
270 /* The smaller the mipmap level, the less layers there are
271 * as far as 3D textures are concerned. */
272 max_layer = util_max_layer(&rtex->resource.b.b, level);
273 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
274
275 for (layer = first_layer; layer <= checked_last_layer; layer++) {
276 struct pipe_surface *cbsurf, surf_tmpl;
277
278 surf_tmpl.format = rtex->resource.b.b.format;
279 surf_tmpl.u.tex.level = level;
280 surf_tmpl.u.tex.first_layer = layer;
281 surf_tmpl.u.tex.last_layer = layer;
282 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
283
284 si_blitter_begin(ctx, SI_DECOMPRESS);
285 util_blitter_custom_color(sctx->blitter, cbsurf,
286 rtex->fmask.size ? sctx->custom_blend_decompress :
287 sctx->custom_blend_fastclear);
288 si_blitter_end(ctx);
289
290 pipe_surface_reference(&cbsurf, NULL);
291 }
292
293 /* The texture will always be dirty if some layers aren't flushed.
294 * I don't think this case occurs often though. */
295 if (first_layer == 0 && last_layer == max_layer) {
296 rtex->dirty_level_mask &= ~(1 << level);
297 }
298 }
299 }
300
301 void si_decompress_color_textures(struct si_context *sctx,
302 struct si_textures_info *textures)
303 {
304 unsigned i;
305 unsigned mask = textures->compressed_colortex_mask;
306
307 while (mask) {
308 struct pipe_sampler_view *view;
309 struct r600_texture *tex;
310
311 i = u_bit_scan(&mask);
312
313 view = textures->views.views[i];
314 assert(view);
315
316 tex = (struct r600_texture *)view->texture;
317 assert(tex->cmask.size || tex->fmask.size);
318
319 si_blit_decompress_color(&sctx->b.b, tex,
320 view->u.tex.first_level, view->u.tex.last_level,
321 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
322 }
323 }
324
325 static void si_clear(struct pipe_context *ctx, unsigned buffers,
326 const union pipe_color_union *color,
327 double depth, unsigned stencil)
328 {
329 struct si_context *sctx = (struct si_context *)ctx;
330 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
331 struct pipe_surface *zsbuf = fb->zsbuf;
332 struct r600_texture *zstex =
333 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
334
335 if (buffers & PIPE_CLEAR_COLOR) {
336 evergreen_do_fast_color_clear(&sctx->b, fb,
337 &sctx->framebuffer.atom, &buffers,
338 &sctx->framebuffer.dirty_cbufs,
339 color);
340 if (!buffers)
341 return; /* all buffers have been fast cleared */
342 }
343
344 if (buffers & PIPE_CLEAR_COLOR) {
345 int i;
346
347 /* These buffers cannot use fast clear, make sure to disable expansion. */
348 for (i = 0; i < fb->nr_cbufs; i++) {
349 struct r600_texture *tex;
350
351 /* If not clearing this buffer, skip. */
352 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
353 continue;
354
355 if (!fb->cbufs[i])
356 continue;
357
358 tex = (struct r600_texture *)fb->cbufs[i]->texture;
359 if (tex->fmask.size == 0)
360 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
361 }
362 }
363
364 if (buffers & PIPE_CLEAR_DEPTH &&
365 zstex && zstex->htile_buffer &&
366 zsbuf->u.tex.level == 0 &&
367 zsbuf->u.tex.first_layer == 0 &&
368 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
369 /* Need to disable EXPCLEAR temporarily if clearing
370 * to a new value. */
371 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
372 sctx->db_depth_disable_expclear = true;
373 }
374
375 zstex->depth_clear_value = depth;
376 sctx->framebuffer.dirty_zsbuf = true;
377 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
378 sctx->db_depth_clear = true;
379 si_mark_atom_dirty(sctx, &sctx->db_render_state);
380 }
381
382 si_blitter_begin(ctx, SI_CLEAR);
383 util_blitter_clear(sctx->blitter, fb->width, fb->height,
384 util_framebuffer_get_num_layers(fb),
385 buffers, color, depth, stencil);
386 si_blitter_end(ctx);
387
388 if (sctx->db_depth_clear) {
389 sctx->db_depth_clear = false;
390 sctx->db_depth_disable_expclear = false;
391 zstex->depth_cleared = true;
392 si_mark_atom_dirty(sctx, &sctx->db_render_state);
393 }
394 }
395
396 static void si_clear_render_target(struct pipe_context *ctx,
397 struct pipe_surface *dst,
398 const union pipe_color_union *color,
399 unsigned dstx, unsigned dsty,
400 unsigned width, unsigned height)
401 {
402 struct si_context *sctx = (struct si_context *)ctx;
403
404 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
405 util_blitter_clear_render_target(sctx->blitter, dst, color,
406 dstx, dsty, width, height);
407 si_blitter_end(ctx);
408 }
409
410 static void si_clear_depth_stencil(struct pipe_context *ctx,
411 struct pipe_surface *dst,
412 unsigned clear_flags,
413 double depth,
414 unsigned stencil,
415 unsigned dstx, unsigned dsty,
416 unsigned width, unsigned height)
417 {
418 struct si_context *sctx = (struct si_context *)ctx;
419
420 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
421 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
422 dstx, dsty, width, height);
423 si_blitter_end(ctx);
424 }
425
426 /* Helper for decompressing a portion of a color or depth resource before
427 * blitting if any decompression is needed.
428 * The driver doesn't decompress resources automatically while u_blitter is
429 * rendering. */
430 static void si_decompress_subresource(struct pipe_context *ctx,
431 struct pipe_resource *tex,
432 unsigned level,
433 unsigned first_layer, unsigned last_layer)
434 {
435 struct si_context *sctx = (struct si_context *)ctx;
436 struct r600_texture *rtex = (struct r600_texture*)tex;
437
438 if (rtex->is_depth && !rtex->is_flushing_texture) {
439 si_blit_decompress_depth_in_place(sctx, rtex,
440 level, level,
441 first_layer, last_layer);
442 } else if (rtex->fmask.size || rtex->cmask.size) {
443 si_blit_decompress_color(ctx, rtex, level, level,
444 first_layer, last_layer);
445 }
446 }
447
448 struct texture_orig_info {
449 unsigned format;
450 unsigned width0;
451 unsigned height0;
452 unsigned npix_x;
453 unsigned npix_y;
454 unsigned npix0_x;
455 unsigned npix0_y;
456 };
457
458 void si_resource_copy_region(struct pipe_context *ctx,
459 struct pipe_resource *dst,
460 unsigned dst_level,
461 unsigned dstx, unsigned dsty, unsigned dstz,
462 struct pipe_resource *src,
463 unsigned src_level,
464 const struct pipe_box *src_box)
465 {
466 struct si_context *sctx = (struct si_context *)ctx;
467 struct pipe_surface *dst_view, dst_templ;
468 struct pipe_sampler_view src_templ, *src_view;
469 unsigned dst_width, dst_height, src_width0, src_height0;
470 unsigned src_force_level = 0;
471 struct pipe_box sbox, dstbox;
472
473 /* Handle buffers first. */
474 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
475 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
476 return;
477 }
478
479 assert(u_max_sample(dst) == u_max_sample(src));
480
481 /* The driver doesn't decompress resources automatically while
482 * u_blitter is rendering. */
483 si_decompress_subresource(ctx, src, src_level,
484 src_box->z, src_box->z + src_box->depth - 1);
485
486 dst_width = u_minify(dst->width0, dst_level);
487 dst_height = u_minify(dst->height0, dst_level);
488 src_width0 = src->width0;
489 src_height0 = src->height0;
490
491 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
492 util_blitter_default_src_texture(&src_templ, src, src_level);
493
494 if (util_format_is_compressed(src->format) &&
495 util_format_is_compressed(dst->format)) {
496 unsigned blocksize = util_format_get_blocksize(src->format);
497
498 if (blocksize == 8)
499 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
500 else
501 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
502 dst_templ.format = src_templ.format;
503
504 dst_width = util_format_get_nblocksx(dst->format, dst_width);
505 dst_height = util_format_get_nblocksy(dst->format, dst_height);
506 src_width0 = util_format_get_nblocksx(src->format, src_width0);
507 src_height0 = util_format_get_nblocksy(src->format, src_height0);
508
509 dstx = util_format_get_nblocksx(dst->format, dstx);
510 dsty = util_format_get_nblocksy(dst->format, dsty);
511
512 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
513 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
514 sbox.z = src_box->z;
515 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
516 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
517 sbox.depth = src_box->depth;
518 src_box = &sbox;
519
520 src_force_level = src_level;
521 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
522 /* also *8_SNORM has precision issues, use UNORM instead */
523 util_format_is_snorm(src->format)) {
524 if (util_format_is_subsampled_422(src->format)) {
525 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
526 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
527
528 dst_width = util_format_get_nblocksx(dst->format, dst_width);
529 src_width0 = util_format_get_nblocksx(src->format, src_width0);
530
531 dstx = util_format_get_nblocksx(dst->format, dstx);
532
533 sbox = *src_box;
534 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
535 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
536 src_box = &sbox;
537 } else {
538 unsigned blocksize = util_format_get_blocksize(src->format);
539
540 switch (blocksize) {
541 case 1:
542 dst_templ.format = PIPE_FORMAT_R8_UNORM;
543 src_templ.format = PIPE_FORMAT_R8_UNORM;
544 break;
545 case 2:
546 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
547 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
548 break;
549 case 4:
550 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
551 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
552 break;
553 case 8:
554 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
555 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
556 break;
557 case 16:
558 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
559 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
560 break;
561 default:
562 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
563 util_format_short_name(src->format), blocksize);
564 assert(0);
565 }
566 }
567 }
568
569 /* Initialize the surface. */
570 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
571 dst_width, dst_height);
572
573 /* Initialize the sampler view. */
574 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
575 src_width0, src_height0,
576 src_force_level);
577
578 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
579 abs(src_box->depth), &dstbox);
580
581 /* Copy. */
582 si_blitter_begin(ctx, SI_COPY);
583 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
584 src_view, src_box, src_width0, src_height0,
585 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
586 FALSE);
587 si_blitter_end(ctx);
588
589 pipe_surface_reference(&dst_view, NULL);
590 pipe_sampler_view_reference(&src_view, NULL);
591 }
592
593 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
594 static enum pipe_format int_to_norm_format(enum pipe_format format)
595 {
596 switch (format) {
597 #define REPLACE_FORMAT_SIGN(format,sign) \
598 case PIPE_FORMAT_##format##_##sign##INT: \
599 return PIPE_FORMAT_##format##_##sign##NORM
600 #define REPLACE_FORMAT(format) \
601 REPLACE_FORMAT_SIGN(format, U); \
602 REPLACE_FORMAT_SIGN(format, S)
603
604 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
605 REPLACE_FORMAT(R8);
606 REPLACE_FORMAT(R8G8);
607 REPLACE_FORMAT(R8G8B8X8);
608 REPLACE_FORMAT(R8G8B8A8);
609 REPLACE_FORMAT(A8);
610 REPLACE_FORMAT(I8);
611 REPLACE_FORMAT(L8);
612 REPLACE_FORMAT(L8A8);
613 REPLACE_FORMAT(R16);
614 REPLACE_FORMAT(R16G16);
615 REPLACE_FORMAT(R16G16B16X16);
616 REPLACE_FORMAT(R16G16B16A16);
617 REPLACE_FORMAT(A16);
618 REPLACE_FORMAT(I16);
619 REPLACE_FORMAT(L16);
620 REPLACE_FORMAT(L16A16);
621
622 #undef REPLACE_FORMAT
623 #undef REPLACE_FORMAT_SIGN
624 default:
625 return format;
626 }
627 }
628
629 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
630 const struct pipe_blit_info *info)
631 {
632 struct si_context *sctx = (struct si_context*)ctx;
633 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
634 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
635 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
636 enum pipe_format format = int_to_norm_format(info->dst.format);
637 unsigned sample_mask = ~0;
638
639 if (info->src.resource->nr_samples > 1 &&
640 info->dst.resource->nr_samples <= 1 &&
641 util_max_layer(info->src.resource, 0) == 0 &&
642 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
643 info->dst.format == info->src.format &&
644 !util_format_is_pure_integer(format) &&
645 !util_format_is_depth_or_stencil(format) &&
646 !info->scissor_enable &&
647 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
648 dst_width == info->src.resource->width0 &&
649 dst_height == info->src.resource->height0 &&
650 info->dst.box.x == 0 &&
651 info->dst.box.y == 0 &&
652 info->dst.box.width == dst_width &&
653 info->dst.box.height == dst_height &&
654 info->dst.box.depth == 1 &&
655 info->src.box.x == 0 &&
656 info->src.box.y == 0 &&
657 info->src.box.width == dst_width &&
658 info->src.box.height == dst_height &&
659 info->src.box.depth == 1 &&
660 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
661 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
662 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
663 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
664 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
665 util_blitter_custom_resolve_color(sctx->blitter,
666 info->dst.resource, info->dst.level,
667 info->dst.box.z,
668 info->src.resource, info->src.box.z,
669 sample_mask, sctx->custom_blend_resolve,
670 format);
671 si_blitter_end(ctx);
672 return true;
673 }
674 return false;
675 }
676
677 static void si_blit(struct pipe_context *ctx,
678 const struct pipe_blit_info *info)
679 {
680 struct si_context *sctx = (struct si_context*)ctx;
681
682 if (do_hardware_msaa_resolve(ctx, info)) {
683 return;
684 }
685
686 assert(util_blitter_is_blit_supported(sctx->blitter, info));
687
688 /* The driver doesn't decompress resources automatically while
689 * u_blitter is rendering. */
690 si_decompress_subresource(ctx, info->src.resource, info->src.level,
691 info->src.box.z,
692 info->src.box.z + info->src.box.depth - 1);
693
694 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
695 util_try_blit_via_copy_region(ctx, info))
696 return;
697
698 si_blitter_begin(ctx, SI_BLIT |
699 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
700 util_blitter_blit(sctx->blitter, info);
701 si_blitter_end(ctx);
702 }
703
704 static void si_flush_resource(struct pipe_context *ctx,
705 struct pipe_resource *res)
706 {
707 struct r600_texture *rtex = (struct r600_texture*)res;
708
709 assert(res->target != PIPE_BUFFER);
710
711 if (!rtex->is_depth && rtex->cmask.size) {
712 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
713 0, util_max_layer(res, 0));
714 }
715 }
716
717 void si_init_blit_functions(struct si_context *sctx)
718 {
719 sctx->b.b.clear = si_clear;
720 sctx->b.b.clear_render_target = si_clear_render_target;
721 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
722 sctx->b.b.resource_copy_region = si_resource_copy_region;
723 sctx->b.b.blit = si_blit;
724 sctx->b.b.flush_resource = si_flush_resource;
725 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
726 }