nvc0: sort performance counter queries by name
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_DISABLE_RENDER_COND = 4,
33
34 SI_CLEAR = 0,
35
36 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER,
37
38 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
39 SI_DISABLE_RENDER_COND,
40
41 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES,
42
43 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_DISABLE_RENDER_COND,
44
45 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER
46 };
47
48 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
49 {
50 struct si_context *sctx = (struct si_context *)ctx;
51
52 r600_suspend_nontimer_queries(&sctx->b);
53
54 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
55 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
56 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref);
57 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
58 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader);
59 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader);
62 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader);
63 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
64 if (sctx->queued.named.sample_mask) {
65 util_blitter_save_sample_mask(sctx->blitter,
66 sctx->queued.named.sample_mask->sample_mask);
67 }
68 if (sctx->queued.named.viewport[0]) {
69 util_blitter_save_viewport(sctx->blitter, &sctx->queued.named.viewport[0]->viewport);
70 }
71 if (sctx->queued.named.scissor[0]) {
72 util_blitter_save_scissor(sctx->blitter, &sctx->queued.named.scissor[0]->scissor);
73 }
74 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
75 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
76 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
77
78 if (op & SI_SAVE_FRAMEBUFFER)
79 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
80
81 if (op & SI_SAVE_TEXTURES) {
82 util_blitter_save_fragment_sampler_states(
83 sctx->blitter, 2,
84 sctx->samplers[PIPE_SHADER_FRAGMENT].states.saved_states);
85
86 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
87 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
88 }
89
90 if ((op & SI_DISABLE_RENDER_COND) && sctx->b.current_render_cond) {
91 util_blitter_save_render_condition(sctx->blitter,
92 sctx->b.current_render_cond,
93 sctx->b.current_render_cond_cond,
94 sctx->b.current_render_cond_mode);
95 }
96 }
97
98 static void si_blitter_end(struct pipe_context *ctx)
99 {
100 struct si_context *sctx = (struct si_context *)ctx;
101 r600_resume_nontimer_queries(&sctx->b);
102 }
103
104 static unsigned u_max_sample(struct pipe_resource *r)
105 {
106 return r->nr_samples ? r->nr_samples - 1 : 0;
107 }
108
109 static void si_blit_decompress_depth(struct pipe_context *ctx,
110 struct r600_texture *texture,
111 struct r600_texture *staging,
112 unsigned first_level, unsigned last_level,
113 unsigned first_layer, unsigned last_layer,
114 unsigned first_sample, unsigned last_sample)
115 {
116 struct si_context *sctx = (struct si_context *)ctx;
117 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
118 float depth = 1.0f;
119 const struct util_format_description *desc;
120 struct r600_texture *flushed_depth_texture = staging ?
121 staging : texture->flushed_depth_texture;
122
123 if (!staging && !texture->dirty_level_mask)
124 return;
125
126 max_sample = u_max_sample(&texture->resource.b.b);
127
128 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
129
130 if (util_format_has_depth(desc))
131 sctx->dbcb_depth_copy_enabled = true;
132 if (util_format_has_stencil(desc))
133 sctx->dbcb_stencil_copy_enabled = true;
134
135 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
136
137 for (level = first_level; level <= last_level; level++) {
138 if (!staging && !(texture->dirty_level_mask & (1 << level)))
139 continue;
140
141 /* The smaller the mipmap level, the less layers there are
142 * as far as 3D textures are concerned. */
143 max_layer = util_max_layer(&texture->resource.b.b, level);
144 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
145
146 for (layer = first_layer; layer <= checked_last_layer; layer++) {
147 for (sample = first_sample; sample <= last_sample; sample++) {
148 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
149
150 sctx->dbcb_copy_sample = sample;
151 si_mark_atom_dirty(sctx, &sctx->db_render_state);
152
153 surf_tmpl.format = texture->resource.b.b.format;
154 surf_tmpl.u.tex.level = level;
155 surf_tmpl.u.tex.first_layer = layer;
156 surf_tmpl.u.tex.last_layer = layer;
157
158 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
159
160 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
161 cbsurf = ctx->create_surface(ctx,
162 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
163
164 si_blitter_begin(ctx, SI_DECOMPRESS);
165 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
166 sctx->custom_dsa_flush, depth);
167 si_blitter_end(ctx);
168
169 pipe_surface_reference(&zsurf, NULL);
170 pipe_surface_reference(&cbsurf, NULL);
171 }
172 }
173
174 /* The texture will always be dirty if some layers aren't flushed.
175 * I don't think this case can occur though. */
176 if (!staging &&
177 first_layer == 0 && last_layer == max_layer &&
178 first_sample == 0 && last_sample == max_sample) {
179 texture->dirty_level_mask &= ~(1 << level);
180 }
181 }
182
183 sctx->dbcb_depth_copy_enabled = false;
184 sctx->dbcb_stencil_copy_enabled = false;
185 si_mark_atom_dirty(sctx, &sctx->db_render_state);
186 }
187
188 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
189 struct r600_texture *texture,
190 unsigned first_level, unsigned last_level,
191 unsigned first_layer, unsigned last_layer)
192 {
193 struct pipe_surface *zsurf, surf_tmpl = {{0}};
194 unsigned layer, max_layer, checked_last_layer, level;
195
196 sctx->db_inplace_flush_enabled = true;
197 si_mark_atom_dirty(sctx, &sctx->db_render_state);
198
199 surf_tmpl.format = texture->resource.b.b.format;
200
201 for (level = first_level; level <= last_level; level++) {
202 if (!(texture->dirty_level_mask & (1 << level)))
203 continue;
204
205 surf_tmpl.u.tex.level = level;
206
207 /* The smaller the mipmap level, the less layers there are
208 * as far as 3D textures are concerned. */
209 max_layer = util_max_layer(&texture->resource.b.b, level);
210 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
211
212 for (layer = first_layer; layer <= checked_last_layer; layer++) {
213 surf_tmpl.u.tex.first_layer = layer;
214 surf_tmpl.u.tex.last_layer = layer;
215
216 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
217
218 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
219 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
220 sctx->custom_dsa_flush,
221 1.0f);
222 si_blitter_end(&sctx->b.b);
223
224 pipe_surface_reference(&zsurf, NULL);
225 }
226
227 /* The texture will always be dirty if some layers aren't flushed.
228 * I don't think this case occurs often though. */
229 if (first_layer == 0 && last_layer == max_layer) {
230 texture->dirty_level_mask &= ~(1 << level);
231 }
232 }
233
234 sctx->db_inplace_flush_enabled = false;
235 si_mark_atom_dirty(sctx, &sctx->db_render_state);
236 }
237
238 void si_flush_depth_textures(struct si_context *sctx,
239 struct si_textures_info *textures)
240 {
241 unsigned i;
242 unsigned mask = textures->depth_texture_mask;
243
244 while (mask) {
245 struct pipe_sampler_view *view;
246 struct r600_texture *tex;
247
248 i = u_bit_scan(&mask);
249
250 view = textures->views.views[i];
251 assert(view);
252
253 tex = (struct r600_texture *)view->texture;
254 assert(tex->is_depth && !tex->is_flushing_texture);
255
256 si_blit_decompress_depth_in_place(sctx, tex,
257 view->u.tex.first_level, view->u.tex.last_level,
258 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
259 }
260 }
261
262 static void si_blit_decompress_color(struct pipe_context *ctx,
263 struct r600_texture *rtex,
264 unsigned first_level, unsigned last_level,
265 unsigned first_layer, unsigned last_layer)
266 {
267 struct si_context *sctx = (struct si_context *)ctx;
268 unsigned layer, level, checked_last_layer, max_layer;
269
270 if (!rtex->dirty_level_mask)
271 return;
272
273 for (level = first_level; level <= last_level; level++) {
274 if (!(rtex->dirty_level_mask & (1 << level)))
275 continue;
276
277 /* The smaller the mipmap level, the less layers there are
278 * as far as 3D textures are concerned. */
279 max_layer = util_max_layer(&rtex->resource.b.b, level);
280 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
281
282 for (layer = first_layer; layer <= checked_last_layer; layer++) {
283 struct pipe_surface *cbsurf, surf_tmpl;
284
285 surf_tmpl.format = rtex->resource.b.b.format;
286 surf_tmpl.u.tex.level = level;
287 surf_tmpl.u.tex.first_layer = layer;
288 surf_tmpl.u.tex.last_layer = layer;
289 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
290
291 si_blitter_begin(ctx, SI_DECOMPRESS);
292 util_blitter_custom_color(sctx->blitter, cbsurf,
293 rtex->fmask.size ? sctx->custom_blend_decompress :
294 sctx->custom_blend_fastclear);
295 si_blitter_end(ctx);
296
297 pipe_surface_reference(&cbsurf, NULL);
298 }
299
300 /* The texture will always be dirty if some layers aren't flushed.
301 * I don't think this case occurs often though. */
302 if (first_layer == 0 && last_layer == max_layer) {
303 rtex->dirty_level_mask &= ~(1 << level);
304 }
305 }
306 }
307
308 void si_decompress_color_textures(struct si_context *sctx,
309 struct si_textures_info *textures)
310 {
311 unsigned i;
312 unsigned mask = textures->compressed_colortex_mask;
313
314 while (mask) {
315 struct pipe_sampler_view *view;
316 struct r600_texture *tex;
317
318 i = u_bit_scan(&mask);
319
320 view = textures->views.views[i];
321 assert(view);
322
323 tex = (struct r600_texture *)view->texture;
324 assert(tex->cmask.size || tex->fmask.size);
325
326 si_blit_decompress_color(&sctx->b.b, tex,
327 view->u.tex.first_level, view->u.tex.last_level,
328 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
329 }
330 }
331
332 static void si_clear(struct pipe_context *ctx, unsigned buffers,
333 const union pipe_color_union *color,
334 double depth, unsigned stencil)
335 {
336 struct si_context *sctx = (struct si_context *)ctx;
337 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
338 struct pipe_surface *zsbuf = fb->zsbuf;
339 struct r600_texture *zstex =
340 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
341
342 if (buffers & PIPE_CLEAR_COLOR) {
343 evergreen_do_fast_color_clear(&sctx->b, fb, &sctx->framebuffer.atom,
344 &buffers, color);
345 if (!buffers)
346 return; /* all buffers have been fast cleared */
347 }
348
349 if (buffers & PIPE_CLEAR_COLOR) {
350 int i;
351
352 /* These buffers cannot use fast clear, make sure to disable expansion. */
353 for (i = 0; i < fb->nr_cbufs; i++) {
354 struct r600_texture *tex;
355
356 /* If not clearing this buffer, skip. */
357 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
358 continue;
359
360 if (!fb->cbufs[i])
361 continue;
362
363 tex = (struct r600_texture *)fb->cbufs[i]->texture;
364 if (tex->fmask.size == 0)
365 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
366 }
367 }
368
369 if (buffers & PIPE_CLEAR_DEPTH &&
370 zstex && zstex->htile_buffer &&
371 zsbuf->u.tex.level == 0 &&
372 zsbuf->u.tex.first_layer == 0 &&
373 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
374 /* Need to disable EXPCLEAR temporarily if clearing
375 * to a new value. */
376 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
377 sctx->db_depth_disable_expclear = true;
378 }
379
380 zstex->depth_clear_value = depth;
381 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
382 sctx->db_depth_clear = true;
383 si_mark_atom_dirty(sctx, &sctx->db_render_state);
384 }
385
386 si_blitter_begin(ctx, SI_CLEAR);
387 util_blitter_clear(sctx->blitter, fb->width, fb->height,
388 util_framebuffer_get_num_layers(fb),
389 buffers, color, depth, stencil);
390 si_blitter_end(ctx);
391
392 if (sctx->db_depth_clear) {
393 sctx->db_depth_clear = false;
394 sctx->db_depth_disable_expclear = false;
395 zstex->depth_cleared = true;
396 si_mark_atom_dirty(sctx, &sctx->db_render_state);
397 }
398 }
399
400 static void si_clear_render_target(struct pipe_context *ctx,
401 struct pipe_surface *dst,
402 const union pipe_color_union *color,
403 unsigned dstx, unsigned dsty,
404 unsigned width, unsigned height)
405 {
406 struct si_context *sctx = (struct si_context *)ctx;
407
408 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
409 util_blitter_clear_render_target(sctx->blitter, dst, color,
410 dstx, dsty, width, height);
411 si_blitter_end(ctx);
412 }
413
414 static void si_clear_depth_stencil(struct pipe_context *ctx,
415 struct pipe_surface *dst,
416 unsigned clear_flags,
417 double depth,
418 unsigned stencil,
419 unsigned dstx, unsigned dsty,
420 unsigned width, unsigned height)
421 {
422 struct si_context *sctx = (struct si_context *)ctx;
423
424 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
425 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
426 dstx, dsty, width, height);
427 si_blitter_end(ctx);
428 }
429
430 /* Helper for decompressing a portion of a color or depth resource before
431 * blitting if any decompression is needed.
432 * The driver doesn't decompress resources automatically while u_blitter is
433 * rendering. */
434 static void si_decompress_subresource(struct pipe_context *ctx,
435 struct pipe_resource *tex,
436 unsigned level,
437 unsigned first_layer, unsigned last_layer)
438 {
439 struct si_context *sctx = (struct si_context *)ctx;
440 struct r600_texture *rtex = (struct r600_texture*)tex;
441
442 if (rtex->is_depth && !rtex->is_flushing_texture) {
443 si_blit_decompress_depth_in_place(sctx, rtex,
444 level, level,
445 first_layer, last_layer);
446 } else if (rtex->fmask.size || rtex->cmask.size) {
447 si_blit_decompress_color(ctx, rtex, level, level,
448 first_layer, last_layer);
449 }
450 }
451
452 struct texture_orig_info {
453 unsigned format;
454 unsigned width0;
455 unsigned height0;
456 unsigned npix_x;
457 unsigned npix_y;
458 unsigned npix0_x;
459 unsigned npix0_y;
460 };
461
462 void si_resource_copy_region(struct pipe_context *ctx,
463 struct pipe_resource *dst,
464 unsigned dst_level,
465 unsigned dstx, unsigned dsty, unsigned dstz,
466 struct pipe_resource *src,
467 unsigned src_level,
468 const struct pipe_box *src_box)
469 {
470 struct si_context *sctx = (struct si_context *)ctx;
471 struct pipe_surface *dst_view, dst_templ;
472 struct pipe_sampler_view src_templ, *src_view;
473 unsigned dst_width, dst_height, src_width0, src_height0;
474 unsigned src_force_level = 0;
475 struct pipe_box sbox, dstbox;
476
477 /* Handle buffers first. */
478 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
479 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
480 return;
481 }
482
483 assert(u_max_sample(dst) == u_max_sample(src));
484
485 /* The driver doesn't decompress resources automatically while
486 * u_blitter is rendering. */
487 si_decompress_subresource(ctx, src, src_level,
488 src_box->z, src_box->z + src_box->depth - 1);
489
490 dst_width = u_minify(dst->width0, dst_level);
491 dst_height = u_minify(dst->height0, dst_level);
492 src_width0 = src->width0;
493 src_height0 = src->height0;
494
495 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
496 util_blitter_default_src_texture(&src_templ, src, src_level);
497
498 if (util_format_is_compressed(src->format) &&
499 util_format_is_compressed(dst->format)) {
500 unsigned blocksize = util_format_get_blocksize(src->format);
501
502 if (blocksize == 8)
503 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
504 else
505 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
506 dst_templ.format = src_templ.format;
507
508 dst_width = util_format_get_nblocksx(dst->format, dst_width);
509 dst_height = util_format_get_nblocksy(dst->format, dst_height);
510 src_width0 = util_format_get_nblocksx(src->format, src_width0);
511 src_height0 = util_format_get_nblocksy(src->format, src_height0);
512
513 dstx = util_format_get_nblocksx(dst->format, dstx);
514 dsty = util_format_get_nblocksy(dst->format, dsty);
515
516 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
517 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
518 sbox.z = src_box->z;
519 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
520 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
521 sbox.depth = src_box->depth;
522 src_box = &sbox;
523
524 src_force_level = src_level;
525 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
526 /* also *8_SNORM has precision issues, use UNORM instead */
527 util_format_is_snorm(src->format)) {
528 if (util_format_is_subsampled_422(src->format)) {
529 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
530 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
531
532 dst_width = util_format_get_nblocksx(dst->format, dst_width);
533 src_width0 = util_format_get_nblocksx(src->format, src_width0);
534
535 dstx = util_format_get_nblocksx(dst->format, dstx);
536
537 sbox = *src_box;
538 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
539 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
540 src_box = &sbox;
541 } else {
542 unsigned blocksize = util_format_get_blocksize(src->format);
543
544 switch (blocksize) {
545 case 1:
546 dst_templ.format = PIPE_FORMAT_R8_UNORM;
547 src_templ.format = PIPE_FORMAT_R8_UNORM;
548 break;
549 case 2:
550 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
551 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
552 break;
553 case 4:
554 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
555 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
556 break;
557 case 8:
558 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
559 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
560 break;
561 case 16:
562 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
563 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
564 break;
565 default:
566 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
567 util_format_short_name(src->format), blocksize);
568 assert(0);
569 }
570 }
571 }
572
573 /* Initialize the surface. */
574 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
575 dst_width, dst_height);
576
577 /* Initialize the sampler view. */
578 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
579 src_width0, src_height0,
580 src_force_level);
581
582 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
583 abs(src_box->depth), &dstbox);
584
585 /* Copy. */
586 si_blitter_begin(ctx, SI_COPY);
587 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
588 src_view, src_box, src_width0, src_height0,
589 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
590 FALSE);
591 si_blitter_end(ctx);
592
593 pipe_surface_reference(&dst_view, NULL);
594 pipe_sampler_view_reference(&src_view, NULL);
595 }
596
597 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
598 static enum pipe_format int_to_norm_format(enum pipe_format format)
599 {
600 switch (format) {
601 #define REPLACE_FORMAT_SIGN(format,sign) \
602 case PIPE_FORMAT_##format##_##sign##INT: \
603 return PIPE_FORMAT_##format##_##sign##NORM
604 #define REPLACE_FORMAT(format) \
605 REPLACE_FORMAT_SIGN(format, U); \
606 REPLACE_FORMAT_SIGN(format, S)
607
608 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
609 REPLACE_FORMAT(R8);
610 REPLACE_FORMAT(R8G8);
611 REPLACE_FORMAT(R8G8B8X8);
612 REPLACE_FORMAT(R8G8B8A8);
613 REPLACE_FORMAT(A8);
614 REPLACE_FORMAT(I8);
615 REPLACE_FORMAT(L8);
616 REPLACE_FORMAT(L8A8);
617 REPLACE_FORMAT(R16);
618 REPLACE_FORMAT(R16G16);
619 REPLACE_FORMAT(R16G16B16X16);
620 REPLACE_FORMAT(R16G16B16A16);
621 REPLACE_FORMAT(A16);
622 REPLACE_FORMAT(I16);
623 REPLACE_FORMAT(L16);
624 REPLACE_FORMAT(L16A16);
625
626 #undef REPLACE_FORMAT
627 #undef REPLACE_FORMAT_SIGN
628 default:
629 return format;
630 }
631 }
632
633 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
634 const struct pipe_blit_info *info)
635 {
636 struct si_context *sctx = (struct si_context*)ctx;
637 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
638 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
639 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
640 enum pipe_format format = int_to_norm_format(info->dst.format);
641 unsigned sample_mask = ~0;
642
643 if (info->src.resource->nr_samples > 1 &&
644 info->dst.resource->nr_samples <= 1 &&
645 util_max_layer(info->src.resource, 0) == 0 &&
646 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
647 info->dst.format == info->src.format &&
648 !util_format_is_pure_integer(format) &&
649 !util_format_is_depth_or_stencil(format) &&
650 !info->scissor_enable &&
651 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
652 dst_width == info->src.resource->width0 &&
653 dst_height == info->src.resource->height0 &&
654 info->dst.box.x == 0 &&
655 info->dst.box.y == 0 &&
656 info->dst.box.width == dst_width &&
657 info->dst.box.height == dst_height &&
658 info->dst.box.depth == 1 &&
659 info->src.box.x == 0 &&
660 info->src.box.y == 0 &&
661 info->src.box.width == dst_width &&
662 info->src.box.height == dst_height &&
663 info->src.box.depth == 1 &&
664 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
665 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
666 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
667 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
668 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
669 util_blitter_custom_resolve_color(sctx->blitter,
670 info->dst.resource, info->dst.level,
671 info->dst.box.z,
672 info->src.resource, info->src.box.z,
673 sample_mask, sctx->custom_blend_resolve,
674 format);
675 si_blitter_end(ctx);
676 return true;
677 }
678 return false;
679 }
680
681 static void si_blit(struct pipe_context *ctx,
682 const struct pipe_blit_info *info)
683 {
684 struct si_context *sctx = (struct si_context*)ctx;
685
686 if (do_hardware_msaa_resolve(ctx, info)) {
687 return;
688 }
689
690 assert(util_blitter_is_blit_supported(sctx->blitter, info));
691
692 /* The driver doesn't decompress resources automatically while
693 * u_blitter is rendering. */
694 si_decompress_subresource(ctx, info->src.resource, info->src.level,
695 info->src.box.z,
696 info->src.box.z + info->src.box.depth - 1);
697
698 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
699 util_try_blit_via_copy_region(ctx, info))
700 return;
701
702 si_blitter_begin(ctx, SI_BLIT |
703 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
704 util_blitter_blit(sctx->blitter, info);
705 si_blitter_end(ctx);
706 }
707
708 static void si_flush_resource(struct pipe_context *ctx,
709 struct pipe_resource *res)
710 {
711 struct r600_texture *rtex = (struct r600_texture*)res;
712
713 assert(res->target != PIPE_BUFFER);
714
715 if (!rtex->is_depth && rtex->cmask.size) {
716 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
717 0, util_max_layer(res, 0));
718 }
719 }
720
721 void si_init_blit_functions(struct si_context *sctx)
722 {
723 sctx->b.b.clear = si_clear;
724 sctx->b.b.clear_render_target = si_clear_render_target;
725 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
726 sctx->b.b.resource_copy_region = si_resource_copy_region;
727 sctx->b.b.blit = si_blit;
728 sctx->b.b.flush_resource = si_flush_resource;
729 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
730 }