radeonsi: add SI_SAVE_FRAGMENT_STATE blitter flag
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 r600_suspend_nontimer_queries(&sctx->b);
56
57 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
58 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
59 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
62 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
63 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
65 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
66
67 if (op & SI_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
69 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
70 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
71 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
72 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
73 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
74 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
75 }
76
77 if (op & SI_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
79
80 if (op & SI_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 sctx->blitter, 2,
83 sctx->samplers[PIPE_SHADER_FRAGMENT].states.saved_states);
84
85 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
86 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
87 }
88
89 if ((op & SI_DISABLE_RENDER_COND) && sctx->b.current_render_cond) {
90 util_blitter_save_render_condition(sctx->blitter,
91 sctx->b.current_render_cond,
92 sctx->b.current_render_cond_cond,
93 sctx->b.current_render_cond_mode);
94 }
95 }
96
97 static void si_blitter_end(struct pipe_context *ctx)
98 {
99 struct si_context *sctx = (struct si_context *)ctx;
100 r600_resume_nontimer_queries(&sctx->b);
101 }
102
103 static unsigned u_max_sample(struct pipe_resource *r)
104 {
105 return r->nr_samples ? r->nr_samples - 1 : 0;
106 }
107
108 static void si_blit_decompress_depth(struct pipe_context *ctx,
109 struct r600_texture *texture,
110 struct r600_texture *staging,
111 unsigned first_level, unsigned last_level,
112 unsigned first_layer, unsigned last_layer,
113 unsigned first_sample, unsigned last_sample)
114 {
115 struct si_context *sctx = (struct si_context *)ctx;
116 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
117 float depth = 1.0f;
118 const struct util_format_description *desc;
119 struct r600_texture *flushed_depth_texture = staging ?
120 staging : texture->flushed_depth_texture;
121
122 if (!staging && !texture->dirty_level_mask)
123 return;
124
125 max_sample = u_max_sample(&texture->resource.b.b);
126
127 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
128
129 if (util_format_has_depth(desc))
130 sctx->dbcb_depth_copy_enabled = true;
131 if (util_format_has_stencil(desc))
132 sctx->dbcb_stencil_copy_enabled = true;
133
134 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
135
136 for (level = first_level; level <= last_level; level++) {
137 if (!staging && !(texture->dirty_level_mask & (1 << level)))
138 continue;
139
140 /* The smaller the mipmap level, the less layers there are
141 * as far as 3D textures are concerned. */
142 max_layer = util_max_layer(&texture->resource.b.b, level);
143 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
144
145 for (layer = first_layer; layer <= checked_last_layer; layer++) {
146 for (sample = first_sample; sample <= last_sample; sample++) {
147 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
148
149 sctx->dbcb_copy_sample = sample;
150 si_mark_atom_dirty(sctx, &sctx->db_render_state);
151
152 surf_tmpl.format = texture->resource.b.b.format;
153 surf_tmpl.u.tex.level = level;
154 surf_tmpl.u.tex.first_layer = layer;
155 surf_tmpl.u.tex.last_layer = layer;
156
157 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
158
159 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
160 cbsurf = ctx->create_surface(ctx,
161 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
162
163 si_blitter_begin(ctx, SI_DECOMPRESS);
164 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
165 sctx->custom_dsa_flush, depth);
166 si_blitter_end(ctx);
167
168 pipe_surface_reference(&zsurf, NULL);
169 pipe_surface_reference(&cbsurf, NULL);
170 }
171 }
172
173 /* The texture will always be dirty if some layers aren't flushed.
174 * I don't think this case can occur though. */
175 if (!staging &&
176 first_layer == 0 && last_layer == max_layer &&
177 first_sample == 0 && last_sample == max_sample) {
178 texture->dirty_level_mask &= ~(1 << level);
179 }
180 }
181
182 sctx->dbcb_depth_copy_enabled = false;
183 sctx->dbcb_stencil_copy_enabled = false;
184 si_mark_atom_dirty(sctx, &sctx->db_render_state);
185 }
186
187 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
188 struct r600_texture *texture,
189 bool is_stencil_sampler,
190 unsigned first_level, unsigned last_level,
191 unsigned first_layer, unsigned last_layer)
192 {
193 struct pipe_surface *zsurf, surf_tmpl = {{0}};
194 unsigned layer, max_layer, checked_last_layer, level;
195 unsigned *dirty_level_mask;
196
197 if (is_stencil_sampler) {
198 sctx->db_flush_stencil_inplace = true;
199 dirty_level_mask = &texture->stencil_dirty_level_mask;
200 } else {
201 sctx->db_flush_depth_inplace = true;
202 dirty_level_mask = &texture->dirty_level_mask;
203 }
204 si_mark_atom_dirty(sctx, &sctx->db_render_state);
205
206 surf_tmpl.format = texture->resource.b.b.format;
207
208 for (level = first_level; level <= last_level; level++) {
209 if (!(*dirty_level_mask & (1 << level)))
210 continue;
211
212 surf_tmpl.u.tex.level = level;
213
214 /* The smaller the mipmap level, the less layers there are
215 * as far as 3D textures are concerned. */
216 max_layer = util_max_layer(&texture->resource.b.b, level);
217 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
218
219 for (layer = first_layer; layer <= checked_last_layer; layer++) {
220 surf_tmpl.u.tex.first_layer = layer;
221 surf_tmpl.u.tex.last_layer = layer;
222
223 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
224
225 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
226 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
227 sctx->custom_dsa_flush,
228 1.0f);
229 si_blitter_end(&sctx->b.b);
230
231 pipe_surface_reference(&zsurf, NULL);
232 }
233
234 /* The texture will always be dirty if some layers aren't flushed.
235 * I don't think this case occurs often though. */
236 if (first_layer == 0 && last_layer == max_layer) {
237 *dirty_level_mask &= ~(1 << level);
238 }
239 }
240
241 sctx->db_flush_depth_inplace = false;
242 sctx->db_flush_stencil_inplace = false;
243 si_mark_atom_dirty(sctx, &sctx->db_render_state);
244 }
245
246 void si_flush_depth_textures(struct si_context *sctx,
247 struct si_textures_info *textures)
248 {
249 unsigned i;
250 unsigned mask = textures->depth_texture_mask;
251
252 while (mask) {
253 struct pipe_sampler_view *view;
254 struct si_sampler_view *sview;
255 struct r600_texture *tex;
256
257 i = u_bit_scan(&mask);
258
259 view = textures->views.views[i];
260 assert(view);
261 sview = (struct si_sampler_view*)view;
262
263 tex = (struct r600_texture *)view->texture;
264 assert(tex->is_depth && !tex->is_flushing_texture);
265
266 si_blit_decompress_depth_in_place(sctx, tex,
267 sview->is_stencil_sampler,
268 view->u.tex.first_level, view->u.tex.last_level,
269 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
270 }
271 }
272
273 static void si_blit_decompress_color(struct pipe_context *ctx,
274 struct r600_texture *rtex,
275 unsigned first_level, unsigned last_level,
276 unsigned first_layer, unsigned last_layer)
277 {
278 struct si_context *sctx = (struct si_context *)ctx;
279 unsigned layer, level, checked_last_layer, max_layer;
280
281 if (!rtex->dirty_level_mask)
282 return;
283
284 for (level = first_level; level <= last_level; level++) {
285 if (!(rtex->dirty_level_mask & (1 << level)))
286 continue;
287
288 /* The smaller the mipmap level, the less layers there are
289 * as far as 3D textures are concerned. */
290 max_layer = util_max_layer(&rtex->resource.b.b, level);
291 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
292
293 for (layer = first_layer; layer <= checked_last_layer; layer++) {
294 struct pipe_surface *cbsurf, surf_tmpl;
295
296 surf_tmpl.format = rtex->resource.b.b.format;
297 surf_tmpl.u.tex.level = level;
298 surf_tmpl.u.tex.first_layer = layer;
299 surf_tmpl.u.tex.last_layer = layer;
300 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
301
302 si_blitter_begin(ctx, SI_DECOMPRESS);
303 util_blitter_custom_color(sctx->blitter, cbsurf,
304 rtex->fmask.size ? sctx->custom_blend_decompress :
305 sctx->custom_blend_fastclear);
306 si_blitter_end(ctx);
307
308 pipe_surface_reference(&cbsurf, NULL);
309 }
310
311 /* The texture will always be dirty if some layers aren't flushed.
312 * I don't think this case occurs often though. */
313 if (first_layer == 0 && last_layer == max_layer) {
314 rtex->dirty_level_mask &= ~(1 << level);
315 }
316 }
317 }
318
319 void si_decompress_color_textures(struct si_context *sctx,
320 struct si_textures_info *textures)
321 {
322 unsigned i;
323 unsigned mask = textures->compressed_colortex_mask;
324
325 while (mask) {
326 struct pipe_sampler_view *view;
327 struct r600_texture *tex;
328
329 i = u_bit_scan(&mask);
330
331 view = textures->views.views[i];
332 assert(view);
333
334 tex = (struct r600_texture *)view->texture;
335 assert(tex->cmask.size || tex->fmask.size || tex->dcc_buffer);
336
337 si_blit_decompress_color(&sctx->b.b, tex,
338 view->u.tex.first_level, view->u.tex.last_level,
339 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
340 }
341 }
342
343 static void si_clear(struct pipe_context *ctx, unsigned buffers,
344 const union pipe_color_union *color,
345 double depth, unsigned stencil)
346 {
347 struct si_context *sctx = (struct si_context *)ctx;
348 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
349 struct pipe_surface *zsbuf = fb->zsbuf;
350 struct r600_texture *zstex =
351 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
352
353 if (buffers & PIPE_CLEAR_COLOR) {
354 evergreen_do_fast_color_clear(&sctx->b, fb,
355 &sctx->framebuffer.atom, &buffers,
356 &sctx->framebuffer.dirty_cbufs,
357 color);
358 if (!buffers)
359 return; /* all buffers have been fast cleared */
360 }
361
362 if (buffers & PIPE_CLEAR_COLOR) {
363 int i;
364
365 /* These buffers cannot use fast clear, make sure to disable expansion. */
366 for (i = 0; i < fb->nr_cbufs; i++) {
367 struct r600_texture *tex;
368
369 /* If not clearing this buffer, skip. */
370 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
371 continue;
372
373 if (!fb->cbufs[i])
374 continue;
375
376 tex = (struct r600_texture *)fb->cbufs[i]->texture;
377 if (tex->fmask.size == 0)
378 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
379 }
380 }
381
382 if (buffers & PIPE_CLEAR_DEPTH &&
383 zstex && zstex->htile_buffer &&
384 zsbuf->u.tex.level == 0 &&
385 zsbuf->u.tex.first_layer == 0 &&
386 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
387 /* Need to disable EXPCLEAR temporarily if clearing
388 * to a new value. */
389 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
390 sctx->db_depth_disable_expclear = true;
391 }
392
393 zstex->depth_clear_value = depth;
394 sctx->framebuffer.dirty_zsbuf = true;
395 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
396 sctx->db_depth_clear = true;
397 si_mark_atom_dirty(sctx, &sctx->db_render_state);
398 }
399
400 si_blitter_begin(ctx, SI_CLEAR);
401 util_blitter_clear(sctx->blitter, fb->width, fb->height,
402 util_framebuffer_get_num_layers(fb),
403 buffers, color, depth, stencil);
404 si_blitter_end(ctx);
405
406 if (sctx->db_depth_clear) {
407 sctx->db_depth_clear = false;
408 sctx->db_depth_disable_expclear = false;
409 zstex->depth_cleared = true;
410 si_mark_atom_dirty(sctx, &sctx->db_render_state);
411 }
412 }
413
414 static void si_clear_render_target(struct pipe_context *ctx,
415 struct pipe_surface *dst,
416 const union pipe_color_union *color,
417 unsigned dstx, unsigned dsty,
418 unsigned width, unsigned height)
419 {
420 struct si_context *sctx = (struct si_context *)ctx;
421
422 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
423 util_blitter_clear_render_target(sctx->blitter, dst, color,
424 dstx, dsty, width, height);
425 si_blitter_end(ctx);
426 }
427
428 static void si_clear_depth_stencil(struct pipe_context *ctx,
429 struct pipe_surface *dst,
430 unsigned clear_flags,
431 double depth,
432 unsigned stencil,
433 unsigned dstx, unsigned dsty,
434 unsigned width, unsigned height)
435 {
436 struct si_context *sctx = (struct si_context *)ctx;
437
438 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
439 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
440 dstx, dsty, width, height);
441 si_blitter_end(ctx);
442 }
443
444 /* Helper for decompressing a portion of a color or depth resource before
445 * blitting if any decompression is needed.
446 * The driver doesn't decompress resources automatically while u_blitter is
447 * rendering. */
448 static void si_decompress_subresource(struct pipe_context *ctx,
449 struct pipe_resource *tex,
450 unsigned level,
451 unsigned first_layer, unsigned last_layer)
452 {
453 struct si_context *sctx = (struct si_context *)ctx;
454 struct r600_texture *rtex = (struct r600_texture*)tex;
455
456 if (rtex->is_depth && !rtex->is_flushing_texture) {
457 si_blit_decompress_depth_in_place(sctx, rtex, false,
458 level, level,
459 first_layer, last_layer);
460 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
461 si_blit_decompress_depth_in_place(sctx, rtex, true,
462 level, level,
463 first_layer, last_layer);
464 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_buffer) {
465 si_blit_decompress_color(ctx, rtex, level, level,
466 first_layer, last_layer);
467 }
468 }
469
470 struct texture_orig_info {
471 unsigned format;
472 unsigned width0;
473 unsigned height0;
474 unsigned npix_x;
475 unsigned npix_y;
476 unsigned npix0_x;
477 unsigned npix0_y;
478 };
479
480 void si_resource_copy_region(struct pipe_context *ctx,
481 struct pipe_resource *dst,
482 unsigned dst_level,
483 unsigned dstx, unsigned dsty, unsigned dstz,
484 struct pipe_resource *src,
485 unsigned src_level,
486 const struct pipe_box *src_box)
487 {
488 struct si_context *sctx = (struct si_context *)ctx;
489 struct pipe_surface *dst_view, dst_templ;
490 struct pipe_sampler_view src_templ, *src_view;
491 unsigned dst_width, dst_height, src_width0, src_height0;
492 unsigned src_force_level = 0;
493 struct pipe_box sbox, dstbox;
494
495 /* Handle buffers first. */
496 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
497 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
498 return;
499 }
500
501 assert(u_max_sample(dst) == u_max_sample(src));
502
503 /* The driver doesn't decompress resources automatically while
504 * u_blitter is rendering. */
505 si_decompress_subresource(ctx, src, src_level,
506 src_box->z, src_box->z + src_box->depth - 1);
507
508 dst_width = u_minify(dst->width0, dst_level);
509 dst_height = u_minify(dst->height0, dst_level);
510 src_width0 = src->width0;
511 src_height0 = src->height0;
512
513 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
514 util_blitter_default_src_texture(&src_templ, src, src_level);
515
516 if (util_format_is_compressed(src->format) ||
517 util_format_is_compressed(dst->format)) {
518 unsigned blocksize = util_format_get_blocksize(src->format);
519
520 if (blocksize == 8)
521 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
522 else
523 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
524 dst_templ.format = src_templ.format;
525
526 dst_width = util_format_get_nblocksx(dst->format, dst_width);
527 dst_height = util_format_get_nblocksy(dst->format, dst_height);
528 src_width0 = util_format_get_nblocksx(src->format, src_width0);
529 src_height0 = util_format_get_nblocksy(src->format, src_height0);
530
531 dstx = util_format_get_nblocksx(dst->format, dstx);
532 dsty = util_format_get_nblocksy(dst->format, dsty);
533
534 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
535 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
536 sbox.z = src_box->z;
537 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
538 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
539 sbox.depth = src_box->depth;
540 src_box = &sbox;
541
542 src_force_level = src_level;
543 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
544 /* also *8_SNORM has precision issues, use UNORM instead */
545 util_format_is_snorm8(src->format)) {
546 if (util_format_is_subsampled_422(src->format)) {
547 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
548 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
549
550 dst_width = util_format_get_nblocksx(dst->format, dst_width);
551 src_width0 = util_format_get_nblocksx(src->format, src_width0);
552
553 dstx = util_format_get_nblocksx(dst->format, dstx);
554
555 sbox = *src_box;
556 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
557 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
558 src_box = &sbox;
559 } else {
560 unsigned blocksize = util_format_get_blocksize(src->format);
561
562 switch (blocksize) {
563 case 1:
564 dst_templ.format = PIPE_FORMAT_R8_UNORM;
565 src_templ.format = PIPE_FORMAT_R8_UNORM;
566 break;
567 case 2:
568 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
569 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
570 break;
571 case 4:
572 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
573 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
574 break;
575 case 8:
576 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
577 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
578 break;
579 case 16:
580 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
581 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
582 break;
583 default:
584 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
585 util_format_short_name(src->format), blocksize);
586 assert(0);
587 }
588 }
589 }
590
591 /* Initialize the surface. */
592 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
593 dst_width, dst_height);
594
595 /* Initialize the sampler view. */
596 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
597 src_width0, src_height0,
598 src_force_level);
599
600 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
601 abs(src_box->depth), &dstbox);
602
603 /* Copy. */
604 si_blitter_begin(ctx, SI_COPY);
605 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
606 src_view, src_box, src_width0, src_height0,
607 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
608 FALSE);
609 si_blitter_end(ctx);
610
611 pipe_surface_reference(&dst_view, NULL);
612 pipe_sampler_view_reference(&src_view, NULL);
613 }
614
615 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
616 static enum pipe_format int_to_norm_format(enum pipe_format format)
617 {
618 switch (format) {
619 #define REPLACE_FORMAT_SIGN(format,sign) \
620 case PIPE_FORMAT_##format##_##sign##INT: \
621 return PIPE_FORMAT_##format##_##sign##NORM
622 #define REPLACE_FORMAT(format) \
623 REPLACE_FORMAT_SIGN(format, U); \
624 REPLACE_FORMAT_SIGN(format, S)
625
626 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
627 REPLACE_FORMAT(R8);
628 REPLACE_FORMAT(R8G8);
629 REPLACE_FORMAT(R8G8B8X8);
630 REPLACE_FORMAT(R8G8B8A8);
631 REPLACE_FORMAT(A8);
632 REPLACE_FORMAT(I8);
633 REPLACE_FORMAT(L8);
634 REPLACE_FORMAT(L8A8);
635 REPLACE_FORMAT(R16);
636 REPLACE_FORMAT(R16G16);
637 REPLACE_FORMAT(R16G16B16X16);
638 REPLACE_FORMAT(R16G16B16A16);
639 REPLACE_FORMAT(A16);
640 REPLACE_FORMAT(I16);
641 REPLACE_FORMAT(L16);
642 REPLACE_FORMAT(L16A16);
643
644 #undef REPLACE_FORMAT
645 #undef REPLACE_FORMAT_SIGN
646 default:
647 return format;
648 }
649 }
650
651 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
652 const struct pipe_blit_info *info)
653 {
654 struct si_context *sctx = (struct si_context*)ctx;
655 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
656 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
657 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
658 enum pipe_format format = int_to_norm_format(info->dst.format);
659 unsigned sample_mask = ~0;
660
661 if (info->src.resource->nr_samples > 1 &&
662 info->dst.resource->nr_samples <= 1 &&
663 util_max_layer(info->src.resource, 0) == 0 &&
664 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
665 info->dst.format == info->src.format &&
666 !util_format_is_pure_integer(format) &&
667 !util_format_is_depth_or_stencil(format) &&
668 !info->scissor_enable &&
669 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
670 dst_width == info->src.resource->width0 &&
671 dst_height == info->src.resource->height0 &&
672 info->dst.box.x == 0 &&
673 info->dst.box.y == 0 &&
674 info->dst.box.width == dst_width &&
675 info->dst.box.height == dst_height &&
676 info->dst.box.depth == 1 &&
677 info->src.box.x == 0 &&
678 info->src.box.y == 0 &&
679 info->src.box.width == dst_width &&
680 info->src.box.height == dst_height &&
681 info->src.box.depth == 1 &&
682 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
683 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
684 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
685 !dst->dcc_buffer) {
686 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
687 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
688 util_blitter_custom_resolve_color(sctx->blitter,
689 info->dst.resource, info->dst.level,
690 info->dst.box.z,
691 info->src.resource, info->src.box.z,
692 sample_mask, sctx->custom_blend_resolve,
693 format);
694 si_blitter_end(ctx);
695 return true;
696 }
697 return false;
698 }
699
700 static void si_blit(struct pipe_context *ctx,
701 const struct pipe_blit_info *info)
702 {
703 struct si_context *sctx = (struct si_context*)ctx;
704
705 if (do_hardware_msaa_resolve(ctx, info)) {
706 return;
707 }
708
709 assert(util_blitter_is_blit_supported(sctx->blitter, info));
710
711 /* The driver doesn't decompress resources automatically while
712 * u_blitter is rendering. */
713 si_decompress_subresource(ctx, info->src.resource, info->src.level,
714 info->src.box.z,
715 info->src.box.z + info->src.box.depth - 1);
716
717 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
718 util_try_blit_via_copy_region(ctx, info))
719 return;
720
721 si_blitter_begin(ctx, SI_BLIT |
722 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
723 util_blitter_blit(sctx->blitter, info);
724 si_blitter_end(ctx);
725 }
726
727 static void si_flush_resource(struct pipe_context *ctx,
728 struct pipe_resource *res)
729 {
730 struct r600_texture *rtex = (struct r600_texture*)res;
731
732 assert(res->target != PIPE_BUFFER);
733
734 if (!rtex->is_depth && rtex->cmask.size) {
735 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
736 0, util_max_layer(res, 0));
737 }
738 }
739
740 void si_init_blit_functions(struct si_context *sctx)
741 {
742 sctx->b.b.clear = si_clear;
743 sctx->b.b.clear_render_target = si_clear_render_target;
744 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
745 sctx->b.b.resource_copy_region = si_resource_copy_region;
746 sctx->b.b.blit = si_blit;
747 sctx->b.b.flush_resource = si_flush_resource;
748 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
749 }