radeonsi: shorten slot masks to 32 bits
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
56 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
57 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
58 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
59 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
60 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
61 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
62 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
63 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
64
65 if (op & SI_SAVE_FRAGMENT_STATE) {
66 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
67 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
68 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
69 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
70 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
71 util_blitter_save_viewport(sctx->blitter, &sctx->b.viewports.states[0]);
72 util_blitter_save_scissor(sctx->blitter, &sctx->b.scissors.states[0]);
73 }
74
75 if (op & SI_SAVE_FRAMEBUFFER)
76 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
77
78 if (op & SI_SAVE_TEXTURES) {
79 util_blitter_save_fragment_sampler_states(
80 sctx->blitter, 2,
81 sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states);
82
83 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
84 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
85 }
86
87 if (op & SI_DISABLE_RENDER_COND)
88 sctx->b.render_cond_force_off = true;
89 }
90
91 static void si_blitter_end(struct pipe_context *ctx)
92 {
93 struct si_context *sctx = (struct si_context *)ctx;
94
95 sctx->b.render_cond_force_off = false;
96 }
97
98 static unsigned u_max_sample(struct pipe_resource *r)
99 {
100 return r->nr_samples ? r->nr_samples - 1 : 0;
101 }
102
103 static void si_blit_decompress_depth(struct pipe_context *ctx,
104 struct r600_texture *texture,
105 struct r600_texture *staging,
106 unsigned first_level, unsigned last_level,
107 unsigned first_layer, unsigned last_layer,
108 unsigned first_sample, unsigned last_sample)
109 {
110 struct si_context *sctx = (struct si_context *)ctx;
111 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
112 float depth = 1.0f;
113 const struct util_format_description *desc;
114 struct r600_texture *flushed_depth_texture = staging ?
115 staging : texture->flushed_depth_texture;
116
117 if (!staging && !texture->dirty_level_mask)
118 return;
119
120 max_sample = u_max_sample(&texture->resource.b.b);
121
122 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
123
124 if (util_format_has_depth(desc))
125 sctx->dbcb_depth_copy_enabled = true;
126 if (util_format_has_stencil(desc))
127 sctx->dbcb_stencil_copy_enabled = true;
128
129 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
130
131 for (level = first_level; level <= last_level; level++) {
132 if (!staging && !(texture->dirty_level_mask & (1 << level)))
133 continue;
134
135 /* The smaller the mipmap level, the less layers there are
136 * as far as 3D textures are concerned. */
137 max_layer = util_max_layer(&texture->resource.b.b, level);
138 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
139
140 for (layer = first_layer; layer <= checked_last_layer; layer++) {
141 for (sample = first_sample; sample <= last_sample; sample++) {
142 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
143
144 sctx->dbcb_copy_sample = sample;
145 si_mark_atom_dirty(sctx, &sctx->db_render_state);
146
147 surf_tmpl.format = texture->resource.b.b.format;
148 surf_tmpl.u.tex.level = level;
149 surf_tmpl.u.tex.first_layer = layer;
150 surf_tmpl.u.tex.last_layer = layer;
151
152 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
153
154 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
155 cbsurf = ctx->create_surface(ctx,
156 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
157
158 si_blitter_begin(ctx, SI_DECOMPRESS);
159 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
160 sctx->custom_dsa_flush, depth);
161 si_blitter_end(ctx);
162
163 pipe_surface_reference(&zsurf, NULL);
164 pipe_surface_reference(&cbsurf, NULL);
165 }
166 }
167
168 /* The texture will always be dirty if some layers aren't flushed.
169 * I don't think this case can occur though. */
170 if (!staging &&
171 first_layer == 0 && last_layer == max_layer &&
172 first_sample == 0 && last_sample == max_sample) {
173 texture->dirty_level_mask &= ~(1 << level);
174 }
175 }
176
177 sctx->dbcb_depth_copy_enabled = false;
178 sctx->dbcb_stencil_copy_enabled = false;
179 si_mark_atom_dirty(sctx, &sctx->db_render_state);
180 }
181
182 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
183 struct r600_texture *texture,
184 bool is_stencil_sampler,
185 unsigned first_level, unsigned last_level,
186 unsigned first_layer, unsigned last_layer)
187 {
188 struct pipe_surface *zsurf, surf_tmpl = {{0}};
189 unsigned layer, max_layer, checked_last_layer, level;
190 unsigned *dirty_level_mask;
191
192 if (is_stencil_sampler) {
193 sctx->db_flush_stencil_inplace = true;
194 dirty_level_mask = &texture->stencil_dirty_level_mask;
195 } else {
196 sctx->db_flush_depth_inplace = true;
197 dirty_level_mask = &texture->dirty_level_mask;
198 }
199 si_mark_atom_dirty(sctx, &sctx->db_render_state);
200
201 surf_tmpl.format = texture->resource.b.b.format;
202
203 for (level = first_level; level <= last_level; level++) {
204 if (!(*dirty_level_mask & (1 << level)))
205 continue;
206
207 surf_tmpl.u.tex.level = level;
208
209 /* The smaller the mipmap level, the less layers there are
210 * as far as 3D textures are concerned. */
211 max_layer = util_max_layer(&texture->resource.b.b, level);
212 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
213
214 for (layer = first_layer; layer <= checked_last_layer; layer++) {
215 surf_tmpl.u.tex.first_layer = layer;
216 surf_tmpl.u.tex.last_layer = layer;
217
218 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
219
220 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
221 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
222 sctx->custom_dsa_flush,
223 1.0f);
224 si_blitter_end(&sctx->b.b);
225
226 pipe_surface_reference(&zsurf, NULL);
227 }
228
229 /* The texture will always be dirty if some layers aren't flushed.
230 * I don't think this case occurs often though. */
231 if (first_layer == 0 && last_layer == max_layer) {
232 *dirty_level_mask &= ~(1 << level);
233 }
234 }
235
236 sctx->db_flush_depth_inplace = false;
237 sctx->db_flush_stencil_inplace = false;
238 si_mark_atom_dirty(sctx, &sctx->db_render_state);
239 }
240
241 static void
242 si_flush_depth_textures(struct si_context *sctx,
243 struct si_textures_info *textures)
244 {
245 unsigned i;
246 unsigned mask = textures->depth_texture_mask;
247
248 while (mask) {
249 struct pipe_sampler_view *view;
250 struct si_sampler_view *sview;
251 struct r600_texture *tex;
252
253 i = u_bit_scan(&mask);
254
255 view = textures->views.views[i];
256 assert(view);
257 sview = (struct si_sampler_view*)view;
258
259 tex = (struct r600_texture *)view->texture;
260 assert(tex->is_depth && !tex->is_flushing_texture);
261
262 si_blit_decompress_depth_in_place(sctx, tex,
263 sview->is_stencil_sampler,
264 view->u.tex.first_level, view->u.tex.last_level,
265 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
266 }
267 }
268
269 static void si_blit_decompress_color(struct pipe_context *ctx,
270 struct r600_texture *rtex,
271 unsigned first_level, unsigned last_level,
272 unsigned first_layer, unsigned last_layer,
273 bool need_dcc_decompress)
274 {
275 struct si_context *sctx = (struct si_context *)ctx;
276 unsigned layer, level, checked_last_layer, max_layer;
277
278 if (!rtex->dirty_level_mask && !need_dcc_decompress)
279 return;
280
281 for (level = first_level; level <= last_level; level++) {
282 void* custom_blend;
283
284 if (!(rtex->dirty_level_mask & (1 << level)) && !need_dcc_decompress)
285 continue;
286
287 if (rtex->dcc_offset && need_dcc_decompress) {
288 custom_blend = sctx->custom_blend_dcc_decompress;
289 } else if (rtex->fmask.size) {
290 custom_blend = sctx->custom_blend_decompress;
291 } else {
292 custom_blend = sctx->custom_blend_fastclear;
293 }
294
295 /* The smaller the mipmap level, the less layers there are
296 * as far as 3D textures are concerned. */
297 max_layer = util_max_layer(&rtex->resource.b.b, level);
298 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
299
300 for (layer = first_layer; layer <= checked_last_layer; layer++) {
301 struct pipe_surface *cbsurf, surf_tmpl;
302
303 surf_tmpl.format = rtex->resource.b.b.format;
304 surf_tmpl.u.tex.level = level;
305 surf_tmpl.u.tex.first_layer = layer;
306 surf_tmpl.u.tex.last_layer = layer;
307 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
308
309 si_blitter_begin(ctx, SI_DECOMPRESS);
310 util_blitter_custom_color(sctx->blitter, cbsurf, custom_blend);
311 si_blitter_end(ctx);
312
313 pipe_surface_reference(&cbsurf, NULL);
314 }
315
316 /* The texture will always be dirty if some layers aren't flushed.
317 * I don't think this case occurs often though. */
318 if (first_layer == 0 && last_layer == max_layer) {
319 rtex->dirty_level_mask &= ~(1 << level);
320 }
321 }
322 }
323
324 static void
325 si_decompress_sampler_color_textures(struct si_context *sctx,
326 struct si_textures_info *textures)
327 {
328 unsigned i;
329 unsigned mask = textures->compressed_colortex_mask;
330
331 while (mask) {
332 struct pipe_sampler_view *view;
333 struct r600_texture *tex;
334
335 i = u_bit_scan(&mask);
336
337 view = textures->views.views[i];
338 assert(view);
339
340 tex = (struct r600_texture *)view->texture;
341 assert(tex->cmask.size || tex->fmask.size || tex->dcc_offset);
342
343 si_blit_decompress_color(&sctx->b.b, tex,
344 view->u.tex.first_level, view->u.tex.last_level,
345 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
346 false);
347 }
348 }
349
350 static void
351 si_decompress_image_color_textures(struct si_context *sctx,
352 struct si_images_info *images)
353 {
354 unsigned i;
355 unsigned mask = images->compressed_colortex_mask;
356
357 while (mask) {
358 const struct pipe_image_view *view;
359 struct r600_texture *tex;
360
361 i = u_bit_scan(&mask);
362
363 view = &images->views[i];
364 assert(view->resource->target != PIPE_BUFFER);
365
366 tex = (struct r600_texture *)view->resource;
367 if (!tex->cmask.size && !tex->fmask.size && !tex->dcc_offset)
368 continue;
369
370 si_blit_decompress_color(&sctx->b.b, tex,
371 view->u.tex.level, view->u.tex.level,
372 0, util_max_layer(&tex->resource.b.b, view->u.tex.level),
373 false);
374 }
375 }
376
377 static void si_decompress_textures(struct si_context *sctx, int shader_start,
378 int shader_end)
379 {
380 unsigned compressed_colortex_counter;
381
382 if (sctx->blitter->running)
383 return;
384
385 /* Update the compressed_colortex_mask if necessary. */
386 compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
387 if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
388 sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
389 si_update_compressed_colortex_masks(sctx);
390 }
391
392 /* Flush depth textures which need to be flushed. */
393 for (int i = shader_start; i < shader_end; i++) {
394 if (sctx->samplers[i].depth_texture_mask) {
395 si_flush_depth_textures(sctx, &sctx->samplers[i]);
396 }
397 if (sctx->samplers[i].compressed_colortex_mask) {
398 si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
399 }
400 if (sctx->images[i].compressed_colortex_mask) {
401 si_decompress_image_color_textures(sctx, &sctx->images[i]);
402 }
403 }
404 }
405
406 void si_decompress_graphics_textures(struct si_context *sctx) {
407 si_decompress_textures(sctx, 0, SI_NUM_GRAPHICS_SHADERS);
408 }
409
410 void si_decompress_compute_textures(struct si_context *sctx) {
411 si_decompress_textures(sctx, SI_NUM_GRAPHICS_SHADERS, SI_NUM_SHADERS);
412 }
413
414 static void si_clear(struct pipe_context *ctx, unsigned buffers,
415 const union pipe_color_union *color,
416 double depth, unsigned stencil)
417 {
418 struct si_context *sctx = (struct si_context *)ctx;
419 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
420 struct pipe_surface *zsbuf = fb->zsbuf;
421 struct r600_texture *zstex =
422 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
423
424 if (buffers & PIPE_CLEAR_COLOR) {
425 evergreen_do_fast_color_clear(&sctx->b, fb,
426 &sctx->framebuffer.atom, &buffers,
427 &sctx->framebuffer.dirty_cbufs,
428 color);
429 if (!buffers)
430 return; /* all buffers have been fast cleared */
431 }
432
433 if (buffers & PIPE_CLEAR_COLOR) {
434 int i;
435
436 /* These buffers cannot use fast clear, make sure to disable expansion. */
437 for (i = 0; i < fb->nr_cbufs; i++) {
438 struct r600_texture *tex;
439
440 /* If not clearing this buffer, skip. */
441 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
442 continue;
443
444 if (!fb->cbufs[i])
445 continue;
446
447 tex = (struct r600_texture *)fb->cbufs[i]->texture;
448 if (tex->fmask.size == 0)
449 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
450 }
451 }
452
453 if (zstex && zstex->htile_buffer &&
454 zsbuf->u.tex.level == 0 &&
455 zsbuf->u.tex.first_layer == 0 &&
456 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
457 if (buffers & PIPE_CLEAR_DEPTH) {
458 /* Need to disable EXPCLEAR temporarily if clearing
459 * to a new value. */
460 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
461 sctx->db_depth_disable_expclear = true;
462 }
463
464 zstex->depth_clear_value = depth;
465 sctx->framebuffer.dirty_zsbuf = true;
466 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
467 sctx->db_depth_clear = true;
468 si_mark_atom_dirty(sctx, &sctx->db_render_state);
469 }
470
471 if (buffers & PIPE_CLEAR_STENCIL) {
472 stencil &= 0xff;
473
474 /* Need to disable EXPCLEAR temporarily if clearing
475 * to a new value. */
476 if (zstex->stencil_cleared && zstex->stencil_clear_value != stencil) {
477 sctx->db_stencil_disable_expclear = true;
478 }
479
480 zstex->stencil_clear_value = stencil;
481 sctx->framebuffer.dirty_zsbuf = true;
482 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */
483 sctx->db_stencil_clear = true;
484 si_mark_atom_dirty(sctx, &sctx->db_render_state);
485 }
486 }
487
488 si_blitter_begin(ctx, SI_CLEAR);
489 util_blitter_clear(sctx->blitter, fb->width, fb->height,
490 util_framebuffer_get_num_layers(fb),
491 buffers, color, depth, stencil);
492 si_blitter_end(ctx);
493
494 if (sctx->db_depth_clear) {
495 sctx->db_depth_clear = false;
496 sctx->db_depth_disable_expclear = false;
497 zstex->depth_cleared = true;
498 si_mark_atom_dirty(sctx, &sctx->db_render_state);
499 }
500
501 if (sctx->db_stencil_clear) {
502 sctx->db_stencil_clear = false;
503 sctx->db_stencil_disable_expclear = false;
504 zstex->stencil_cleared = true;
505 si_mark_atom_dirty(sctx, &sctx->db_render_state);
506 }
507 }
508
509 static void si_clear_render_target(struct pipe_context *ctx,
510 struct pipe_surface *dst,
511 const union pipe_color_union *color,
512 unsigned dstx, unsigned dsty,
513 unsigned width, unsigned height)
514 {
515 struct si_context *sctx = (struct si_context *)ctx;
516
517 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
518 util_blitter_clear_render_target(sctx->blitter, dst, color,
519 dstx, dsty, width, height);
520 si_blitter_end(ctx);
521 }
522
523 static void si_clear_depth_stencil(struct pipe_context *ctx,
524 struct pipe_surface *dst,
525 unsigned clear_flags,
526 double depth,
527 unsigned stencil,
528 unsigned dstx, unsigned dsty,
529 unsigned width, unsigned height)
530 {
531 struct si_context *sctx = (struct si_context *)ctx;
532
533 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
534 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
535 dstx, dsty, width, height);
536 si_blitter_end(ctx);
537 }
538
539 /* Helper for decompressing a portion of a color or depth resource before
540 * blitting if any decompression is needed.
541 * The driver doesn't decompress resources automatically while u_blitter is
542 * rendering. */
543 static void si_decompress_subresource(struct pipe_context *ctx,
544 struct pipe_resource *tex,
545 unsigned level,
546 unsigned first_layer, unsigned last_layer)
547 {
548 struct si_context *sctx = (struct si_context *)ctx;
549 struct r600_texture *rtex = (struct r600_texture*)tex;
550
551 if (rtex->is_depth && !rtex->is_flushing_texture) {
552 si_blit_decompress_depth_in_place(sctx, rtex, false,
553 level, level,
554 first_layer, last_layer);
555 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
556 si_blit_decompress_depth_in_place(sctx, rtex, true,
557 level, level,
558 first_layer, last_layer);
559 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
560 si_blit_decompress_color(ctx, rtex, level, level,
561 first_layer, last_layer, false);
562 }
563 }
564
565 struct texture_orig_info {
566 unsigned format;
567 unsigned width0;
568 unsigned height0;
569 unsigned npix_x;
570 unsigned npix_y;
571 unsigned npix0_x;
572 unsigned npix0_y;
573 };
574
575 void si_resource_copy_region(struct pipe_context *ctx,
576 struct pipe_resource *dst,
577 unsigned dst_level,
578 unsigned dstx, unsigned dsty, unsigned dstz,
579 struct pipe_resource *src,
580 unsigned src_level,
581 const struct pipe_box *src_box)
582 {
583 struct si_context *sctx = (struct si_context *)ctx;
584 struct pipe_surface *dst_view, dst_templ;
585 struct pipe_sampler_view src_templ, *src_view;
586 unsigned dst_width, dst_height, src_width0, src_height0;
587 unsigned src_force_level = 0;
588 struct pipe_box sbox, dstbox;
589
590 /* Handle buffers first. */
591 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
592 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
593 return;
594 }
595
596 assert(u_max_sample(dst) == u_max_sample(src));
597
598 /* The driver doesn't decompress resources automatically while
599 * u_blitter is rendering. */
600 si_decompress_subresource(ctx, src, src_level,
601 src_box->z, src_box->z + src_box->depth - 1);
602
603 dst_width = u_minify(dst->width0, dst_level);
604 dst_height = u_minify(dst->height0, dst_level);
605 src_width0 = src->width0;
606 src_height0 = src->height0;
607
608 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
609 util_blitter_default_src_texture(&src_templ, src, src_level);
610
611 if (util_format_is_compressed(src->format) ||
612 util_format_is_compressed(dst->format)) {
613 unsigned blocksize = util_format_get_blocksize(src->format);
614
615 if (blocksize == 8)
616 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
617 else
618 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
619 dst_templ.format = src_templ.format;
620
621 dst_width = util_format_get_nblocksx(dst->format, dst_width);
622 dst_height = util_format_get_nblocksy(dst->format, dst_height);
623 src_width0 = util_format_get_nblocksx(src->format, src_width0);
624 src_height0 = util_format_get_nblocksy(src->format, src_height0);
625
626 dstx = util_format_get_nblocksx(dst->format, dstx);
627 dsty = util_format_get_nblocksy(dst->format, dsty);
628
629 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
630 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
631 sbox.z = src_box->z;
632 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
633 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
634 sbox.depth = src_box->depth;
635 src_box = &sbox;
636
637 src_force_level = src_level;
638 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
639 /* also *8_SNORM has precision issues, use UNORM instead */
640 util_format_is_snorm8(src->format)) {
641 if (util_format_is_subsampled_422(src->format)) {
642 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
643 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
644
645 dst_width = util_format_get_nblocksx(dst->format, dst_width);
646 src_width0 = util_format_get_nblocksx(src->format, src_width0);
647
648 dstx = util_format_get_nblocksx(dst->format, dstx);
649
650 sbox = *src_box;
651 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
652 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
653 src_box = &sbox;
654 } else {
655 unsigned blocksize = util_format_get_blocksize(src->format);
656
657 switch (blocksize) {
658 case 1:
659 dst_templ.format = PIPE_FORMAT_R8_UNORM;
660 src_templ.format = PIPE_FORMAT_R8_UNORM;
661 break;
662 case 2:
663 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
664 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
665 break;
666 case 4:
667 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
668 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
669 break;
670 case 8:
671 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
672 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
673 break;
674 case 16:
675 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
676 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
677 break;
678 default:
679 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
680 util_format_short_name(src->format), blocksize);
681 assert(0);
682 }
683 }
684 }
685
686 /* Initialize the surface. */
687 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
688 dst_width, dst_height);
689
690 /* Initialize the sampler view. */
691 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
692 src_width0, src_height0,
693 src_force_level);
694
695 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
696 abs(src_box->depth), &dstbox);
697
698 /* Copy. */
699 si_blitter_begin(ctx, SI_COPY);
700 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
701 src_view, src_box, src_width0, src_height0,
702 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
703 FALSE);
704 si_blitter_end(ctx);
705
706 pipe_surface_reference(&dst_view, NULL);
707 pipe_sampler_view_reference(&src_view, NULL);
708 }
709
710 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
711 static enum pipe_format int_to_norm_format(enum pipe_format format)
712 {
713 switch (format) {
714 #define REPLACE_FORMAT_SIGN(format,sign) \
715 case PIPE_FORMAT_##format##_##sign##INT: \
716 return PIPE_FORMAT_##format##_##sign##NORM
717 #define REPLACE_FORMAT(format) \
718 REPLACE_FORMAT_SIGN(format, U); \
719 REPLACE_FORMAT_SIGN(format, S)
720
721 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
722 REPLACE_FORMAT(R8);
723 REPLACE_FORMAT(R8G8);
724 REPLACE_FORMAT(R8G8B8X8);
725 REPLACE_FORMAT(R8G8B8A8);
726 REPLACE_FORMAT(A8);
727 REPLACE_FORMAT(I8);
728 REPLACE_FORMAT(L8);
729 REPLACE_FORMAT(L8A8);
730 REPLACE_FORMAT(R16);
731 REPLACE_FORMAT(R16G16);
732 REPLACE_FORMAT(R16G16B16X16);
733 REPLACE_FORMAT(R16G16B16A16);
734 REPLACE_FORMAT(A16);
735 REPLACE_FORMAT(I16);
736 REPLACE_FORMAT(L16);
737 REPLACE_FORMAT(L16A16);
738
739 #undef REPLACE_FORMAT
740 #undef REPLACE_FORMAT_SIGN
741 default:
742 return format;
743 }
744 }
745
746 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
747 const struct pipe_blit_info *info)
748 {
749 struct si_context *sctx = (struct si_context*)ctx;
750 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
751 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
752 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
753 enum pipe_format format = int_to_norm_format(info->dst.format);
754 unsigned sample_mask = ~0;
755
756 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
757 * the format is R16G16. Use R16A16, which does work.
758 */
759 if (format == PIPE_FORMAT_R16G16_UNORM)
760 format = PIPE_FORMAT_R16A16_UNORM;
761 if (format == PIPE_FORMAT_R16G16_SNORM)
762 format = PIPE_FORMAT_R16A16_SNORM;
763
764 if (info->src.resource->nr_samples > 1 &&
765 info->dst.resource->nr_samples <= 1 &&
766 util_max_layer(info->src.resource, 0) == 0 &&
767 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
768 info->dst.format == info->src.format &&
769 !util_format_is_pure_integer(format) &&
770 !util_format_is_depth_or_stencil(format) &&
771 !info->scissor_enable &&
772 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
773 dst_width == info->src.resource->width0 &&
774 dst_height == info->src.resource->height0 &&
775 info->dst.box.x == 0 &&
776 info->dst.box.y == 0 &&
777 info->dst.box.width == dst_width &&
778 info->dst.box.height == dst_height &&
779 info->dst.box.depth == 1 &&
780 info->src.box.x == 0 &&
781 info->src.box.y == 0 &&
782 info->src.box.width == dst_width &&
783 info->src.box.height == dst_height &&
784 info->src.box.depth == 1 &&
785 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
786 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
787 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
788 !dst->dcc_offset) {
789 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
790 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
791 util_blitter_custom_resolve_color(sctx->blitter,
792 info->dst.resource, info->dst.level,
793 info->dst.box.z,
794 info->src.resource, info->src.box.z,
795 sample_mask, sctx->custom_blend_resolve,
796 format);
797 si_blitter_end(ctx);
798 return true;
799 }
800 return false;
801 }
802
803 static void si_blit(struct pipe_context *ctx,
804 const struct pipe_blit_info *info)
805 {
806 struct si_context *sctx = (struct si_context*)ctx;
807
808 if (do_hardware_msaa_resolve(ctx, info)) {
809 return;
810 }
811
812 assert(util_blitter_is_blit_supported(sctx->blitter, info));
813
814 /* The driver doesn't decompress resources automatically while
815 * u_blitter is rendering. */
816 si_decompress_subresource(ctx, info->src.resource, info->src.level,
817 info->src.box.z,
818 info->src.box.z + info->src.box.depth - 1);
819
820 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
821 util_try_blit_via_copy_region(ctx, info))
822 return;
823
824 si_blitter_begin(ctx, SI_BLIT |
825 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
826 util_blitter_blit(sctx->blitter, info);
827 si_blitter_end(ctx);
828 }
829
830 static void si_flush_resource(struct pipe_context *ctx,
831 struct pipe_resource *res)
832 {
833 struct r600_texture *rtex = (struct r600_texture*)res;
834
835 assert(res->target != PIPE_BUFFER);
836
837 if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) {
838 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
839 0, util_max_layer(res, 0), false);
840 }
841 }
842
843 static void si_decompress_dcc(struct pipe_context *ctx,
844 struct r600_texture *rtex)
845 {
846 if (!rtex->dcc_offset)
847 return;
848
849 si_blit_decompress_color(ctx, rtex, 0, rtex->resource.b.b.last_level,
850 0, util_max_layer(&rtex->resource.b.b, 0),
851 true);
852 }
853
854 static void si_pipe_clear_buffer(struct pipe_context *ctx,
855 struct pipe_resource *dst,
856 unsigned offset, unsigned size,
857 const void *clear_value_ptr,
858 int clear_value_size)
859 {
860 struct si_context *sctx = (struct si_context*)ctx;
861 uint32_t dword_value;
862 unsigned i;
863
864 assert(offset % clear_value_size == 0);
865 assert(size % clear_value_size == 0);
866
867 if (clear_value_size > 4) {
868 const uint32_t *u32 = clear_value_ptr;
869 bool clear_dword_duplicated = true;
870
871 /* See if we can lower large fills to dword fills. */
872 for (i = 1; i < clear_value_size / 4; i++)
873 if (u32[0] != u32[i]) {
874 clear_dword_duplicated = false;
875 break;
876 }
877
878 if (!clear_dword_duplicated) {
879 /* Use transform feedback for 64-bit, 96-bit, and
880 * 128-bit fills.
881 */
882 union pipe_color_union clear_value;
883
884 memcpy(&clear_value, clear_value_ptr, clear_value_size);
885 si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
886 util_blitter_clear_buffer(sctx->blitter, dst, offset,
887 size, clear_value_size / 4,
888 &clear_value);
889 si_blitter_end(ctx);
890 return;
891 }
892 }
893
894 /* Expand the clear value to a dword. */
895 switch (clear_value_size) {
896 case 1:
897 dword_value = *(uint8_t*)clear_value_ptr;
898 dword_value |= (dword_value << 8) |
899 (dword_value << 16) |
900 (dword_value << 24);
901 break;
902 case 2:
903 dword_value = *(uint16_t*)clear_value_ptr;
904 dword_value |= dword_value << 16;
905 break;
906 default:
907 dword_value = *(uint32_t*)clear_value_ptr;
908 }
909
910 sctx->b.clear_buffer(ctx, dst, offset, size, dword_value, false);
911 }
912
913 void si_init_blit_functions(struct si_context *sctx)
914 {
915 sctx->b.b.clear = si_clear;
916 sctx->b.b.clear_buffer = si_pipe_clear_buffer;
917 sctx->b.b.clear_render_target = si_clear_render_target;
918 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
919 sctx->b.b.resource_copy_region = si_resource_copy_region;
920 sctx->b.b.blit = si_blit;
921 sctx->b.b.flush_resource = si_flush_resource;
922 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
923 sctx->b.decompress_dcc = si_decompress_dcc;
924 }