radeonsi: update compressed_colortex_masks when a cmask is created or disabled
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 r600_suspend_nontimer_queries(&sctx->b);
56
57 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
58 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
59 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
62 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
63 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
65 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
66
67 if (op & SI_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
69 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
70 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
71 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
72 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
73 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
74 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
75 }
76
77 if (op & SI_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
79
80 if (op & SI_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 sctx->blitter, 2,
83 sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states);
84
85 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
86 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
87 }
88
89 if (op & SI_DISABLE_RENDER_COND)
90 sctx->b.render_cond_force_off = true;
91 }
92
93 static void si_blitter_end(struct pipe_context *ctx)
94 {
95 struct si_context *sctx = (struct si_context *)ctx;
96
97 sctx->b.render_cond_force_off = false;
98 r600_resume_nontimer_queries(&sctx->b);
99 }
100
101 static unsigned u_max_sample(struct pipe_resource *r)
102 {
103 return r->nr_samples ? r->nr_samples - 1 : 0;
104 }
105
106 static void si_blit_decompress_depth(struct pipe_context *ctx,
107 struct r600_texture *texture,
108 struct r600_texture *staging,
109 unsigned first_level, unsigned last_level,
110 unsigned first_layer, unsigned last_layer,
111 unsigned first_sample, unsigned last_sample)
112 {
113 struct si_context *sctx = (struct si_context *)ctx;
114 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
115 float depth = 1.0f;
116 const struct util_format_description *desc;
117 struct r600_texture *flushed_depth_texture = staging ?
118 staging : texture->flushed_depth_texture;
119
120 if (!staging && !texture->dirty_level_mask)
121 return;
122
123 max_sample = u_max_sample(&texture->resource.b.b);
124
125 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
126
127 if (util_format_has_depth(desc))
128 sctx->dbcb_depth_copy_enabled = true;
129 if (util_format_has_stencil(desc))
130 sctx->dbcb_stencil_copy_enabled = true;
131
132 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
133
134 for (level = first_level; level <= last_level; level++) {
135 if (!staging && !(texture->dirty_level_mask & (1 << level)))
136 continue;
137
138 /* The smaller the mipmap level, the less layers there are
139 * as far as 3D textures are concerned. */
140 max_layer = util_max_layer(&texture->resource.b.b, level);
141 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
142
143 for (layer = first_layer; layer <= checked_last_layer; layer++) {
144 for (sample = first_sample; sample <= last_sample; sample++) {
145 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
146
147 sctx->dbcb_copy_sample = sample;
148 si_mark_atom_dirty(sctx, &sctx->db_render_state);
149
150 surf_tmpl.format = texture->resource.b.b.format;
151 surf_tmpl.u.tex.level = level;
152 surf_tmpl.u.tex.first_layer = layer;
153 surf_tmpl.u.tex.last_layer = layer;
154
155 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
156
157 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
158 cbsurf = ctx->create_surface(ctx,
159 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
160
161 si_blitter_begin(ctx, SI_DECOMPRESS);
162 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
163 sctx->custom_dsa_flush, depth);
164 si_blitter_end(ctx);
165
166 pipe_surface_reference(&zsurf, NULL);
167 pipe_surface_reference(&cbsurf, NULL);
168 }
169 }
170
171 /* The texture will always be dirty if some layers aren't flushed.
172 * I don't think this case can occur though. */
173 if (!staging &&
174 first_layer == 0 && last_layer == max_layer &&
175 first_sample == 0 && last_sample == max_sample) {
176 texture->dirty_level_mask &= ~(1 << level);
177 }
178 }
179
180 sctx->dbcb_depth_copy_enabled = false;
181 sctx->dbcb_stencil_copy_enabled = false;
182 si_mark_atom_dirty(sctx, &sctx->db_render_state);
183 }
184
185 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
186 struct r600_texture *texture,
187 bool is_stencil_sampler,
188 unsigned first_level, unsigned last_level,
189 unsigned first_layer, unsigned last_layer)
190 {
191 struct pipe_surface *zsurf, surf_tmpl = {{0}};
192 unsigned layer, max_layer, checked_last_layer, level;
193 unsigned *dirty_level_mask;
194
195 if (is_stencil_sampler) {
196 sctx->db_flush_stencil_inplace = true;
197 dirty_level_mask = &texture->stencil_dirty_level_mask;
198 } else {
199 sctx->db_flush_depth_inplace = true;
200 dirty_level_mask = &texture->dirty_level_mask;
201 }
202 si_mark_atom_dirty(sctx, &sctx->db_render_state);
203
204 surf_tmpl.format = texture->resource.b.b.format;
205
206 for (level = first_level; level <= last_level; level++) {
207 if (!(*dirty_level_mask & (1 << level)))
208 continue;
209
210 surf_tmpl.u.tex.level = level;
211
212 /* The smaller the mipmap level, the less layers there are
213 * as far as 3D textures are concerned. */
214 max_layer = util_max_layer(&texture->resource.b.b, level);
215 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
216
217 for (layer = first_layer; layer <= checked_last_layer; layer++) {
218 surf_tmpl.u.tex.first_layer = layer;
219 surf_tmpl.u.tex.last_layer = layer;
220
221 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
222
223 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
224 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
225 sctx->custom_dsa_flush,
226 1.0f);
227 si_blitter_end(&sctx->b.b);
228
229 pipe_surface_reference(&zsurf, NULL);
230 }
231
232 /* The texture will always be dirty if some layers aren't flushed.
233 * I don't think this case occurs often though. */
234 if (first_layer == 0 && last_layer == max_layer) {
235 *dirty_level_mask &= ~(1 << level);
236 }
237 }
238
239 sctx->db_flush_depth_inplace = false;
240 sctx->db_flush_stencil_inplace = false;
241 si_mark_atom_dirty(sctx, &sctx->db_render_state);
242 }
243
244 static void
245 si_flush_depth_textures(struct si_context *sctx,
246 struct si_textures_info *textures)
247 {
248 unsigned i;
249 unsigned mask = textures->depth_texture_mask;
250
251 while (mask) {
252 struct pipe_sampler_view *view;
253 struct si_sampler_view *sview;
254 struct r600_texture *tex;
255
256 i = u_bit_scan(&mask);
257
258 view = textures->views.views[i];
259 assert(view);
260 sview = (struct si_sampler_view*)view;
261
262 tex = (struct r600_texture *)view->texture;
263 assert(tex->is_depth && !tex->is_flushing_texture);
264
265 si_blit_decompress_depth_in_place(sctx, tex,
266 sview->is_stencil_sampler,
267 view->u.tex.first_level, view->u.tex.last_level,
268 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
269 }
270 }
271
272 static void si_blit_decompress_color(struct pipe_context *ctx,
273 struct r600_texture *rtex,
274 unsigned first_level, unsigned last_level,
275 unsigned first_layer, unsigned last_layer,
276 bool need_dcc_decompress)
277 {
278 struct si_context *sctx = (struct si_context *)ctx;
279 unsigned layer, level, checked_last_layer, max_layer;
280
281 if (!rtex->dirty_level_mask && !need_dcc_decompress)
282 return;
283
284 for (level = first_level; level <= last_level; level++) {
285 void* custom_blend;
286
287 if (!(rtex->dirty_level_mask & (1 << level)) && !need_dcc_decompress)
288 continue;
289
290 if (rtex->dcc_offset && need_dcc_decompress) {
291 custom_blend = sctx->custom_blend_dcc_decompress;
292 } else if (rtex->fmask.size) {
293 custom_blend = sctx->custom_blend_decompress;
294 } else {
295 custom_blend = sctx->custom_blend_fastclear;
296 }
297
298 /* The smaller the mipmap level, the less layers there are
299 * as far as 3D textures are concerned. */
300 max_layer = util_max_layer(&rtex->resource.b.b, level);
301 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
302
303 for (layer = first_layer; layer <= checked_last_layer; layer++) {
304 struct pipe_surface *cbsurf, surf_tmpl;
305
306 surf_tmpl.format = rtex->resource.b.b.format;
307 surf_tmpl.u.tex.level = level;
308 surf_tmpl.u.tex.first_layer = layer;
309 surf_tmpl.u.tex.last_layer = layer;
310 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
311
312 si_blitter_begin(ctx, SI_DECOMPRESS);
313 util_blitter_custom_color(sctx->blitter, cbsurf, custom_blend);
314 si_blitter_end(ctx);
315
316 pipe_surface_reference(&cbsurf, NULL);
317 }
318
319 /* The texture will always be dirty if some layers aren't flushed.
320 * I don't think this case occurs often though. */
321 if (first_layer == 0 && last_layer == max_layer) {
322 rtex->dirty_level_mask &= ~(1 << level);
323 }
324 }
325 }
326
327 static void
328 si_decompress_color_textures(struct si_context *sctx,
329 struct si_textures_info *textures)
330 {
331 unsigned i;
332 unsigned mask = textures->compressed_colortex_mask;
333
334 while (mask) {
335 struct pipe_sampler_view *view;
336 struct r600_texture *tex;
337
338 i = u_bit_scan(&mask);
339
340 view = textures->views.views[i];
341 assert(view);
342
343 tex = (struct r600_texture *)view->texture;
344 assert(tex->cmask.size || tex->fmask.size || tex->dcc_offset);
345
346 si_blit_decompress_color(&sctx->b.b, tex,
347 view->u.tex.first_level, view->u.tex.last_level,
348 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
349 false);
350 }
351 }
352
353 void si_decompress_textures(struct si_context *sctx)
354 {
355 unsigned compressed_colortex_counter;
356
357 if (sctx->blitter->running)
358 return;
359
360 /* Update the compressed_colortex_mask if necessary. */
361 compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
362 if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
363 sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
364 si_update_compressed_colortex_masks(sctx);
365 }
366
367 /* Flush depth textures which need to be flushed. */
368 for (int i = 0; i < SI_NUM_SHADERS; i++) {
369 if (sctx->samplers[i].depth_texture_mask) {
370 si_flush_depth_textures(sctx, &sctx->samplers[i]);
371 }
372 if (sctx->samplers[i].compressed_colortex_mask) {
373 si_decompress_color_textures(sctx, &sctx->samplers[i]);
374 }
375 }
376 }
377
378 static void si_clear(struct pipe_context *ctx, unsigned buffers,
379 const union pipe_color_union *color,
380 double depth, unsigned stencil)
381 {
382 struct si_context *sctx = (struct si_context *)ctx;
383 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
384 struct pipe_surface *zsbuf = fb->zsbuf;
385 struct r600_texture *zstex =
386 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
387
388 if (buffers & PIPE_CLEAR_COLOR) {
389 evergreen_do_fast_color_clear(&sctx->b, fb,
390 &sctx->framebuffer.atom, &buffers,
391 &sctx->framebuffer.dirty_cbufs,
392 color);
393 if (!buffers)
394 return; /* all buffers have been fast cleared */
395 }
396
397 if (buffers & PIPE_CLEAR_COLOR) {
398 int i;
399
400 /* These buffers cannot use fast clear, make sure to disable expansion. */
401 for (i = 0; i < fb->nr_cbufs; i++) {
402 struct r600_texture *tex;
403
404 /* If not clearing this buffer, skip. */
405 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
406 continue;
407
408 if (!fb->cbufs[i])
409 continue;
410
411 tex = (struct r600_texture *)fb->cbufs[i]->texture;
412 if (tex->fmask.size == 0)
413 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
414 }
415 }
416
417 if (zstex && zstex->htile_buffer &&
418 zsbuf->u.tex.level == 0 &&
419 zsbuf->u.tex.first_layer == 0 &&
420 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
421 if (buffers & PIPE_CLEAR_DEPTH) {
422 /* Need to disable EXPCLEAR temporarily if clearing
423 * to a new value. */
424 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
425 sctx->db_depth_disable_expclear = true;
426 }
427
428 zstex->depth_clear_value = depth;
429 sctx->framebuffer.dirty_zsbuf = true;
430 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
431 sctx->db_depth_clear = true;
432 si_mark_atom_dirty(sctx, &sctx->db_render_state);
433 }
434
435 if (buffers & PIPE_CLEAR_STENCIL) {
436 stencil &= 0xff;
437
438 /* Need to disable EXPCLEAR temporarily if clearing
439 * to a new value. */
440 if (zstex->stencil_cleared && zstex->stencil_clear_value != stencil) {
441 sctx->db_stencil_disable_expclear = true;
442 }
443
444 zstex->stencil_clear_value = stencil;
445 sctx->framebuffer.dirty_zsbuf = true;
446 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */
447 sctx->db_stencil_clear = true;
448 si_mark_atom_dirty(sctx, &sctx->db_render_state);
449 }
450 }
451
452 si_blitter_begin(ctx, SI_CLEAR);
453 util_blitter_clear(sctx->blitter, fb->width, fb->height,
454 util_framebuffer_get_num_layers(fb),
455 buffers, color, depth, stencil);
456 si_blitter_end(ctx);
457
458 if (sctx->db_depth_clear) {
459 sctx->db_depth_clear = false;
460 sctx->db_depth_disable_expclear = false;
461 zstex->depth_cleared = true;
462 si_mark_atom_dirty(sctx, &sctx->db_render_state);
463 }
464
465 if (sctx->db_stencil_clear) {
466 sctx->db_stencil_clear = false;
467 sctx->db_stencil_disable_expclear = false;
468 zstex->stencil_cleared = true;
469 si_mark_atom_dirty(sctx, &sctx->db_render_state);
470 }
471 }
472
473 static void si_clear_render_target(struct pipe_context *ctx,
474 struct pipe_surface *dst,
475 const union pipe_color_union *color,
476 unsigned dstx, unsigned dsty,
477 unsigned width, unsigned height)
478 {
479 struct si_context *sctx = (struct si_context *)ctx;
480
481 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
482 util_blitter_clear_render_target(sctx->blitter, dst, color,
483 dstx, dsty, width, height);
484 si_blitter_end(ctx);
485 }
486
487 static void si_clear_depth_stencil(struct pipe_context *ctx,
488 struct pipe_surface *dst,
489 unsigned clear_flags,
490 double depth,
491 unsigned stencil,
492 unsigned dstx, unsigned dsty,
493 unsigned width, unsigned height)
494 {
495 struct si_context *sctx = (struct si_context *)ctx;
496
497 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
498 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
499 dstx, dsty, width, height);
500 si_blitter_end(ctx);
501 }
502
503 /* Helper for decompressing a portion of a color or depth resource before
504 * blitting if any decompression is needed.
505 * The driver doesn't decompress resources automatically while u_blitter is
506 * rendering. */
507 static void si_decompress_subresource(struct pipe_context *ctx,
508 struct pipe_resource *tex,
509 unsigned level,
510 unsigned first_layer, unsigned last_layer)
511 {
512 struct si_context *sctx = (struct si_context *)ctx;
513 struct r600_texture *rtex = (struct r600_texture*)tex;
514
515 if (rtex->is_depth && !rtex->is_flushing_texture) {
516 si_blit_decompress_depth_in_place(sctx, rtex, false,
517 level, level,
518 first_layer, last_layer);
519 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
520 si_blit_decompress_depth_in_place(sctx, rtex, true,
521 level, level,
522 first_layer, last_layer);
523 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
524 si_blit_decompress_color(ctx, rtex, level, level,
525 first_layer, last_layer, false);
526 }
527 }
528
529 struct texture_orig_info {
530 unsigned format;
531 unsigned width0;
532 unsigned height0;
533 unsigned npix_x;
534 unsigned npix_y;
535 unsigned npix0_x;
536 unsigned npix0_y;
537 };
538
539 void si_resource_copy_region(struct pipe_context *ctx,
540 struct pipe_resource *dst,
541 unsigned dst_level,
542 unsigned dstx, unsigned dsty, unsigned dstz,
543 struct pipe_resource *src,
544 unsigned src_level,
545 const struct pipe_box *src_box)
546 {
547 struct si_context *sctx = (struct si_context *)ctx;
548 struct pipe_surface *dst_view, dst_templ;
549 struct pipe_sampler_view src_templ, *src_view;
550 unsigned dst_width, dst_height, src_width0, src_height0;
551 unsigned src_force_level = 0;
552 struct pipe_box sbox, dstbox;
553
554 /* Handle buffers first. */
555 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
556 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
557 return;
558 }
559
560 assert(u_max_sample(dst) == u_max_sample(src));
561
562 /* The driver doesn't decompress resources automatically while
563 * u_blitter is rendering. */
564 si_decompress_subresource(ctx, src, src_level,
565 src_box->z, src_box->z + src_box->depth - 1);
566
567 dst_width = u_minify(dst->width0, dst_level);
568 dst_height = u_minify(dst->height0, dst_level);
569 src_width0 = src->width0;
570 src_height0 = src->height0;
571
572 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
573 util_blitter_default_src_texture(&src_templ, src, src_level);
574
575 if (util_format_is_compressed(src->format) ||
576 util_format_is_compressed(dst->format)) {
577 unsigned blocksize = util_format_get_blocksize(src->format);
578
579 if (blocksize == 8)
580 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
581 else
582 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
583 dst_templ.format = src_templ.format;
584
585 dst_width = util_format_get_nblocksx(dst->format, dst_width);
586 dst_height = util_format_get_nblocksy(dst->format, dst_height);
587 src_width0 = util_format_get_nblocksx(src->format, src_width0);
588 src_height0 = util_format_get_nblocksy(src->format, src_height0);
589
590 dstx = util_format_get_nblocksx(dst->format, dstx);
591 dsty = util_format_get_nblocksy(dst->format, dsty);
592
593 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
594 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
595 sbox.z = src_box->z;
596 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
597 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
598 sbox.depth = src_box->depth;
599 src_box = &sbox;
600
601 src_force_level = src_level;
602 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
603 /* also *8_SNORM has precision issues, use UNORM instead */
604 util_format_is_snorm8(src->format)) {
605 if (util_format_is_subsampled_422(src->format)) {
606 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
607 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
608
609 dst_width = util_format_get_nblocksx(dst->format, dst_width);
610 src_width0 = util_format_get_nblocksx(src->format, src_width0);
611
612 dstx = util_format_get_nblocksx(dst->format, dstx);
613
614 sbox = *src_box;
615 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
616 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
617 src_box = &sbox;
618 } else {
619 unsigned blocksize = util_format_get_blocksize(src->format);
620
621 switch (blocksize) {
622 case 1:
623 dst_templ.format = PIPE_FORMAT_R8_UNORM;
624 src_templ.format = PIPE_FORMAT_R8_UNORM;
625 break;
626 case 2:
627 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
628 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
629 break;
630 case 4:
631 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
632 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
633 break;
634 case 8:
635 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
636 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
637 break;
638 case 16:
639 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
640 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
641 break;
642 default:
643 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
644 util_format_short_name(src->format), blocksize);
645 assert(0);
646 }
647 }
648 }
649
650 /* Initialize the surface. */
651 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
652 dst_width, dst_height);
653
654 /* Initialize the sampler view. */
655 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
656 src_width0, src_height0,
657 src_force_level);
658
659 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
660 abs(src_box->depth), &dstbox);
661
662 /* Copy. */
663 si_blitter_begin(ctx, SI_COPY);
664 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
665 src_view, src_box, src_width0, src_height0,
666 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
667 FALSE);
668 si_blitter_end(ctx);
669
670 pipe_surface_reference(&dst_view, NULL);
671 pipe_sampler_view_reference(&src_view, NULL);
672 }
673
674 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
675 static enum pipe_format int_to_norm_format(enum pipe_format format)
676 {
677 switch (format) {
678 #define REPLACE_FORMAT_SIGN(format,sign) \
679 case PIPE_FORMAT_##format##_##sign##INT: \
680 return PIPE_FORMAT_##format##_##sign##NORM
681 #define REPLACE_FORMAT(format) \
682 REPLACE_FORMAT_SIGN(format, U); \
683 REPLACE_FORMAT_SIGN(format, S)
684
685 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
686 REPLACE_FORMAT(R8);
687 REPLACE_FORMAT(R8G8);
688 REPLACE_FORMAT(R8G8B8X8);
689 REPLACE_FORMAT(R8G8B8A8);
690 REPLACE_FORMAT(A8);
691 REPLACE_FORMAT(I8);
692 REPLACE_FORMAT(L8);
693 REPLACE_FORMAT(L8A8);
694 REPLACE_FORMAT(R16);
695 REPLACE_FORMAT(R16G16);
696 REPLACE_FORMAT(R16G16B16X16);
697 REPLACE_FORMAT(R16G16B16A16);
698 REPLACE_FORMAT(A16);
699 REPLACE_FORMAT(I16);
700 REPLACE_FORMAT(L16);
701 REPLACE_FORMAT(L16A16);
702
703 #undef REPLACE_FORMAT
704 #undef REPLACE_FORMAT_SIGN
705 default:
706 return format;
707 }
708 }
709
710 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
711 const struct pipe_blit_info *info)
712 {
713 struct si_context *sctx = (struct si_context*)ctx;
714 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
715 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
716 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
717 enum pipe_format format = int_to_norm_format(info->dst.format);
718 unsigned sample_mask = ~0;
719
720 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
721 * the format is R16G16. Use R16A16, which does work.
722 */
723 if (format == PIPE_FORMAT_R16G16_UNORM)
724 format = PIPE_FORMAT_R16A16_UNORM;
725 if (format == PIPE_FORMAT_R16G16_SNORM)
726 format = PIPE_FORMAT_R16A16_SNORM;
727
728 if (info->src.resource->nr_samples > 1 &&
729 info->dst.resource->nr_samples <= 1 &&
730 util_max_layer(info->src.resource, 0) == 0 &&
731 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
732 info->dst.format == info->src.format &&
733 !util_format_is_pure_integer(format) &&
734 !util_format_is_depth_or_stencil(format) &&
735 !info->scissor_enable &&
736 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
737 dst_width == info->src.resource->width0 &&
738 dst_height == info->src.resource->height0 &&
739 info->dst.box.x == 0 &&
740 info->dst.box.y == 0 &&
741 info->dst.box.width == dst_width &&
742 info->dst.box.height == dst_height &&
743 info->dst.box.depth == 1 &&
744 info->src.box.x == 0 &&
745 info->src.box.y == 0 &&
746 info->src.box.width == dst_width &&
747 info->src.box.height == dst_height &&
748 info->src.box.depth == 1 &&
749 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
750 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
751 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
752 !dst->dcc_offset) {
753 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
754 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
755 util_blitter_custom_resolve_color(sctx->blitter,
756 info->dst.resource, info->dst.level,
757 info->dst.box.z,
758 info->src.resource, info->src.box.z,
759 sample_mask, sctx->custom_blend_resolve,
760 format);
761 si_blitter_end(ctx);
762 return true;
763 }
764 return false;
765 }
766
767 static void si_blit(struct pipe_context *ctx,
768 const struct pipe_blit_info *info)
769 {
770 struct si_context *sctx = (struct si_context*)ctx;
771
772 if (do_hardware_msaa_resolve(ctx, info)) {
773 return;
774 }
775
776 assert(util_blitter_is_blit_supported(sctx->blitter, info));
777
778 /* The driver doesn't decompress resources automatically while
779 * u_blitter is rendering. */
780 si_decompress_subresource(ctx, info->src.resource, info->src.level,
781 info->src.box.z,
782 info->src.box.z + info->src.box.depth - 1);
783
784 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
785 util_try_blit_via_copy_region(ctx, info))
786 return;
787
788 si_blitter_begin(ctx, SI_BLIT |
789 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
790 util_blitter_blit(sctx->blitter, info);
791 si_blitter_end(ctx);
792 }
793
794 static void si_flush_resource(struct pipe_context *ctx,
795 struct pipe_resource *res)
796 {
797 struct r600_texture *rtex = (struct r600_texture*)res;
798
799 assert(res->target != PIPE_BUFFER);
800
801 if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) {
802 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
803 0, util_max_layer(res, 0), false);
804 }
805 }
806
807 static void si_decompress_dcc(struct pipe_context *ctx,
808 struct r600_texture *rtex)
809 {
810 if (!rtex->dcc_offset)
811 return;
812
813 si_blit_decompress_color(ctx, rtex, 0, rtex->resource.b.b.last_level,
814 0, util_max_layer(&rtex->resource.b.b, 0),
815 true);
816 }
817
818 static void si_pipe_clear_buffer(struct pipe_context *ctx,
819 struct pipe_resource *dst,
820 unsigned offset, unsigned size,
821 const void *clear_value_ptr,
822 int clear_value_size)
823 {
824 struct si_context *sctx = (struct si_context*)ctx;
825 uint32_t dword_value;
826 unsigned i;
827
828 assert(offset % clear_value_size == 0);
829 assert(size % clear_value_size == 0);
830
831 if (clear_value_size > 4) {
832 const uint32_t *u32 = clear_value_ptr;
833 bool clear_dword_duplicated = true;
834
835 /* See if we can lower large fills to dword fills. */
836 for (i = 1; i < clear_value_size / 4; i++)
837 if (u32[0] != u32[i]) {
838 clear_dword_duplicated = false;
839 break;
840 }
841
842 if (!clear_dword_duplicated) {
843 /* Use transform feedback for 64-bit, 96-bit, and
844 * 128-bit fills.
845 */
846 union pipe_color_union clear_value;
847
848 memcpy(&clear_value, clear_value_ptr, clear_value_size);
849 si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
850 util_blitter_clear_buffer(sctx->blitter, dst, offset,
851 size, clear_value_size / 4,
852 &clear_value);
853 si_blitter_end(ctx);
854 return;
855 }
856 }
857
858 /* Expand the clear value to a dword. */
859 switch (clear_value_size) {
860 case 1:
861 dword_value = *(uint8_t*)clear_value_ptr;
862 dword_value |= (dword_value << 8) |
863 (dword_value << 16) |
864 (dword_value << 24);
865 break;
866 case 2:
867 dword_value = *(uint16_t*)clear_value_ptr;
868 dword_value |= dword_value << 16;
869 break;
870 default:
871 dword_value = *(uint32_t*)clear_value_ptr;
872 }
873
874 sctx->b.clear_buffer(ctx, dst, offset, size, dword_value, false);
875 }
876
877 void si_init_blit_functions(struct si_context *sctx)
878 {
879 sctx->b.b.clear = si_clear;
880 sctx->b.b.clear_buffer = si_pipe_clear_buffer;
881 sctx->b.b.clear_render_target = si_clear_render_target;
882 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
883 sctx->b.b.resource_copy_region = si_resource_copy_region;
884 sctx->b.b.blit = si_blit;
885 sctx->b.b.flush_resource = si_flush_resource;
886 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
887 sctx->b.decompress_dcc = si_decompress_dcc;
888 }