radeonsi: put image, fmask, and sampler descriptors into one array
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 r600_suspend_nontimer_queries(&sctx->b);
56
57 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
58 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
59 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
62 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
63 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
65 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
66
67 if (op & SI_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
69 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
70 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
71 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
72 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
73 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
74 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
75 }
76
77 if (op & SI_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
79
80 if (op & SI_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 sctx->blitter, 2,
83 sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states);
84
85 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
86 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
87 }
88
89 if (op & SI_DISABLE_RENDER_COND)
90 sctx->b.render_cond_force_off = true;
91 }
92
93 static void si_blitter_end(struct pipe_context *ctx)
94 {
95 struct si_context *sctx = (struct si_context *)ctx;
96
97 sctx->b.render_cond_force_off = false;
98 r600_resume_nontimer_queries(&sctx->b);
99 }
100
101 static unsigned u_max_sample(struct pipe_resource *r)
102 {
103 return r->nr_samples ? r->nr_samples - 1 : 0;
104 }
105
106 static void si_blit_decompress_depth(struct pipe_context *ctx,
107 struct r600_texture *texture,
108 struct r600_texture *staging,
109 unsigned first_level, unsigned last_level,
110 unsigned first_layer, unsigned last_layer,
111 unsigned first_sample, unsigned last_sample)
112 {
113 struct si_context *sctx = (struct si_context *)ctx;
114 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
115 float depth = 1.0f;
116 const struct util_format_description *desc;
117 struct r600_texture *flushed_depth_texture = staging ?
118 staging : texture->flushed_depth_texture;
119
120 if (!staging && !texture->dirty_level_mask)
121 return;
122
123 max_sample = u_max_sample(&texture->resource.b.b);
124
125 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
126
127 if (util_format_has_depth(desc))
128 sctx->dbcb_depth_copy_enabled = true;
129 if (util_format_has_stencil(desc))
130 sctx->dbcb_stencil_copy_enabled = true;
131
132 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
133
134 for (level = first_level; level <= last_level; level++) {
135 if (!staging && !(texture->dirty_level_mask & (1 << level)))
136 continue;
137
138 /* The smaller the mipmap level, the less layers there are
139 * as far as 3D textures are concerned. */
140 max_layer = util_max_layer(&texture->resource.b.b, level);
141 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
142
143 for (layer = first_layer; layer <= checked_last_layer; layer++) {
144 for (sample = first_sample; sample <= last_sample; sample++) {
145 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
146
147 sctx->dbcb_copy_sample = sample;
148 si_mark_atom_dirty(sctx, &sctx->db_render_state);
149
150 surf_tmpl.format = texture->resource.b.b.format;
151 surf_tmpl.u.tex.level = level;
152 surf_tmpl.u.tex.first_layer = layer;
153 surf_tmpl.u.tex.last_layer = layer;
154
155 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
156
157 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
158 cbsurf = ctx->create_surface(ctx,
159 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
160
161 si_blitter_begin(ctx, SI_DECOMPRESS);
162 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
163 sctx->custom_dsa_flush, depth);
164 si_blitter_end(ctx);
165
166 pipe_surface_reference(&zsurf, NULL);
167 pipe_surface_reference(&cbsurf, NULL);
168 }
169 }
170
171 /* The texture will always be dirty if some layers aren't flushed.
172 * I don't think this case can occur though. */
173 if (!staging &&
174 first_layer == 0 && last_layer == max_layer &&
175 first_sample == 0 && last_sample == max_sample) {
176 texture->dirty_level_mask &= ~(1 << level);
177 }
178 }
179
180 sctx->dbcb_depth_copy_enabled = false;
181 sctx->dbcb_stencil_copy_enabled = false;
182 si_mark_atom_dirty(sctx, &sctx->db_render_state);
183 }
184
185 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
186 struct r600_texture *texture,
187 bool is_stencil_sampler,
188 unsigned first_level, unsigned last_level,
189 unsigned first_layer, unsigned last_layer)
190 {
191 struct pipe_surface *zsurf, surf_tmpl = {{0}};
192 unsigned layer, max_layer, checked_last_layer, level;
193 unsigned *dirty_level_mask;
194
195 if (is_stencil_sampler) {
196 sctx->db_flush_stencil_inplace = true;
197 dirty_level_mask = &texture->stencil_dirty_level_mask;
198 } else {
199 sctx->db_flush_depth_inplace = true;
200 dirty_level_mask = &texture->dirty_level_mask;
201 }
202 si_mark_atom_dirty(sctx, &sctx->db_render_state);
203
204 surf_tmpl.format = texture->resource.b.b.format;
205
206 for (level = first_level; level <= last_level; level++) {
207 if (!(*dirty_level_mask & (1 << level)))
208 continue;
209
210 surf_tmpl.u.tex.level = level;
211
212 /* The smaller the mipmap level, the less layers there are
213 * as far as 3D textures are concerned. */
214 max_layer = util_max_layer(&texture->resource.b.b, level);
215 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
216
217 for (layer = first_layer; layer <= checked_last_layer; layer++) {
218 surf_tmpl.u.tex.first_layer = layer;
219 surf_tmpl.u.tex.last_layer = layer;
220
221 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
222
223 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
224 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
225 sctx->custom_dsa_flush,
226 1.0f);
227 si_blitter_end(&sctx->b.b);
228
229 pipe_surface_reference(&zsurf, NULL);
230 }
231
232 /* The texture will always be dirty if some layers aren't flushed.
233 * I don't think this case occurs often though. */
234 if (first_layer == 0 && last_layer == max_layer) {
235 *dirty_level_mask &= ~(1 << level);
236 }
237 }
238
239 sctx->db_flush_depth_inplace = false;
240 sctx->db_flush_stencil_inplace = false;
241 si_mark_atom_dirty(sctx, &sctx->db_render_state);
242 }
243
244 void si_flush_depth_textures(struct si_context *sctx,
245 struct si_textures_info *textures)
246 {
247 unsigned i;
248 unsigned mask = textures->depth_texture_mask;
249
250 while (mask) {
251 struct pipe_sampler_view *view;
252 struct si_sampler_view *sview;
253 struct r600_texture *tex;
254
255 i = u_bit_scan(&mask);
256
257 view = textures->views.views[i];
258 assert(view);
259 sview = (struct si_sampler_view*)view;
260
261 tex = (struct r600_texture *)view->texture;
262 assert(tex->is_depth && !tex->is_flushing_texture);
263
264 si_blit_decompress_depth_in_place(sctx, tex,
265 sview->is_stencil_sampler,
266 view->u.tex.first_level, view->u.tex.last_level,
267 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
268 }
269 }
270
271 static void si_blit_decompress_color(struct pipe_context *ctx,
272 struct r600_texture *rtex,
273 unsigned first_level, unsigned last_level,
274 unsigned first_layer, unsigned last_layer)
275 {
276 struct si_context *sctx = (struct si_context *)ctx;
277 unsigned layer, level, checked_last_layer, max_layer;
278
279 if (!rtex->dirty_level_mask)
280 return;
281
282 for (level = first_level; level <= last_level; level++) {
283 if (!(rtex->dirty_level_mask & (1 << level)))
284 continue;
285
286 /* The smaller the mipmap level, the less layers there are
287 * as far as 3D textures are concerned. */
288 max_layer = util_max_layer(&rtex->resource.b.b, level);
289 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
290
291 for (layer = first_layer; layer <= checked_last_layer; layer++) {
292 struct pipe_surface *cbsurf, surf_tmpl;
293
294 surf_tmpl.format = rtex->resource.b.b.format;
295 surf_tmpl.u.tex.level = level;
296 surf_tmpl.u.tex.first_layer = layer;
297 surf_tmpl.u.tex.last_layer = layer;
298 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
299
300 si_blitter_begin(ctx, SI_DECOMPRESS);
301 util_blitter_custom_color(sctx->blitter, cbsurf,
302 rtex->fmask.size ? sctx->custom_blend_decompress :
303 sctx->custom_blend_fastclear);
304 si_blitter_end(ctx);
305
306 pipe_surface_reference(&cbsurf, NULL);
307 }
308
309 /* The texture will always be dirty if some layers aren't flushed.
310 * I don't think this case occurs often though. */
311 if (first_layer == 0 && last_layer == max_layer) {
312 rtex->dirty_level_mask &= ~(1 << level);
313 }
314 }
315 }
316
317 void si_decompress_color_textures(struct si_context *sctx,
318 struct si_textures_info *textures)
319 {
320 unsigned i;
321 unsigned mask = textures->compressed_colortex_mask;
322
323 while (mask) {
324 struct pipe_sampler_view *view;
325 struct r600_texture *tex;
326
327 i = u_bit_scan(&mask);
328
329 view = textures->views.views[i];
330 assert(view);
331
332 tex = (struct r600_texture *)view->texture;
333 assert(tex->cmask.size || tex->fmask.size || tex->dcc_buffer);
334
335 si_blit_decompress_color(&sctx->b.b, tex,
336 view->u.tex.first_level, view->u.tex.last_level,
337 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
338 }
339 }
340
341 static void si_clear(struct pipe_context *ctx, unsigned buffers,
342 const union pipe_color_union *color,
343 double depth, unsigned stencil)
344 {
345 struct si_context *sctx = (struct si_context *)ctx;
346 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
347 struct pipe_surface *zsbuf = fb->zsbuf;
348 struct r600_texture *zstex =
349 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
350
351 if (buffers & PIPE_CLEAR_COLOR) {
352 evergreen_do_fast_color_clear(&sctx->b, fb,
353 &sctx->framebuffer.atom, &buffers,
354 &sctx->framebuffer.dirty_cbufs,
355 color);
356 if (!buffers)
357 return; /* all buffers have been fast cleared */
358 }
359
360 if (buffers & PIPE_CLEAR_COLOR) {
361 int i;
362
363 /* These buffers cannot use fast clear, make sure to disable expansion. */
364 for (i = 0; i < fb->nr_cbufs; i++) {
365 struct r600_texture *tex;
366
367 /* If not clearing this buffer, skip. */
368 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
369 continue;
370
371 if (!fb->cbufs[i])
372 continue;
373
374 tex = (struct r600_texture *)fb->cbufs[i]->texture;
375 if (tex->fmask.size == 0)
376 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
377 }
378 }
379
380 if (zstex && zstex->htile_buffer &&
381 zsbuf->u.tex.level == 0 &&
382 zsbuf->u.tex.first_layer == 0 &&
383 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
384 if (buffers & PIPE_CLEAR_DEPTH) {
385 /* Need to disable EXPCLEAR temporarily if clearing
386 * to a new value. */
387 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
388 sctx->db_depth_disable_expclear = true;
389 }
390
391 zstex->depth_clear_value = depth;
392 sctx->framebuffer.dirty_zsbuf = true;
393 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
394 sctx->db_depth_clear = true;
395 si_mark_atom_dirty(sctx, &sctx->db_render_state);
396 }
397
398 if (buffers & PIPE_CLEAR_STENCIL) {
399 stencil &= 0xff;
400
401 /* Need to disable EXPCLEAR temporarily if clearing
402 * to a new value. */
403 if (zstex->stencil_cleared && zstex->stencil_clear_value != stencil) {
404 sctx->db_stencil_disable_expclear = true;
405 }
406
407 zstex->stencil_clear_value = stencil;
408 sctx->framebuffer.dirty_zsbuf = true;
409 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */
410 sctx->db_stencil_clear = true;
411 si_mark_atom_dirty(sctx, &sctx->db_render_state);
412 }
413 }
414
415 si_blitter_begin(ctx, SI_CLEAR);
416 util_blitter_clear(sctx->blitter, fb->width, fb->height,
417 util_framebuffer_get_num_layers(fb),
418 buffers, color, depth, stencil);
419 si_blitter_end(ctx);
420
421 if (sctx->db_depth_clear) {
422 sctx->db_depth_clear = false;
423 sctx->db_depth_disable_expclear = false;
424 zstex->depth_cleared = true;
425 si_mark_atom_dirty(sctx, &sctx->db_render_state);
426 }
427
428 if (sctx->db_stencil_clear) {
429 sctx->db_stencil_clear = false;
430 sctx->db_stencil_disable_expclear = false;
431 zstex->stencil_cleared = true;
432 si_mark_atom_dirty(sctx, &sctx->db_render_state);
433 }
434 }
435
436 static void si_clear_render_target(struct pipe_context *ctx,
437 struct pipe_surface *dst,
438 const union pipe_color_union *color,
439 unsigned dstx, unsigned dsty,
440 unsigned width, unsigned height)
441 {
442 struct si_context *sctx = (struct si_context *)ctx;
443
444 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
445 util_blitter_clear_render_target(sctx->blitter, dst, color,
446 dstx, dsty, width, height);
447 si_blitter_end(ctx);
448 }
449
450 static void si_clear_depth_stencil(struct pipe_context *ctx,
451 struct pipe_surface *dst,
452 unsigned clear_flags,
453 double depth,
454 unsigned stencil,
455 unsigned dstx, unsigned dsty,
456 unsigned width, unsigned height)
457 {
458 struct si_context *sctx = (struct si_context *)ctx;
459
460 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
461 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
462 dstx, dsty, width, height);
463 si_blitter_end(ctx);
464 }
465
466 /* Helper for decompressing a portion of a color or depth resource before
467 * blitting if any decompression is needed.
468 * The driver doesn't decompress resources automatically while u_blitter is
469 * rendering. */
470 static void si_decompress_subresource(struct pipe_context *ctx,
471 struct pipe_resource *tex,
472 unsigned level,
473 unsigned first_layer, unsigned last_layer)
474 {
475 struct si_context *sctx = (struct si_context *)ctx;
476 struct r600_texture *rtex = (struct r600_texture*)tex;
477
478 if (rtex->is_depth && !rtex->is_flushing_texture) {
479 si_blit_decompress_depth_in_place(sctx, rtex, false,
480 level, level,
481 first_layer, last_layer);
482 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
483 si_blit_decompress_depth_in_place(sctx, rtex, true,
484 level, level,
485 first_layer, last_layer);
486 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_buffer) {
487 si_blit_decompress_color(ctx, rtex, level, level,
488 first_layer, last_layer);
489 }
490 }
491
492 struct texture_orig_info {
493 unsigned format;
494 unsigned width0;
495 unsigned height0;
496 unsigned npix_x;
497 unsigned npix_y;
498 unsigned npix0_x;
499 unsigned npix0_y;
500 };
501
502 void si_resource_copy_region(struct pipe_context *ctx,
503 struct pipe_resource *dst,
504 unsigned dst_level,
505 unsigned dstx, unsigned dsty, unsigned dstz,
506 struct pipe_resource *src,
507 unsigned src_level,
508 const struct pipe_box *src_box)
509 {
510 struct si_context *sctx = (struct si_context *)ctx;
511 struct pipe_surface *dst_view, dst_templ;
512 struct pipe_sampler_view src_templ, *src_view;
513 unsigned dst_width, dst_height, src_width0, src_height0;
514 unsigned src_force_level = 0;
515 struct pipe_box sbox, dstbox;
516
517 /* Handle buffers first. */
518 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
519 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
520 return;
521 }
522
523 assert(u_max_sample(dst) == u_max_sample(src));
524
525 /* The driver doesn't decompress resources automatically while
526 * u_blitter is rendering. */
527 si_decompress_subresource(ctx, src, src_level,
528 src_box->z, src_box->z + src_box->depth - 1);
529
530 dst_width = u_minify(dst->width0, dst_level);
531 dst_height = u_minify(dst->height0, dst_level);
532 src_width0 = src->width0;
533 src_height0 = src->height0;
534
535 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
536 util_blitter_default_src_texture(&src_templ, src, src_level);
537
538 if (util_format_is_compressed(src->format) ||
539 util_format_is_compressed(dst->format)) {
540 unsigned blocksize = util_format_get_blocksize(src->format);
541
542 if (blocksize == 8)
543 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
544 else
545 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
546 dst_templ.format = src_templ.format;
547
548 dst_width = util_format_get_nblocksx(dst->format, dst_width);
549 dst_height = util_format_get_nblocksy(dst->format, dst_height);
550 src_width0 = util_format_get_nblocksx(src->format, src_width0);
551 src_height0 = util_format_get_nblocksy(src->format, src_height0);
552
553 dstx = util_format_get_nblocksx(dst->format, dstx);
554 dsty = util_format_get_nblocksy(dst->format, dsty);
555
556 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
557 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
558 sbox.z = src_box->z;
559 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
560 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
561 sbox.depth = src_box->depth;
562 src_box = &sbox;
563
564 src_force_level = src_level;
565 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
566 /* also *8_SNORM has precision issues, use UNORM instead */
567 util_format_is_snorm8(src->format)) {
568 if (util_format_is_subsampled_422(src->format)) {
569 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
570 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
571
572 dst_width = util_format_get_nblocksx(dst->format, dst_width);
573 src_width0 = util_format_get_nblocksx(src->format, src_width0);
574
575 dstx = util_format_get_nblocksx(dst->format, dstx);
576
577 sbox = *src_box;
578 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
579 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
580 src_box = &sbox;
581 } else {
582 unsigned blocksize = util_format_get_blocksize(src->format);
583
584 switch (blocksize) {
585 case 1:
586 dst_templ.format = PIPE_FORMAT_R8_UNORM;
587 src_templ.format = PIPE_FORMAT_R8_UNORM;
588 break;
589 case 2:
590 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
591 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
592 break;
593 case 4:
594 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
595 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
596 break;
597 case 8:
598 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
599 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
600 break;
601 case 16:
602 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
603 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
604 break;
605 default:
606 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
607 util_format_short_name(src->format), blocksize);
608 assert(0);
609 }
610 }
611 }
612
613 /* Initialize the surface. */
614 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
615 dst_width, dst_height);
616
617 /* Initialize the sampler view. */
618 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
619 src_width0, src_height0,
620 src_force_level);
621
622 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
623 abs(src_box->depth), &dstbox);
624
625 /* Copy. */
626 si_blitter_begin(ctx, SI_COPY);
627 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
628 src_view, src_box, src_width0, src_height0,
629 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
630 FALSE);
631 si_blitter_end(ctx);
632
633 pipe_surface_reference(&dst_view, NULL);
634 pipe_sampler_view_reference(&src_view, NULL);
635 }
636
637 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
638 static enum pipe_format int_to_norm_format(enum pipe_format format)
639 {
640 switch (format) {
641 #define REPLACE_FORMAT_SIGN(format,sign) \
642 case PIPE_FORMAT_##format##_##sign##INT: \
643 return PIPE_FORMAT_##format##_##sign##NORM
644 #define REPLACE_FORMAT(format) \
645 REPLACE_FORMAT_SIGN(format, U); \
646 REPLACE_FORMAT_SIGN(format, S)
647
648 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
649 REPLACE_FORMAT(R8);
650 REPLACE_FORMAT(R8G8);
651 REPLACE_FORMAT(R8G8B8X8);
652 REPLACE_FORMAT(R8G8B8A8);
653 REPLACE_FORMAT(A8);
654 REPLACE_FORMAT(I8);
655 REPLACE_FORMAT(L8);
656 REPLACE_FORMAT(L8A8);
657 REPLACE_FORMAT(R16);
658 REPLACE_FORMAT(R16G16);
659 REPLACE_FORMAT(R16G16B16X16);
660 REPLACE_FORMAT(R16G16B16A16);
661 REPLACE_FORMAT(A16);
662 REPLACE_FORMAT(I16);
663 REPLACE_FORMAT(L16);
664 REPLACE_FORMAT(L16A16);
665
666 #undef REPLACE_FORMAT
667 #undef REPLACE_FORMAT_SIGN
668 default:
669 return format;
670 }
671 }
672
673 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
674 const struct pipe_blit_info *info)
675 {
676 struct si_context *sctx = (struct si_context*)ctx;
677 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
678 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
679 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
680 enum pipe_format format = int_to_norm_format(info->dst.format);
681 unsigned sample_mask = ~0;
682
683 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
684 * the format is R16G16. Use R16A16, which does work.
685 */
686 if (format == PIPE_FORMAT_R16G16_UNORM)
687 format = PIPE_FORMAT_R16A16_UNORM;
688 if (format == PIPE_FORMAT_R16G16_SNORM)
689 format = PIPE_FORMAT_R16A16_SNORM;
690
691 if (info->src.resource->nr_samples > 1 &&
692 info->dst.resource->nr_samples <= 1 &&
693 util_max_layer(info->src.resource, 0) == 0 &&
694 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
695 info->dst.format == info->src.format &&
696 !util_format_is_pure_integer(format) &&
697 !util_format_is_depth_or_stencil(format) &&
698 !info->scissor_enable &&
699 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
700 dst_width == info->src.resource->width0 &&
701 dst_height == info->src.resource->height0 &&
702 info->dst.box.x == 0 &&
703 info->dst.box.y == 0 &&
704 info->dst.box.width == dst_width &&
705 info->dst.box.height == dst_height &&
706 info->dst.box.depth == 1 &&
707 info->src.box.x == 0 &&
708 info->src.box.y == 0 &&
709 info->src.box.width == dst_width &&
710 info->src.box.height == dst_height &&
711 info->src.box.depth == 1 &&
712 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
713 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
714 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
715 !dst->dcc_buffer) {
716 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
717 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
718 util_blitter_custom_resolve_color(sctx->blitter,
719 info->dst.resource, info->dst.level,
720 info->dst.box.z,
721 info->src.resource, info->src.box.z,
722 sample_mask, sctx->custom_blend_resolve,
723 format);
724 si_blitter_end(ctx);
725 return true;
726 }
727 return false;
728 }
729
730 static void si_blit(struct pipe_context *ctx,
731 const struct pipe_blit_info *info)
732 {
733 struct si_context *sctx = (struct si_context*)ctx;
734
735 if (do_hardware_msaa_resolve(ctx, info)) {
736 return;
737 }
738
739 assert(util_blitter_is_blit_supported(sctx->blitter, info));
740
741 /* The driver doesn't decompress resources automatically while
742 * u_blitter is rendering. */
743 si_decompress_subresource(ctx, info->src.resource, info->src.level,
744 info->src.box.z,
745 info->src.box.z + info->src.box.depth - 1);
746
747 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
748 util_try_blit_via_copy_region(ctx, info))
749 return;
750
751 si_blitter_begin(ctx, SI_BLIT |
752 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
753 util_blitter_blit(sctx->blitter, info);
754 si_blitter_end(ctx);
755 }
756
757 static void si_flush_resource(struct pipe_context *ctx,
758 struct pipe_resource *res)
759 {
760 struct r600_texture *rtex = (struct r600_texture*)res;
761
762 assert(res->target != PIPE_BUFFER);
763
764 if (!rtex->is_depth && rtex->cmask.size) {
765 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
766 0, util_max_layer(res, 0));
767 }
768 }
769
770 static void si_pipe_clear_buffer(struct pipe_context *ctx,
771 struct pipe_resource *dst,
772 unsigned offset, unsigned size,
773 const void *clear_value_ptr,
774 int clear_value_size)
775 {
776 struct si_context *sctx = (struct si_context*)ctx;
777 uint32_t dword_value;
778 unsigned i;
779
780 assert(offset % clear_value_size == 0);
781 assert(size % clear_value_size == 0);
782
783 if (clear_value_size > 4) {
784 const uint32_t *u32 = clear_value_ptr;
785 bool clear_dword_duplicated = true;
786
787 /* See if we can lower large fills to dword fills. */
788 for (i = 1; i < clear_value_size / 4; i++)
789 if (u32[0] != u32[i]) {
790 clear_dword_duplicated = false;
791 break;
792 }
793
794 if (!clear_dword_duplicated) {
795 /* Use transform feedback for 64-bit, 96-bit, and
796 * 128-bit fills.
797 */
798 union pipe_color_union clear_value;
799
800 memcpy(&clear_value, clear_value_ptr, clear_value_size);
801 si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
802 util_blitter_clear_buffer(sctx->blitter, dst, offset,
803 size, clear_value_size / 4,
804 &clear_value);
805 si_blitter_end(ctx);
806 return;
807 }
808 }
809
810 /* Expand the clear value to a dword. */
811 switch (clear_value_size) {
812 case 1:
813 dword_value = *(uint8_t*)clear_value_ptr;
814 dword_value |= (dword_value << 8) |
815 (dword_value << 16) |
816 (dword_value << 24);
817 break;
818 case 2:
819 dword_value = *(uint16_t*)clear_value_ptr;
820 dword_value |= dword_value << 16;
821 break;
822 default:
823 dword_value = *(uint32_t*)clear_value_ptr;
824 }
825
826 sctx->b.clear_buffer(ctx, dst, offset, size, dword_value, false);
827 }
828
829 void si_init_blit_functions(struct si_context *sctx)
830 {
831 sctx->b.b.clear = si_clear;
832 sctx->b.b.clear_buffer = si_pipe_clear_buffer;
833 sctx->b.b.clear_render_target = si_clear_render_target;
834 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
835 sctx->b.b.resource_copy_region = si_resource_copy_region;
836 sctx->b.b.blit = si_blit;
837 sctx->b.b.flush_resource = si_flush_resource;
838 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
839 }