radeonsi: expand the compressed color and depth texture masks to 64 bits
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 r600_suspend_nontimer_queries(&sctx->b);
56
57 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
58 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
59 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
60 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
61 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
62 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
63 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
65 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
66
67 if (op & SI_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
69 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
70 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
71 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
72 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
73 util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]);
74 util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]);
75 }
76
77 if (op & SI_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
79
80 if (op & SI_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 sctx->blitter, 2,
83 sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states);
84
85 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
86 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
87 }
88
89 if (op & SI_DISABLE_RENDER_COND)
90 sctx->b.render_cond_force_off = true;
91 }
92
93 static void si_blitter_end(struct pipe_context *ctx)
94 {
95 struct si_context *sctx = (struct si_context *)ctx;
96
97 sctx->b.render_cond_force_off = false;
98 r600_resume_nontimer_queries(&sctx->b);
99 }
100
101 static unsigned u_max_sample(struct pipe_resource *r)
102 {
103 return r->nr_samples ? r->nr_samples - 1 : 0;
104 }
105
106 static void si_blit_decompress_depth(struct pipe_context *ctx,
107 struct r600_texture *texture,
108 struct r600_texture *staging,
109 unsigned first_level, unsigned last_level,
110 unsigned first_layer, unsigned last_layer,
111 unsigned first_sample, unsigned last_sample)
112 {
113 struct si_context *sctx = (struct si_context *)ctx;
114 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
115 float depth = 1.0f;
116 const struct util_format_description *desc;
117 struct r600_texture *flushed_depth_texture = staging ?
118 staging : texture->flushed_depth_texture;
119
120 if (!staging && !texture->dirty_level_mask)
121 return;
122
123 max_sample = u_max_sample(&texture->resource.b.b);
124
125 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
126
127 if (util_format_has_depth(desc))
128 sctx->dbcb_depth_copy_enabled = true;
129 if (util_format_has_stencil(desc))
130 sctx->dbcb_stencil_copy_enabled = true;
131
132 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
133
134 for (level = first_level; level <= last_level; level++) {
135 if (!staging && !(texture->dirty_level_mask & (1 << level)))
136 continue;
137
138 /* The smaller the mipmap level, the less layers there are
139 * as far as 3D textures are concerned. */
140 max_layer = util_max_layer(&texture->resource.b.b, level);
141 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
142
143 for (layer = first_layer; layer <= checked_last_layer; layer++) {
144 for (sample = first_sample; sample <= last_sample; sample++) {
145 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
146
147 sctx->dbcb_copy_sample = sample;
148 si_mark_atom_dirty(sctx, &sctx->db_render_state);
149
150 surf_tmpl.format = texture->resource.b.b.format;
151 surf_tmpl.u.tex.level = level;
152 surf_tmpl.u.tex.first_layer = layer;
153 surf_tmpl.u.tex.last_layer = layer;
154
155 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
156
157 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
158 cbsurf = ctx->create_surface(ctx,
159 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
160
161 si_blitter_begin(ctx, SI_DECOMPRESS);
162 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
163 sctx->custom_dsa_flush, depth);
164 si_blitter_end(ctx);
165
166 pipe_surface_reference(&zsurf, NULL);
167 pipe_surface_reference(&cbsurf, NULL);
168 }
169 }
170
171 /* The texture will always be dirty if some layers aren't flushed.
172 * I don't think this case can occur though. */
173 if (!staging &&
174 first_layer == 0 && last_layer == max_layer &&
175 first_sample == 0 && last_sample == max_sample) {
176 texture->dirty_level_mask &= ~(1 << level);
177 }
178 }
179
180 sctx->dbcb_depth_copy_enabled = false;
181 sctx->dbcb_stencil_copy_enabled = false;
182 si_mark_atom_dirty(sctx, &sctx->db_render_state);
183 }
184
185 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
186 struct r600_texture *texture,
187 bool is_stencil_sampler,
188 unsigned first_level, unsigned last_level,
189 unsigned first_layer, unsigned last_layer)
190 {
191 struct pipe_surface *zsurf, surf_tmpl = {{0}};
192 unsigned layer, max_layer, checked_last_layer, level;
193 unsigned *dirty_level_mask;
194
195 if (is_stencil_sampler) {
196 sctx->db_flush_stencil_inplace = true;
197 dirty_level_mask = &texture->stencil_dirty_level_mask;
198 } else {
199 sctx->db_flush_depth_inplace = true;
200 dirty_level_mask = &texture->dirty_level_mask;
201 }
202 si_mark_atom_dirty(sctx, &sctx->db_render_state);
203
204 surf_tmpl.format = texture->resource.b.b.format;
205
206 for (level = first_level; level <= last_level; level++) {
207 if (!(*dirty_level_mask & (1 << level)))
208 continue;
209
210 surf_tmpl.u.tex.level = level;
211
212 /* The smaller the mipmap level, the less layers there are
213 * as far as 3D textures are concerned. */
214 max_layer = util_max_layer(&texture->resource.b.b, level);
215 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
216
217 for (layer = first_layer; layer <= checked_last_layer; layer++) {
218 surf_tmpl.u.tex.first_layer = layer;
219 surf_tmpl.u.tex.last_layer = layer;
220
221 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
222
223 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
224 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
225 sctx->custom_dsa_flush,
226 1.0f);
227 si_blitter_end(&sctx->b.b);
228
229 pipe_surface_reference(&zsurf, NULL);
230 }
231
232 /* The texture will always be dirty if some layers aren't flushed.
233 * I don't think this case occurs often though. */
234 if (first_layer == 0 && last_layer == max_layer) {
235 *dirty_level_mask &= ~(1 << level);
236 }
237 }
238
239 sctx->db_flush_depth_inplace = false;
240 sctx->db_flush_stencil_inplace = false;
241 si_mark_atom_dirty(sctx, &sctx->db_render_state);
242 }
243
244 static void
245 si_flush_depth_textures(struct si_context *sctx,
246 struct si_textures_info *textures)
247 {
248 unsigned i;
249 uint64_t mask = textures->depth_texture_mask;
250
251 while (mask) {
252 struct pipe_sampler_view *view;
253 struct si_sampler_view *sview;
254 struct r600_texture *tex;
255
256 i = u_bit_scan64(&mask);
257
258 view = textures->views.views[i];
259 assert(view);
260 sview = (struct si_sampler_view*)view;
261
262 tex = (struct r600_texture *)view->texture;
263 assert(tex->is_depth && !tex->is_flushing_texture);
264
265 si_blit_decompress_depth_in_place(sctx, tex,
266 sview->is_stencil_sampler,
267 view->u.tex.first_level, view->u.tex.last_level,
268 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
269 }
270 }
271
272 static void si_blit_decompress_color(struct pipe_context *ctx,
273 struct r600_texture *rtex,
274 unsigned first_level, unsigned last_level,
275 unsigned first_layer, unsigned last_layer,
276 bool need_dcc_decompress)
277 {
278 struct si_context *sctx = (struct si_context *)ctx;
279 unsigned layer, level, checked_last_layer, max_layer;
280
281 if (!rtex->dirty_level_mask && !need_dcc_decompress)
282 return;
283
284 for (level = first_level; level <= last_level; level++) {
285 void* custom_blend;
286
287 if (!(rtex->dirty_level_mask & (1 << level)) && !need_dcc_decompress)
288 continue;
289
290 if (rtex->dcc_offset && need_dcc_decompress) {
291 custom_blend = sctx->custom_blend_dcc_decompress;
292 } else if (rtex->fmask.size) {
293 custom_blend = sctx->custom_blend_decompress;
294 } else {
295 custom_blend = sctx->custom_blend_fastclear;
296 }
297
298 /* The smaller the mipmap level, the less layers there are
299 * as far as 3D textures are concerned. */
300 max_layer = util_max_layer(&rtex->resource.b.b, level);
301 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
302
303 for (layer = first_layer; layer <= checked_last_layer; layer++) {
304 struct pipe_surface *cbsurf, surf_tmpl;
305
306 surf_tmpl.format = rtex->resource.b.b.format;
307 surf_tmpl.u.tex.level = level;
308 surf_tmpl.u.tex.first_layer = layer;
309 surf_tmpl.u.tex.last_layer = layer;
310 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
311
312 si_blitter_begin(ctx, SI_DECOMPRESS);
313 util_blitter_custom_color(sctx->blitter, cbsurf, custom_blend);
314 si_blitter_end(ctx);
315
316 pipe_surface_reference(&cbsurf, NULL);
317 }
318
319 /* The texture will always be dirty if some layers aren't flushed.
320 * I don't think this case occurs often though. */
321 if (first_layer == 0 && last_layer == max_layer) {
322 rtex->dirty_level_mask &= ~(1 << level);
323 }
324 }
325 }
326
327 static void
328 si_decompress_sampler_color_textures(struct si_context *sctx,
329 struct si_textures_info *textures)
330 {
331 unsigned i;
332 uint64_t mask = textures->compressed_colortex_mask;
333
334 while (mask) {
335 struct pipe_sampler_view *view;
336 struct r600_texture *tex;
337
338 i = u_bit_scan64(&mask);
339
340 view = textures->views.views[i];
341 assert(view);
342
343 tex = (struct r600_texture *)view->texture;
344 assert(tex->cmask.size || tex->fmask.size || tex->dcc_offset);
345
346 si_blit_decompress_color(&sctx->b.b, tex,
347 view->u.tex.first_level, view->u.tex.last_level,
348 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
349 false);
350 }
351 }
352
353 static void
354 si_decompress_image_color_textures(struct si_context *sctx,
355 struct si_images_info *images)
356 {
357 unsigned i;
358 uint64_t mask = images->compressed_colortex_mask;
359
360 while (mask) {
361 const struct pipe_image_view *view;
362 struct r600_texture *tex;
363
364 i = u_bit_scan64(&mask);
365
366 view = &images->views[i];
367 assert(view->resource->target != PIPE_BUFFER);
368
369 tex = (struct r600_texture *)view->resource;
370 if (!tex->cmask.size && !tex->fmask.size && !tex->dcc_offset)
371 continue;
372
373 si_blit_decompress_color(&sctx->b.b, tex,
374 view->u.tex.level, view->u.tex.level,
375 0, util_max_layer(&tex->resource.b.b, view->u.tex.level),
376 false);
377 }
378 }
379
380 void si_decompress_textures(struct si_context *sctx)
381 {
382 unsigned compressed_colortex_counter;
383
384 if (sctx->blitter->running)
385 return;
386
387 /* Update the compressed_colortex_mask if necessary. */
388 compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
389 if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
390 sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
391 si_update_compressed_colortex_masks(sctx);
392 }
393
394 /* Flush depth textures which need to be flushed. */
395 for (int i = 0; i < SI_NUM_SHADERS; i++) {
396 if (sctx->samplers[i].depth_texture_mask) {
397 si_flush_depth_textures(sctx, &sctx->samplers[i]);
398 }
399 if (sctx->samplers[i].compressed_colortex_mask) {
400 si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
401 }
402 if (sctx->images[i].compressed_colortex_mask) {
403 si_decompress_image_color_textures(sctx, &sctx->images[i]);
404 }
405 }
406 }
407
408 static void si_clear(struct pipe_context *ctx, unsigned buffers,
409 const union pipe_color_union *color,
410 double depth, unsigned stencil)
411 {
412 struct si_context *sctx = (struct si_context *)ctx;
413 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
414 struct pipe_surface *zsbuf = fb->zsbuf;
415 struct r600_texture *zstex =
416 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
417
418 if (buffers & PIPE_CLEAR_COLOR) {
419 evergreen_do_fast_color_clear(&sctx->b, fb,
420 &sctx->framebuffer.atom, &buffers,
421 &sctx->framebuffer.dirty_cbufs,
422 color);
423 if (!buffers)
424 return; /* all buffers have been fast cleared */
425 }
426
427 if (buffers & PIPE_CLEAR_COLOR) {
428 int i;
429
430 /* These buffers cannot use fast clear, make sure to disable expansion. */
431 for (i = 0; i < fb->nr_cbufs; i++) {
432 struct r600_texture *tex;
433
434 /* If not clearing this buffer, skip. */
435 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
436 continue;
437
438 if (!fb->cbufs[i])
439 continue;
440
441 tex = (struct r600_texture *)fb->cbufs[i]->texture;
442 if (tex->fmask.size == 0)
443 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
444 }
445 }
446
447 if (zstex && zstex->htile_buffer &&
448 zsbuf->u.tex.level == 0 &&
449 zsbuf->u.tex.first_layer == 0 &&
450 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
451 if (buffers & PIPE_CLEAR_DEPTH) {
452 /* Need to disable EXPCLEAR temporarily if clearing
453 * to a new value. */
454 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
455 sctx->db_depth_disable_expclear = true;
456 }
457
458 zstex->depth_clear_value = depth;
459 sctx->framebuffer.dirty_zsbuf = true;
460 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
461 sctx->db_depth_clear = true;
462 si_mark_atom_dirty(sctx, &sctx->db_render_state);
463 }
464
465 if (buffers & PIPE_CLEAR_STENCIL) {
466 stencil &= 0xff;
467
468 /* Need to disable EXPCLEAR temporarily if clearing
469 * to a new value. */
470 if (zstex->stencil_cleared && zstex->stencil_clear_value != stencil) {
471 sctx->db_stencil_disable_expclear = true;
472 }
473
474 zstex->stencil_clear_value = stencil;
475 sctx->framebuffer.dirty_zsbuf = true;
476 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */
477 sctx->db_stencil_clear = true;
478 si_mark_atom_dirty(sctx, &sctx->db_render_state);
479 }
480 }
481
482 si_blitter_begin(ctx, SI_CLEAR);
483 util_blitter_clear(sctx->blitter, fb->width, fb->height,
484 util_framebuffer_get_num_layers(fb),
485 buffers, color, depth, stencil);
486 si_blitter_end(ctx);
487
488 if (sctx->db_depth_clear) {
489 sctx->db_depth_clear = false;
490 sctx->db_depth_disable_expclear = false;
491 zstex->depth_cleared = true;
492 si_mark_atom_dirty(sctx, &sctx->db_render_state);
493 }
494
495 if (sctx->db_stencil_clear) {
496 sctx->db_stencil_clear = false;
497 sctx->db_stencil_disable_expclear = false;
498 zstex->stencil_cleared = true;
499 si_mark_atom_dirty(sctx, &sctx->db_render_state);
500 }
501 }
502
503 static void si_clear_render_target(struct pipe_context *ctx,
504 struct pipe_surface *dst,
505 const union pipe_color_union *color,
506 unsigned dstx, unsigned dsty,
507 unsigned width, unsigned height)
508 {
509 struct si_context *sctx = (struct si_context *)ctx;
510
511 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
512 util_blitter_clear_render_target(sctx->blitter, dst, color,
513 dstx, dsty, width, height);
514 si_blitter_end(ctx);
515 }
516
517 static void si_clear_depth_stencil(struct pipe_context *ctx,
518 struct pipe_surface *dst,
519 unsigned clear_flags,
520 double depth,
521 unsigned stencil,
522 unsigned dstx, unsigned dsty,
523 unsigned width, unsigned height)
524 {
525 struct si_context *sctx = (struct si_context *)ctx;
526
527 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
528 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
529 dstx, dsty, width, height);
530 si_blitter_end(ctx);
531 }
532
533 /* Helper for decompressing a portion of a color or depth resource before
534 * blitting if any decompression is needed.
535 * The driver doesn't decompress resources automatically while u_blitter is
536 * rendering. */
537 static void si_decompress_subresource(struct pipe_context *ctx,
538 struct pipe_resource *tex,
539 unsigned level,
540 unsigned first_layer, unsigned last_layer)
541 {
542 struct si_context *sctx = (struct si_context *)ctx;
543 struct r600_texture *rtex = (struct r600_texture*)tex;
544
545 if (rtex->is_depth && !rtex->is_flushing_texture) {
546 si_blit_decompress_depth_in_place(sctx, rtex, false,
547 level, level,
548 first_layer, last_layer);
549 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
550 si_blit_decompress_depth_in_place(sctx, rtex, true,
551 level, level,
552 first_layer, last_layer);
553 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
554 si_blit_decompress_color(ctx, rtex, level, level,
555 first_layer, last_layer, false);
556 }
557 }
558
559 struct texture_orig_info {
560 unsigned format;
561 unsigned width0;
562 unsigned height0;
563 unsigned npix_x;
564 unsigned npix_y;
565 unsigned npix0_x;
566 unsigned npix0_y;
567 };
568
569 void si_resource_copy_region(struct pipe_context *ctx,
570 struct pipe_resource *dst,
571 unsigned dst_level,
572 unsigned dstx, unsigned dsty, unsigned dstz,
573 struct pipe_resource *src,
574 unsigned src_level,
575 const struct pipe_box *src_box)
576 {
577 struct si_context *sctx = (struct si_context *)ctx;
578 struct pipe_surface *dst_view, dst_templ;
579 struct pipe_sampler_view src_templ, *src_view;
580 unsigned dst_width, dst_height, src_width0, src_height0;
581 unsigned src_force_level = 0;
582 struct pipe_box sbox, dstbox;
583
584 /* Handle buffers first. */
585 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
586 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
587 return;
588 }
589
590 assert(u_max_sample(dst) == u_max_sample(src));
591
592 /* The driver doesn't decompress resources automatically while
593 * u_blitter is rendering. */
594 si_decompress_subresource(ctx, src, src_level,
595 src_box->z, src_box->z + src_box->depth - 1);
596
597 dst_width = u_minify(dst->width0, dst_level);
598 dst_height = u_minify(dst->height0, dst_level);
599 src_width0 = src->width0;
600 src_height0 = src->height0;
601
602 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
603 util_blitter_default_src_texture(&src_templ, src, src_level);
604
605 if (util_format_is_compressed(src->format) ||
606 util_format_is_compressed(dst->format)) {
607 unsigned blocksize = util_format_get_blocksize(src->format);
608
609 if (blocksize == 8)
610 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
611 else
612 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
613 dst_templ.format = src_templ.format;
614
615 dst_width = util_format_get_nblocksx(dst->format, dst_width);
616 dst_height = util_format_get_nblocksy(dst->format, dst_height);
617 src_width0 = util_format_get_nblocksx(src->format, src_width0);
618 src_height0 = util_format_get_nblocksy(src->format, src_height0);
619
620 dstx = util_format_get_nblocksx(dst->format, dstx);
621 dsty = util_format_get_nblocksy(dst->format, dsty);
622
623 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
624 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
625 sbox.z = src_box->z;
626 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
627 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
628 sbox.depth = src_box->depth;
629 src_box = &sbox;
630
631 src_force_level = src_level;
632 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
633 /* also *8_SNORM has precision issues, use UNORM instead */
634 util_format_is_snorm8(src->format)) {
635 if (util_format_is_subsampled_422(src->format)) {
636 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
637 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
638
639 dst_width = util_format_get_nblocksx(dst->format, dst_width);
640 src_width0 = util_format_get_nblocksx(src->format, src_width0);
641
642 dstx = util_format_get_nblocksx(dst->format, dstx);
643
644 sbox = *src_box;
645 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
646 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
647 src_box = &sbox;
648 } else {
649 unsigned blocksize = util_format_get_blocksize(src->format);
650
651 switch (blocksize) {
652 case 1:
653 dst_templ.format = PIPE_FORMAT_R8_UNORM;
654 src_templ.format = PIPE_FORMAT_R8_UNORM;
655 break;
656 case 2:
657 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
658 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
659 break;
660 case 4:
661 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
662 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
663 break;
664 case 8:
665 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
666 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
667 break;
668 case 16:
669 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
670 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
671 break;
672 default:
673 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
674 util_format_short_name(src->format), blocksize);
675 assert(0);
676 }
677 }
678 }
679
680 /* Initialize the surface. */
681 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
682 dst_width, dst_height);
683
684 /* Initialize the sampler view. */
685 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
686 src_width0, src_height0,
687 src_force_level);
688
689 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
690 abs(src_box->depth), &dstbox);
691
692 /* Copy. */
693 si_blitter_begin(ctx, SI_COPY);
694 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
695 src_view, src_box, src_width0, src_height0,
696 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
697 FALSE);
698 si_blitter_end(ctx);
699
700 pipe_surface_reference(&dst_view, NULL);
701 pipe_sampler_view_reference(&src_view, NULL);
702 }
703
704 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
705 static enum pipe_format int_to_norm_format(enum pipe_format format)
706 {
707 switch (format) {
708 #define REPLACE_FORMAT_SIGN(format,sign) \
709 case PIPE_FORMAT_##format##_##sign##INT: \
710 return PIPE_FORMAT_##format##_##sign##NORM
711 #define REPLACE_FORMAT(format) \
712 REPLACE_FORMAT_SIGN(format, U); \
713 REPLACE_FORMAT_SIGN(format, S)
714
715 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
716 REPLACE_FORMAT(R8);
717 REPLACE_FORMAT(R8G8);
718 REPLACE_FORMAT(R8G8B8X8);
719 REPLACE_FORMAT(R8G8B8A8);
720 REPLACE_FORMAT(A8);
721 REPLACE_FORMAT(I8);
722 REPLACE_FORMAT(L8);
723 REPLACE_FORMAT(L8A8);
724 REPLACE_FORMAT(R16);
725 REPLACE_FORMAT(R16G16);
726 REPLACE_FORMAT(R16G16B16X16);
727 REPLACE_FORMAT(R16G16B16A16);
728 REPLACE_FORMAT(A16);
729 REPLACE_FORMAT(I16);
730 REPLACE_FORMAT(L16);
731 REPLACE_FORMAT(L16A16);
732
733 #undef REPLACE_FORMAT
734 #undef REPLACE_FORMAT_SIGN
735 default:
736 return format;
737 }
738 }
739
740 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
741 const struct pipe_blit_info *info)
742 {
743 struct si_context *sctx = (struct si_context*)ctx;
744 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
745 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
746 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
747 enum pipe_format format = int_to_norm_format(info->dst.format);
748 unsigned sample_mask = ~0;
749
750 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
751 * the format is R16G16. Use R16A16, which does work.
752 */
753 if (format == PIPE_FORMAT_R16G16_UNORM)
754 format = PIPE_FORMAT_R16A16_UNORM;
755 if (format == PIPE_FORMAT_R16G16_SNORM)
756 format = PIPE_FORMAT_R16A16_SNORM;
757
758 if (info->src.resource->nr_samples > 1 &&
759 info->dst.resource->nr_samples <= 1 &&
760 util_max_layer(info->src.resource, 0) == 0 &&
761 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
762 info->dst.format == info->src.format &&
763 !util_format_is_pure_integer(format) &&
764 !util_format_is_depth_or_stencil(format) &&
765 !info->scissor_enable &&
766 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
767 dst_width == info->src.resource->width0 &&
768 dst_height == info->src.resource->height0 &&
769 info->dst.box.x == 0 &&
770 info->dst.box.y == 0 &&
771 info->dst.box.width == dst_width &&
772 info->dst.box.height == dst_height &&
773 info->dst.box.depth == 1 &&
774 info->src.box.x == 0 &&
775 info->src.box.y == 0 &&
776 info->src.box.width == dst_width &&
777 info->src.box.height == dst_height &&
778 info->src.box.depth == 1 &&
779 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
780 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
781 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
782 !dst->dcc_offset) {
783 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
784 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
785 util_blitter_custom_resolve_color(sctx->blitter,
786 info->dst.resource, info->dst.level,
787 info->dst.box.z,
788 info->src.resource, info->src.box.z,
789 sample_mask, sctx->custom_blend_resolve,
790 format);
791 si_blitter_end(ctx);
792 return true;
793 }
794 return false;
795 }
796
797 static void si_blit(struct pipe_context *ctx,
798 const struct pipe_blit_info *info)
799 {
800 struct si_context *sctx = (struct si_context*)ctx;
801
802 if (do_hardware_msaa_resolve(ctx, info)) {
803 return;
804 }
805
806 assert(util_blitter_is_blit_supported(sctx->blitter, info));
807
808 /* The driver doesn't decompress resources automatically while
809 * u_blitter is rendering. */
810 si_decompress_subresource(ctx, info->src.resource, info->src.level,
811 info->src.box.z,
812 info->src.box.z + info->src.box.depth - 1);
813
814 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
815 util_try_blit_via_copy_region(ctx, info))
816 return;
817
818 si_blitter_begin(ctx, SI_BLIT |
819 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
820 util_blitter_blit(sctx->blitter, info);
821 si_blitter_end(ctx);
822 }
823
824 static void si_flush_resource(struct pipe_context *ctx,
825 struct pipe_resource *res)
826 {
827 struct r600_texture *rtex = (struct r600_texture*)res;
828
829 assert(res->target != PIPE_BUFFER);
830
831 if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) {
832 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
833 0, util_max_layer(res, 0), false);
834 }
835 }
836
837 static void si_decompress_dcc(struct pipe_context *ctx,
838 struct r600_texture *rtex)
839 {
840 if (!rtex->dcc_offset)
841 return;
842
843 si_blit_decompress_color(ctx, rtex, 0, rtex->resource.b.b.last_level,
844 0, util_max_layer(&rtex->resource.b.b, 0),
845 true);
846 }
847
848 static void si_pipe_clear_buffer(struct pipe_context *ctx,
849 struct pipe_resource *dst,
850 unsigned offset, unsigned size,
851 const void *clear_value_ptr,
852 int clear_value_size)
853 {
854 struct si_context *sctx = (struct si_context*)ctx;
855 uint32_t dword_value;
856 unsigned i;
857
858 assert(offset % clear_value_size == 0);
859 assert(size % clear_value_size == 0);
860
861 if (clear_value_size > 4) {
862 const uint32_t *u32 = clear_value_ptr;
863 bool clear_dword_duplicated = true;
864
865 /* See if we can lower large fills to dword fills. */
866 for (i = 1; i < clear_value_size / 4; i++)
867 if (u32[0] != u32[i]) {
868 clear_dword_duplicated = false;
869 break;
870 }
871
872 if (!clear_dword_duplicated) {
873 /* Use transform feedback for 64-bit, 96-bit, and
874 * 128-bit fills.
875 */
876 union pipe_color_union clear_value;
877
878 memcpy(&clear_value, clear_value_ptr, clear_value_size);
879 si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
880 util_blitter_clear_buffer(sctx->blitter, dst, offset,
881 size, clear_value_size / 4,
882 &clear_value);
883 si_blitter_end(ctx);
884 return;
885 }
886 }
887
888 /* Expand the clear value to a dword. */
889 switch (clear_value_size) {
890 case 1:
891 dword_value = *(uint8_t*)clear_value_ptr;
892 dword_value |= (dword_value << 8) |
893 (dword_value << 16) |
894 (dword_value << 24);
895 break;
896 case 2:
897 dword_value = *(uint16_t*)clear_value_ptr;
898 dword_value |= dword_value << 16;
899 break;
900 default:
901 dword_value = *(uint32_t*)clear_value_ptr;
902 }
903
904 sctx->b.clear_buffer(ctx, dst, offset, size, dword_value, false);
905 }
906
907 void si_init_blit_functions(struct si_context *sctx)
908 {
909 sctx->b.b.clear = si_clear;
910 sctx->b.b.clear_buffer = si_pipe_clear_buffer;
911 sctx->b.b.clear_render_target = si_clear_render_target;
912 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
913 sctx->b.b.resource_copy_region = si_resource_copy_region;
914 sctx->b.b.blit = si_blit;
915 sctx->b.b.flush_resource = si_flush_resource;
916 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
917 sctx->b.decompress_dcc = si_decompress_dcc;
918 }