src/gallium/drivers/radeonsi/si_commands.c

   1 /*
   2  * Copyright 2012 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Christian König <christian.koenig@amd.com>
  25  */
  26
  27 #include "sid.h"
  28 #include "si_pipe.h"
  29
  30 void si_cmd_context_control(struct si_pm4_state *pm4)
  31 {
  32         si_pm4_cmd_begin(pm4, PKT3_CONTEXT_CONTROL);
  33         si_pm4_cmd_add(pm4, 0x80000000);
  34         si_pm4_cmd_add(pm4, 0x80000000);
  35         si_pm4_cmd_end(pm4, false);
  36 }
  37
  38 void si_cmd_draw_index_2(struct si_pm4_state *pm4, uint32_t max_size,
  39                          uint64_t index_base, uint32_t index_count,
  40                          uint32_t initiator, bool predicate)
  41 {
  42         si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_2);
  43         si_pm4_cmd_add(pm4, max_size);
  44         si_pm4_cmd_add(pm4, index_base);
  45         si_pm4_cmd_add(pm4, (index_base >> 32UL) & 0xFF);
  46         si_pm4_cmd_add(pm4, index_count);
  47         si_pm4_cmd_add(pm4, initiator);
  48         si_pm4_cmd_end(pm4, predicate);
  49 }
  50
  51 void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count,
  52                             uint32_t initiator, bool predicate)
  53 {
  54         si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_AUTO);
  55         si_pm4_cmd_add(pm4, count);
  56         si_pm4_cmd_add(pm4, initiator);
  57         si_pm4_cmd_end(pm4, predicate);
  58 }
  59
  60 void si_cmd_draw_indirect(struct si_pm4_state *pm4, uint64_t indirect_va,
  61                           uint32_t indirect_offset, uint32_t base_vtx_loc,
  62                           uint32_t start_inst_loc, bool predicate)
  63 {
  64         assert(indirect_va % 8 == 0);
  65         assert(indirect_offset % 4 == 0);
  66
  67         si_pm4_cmd_begin(pm4, PKT3_SET_BASE);
  68         si_pm4_cmd_add(pm4, 1);
  69         si_pm4_cmd_add(pm4, indirect_va);
  70         si_pm4_cmd_add(pm4, indirect_va >> 32);
  71         si_pm4_cmd_end(pm4, predicate);
  72
  73         si_pm4_cmd_begin(pm4, PKT3_DRAW_INDIRECT);
  74         si_pm4_cmd_add(pm4, indirect_offset);
  75         si_pm4_cmd_add(pm4, (base_vtx_loc - SI_SH_REG_OFFSET) >> 2);
  76         si_pm4_cmd_add(pm4, (start_inst_loc - SI_SH_REG_OFFSET) >> 2);
  77         si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_AUTO_INDEX);
  78         si_pm4_cmd_end(pm4, predicate);
  79 }
  80
  81 void si_cmd_draw_index_indirect(struct si_pm4_state *pm4, uint64_t indirect_va,
  82                                 uint64_t index_va, uint32_t index_max_size,
  83                                 uint32_t indirect_offset, uint32_t base_vtx_loc,
  84                                 uint32_t start_inst_loc, bool predicate)
  85 {
  86         assert(indirect_va % 8 == 0);
  87         assert(index_va % 2 == 0);
  88         assert(indirect_offset % 4 == 0);
  89
  90         si_pm4_cmd_begin(pm4, PKT3_SET_BASE);
  91         si_pm4_cmd_add(pm4, 1);
  92         si_pm4_cmd_add(pm4, indirect_va);
  93         si_pm4_cmd_add(pm4, indirect_va >> 32);
  94         si_pm4_cmd_end(pm4, predicate);
  95
  96         si_pm4_cmd_begin(pm4, PKT3_INDEX_BASE);
  97         si_pm4_cmd_add(pm4, index_va);
  98         si_pm4_cmd_add(pm4, index_va >> 32);
  99         si_pm4_cmd_end(pm4, predicate);
 100
 101         si_pm4_cmd_begin(pm4, PKT3_INDEX_BUFFER_SIZE);
 102         si_pm4_cmd_add(pm4, index_max_size);
 103         si_pm4_cmd_end(pm4, predicate);
 104
 105         si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_INDIRECT);
 106         si_pm4_cmd_add(pm4, indirect_offset);
 107         si_pm4_cmd_add(pm4, (base_vtx_loc - SI_SH_REG_OFFSET) >> 2);
 108         si_pm4_cmd_add(pm4, (start_inst_loc - SI_SH_REG_OFFSET) >> 2);
 109         si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_DMA);
 110         si_pm4_cmd_end(pm4, predicate);
 111 }