radeonsi: dump init_config IBs
[mesa.git] / src / gallium / drivers / radeonsi / si_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Marek Olšák <maraeo@gmail.com>
25 */
26
27 #include "si_pipe.h"
28 #include "si_shader.h"
29 #include "sid.h"
30 #include "sid_tables.h"
31 #include "ddebug/dd_util.h"
32
33
34 static void si_dump_shader(struct si_shader_ctx_state *state, const char *name,
35 FILE *f)
36 {
37 if (!state->cso || !state->current)
38 return;
39
40 fprintf(f, "%s shader disassembly:\n", name);
41 si_dump_shader_key(state->cso->type, &state->current->key, f);
42 fprintf(f, "%s\n\n", state->current->binary.disasm_string);
43 }
44
45 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
46 * read them, or use "aha -b -f file" to convert them to html.
47 */
48 #define COLOR_RESET "\033[0m"
49 #define COLOR_RED "\033[31m"
50 #define COLOR_GREEN "\033[1;32m"
51 #define COLOR_YELLOW "\033[1;33m"
52 #define COLOR_CYAN "\033[1;36m"
53
54 #define INDENT_PKT 8
55
56 static void print_spaces(FILE *f, unsigned num)
57 {
58 fprintf(f, "%*s", num, "");
59 }
60
61 static void print_value(FILE *file, uint32_t value, int bits)
62 {
63 /* Guess if it's int or float */
64 if (value <= (1 << 15))
65 fprintf(file, "%u\n", value);
66 else {
67 float f = uif(value);
68
69 if (fabs(f) < 100000 && f*10 == floor(f*10))
70 fprintf(file, "%.1ff\n", f);
71 else
72 /* Don't print more leading zeros than there are bits. */
73 fprintf(file, "0x%0*x\n", bits / 4, value);
74 }
75 }
76
77 static void print_named_value(FILE *file, const char *name, uint32_t value,
78 int bits)
79 {
80 print_spaces(file, INDENT_PKT);
81 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
82 print_value(file, value, bits);
83 }
84
85 static void si_dump_reg(FILE *file, unsigned offset, uint32_t value,
86 uint32_t field_mask)
87 {
88 int r, f;
89
90 for (r = 0; r < ARRAY_SIZE(reg_table); r++) {
91 const struct si_reg *reg = &reg_table[r];
92
93 if (reg->offset == offset) {
94 bool first_field = true;
95
96 print_spaces(file, INDENT_PKT);
97 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
98 reg->name);
99
100 if (!reg->num_fields) {
101 print_value(file, value, 32);
102 return;
103 }
104
105 for (f = 0; f < reg->num_fields; f++) {
106 const struct si_field *field = &reg->fields[f];
107 uint32_t val = (value & field->mask) >>
108 (ffs(field->mask) - 1);
109
110 if (!(field->mask & field_mask))
111 continue;
112
113 /* Indent the field. */
114 if (!first_field)
115 print_spaces(file,
116 INDENT_PKT + strlen(reg->name) + 4);
117
118 /* Print the field. */
119 fprintf(file, "%s = ", field->name);
120
121 if (val < field->num_values && field->values[val])
122 fprintf(file, "%s\n", field->values[val]);
123 else
124 print_value(file, val,
125 util_bitcount(field->mask));
126
127 first_field = false;
128 }
129 return;
130 }
131 }
132
133 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " = 0x%08x", offset, value);
134 }
135
136 static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count,
137 unsigned reg_offset)
138 {
139 unsigned reg = (ib[1] << 2) + reg_offset;
140 int i;
141
142 for (i = 0; i < count; i++)
143 si_dump_reg(f, reg + i*4, ib[2+i], ~0);
144 }
145
146 static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
147 int trace_id)
148 {
149 unsigned count = PKT_COUNT_G(ib[0]);
150 unsigned op = PKT3_IT_OPCODE_G(ib[0]);
151 const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : "";
152 int i;
153
154 /* Print the name first. */
155 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
156 if (packet3_table[i].op == op)
157 break;
158
159 if (i < ARRAY_SIZE(packet3_table))
160 if (op == PKT3_SET_CONTEXT_REG ||
161 op == PKT3_SET_CONFIG_REG ||
162 op == PKT3_SET_UCONFIG_REG ||
163 op == PKT3_SET_SH_REG)
164 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
165 packet3_table[i].name, predicate);
166 else
167 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
168 packet3_table[i].name, predicate);
169 else
170 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
171 op, predicate);
172
173 /* Print the contents. */
174 switch (op) {
175 case PKT3_SET_CONTEXT_REG:
176 si_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET);
177 break;
178 case PKT3_SET_CONFIG_REG:
179 si_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET);
180 break;
181 case PKT3_SET_UCONFIG_REG:
182 si_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET);
183 break;
184 case PKT3_SET_SH_REG:
185 si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET);
186 break;
187 case PKT3_DRAW_PREAMBLE:
188 si_dump_reg(f, R_030908_VGT_PRIMITIVE_TYPE, ib[1], ~0);
189 si_dump_reg(f, R_028AA8_IA_MULTI_VGT_PARAM, ib[2], ~0);
190 si_dump_reg(f, R_028B58_VGT_LS_HS_CONFIG, ib[3], ~0);
191 break;
192 case PKT3_ACQUIRE_MEM:
193 si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
194 si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
195 si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0);
196 si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0);
197 si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0);
198 print_named_value(f, "POLL_INTERVAL", ib[6], 16);
199 break;
200 case PKT3_SURFACE_SYNC:
201 si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
202 si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
203 si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
204 print_named_value(f, "POLL_INTERVAL", ib[4], 16);
205 break;
206 case PKT3_EVENT_WRITE:
207 si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
208 S_028A90_EVENT_TYPE(~0));
209 print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
210 print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1);
211 if (count > 0) {
212 print_named_value(f, "ADDRESS_LO", ib[2], 32);
213 print_named_value(f, "ADDRESS_HI", ib[3], 16);
214 }
215 break;
216 case PKT3_DRAW_INDEX_AUTO:
217 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0);
218 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0);
219 break;
220 case PKT3_DRAW_INDEX_2:
221 si_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0);
222 si_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0);
223 si_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0);
224 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0);
225 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0);
226 break;
227 case PKT3_INDEX_TYPE:
228 si_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0);
229 break;
230 case PKT3_NUM_INSTANCES:
231 si_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0);
232 break;
233 case PKT3_WRITE_DATA:
234 si_dump_reg(f, R_370_CONTROL, ib[1], ~0);
235 si_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0);
236 si_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0);
237 for (i = 2; i < count; i++) {
238 print_spaces(f, INDENT_PKT);
239 fprintf(f, "0x%08x\n", ib[2+i]);
240 }
241 break;
242 case PKT3_CP_DMA:
243 si_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0);
244 si_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0);
245 si_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0);
246 si_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0);
247 si_dump_reg(f, R_414_COMMAND, ib[5], ~0);
248 break;
249 case PKT3_DMA_DATA:
250 si_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0);
251 si_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0);
252 si_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0);
253 si_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0);
254 si_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0);
255 si_dump_reg(f, R_414_COMMAND, ib[6], ~0);
256 break;
257 case PKT3_NOP:
258 if (ib[0] == 0xffff1000) {
259 count = -1; /* One dword NOP. */
260 break;
261 } else if (count == 0 && SI_IS_TRACE_POINT(ib[1])) {
262 unsigned packet_id = SI_GET_TRACE_POINT_ID(ib[1]);
263
264 print_spaces(f, INDENT_PKT);
265 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
266
267 if (trace_id == -1)
268 break; /* tracing was disabled */
269
270 print_spaces(f, INDENT_PKT);
271 if (packet_id < trace_id)
272 fprintf(f, COLOR_RED
273 "This trace point was reached by the CP."
274 COLOR_RESET "\n");
275 else if (packet_id == trace_id)
276 fprintf(f, COLOR_RED
277 "!!!!! This is the last trace point that "
278 "was reached by the CP !!!!!"
279 COLOR_RESET "\n");
280 else if (packet_id+1 == trace_id)
281 fprintf(f, COLOR_RED
282 "!!!!! This is the first trace point that "
283 "was NOT been reached by the CP !!!!!"
284 COLOR_RESET "\n");
285 else
286 fprintf(f, COLOR_RED
287 "!!!!! This trace point was NOT reached "
288 "by the CP !!!!!"
289 COLOR_RESET "\n");
290 break;
291 }
292 /* fall through, print all dwords */
293 default:
294 for (i = 0; i < count+1; i++) {
295 print_spaces(f, INDENT_PKT);
296 fprintf(f, "0x%08x\n", ib[1+i]);
297 }
298 }
299
300 ib += count + 2;
301 *num_dw -= count + 2;
302 return ib;
303 }
304
305 /**
306 * Parse and print an IB into a file.
307 *
308 * \param f file
309 * \param ib IB
310 * \param num_dw size of the IB
311 * \param chip_class chip class
312 * \param trace_id the last trace ID that is known to have been reached
313 * and executed by the CP, typically read from a buffer
314 */
315 static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
316 const char *name)
317 {
318 fprintf(f, "------------------ %s begin ------------------\n", name);
319
320 while (num_dw > 0) {
321 unsigned type = PKT_TYPE_G(ib[0]);
322
323 switch (type) {
324 case 3:
325 ib = si_parse_packet3(f, ib, &num_dw, trace_id);
326 break;
327 case 2:
328 /* type-2 nop */
329 if (ib[0] == 0x80000000) {
330 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
331 ib++;
332 break;
333 }
334 /* fall through */
335 default:
336 fprintf(f, "Unknown packet type %i\n", type);
337 return;
338 }
339 }
340
341 fprintf(f, "------------------- %s end -------------------\n", name);
342 if (num_dw < 0) {
343 printf("Packet ends after the end of IB.\n");
344 exit(0);
345 }
346 fprintf(f, "\n");
347 }
348
349 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
350 unsigned offset)
351 {
352 struct radeon_winsys *ws = sctx->b.ws;
353 uint32_t value;
354
355 if (ws->read_registers(ws, offset, 1, &value))
356 si_dump_reg(f, offset, value, ~0);
357 }
358
359 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
360 {
361 if (sctx->screen->b.info.drm_major == 2 &&
362 sctx->screen->b.info.drm_minor < 42)
363 return; /* no radeon support */
364
365 fprintf(f, "Memory-mapped registers:\n");
366 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
367
368 /* No other registers can be read on DRM < 3.1.0. */
369 if (sctx->screen->b.info.drm_major < 3 ||
370 sctx->screen->b.info.drm_minor < 1) {
371 fprintf(f, "\n");
372 return;
373 }
374
375 si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
376 si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
377 si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
378 si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
379 si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
380 si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
381 si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
382 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
383 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
384 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
385 si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
386 si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
387 si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
388 si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
389 si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
390 si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
391 si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
392 si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
393 si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
394 si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
395 fprintf(f, "\n");
396 }
397
398 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
399 {
400 int last_trace_id = -1;
401
402 if (!sctx->last_ib)
403 return;
404
405 if (sctx->last_trace_buf) {
406 /* We are expecting that the ddebug pipe has already
407 * waited for the context, so this buffer should be idle.
408 * If the GPU is hung, there is no point in waiting for it.
409 */
410 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->cs_buf,
411 NULL,
412 PIPE_TRANSFER_UNSYNCHRONIZED |
413 PIPE_TRANSFER_READ);
414 if (map)
415 last_trace_id = *map;
416 }
417
418 if (sctx->init_config)
419 si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
420 -1, "IB2: Init config");
421
422 if (sctx->init_config_gs_rings)
423 si_parse_ib(f, sctx->init_config_gs_rings->pm4,
424 sctx->init_config_gs_rings->ndw,
425 -1, "IB2: Init GS rings");
426
427 si_parse_ib(f, sctx->last_ib, sctx->last_ib_dw_size,
428 last_trace_id, "IB");
429 free(sctx->last_ib); /* dump only once */
430 sctx->last_ib = NULL;
431 r600_resource_reference(&sctx->last_trace_buf, NULL);
432 }
433
434 static const char *priority_to_string(enum radeon_bo_priority priority)
435 {
436 #define ITEM(x) [RADEON_PRIO_##x] = #x
437 static const char *table[64] = {
438 ITEM(FENCE),
439 ITEM(TRACE),
440 ITEM(SO_FILLED_SIZE),
441 ITEM(QUERY),
442 ITEM(IB1),
443 ITEM(IB2),
444 ITEM(DRAW_INDIRECT),
445 ITEM(INDEX_BUFFER),
446 ITEM(CP_DMA),
447 ITEM(VCE),
448 ITEM(UVD),
449 ITEM(SDMA_BUFFER),
450 ITEM(SDMA_TEXTURE),
451 ITEM(USER_SHADER),
452 ITEM(INTERNAL_SHADER),
453 ITEM(CONST_BUFFER),
454 ITEM(DESCRIPTORS),
455 ITEM(BORDER_COLORS),
456 ITEM(SAMPLER_BUFFER),
457 ITEM(VERTEX_BUFFER),
458 ITEM(SHADER_RW_BUFFER),
459 ITEM(RINGS_STREAMOUT),
460 ITEM(SCRATCH_BUFFER),
461 ITEM(COMPUTE_GLOBAL),
462 ITEM(SAMPLER_TEXTURE),
463 ITEM(SHADER_RW_IMAGE),
464 ITEM(SAMPLER_TEXTURE_MSAA),
465 ITEM(COLOR_BUFFER),
466 ITEM(DEPTH_BUFFER),
467 ITEM(COLOR_BUFFER_MSAA),
468 ITEM(DEPTH_BUFFER_MSAA),
469 ITEM(CMASK),
470 ITEM(DCC),
471 ITEM(HTILE),
472 };
473 #undef ITEM
474
475 assert(priority < ARRAY_SIZE(table));
476 return table[priority];
477 }
478
479 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
480 const struct radeon_bo_list_item *b)
481 {
482 return a->vm_address < b->vm_address ? -1 :
483 a->vm_address > b->vm_address ? 1 : 0;
484 }
485
486 static void si_dump_last_bo_list(struct si_context *sctx, FILE *f)
487 {
488 unsigned i,j;
489
490 if (!sctx->last_bo_list)
491 return;
492
493 /* Sort the list according to VM adddresses first. */
494 qsort(sctx->last_bo_list, sctx->last_bo_count,
495 sizeof(sctx->last_bo_list[0]), (void*)bo_list_compare_va);
496
497 fprintf(f, "Buffer list (in units of pages = 4kB):\n"
498 COLOR_YELLOW " Size VM start page "
499 "VM end page Usage" COLOR_RESET "\n");
500
501 for (i = 0; i < sctx->last_bo_count; i++) {
502 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
503 const unsigned page_size = 4096;
504 uint64_t va = sctx->last_bo_list[i].vm_address;
505 uint64_t size = sctx->last_bo_list[i].buf->size;
506 bool hit = false;
507
508 /* If there's unused virtual memory between 2 buffers, print it. */
509 if (i) {
510 uint64_t previous_va_end = sctx->last_bo_list[i-1].vm_address +
511 sctx->last_bo_list[i-1].buf->size;
512
513 if (va > previous_va_end) {
514 fprintf(f, " %10"PRIu64" -- hole --\n",
515 (va - previous_va_end) / page_size);
516 }
517 }
518
519 /* Print the buffer. */
520 fprintf(f, " %10"PRIu64" 0x%013"PRIx64" 0x%013"PRIx64" ",
521 size / page_size, va / page_size, (va + size) / page_size);
522
523 /* Print the usage. */
524 for (j = 0; j < 64; j++) {
525 if (!(sctx->last_bo_list[i].priority_usage & (1llu << j)))
526 continue;
527
528 fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
529 hit = true;
530 }
531 fprintf(f, "\n");
532 }
533 fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
534 " Other buffers can still be allocated there.\n\n");
535
536 for (i = 0; i < sctx->last_bo_count; i++)
537 pb_reference(&sctx->last_bo_list[i].buf, NULL);
538 free(sctx->last_bo_list);
539 sctx->last_bo_list = NULL;
540 }
541
542 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
543 {
544 struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
545 struct r600_texture *rtex;
546 int i;
547
548 for (i = 0; i < state->nr_cbufs; i++) {
549 if (!state->cbufs[i])
550 continue;
551
552 rtex = (struct r600_texture*)state->cbufs[i]->texture;
553 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
554 r600_print_texture_info(rtex, f);
555 fprintf(f, "\n");
556 }
557
558 if (state->zsbuf) {
559 rtex = (struct r600_texture*)state->zsbuf->texture;
560 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
561 r600_print_texture_info(rtex, f);
562 fprintf(f, "\n");
563 }
564 }
565
566 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
567 unsigned flags)
568 {
569 struct si_context *sctx = (struct si_context*)ctx;
570
571 if (flags & PIPE_DEBUG_DEVICE_IS_HUNG)
572 si_dump_debug_registers(sctx, f);
573
574 si_dump_framebuffer(sctx, f);
575 si_dump_shader(&sctx->vs_shader, "Vertex", f);
576 si_dump_shader(&sctx->tcs_shader, "Tessellation control", f);
577 si_dump_shader(&sctx->tes_shader, "Tessellation evaluation", f);
578 si_dump_shader(&sctx->gs_shader, "Geometry", f);
579 si_dump_shader(&sctx->ps_shader, "Fragment", f);
580
581 si_dump_last_bo_list(sctx, f);
582 si_dump_last_ib(sctx, f);
583
584 fprintf(f, "Done.\n");
585 }
586
587 static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr)
588 {
589 char line[2000];
590 unsigned sec, usec;
591 int progress = 0;
592 uint64_t timestamp = 0;
593 bool fault = false;
594
595 FILE *p = popen("dmesg", "r");
596 if (!p)
597 return false;
598
599 while (fgets(line, sizeof(line), p)) {
600 char *msg, len;
601
602 /* Get the timestamp. */
603 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
604 assert(0);
605 continue;
606 }
607 timestamp = sec * 1000000llu + usec;
608
609 /* If just updating the timestamp. */
610 if (!out_addr)
611 continue;
612
613 /* Process messages only if the timestamp is newer. */
614 if (timestamp <= sctx->dmesg_timestamp)
615 continue;
616
617 /* Only process the first VM fault. */
618 if (fault)
619 continue;
620
621 /* Remove trailing \n */
622 len = strlen(line);
623 if (len && line[len-1] == '\n')
624 line[len-1] = 0;
625
626 /* Get the message part. */
627 msg = strchr(line, ']');
628 if (!msg) {
629 assert(0);
630 continue;
631 }
632 msg++;
633
634 switch (progress) {
635 case 0:
636 if (strstr(msg, "GPU fault detected:"))
637 progress = 1;
638 break;
639 case 1:
640 msg = strstr(msg, "VM_CONTEXT1_PROTECTION_FAULT_ADDR");
641 if (msg) {
642 msg = strstr(msg, "0x");
643 if (msg) {
644 msg += 2;
645 if (sscanf(msg, "%X", out_addr) == 1)
646 fault = true;
647 }
648 }
649 progress = 0;
650 break;
651 default:
652 progress = 0;
653 }
654 }
655 pclose(p);
656
657 if (timestamp > sctx->dmesg_timestamp)
658 sctx->dmesg_timestamp = timestamp;
659 return fault;
660 }
661
662 void si_check_vm_faults(struct si_context *sctx)
663 {
664 struct pipe_screen *screen = sctx->b.b.screen;
665 FILE *f;
666 uint32_t addr;
667
668 /* Use conservative timeout 800ms, after which we won't wait any
669 * longer and assume the GPU is hung.
670 */
671 screen->fence_finish(screen, sctx->last_gfx_fence, 800*1000*1000);
672
673 if (!si_vm_fault_occured(sctx, &addr))
674 return;
675
676 f = dd_get_debug_file();
677 if (!f)
678 return;
679
680 fprintf(f, "VM fault report.\n\n");
681 fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
682 fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
683 fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
684 fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
685
686 si_dump_last_bo_list(sctx, f);
687 si_dump_last_ib(sctx, f);
688 fclose(f);
689
690 fprintf(stderr, "Detected a VM fault, exiting...\n");
691 exit(0);
692 }
693
694 void si_init_debug_functions(struct si_context *sctx)
695 {
696 sctx->b.b.dump_debug_state = si_dump_debug_state;
697
698 /* Set the initial dmesg timestamp for this context, so that
699 * only new messages will be checked for VM faults.
700 */
701 if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
702 si_vm_fault_occured(sctx, NULL);
703 }