Merge ../mesa into vulkan
[mesa.git] / src / gallium / drivers / radeonsi / si_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Marek Olšák <maraeo@gmail.com>
25 */
26
27 #include "si_pipe.h"
28 #include "si_shader.h"
29 #include "sid.h"
30 #include "sid_tables.h"
31 #include "ddebug/dd_util.h"
32
33
34 static void si_dump_shader(struct si_shader_ctx_state *state, const char *name,
35 FILE *f)
36 {
37 if (!state->cso || !state->current)
38 return;
39
40 fprintf(f, "%s shader disassembly:\n", name);
41 si_dump_shader_key(state->cso->type, &state->current->key, f);
42 fprintf(f, "%s\n\n", state->current->binary.disasm_string);
43 }
44
45 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
46 * read them, or use "aha -b -f file" to convert them to html.
47 */
48 #define COLOR_RESET "\033[0m"
49 #define COLOR_RED "\033[31m"
50 #define COLOR_GREEN "\033[1;32m"
51 #define COLOR_YELLOW "\033[1;33m"
52 #define COLOR_CYAN "\033[1;36m"
53
54 #define INDENT_PKT 8
55
56 static void print_spaces(FILE *f, unsigned num)
57 {
58 fprintf(f, "%*s", num, "");
59 }
60
61 static void print_value(FILE *file, uint32_t value, int bits)
62 {
63 /* Guess if it's int or float */
64 if (value <= (1 << 15)) {
65 if (value <= 9)
66 fprintf(file, "%u\n", value);
67 else
68 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
69 } else {
70 float f = uif(value);
71
72 if (fabs(f) < 100000 && f*10 == floor(f*10))
73 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
74 else
75 /* Don't print more leading zeros than there are bits. */
76 fprintf(file, "0x%0*x\n", bits / 4, value);
77 }
78 }
79
80 static void print_named_value(FILE *file, const char *name, uint32_t value,
81 int bits)
82 {
83 print_spaces(file, INDENT_PKT);
84 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
85 print_value(file, value, bits);
86 }
87
88 static void si_dump_reg(FILE *file, unsigned offset, uint32_t value,
89 uint32_t field_mask)
90 {
91 int r, f;
92
93 for (r = 0; r < ARRAY_SIZE(reg_table); r++) {
94 const struct si_reg *reg = &reg_table[r];
95
96 if (reg->offset == offset) {
97 bool first_field = true;
98
99 print_spaces(file, INDENT_PKT);
100 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
101 reg->name);
102
103 if (!reg->num_fields) {
104 print_value(file, value, 32);
105 return;
106 }
107
108 for (f = 0; f < reg->num_fields; f++) {
109 const struct si_field *field = &reg->fields[f];
110 uint32_t val = (value & field->mask) >>
111 (ffs(field->mask) - 1);
112
113 if (!(field->mask & field_mask))
114 continue;
115
116 /* Indent the field. */
117 if (!first_field)
118 print_spaces(file,
119 INDENT_PKT + strlen(reg->name) + 4);
120
121 /* Print the field. */
122 fprintf(file, "%s = ", field->name);
123
124 if (val < field->num_values && field->values[val])
125 fprintf(file, "%s\n", field->values[val]);
126 else
127 print_value(file, val,
128 util_bitcount(field->mask));
129
130 first_field = false;
131 }
132 return;
133 }
134 }
135
136 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " = 0x%08x", offset, value);
137 }
138
139 static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count,
140 unsigned reg_offset)
141 {
142 unsigned reg = (ib[1] << 2) + reg_offset;
143 int i;
144
145 for (i = 0; i < count; i++)
146 si_dump_reg(f, reg + i*4, ib[2+i], ~0);
147 }
148
149 static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
150 int trace_id)
151 {
152 unsigned count = PKT_COUNT_G(ib[0]);
153 unsigned op = PKT3_IT_OPCODE_G(ib[0]);
154 const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : "";
155 int i;
156
157 /* Print the name first. */
158 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
159 if (packet3_table[i].op == op)
160 break;
161
162 if (i < ARRAY_SIZE(packet3_table))
163 if (op == PKT3_SET_CONTEXT_REG ||
164 op == PKT3_SET_CONFIG_REG ||
165 op == PKT3_SET_UCONFIG_REG ||
166 op == PKT3_SET_SH_REG)
167 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
168 packet3_table[i].name, predicate);
169 else
170 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
171 packet3_table[i].name, predicate);
172 else
173 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
174 op, predicate);
175
176 /* Print the contents. */
177 switch (op) {
178 case PKT3_SET_CONTEXT_REG:
179 si_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET);
180 break;
181 case PKT3_SET_CONFIG_REG:
182 si_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET);
183 break;
184 case PKT3_SET_UCONFIG_REG:
185 si_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET);
186 break;
187 case PKT3_SET_SH_REG:
188 si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET);
189 break;
190 case PKT3_DRAW_PREAMBLE:
191 si_dump_reg(f, R_030908_VGT_PRIMITIVE_TYPE, ib[1], ~0);
192 si_dump_reg(f, R_028AA8_IA_MULTI_VGT_PARAM, ib[2], ~0);
193 si_dump_reg(f, R_028B58_VGT_LS_HS_CONFIG, ib[3], ~0);
194 break;
195 case PKT3_ACQUIRE_MEM:
196 si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
197 si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
198 si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0);
199 si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0);
200 si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0);
201 print_named_value(f, "POLL_INTERVAL", ib[6], 16);
202 break;
203 case PKT3_SURFACE_SYNC:
204 si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
205 si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
206 si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
207 print_named_value(f, "POLL_INTERVAL", ib[4], 16);
208 break;
209 case PKT3_EVENT_WRITE:
210 si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
211 S_028A90_EVENT_TYPE(~0));
212 print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
213 print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1);
214 if (count > 0) {
215 print_named_value(f, "ADDRESS_LO", ib[2], 32);
216 print_named_value(f, "ADDRESS_HI", ib[3], 16);
217 }
218 break;
219 case PKT3_DRAW_INDEX_AUTO:
220 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0);
221 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0);
222 break;
223 case PKT3_DRAW_INDEX_2:
224 si_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0);
225 si_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0);
226 si_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0);
227 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0);
228 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0);
229 break;
230 case PKT3_INDEX_TYPE:
231 si_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0);
232 break;
233 case PKT3_NUM_INSTANCES:
234 si_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0);
235 break;
236 case PKT3_WRITE_DATA:
237 si_dump_reg(f, R_370_CONTROL, ib[1], ~0);
238 si_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0);
239 si_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0);
240 for (i = 2; i < count; i++) {
241 print_spaces(f, INDENT_PKT);
242 fprintf(f, "0x%08x\n", ib[2+i]);
243 }
244 break;
245 case PKT3_CP_DMA:
246 si_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0);
247 si_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0);
248 si_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0);
249 si_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0);
250 si_dump_reg(f, R_414_COMMAND, ib[5], ~0);
251 break;
252 case PKT3_DMA_DATA:
253 si_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0);
254 si_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0);
255 si_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0);
256 si_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0);
257 si_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0);
258 si_dump_reg(f, R_414_COMMAND, ib[6], ~0);
259 break;
260 case PKT3_NOP:
261 if (ib[0] == 0xffff1000) {
262 count = -1; /* One dword NOP. */
263 break;
264 } else if (count == 0 && SI_IS_TRACE_POINT(ib[1])) {
265 unsigned packet_id = SI_GET_TRACE_POINT_ID(ib[1]);
266
267 print_spaces(f, INDENT_PKT);
268 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
269
270 if (trace_id == -1)
271 break; /* tracing was disabled */
272
273 print_spaces(f, INDENT_PKT);
274 if (packet_id < trace_id)
275 fprintf(f, COLOR_RED
276 "This trace point was reached by the CP."
277 COLOR_RESET "\n");
278 else if (packet_id == trace_id)
279 fprintf(f, COLOR_RED
280 "!!!!! This is the last trace point that "
281 "was reached by the CP !!!!!"
282 COLOR_RESET "\n");
283 else if (packet_id+1 == trace_id)
284 fprintf(f, COLOR_RED
285 "!!!!! This is the first trace point that "
286 "was NOT been reached by the CP !!!!!"
287 COLOR_RESET "\n");
288 else
289 fprintf(f, COLOR_RED
290 "!!!!! This trace point was NOT reached "
291 "by the CP !!!!!"
292 COLOR_RESET "\n");
293 break;
294 }
295 /* fall through, print all dwords */
296 default:
297 for (i = 0; i < count+1; i++) {
298 print_spaces(f, INDENT_PKT);
299 fprintf(f, "0x%08x\n", ib[1+i]);
300 }
301 }
302
303 ib += count + 2;
304 *num_dw -= count + 2;
305 return ib;
306 }
307
308 /**
309 * Parse and print an IB into a file.
310 *
311 * \param f file
312 * \param ib IB
313 * \param num_dw size of the IB
314 * \param chip_class chip class
315 * \param trace_id the last trace ID that is known to have been reached
316 * and executed by the CP, typically read from a buffer
317 */
318 static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
319 const char *name)
320 {
321 fprintf(f, "------------------ %s begin ------------------\n", name);
322
323 while (num_dw > 0) {
324 unsigned type = PKT_TYPE_G(ib[0]);
325
326 switch (type) {
327 case 3:
328 ib = si_parse_packet3(f, ib, &num_dw, trace_id);
329 break;
330 case 2:
331 /* type-2 nop */
332 if (ib[0] == 0x80000000) {
333 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
334 ib++;
335 break;
336 }
337 /* fall through */
338 default:
339 fprintf(f, "Unknown packet type %i\n", type);
340 return;
341 }
342 }
343
344 fprintf(f, "------------------- %s end -------------------\n", name);
345 if (num_dw < 0) {
346 printf("Packet ends after the end of IB.\n");
347 exit(0);
348 }
349 fprintf(f, "\n");
350 }
351
352 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
353 unsigned offset)
354 {
355 struct radeon_winsys *ws = sctx->b.ws;
356 uint32_t value;
357
358 if (ws->read_registers(ws, offset, 1, &value))
359 si_dump_reg(f, offset, value, ~0);
360 }
361
362 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
363 {
364 if (sctx->screen->b.info.drm_major == 2 &&
365 sctx->screen->b.info.drm_minor < 42)
366 return; /* no radeon support */
367
368 fprintf(f, "Memory-mapped registers:\n");
369 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
370
371 /* No other registers can be read on DRM < 3.1.0. */
372 if (sctx->screen->b.info.drm_major < 3 ||
373 sctx->screen->b.info.drm_minor < 1) {
374 fprintf(f, "\n");
375 return;
376 }
377
378 si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
379 si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
380 si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
381 si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
382 si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
383 si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
384 si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
385 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
386 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
387 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
388 si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
389 si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
390 si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
391 si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
392 si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
393 si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
394 si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
395 si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
396 si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
397 si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
398 fprintf(f, "\n");
399 }
400
401 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
402 {
403 int last_trace_id = -1;
404
405 if (!sctx->last_ib)
406 return;
407
408 if (sctx->last_trace_buf) {
409 /* We are expecting that the ddebug pipe has already
410 * waited for the context, so this buffer should be idle.
411 * If the GPU is hung, there is no point in waiting for it.
412 */
413 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
414 NULL,
415 PIPE_TRANSFER_UNSYNCHRONIZED |
416 PIPE_TRANSFER_READ);
417 if (map)
418 last_trace_id = *map;
419 }
420
421 if (sctx->init_config)
422 si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
423 -1, "IB2: Init config");
424
425 if (sctx->init_config_gs_rings)
426 si_parse_ib(f, sctx->init_config_gs_rings->pm4,
427 sctx->init_config_gs_rings->ndw,
428 -1, "IB2: Init GS rings");
429
430 si_parse_ib(f, sctx->last_ib, sctx->last_ib_dw_size,
431 last_trace_id, "IB");
432 free(sctx->last_ib); /* dump only once */
433 sctx->last_ib = NULL;
434 r600_resource_reference(&sctx->last_trace_buf, NULL);
435 }
436
437 static const char *priority_to_string(enum radeon_bo_priority priority)
438 {
439 #define ITEM(x) [RADEON_PRIO_##x] = #x
440 static const char *table[64] = {
441 ITEM(FENCE),
442 ITEM(TRACE),
443 ITEM(SO_FILLED_SIZE),
444 ITEM(QUERY),
445 ITEM(IB1),
446 ITEM(IB2),
447 ITEM(DRAW_INDIRECT),
448 ITEM(INDEX_BUFFER),
449 ITEM(CP_DMA),
450 ITEM(VCE),
451 ITEM(UVD),
452 ITEM(SDMA_BUFFER),
453 ITEM(SDMA_TEXTURE),
454 ITEM(USER_SHADER),
455 ITEM(INTERNAL_SHADER),
456 ITEM(CONST_BUFFER),
457 ITEM(DESCRIPTORS),
458 ITEM(BORDER_COLORS),
459 ITEM(SAMPLER_BUFFER),
460 ITEM(VERTEX_BUFFER),
461 ITEM(SHADER_RW_BUFFER),
462 ITEM(RINGS_STREAMOUT),
463 ITEM(SCRATCH_BUFFER),
464 ITEM(COMPUTE_GLOBAL),
465 ITEM(SAMPLER_TEXTURE),
466 ITEM(SHADER_RW_IMAGE),
467 ITEM(SAMPLER_TEXTURE_MSAA),
468 ITEM(COLOR_BUFFER),
469 ITEM(DEPTH_BUFFER),
470 ITEM(COLOR_BUFFER_MSAA),
471 ITEM(DEPTH_BUFFER_MSAA),
472 ITEM(CMASK),
473 ITEM(DCC),
474 ITEM(HTILE),
475 };
476 #undef ITEM
477
478 assert(priority < ARRAY_SIZE(table));
479 return table[priority];
480 }
481
482 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
483 const struct radeon_bo_list_item *b)
484 {
485 return a->vm_address < b->vm_address ? -1 :
486 a->vm_address > b->vm_address ? 1 : 0;
487 }
488
489 static void si_dump_last_bo_list(struct si_context *sctx, FILE *f)
490 {
491 unsigned i,j;
492
493 if (!sctx->last_bo_list)
494 return;
495
496 /* Sort the list according to VM adddresses first. */
497 qsort(sctx->last_bo_list, sctx->last_bo_count,
498 sizeof(sctx->last_bo_list[0]), (void*)bo_list_compare_va);
499
500 fprintf(f, "Buffer list (in units of pages = 4kB):\n"
501 COLOR_YELLOW " Size VM start page "
502 "VM end page Usage" COLOR_RESET "\n");
503
504 for (i = 0; i < sctx->last_bo_count; i++) {
505 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
506 const unsigned page_size = 4096;
507 uint64_t va = sctx->last_bo_list[i].vm_address;
508 uint64_t size = sctx->last_bo_list[i].buf->size;
509 bool hit = false;
510
511 /* If there's unused virtual memory between 2 buffers, print it. */
512 if (i) {
513 uint64_t previous_va_end = sctx->last_bo_list[i-1].vm_address +
514 sctx->last_bo_list[i-1].buf->size;
515
516 if (va > previous_va_end) {
517 fprintf(f, " %10"PRIu64" -- hole --\n",
518 (va - previous_va_end) / page_size);
519 }
520 }
521
522 /* Print the buffer. */
523 fprintf(f, " %10"PRIu64" 0x%013"PRIx64" 0x%013"PRIx64" ",
524 size / page_size, va / page_size, (va + size) / page_size);
525
526 /* Print the usage. */
527 for (j = 0; j < 64; j++) {
528 if (!(sctx->last_bo_list[i].priority_usage & (1llu << j)))
529 continue;
530
531 fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
532 hit = true;
533 }
534 fprintf(f, "\n");
535 }
536 fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
537 " Other buffers can still be allocated there.\n\n");
538
539 for (i = 0; i < sctx->last_bo_count; i++)
540 pb_reference(&sctx->last_bo_list[i].buf, NULL);
541 free(sctx->last_bo_list);
542 sctx->last_bo_list = NULL;
543 }
544
545 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
546 {
547 struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
548 struct r600_texture *rtex;
549 int i;
550
551 for (i = 0; i < state->nr_cbufs; i++) {
552 if (!state->cbufs[i])
553 continue;
554
555 rtex = (struct r600_texture*)state->cbufs[i]->texture;
556 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
557 r600_print_texture_info(rtex, f);
558 fprintf(f, "\n");
559 }
560
561 if (state->zsbuf) {
562 rtex = (struct r600_texture*)state->zsbuf->texture;
563 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
564 r600_print_texture_info(rtex, f);
565 fprintf(f, "\n");
566 }
567 }
568
569 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
570 unsigned flags)
571 {
572 struct si_context *sctx = (struct si_context*)ctx;
573
574 if (flags & PIPE_DEBUG_DEVICE_IS_HUNG)
575 si_dump_debug_registers(sctx, f);
576
577 si_dump_framebuffer(sctx, f);
578 si_dump_shader(&sctx->vs_shader, "Vertex", f);
579 si_dump_shader(&sctx->tcs_shader, "Tessellation control", f);
580 si_dump_shader(&sctx->tes_shader, "Tessellation evaluation", f);
581 si_dump_shader(&sctx->gs_shader, "Geometry", f);
582 si_dump_shader(&sctx->ps_shader, "Fragment", f);
583
584 si_dump_last_bo_list(sctx, f);
585 si_dump_last_ib(sctx, f);
586
587 fprintf(f, "Done.\n");
588 }
589
590 static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr)
591 {
592 char line[2000];
593 unsigned sec, usec;
594 int progress = 0;
595 uint64_t timestamp = 0;
596 bool fault = false;
597
598 FILE *p = popen("dmesg", "r");
599 if (!p)
600 return false;
601
602 while (fgets(line, sizeof(line), p)) {
603 char *msg, len;
604
605 /* Get the timestamp. */
606 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
607 assert(0);
608 continue;
609 }
610 timestamp = sec * 1000000llu + usec;
611
612 /* If just updating the timestamp. */
613 if (!out_addr)
614 continue;
615
616 /* Process messages only if the timestamp is newer. */
617 if (timestamp <= sctx->dmesg_timestamp)
618 continue;
619
620 /* Only process the first VM fault. */
621 if (fault)
622 continue;
623
624 /* Remove trailing \n */
625 len = strlen(line);
626 if (len && line[len-1] == '\n')
627 line[len-1] = 0;
628
629 /* Get the message part. */
630 msg = strchr(line, ']');
631 if (!msg) {
632 assert(0);
633 continue;
634 }
635 msg++;
636
637 switch (progress) {
638 case 0:
639 if (strstr(msg, "GPU fault detected:"))
640 progress = 1;
641 break;
642 case 1:
643 msg = strstr(msg, "VM_CONTEXT1_PROTECTION_FAULT_ADDR");
644 if (msg) {
645 msg = strstr(msg, "0x");
646 if (msg) {
647 msg += 2;
648 if (sscanf(msg, "%X", out_addr) == 1)
649 fault = true;
650 }
651 }
652 progress = 0;
653 break;
654 default:
655 progress = 0;
656 }
657 }
658 pclose(p);
659
660 if (timestamp > sctx->dmesg_timestamp)
661 sctx->dmesg_timestamp = timestamp;
662 return fault;
663 }
664
665 void si_check_vm_faults(struct si_context *sctx)
666 {
667 struct pipe_screen *screen = sctx->b.b.screen;
668 FILE *f;
669 uint32_t addr;
670
671 /* Use conservative timeout 800ms, after which we won't wait any
672 * longer and assume the GPU is hung.
673 */
674 sctx->b.ws->fence_wait(sctx->b.ws, sctx->last_gfx_fence, 800*1000*1000);
675
676 if (!si_vm_fault_occured(sctx, &addr))
677 return;
678
679 f = dd_get_debug_file();
680 if (!f)
681 return;
682
683 fprintf(f, "VM fault report.\n\n");
684 fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
685 fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
686 fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
687 fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
688
689 si_dump_last_bo_list(sctx, f);
690 si_dump_last_ib(sctx, f);
691 fclose(f);
692
693 fprintf(stderr, "Detected a VM fault, exiting...\n");
694 exit(0);
695 }
696
697 void si_init_debug_functions(struct si_context *sctx)
698 {
699 sctx->b.b.dump_debug_state = si_dump_debug_state;
700
701 /* Set the initial dmesg timestamp for this context, so that
702 * only new messages will be checked for VM faults.
703 */
704 if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
705 si_vm_fault_occured(sctx, NULL);
706 }