src/gallium/drivers/radeonsi/si_debug.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Marek Olšák <maraeo@gmail.com>
  25  */
  26
  27 #include "si_pipe.h"
  28 #include "si_compute.h"
  29 #include "sid.h"
  30 #include "gfx9d.h"
  31 #include "sid_tables.h"
  32 #include "ddebug/dd_util.h"
  33 #include "util/u_memory.h"
  34 #include "ac_debug.h"
  35
  36 DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
  37
  38 static void si_dump_shader(struct si_screen *sscreen,
  39                            enum pipe_shader_type processor,
  40                            const struct si_shader *shader, FILE *f)
  41 {
  42         if (shader->shader_log)
  43                 fwrite(shader->shader_log, shader->shader_log_size, 1, f);
  44         else
  45                 si_shader_dump(sscreen, shader, NULL, processor, f, false);
  46 }
  47
  48 static void si_dump_gfx_shader(struct si_screen *sscreen,
  49                                const struct si_shader_ctx_state *state, FILE *f)
  50 {
  51         const struct si_shader *current = state->current;
  52
  53         if (!state->cso || !current)
  54                 return;
  55
  56         si_dump_shader(sscreen, state->cso->info.processor, current, f);
  57 }
  58
  59 static void si_dump_compute_shader(struct si_screen *sscreen,
  60                                    const struct si_cs_shader_state *state, FILE *f)
  61 {
  62         if (!state->program || state->program != state->emitted_program)
  63                 return;
  64
  65         si_dump_shader(sscreen, PIPE_SHADER_COMPUTE, &state->program->shader, f);
  66 }
  67
  68 /**
  69  * Shader compiles can be overridden with arbitrary ELF objects by setting
  70  * the environment variable RADEON_REPLACE_SHADERS=num1:filename1[;num2:filename2]
  71  */
  72 bool si_replace_shader(unsigned num, struct ac_shader_binary *binary)
  73 {
  74         const char *p = debug_get_option_replace_shaders();
  75         const char *semicolon;
  76         char *copy = NULL;
  77         FILE *f;
  78         long filesize, nread;
  79         char *buf = NULL;
  80         bool replaced = false;
  81
  82         if (!p)
  83                 return false;
  84
  85         while (*p) {
  86                 unsigned long i;
  87                 char *endp;
  88                 i = strtoul(p, &endp, 0);
  89
  90                 p = endp;
  91                 if (*p != ':') {
  92                         fprintf(stderr, "RADEON_REPLACE_SHADERS formatted badly.\n");
  93                         exit(1);
  94                 }
  95                 ++p;
  96
  97                 if (i == num)
  98                         break;
  99
 100                 p = strchr(p, ';');
 101                 if (!p)
 102                         return false;
 103                 ++p;
 104         }
 105         if (!*p)
 106                 return false;
 107
 108         semicolon = strchr(p, ';');
 109         if (semicolon) {
 110                 p = copy = strndup(p, semicolon - p);
 111                 if (!copy) {
 112                         fprintf(stderr, "out of memory\n");
 113                         return false;
 114                 }
 115         }
 116
 117         fprintf(stderr, "radeonsi: replace shader %u by %s\n", num, p);
 118
 119         f = fopen(p, "r");
 120         if (!f) {
 121                 perror("radeonsi: failed to open file");
 122                 goto out_free;
 123         }
 124
 125         if (fseek(f, 0, SEEK_END) != 0)
 126                 goto file_error;
 127
 128         filesize = ftell(f);
 129         if (filesize < 0)
 130                 goto file_error;
 131
 132         if (fseek(f, 0, SEEK_SET) != 0)
 133                 goto file_error;
 134
 135         buf = MALLOC(filesize);
 136         if (!buf) {
 137                 fprintf(stderr, "out of memory\n");
 138                 goto out_close;
 139         }
 140
 141         nread = fread(buf, 1, filesize, f);
 142         if (nread != filesize)
 143                 goto file_error;
 144
 145         ac_elf_read(buf, filesize, binary);
 146         replaced = true;
 147
 148 out_close:
 149         fclose(f);
 150 out_free:
 151         FREE(buf);
 152         free(copy);
 153         return replaced;
 154
 155 file_error:
 156         perror("radeonsi: reading shader");
 157         goto out_close;
 158 }
 159
 160 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
 161  * read them, or use "aha -b -f file" to convert them to html.
 162  */
 163 #define COLOR_RESET     "\033[0m"
 164 #define COLOR_RED       "\033[31m"
 165 #define COLOR_GREEN     "\033[1;32m"
 166 #define COLOR_YELLOW    "\033[1;33m"
 167 #define COLOR_CYAN      "\033[1;36m"
 168
 169 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
 170                                 unsigned offset)
 171 {
 172         struct radeon_winsys *ws = sctx->b.ws;
 173         uint32_t value;
 174
 175         if (ws->read_registers(ws, offset, 1, &value))
 176                 ac_dump_reg(f, offset, value, ~0);
 177 }
 178
 179 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
 180 {
 181         if (sctx->screen->b.info.drm_major == 2 &&
 182             sctx->screen->b.info.drm_minor < 42)
 183                 return; /* no radeon support */
 184
 185         fprintf(f, "Memory-mapped registers:\n");
 186         si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
 187
 188         /* No other registers can be read on DRM < 3.1.0. */
 189         if (sctx->screen->b.info.drm_major < 3 ||
 190             sctx->screen->b.info.drm_minor < 1) {
 191                 fprintf(f, "\n");
 192                 return;
 193         }
 194
 195         si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
 196         si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
 197         si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
 198         si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
 199         si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
 200         si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
 201         si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
 202         if (sctx->b.chip_class <= VI) {
 203                 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
 204                 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
 205                 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
 206         }
 207         si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
 208         si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
 209         si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
 210         si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
 211         si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
 212         si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
 213         si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
 214         si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
 215         si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
 216         si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
 217         fprintf(f, "\n");
 218 }
 219
 220 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
 221 {
 222         int last_trace_id = -1;
 223
 224         if (!sctx->last_gfx.ib)
 225                 return;
 226
 227         if (sctx->last_trace_buf) {
 228                 /* We are expecting that the ddebug pipe has already
 229                  * waited for the context, so this buffer should be idle.
 230                  * If the GPU is hung, there is no point in waiting for it.
 231                  */
 232                 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
 233                                                        NULL,
 234                                                        PIPE_TRANSFER_UNSYNCHRONIZED |
 235                                                        PIPE_TRANSFER_READ);
 236                 if (map)
 237                         last_trace_id = *map;
 238         }
 239
 240         if (sctx->init_config)
 241                 ac_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
 242                             -1, "IB2: Init config", sctx->b.chip_class,
 243                             NULL, NULL);
 244
 245         if (sctx->init_config_gs_rings)
 246                 ac_parse_ib(f, sctx->init_config_gs_rings->pm4,
 247                             sctx->init_config_gs_rings->ndw,
 248                             -1, "IB2: Init GS rings", sctx->b.chip_class,
 249                             NULL, NULL);
 250
 251         ac_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw,
 252                     last_trace_id, "IB", sctx->b.chip_class,
 253                      NULL, NULL);
 254 }
 255
 256 static const char *priority_to_string(enum radeon_bo_priority priority)
 257 {
 258 #define ITEM(x) [RADEON_PRIO_##x] = #x
 259         static const char *table[64] = {
 260                 ITEM(FENCE),
 261                 ITEM(TRACE),
 262                 ITEM(SO_FILLED_SIZE),
 263                 ITEM(QUERY),
 264                 ITEM(IB1),
 265                 ITEM(IB2),
 266                 ITEM(DRAW_INDIRECT),
 267                 ITEM(INDEX_BUFFER),
 268                 ITEM(VCE),
 269                 ITEM(UVD),
 270                 ITEM(SDMA_BUFFER),
 271                 ITEM(SDMA_TEXTURE),
 272                 ITEM(CP_DMA),
 273                 ITEM(CONST_BUFFER),
 274                 ITEM(DESCRIPTORS),
 275                 ITEM(BORDER_COLORS),
 276                 ITEM(SAMPLER_BUFFER),
 277                 ITEM(VERTEX_BUFFER),
 278                 ITEM(SHADER_RW_BUFFER),
 279                 ITEM(COMPUTE_GLOBAL),
 280                 ITEM(SAMPLER_TEXTURE),
 281                 ITEM(SHADER_RW_IMAGE),
 282                 ITEM(SAMPLER_TEXTURE_MSAA),
 283                 ITEM(COLOR_BUFFER),
 284                 ITEM(DEPTH_BUFFER),
 285                 ITEM(COLOR_BUFFER_MSAA),
 286                 ITEM(DEPTH_BUFFER_MSAA),
 287                 ITEM(CMASK),
 288                 ITEM(DCC),
 289                 ITEM(HTILE),
 290                 ITEM(SHADER_BINARY),
 291                 ITEM(SHADER_RINGS),
 292                 ITEM(SCRATCH_BUFFER),
 293         };
 294 #undef ITEM
 295
 296         assert(priority < ARRAY_SIZE(table));
 297         return table[priority];
 298 }
 299
 300 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
 301                                    const struct radeon_bo_list_item *b)
 302 {
 303         return a->vm_address < b->vm_address ? -1 :
 304                a->vm_address > b->vm_address ? 1 : 0;
 305 }
 306
 307 static void si_dump_bo_list(struct si_context *sctx,
 308                             const struct radeon_saved_cs *saved, FILE *f)
 309 {
 310         unsigned i,j;
 311
 312         if (!saved->bo_list)
 313                 return;
 314
 315         /* Sort the list according to VM adddresses first. */
 316         qsort(saved->bo_list, saved->bo_count,
 317               sizeof(saved->bo_list[0]), (void*)bo_list_compare_va);
 318
 319         fprintf(f, "Buffer list (in units of pages = 4kB):\n"
 320                 COLOR_YELLOW "        Size    VM start page         "
 321                 "VM end page           Usage" COLOR_RESET "\n");
 322
 323         for (i = 0; i < saved->bo_count; i++) {
 324                 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
 325                 const unsigned page_size = sctx->b.screen->info.gart_page_size;
 326                 uint64_t va = saved->bo_list[i].vm_address;
 327                 uint64_t size = saved->bo_list[i].bo_size;
 328                 bool hit = false;
 329
 330                 /* If there's unused virtual memory between 2 buffers, print it. */
 331                 if (i) {
 332                         uint64_t previous_va_end = saved->bo_list[i-1].vm_address +
 333                                                    saved->bo_list[i-1].bo_size;
 334
 335                         if (va > previous_va_end) {
 336                                 fprintf(f, "  %10"PRIu64"    -- hole --\n",
 337                                         (va - previous_va_end) / page_size);
 338                         }
 339                 }
 340
 341                 /* Print the buffer. */
 342                 fprintf(f, "  %10"PRIu64"    0x%013"PRIX64"       0x%013"PRIX64"       ",
 343                         size / page_size, va / page_size, (va + size) / page_size);
 344
 345                 /* Print the usage. */
 346                 for (j = 0; j < 64; j++) {
 347                         if (!(saved->bo_list[i].priority_usage & (1ull << j)))
 348                                 continue;
 349
 350                         fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
 351                         hit = true;
 352                 }
 353                 fprintf(f, "\n");
 354         }
 355         fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
 356                    "      Other buffers can still be allocated there.\n\n");
 357 }
 358
 359 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
 360 {
 361         struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
 362         struct r600_texture *rtex;
 363         int i;
 364
 365         for (i = 0; i < state->nr_cbufs; i++) {
 366                 if (!state->cbufs[i])
 367                         continue;
 368
 369                 rtex = (struct r600_texture*)state->cbufs[i]->texture;
 370                 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
 371                 r600_print_texture_info(sctx->b.screen, rtex, f);
 372                 fprintf(f, "\n");
 373         }
 374
 375         if (state->zsbuf) {
 376                 rtex = (struct r600_texture*)state->zsbuf->texture;
 377                 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
 378                 r600_print_texture_info(sctx->b.screen, rtex, f);
 379                 fprintf(f, "\n");
 380         }
 381 }
 382
 383 typedef unsigned (*slot_remap_func)(unsigned);
 384
 385 static void si_dump_descriptor_list(struct si_descriptors *desc,
 386                                     const char *shader_name,
 387                                     const char *elem_name,
 388                                     unsigned element_dw_size,
 389                                     unsigned num_elements,
 390                                     slot_remap_func slot_remap,
 391                                     FILE *f)
 392 {
 393         unsigned i, j;
 394
 395         if (!desc->list)
 396                 return;
 397
 398         for (i = 0; i < num_elements; i++) {
 399                 unsigned dw_offset = slot_remap(i) * element_dw_size;
 400                 uint32_t *gpu_ptr = desc->gpu_list ? desc->gpu_list : desc->list;
 401                 const char *list_note = desc->gpu_list ? "GPU list" : "CPU list";
 402                 uint32_t *cpu_list = desc->list + dw_offset;
 403                 uint32_t *gpu_list = gpu_ptr + dw_offset;
 404
 405                 fprintf(f, COLOR_GREEN "%s%s slot %u (%s):" COLOR_RESET "\n",
 406                         shader_name, elem_name, i, list_note);
 407
 408                 switch (element_dw_size) {
 409                 case 4:
 410                         for (j = 0; j < 4; j++)
 411                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 412                                             gpu_list[j], 0xffffffff);
 413                         break;
 414                 case 8:
 415                         for (j = 0; j < 8; j++)
 416                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 417                                             gpu_list[j], 0xffffffff);
 418
 419                         fprintf(f, COLOR_CYAN "    Buffer:" COLOR_RESET "\n");
 420                         for (j = 0; j < 4; j++)
 421                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 422                                             gpu_list[4+j], 0xffffffff);
 423                         break;
 424                 case 16:
 425                         for (j = 0; j < 8; j++)
 426                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 427                                             gpu_list[j], 0xffffffff);
 428
 429                         fprintf(f, COLOR_CYAN "    Buffer:" COLOR_RESET "\n");
 430                         for (j = 0; j < 4; j++)
 431                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 432                                             gpu_list[4+j], 0xffffffff);
 433
 434                         fprintf(f, COLOR_CYAN "    FMASK:" COLOR_RESET "\n");
 435                         for (j = 0; j < 8; j++)
 436                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 437                                             gpu_list[8+j], 0xffffffff);
 438
 439                         fprintf(f, COLOR_CYAN "    Sampler state:" COLOR_RESET "\n");
 440                         for (j = 0; j < 4; j++)
 441                                 ac_dump_reg(f, R_008F30_SQ_IMG_SAMP_WORD0 + j*4,
 442                                             gpu_list[12+j], 0xffffffff);
 443                         break;
 444                 }
 445
 446                 if (memcmp(gpu_list, cpu_list, desc->element_dw_size * 4) != 0) {
 447                         fprintf(f, COLOR_RED "!!!!! This slot was corrupted in GPU memory !!!!!"
 448                                 COLOR_RESET "\n");
 449                 }
 450
 451                 fprintf(f, "\n");
 452         }
 453 }
 454
 455 static unsigned si_identity(unsigned slot)
 456 {
 457         return slot;
 458 }
 459
 460 static void si_dump_descriptors(struct si_context *sctx,
 461                                 enum pipe_shader_type processor,
 462                                 const struct tgsi_shader_info *info, FILE *f)
 463 {
 464         struct si_descriptors *descs =
 465                 &sctx->descriptors[SI_DESCS_FIRST_SHADER +
 466                                    processor * SI_NUM_SHADER_DESCS];
 467         static const char *shader_name[] = {"VS", "PS", "GS", "TCS", "TES", "CS"};
 468         const char *name = shader_name[processor];
 469         unsigned enabled_constbuf, enabled_shaderbuf, enabled_samplers;
 470         unsigned enabled_images;
 471
 472         if (info) {
 473                 enabled_constbuf = info->const_buffers_declared;
 474                 enabled_shaderbuf = info->shader_buffers_declared;
 475                 enabled_samplers = info->samplers_declared;
 476                 enabled_images = info->images_declared;
 477         } else {
 478                 enabled_constbuf = sctx->const_and_shader_buffers[processor].enabled_mask >>
 479                                    SI_NUM_SHADER_BUFFERS;
 480                 enabled_shaderbuf = sctx->const_and_shader_buffers[processor].enabled_mask &
 481                                     u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
 482                 enabled_shaderbuf = util_bitreverse(enabled_shaderbuf) >>
 483                                     (32 - SI_NUM_SHADER_BUFFERS);
 484                 enabled_samplers = sctx->samplers[processor].views.enabled_mask;
 485                 enabled_images = sctx->images[processor].enabled_mask;
 486         }
 487
 488         if (processor == PIPE_SHADER_VERTEX) {
 489                 assert(info); /* only CS may not have an info struct */
 490
 491                 si_dump_descriptor_list(&sctx->vertex_buffers, name,
 492                                         " - Vertex buffer", 4, info->num_inputs,
 493                                         si_identity, f);
 494         }
 495
 496         si_dump_descriptor_list(&descs[SI_SHADER_DESCS_CONST_AND_SHADER_BUFFERS],
 497                                 name, " - Constant buffer", 4,
 498                                 util_last_bit(enabled_constbuf),
 499                                 si_get_constbuf_slot, f);
 500         si_dump_descriptor_list(&descs[SI_SHADER_DESCS_CONST_AND_SHADER_BUFFERS],
 501                                 name, " - Shader buffer", 4,
 502                                 util_last_bit(enabled_shaderbuf),
 503                                 si_get_shaderbuf_slot, f);
 504         si_dump_descriptor_list(&descs[SI_SHADER_DESCS_SAMPLERS_AND_IMAGES],
 505                                 name, " - Sampler", 16,
 506                                 util_last_bit(enabled_samplers),
 507                                 si_get_sampler_slot, f);
 508         si_dump_descriptor_list(&descs[SI_SHADER_DESCS_SAMPLERS_AND_IMAGES],
 509                                 name, " - Image", 8,
 510                                 util_last_bit(enabled_images),
 511                                 si_get_image_slot, f);
 512 }
 513
 514 static void si_dump_gfx_descriptors(struct si_context *sctx,
 515                                     const struct si_shader_ctx_state *state,
 516                                     FILE *f)
 517 {
 518         if (!state->cso || !state->current)
 519                 return;
 520
 521         si_dump_descriptors(sctx, state->cso->type, &state->cso->info, f);
 522 }
 523
 524 static void si_dump_compute_descriptors(struct si_context *sctx, FILE *f)
 525 {
 526         if (!sctx->cs_shader_state.program ||
 527             sctx->cs_shader_state.program != sctx->cs_shader_state.emitted_program)
 528                 return;
 529
 530         si_dump_descriptors(sctx, PIPE_SHADER_COMPUTE, NULL, f);
 531 }
 532
 533 struct si_shader_inst {
 534         char text[160];  /* one disasm line */
 535         unsigned offset; /* instruction offset */
 536         unsigned size;   /* instruction size = 4 or 8 */
 537 };
 538
 539 /* Split a disassembly string into lines and add them to the array pointed
 540  * to by "instructions". */
 541 static void si_add_split_disasm(const char *disasm,
 542                                 uint64_t start_addr,
 543                                 unsigned *num,
 544                                 struct si_shader_inst *instructions)
 545 {
 546         struct si_shader_inst *last_inst = *num ? &instructions[*num - 1] : NULL;
 547         char *next;
 548
 549         while ((next = strchr(disasm, '\n'))) {
 550                 struct si_shader_inst *inst = &instructions[*num];
 551                 unsigned len = next - disasm;
 552
 553                 assert(len < ARRAY_SIZE(inst->text));
 554                 memcpy(inst->text, disasm, len);
 555                 inst->text[len] = 0;
 556                 inst->offset = last_inst ? last_inst->offset + last_inst->size : 0;
 557
 558                 const char *semicolon = strchr(disasm, ';');
 559                 assert(semicolon);
 560                 /* More than 16 chars after ";" means the instruction is 8 bytes long. */
 561                 inst->size = next - semicolon > 16 ? 8 : 4;
 562
 563                 snprintf(inst->text + len, ARRAY_SIZE(inst->text) - len,
 564                         " [PC=0x%"PRIx64", off=%u, size=%u]",
 565                         start_addr + inst->offset, inst->offset, inst->size);
 566
 567                 last_inst = inst;
 568                 (*num)++;
 569                 disasm = next + 1;
 570         }
 571 }
 572
 573 #define MAX_WAVES_PER_CHIP (64 * 40)
 574
 575 struct si_wave_info {
 576         unsigned se; /* shader engine */
 577         unsigned sh; /* shader array */
 578         unsigned cu; /* compute unit */
 579         unsigned simd;
 580         unsigned wave;
 581         uint32_t status;
 582         uint64_t pc; /* program counter */
 583         uint32_t inst_dw0;
 584         uint32_t inst_dw1;
 585         uint64_t exec;
 586         bool matched; /* whether the wave is used by a currently-bound shader */
 587 };
 588
 589 static int compare_wave(const void *p1, const void *p2)
 590 {
 591         struct si_wave_info *w1 = (struct si_wave_info *)p1;
 592         struct si_wave_info *w2 = (struct si_wave_info *)p2;
 593
 594         /* Sort waves according to PC and then SE, SH, CU, etc. */
 595         if (w1->pc < w2->pc)
 596                 return -1;
 597         if (w1->pc > w2->pc)
 598                 return 1;
 599         if (w1->se < w2->se)
 600                 return -1;
 601         if (w1->se > w2->se)
 602                 return 1;
 603         if (w1->sh < w2->sh)
 604                 return -1;
 605         if (w1->sh > w2->sh)
 606                 return 1;
 607         if (w1->cu < w2->cu)
 608                 return -1;
 609         if (w1->cu > w2->cu)
 610                 return 1;
 611         if (w1->simd < w2->simd)
 612                 return -1;
 613         if (w1->simd > w2->simd)
 614                 return 1;
 615         if (w1->wave < w2->wave)
 616                 return -1;
 617         if (w1->wave > w2->wave)
 618                 return 1;
 619
 620         return 0;
 621 }
 622
 623 /* Return wave information. "waves" should be a large enough array. */
 624 static unsigned si_get_wave_info(struct si_wave_info waves[MAX_WAVES_PER_CHIP])
 625 {
 626         char line[2000];
 627         unsigned num_waves = 0;
 628
 629         FILE *p = popen("umr -wa", "r");
 630         if (!p)
 631                 return 0;
 632
 633         if (!fgets(line, sizeof(line), p) ||
 634             strncmp(line, "SE", 2) != 0) {
 635                 pclose(p);
 636                 return 0;
 637         }
 638
 639         while (fgets(line, sizeof(line), p)) {
 640                 struct si_wave_info *w;
 641                 uint32_t pc_hi, pc_lo, exec_hi, exec_lo;
 642
 643                 assert(num_waves < MAX_WAVES_PER_CHIP);
 644                 w = &waves[num_waves];
 645
 646                 if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x",
 647                            &w->se, &w->sh, &w->cu, &w->simd, &w->wave,
 648                            &w->status, &pc_hi, &pc_lo, &w->inst_dw0,
 649                            &w->inst_dw1, &exec_hi, &exec_lo) == 12) {
 650                         w->pc = ((uint64_t)pc_hi << 32) | pc_lo;
 651                         w->exec = ((uint64_t)exec_hi << 32) | exec_lo;
 652                         w->matched = false;
 653                         num_waves++;
 654                 }
 655         }
 656
 657         qsort(waves, num_waves, sizeof(struct si_wave_info), compare_wave);
 658
 659         pclose(p);
 660         return num_waves;
 661 }
 662
 663 /* If the shader is being executed, print its asm instructions, and annotate
 664  * those that are being executed right now with information about waves that
 665  * execute them. This is most useful during a GPU hang.
 666  */
 667 static void si_print_annotated_shader(struct si_shader *shader,
 668                                       struct si_wave_info *waves,
 669                                       unsigned num_waves,
 670                                       FILE *f)
 671 {
 672         if (!shader || !shader->binary.disasm_string)
 673                 return;
 674
 675         uint64_t start_addr = shader->bo->gpu_address;
 676         uint64_t end_addr = start_addr + shader->bo->b.b.width0;
 677         unsigned i;
 678
 679         /* See if any wave executes the shader. */
 680         for (i = 0; i < num_waves; i++) {
 681                 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
 682                         break;
 683         }
 684         if (i == num_waves)
 685                 return; /* the shader is not being executed */
 686
 687         /* Remember the first found wave. The waves are sorted according to PC. */
 688         waves = &waves[i];
 689         num_waves -= i;
 690
 691         /* Get the list of instructions.
 692          * Buffer size / 4 is the upper bound of the instruction count.
 693          */
 694         unsigned num_inst = 0;
 695         struct si_shader_inst *instructions =
 696                 calloc(shader->bo->b.b.width0 / 4, sizeof(struct si_shader_inst));
 697
 698         if (shader->prolog) {
 699                 si_add_split_disasm(shader->prolog->binary.disasm_string,
 700                                     start_addr, &num_inst, instructions);
 701         }
 702         if (shader->previous_stage) {
 703                 si_add_split_disasm(shader->previous_stage->binary.disasm_string,
 704                                     start_addr, &num_inst, instructions);
 705         }
 706         if (shader->prolog2) {
 707                 si_add_split_disasm(shader->prolog2->binary.disasm_string,
 708                                     start_addr, &num_inst, instructions);
 709         }
 710         si_add_split_disasm(shader->binary.disasm_string,
 711                             start_addr, &num_inst, instructions);
 712         if (shader->epilog) {
 713                 si_add_split_disasm(shader->epilog->binary.disasm_string,
 714                                     start_addr, &num_inst, instructions);
 715         }
 716
 717         fprintf(f, COLOR_YELLOW "%s - annotated disassembly:" COLOR_RESET "\n",
 718                 si_get_shader_name(shader, shader->selector->type));
 719
 720         /* Print instructions with annotations. */
 721         for (i = 0; i < num_inst; i++) {
 722                 struct si_shader_inst *inst = &instructions[i];
 723
 724                 fprintf(f, "%s\n", inst->text);
 725
 726                 /* Print which waves execute the instruction right now. */
 727                 while (num_waves && start_addr + inst->offset == waves->pc) {
 728                         fprintf(f,
 729                                 "          " COLOR_GREEN "^ SE%u SH%u CU%u "
 730                                 "SIMD%u WAVE%u  EXEC=%016"PRIx64 "  ",
 731                                 waves->se, waves->sh, waves->cu, waves->simd,
 732                                 waves->wave, waves->exec);
 733
 734                         if (inst->size == 4) {
 735                                 fprintf(f, "INST32=%08X" COLOR_RESET "\n",
 736                                         waves->inst_dw0);
 737                         } else {
 738                                 fprintf(f, "INST64=%08X %08X" COLOR_RESET "\n",
 739                                         waves->inst_dw0, waves->inst_dw1);
 740                         }
 741
 742                         waves->matched = true;
 743                         waves = &waves[1];
 744                         num_waves--;
 745                 }
 746         }
 747
 748         fprintf(f, "\n\n");
 749         free(instructions);
 750 }
 751
 752 static void si_dump_annotated_shaders(struct si_context *sctx, FILE *f)
 753 {
 754         struct si_wave_info waves[MAX_WAVES_PER_CHIP];
 755         unsigned num_waves = si_get_wave_info(waves);
 756
 757         fprintf(f, COLOR_CYAN "The number of active waves = %u" COLOR_RESET
 758                 "\n\n", num_waves);
 759
 760         si_print_annotated_shader(sctx->vs_shader.current, waves, num_waves, f);
 761         si_print_annotated_shader(sctx->tcs_shader.current, waves, num_waves, f);
 762         si_print_annotated_shader(sctx->tes_shader.current, waves, num_waves, f);
 763         si_print_annotated_shader(sctx->gs_shader.current, waves, num_waves, f);
 764         si_print_annotated_shader(sctx->ps_shader.current, waves, num_waves, f);
 765
 766         /* Print waves executing shaders that are not currently bound. */
 767         unsigned i;
 768         bool found = false;
 769         for (i = 0; i < num_waves; i++) {
 770                 if (waves[i].matched)
 771                         continue;
 772
 773                 if (!found) {
 774                         fprintf(f, COLOR_CYAN
 775                                 "Waves not executing currently-bound shaders:"
 776                                 COLOR_RESET "\n");
 777                         found = true;
 778                 }
 779                 fprintf(f, "    SE%u SH%u CU%u SIMD%u WAVE%u  EXEC=%016"PRIx64
 780                         "  INST=%08X %08X  PC=%"PRIx64"\n",
 781                         waves[i].se, waves[i].sh, waves[i].cu, waves[i].simd,
 782                         waves[i].wave, waves[i].exec, waves[i].inst_dw0,
 783                         waves[i].inst_dw1, waves[i].pc);
 784         }
 785         if (found)
 786                 fprintf(f, "\n\n");
 787 }
 788
 789 static void si_dump_command(const char *title, const char *command, FILE *f)
 790 {
 791         char line[2000];
 792
 793         FILE *p = popen(command, "r");
 794         if (!p)
 795                 return;
 796
 797         fprintf(f, COLOR_YELLOW "%s: " COLOR_RESET "\n", title);
 798         while (fgets(line, sizeof(line), p))
 799                 fputs(line, f);
 800         fprintf(f, "\n\n");
 801         pclose(p);
 802 }
 803
 804 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
 805                                 unsigned flags)
 806 {
 807         struct si_context *sctx = (struct si_context*)ctx;
 808
 809         if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS)
 810                 si_dump_debug_registers(sctx, f);
 811
 812         if (flags & PIPE_DUMP_CURRENT_STATES)
 813                 si_dump_framebuffer(sctx, f);
 814
 815         if (flags & PIPE_DUMP_CURRENT_SHADERS) {
 816                 si_dump_gfx_shader(sctx->screen, &sctx->vs_shader, f);
 817                 si_dump_gfx_shader(sctx->screen, &sctx->tcs_shader, f);
 818                 si_dump_gfx_shader(sctx->screen, &sctx->tes_shader, f);
 819                 si_dump_gfx_shader(sctx->screen, &sctx->gs_shader, f);
 820                 si_dump_gfx_shader(sctx->screen, &sctx->ps_shader, f);
 821                 si_dump_compute_shader(sctx->screen, &sctx->cs_shader_state, f);
 822
 823                 if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS) {
 824                         si_dump_annotated_shaders(sctx, f);
 825                         si_dump_command("Active waves (raw data)", "umr -wa | column -t", f);
 826                         si_dump_command("Wave information", "umr -O bits -wa", f);
 827                 }
 828
 829                 si_dump_descriptor_list(&sctx->descriptors[SI_DESCS_RW_BUFFERS],
 830                                         "", "RW buffers", 4, SI_NUM_RW_BUFFERS,
 831                                         si_identity, f);
 832                 si_dump_gfx_descriptors(sctx, &sctx->vs_shader, f);
 833                 si_dump_gfx_descriptors(sctx, &sctx->tcs_shader, f);
 834                 si_dump_gfx_descriptors(sctx, &sctx->tes_shader, f);
 835                 si_dump_gfx_descriptors(sctx, &sctx->gs_shader, f);
 836                 si_dump_gfx_descriptors(sctx, &sctx->ps_shader, f);
 837                 si_dump_compute_descriptors(sctx, f);
 838         }
 839
 840         if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {
 841                 si_dump_bo_list(sctx, &sctx->last_gfx, f);
 842                 si_dump_last_ib(sctx, f);
 843
 844                 fprintf(f, "Done.\n");
 845
 846                 /* dump only once */
 847                 radeon_clear_saved_cs(&sctx->last_gfx);
 848                 r600_resource_reference(&sctx->last_trace_buf, NULL);
 849         }
 850 }
 851
 852 static void si_dump_dma(struct si_context *sctx,
 853                         struct radeon_saved_cs *saved, FILE *f)
 854 {
 855         static const char ib_name[] = "sDMA IB";
 856         unsigned i;
 857
 858         si_dump_bo_list(sctx, saved, f);
 859
 860         fprintf(f, "------------------ %s begin ------------------\n", ib_name);
 861
 862         for (i = 0; i < saved->num_dw; ++i) {
 863                 fprintf(f, " %08x\n", saved->ib[i]);
 864         }
 865
 866         fprintf(f, "------------------- %s end -------------------\n", ib_name);
 867         fprintf(f, "\n");
 868
 869         fprintf(f, "SDMA Dump Done.\n");
 870 }
 871
 872 static bool si_vm_fault_occured(struct si_context *sctx, uint64_t *out_addr)
 873 {
 874         char line[2000];
 875         unsigned sec, usec;
 876         int progress = 0;
 877         uint64_t timestamp = 0;
 878         bool fault = false;
 879
 880         FILE *p = popen("dmesg", "r");
 881         if (!p)
 882                 return false;
 883
 884         while (fgets(line, sizeof(line), p)) {
 885                 char *msg, len;
 886
 887                 if (!line[0] || line[0] == '\n')
 888                         continue;
 889
 890                 /* Get the timestamp. */
 891                 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
 892                         static bool hit = false;
 893                         if (!hit) {
 894                                 fprintf(stderr, "%s: failed to parse line '%s'\n",
 895                                         __func__, line);
 896                                 hit = true;
 897                         }
 898                         continue;
 899                 }
 900                 timestamp = sec * 1000000ull + usec;
 901
 902                 /* If just updating the timestamp. */
 903                 if (!out_addr)
 904                         continue;
 905
 906                 /* Process messages only if the timestamp is newer. */
 907                 if (timestamp <= sctx->dmesg_timestamp)
 908                         continue;
 909
 910                 /* Only process the first VM fault. */
 911                 if (fault)
 912                         continue;
 913
 914                 /* Remove trailing \n */
 915                 len = strlen(line);
 916                 if (len && line[len-1] == '\n')
 917                         line[len-1] = 0;
 918
 919                 /* Get the message part. */
 920                 msg = strchr(line, ']');
 921                 if (!msg) {
 922                         assert(0);
 923                         continue;
 924                 }
 925                 msg++;
 926
 927                 const char *header_line, *addr_line_prefix, *addr_line_format;
 928
 929                 if (sctx->b.chip_class >= GFX9) {
 930                         /* Match this:
 931                          * ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0)
 932                          * ..:   at page 0x0000000219f8f000 from 27
 933                          * ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C
 934                          */
 935                         header_line = "VMC page fault";
 936                         addr_line_prefix = "   at page";
 937                         addr_line_format = "%"PRIx64;
 938                 } else {
 939                         header_line = "GPU fault detected:";
 940                         addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR";
 941                         addr_line_format = "%"PRIX64;
 942                 }
 943
 944                 switch (progress) {
 945                 case 0:
 946                         if (strstr(msg, header_line))
 947                                 progress = 1;
 948                         break;
 949                 case 1:
 950                         msg = strstr(msg, addr_line_prefix);
 951                         if (msg) {
 952                                 msg = strstr(msg, "0x");
 953                                 if (msg) {
 954                                         msg += 2;
 955                                         if (sscanf(msg, addr_line_format, out_addr) == 1)
 956                                                 fault = true;
 957                                 }
 958                         }
 959                         progress = 0;
 960                         break;
 961                 default:
 962                         progress = 0;
 963                 }
 964         }
 965         pclose(p);
 966
 967         if (timestamp > sctx->dmesg_timestamp)
 968                 sctx->dmesg_timestamp = timestamp;
 969         return fault;
 970 }
 971
 972 void si_check_vm_faults(struct r600_common_context *ctx,
 973                         struct radeon_saved_cs *saved, enum ring_type ring)
 974 {
 975         struct si_context *sctx = (struct si_context *)ctx;
 976         struct pipe_screen *screen = sctx->b.b.screen;
 977         FILE *f;
 978         uint64_t addr;
 979         char cmd_line[4096];
 980
 981         if (!si_vm_fault_occured(sctx, &addr))
 982                 return;
 983
 984         f = dd_get_debug_file(false);
 985         if (!f)
 986                 return;
 987
 988         fprintf(f, "VM fault report.\n\n");
 989         if (os_get_command_line(cmd_line, sizeof(cmd_line)))
 990                 fprintf(f, "Command: %s\n", cmd_line);
 991         fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
 992         fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
 993         fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
 994         fprintf(f, "Failing VM page: 0x%08"PRIx64"\n\n", addr);
 995
 996         if (sctx->apitrace_call_number)
 997                 fprintf(f, "Last apitrace call: %u\n\n",
 998                         sctx->apitrace_call_number);
 999
1000         switch (ring) {
1001         case RING_GFX:
1002                 si_dump_debug_state(&sctx->b.b, f,
1003                                     PIPE_DUMP_CURRENT_STATES |
1004                                     PIPE_DUMP_CURRENT_SHADERS |
1005                                     PIPE_DUMP_LAST_COMMAND_BUFFER);
1006                 break;
1007
1008         case RING_DMA:
1009                 si_dump_dma(sctx, saved, f);
1010                 break;
1011
1012         default:
1013                 break;
1014         }
1015
1016         fclose(f);
1017
1018         fprintf(stderr, "Detected a VM fault, exiting...\n");
1019         exit(0);
1020 }
1021
1022 void si_init_debug_functions(struct si_context *sctx)
1023 {
1024         sctx->b.b.dump_debug_state = si_dump_debug_state;
1025         sctx->b.check_vm_faults = si_check_vm_faults;
1026
1027         /* Set the initial dmesg timestamp for this context, so that
1028          * only new messages will be checked for VM faults.
1029          */
1030         if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
1031                 si_vm_fault_occured(sctx, NULL);
1032 }