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radeonsi: remove the DRAW_PREAMBLE packet
[mesa.git] / src / gallium / drivers / radeonsi / si_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Marek Olšák <maraeo@gmail.com>
25 */
26
27 #include "si_pipe.h"
28 #include "si_shader.h"
29 #include "sid.h"
30 #include "sid_tables.h"
31 #include "radeon/radeon_elf_util.h"
32 #include "ddebug/dd_util.h"
33 #include "util/u_memory.h"
34
35 DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
36
37 static void si_dump_shader(struct si_screen *sscreen,
38 struct si_shader_ctx_state *state, FILE *f)
39 {
40 if (!state->cso || !state->current)
41 return;
42
43 si_dump_shader_key(state->cso->type, &state->current->key, f);
44 si_shader_dump(sscreen, state->current, NULL,
45 state->cso->info.processor, f);
46 }
47
48 /**
49 * Shader compiles can be overridden with arbitrary ELF objects by setting
50 * the environment variable RADEON_REPLACE_SHADERS=num1:filename1[;num2:filename2]
51 */
52 bool si_replace_shader(unsigned num, struct radeon_shader_binary *binary)
53 {
54 const char *p = debug_get_option_replace_shaders();
55 const char *semicolon;
56 char *copy = NULL;
57 FILE *f;
58 long filesize, nread;
59 char *buf = NULL;
60 bool replaced = false;
61
62 if (!p)
63 return false;
64
65 while (*p) {
66 unsigned long i;
67 char *endp;
68 i = strtoul(p, &endp, 0);
69
70 p = endp;
71 if (*p != ':') {
72 fprintf(stderr, "RADEON_REPLACE_SHADERS formatted badly.\n");
73 exit(1);
74 }
75 ++p;
76
77 if (i == num)
78 break;
79
80 p = strchr(p, ';');
81 if (!p)
82 return false;
83 ++p;
84 }
85 if (!*p)
86 return false;
87
88 semicolon = strchr(p, ';');
89 if (semicolon) {
90 p = copy = strndup(p, semicolon - p);
91 if (!copy) {
92 fprintf(stderr, "out of memory\n");
93 return false;
94 }
95 }
96
97 fprintf(stderr, "radeonsi: replace shader %u by %s\n", num, p);
98
99 f = fopen(p, "r");
100 if (!f) {
101 perror("radeonsi: failed to open file");
102 goto out_free;
103 }
104
105 if (fseek(f, 0, SEEK_END) != 0)
106 goto file_error;
107
108 filesize = ftell(f);
109 if (filesize < 0)
110 goto file_error;
111
112 if (fseek(f, 0, SEEK_SET) != 0)
113 goto file_error;
114
115 buf = MALLOC(filesize);
116 if (!buf) {
117 fprintf(stderr, "out of memory\n");
118 goto out_close;
119 }
120
121 nread = fread(buf, 1, filesize, f);
122 if (nread != filesize)
123 goto file_error;
124
125 radeon_elf_read(buf, filesize, binary);
126 replaced = true;
127
128 out_close:
129 fclose(f);
130 out_free:
131 FREE(buf);
132 free(copy);
133 return replaced;
134
135 file_error:
136 perror("radeonsi: reading shader");
137 goto out_close;
138 }
139
140 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
141 * read them, or use "aha -b -f file" to convert them to html.
142 */
143 #define COLOR_RESET "\033[0m"
144 #define COLOR_RED "\033[31m"
145 #define COLOR_GREEN "\033[1;32m"
146 #define COLOR_YELLOW "\033[1;33m"
147 #define COLOR_CYAN "\033[1;36m"
148
149 #define INDENT_PKT 8
150
151 static void print_spaces(FILE *f, unsigned num)
152 {
153 fprintf(f, "%*s", num, "");
154 }
155
156 static void print_value(FILE *file, uint32_t value, int bits)
157 {
158 /* Guess if it's int or float */
159 if (value <= (1 << 15)) {
160 if (value <= 9)
161 fprintf(file, "%u\n", value);
162 else
163 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
164 } else {
165 float f = uif(value);
166
167 if (fabs(f) < 100000 && f*10 == floor(f*10))
168 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
169 else
170 /* Don't print more leading zeros than there are bits. */
171 fprintf(file, "0x%0*x\n", bits / 4, value);
172 }
173 }
174
175 static void print_named_value(FILE *file, const char *name, uint32_t value,
176 int bits)
177 {
178 print_spaces(file, INDENT_PKT);
179 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
180 print_value(file, value, bits);
181 }
182
183 static void si_dump_reg(FILE *file, unsigned offset, uint32_t value,
184 uint32_t field_mask)
185 {
186 int r, f;
187
188 for (r = 0; r < ARRAY_SIZE(sid_reg_table); r++) {
189 const struct si_reg *reg = &sid_reg_table[r];
190 const char *reg_name = sid_strings + reg->name_offset;
191
192 if (reg->offset == offset) {
193 bool first_field = true;
194
195 print_spaces(file, INDENT_PKT);
196 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
197 reg_name);
198
199 if (!reg->num_fields) {
200 print_value(file, value, 32);
201 return;
202 }
203
204 for (f = 0; f < reg->num_fields; f++) {
205 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
206 const int *values_offsets = sid_strings_offsets + field->values_offset;
207 uint32_t val = (value & field->mask) >>
208 (ffs(field->mask) - 1);
209
210 if (!(field->mask & field_mask))
211 continue;
212
213 /* Indent the field. */
214 if (!first_field)
215 print_spaces(file,
216 INDENT_PKT + strlen(reg_name) + 4);
217
218 /* Print the field. */
219 fprintf(file, "%s = ", sid_strings + field->name_offset);
220
221 if (val < field->num_values && values_offsets[val] >= 0)
222 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
223 else
224 print_value(file, val,
225 util_bitcount(field->mask));
226
227 first_field = false;
228 }
229 return;
230 }
231 }
232
233 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " = 0x%08x", offset, value);
234 }
235
236 static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count,
237 unsigned reg_offset)
238 {
239 unsigned reg = (ib[1] << 2) + reg_offset;
240 int i;
241
242 for (i = 0; i < count; i++)
243 si_dump_reg(f, reg + i*4, ib[2+i], ~0);
244 }
245
246 static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
247 int trace_id)
248 {
249 unsigned count = PKT_COUNT_G(ib[0]);
250 unsigned op = PKT3_IT_OPCODE_G(ib[0]);
251 const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : "";
252 int i;
253
254 /* Print the name first. */
255 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
256 if (packet3_table[i].op == op)
257 break;
258
259 if (i < ARRAY_SIZE(packet3_table)) {
260 const char *name = sid_strings + packet3_table[i].name_offset;
261
262 if (op == PKT3_SET_CONTEXT_REG ||
263 op == PKT3_SET_CONFIG_REG ||
264 op == PKT3_SET_UCONFIG_REG ||
265 op == PKT3_SET_SH_REG)
266 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
267 name, predicate);
268 else
269 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
270 name, predicate);
271 } else
272 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
273 op, predicate);
274
275 /* Print the contents. */
276 switch (op) {
277 case PKT3_SET_CONTEXT_REG:
278 si_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET);
279 break;
280 case PKT3_SET_CONFIG_REG:
281 si_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET);
282 break;
283 case PKT3_SET_UCONFIG_REG:
284 si_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET);
285 break;
286 case PKT3_SET_SH_REG:
287 si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET);
288 break;
289 case PKT3_ACQUIRE_MEM:
290 si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
291 si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
292 si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0);
293 si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0);
294 si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0);
295 print_named_value(f, "POLL_INTERVAL", ib[6], 16);
296 break;
297 case PKT3_SURFACE_SYNC:
298 si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
299 si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
300 si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
301 print_named_value(f, "POLL_INTERVAL", ib[4], 16);
302 break;
303 case PKT3_EVENT_WRITE:
304 si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
305 S_028A90_EVENT_TYPE(~0));
306 print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
307 print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1);
308 if (count > 0) {
309 print_named_value(f, "ADDRESS_LO", ib[2], 32);
310 print_named_value(f, "ADDRESS_HI", ib[3], 16);
311 }
312 break;
313 case PKT3_DRAW_INDEX_AUTO:
314 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0);
315 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0);
316 break;
317 case PKT3_DRAW_INDEX_2:
318 si_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0);
319 si_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0);
320 si_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0);
321 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0);
322 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0);
323 break;
324 case PKT3_INDEX_TYPE:
325 si_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0);
326 break;
327 case PKT3_NUM_INSTANCES:
328 si_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0);
329 break;
330 case PKT3_WRITE_DATA:
331 si_dump_reg(f, R_370_CONTROL, ib[1], ~0);
332 si_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0);
333 si_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0);
334 for (i = 2; i < count; i++) {
335 print_spaces(f, INDENT_PKT);
336 fprintf(f, "0x%08x\n", ib[2+i]);
337 }
338 break;
339 case PKT3_CP_DMA:
340 si_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0);
341 si_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0);
342 si_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0);
343 si_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0);
344 si_dump_reg(f, R_414_COMMAND, ib[5], ~0);
345 break;
346 case PKT3_DMA_DATA:
347 si_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0);
348 si_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0);
349 si_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0);
350 si_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0);
351 si_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0);
352 si_dump_reg(f, R_414_COMMAND, ib[6], ~0);
353 break;
354 case PKT3_INDIRECT_BUFFER_SI:
355 case PKT3_INDIRECT_BUFFER_CONST:
356 case PKT3_INDIRECT_BUFFER_CIK:
357 si_dump_reg(f, R_3F0_IB_BASE_LO, ib[1], ~0);
358 si_dump_reg(f, R_3F1_IB_BASE_HI, ib[2], ~0);
359 si_dump_reg(f, R_3F2_CONTROL, ib[3], ~0);
360 break;
361 case PKT3_NOP:
362 if (ib[0] == 0xffff1000) {
363 count = -1; /* One dword NOP. */
364 break;
365 } else if (count == 0 && SI_IS_TRACE_POINT(ib[1])) {
366 unsigned packet_id = SI_GET_TRACE_POINT_ID(ib[1]);
367
368 print_spaces(f, INDENT_PKT);
369 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
370
371 if (trace_id == -1)
372 break; /* tracing was disabled */
373
374 print_spaces(f, INDENT_PKT);
375 if (packet_id < trace_id)
376 fprintf(f, COLOR_RED
377 "This trace point was reached by the CP."
378 COLOR_RESET "\n");
379 else if (packet_id == trace_id)
380 fprintf(f, COLOR_RED
381 "!!!!! This is the last trace point that "
382 "was reached by the CP !!!!!"
383 COLOR_RESET "\n");
384 else if (packet_id+1 == trace_id)
385 fprintf(f, COLOR_RED
386 "!!!!! This is the first trace point that "
387 "was NOT been reached by the CP !!!!!"
388 COLOR_RESET "\n");
389 else
390 fprintf(f, COLOR_RED
391 "!!!!! This trace point was NOT reached "
392 "by the CP !!!!!"
393 COLOR_RESET "\n");
394 break;
395 }
396 /* fall through, print all dwords */
397 default:
398 for (i = 0; i < count+1; i++) {
399 print_spaces(f, INDENT_PKT);
400 fprintf(f, "0x%08x\n", ib[1+i]);
401 }
402 }
403
404 ib += count + 2;
405 *num_dw -= count + 2;
406 return ib;
407 }
408
409 /**
410 * Parse and print an IB into a file.
411 *
412 * \param f file
413 * \param ib IB
414 * \param num_dw size of the IB
415 * \param chip_class chip class
416 * \param trace_id the last trace ID that is known to have been reached
417 * and executed by the CP, typically read from a buffer
418 */
419 static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
420 const char *name)
421 {
422 fprintf(f, "------------------ %s begin ------------------\n", name);
423
424 while (num_dw > 0) {
425 unsigned type = PKT_TYPE_G(ib[0]);
426
427 switch (type) {
428 case 3:
429 ib = si_parse_packet3(f, ib, &num_dw, trace_id);
430 break;
431 case 2:
432 /* type-2 nop */
433 if (ib[0] == 0x80000000) {
434 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
435 ib++;
436 break;
437 }
438 /* fall through */
439 default:
440 fprintf(f, "Unknown packet type %i\n", type);
441 return;
442 }
443 }
444
445 fprintf(f, "------------------- %s end -------------------\n", name);
446 if (num_dw < 0) {
447 printf("Packet ends after the end of IB.\n");
448 exit(0);
449 }
450 fprintf(f, "\n");
451 }
452
453 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
454 unsigned offset)
455 {
456 struct radeon_winsys *ws = sctx->b.ws;
457 uint32_t value;
458
459 if (ws->read_registers(ws, offset, 1, &value))
460 si_dump_reg(f, offset, value, ~0);
461 }
462
463 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
464 {
465 if (sctx->screen->b.info.drm_major == 2 &&
466 sctx->screen->b.info.drm_minor < 42)
467 return; /* no radeon support */
468
469 fprintf(f, "Memory-mapped registers:\n");
470 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
471
472 /* No other registers can be read on DRM < 3.1.0. */
473 if (sctx->screen->b.info.drm_major < 3 ||
474 sctx->screen->b.info.drm_minor < 1) {
475 fprintf(f, "\n");
476 return;
477 }
478
479 si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
480 si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
481 si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
482 si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
483 si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
484 si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
485 si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
486 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
487 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
488 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
489 si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
490 si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
491 si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
492 si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
493 si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
494 si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
495 si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
496 si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
497 si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
498 si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
499 fprintf(f, "\n");
500 }
501
502 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
503 {
504 int last_trace_id = -1;
505
506 if (!sctx->last_gfx.ib)
507 return;
508
509 if (sctx->last_trace_buf) {
510 /* We are expecting that the ddebug pipe has already
511 * waited for the context, so this buffer should be idle.
512 * If the GPU is hung, there is no point in waiting for it.
513 */
514 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
515 NULL,
516 PIPE_TRANSFER_UNSYNCHRONIZED |
517 PIPE_TRANSFER_READ);
518 if (map)
519 last_trace_id = *map;
520 }
521
522 if (sctx->init_config)
523 si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
524 -1, "IB2: Init config");
525
526 if (sctx->init_config_gs_rings)
527 si_parse_ib(f, sctx->init_config_gs_rings->pm4,
528 sctx->init_config_gs_rings->ndw,
529 -1, "IB2: Init GS rings");
530
531 si_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw,
532 last_trace_id, "IB");
533 }
534
535 static const char *priority_to_string(enum radeon_bo_priority priority)
536 {
537 #define ITEM(x) [RADEON_PRIO_##x] = #x
538 static const char *table[64] = {
539 ITEM(FENCE),
540 ITEM(TRACE),
541 ITEM(SO_FILLED_SIZE),
542 ITEM(QUERY),
543 ITEM(IB1),
544 ITEM(IB2),
545 ITEM(DRAW_INDIRECT),
546 ITEM(INDEX_BUFFER),
547 ITEM(CP_DMA),
548 ITEM(VCE),
549 ITEM(UVD),
550 ITEM(SDMA_BUFFER),
551 ITEM(SDMA_TEXTURE),
552 ITEM(USER_SHADER),
553 ITEM(INTERNAL_SHADER),
554 ITEM(CONST_BUFFER),
555 ITEM(DESCRIPTORS),
556 ITEM(BORDER_COLORS),
557 ITEM(SAMPLER_BUFFER),
558 ITEM(VERTEX_BUFFER),
559 ITEM(SHADER_RW_BUFFER),
560 ITEM(RINGS_STREAMOUT),
561 ITEM(SCRATCH_BUFFER),
562 ITEM(COMPUTE_GLOBAL),
563 ITEM(SAMPLER_TEXTURE),
564 ITEM(SHADER_RW_IMAGE),
565 ITEM(SAMPLER_TEXTURE_MSAA),
566 ITEM(COLOR_BUFFER),
567 ITEM(DEPTH_BUFFER),
568 ITEM(COLOR_BUFFER_MSAA),
569 ITEM(DEPTH_BUFFER_MSAA),
570 ITEM(CMASK),
571 ITEM(DCC),
572 ITEM(HTILE),
573 };
574 #undef ITEM
575
576 assert(priority < ARRAY_SIZE(table));
577 return table[priority];
578 }
579
580 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
581 const struct radeon_bo_list_item *b)
582 {
583 return a->vm_address < b->vm_address ? -1 :
584 a->vm_address > b->vm_address ? 1 : 0;
585 }
586
587 static void si_dump_bo_list(struct si_context *sctx,
588 const struct radeon_saved_cs *saved, FILE *f)
589 {
590 unsigned i,j;
591
592 if (!saved->bo_list)
593 return;
594
595 /* Sort the list according to VM adddresses first. */
596 qsort(saved->bo_list, saved->bo_count,
597 sizeof(saved->bo_list[0]), (void*)bo_list_compare_va);
598
599 fprintf(f, "Buffer list (in units of pages = 4kB):\n"
600 COLOR_YELLOW " Size VM start page "
601 "VM end page Usage" COLOR_RESET "\n");
602
603 for (i = 0; i < saved->bo_count; i++) {
604 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
605 const unsigned page_size = sctx->b.screen->info.gart_page_size;
606 uint64_t va = saved->bo_list[i].vm_address;
607 uint64_t size = saved->bo_list[i].bo_size;
608 bool hit = false;
609
610 /* If there's unused virtual memory between 2 buffers, print it. */
611 if (i) {
612 uint64_t previous_va_end = saved->bo_list[i-1].vm_address +
613 saved->bo_list[i-1].bo_size;
614
615 if (va > previous_va_end) {
616 fprintf(f, " %10"PRIu64" -- hole --\n",
617 (va - previous_va_end) / page_size);
618 }
619 }
620
621 /* Print the buffer. */
622 fprintf(f, " %10"PRIu64" 0x%013"PRIx64" 0x%013"PRIx64" ",
623 size / page_size, va / page_size, (va + size) / page_size);
624
625 /* Print the usage. */
626 for (j = 0; j < 64; j++) {
627 if (!(saved->bo_list[i].priority_usage & (1llu << j)))
628 continue;
629
630 fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
631 hit = true;
632 }
633 fprintf(f, "\n");
634 }
635 fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
636 " Other buffers can still be allocated there.\n\n");
637 }
638
639 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
640 {
641 struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
642 struct r600_texture *rtex;
643 int i;
644
645 for (i = 0; i < state->nr_cbufs; i++) {
646 if (!state->cbufs[i])
647 continue;
648
649 rtex = (struct r600_texture*)state->cbufs[i]->texture;
650 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
651 r600_print_texture_info(rtex, f);
652 fprintf(f, "\n");
653 }
654
655 if (state->zsbuf) {
656 rtex = (struct r600_texture*)state->zsbuf->texture;
657 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
658 r600_print_texture_info(rtex, f);
659 fprintf(f, "\n");
660 }
661 }
662
663 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
664 unsigned flags)
665 {
666 struct si_context *sctx = (struct si_context*)ctx;
667
668 if (flags & PIPE_DEBUG_DEVICE_IS_HUNG)
669 si_dump_debug_registers(sctx, f);
670
671 si_dump_framebuffer(sctx, f);
672 si_dump_shader(sctx->screen, &sctx->vs_shader, f);
673 si_dump_shader(sctx->screen, &sctx->tcs_shader, f);
674 si_dump_shader(sctx->screen, &sctx->tes_shader, f);
675 si_dump_shader(sctx->screen, &sctx->gs_shader, f);
676 si_dump_shader(sctx->screen, &sctx->ps_shader, f);
677
678 si_dump_bo_list(sctx, &sctx->last_gfx, f);
679 si_dump_last_ib(sctx, f);
680
681 fprintf(f, "Done.\n");
682
683 /* dump only once */
684 radeon_clear_saved_cs(&sctx->last_gfx);
685 r600_resource_reference(&sctx->last_trace_buf, NULL);
686 }
687
688 static void si_dump_dma(struct si_context *sctx,
689 struct radeon_saved_cs *saved, FILE *f)
690 {
691 static const char ib_name[] = "sDMA IB";
692 unsigned i;
693
694 si_dump_bo_list(sctx, saved, f);
695
696 fprintf(f, "------------------ %s begin ------------------\n", ib_name);
697
698 for (i = 0; i < saved->num_dw; ++i) {
699 fprintf(f, " %08x\n", saved->ib[i]);
700 }
701
702 fprintf(f, "------------------- %s end -------------------\n", ib_name);
703 fprintf(f, "\n");
704
705 fprintf(f, "SDMA Dump Done.\n");
706 }
707
708 static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr)
709 {
710 char line[2000];
711 unsigned sec, usec;
712 int progress = 0;
713 uint64_t timestamp = 0;
714 bool fault = false;
715
716 FILE *p = popen("dmesg", "r");
717 if (!p)
718 return false;
719
720 while (fgets(line, sizeof(line), p)) {
721 char *msg, len;
722
723 if (!line[0] || line[0] == '\n')
724 continue;
725
726 /* Get the timestamp. */
727 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
728 static bool hit = false;
729 if (!hit) {
730 fprintf(stderr, "%s: failed to parse line '%s'\n",
731 __func__, line);
732 hit = true;
733 }
734 continue;
735 }
736 timestamp = sec * 1000000llu + usec;
737
738 /* If just updating the timestamp. */
739 if (!out_addr)
740 continue;
741
742 /* Process messages only if the timestamp is newer. */
743 if (timestamp <= sctx->dmesg_timestamp)
744 continue;
745
746 /* Only process the first VM fault. */
747 if (fault)
748 continue;
749
750 /* Remove trailing \n */
751 len = strlen(line);
752 if (len && line[len-1] == '\n')
753 line[len-1] = 0;
754
755 /* Get the message part. */
756 msg = strchr(line, ']');
757 if (!msg) {
758 assert(0);
759 continue;
760 }
761 msg++;
762
763 switch (progress) {
764 case 0:
765 if (strstr(msg, "GPU fault detected:"))
766 progress = 1;
767 break;
768 case 1:
769 msg = strstr(msg, "VM_CONTEXT1_PROTECTION_FAULT_ADDR");
770 if (msg) {
771 msg = strstr(msg, "0x");
772 if (msg) {
773 msg += 2;
774 if (sscanf(msg, "%X", out_addr) == 1)
775 fault = true;
776 }
777 }
778 progress = 0;
779 break;
780 default:
781 progress = 0;
782 }
783 }
784 pclose(p);
785
786 if (timestamp > sctx->dmesg_timestamp)
787 sctx->dmesg_timestamp = timestamp;
788 return fault;
789 }
790
791 void si_check_vm_faults(struct r600_common_context *ctx,
792 struct radeon_saved_cs *saved, enum ring_type ring)
793 {
794 struct si_context *sctx = (struct si_context *)ctx;
795 struct pipe_screen *screen = sctx->b.b.screen;
796 FILE *f;
797 uint32_t addr;
798
799 if (!si_vm_fault_occured(sctx, &addr))
800 return;
801
802 f = dd_get_debug_file(false);
803 if (!f)
804 return;
805
806 fprintf(f, "VM fault report.\n\n");
807 fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
808 fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
809 fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
810 fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
811
812 if (sctx->apitrace_call_number)
813 fprintf(f, "Last apitrace call: %u\n\n",
814 sctx->apitrace_call_number);
815
816 switch (ring) {
817 case RING_GFX:
818 si_dump_debug_state(&sctx->b.b, f, 0);
819 break;
820
821 case RING_DMA:
822 si_dump_dma(sctx, saved, f);
823 break;
824
825 default:
826 break;
827 }
828
829 fclose(f);
830
831 fprintf(stderr, "Detected a VM fault, exiting...\n");
832 exit(0);
833 }
834
835 void si_init_debug_functions(struct si_context *sctx)
836 {
837 sctx->b.b.dump_debug_state = si_dump_debug_state;
838 sctx->b.check_vm_faults = si_check_vm_faults;
839
840 /* Set the initial dmesg timestamp for this context, so that
841 * only new messages will be checked for VM faults.
842 */
843 if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
844 si_vm_fault_occured(sctx, NULL);
845 }