src/gallium/drivers/radeonsi/si_debug.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Marek Olšák <maraeo@gmail.com>
  25  */
  26
  27 #include "si_pipe.h"
  28 #include "sid.h"
  29 #include "gfx9d.h"
  30 #include "sid_tables.h"
  31 #include "ddebug/dd_util.h"
  32 #include "util/u_memory.h"
  33 #include "ac_debug.h"
  34
  35 DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
  36
  37 static void si_dump_shader(struct si_screen *sscreen,
  38                            enum pipe_shader_type processor,
  39                            const struct si_shader *shader, FILE *f)
  40 {
  41         if (shader->shader_log)
  42                 fwrite(shader->shader_log, shader->shader_log_size, 1, f);
  43         else
  44                 si_shader_dump(sscreen, shader, NULL, processor, f, false);
  45 }
  46
  47 static void si_dump_gfx_shader(struct si_screen *sscreen,
  48                                const struct si_shader_ctx_state *state, FILE *f)
  49 {
  50         const struct si_shader *current = state->current;
  51
  52         if (!state->cso || !current)
  53                 return;
  54
  55         si_dump_shader(sscreen, state->cso->info.processor, current, f);
  56 }
  57
  58 /**
  59  * Shader compiles can be overridden with arbitrary ELF objects by setting
  60  * the environment variable RADEON_REPLACE_SHADERS=num1:filename1[;num2:filename2]
  61  */
  62 bool si_replace_shader(unsigned num, struct ac_shader_binary *binary)
  63 {
  64         const char *p = debug_get_option_replace_shaders();
  65         const char *semicolon;
  66         char *copy = NULL;
  67         FILE *f;
  68         long filesize, nread;
  69         char *buf = NULL;
  70         bool replaced = false;
  71
  72         if (!p)
  73                 return false;
  74
  75         while (*p) {
  76                 unsigned long i;
  77                 char *endp;
  78                 i = strtoul(p, &endp, 0);
  79
  80                 p = endp;
  81                 if (*p != ':') {
  82                         fprintf(stderr, "RADEON_REPLACE_SHADERS formatted badly.\n");
  83                         exit(1);
  84                 }
  85                 ++p;
  86
  87                 if (i == num)
  88                         break;
  89
  90                 p = strchr(p, ';');
  91                 if (!p)
  92                         return false;
  93                 ++p;
  94         }
  95         if (!*p)
  96                 return false;
  97
  98         semicolon = strchr(p, ';');
  99         if (semicolon) {
 100                 p = copy = strndup(p, semicolon - p);
 101                 if (!copy) {
 102                         fprintf(stderr, "out of memory\n");
 103                         return false;
 104                 }
 105         }
 106
 107         fprintf(stderr, "radeonsi: replace shader %u by %s\n", num, p);
 108
 109         f = fopen(p, "r");
 110         if (!f) {
 111                 perror("radeonsi: failed to open file");
 112                 goto out_free;
 113         }
 114
 115         if (fseek(f, 0, SEEK_END) != 0)
 116                 goto file_error;
 117
 118         filesize = ftell(f);
 119         if (filesize < 0)
 120                 goto file_error;
 121
 122         if (fseek(f, 0, SEEK_SET) != 0)
 123                 goto file_error;
 124
 125         buf = MALLOC(filesize);
 126         if (!buf) {
 127                 fprintf(stderr, "out of memory\n");
 128                 goto out_close;
 129         }
 130
 131         nread = fread(buf, 1, filesize, f);
 132         if (nread != filesize)
 133                 goto file_error;
 134
 135         ac_elf_read(buf, filesize, binary);
 136         replaced = true;
 137
 138 out_close:
 139         fclose(f);
 140 out_free:
 141         FREE(buf);
 142         free(copy);
 143         return replaced;
 144
 145 file_error:
 146         perror("radeonsi: reading shader");
 147         goto out_close;
 148 }
 149
 150 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
 151  * read them, or use "aha -b -f file" to convert them to html.
 152  */
 153 #define COLOR_RESET     "\033[0m"
 154 #define COLOR_RED       "\033[31m"
 155 #define COLOR_GREEN     "\033[1;32m"
 156 #define COLOR_YELLOW    "\033[1;33m"
 157 #define COLOR_CYAN      "\033[1;36m"
 158
 159 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
 160                                 unsigned offset)
 161 {
 162         struct radeon_winsys *ws = sctx->b.ws;
 163         uint32_t value;
 164
 165         if (ws->read_registers(ws, offset, 1, &value))
 166                 ac_dump_reg(f, offset, value, ~0);
 167 }
 168
 169 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
 170 {
 171         if (sctx->screen->b.info.drm_major == 2 &&
 172             sctx->screen->b.info.drm_minor < 42)
 173                 return; /* no radeon support */
 174
 175         fprintf(f, "Memory-mapped registers:\n");
 176         si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
 177
 178         /* No other registers can be read on DRM < 3.1.0. */
 179         if (sctx->screen->b.info.drm_major < 3 ||
 180             sctx->screen->b.info.drm_minor < 1) {
 181                 fprintf(f, "\n");
 182                 return;
 183         }
 184
 185         si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
 186         si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
 187         si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
 188         si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
 189         si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
 190         si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
 191         si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
 192         if (sctx->b.chip_class <= VI) {
 193                 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
 194                 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
 195                 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
 196         }
 197         si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
 198         si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
 199         si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
 200         si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
 201         si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
 202         si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
 203         si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
 204         si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
 205         si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
 206         si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
 207         fprintf(f, "\n");
 208 }
 209
 210 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
 211 {
 212         int last_trace_id = -1;
 213
 214         if (!sctx->last_gfx.ib)
 215                 return;
 216
 217         if (sctx->last_trace_buf) {
 218                 /* We are expecting that the ddebug pipe has already
 219                  * waited for the context, so this buffer should be idle.
 220                  * If the GPU is hung, there is no point in waiting for it.
 221                  */
 222                 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
 223                                                        NULL,
 224                                                        PIPE_TRANSFER_UNSYNCHRONIZED |
 225                                                        PIPE_TRANSFER_READ);
 226                 if (map)
 227                         last_trace_id = *map;
 228         }
 229
 230         if (sctx->init_config)
 231                 ac_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
 232                             -1, "IB2: Init config", sctx->b.chip_class,
 233                             NULL, NULL);
 234
 235         if (sctx->init_config_gs_rings)
 236                 ac_parse_ib(f, sctx->init_config_gs_rings->pm4,
 237                             sctx->init_config_gs_rings->ndw,
 238                             -1, "IB2: Init GS rings", sctx->b.chip_class,
 239                             NULL, NULL);
 240
 241         ac_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw,
 242                     last_trace_id, "IB", sctx->b.chip_class,
 243                      NULL, NULL);
 244 }
 245
 246 static const char *priority_to_string(enum radeon_bo_priority priority)
 247 {
 248 #define ITEM(x) [RADEON_PRIO_##x] = #x
 249         static const char *table[64] = {
 250                 ITEM(FENCE),
 251                 ITEM(TRACE),
 252                 ITEM(SO_FILLED_SIZE),
 253                 ITEM(QUERY),
 254                 ITEM(IB1),
 255                 ITEM(IB2),
 256                 ITEM(DRAW_INDIRECT),
 257                 ITEM(INDEX_BUFFER),
 258                 ITEM(VCE),
 259                 ITEM(UVD),
 260                 ITEM(SDMA_BUFFER),
 261                 ITEM(SDMA_TEXTURE),
 262                 ITEM(CP_DMA),
 263                 ITEM(CONST_BUFFER),
 264                 ITEM(DESCRIPTORS),
 265                 ITEM(BORDER_COLORS),
 266                 ITEM(SAMPLER_BUFFER),
 267                 ITEM(VERTEX_BUFFER),
 268                 ITEM(SHADER_RW_BUFFER),
 269                 ITEM(COMPUTE_GLOBAL),
 270                 ITEM(SAMPLER_TEXTURE),
 271                 ITEM(SHADER_RW_IMAGE),
 272                 ITEM(SAMPLER_TEXTURE_MSAA),
 273                 ITEM(COLOR_BUFFER),
 274                 ITEM(DEPTH_BUFFER),
 275                 ITEM(COLOR_BUFFER_MSAA),
 276                 ITEM(DEPTH_BUFFER_MSAA),
 277                 ITEM(CMASK),
 278                 ITEM(DCC),
 279                 ITEM(HTILE),
 280                 ITEM(SHADER_BINARY),
 281                 ITEM(SHADER_RINGS),
 282                 ITEM(SCRATCH_BUFFER),
 283         };
 284 #undef ITEM
 285
 286         assert(priority < ARRAY_SIZE(table));
 287         return table[priority];
 288 }
 289
 290 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
 291                                    const struct radeon_bo_list_item *b)
 292 {
 293         return a->vm_address < b->vm_address ? -1 :
 294                a->vm_address > b->vm_address ? 1 : 0;
 295 }
 296
 297 static void si_dump_bo_list(struct si_context *sctx,
 298                             const struct radeon_saved_cs *saved, FILE *f)
 299 {
 300         unsigned i,j;
 301
 302         if (!saved->bo_list)
 303                 return;
 304
 305         /* Sort the list according to VM adddresses first. */
 306         qsort(saved->bo_list, saved->bo_count,
 307               sizeof(saved->bo_list[0]), (void*)bo_list_compare_va);
 308
 309         fprintf(f, "Buffer list (in units of pages = 4kB):\n"
 310                 COLOR_YELLOW "        Size    VM start page         "
 311                 "VM end page           Usage" COLOR_RESET "\n");
 312
 313         for (i = 0; i < saved->bo_count; i++) {
 314                 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
 315                 const unsigned page_size = sctx->b.screen->info.gart_page_size;
 316                 uint64_t va = saved->bo_list[i].vm_address;
 317                 uint64_t size = saved->bo_list[i].bo_size;
 318                 bool hit = false;
 319
 320                 /* If there's unused virtual memory between 2 buffers, print it. */
 321                 if (i) {
 322                         uint64_t previous_va_end = saved->bo_list[i-1].vm_address +
 323                                                    saved->bo_list[i-1].bo_size;
 324
 325                         if (va > previous_va_end) {
 326                                 fprintf(f, "  %10"PRIu64"    -- hole --\n",
 327                                         (va - previous_va_end) / page_size);
 328                         }
 329                 }
 330
 331                 /* Print the buffer. */
 332                 fprintf(f, "  %10"PRIu64"    0x%013"PRIX64"       0x%013"PRIX64"       ",
 333                         size / page_size, va / page_size, (va + size) / page_size);
 334
 335                 /* Print the usage. */
 336                 for (j = 0; j < 64; j++) {
 337                         if (!(saved->bo_list[i].priority_usage & (1llu << j)))
 338                                 continue;
 339
 340                         fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
 341                         hit = true;
 342                 }
 343                 fprintf(f, "\n");
 344         }
 345         fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
 346                    "      Other buffers can still be allocated there.\n\n");
 347 }
 348
 349 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
 350 {
 351         struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
 352         struct r600_texture *rtex;
 353         int i;
 354
 355         for (i = 0; i < state->nr_cbufs; i++) {
 356                 if (!state->cbufs[i])
 357                         continue;
 358
 359                 rtex = (struct r600_texture*)state->cbufs[i]->texture;
 360                 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
 361                 r600_print_texture_info(sctx->b.screen, rtex, f);
 362                 fprintf(f, "\n");
 363         }
 364
 365         if (state->zsbuf) {
 366                 rtex = (struct r600_texture*)state->zsbuf->texture;
 367                 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
 368                 r600_print_texture_info(sctx->b.screen, rtex, f);
 369                 fprintf(f, "\n");
 370         }
 371 }
 372
 373 static void si_dump_descriptor_list(struct si_descriptors *desc,
 374                                     const char *shader_name,
 375                                     const char *elem_name,
 376                                     unsigned num_elements,
 377                                     FILE *f)
 378 {
 379         unsigned i, j;
 380         uint32_t *cpu_list = desc->list;
 381         uint32_t *gpu_list = desc->gpu_list;
 382         const char *list_note = "GPU list";
 383
 384         if (!gpu_list) {
 385                 gpu_list = cpu_list;
 386                 list_note = "CPU list";
 387         }
 388
 389         for (i = 0; i < num_elements; i++) {
 390                 fprintf(f, COLOR_GREEN "%s%s slot %u (%s):" COLOR_RESET "\n",
 391                         shader_name, elem_name, i, list_note);
 392
 393                 switch (desc->element_dw_size) {
 394                 case 4:
 395                         for (j = 0; j < 4; j++)
 396                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 397                                             gpu_list[j], 0xffffffff);
 398                         break;
 399                 case 8:
 400                         for (j = 0; j < 8; j++)
 401                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 402                                             gpu_list[j], 0xffffffff);
 403
 404                         fprintf(f, COLOR_CYAN "    Buffer:" COLOR_RESET "\n");
 405                         for (j = 0; j < 4; j++)
 406                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 407                                             gpu_list[4+j], 0xffffffff);
 408                         break;
 409                 case 16:
 410                         for (j = 0; j < 8; j++)
 411                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 412                                             gpu_list[j], 0xffffffff);
 413
 414                         fprintf(f, COLOR_CYAN "    Buffer:" COLOR_RESET "\n");
 415                         for (j = 0; j < 4; j++)
 416                                 ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4,
 417                                             gpu_list[4+j], 0xffffffff);
 418
 419                         fprintf(f, COLOR_CYAN "    FMASK:" COLOR_RESET "\n");
 420                         for (j = 0; j < 8; j++)
 421                                 ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
 422                                             gpu_list[8+j], 0xffffffff);
 423
 424                         fprintf(f, COLOR_CYAN "    Sampler state:" COLOR_RESET "\n");
 425                         for (j = 0; j < 4; j++)
 426                                 ac_dump_reg(f, R_008F30_SQ_IMG_SAMP_WORD0 + j*4,
 427                                             gpu_list[12+j], 0xffffffff);
 428                         break;
 429                 }
 430
 431                 if (memcmp(gpu_list, cpu_list, desc->element_dw_size * 4) != 0) {
 432                         fprintf(f, COLOR_RED "!!!!! This slot was corrupted in GPU memory !!!!!"
 433                                 COLOR_RESET "\n");
 434                 }
 435
 436                 fprintf(f, "\n");
 437                 gpu_list += desc->element_dw_size;
 438                 cpu_list += desc->element_dw_size;
 439         }
 440 }
 441
 442 static void si_dump_descriptors(struct si_context *sctx,
 443                                 struct si_shader_ctx_state *state,
 444                                 FILE *f)
 445 {
 446         if (!state->cso || !state->current)
 447                 return;
 448
 449         unsigned type = state->cso->type;
 450         const struct tgsi_shader_info *info = &state->cso->info;
 451         struct si_descriptors *descs =
 452                 &sctx->descriptors[SI_DESCS_FIRST_SHADER +
 453                                    type * SI_NUM_SHADER_DESCS];
 454         static const char *shader_name[] = {"VS", "PS", "GS", "TCS", "TES", "CS"};
 455
 456         static const char *elem_name[] = {
 457                 " - Constant buffer",
 458                 " - Shader buffer",
 459                 " - Sampler",
 460                 " - Image",
 461         };
 462         unsigned num_elements[] = {
 463                 util_last_bit(info->const_buffers_declared),
 464                 util_last_bit(info->shader_buffers_declared),
 465                 util_last_bit(info->samplers_declared),
 466                 util_last_bit(info->images_declared),
 467         };
 468
 469         if (type == PIPE_SHADER_VERTEX) {
 470                 si_dump_descriptor_list(&sctx->vertex_buffers, shader_name[type],
 471                                         " - Vertex buffer", info->num_inputs, f);
 472         }
 473
 474         for (unsigned i = 0; i < SI_NUM_SHADER_DESCS; ++i, ++descs)
 475                 si_dump_descriptor_list(descs, shader_name[type], elem_name[i],
 476                                         num_elements[i], f);
 477 }
 478
 479 struct si_shader_inst {
 480         char text[160];  /* one disasm line */
 481         unsigned offset; /* instruction offset */
 482         unsigned size;   /* instruction size = 4 or 8 */
 483 };
 484
 485 /* Split a disassembly string into lines and add them to the array pointed
 486  * to by "instructions". */
 487 static void si_add_split_disasm(const char *disasm,
 488                                 uint64_t start_addr,
 489                                 unsigned *num,
 490                                 struct si_shader_inst *instructions)
 491 {
 492         struct si_shader_inst *last_inst = *num ? &instructions[*num - 1] : NULL;
 493         char *next;
 494
 495         while ((next = strchr(disasm, '\n'))) {
 496                 struct si_shader_inst *inst = &instructions[*num];
 497                 unsigned len = next - disasm;
 498
 499                 assert(len < ARRAY_SIZE(inst->text));
 500                 memcpy(inst->text, disasm, len);
 501                 inst->text[len] = 0;
 502                 inst->offset = last_inst ? last_inst->offset + last_inst->size : 0;
 503
 504                 const char *semicolon = strchr(disasm, ';');
 505                 assert(semicolon);
 506                 /* More than 16 chars after ";" means the instruction is 8 bytes long. */
 507                 inst->size = next - semicolon > 16 ? 8 : 4;
 508
 509                 snprintf(inst->text + len, ARRAY_SIZE(inst->text) - len,
 510                         " [PC=0x%"PRIx64", off=%u, size=%u]",
 511                         start_addr + inst->offset, inst->offset, inst->size);
 512
 513                 last_inst = inst;
 514                 (*num)++;
 515                 disasm = next + 1;
 516         }
 517 }
 518
 519 #define MAX_WAVES_PER_CHIP (64 * 40)
 520
 521 struct si_wave_info {
 522         unsigned se; /* shader engine */
 523         unsigned sh; /* shader array */
 524         unsigned cu; /* compute unit */
 525         unsigned simd;
 526         unsigned wave;
 527         uint32_t status;
 528         uint64_t pc; /* program counter */
 529         uint32_t inst_dw0;
 530         uint32_t inst_dw1;
 531         uint64_t exec;
 532         bool matched; /* whether the wave is used by a currently-bound shader */
 533 };
 534
 535 static int compare_wave(const void *p1, const void *p2)
 536 {
 537         struct si_wave_info *w1 = (struct si_wave_info *)p1;
 538         struct si_wave_info *w2 = (struct si_wave_info *)p2;
 539
 540         /* Sort waves according to PC and then SE, SH, CU, etc. */
 541         if (w1->pc < w2->pc)
 542                 return -1;
 543         if (w1->pc > w2->pc)
 544                 return 1;
 545         if (w1->se < w2->se)
 546                 return -1;
 547         if (w1->se > w2->se)
 548                 return 1;
 549         if (w1->sh < w2->sh)
 550                 return -1;
 551         if (w1->sh > w2->sh)
 552                 return 1;
 553         if (w1->cu < w2->cu)
 554                 return -1;
 555         if (w1->cu > w2->cu)
 556                 return 1;
 557         if (w1->simd < w2->simd)
 558                 return -1;
 559         if (w1->simd > w2->simd)
 560                 return 1;
 561         if (w1->wave < w2->wave)
 562                 return -1;
 563         if (w1->wave > w2->wave)
 564                 return 1;
 565
 566         return 0;
 567 }
 568
 569 /* Return wave information. "waves" should be a large enough array. */
 570 static unsigned si_get_wave_info(struct si_wave_info waves[MAX_WAVES_PER_CHIP])
 571 {
 572         char line[2000];
 573         unsigned num_waves = 0;
 574
 575         FILE *p = popen("umr -wa", "r");
 576         if (!p)
 577                 return 0;
 578
 579         if (!fgets(line, sizeof(line), p) ||
 580             strncmp(line, "SE", 2) != 0) {
 581                 pclose(p);
 582                 return 0;
 583         }
 584
 585         while (fgets(line, sizeof(line), p)) {
 586                 struct si_wave_info *w;
 587                 uint32_t pc_hi, pc_lo, exec_hi, exec_lo;
 588
 589                 assert(num_waves < MAX_WAVES_PER_CHIP);
 590                 w = &waves[num_waves];
 591
 592                 if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x",
 593                            &w->se, &w->sh, &w->cu, &w->simd, &w->wave,
 594                            &w->status, &pc_hi, &pc_lo, &w->inst_dw0,
 595                            &w->inst_dw1, &exec_hi, &exec_lo) == 12) {
 596                         w->pc = ((uint64_t)pc_hi << 32) | pc_lo;
 597                         w->exec = ((uint64_t)exec_hi << 32) | exec_lo;
 598                         w->matched = false;
 599                         num_waves++;
 600                 }
 601         }
 602
 603         qsort(waves, num_waves, sizeof(struct si_wave_info), compare_wave);
 604
 605         pclose(p);
 606         return num_waves;
 607 }
 608
 609 /* If the shader is being executed, print its asm instructions, and annotate
 610  * those that are being executed right now with information about waves that
 611  * execute them. This is most useful during a GPU hang.
 612  */
 613 static void si_print_annotated_shader(struct si_shader *shader,
 614                                       struct si_wave_info *waves,
 615                                       unsigned num_waves,
 616                                       FILE *f)
 617 {
 618         if (!shader || !shader->binary.disasm_string)
 619                 return;
 620
 621         uint64_t start_addr = shader->bo->gpu_address;
 622         uint64_t end_addr = start_addr + shader->bo->b.b.width0;
 623         unsigned i;
 624
 625         /* See if any wave executes the shader. */
 626         for (i = 0; i < num_waves; i++) {
 627                 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
 628                         break;
 629         }
 630         if (i == num_waves)
 631                 return; /* the shader is not being executed */
 632
 633         /* Remember the first found wave. The waves are sorted according to PC. */
 634         waves = &waves[i];
 635         num_waves -= i;
 636
 637         /* Get the list of instructions.
 638          * Buffer size / 4 is the upper bound of the instruction count.
 639          */
 640         unsigned num_inst = 0;
 641         struct si_shader_inst *instructions =
 642                 calloc(shader->bo->b.b.width0 / 4, sizeof(struct si_shader_inst));
 643
 644         if (shader->prolog) {
 645                 si_add_split_disasm(shader->prolog->binary.disasm_string,
 646                                     start_addr, &num_inst, instructions);
 647         }
 648         if (shader->previous_stage) {
 649                 si_add_split_disasm(shader->previous_stage->binary.disasm_string,
 650                                     start_addr, &num_inst, instructions);
 651         }
 652         if (shader->prolog2) {
 653                 si_add_split_disasm(shader->prolog2->binary.disasm_string,
 654                                     start_addr, &num_inst, instructions);
 655         }
 656         si_add_split_disasm(shader->binary.disasm_string,
 657                             start_addr, &num_inst, instructions);
 658         if (shader->epilog) {
 659                 si_add_split_disasm(shader->epilog->binary.disasm_string,
 660                                     start_addr, &num_inst, instructions);
 661         }
 662
 663         fprintf(f, COLOR_YELLOW "%s - annotated disassembly:" COLOR_RESET "\n",
 664                 si_get_shader_name(shader, shader->selector->type));
 665
 666         /* Print instructions with annotations. */
 667         for (i = 0; i < num_inst; i++) {
 668                 struct si_shader_inst *inst = &instructions[i];
 669
 670                 fprintf(f, "%s\n", inst->text);
 671
 672                 /* Print which waves execute the instruction right now. */
 673                 while (num_waves && start_addr + inst->offset == waves->pc) {
 674                         fprintf(f,
 675                                 "          " COLOR_GREEN "^ SE%u SH%u CU%u "
 676                                 "SIMD%u WAVE%u  EXEC=%016"PRIx64 "  ",
 677                                 waves->se, waves->sh, waves->cu, waves->simd,
 678                                 waves->wave, waves->exec);
 679
 680                         if (inst->size == 4) {
 681                                 fprintf(f, "INST32=%08X" COLOR_RESET "\n",
 682                                         waves->inst_dw0);
 683                         } else {
 684                                 fprintf(f, "INST64=%08X %08X" COLOR_RESET "\n",
 685                                         waves->inst_dw0, waves->inst_dw1);
 686                         }
 687
 688                         waves->matched = true;
 689                         waves = &waves[1];
 690                         num_waves--;
 691                 }
 692         }
 693
 694         fprintf(f, "\n\n");
 695         free(instructions);
 696 }
 697
 698 static void si_dump_annotated_shaders(struct si_context *sctx, FILE *f)
 699 {
 700         struct si_wave_info waves[MAX_WAVES_PER_CHIP];
 701         unsigned num_waves = si_get_wave_info(waves);
 702
 703         fprintf(f, COLOR_CYAN "The number of active waves = %u" COLOR_RESET
 704                 "\n\n", num_waves);
 705
 706         si_print_annotated_shader(sctx->vs_shader.current, waves, num_waves, f);
 707         si_print_annotated_shader(sctx->tcs_shader.current, waves, num_waves, f);
 708         si_print_annotated_shader(sctx->tes_shader.current, waves, num_waves, f);
 709         si_print_annotated_shader(sctx->gs_shader.current, waves, num_waves, f);
 710         si_print_annotated_shader(sctx->ps_shader.current, waves, num_waves, f);
 711
 712         /* Print waves executing shaders that are not currently bound. */
 713         unsigned i;
 714         bool found = false;
 715         for (i = 0; i < num_waves; i++) {
 716                 if (waves[i].matched)
 717                         continue;
 718
 719                 if (!found) {
 720                         fprintf(f, COLOR_CYAN
 721                                 "Waves not executing currently-bound shaders:"
 722                                 COLOR_RESET "\n");
 723                         found = true;
 724                 }
 725                 fprintf(f, "    SE%u SH%u CU%u SIMD%u WAVE%u  EXEC=%016"PRIx64
 726                         "  INST=%08X %08X  PC=%"PRIx64"\n",
 727                         waves[i].se, waves[i].sh, waves[i].cu, waves[i].simd,
 728                         waves[i].wave, waves[i].exec, waves[i].inst_dw0,
 729                         waves[i].inst_dw1, waves[i].pc);
 730         }
 731         if (found)
 732                 fprintf(f, "\n\n");
 733 }
 734
 735 static void si_dump_command(const char *title, const char *command, FILE *f)
 736 {
 737         char line[2000];
 738
 739         FILE *p = popen(command, "r");
 740         if (!p)
 741                 return;
 742
 743         fprintf(f, COLOR_YELLOW "%s: " COLOR_RESET "\n", title);
 744         while (fgets(line, sizeof(line), p))
 745                 fputs(line, f);
 746         fprintf(f, "\n\n");
 747         pclose(p);
 748 }
 749
 750 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
 751                                 unsigned flags)
 752 {
 753         struct si_context *sctx = (struct si_context*)ctx;
 754
 755         if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS)
 756                 si_dump_debug_registers(sctx, f);
 757
 758         if (flags & PIPE_DUMP_CURRENT_STATES)
 759                 si_dump_framebuffer(sctx, f);
 760
 761         if (flags & PIPE_DUMP_CURRENT_SHADERS) {
 762                 si_dump_gfx_shader(sctx->screen, &sctx->vs_shader, f);
 763                 si_dump_gfx_shader(sctx->screen, &sctx->tcs_shader, f);
 764                 si_dump_gfx_shader(sctx->screen, &sctx->tes_shader, f);
 765                 si_dump_gfx_shader(sctx->screen, &sctx->gs_shader, f);
 766                 si_dump_gfx_shader(sctx->screen, &sctx->ps_shader, f);
 767
 768                 if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS) {
 769                         si_dump_annotated_shaders(sctx, f);
 770                         si_dump_command("Active waves (raw data)", "umr -wa | column -t", f);
 771                         si_dump_command("Wave information", "umr -O bits -wa", f);
 772                 }
 773
 774                 si_dump_descriptor_list(&sctx->descriptors[SI_DESCS_RW_BUFFERS],
 775                                         "", "RW buffers", SI_NUM_RW_BUFFERS, f);
 776                 si_dump_descriptors(sctx, &sctx->vs_shader, f);
 777                 si_dump_descriptors(sctx, &sctx->tcs_shader, f);
 778                 si_dump_descriptors(sctx, &sctx->tes_shader, f);
 779                 si_dump_descriptors(sctx, &sctx->gs_shader, f);
 780                 si_dump_descriptors(sctx, &sctx->ps_shader, f);
 781         }
 782
 783         if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {
 784                 si_dump_bo_list(sctx, &sctx->last_gfx, f);
 785                 si_dump_last_ib(sctx, f);
 786
 787                 fprintf(f, "Done.\n");
 788
 789                 /* dump only once */
 790                 radeon_clear_saved_cs(&sctx->last_gfx);
 791                 r600_resource_reference(&sctx->last_trace_buf, NULL);
 792         }
 793 }
 794
 795 static void si_dump_dma(struct si_context *sctx,
 796                         struct radeon_saved_cs *saved, FILE *f)
 797 {
 798         static const char ib_name[] = "sDMA IB";
 799         unsigned i;
 800
 801         si_dump_bo_list(sctx, saved, f);
 802
 803         fprintf(f, "------------------ %s begin ------------------\n", ib_name);
 804
 805         for (i = 0; i < saved->num_dw; ++i) {
 806                 fprintf(f, " %08x\n", saved->ib[i]);
 807         }
 808
 809         fprintf(f, "------------------- %s end -------------------\n", ib_name);
 810         fprintf(f, "\n");
 811
 812         fprintf(f, "SDMA Dump Done.\n");
 813 }
 814
 815 static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr)
 816 {
 817         char line[2000];
 818         unsigned sec, usec;
 819         int progress = 0;
 820         uint64_t timestamp = 0;
 821         bool fault = false;
 822
 823         FILE *p = popen("dmesg", "r");
 824         if (!p)
 825                 return false;
 826
 827         while (fgets(line, sizeof(line), p)) {
 828                 char *msg, len;
 829
 830                 if (!line[0] || line[0] == '\n')
 831                         continue;
 832
 833                 /* Get the timestamp. */
 834                 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
 835                         static bool hit = false;
 836                         if (!hit) {
 837                                 fprintf(stderr, "%s: failed to parse line '%s'\n",
 838                                         __func__, line);
 839                                 hit = true;
 840                         }
 841                         continue;
 842                 }
 843                 timestamp = sec * 1000000llu + usec;
 844
 845                 /* If just updating the timestamp. */
 846                 if (!out_addr)
 847                         continue;
 848
 849                 /* Process messages only if the timestamp is newer. */
 850                 if (timestamp <= sctx->dmesg_timestamp)
 851                         continue;
 852
 853                 /* Only process the first VM fault. */
 854                 if (fault)
 855                         continue;
 856
 857                 /* Remove trailing \n */
 858                 len = strlen(line);
 859                 if (len && line[len-1] == '\n')
 860                         line[len-1] = 0;
 861
 862                 /* Get the message part. */
 863                 msg = strchr(line, ']');
 864                 if (!msg) {
 865                         assert(0);
 866                         continue;
 867                 }
 868                 msg++;
 869
 870                 switch (progress) {
 871                 case 0:
 872                         if (strstr(msg, "GPU fault detected:"))
 873                                 progress = 1;
 874                         break;
 875                 case 1:
 876                         msg = strstr(msg, "VM_CONTEXT1_PROTECTION_FAULT_ADDR");
 877                         if (msg) {
 878                                 msg = strstr(msg, "0x");
 879                                 if (msg) {
 880                                         msg += 2;
 881                                         if (sscanf(msg, "%X", out_addr) == 1)
 882                                                 fault = true;
 883                                 }
 884                         }
 885                         progress = 0;
 886                         break;
 887                 default:
 888                         progress = 0;
 889                 }
 890         }
 891         pclose(p);
 892
 893         if (timestamp > sctx->dmesg_timestamp)
 894                 sctx->dmesg_timestamp = timestamp;
 895         return fault;
 896 }
 897
 898 void si_check_vm_faults(struct r600_common_context *ctx,
 899                         struct radeon_saved_cs *saved, enum ring_type ring)
 900 {
 901         struct si_context *sctx = (struct si_context *)ctx;
 902         struct pipe_screen *screen = sctx->b.b.screen;
 903         FILE *f;
 904         uint32_t addr;
 905         char cmd_line[4096];
 906
 907         if (!si_vm_fault_occured(sctx, &addr))
 908                 return;
 909
 910         f = dd_get_debug_file(false);
 911         if (!f)
 912                 return;
 913
 914         fprintf(f, "VM fault report.\n\n");
 915         if (os_get_command_line(cmd_line, sizeof(cmd_line)))
 916                 fprintf(f, "Command: %s\n", cmd_line);
 917         fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
 918         fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
 919         fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
 920         fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
 921
 922         if (sctx->apitrace_call_number)
 923                 fprintf(f, "Last apitrace call: %u\n\n",
 924                         sctx->apitrace_call_number);
 925
 926         switch (ring) {
 927         case RING_GFX:
 928                 si_dump_debug_state(&sctx->b.b, f,
 929                                     PIPE_DUMP_CURRENT_STATES |
 930                                     PIPE_DUMP_CURRENT_SHADERS |
 931                                     PIPE_DUMP_LAST_COMMAND_BUFFER);
 932                 break;
 933
 934         case RING_DMA:
 935                 si_dump_dma(sctx, saved, f);
 936                 break;
 937
 938         default:
 939                 break;
 940         }
 941
 942         fclose(f);
 943
 944         fprintf(stderr, "Detected a VM fault, exiting...\n");
 945         exit(0);
 946 }
 947
 948 void si_init_debug_functions(struct si_context *sctx)
 949 {
 950         sctx->b.b.dump_debug_state = si_dump_debug_state;
 951         sctx->b.check_vm_faults = si_check_vm_faults;
 952
 953         /* Set the initial dmesg timestamp for this context, so that
 954          * only new messages will be checked for VM faults.
 955          */
 956         if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
 957                 si_vm_fault_occured(sctx, NULL);
 958 }