radeonsi: move the shader key dumping to si_shader_dump
[mesa.git] / src / gallium / drivers / radeonsi / si_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Marek Olšák <maraeo@gmail.com>
25 */
26
27 #include "si_pipe.h"
28 #include "si_shader.h"
29 #include "sid.h"
30 #include "sid_tables.h"
31 #include "radeon/radeon_elf_util.h"
32 #include "ddebug/dd_util.h"
33 #include "util/u_memory.h"
34
35 DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
36
37 static void si_dump_shader(struct si_screen *sscreen,
38 struct si_shader_ctx_state *state, FILE *f)
39 {
40 if (!state->cso || !state->current)
41 return;
42
43 si_shader_dump(sscreen, state->current, NULL,
44 state->cso->info.processor, f);
45 }
46
47 /**
48 * Shader compiles can be overridden with arbitrary ELF objects by setting
49 * the environment variable RADEON_REPLACE_SHADERS=num1:filename1[;num2:filename2]
50 */
51 bool si_replace_shader(unsigned num, struct radeon_shader_binary *binary)
52 {
53 const char *p = debug_get_option_replace_shaders();
54 const char *semicolon;
55 char *copy = NULL;
56 FILE *f;
57 long filesize, nread;
58 char *buf = NULL;
59 bool replaced = false;
60
61 if (!p)
62 return false;
63
64 while (*p) {
65 unsigned long i;
66 char *endp;
67 i = strtoul(p, &endp, 0);
68
69 p = endp;
70 if (*p != ':') {
71 fprintf(stderr, "RADEON_REPLACE_SHADERS formatted badly.\n");
72 exit(1);
73 }
74 ++p;
75
76 if (i == num)
77 break;
78
79 p = strchr(p, ';');
80 if (!p)
81 return false;
82 ++p;
83 }
84 if (!*p)
85 return false;
86
87 semicolon = strchr(p, ';');
88 if (semicolon) {
89 p = copy = strndup(p, semicolon - p);
90 if (!copy) {
91 fprintf(stderr, "out of memory\n");
92 return false;
93 }
94 }
95
96 fprintf(stderr, "radeonsi: replace shader %u by %s\n", num, p);
97
98 f = fopen(p, "r");
99 if (!f) {
100 perror("radeonsi: failed to open file");
101 goto out_free;
102 }
103
104 if (fseek(f, 0, SEEK_END) != 0)
105 goto file_error;
106
107 filesize = ftell(f);
108 if (filesize < 0)
109 goto file_error;
110
111 if (fseek(f, 0, SEEK_SET) != 0)
112 goto file_error;
113
114 buf = MALLOC(filesize);
115 if (!buf) {
116 fprintf(stderr, "out of memory\n");
117 goto out_close;
118 }
119
120 nread = fread(buf, 1, filesize, f);
121 if (nread != filesize)
122 goto file_error;
123
124 radeon_elf_read(buf, filesize, binary);
125 replaced = true;
126
127 out_close:
128 fclose(f);
129 out_free:
130 FREE(buf);
131 free(copy);
132 return replaced;
133
134 file_error:
135 perror("radeonsi: reading shader");
136 goto out_close;
137 }
138
139 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
140 * read them, or use "aha -b -f file" to convert them to html.
141 */
142 #define COLOR_RESET "\033[0m"
143 #define COLOR_RED "\033[31m"
144 #define COLOR_GREEN "\033[1;32m"
145 #define COLOR_YELLOW "\033[1;33m"
146 #define COLOR_CYAN "\033[1;36m"
147
148 #define INDENT_PKT 8
149
150 static void print_spaces(FILE *f, unsigned num)
151 {
152 fprintf(f, "%*s", num, "");
153 }
154
155 static void print_value(FILE *file, uint32_t value, int bits)
156 {
157 /* Guess if it's int or float */
158 if (value <= (1 << 15)) {
159 if (value <= 9)
160 fprintf(file, "%u\n", value);
161 else
162 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
163 } else {
164 float f = uif(value);
165
166 if (fabs(f) < 100000 && f*10 == floor(f*10))
167 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
168 else
169 /* Don't print more leading zeros than there are bits. */
170 fprintf(file, "0x%0*x\n", bits / 4, value);
171 }
172 }
173
174 static void print_named_value(FILE *file, const char *name, uint32_t value,
175 int bits)
176 {
177 print_spaces(file, INDENT_PKT);
178 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
179 print_value(file, value, bits);
180 }
181
182 static void si_dump_reg(FILE *file, unsigned offset, uint32_t value,
183 uint32_t field_mask)
184 {
185 int r, f;
186
187 for (r = 0; r < ARRAY_SIZE(sid_reg_table); r++) {
188 const struct si_reg *reg = &sid_reg_table[r];
189 const char *reg_name = sid_strings + reg->name_offset;
190
191 if (reg->offset == offset) {
192 bool first_field = true;
193
194 print_spaces(file, INDENT_PKT);
195 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
196 reg_name);
197
198 if (!reg->num_fields) {
199 print_value(file, value, 32);
200 return;
201 }
202
203 for (f = 0; f < reg->num_fields; f++) {
204 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
205 const int *values_offsets = sid_strings_offsets + field->values_offset;
206 uint32_t val = (value & field->mask) >>
207 (ffs(field->mask) - 1);
208
209 if (!(field->mask & field_mask))
210 continue;
211
212 /* Indent the field. */
213 if (!first_field)
214 print_spaces(file,
215 INDENT_PKT + strlen(reg_name) + 4);
216
217 /* Print the field. */
218 fprintf(file, "%s = ", sid_strings + field->name_offset);
219
220 if (val < field->num_values && values_offsets[val] >= 0)
221 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
222 else
223 print_value(file, val,
224 util_bitcount(field->mask));
225
226 first_field = false;
227 }
228 return;
229 }
230 }
231
232 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " = 0x%08x", offset, value);
233 }
234
235 static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count,
236 unsigned reg_offset)
237 {
238 unsigned reg = (ib[1] << 2) + reg_offset;
239 int i;
240
241 for (i = 0; i < count; i++)
242 si_dump_reg(f, reg + i*4, ib[2+i], ~0);
243 }
244
245 static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
246 int trace_id)
247 {
248 unsigned count = PKT_COUNT_G(ib[0]);
249 unsigned op = PKT3_IT_OPCODE_G(ib[0]);
250 const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : "";
251 int i;
252
253 /* Print the name first. */
254 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
255 if (packet3_table[i].op == op)
256 break;
257
258 if (i < ARRAY_SIZE(packet3_table)) {
259 const char *name = sid_strings + packet3_table[i].name_offset;
260
261 if (op == PKT3_SET_CONTEXT_REG ||
262 op == PKT3_SET_CONFIG_REG ||
263 op == PKT3_SET_UCONFIG_REG ||
264 op == PKT3_SET_SH_REG)
265 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
266 name, predicate);
267 else
268 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
269 name, predicate);
270 } else
271 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
272 op, predicate);
273
274 /* Print the contents. */
275 switch (op) {
276 case PKT3_SET_CONTEXT_REG:
277 si_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET);
278 break;
279 case PKT3_SET_CONFIG_REG:
280 si_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET);
281 break;
282 case PKT3_SET_UCONFIG_REG:
283 si_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET);
284 break;
285 case PKT3_SET_SH_REG:
286 si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET);
287 break;
288 case PKT3_ACQUIRE_MEM:
289 si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
290 si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
291 si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0);
292 si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0);
293 si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0);
294 print_named_value(f, "POLL_INTERVAL", ib[6], 16);
295 break;
296 case PKT3_SURFACE_SYNC:
297 si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
298 si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
299 si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
300 print_named_value(f, "POLL_INTERVAL", ib[4], 16);
301 break;
302 case PKT3_EVENT_WRITE:
303 si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
304 S_028A90_EVENT_TYPE(~0));
305 print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
306 print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1);
307 if (count > 0) {
308 print_named_value(f, "ADDRESS_LO", ib[2], 32);
309 print_named_value(f, "ADDRESS_HI", ib[3], 16);
310 }
311 break;
312 case PKT3_DRAW_INDEX_AUTO:
313 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0);
314 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0);
315 break;
316 case PKT3_DRAW_INDEX_2:
317 si_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0);
318 si_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0);
319 si_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0);
320 si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0);
321 si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0);
322 break;
323 case PKT3_INDEX_TYPE:
324 si_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0);
325 break;
326 case PKT3_NUM_INSTANCES:
327 si_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0);
328 break;
329 case PKT3_WRITE_DATA:
330 si_dump_reg(f, R_370_CONTROL, ib[1], ~0);
331 si_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0);
332 si_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0);
333 for (i = 2; i < count; i++) {
334 print_spaces(f, INDENT_PKT);
335 fprintf(f, "0x%08x\n", ib[2+i]);
336 }
337 break;
338 case PKT3_CP_DMA:
339 si_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0);
340 si_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0);
341 si_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0);
342 si_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0);
343 si_dump_reg(f, R_414_COMMAND, ib[5], ~0);
344 break;
345 case PKT3_DMA_DATA:
346 si_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0);
347 si_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0);
348 si_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0);
349 si_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0);
350 si_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0);
351 si_dump_reg(f, R_414_COMMAND, ib[6], ~0);
352 break;
353 case PKT3_INDIRECT_BUFFER_SI:
354 case PKT3_INDIRECT_BUFFER_CONST:
355 case PKT3_INDIRECT_BUFFER_CIK:
356 si_dump_reg(f, R_3F0_IB_BASE_LO, ib[1], ~0);
357 si_dump_reg(f, R_3F1_IB_BASE_HI, ib[2], ~0);
358 si_dump_reg(f, R_3F2_CONTROL, ib[3], ~0);
359 break;
360 case PKT3_NOP:
361 if (ib[0] == 0xffff1000) {
362 count = -1; /* One dword NOP. */
363 break;
364 } else if (count == 0 && SI_IS_TRACE_POINT(ib[1])) {
365 unsigned packet_id = SI_GET_TRACE_POINT_ID(ib[1]);
366
367 print_spaces(f, INDENT_PKT);
368 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
369
370 if (trace_id == -1)
371 break; /* tracing was disabled */
372
373 print_spaces(f, INDENT_PKT);
374 if (packet_id < trace_id)
375 fprintf(f, COLOR_RED
376 "This trace point was reached by the CP."
377 COLOR_RESET "\n");
378 else if (packet_id == trace_id)
379 fprintf(f, COLOR_RED
380 "!!!!! This is the last trace point that "
381 "was reached by the CP !!!!!"
382 COLOR_RESET "\n");
383 else if (packet_id+1 == trace_id)
384 fprintf(f, COLOR_RED
385 "!!!!! This is the first trace point that "
386 "was NOT been reached by the CP !!!!!"
387 COLOR_RESET "\n");
388 else
389 fprintf(f, COLOR_RED
390 "!!!!! This trace point was NOT reached "
391 "by the CP !!!!!"
392 COLOR_RESET "\n");
393 break;
394 }
395 /* fall through, print all dwords */
396 default:
397 for (i = 0; i < count+1; i++) {
398 print_spaces(f, INDENT_PKT);
399 fprintf(f, "0x%08x\n", ib[1+i]);
400 }
401 }
402
403 ib += count + 2;
404 *num_dw -= count + 2;
405 return ib;
406 }
407
408 /**
409 * Parse and print an IB into a file.
410 *
411 * \param f file
412 * \param ib IB
413 * \param num_dw size of the IB
414 * \param chip_class chip class
415 * \param trace_id the last trace ID that is known to have been reached
416 * and executed by the CP, typically read from a buffer
417 */
418 static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
419 const char *name)
420 {
421 fprintf(f, "------------------ %s begin ------------------\n", name);
422
423 while (num_dw > 0) {
424 unsigned type = PKT_TYPE_G(ib[0]);
425
426 switch (type) {
427 case 3:
428 ib = si_parse_packet3(f, ib, &num_dw, trace_id);
429 break;
430 case 2:
431 /* type-2 nop */
432 if (ib[0] == 0x80000000) {
433 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
434 ib++;
435 break;
436 }
437 /* fall through */
438 default:
439 fprintf(f, "Unknown packet type %i\n", type);
440 return;
441 }
442 }
443
444 fprintf(f, "------------------- %s end -------------------\n", name);
445 if (num_dw < 0) {
446 printf("Packet ends after the end of IB.\n");
447 exit(0);
448 }
449 fprintf(f, "\n");
450 }
451
452 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f,
453 unsigned offset)
454 {
455 struct radeon_winsys *ws = sctx->b.ws;
456 uint32_t value;
457
458 if (ws->read_registers(ws, offset, 1, &value))
459 si_dump_reg(f, offset, value, ~0);
460 }
461
462 static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
463 {
464 if (sctx->screen->b.info.drm_major == 2 &&
465 sctx->screen->b.info.drm_minor < 42)
466 return; /* no radeon support */
467
468 fprintf(f, "Memory-mapped registers:\n");
469 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS);
470
471 /* No other registers can be read on DRM < 3.1.0. */
472 if (sctx->screen->b.info.drm_major < 3 ||
473 sctx->screen->b.info.drm_minor < 1) {
474 fprintf(f, "\n");
475 return;
476 }
477
478 si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2);
479 si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0);
480 si_dump_mmapped_reg(sctx, f, R_008018_GRBM_STATUS_SE1);
481 si_dump_mmapped_reg(sctx, f, R_008038_GRBM_STATUS_SE2);
482 si_dump_mmapped_reg(sctx, f, R_00803C_GRBM_STATUS_SE3);
483 si_dump_mmapped_reg(sctx, f, R_00D034_SDMA0_STATUS_REG);
484 si_dump_mmapped_reg(sctx, f, R_00D834_SDMA1_STATUS_REG);
485 si_dump_mmapped_reg(sctx, f, R_000E50_SRBM_STATUS);
486 si_dump_mmapped_reg(sctx, f, R_000E4C_SRBM_STATUS2);
487 si_dump_mmapped_reg(sctx, f, R_000E54_SRBM_STATUS3);
488 si_dump_mmapped_reg(sctx, f, R_008680_CP_STAT);
489 si_dump_mmapped_reg(sctx, f, R_008674_CP_STALLED_STAT1);
490 si_dump_mmapped_reg(sctx, f, R_008678_CP_STALLED_STAT2);
491 si_dump_mmapped_reg(sctx, f, R_008670_CP_STALLED_STAT3);
492 si_dump_mmapped_reg(sctx, f, R_008210_CP_CPC_STATUS);
493 si_dump_mmapped_reg(sctx, f, R_008214_CP_CPC_BUSY_STAT);
494 si_dump_mmapped_reg(sctx, f, R_008218_CP_CPC_STALLED_STAT1);
495 si_dump_mmapped_reg(sctx, f, R_00821C_CP_CPF_STATUS);
496 si_dump_mmapped_reg(sctx, f, R_008220_CP_CPF_BUSY_STAT);
497 si_dump_mmapped_reg(sctx, f, R_008224_CP_CPF_STALLED_STAT1);
498 fprintf(f, "\n");
499 }
500
501 static void si_dump_last_ib(struct si_context *sctx, FILE *f)
502 {
503 int last_trace_id = -1;
504
505 if (!sctx->last_gfx.ib)
506 return;
507
508 if (sctx->last_trace_buf) {
509 /* We are expecting that the ddebug pipe has already
510 * waited for the context, so this buffer should be idle.
511 * If the GPU is hung, there is no point in waiting for it.
512 */
513 uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
514 NULL,
515 PIPE_TRANSFER_UNSYNCHRONIZED |
516 PIPE_TRANSFER_READ);
517 if (map)
518 last_trace_id = *map;
519 }
520
521 if (sctx->init_config)
522 si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
523 -1, "IB2: Init config");
524
525 if (sctx->init_config_gs_rings)
526 si_parse_ib(f, sctx->init_config_gs_rings->pm4,
527 sctx->init_config_gs_rings->ndw,
528 -1, "IB2: Init GS rings");
529
530 si_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw,
531 last_trace_id, "IB");
532 }
533
534 static const char *priority_to_string(enum radeon_bo_priority priority)
535 {
536 #define ITEM(x) [RADEON_PRIO_##x] = #x
537 static const char *table[64] = {
538 ITEM(FENCE),
539 ITEM(TRACE),
540 ITEM(SO_FILLED_SIZE),
541 ITEM(QUERY),
542 ITEM(IB1),
543 ITEM(IB2),
544 ITEM(DRAW_INDIRECT),
545 ITEM(INDEX_BUFFER),
546 ITEM(CP_DMA),
547 ITEM(VCE),
548 ITEM(UVD),
549 ITEM(SDMA_BUFFER),
550 ITEM(SDMA_TEXTURE),
551 ITEM(USER_SHADER),
552 ITEM(INTERNAL_SHADER),
553 ITEM(CONST_BUFFER),
554 ITEM(DESCRIPTORS),
555 ITEM(BORDER_COLORS),
556 ITEM(SAMPLER_BUFFER),
557 ITEM(VERTEX_BUFFER),
558 ITEM(SHADER_RW_BUFFER),
559 ITEM(RINGS_STREAMOUT),
560 ITEM(SCRATCH_BUFFER),
561 ITEM(COMPUTE_GLOBAL),
562 ITEM(SAMPLER_TEXTURE),
563 ITEM(SHADER_RW_IMAGE),
564 ITEM(SAMPLER_TEXTURE_MSAA),
565 ITEM(COLOR_BUFFER),
566 ITEM(DEPTH_BUFFER),
567 ITEM(COLOR_BUFFER_MSAA),
568 ITEM(DEPTH_BUFFER_MSAA),
569 ITEM(CMASK),
570 ITEM(DCC),
571 ITEM(HTILE),
572 };
573 #undef ITEM
574
575 assert(priority < ARRAY_SIZE(table));
576 return table[priority];
577 }
578
579 static int bo_list_compare_va(const struct radeon_bo_list_item *a,
580 const struct radeon_bo_list_item *b)
581 {
582 return a->vm_address < b->vm_address ? -1 :
583 a->vm_address > b->vm_address ? 1 : 0;
584 }
585
586 static void si_dump_bo_list(struct si_context *sctx,
587 const struct radeon_saved_cs *saved, FILE *f)
588 {
589 unsigned i,j;
590
591 if (!saved->bo_list)
592 return;
593
594 /* Sort the list according to VM adddresses first. */
595 qsort(saved->bo_list, saved->bo_count,
596 sizeof(saved->bo_list[0]), (void*)bo_list_compare_va);
597
598 fprintf(f, "Buffer list (in units of pages = 4kB):\n"
599 COLOR_YELLOW " Size VM start page "
600 "VM end page Usage" COLOR_RESET "\n");
601
602 for (i = 0; i < saved->bo_count; i++) {
603 /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */
604 const unsigned page_size = sctx->b.screen->info.gart_page_size;
605 uint64_t va = saved->bo_list[i].vm_address;
606 uint64_t size = saved->bo_list[i].bo_size;
607 bool hit = false;
608
609 /* If there's unused virtual memory between 2 buffers, print it. */
610 if (i) {
611 uint64_t previous_va_end = saved->bo_list[i-1].vm_address +
612 saved->bo_list[i-1].bo_size;
613
614 if (va > previous_va_end) {
615 fprintf(f, " %10"PRIu64" -- hole --\n",
616 (va - previous_va_end) / page_size);
617 }
618 }
619
620 /* Print the buffer. */
621 fprintf(f, " %10"PRIu64" 0x%013"PRIx64" 0x%013"PRIx64" ",
622 size / page_size, va / page_size, (va + size) / page_size);
623
624 /* Print the usage. */
625 for (j = 0; j < 64; j++) {
626 if (!(saved->bo_list[i].priority_usage & (1llu << j)))
627 continue;
628
629 fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j));
630 hit = true;
631 }
632 fprintf(f, "\n");
633 }
634 fprintf(f, "\nNote: The holes represent memory not used by the IB.\n"
635 " Other buffers can still be allocated there.\n\n");
636 }
637
638 static void si_dump_framebuffer(struct si_context *sctx, FILE *f)
639 {
640 struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
641 struct r600_texture *rtex;
642 int i;
643
644 for (i = 0; i < state->nr_cbufs; i++) {
645 if (!state->cbufs[i])
646 continue;
647
648 rtex = (struct r600_texture*)state->cbufs[i]->texture;
649 fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
650 r600_print_texture_info(rtex, f);
651 fprintf(f, "\n");
652 }
653
654 if (state->zsbuf) {
655 rtex = (struct r600_texture*)state->zsbuf->texture;
656 fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
657 r600_print_texture_info(rtex, f);
658 fprintf(f, "\n");
659 }
660 }
661
662 static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
663 unsigned flags)
664 {
665 struct si_context *sctx = (struct si_context*)ctx;
666
667 if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS)
668 si_dump_debug_registers(sctx, f);
669
670 if (flags & PIPE_DUMP_CURRENT_STATES)
671 si_dump_framebuffer(sctx, f);
672
673 if (flags & PIPE_DUMP_CURRENT_SHADERS) {
674 si_dump_shader(sctx->screen, &sctx->vs_shader, f);
675 si_dump_shader(sctx->screen, &sctx->tcs_shader, f);
676 si_dump_shader(sctx->screen, &sctx->tes_shader, f);
677 si_dump_shader(sctx->screen, &sctx->gs_shader, f);
678 si_dump_shader(sctx->screen, &sctx->ps_shader, f);
679 }
680
681 if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {
682 si_dump_bo_list(sctx, &sctx->last_gfx, f);
683 si_dump_last_ib(sctx, f);
684
685 fprintf(f, "Done.\n");
686
687 /* dump only once */
688 radeon_clear_saved_cs(&sctx->last_gfx);
689 r600_resource_reference(&sctx->last_trace_buf, NULL);
690 }
691 }
692
693 static void si_dump_dma(struct si_context *sctx,
694 struct radeon_saved_cs *saved, FILE *f)
695 {
696 static const char ib_name[] = "sDMA IB";
697 unsigned i;
698
699 si_dump_bo_list(sctx, saved, f);
700
701 fprintf(f, "------------------ %s begin ------------------\n", ib_name);
702
703 for (i = 0; i < saved->num_dw; ++i) {
704 fprintf(f, " %08x\n", saved->ib[i]);
705 }
706
707 fprintf(f, "------------------- %s end -------------------\n", ib_name);
708 fprintf(f, "\n");
709
710 fprintf(f, "SDMA Dump Done.\n");
711 }
712
713 static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr)
714 {
715 char line[2000];
716 unsigned sec, usec;
717 int progress = 0;
718 uint64_t timestamp = 0;
719 bool fault = false;
720
721 FILE *p = popen("dmesg", "r");
722 if (!p)
723 return false;
724
725 while (fgets(line, sizeof(line), p)) {
726 char *msg, len;
727
728 if (!line[0] || line[0] == '\n')
729 continue;
730
731 /* Get the timestamp. */
732 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
733 static bool hit = false;
734 if (!hit) {
735 fprintf(stderr, "%s: failed to parse line '%s'\n",
736 __func__, line);
737 hit = true;
738 }
739 continue;
740 }
741 timestamp = sec * 1000000llu + usec;
742
743 /* If just updating the timestamp. */
744 if (!out_addr)
745 continue;
746
747 /* Process messages only if the timestamp is newer. */
748 if (timestamp <= sctx->dmesg_timestamp)
749 continue;
750
751 /* Only process the first VM fault. */
752 if (fault)
753 continue;
754
755 /* Remove trailing \n */
756 len = strlen(line);
757 if (len && line[len-1] == '\n')
758 line[len-1] = 0;
759
760 /* Get the message part. */
761 msg = strchr(line, ']');
762 if (!msg) {
763 assert(0);
764 continue;
765 }
766 msg++;
767
768 switch (progress) {
769 case 0:
770 if (strstr(msg, "GPU fault detected:"))
771 progress = 1;
772 break;
773 case 1:
774 msg = strstr(msg, "VM_CONTEXT1_PROTECTION_FAULT_ADDR");
775 if (msg) {
776 msg = strstr(msg, "0x");
777 if (msg) {
778 msg += 2;
779 if (sscanf(msg, "%X", out_addr) == 1)
780 fault = true;
781 }
782 }
783 progress = 0;
784 break;
785 default:
786 progress = 0;
787 }
788 }
789 pclose(p);
790
791 if (timestamp > sctx->dmesg_timestamp)
792 sctx->dmesg_timestamp = timestamp;
793 return fault;
794 }
795
796 void si_check_vm_faults(struct r600_common_context *ctx,
797 struct radeon_saved_cs *saved, enum ring_type ring)
798 {
799 struct si_context *sctx = (struct si_context *)ctx;
800 struct pipe_screen *screen = sctx->b.b.screen;
801 FILE *f;
802 uint32_t addr;
803
804 if (!si_vm_fault_occured(sctx, &addr))
805 return;
806
807 f = dd_get_debug_file(false);
808 if (!f)
809 return;
810
811 fprintf(f, "VM fault report.\n\n");
812 fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen));
813 fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen));
814 fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
815 fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
816
817 if (sctx->apitrace_call_number)
818 fprintf(f, "Last apitrace call: %u\n\n",
819 sctx->apitrace_call_number);
820
821 switch (ring) {
822 case RING_GFX:
823 si_dump_debug_state(&sctx->b.b, f, 0);
824 break;
825
826 case RING_DMA:
827 si_dump_dma(sctx, saved, f);
828 break;
829
830 default:
831 break;
832 }
833
834 fclose(f);
835
836 fprintf(stderr, "Detected a VM fault, exiting...\n");
837 exit(0);
838 }
839
840 void si_init_debug_functions(struct si_context *sctx)
841 {
842 sctx->b.b.dump_debug_state = si_dump_debug_state;
843 sctx->b.check_vm_faults = si_check_vm_faults;
844
845 /* Set the initial dmesg timestamp for this context, so that
846 * only new messages will be checked for VM faults.
847 */
848 if (sctx->screen->b.debug_flags & DBG_CHECK_VM)
849 si_vm_fault_occured(sctx, NULL);
850 }