src/gallium/drivers/radeonsi/si_hw_context.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26
  27 #include "si_pipe.h"
  28
  29 /* initialize */
  30 void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
  31                         boolean count_draw_in)
  32 {
  33         int i;
  34
  35         /* The number of dwords we already used in the CS so far. */
  36         num_dw += ctx->b.rings.gfx.cs->cdw;
  37
  38         for (i = 0; i < SI_NUM_ATOMS(ctx); i++) {
  39                 if (ctx->atoms.array[i]->dirty) {
  40                         num_dw += ctx->atoms.array[i]->num_dw;
  41                 }
  42         }
  43
  44         if (count_draw_in) {
  45                 /* The number of dwords all the dirty states would take. */
  46                 num_dw += ctx->pm4_dirty_cdwords;
  47
  48                 /* The upper-bound of how much a draw command would take. */
  49                 num_dw += SI_MAX_DRAW_CS_DWORDS;
  50         }
  51
  52         /* Count in queries_suspend. */
  53         num_dw += ctx->b.num_cs_dw_nontimer_queries_suspend;
  54
  55         /* Count in streamout_end at the end of CS. */
  56         if (ctx->b.streamout.begin_emitted) {
  57                 num_dw += ctx->b.streamout.num_dw_for_end;
  58         }
  59
  60         /* Count in render_condition(NULL) at the end of CS. */
  61         if (ctx->b.predicate_drawing) {
  62                 num_dw += 3;
  63         }
  64
  65         /* Count in framebuffer cache flushes at the end of CS. */
  66         num_dw += ctx->atoms.cache_flush->num_dw;
  67
  68 #if SI_TRACE_CS
  69         if (ctx->screen->b.trace_bo) {
  70                 num_dw += SI_TRACE_CS_DWORDS;
  71         }
  72 #endif
  73
  74         /* Flush if there's not enough space. */
  75         if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
  76                 si_flush(&ctx->b.b, NULL, RADEON_FLUSH_ASYNC);
  77         }
  78 }
  79
  80 void si_context_flush(struct si_context *ctx, unsigned flags)
  81 {
  82         struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
  83
  84         if (cs->cdw == ctx->b.initial_gfx_cs_size)
  85                 return;
  86
  87         /* suspend queries */
  88         ctx->b.nontimer_queries_suspended = false;
  89         if (ctx->b.num_cs_dw_nontimer_queries_suspend) {
  90                 r600_suspend_nontimer_queries(&ctx->b);
  91                 ctx->b.nontimer_queries_suspended = true;
  92         }
  93
  94         ctx->b.streamout.suspended = false;
  95
  96         if (ctx->b.streamout.begin_emitted) {
  97                 r600_emit_streamout_end(&ctx->b);
  98                 ctx->b.streamout.suspended = true;
  99         }
 100
 101         ctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB |
 102                         R600_CONTEXT_FLUSH_AND_INV_CB_META |
 103                         R600_CONTEXT_FLUSH_AND_INV_DB |
 104                         R600_CONTEXT_FLUSH_AND_INV_DB_META |
 105                         R600_CONTEXT_INV_TEX_CACHE |
 106                         /* this is probably not needed anymore */
 107                         R600_CONTEXT_PS_PARTIAL_FLUSH;
 108         si_emit_cache_flush(&ctx->b, NULL);
 109
 110         /* force to keep tiling flags */
 111         flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
 112
 113 #if SI_TRACE_CS
 114         if (ctx->screen->b.trace_bo) {
 115                 struct si_screen *sscreen = ctx->screen;
 116                 unsigned i;
 117
 118                 for (i = 0; i < cs->cdw; i++) {
 119                         fprintf(stderr, "[%4d] [%5d] 0x%08x\n", sscreen->b.cs_count, i, cs->buf[i]);
 120                 }
 121                 sscreen->b.cs_count++;
 122         }
 123 #endif
 124
 125         /* Flush the CS. */
 126         ctx->b.ws->cs_flush(ctx->b.rings.gfx.cs, flags, 0);
 127
 128 #if SI_TRACE_CS
 129         if (ctx->screen->b.trace_bo) {
 130                 struct si_screen *sscreen = ctx->screen;
 131                 unsigned i;
 132
 133                 for (i = 0; i < 10; i++) {
 134                         usleep(5);
 135                         if (!ctx->ws->buffer_is_busy(sscreen->b.trace_bo->buf, RADEON_USAGE_READWRITE)) {
 136                                 break;
 137                         }
 138                 }
 139                 if (i == 10) {
 140                         fprintf(stderr, "timeout on cs lockup likely happen at cs %d dw %d\n",
 141                                 sscreen->b.trace_ptr[1], sscreen->b.trace_ptr[0]);
 142                 } else {
 143                         fprintf(stderr, "cs %d executed in %dms\n", sscreen->b.trace_ptr[1], i * 5);
 144                 }
 145         }
 146 #endif
 147
 148         si_begin_new_cs(ctx);
 149 }
 150
 151 void si_begin_new_cs(struct si_context *ctx)
 152 {
 153         ctx->pm4_dirty_cdwords = 0;
 154
 155         /* Flush read caches at the beginning of CS. */
 156         ctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE |
 157                         R600_CONTEXT_INV_CONST_CACHE |
 158                         R600_CONTEXT_INV_SHADER_CACHE;
 159
 160         /* set all valid group as dirty so they get reemited on
 161          * next draw command
 162          */
 163         si_pm4_reset_emitted(ctx);
 164
 165         /* The CS initialization should be emitted before everything else. */
 166         si_pm4_emit(ctx, ctx->queued.named.init);
 167         ctx->emitted.named.init = ctx->queued.named.init;
 168
 169         if (ctx->b.streamout.suspended) {
 170                 ctx->b.streamout.append_bitmask = ctx->b.streamout.enabled_mask;
 171                 r600_streamout_buffers_dirty(&ctx->b);
 172         }
 173
 174         /* resume queries */
 175         if (ctx->b.nontimer_queries_suspended) {
 176                 r600_resume_nontimer_queries(&ctx->b);
 177         }
 178
 179         ctx->framebuffer.atom.dirty = true;
 180         ctx->b.streamout.enable_atom.dirty = true;
 181         si_all_descriptors_begin_new_cs(ctx);
 182
 183         ctx->b.initial_gfx_cs_size = ctx->b.rings.gfx.cs->cdw;
 184 }
 185
 186 #if SI_TRACE_CS
 187 void si_trace_emit(struct si_context *sctx)
 188 {
 189         struct si_screen *sscreen = sctx->screen;
 190         struct radeon_winsys_cs *cs = sctx->cs;
 191         uint64_t va;
 192
 193         va = r600_resource_va(&sscreen->screen, (void*)sscreen->b.trace_bo);
 194         r600_context_bo_reloc(sctx, sscreen->b.trace_bo, RADEON_USAGE_READWRITE);
 195         cs->buf[cs->cdw++] = PKT3(PKT3_WRITE_DATA, 4, 0);
 196         cs->buf[cs->cdw++] = PKT3_WRITE_DATA_DST_SEL(PKT3_WRITE_DATA_DST_SEL_MEM_SYNC) |
 197                                 PKT3_WRITE_DATA_WR_CONFIRM |
 198                                 PKT3_WRITE_DATA_ENGINE_SEL(PKT3_WRITE_DATA_ENGINE_SEL_ME);
 199         cs->buf[cs->cdw++] = va & 0xFFFFFFFFUL;
 200         cs->buf[cs->cdw++] = (va >> 32UL) & 0xFFFFFFFFUL;
 201         cs->buf[cs->cdw++] = cs->cdw;
 202         cs->buf[cs->cdw++] = sscreen->b.cs_count;
 203 }
 204 #endif