radeonsi: remove no-op 32-bit masking
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef SI_PIPE_H
27 #define SI_PIPE_H
28
29 #include "si_state.h"
30
31 #include <llvm-c/TargetMachine.h>
32
33 #ifdef PIPE_ARCH_BIG_ENDIAN
34 #define SI_BIG_ENDIAN 1
35 #else
36 #define SI_BIG_ENDIAN 0
37 #endif
38
39 /* The base vertex and primitive restart can be any number, but we must pick
40 * one which will mean "unknown" for the purpose of state tracking and
41 * the number shouldn't be a commonly-used one. */
42 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
43 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
44 #define SI_NUM_SMOOTH_AA_SAMPLES 8
45
46 #define SI_TRACE_CS_DWORDS 7
47
48 #define SI_MAX_DRAW_CS_DWORDS \
49 (/*scratch:*/ 3 + /*derived prim state:*/ 3 + \
50 /*draw regs:*/ 18 + /*draw packets:*/ 31 +\
51 /*derived tess state:*/ 19)
52
53 /* Instruction cache. */
54 #define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)
55 /* Cache used by scalar memory (SMEM) instructions. They also use TC
56 * as a second level cache, which isn't flushed by this.
57 * Other names: constant cache, data cache, DCACHE */
58 #define SI_CONTEXT_INV_KCACHE (R600_CONTEXT_PRIVATE_FLAG << 1)
59 /* Caches used by vector memory (VMEM) instructions.
60 * L1 can optionally be bypassed (GLC=1) and can only be used by shaders.
61 * L2 is used by shaders and can be used by other blocks (CP, sDMA). */
62 #define SI_CONTEXT_INV_TC_L1 (R600_CONTEXT_PRIVATE_FLAG << 2)
63 #define SI_CONTEXT_INV_TC_L2 (R600_CONTEXT_PRIVATE_FLAG << 3)
64 /* Framebuffer caches. */
65 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
66 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
67 #define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 6)
68 #define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 7)
69 /* Engine synchronization. */
70 #define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 8)
71 #define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9)
72 #define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10)
73 #define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11)
74 #define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 12)
75 /* Compute only. */
76 #define SI_CONTEXT_FLUSH_WITH_INV_L2 (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
77 #define SI_CONTEXT_FLAG_COMPUTE (R600_CONTEXT_PRIVATE_FLAG << 14)
78
79 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
80 SI_CONTEXT_FLUSH_AND_INV_CB_META | \
81 SI_CONTEXT_FLUSH_AND_INV_DB | \
82 SI_CONTEXT_FLUSH_AND_INV_DB_META)
83
84 #define SI_ENCODE_TRACE_POINT(id) (0xcafe0000 | ((id) & 0xffff))
85 #define SI_IS_TRACE_POINT(x) (((x) & 0xcafe0000) == 0xcafe0000)
86 #define SI_GET_TRACE_POINT_ID(x) ((x) & 0xffff)
87
88 struct si_compute;
89
90 struct si_screen {
91 struct r600_common_screen b;
92 };
93
94 struct si_sampler_view {
95 struct pipe_sampler_view base;
96 struct list_head list;
97 struct r600_resource *resource;
98 /* [0..7] = image descriptor
99 * [4..7] = buffer descriptor */
100 uint32_t state[8];
101 uint32_t fmask_state[8];
102 };
103
104 struct si_sampler_state {
105 uint32_t val[4];
106 uint32_t border_color[4];
107 };
108
109 struct si_cs_shader_state {
110 struct si_compute *program;
111 };
112
113 struct si_textures_info {
114 struct si_sampler_views views;
115 struct si_sampler_states states;
116 uint32_t depth_texture_mask; /* which textures are depth */
117 uint32_t compressed_colortex_mask;
118 };
119
120 struct si_framebuffer {
121 struct r600_atom atom;
122 struct pipe_framebuffer_state state;
123 unsigned nr_samples;
124 unsigned log_samples;
125 unsigned cb0_is_integer;
126 unsigned compressed_cb_mask;
127 unsigned export_16bpc;
128 };
129
130 #define SI_NUM_ATOMS(sctx) (sizeof((sctx)->atoms)/sizeof((sctx)->atoms.array[0]))
131
132 struct si_context {
133 struct r600_common_context b;
134 struct blitter_context *blitter;
135 void *custom_dsa_flush;
136 void *custom_blend_resolve;
137 void *custom_blend_decompress;
138 void *custom_blend_fastclear;
139 void *pstipple_sampler_state;
140 struct si_screen *screen;
141 struct si_pm4_state *init_config;
142 struct pipe_fence_handle *last_gfx_fence;
143 struct si_shader_selector *fixed_func_tcs_shader;
144
145 union {
146 struct {
147 /* The order matters. */
148 struct r600_atom *cache_flush;
149 struct r600_atom *streamout_begin;
150 struct r600_atom *streamout_enable; /* must be after streamout_begin */
151 struct r600_atom *framebuffer;
152 struct r600_atom *msaa_sample_locs;
153 struct r600_atom *db_render_state;
154 struct r600_atom *msaa_config;
155 struct r600_atom *clip_regs;
156 struct r600_atom *shader_userdata;
157 } s;
158 struct r600_atom *array[0];
159 } atoms;
160
161 struct si_framebuffer framebuffer;
162 struct si_vertex_element *vertex_elements;
163 /* for saving when using blitter */
164 struct pipe_stencil_ref stencil_ref;
165 /* shaders */
166 struct si_shader_selector *ps_shader;
167 struct si_shader_selector *gs_shader;
168 struct si_shader_selector *vs_shader;
169 struct si_shader_selector *tcs_shader;
170 struct si_shader_selector *tes_shader;
171 struct si_cs_shader_state cs_shader_state;
172 struct si_shader_data shader_userdata;
173 /* shader information */
174 unsigned sprite_coord_enable;
175 bool flatshade;
176 struct si_descriptors vertex_buffers;
177 struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
178 struct si_buffer_resources rw_buffers[SI_NUM_SHADERS];
179 struct si_textures_info samplers[SI_NUM_SHADERS];
180 struct r600_resource *scratch_buffer;
181 struct r600_resource *border_color_table;
182 unsigned border_color_offset;
183
184 struct r600_atom clip_regs;
185 struct r600_atom msaa_sample_locs;
186 struct r600_atom msaa_config;
187 int ps_iter_samples;
188 bool smoothing_enabled;
189
190 /* Vertex and index buffers. */
191 bool vertex_buffers_dirty;
192 struct pipe_index_buffer index_buffer;
193 struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
194
195 /* With rasterizer discard, there doesn't have to be a pixel shader.
196 * In that case, we bind this one: */
197 void *dummy_pixel_shader;
198 struct r600_atom cache_flush;
199 struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
200
201 /* VGT states. */
202 struct si_pm4_state *vgt_shader_config[4];
203 struct si_pm4_state *gs_rings;
204 struct pipe_resource *esgs_ring;
205 struct pipe_resource *gsvs_ring;
206 struct si_pm4_state *tf_state;
207 struct pipe_resource *tf_ring;
208
209 LLVMTargetMachineRef tm;
210
211 /* SI state handling */
212 union si_state queued;
213 union si_state emitted;
214
215 /* DB render state. */
216 struct r600_atom db_render_state;
217 bool dbcb_depth_copy_enabled;
218 bool dbcb_stencil_copy_enabled;
219 unsigned dbcb_copy_sample;
220 bool db_inplace_flush_enabled;
221 bool db_depth_clear;
222 bool db_depth_disable_expclear;
223 unsigned ps_db_shader_control;
224
225 /* Emitted draw state. */
226 int last_base_vertex;
227 int last_start_instance;
228 int last_sh_base_reg;
229 int last_primitive_restart_en;
230 int last_restart_index;
231 int last_gs_out_prim;
232 int last_prim;
233 int last_multi_vgt_param;
234 int last_ls_hs_config;
235 int last_rast_prim;
236 unsigned last_sc_line_stipple;
237 int current_rast_prim; /* primitive type after TES, GS */
238
239 /* Scratch buffer */
240 boolean emit_scratch_reloc;
241 unsigned scratch_waves;
242 unsigned spi_tmpring_size;
243
244 /* Emitted derived tessellation state. */
245 struct si_shader *last_ls; /* local shader (VS) */
246 struct si_shader_selector *last_tcs;
247 int last_num_tcs_input_cp;
248 int last_tes_sh_base;
249
250 /* Debug state. */
251 bool is_debug;
252 uint32_t *last_ib;
253 unsigned last_ib_dw_size;
254 struct r600_resource *last_trace_buf;
255 struct r600_resource *trace_buf;
256 unsigned trace_id;
257 };
258
259 /* cik_sdma.c */
260 void cik_sdma_copy(struct pipe_context *ctx,
261 struct pipe_resource *dst,
262 unsigned dst_level,
263 unsigned dstx, unsigned dsty, unsigned dstz,
264 struct pipe_resource *src,
265 unsigned src_level,
266 const struct pipe_box *src_box);
267
268 /* si_blit.c */
269 void si_init_blit_functions(struct si_context *sctx);
270 void si_flush_depth_textures(struct si_context *sctx,
271 struct si_textures_info *textures);
272 void si_decompress_color_textures(struct si_context *sctx,
273 struct si_textures_info *textures);
274 void si_resource_copy_region(struct pipe_context *ctx,
275 struct pipe_resource *dst,
276 unsigned dst_level,
277 unsigned dstx, unsigned dsty, unsigned dstz,
278 struct pipe_resource *src,
279 unsigned src_level,
280 const struct pipe_box *src_box);
281
282 /* si_cp_dma.c */
283 void si_copy_buffer(struct si_context *sctx,
284 struct pipe_resource *dst, struct pipe_resource *src,
285 uint64_t dst_offset, uint64_t src_offset, unsigned size,
286 bool is_framebuffer);
287 void si_init_cp_dma_functions(struct si_context *sctx);
288
289 /* si_debug.c */
290 void si_init_debug_functions(struct si_context *sctx);
291
292 /* si_dma.c */
293 void si_dma_copy(struct pipe_context *ctx,
294 struct pipe_resource *dst,
295 unsigned dst_level,
296 unsigned dstx, unsigned dsty, unsigned dstz,
297 struct pipe_resource *src,
298 unsigned src_level,
299 const struct pipe_box *src_box);
300
301 /* si_hw_context.c */
302 void si_context_gfx_flush(void *context, unsigned flags,
303 struct pipe_fence_handle **fence);
304 void si_begin_new_cs(struct si_context *ctx);
305 void si_need_cs_space(struct si_context *ctx, unsigned num_dw, boolean count_draw_in);
306
307 /* si_compute.c */
308 void si_init_compute_functions(struct si_context *sctx);
309
310 /* si_uvd.c */
311 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
312 const struct pipe_video_codec *templ);
313
314 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
315 const struct pipe_video_buffer *tmpl);
316
317 /*
318 * common helpers
319 */
320
321 static inline struct r600_resource *
322 si_resource_create_custom(struct pipe_screen *screen,
323 unsigned usage, unsigned size)
324 {
325 assert(size);
326 return r600_resource(pipe_buffer_create(screen,
327 PIPE_BIND_CUSTOM, usage, size));
328 }
329
330 static inline void
331 si_invalidate_draw_sh_constants(struct si_context *sctx)
332 {
333 sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
334 sctx->last_start_instance = -1; /* reset to an unknown value */
335 sctx->last_sh_base_reg = -1; /* reset to an unknown value */
336 }
337
338 static inline void
339 si_set_atom_dirty(struct si_context *sctx,
340 struct r600_atom *atom, bool dirty)
341 {
342 atom->dirty = dirty;
343 }
344
345 static inline void
346 si_mark_atom_dirty(struct si_context *sctx,
347 struct r600_atom *atom)
348 {
349 si_set_atom_dirty(sctx, atom, true);
350 }
351
352 #endif