radeonsi/compute: Allocate the scratch buffer during state creation
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef SI_PIPE_H
27 #define SI_PIPE_H
28
29 #include "si_state.h"
30
31 #include <llvm-c/TargetMachine.h>
32
33 #ifdef PIPE_ARCH_BIG_ENDIAN
34 #define SI_BIG_ENDIAN 1
35 #else
36 #define SI_BIG_ENDIAN 0
37 #endif
38
39 /* The base vertex and primitive restart can be any number, but we must pick
40 * one which will mean "unknown" for the purpose of state tracking and
41 * the number shouldn't be a commonly-used one. */
42 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
43 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
44
45 #define SI_TRACE_CS 0
46 #define SI_TRACE_CS_DWORDS 6
47
48 #define SI_MAX_DRAW_CS_DWORDS \
49 (/*derived prim state:*/ 6 + /*draw regs:*/ 16 + /*draw packets:*/ 31)
50
51 /* Instruction cache. */
52 #define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)
53 /* Cache used by scalar memory (SMEM) instructions. They also use TC
54 * as a second level cache, which isn't flushed by this.
55 * Other names: constant cache, data cache, DCACHE */
56 #define SI_CONTEXT_INV_KCACHE (R600_CONTEXT_PRIVATE_FLAG << 1)
57 /* Caches used by vector memory (VMEM) instructions.
58 * L1 can optionally be bypassed (GLC=1) and can only be used by shaders.
59 * L2 is used by shaders and can be used by other blocks (CP, sDMA). */
60 #define SI_CONTEXT_INV_TC_L1 (R600_CONTEXT_PRIVATE_FLAG << 2)
61 #define SI_CONTEXT_INV_TC_L2 (R600_CONTEXT_PRIVATE_FLAG << 3)
62 /* Framebuffer caches. */
63 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
64 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
65 #define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 6)
66 #define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 7)
67 /* Engine synchronization. */
68 #define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 8)
69 #define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9)
70 #define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10)
71 #define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11)
72 #define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 12)
73 /* Compute only. */
74 #define SI_CONTEXT_FLUSH_WITH_INV_L2 (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
75 #define SI_CONTEXT_FLAG_COMPUTE (R600_CONTEXT_PRIVATE_FLAG << 14)
76
77 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
78 SI_CONTEXT_FLUSH_AND_INV_CB_META | \
79 SI_CONTEXT_FLUSH_AND_INV_DB | \
80 SI_CONTEXT_FLUSH_AND_INV_DB_META)
81
82 struct si_compute;
83
84 struct si_screen {
85 struct r600_common_screen b;
86 LLVMTargetMachineRef tm;
87 };
88
89 struct si_sampler_view {
90 struct pipe_sampler_view base;
91 struct list_head list;
92 struct r600_resource *resource;
93 uint32_t state[8];
94 uint32_t fmask_state[8];
95 };
96
97 struct si_sampler_state {
98 uint32_t val[4];
99 uint32_t border_color[4];
100 };
101
102 struct si_cs_shader_state {
103 struct si_compute *program;
104 };
105
106 struct si_textures_info {
107 struct si_sampler_views views;
108 struct si_sampler_states states;
109 uint32_t depth_texture_mask; /* which textures are depth */
110 uint32_t compressed_colortex_mask;
111 };
112
113 struct si_framebuffer {
114 struct r600_atom atom;
115 struct pipe_framebuffer_state state;
116 unsigned nr_samples;
117 unsigned log_samples;
118 unsigned cb0_is_integer;
119 unsigned compressed_cb_mask;
120 unsigned export_16bpc;
121 };
122
123 #define SI_NUM_ATOMS(sctx) (sizeof((sctx)->atoms)/sizeof((sctx)->atoms.array[0]))
124
125 #define SI_NUM_SHADERS (PIPE_SHADER_GEOMETRY+1)
126
127 struct si_context {
128 struct r600_common_context b;
129 struct blitter_context *blitter;
130 void *custom_dsa_flush;
131 void *custom_blend_resolve;
132 void *custom_blend_decompress;
133 void *custom_blend_fastclear;
134 struct si_screen *screen;
135 struct si_pm4_state *init_config;
136
137 union {
138 struct {
139 /* The order matters. */
140 struct r600_atom *vertex_buffers;
141 struct r600_atom *const_buffers[SI_NUM_SHADERS];
142 struct r600_atom *rw_buffers[SI_NUM_SHADERS];
143 struct r600_atom *sampler_views[SI_NUM_SHADERS];
144 struct r600_atom *sampler_states[SI_NUM_SHADERS];
145 /* Caches must be flushed after resource descriptors are
146 * updated in memory. */
147 struct r600_atom *cache_flush;
148 struct r600_atom *streamout_begin;
149 struct r600_atom *streamout_enable; /* must be after streamout_begin */
150 struct r600_atom *framebuffer;
151 struct r600_atom *db_render_state;
152 struct r600_atom *msaa_config;
153 struct r600_atom *clip_regs;
154 } s;
155 struct r600_atom *array[0];
156 } atoms;
157
158 struct si_framebuffer framebuffer;
159 struct si_vertex_element *vertex_elements;
160 unsigned pa_sc_line_stipple;
161 unsigned pa_su_sc_mode_cntl;
162 /* for saving when using blitter */
163 struct pipe_stencil_ref stencil_ref;
164 /* shaders */
165 struct si_shader_selector *ps_shader;
166 struct si_shader_selector *gs_shader;
167 struct si_shader_selector *vs_shader;
168 struct si_cs_shader_state cs_shader_state;
169 /* shader information */
170 unsigned sprite_coord_enable;
171 bool flatshade;
172 struct si_descriptors vertex_buffers;
173 struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
174 struct si_buffer_resources rw_buffers[SI_NUM_SHADERS];
175 struct si_textures_info samplers[SI_NUM_SHADERS];
176 struct r600_resource *border_color_table;
177 unsigned border_color_offset;
178
179 struct r600_atom clip_regs;
180 struct r600_atom msaa_config;
181 int ps_iter_samples;
182
183 /* Vertex and index buffers. */
184 bool vertex_buffers_dirty;
185 struct pipe_index_buffer index_buffer;
186 struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
187
188 /* With rasterizer discard, there doesn't have to be a pixel shader.
189 * In that case, we bind this one: */
190 void *dummy_pixel_shader;
191 struct si_pm4_state *gs_on;
192 struct si_pm4_state *gs_off;
193 struct si_pm4_state *gs_rings;
194 struct r600_atom cache_flush;
195 struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
196 struct pipe_resource *esgs_ring;
197 struct pipe_resource *gsvs_ring;
198
199 /* SI state handling */
200 union si_state queued;
201 union si_state emitted;
202
203 /* DB render state. */
204 struct r600_atom db_render_state;
205 bool dbcb_depth_copy_enabled;
206 bool dbcb_stencil_copy_enabled;
207 unsigned dbcb_copy_sample;
208 bool db_inplace_flush_enabled;
209 bool db_depth_clear;
210 bool db_depth_disable_expclear;
211 unsigned ps_db_shader_control;
212
213 /* Draw state. */
214 int last_base_vertex;
215 int last_start_instance;
216 int last_sh_base_reg;
217 int last_primitive_restart_en;
218 int last_restart_index;
219 int last_gs_out_prim;
220 int last_prim;
221 int last_multi_vgt_param;
222 int last_rast_prim;
223 };
224
225 /* si_blit.c */
226 void si_init_blit_functions(struct si_context *sctx);
227 void si_flush_depth_textures(struct si_context *sctx,
228 struct si_textures_info *textures);
229 void si_decompress_color_textures(struct si_context *sctx,
230 struct si_textures_info *textures);
231 void si_resource_copy_region(struct pipe_context *ctx,
232 struct pipe_resource *dst,
233 unsigned dst_level,
234 unsigned dstx, unsigned dsty, unsigned dstz,
235 struct pipe_resource *src,
236 unsigned src_level,
237 const struct pipe_box *src_box);
238
239 /* si_dma.c */
240 void si_dma_copy(struct pipe_context *ctx,
241 struct pipe_resource *dst,
242 unsigned dst_level,
243 unsigned dstx, unsigned dsty, unsigned dstz,
244 struct pipe_resource *src,
245 unsigned src_level,
246 const struct pipe_box *src_box);
247
248 /* si_hw_context.c */
249 void si_context_gfx_flush(void *context, unsigned flags,
250 struct pipe_fence_handle **fence);
251 void si_begin_new_cs(struct si_context *ctx);
252 void si_need_cs_space(struct si_context *ctx, unsigned num_dw, boolean count_draw_in);
253
254 #if SI_TRACE_CS
255 void si_trace_emit(struct si_context *sctx);
256 #endif
257
258 /* si_compute.c */
259 void si_init_compute_functions(struct si_context *sctx);
260
261 /* si_uvd.c */
262 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
263 const struct pipe_video_codec *templ);
264
265 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
266 const struct pipe_video_buffer *tmpl);
267
268 /*
269 * common helpers
270 */
271
272 static INLINE struct r600_resource *
273 si_resource_create_custom(struct pipe_screen *screen,
274 unsigned usage, unsigned size)
275 {
276 assert(size);
277 return r600_resource(pipe_buffer_create(screen,
278 PIPE_BIND_CUSTOM, usage, size));
279 }
280
281 static INLINE void
282 si_invalidate_draw_sh_constants(struct si_context *sctx)
283 {
284 sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
285 sctx->last_start_instance = -1; /* reset to an unknown value */
286 sctx->last_sh_base_reg = -1; /* reset to an unknown value */
287 }
288
289 #endif