radeonsi: add derived tessellation state
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef SI_PIPE_H
27 #define SI_PIPE_H
28
29 #include "si_state.h"
30
31 #include <llvm-c/TargetMachine.h>
32
33 #ifdef PIPE_ARCH_BIG_ENDIAN
34 #define SI_BIG_ENDIAN 1
35 #else
36 #define SI_BIG_ENDIAN 0
37 #endif
38
39 /* The base vertex and primitive restart can be any number, but we must pick
40 * one which will mean "unknown" for the purpose of state tracking and
41 * the number shouldn't be a commonly-used one. */
42 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
43 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
44 #define SI_NUM_SMOOTH_AA_SAMPLES 8
45
46 #define SI_TRACE_CS 0
47 #define SI_TRACE_CS_DWORDS 6
48
49 #define SI_MAX_DRAW_CS_DWORDS \
50 (/*scratch:*/ 3 + /*derived prim state:*/ 3 + \
51 /*draw regs:*/ 16 + /*draw packets:*/ 31 +\
52 /*derived tess state:*/ 19)
53
54 /* Instruction cache. */
55 #define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)
56 /* Cache used by scalar memory (SMEM) instructions. They also use TC
57 * as a second level cache, which isn't flushed by this.
58 * Other names: constant cache, data cache, DCACHE */
59 #define SI_CONTEXT_INV_KCACHE (R600_CONTEXT_PRIVATE_FLAG << 1)
60 /* Caches used by vector memory (VMEM) instructions.
61 * L1 can optionally be bypassed (GLC=1) and can only be used by shaders.
62 * L2 is used by shaders and can be used by other blocks (CP, sDMA). */
63 #define SI_CONTEXT_INV_TC_L1 (R600_CONTEXT_PRIVATE_FLAG << 2)
64 #define SI_CONTEXT_INV_TC_L2 (R600_CONTEXT_PRIVATE_FLAG << 3)
65 /* Framebuffer caches. */
66 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
67 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
68 #define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 6)
69 #define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 7)
70 /* Engine synchronization. */
71 #define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 8)
72 #define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9)
73 #define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10)
74 #define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11)
75 #define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 12)
76 /* Compute only. */
77 #define SI_CONTEXT_FLUSH_WITH_INV_L2 (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
78 #define SI_CONTEXT_FLAG_COMPUTE (R600_CONTEXT_PRIVATE_FLAG << 14)
79
80 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
81 SI_CONTEXT_FLUSH_AND_INV_CB_META | \
82 SI_CONTEXT_FLUSH_AND_INV_DB | \
83 SI_CONTEXT_FLUSH_AND_INV_DB_META)
84
85 struct si_compute;
86
87 struct si_screen {
88 struct r600_common_screen b;
89 };
90
91 struct si_sampler_view {
92 struct pipe_sampler_view base;
93 struct list_head list;
94 struct r600_resource *resource;
95 /* [0..7] = image descriptor
96 * [4..7] = buffer descriptor */
97 uint32_t state[8];
98 uint32_t fmask_state[8];
99 };
100
101 struct si_sampler_state {
102 uint32_t val[4];
103 uint32_t border_color[4];
104 };
105
106 struct si_cs_shader_state {
107 struct si_compute *program;
108 };
109
110 struct si_textures_info {
111 struct si_sampler_views views;
112 struct si_sampler_states states;
113 uint32_t depth_texture_mask; /* which textures are depth */
114 uint32_t compressed_colortex_mask;
115 };
116
117 struct si_framebuffer {
118 struct r600_atom atom;
119 struct pipe_framebuffer_state state;
120 unsigned nr_samples;
121 unsigned log_samples;
122 unsigned cb0_is_integer;
123 unsigned compressed_cb_mask;
124 unsigned export_16bpc;
125 };
126
127 #define SI_NUM_ATOMS(sctx) (sizeof((sctx)->atoms)/sizeof((sctx)->atoms.array[0]))
128
129 struct si_context {
130 struct r600_common_context b;
131 struct blitter_context *blitter;
132 void *custom_dsa_flush;
133 void *custom_blend_resolve;
134 void *custom_blend_decompress;
135 void *custom_blend_fastclear;
136 void *pstipple_sampler_state;
137 struct si_screen *screen;
138 struct si_pm4_state *init_config;
139 struct pipe_fence_handle *last_gfx_fence;
140 struct si_shader_selector *fixed_func_tcs_shader;
141
142 union {
143 struct {
144 /* The order matters. */
145 struct r600_atom *const_buffers[SI_NUM_SHADERS];
146 struct r600_atom *rw_buffers[SI_NUM_SHADERS];
147 struct r600_atom *sampler_views[SI_NUM_SHADERS];
148 struct r600_atom *sampler_states[SI_NUM_SHADERS];
149 /* Caches must be flushed after resource descriptors are
150 * updated in memory. */
151 struct r600_atom *cache_flush;
152 struct r600_atom *streamout_begin;
153 struct r600_atom *streamout_enable; /* must be after streamout_begin */
154 struct r600_atom *framebuffer;
155 struct r600_atom *msaa_sample_locs;
156 struct r600_atom *db_render_state;
157 struct r600_atom *msaa_config;
158 struct r600_atom *clip_regs;
159 struct r600_atom *shader_userdata;
160 } s;
161 struct r600_atom *array[0];
162 } atoms;
163
164 struct si_framebuffer framebuffer;
165 struct si_vertex_element *vertex_elements;
166 /* for saving when using blitter */
167 struct pipe_stencil_ref stencil_ref;
168 /* shaders */
169 struct si_shader_selector *ps_shader;
170 struct si_shader_selector *gs_shader;
171 struct si_shader_selector *vs_shader;
172 struct si_shader_selector *tcs_shader;
173 struct si_shader_selector *tes_shader;
174 struct si_cs_shader_state cs_shader_state;
175 struct si_shader_data shader_userdata;
176 /* shader information */
177 unsigned sprite_coord_enable;
178 bool flatshade;
179 struct si_descriptors vertex_buffers;
180 struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
181 struct si_buffer_resources rw_buffers[SI_NUM_SHADERS];
182 struct si_textures_info samplers[SI_NUM_SHADERS];
183 struct r600_resource *scratch_buffer;
184 struct r600_resource *border_color_table;
185 unsigned border_color_offset;
186
187 struct r600_atom clip_regs;
188 struct r600_atom msaa_sample_locs;
189 struct r600_atom msaa_config;
190 int ps_iter_samples;
191 bool smoothing_enabled;
192
193 /* Vertex and index buffers. */
194 bool vertex_buffers_dirty;
195 struct pipe_index_buffer index_buffer;
196 struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
197
198 /* With rasterizer discard, there doesn't have to be a pixel shader.
199 * In that case, we bind this one: */
200 void *dummy_pixel_shader;
201 struct r600_atom cache_flush;
202 struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
203
204 /* VGT states. */
205 struct si_pm4_state *vgt_shader_config[4];
206 struct si_pm4_state *gs_rings;
207 struct pipe_resource *esgs_ring;
208 struct pipe_resource *gsvs_ring;
209 struct si_pm4_state *tf_state;
210 struct pipe_resource *tf_ring;
211
212 LLVMTargetMachineRef tm;
213
214 /* SI state handling */
215 union si_state queued;
216 union si_state emitted;
217
218 /* DB render state. */
219 struct r600_atom db_render_state;
220 bool dbcb_depth_copy_enabled;
221 bool dbcb_stencil_copy_enabled;
222 unsigned dbcb_copy_sample;
223 bool db_inplace_flush_enabled;
224 bool db_depth_clear;
225 bool db_depth_disable_expclear;
226 unsigned ps_db_shader_control;
227
228 /* Emitted draw state. */
229 int last_base_vertex;
230 int last_start_instance;
231 int last_sh_base_reg;
232 int last_primitive_restart_en;
233 int last_restart_index;
234 int last_gs_out_prim;
235 int last_prim;
236 int last_multi_vgt_param;
237 int last_rast_prim;
238 unsigned last_sc_line_stipple;
239 int current_rast_prim; /* primitive type after TES, GS */
240
241 /* Scratch buffer */
242 boolean emit_scratch_reloc;
243 unsigned scratch_waves;
244 unsigned spi_tmpring_size;
245
246 /* Emitted derived tessellation state. */
247 struct si_shader *last_ls; /* local shader (VS) */
248 struct si_shader_selector *last_tcs;
249 int last_num_tcs_input_cp;
250 int last_tes_sh_base;
251 };
252
253 /* cik_sdma.c */
254 void cik_sdma_copy(struct pipe_context *ctx,
255 struct pipe_resource *dst,
256 unsigned dst_level,
257 unsigned dstx, unsigned dsty, unsigned dstz,
258 struct pipe_resource *src,
259 unsigned src_level,
260 const struct pipe_box *src_box);
261
262 /* si_blit.c */
263 void si_init_blit_functions(struct si_context *sctx);
264 void si_flush_depth_textures(struct si_context *sctx,
265 struct si_textures_info *textures);
266 void si_decompress_color_textures(struct si_context *sctx,
267 struct si_textures_info *textures);
268 void si_resource_copy_region(struct pipe_context *ctx,
269 struct pipe_resource *dst,
270 unsigned dst_level,
271 unsigned dstx, unsigned dsty, unsigned dstz,
272 struct pipe_resource *src,
273 unsigned src_level,
274 const struct pipe_box *src_box);
275
276 /* si_dma.c */
277 void si_dma_copy(struct pipe_context *ctx,
278 struct pipe_resource *dst,
279 unsigned dst_level,
280 unsigned dstx, unsigned dsty, unsigned dstz,
281 struct pipe_resource *src,
282 unsigned src_level,
283 const struct pipe_box *src_box);
284
285 /* si_hw_context.c */
286 void si_context_gfx_flush(void *context, unsigned flags,
287 struct pipe_fence_handle **fence);
288 void si_begin_new_cs(struct si_context *ctx);
289 void si_need_cs_space(struct si_context *ctx, unsigned num_dw, boolean count_draw_in);
290
291 #if SI_TRACE_CS
292 void si_trace_emit(struct si_context *sctx);
293 #endif
294
295 /* si_compute.c */
296 void si_init_compute_functions(struct si_context *sctx);
297
298 /* si_uvd.c */
299 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
300 const struct pipe_video_codec *templ);
301
302 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
303 const struct pipe_video_buffer *tmpl);
304
305 /*
306 * common helpers
307 */
308
309 static inline struct r600_resource *
310 si_resource_create_custom(struct pipe_screen *screen,
311 unsigned usage, unsigned size)
312 {
313 assert(size);
314 return r600_resource(pipe_buffer_create(screen,
315 PIPE_BIND_CUSTOM, usage, size));
316 }
317
318 static inline void
319 si_invalidate_draw_sh_constants(struct si_context *sctx)
320 {
321 sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
322 sctx->last_start_instance = -1; /* reset to an unknown value */
323 sctx->last_sh_base_reg = -1; /* reset to an unknown value */
324 }
325
326 #endif