src/gallium/drivers/radeonsi/si_pipe.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef SI_PIPE_H
  27 #define SI_PIPE_H
  28
  29 #include "si_state.h"
  30
  31 #include <llvm-c/TargetMachine.h>
  32
  33 #ifdef PIPE_ARCH_BIG_ENDIAN
  34 #define SI_BIG_ENDIAN 1
  35 #else
  36 #define SI_BIG_ENDIAN 0
  37 #endif
  38
  39 /* The base vertex and primitive restart can be any number, but we must pick
  40  * one which will mean "unknown" for the purpose of state tracking and
  41  * the number shouldn't be a commonly-used one. */
  42 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
  43 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
  44 #define SI_NUM_SMOOTH_AA_SAMPLES 8
  45
  46 /* Instruction cache. */
  47 #define SI_CONTEXT_INV_ICACHE           (R600_CONTEXT_PRIVATE_FLAG << 0)
  48 /* Cache used by scalar memory (SMEM) instructions. They also use TC
  49  * as a second level cache, which isn't flushed by this.
  50  * Other names: constant cache, data cache, DCACHE */
  51 #define SI_CONTEXT_INV_KCACHE           (R600_CONTEXT_PRIVATE_FLAG << 1)
  52 /* Caches used by vector memory (VMEM) instructions.
  53  * L1 can optionally be bypassed (GLC=1) and can only be used by shaders.
  54  * L2 is used by shaders and can be used by other blocks (CP, sDMA). */
  55 #define SI_CONTEXT_INV_TC_L1            (R600_CONTEXT_PRIVATE_FLAG << 2)
  56 #define SI_CONTEXT_INV_TC_L2            (R600_CONTEXT_PRIVATE_FLAG << 3)
  57 /* Framebuffer caches. */
  58 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
  59 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
  60 #define SI_CONTEXT_FLUSH_AND_INV_DB     (R600_CONTEXT_PRIVATE_FLAG << 6)
  61 #define SI_CONTEXT_FLUSH_AND_INV_CB     (R600_CONTEXT_PRIVATE_FLAG << 7)
  62 /* Engine synchronization. */
  63 #define SI_CONTEXT_VS_PARTIAL_FLUSH     (R600_CONTEXT_PRIVATE_FLAG << 8)
  64 #define SI_CONTEXT_PS_PARTIAL_FLUSH     (R600_CONTEXT_PRIVATE_FLAG << 9)
  65 #define SI_CONTEXT_CS_PARTIAL_FLUSH     (R600_CONTEXT_PRIVATE_FLAG << 10)
  66 #define SI_CONTEXT_VGT_FLUSH            (R600_CONTEXT_PRIVATE_FLAG << 11)
  67 #define SI_CONTEXT_VGT_STREAMOUT_SYNC   (R600_CONTEXT_PRIVATE_FLAG << 12)
  68 /* Compute only. */
  69 #define SI_CONTEXT_FLUSH_WITH_INV_L2    (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
  70 #define SI_CONTEXT_FLAG_COMPUTE         (R600_CONTEXT_PRIVATE_FLAG << 14)
  71
  72 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
  73                                               SI_CONTEXT_FLUSH_AND_INV_CB_META | \
  74                                               SI_CONTEXT_FLUSH_AND_INV_DB | \
  75                                               SI_CONTEXT_FLUSH_AND_INV_DB_META)
  76
  77 #define SI_ENCODE_TRACE_POINT(id)       (0xcafe0000 | ((id) & 0xffff))
  78 #define SI_IS_TRACE_POINT(x)            (((x) & 0xcafe0000) == 0xcafe0000)
  79 #define SI_GET_TRACE_POINT_ID(x)        ((x) & 0xffff)
  80
  81 #define SI_MAX_VIEWPORTS        16
  82 #define SI_MAX_BORDER_COLORS    4096
  83
  84 struct si_compute;
  85
  86 struct si_screen {
  87         struct r600_common_screen       b;
  88 };
  89
  90 struct si_blend_color {
  91         struct r600_atom                atom;
  92         struct pipe_blend_color         state;
  93 };
  94
  95 struct si_sampler_view {
  96         struct pipe_sampler_view        base;
  97         struct list_head                list;
  98         struct r600_resource            *resource;
  99         /* [0..7] = image descriptor
 100          * [4..7] = buffer descriptor */
 101         uint32_t                        state[8];
 102         uint32_t                        fmask_state[8];
 103         bool is_stencil_sampler;
 104 };
 105
 106 struct si_sampler_state {
 107         uint32_t                        val[4];
 108 };
 109
 110 struct si_cs_shader_state {
 111         struct si_compute               *program;
 112 };
 113
 114 struct si_textures_info {
 115         struct si_sampler_views         views;
 116         struct si_sampler_states        states;
 117         uint32_t                        depth_texture_mask; /* which textures are depth */
 118         uint32_t                        compressed_colortex_mask;
 119 };
 120
 121 struct si_framebuffer {
 122         struct r600_atom                atom;
 123         struct pipe_framebuffer_state   state;
 124         unsigned                        nr_samples;
 125         unsigned                        log_samples;
 126         unsigned                        cb0_is_integer;
 127         unsigned                        compressed_cb_mask;
 128         unsigned                        export_16bpc;
 129         unsigned                        dirty_cbufs;
 130         bool                            dirty_zsbuf;
 131 };
 132
 133 struct si_clip_state {
 134         struct r600_atom                atom;
 135         struct pipe_clip_state          state;
 136 };
 137
 138 struct si_sample_mask {
 139         struct r600_atom        atom;
 140         uint16_t                sample_mask;
 141 };
 142
 143 struct si_scissors {
 144         struct r600_atom                atom;
 145         unsigned                        dirty_mask;
 146         struct pipe_scissor_state       states[SI_MAX_VIEWPORTS];
 147 };
 148
 149 struct si_viewports {
 150         struct r600_atom                atom;
 151         unsigned                        dirty_mask;
 152         struct pipe_viewport_state      states[SI_MAX_VIEWPORTS];
 153 };
 154
 155 /* A shader state consists of the shader selector, which is a constant state
 156  * object shared by multiple contexts and shouldn't be modified, and
 157  * the current shader variant selected for this context.
 158  */
 159 struct si_shader_ctx_state {
 160         struct si_shader_selector       *cso;
 161         struct si_shader                *current;
 162 };
 163
 164 struct si_context {
 165         struct r600_common_context      b;
 166         struct blitter_context          *blitter;
 167         void                            *custom_dsa_flush;
 168         void                            *custom_blend_resolve;
 169         void                            *custom_blend_decompress;
 170         void                            *custom_blend_fastclear;
 171         void                            *pstipple_sampler_state;
 172         struct si_screen                *screen;
 173         struct pipe_fence_handle        *last_gfx_fence;
 174         struct si_shader_ctx_state      fixed_func_tcs_shader;
 175         LLVMTargetMachineRef            tm;
 176
 177         /* Atoms (direct states). */
 178         union si_state_atoms            atoms;
 179         unsigned                        dirty_atoms; /* mask */
 180         /* PM4 states (precomputed immutable states) */
 181         union si_state                  queued;
 182         union si_state                  emitted;
 183
 184         /* Atom declarations. */
 185         struct r600_atom                cache_flush;
 186         struct si_framebuffer           framebuffer;
 187         struct r600_atom                msaa_sample_locs;
 188         struct r600_atom                db_render_state;
 189         struct r600_atom                msaa_config;
 190         struct si_sample_mask           sample_mask;
 191         struct r600_atom                cb_target_mask;
 192         struct si_blend_color           blend_color;
 193         struct r600_atom                clip_regs;
 194         struct si_clip_state            clip_state;
 195         struct si_shader_data           shader_userdata;
 196         struct si_scissors              scissors;
 197         struct si_viewports             viewports;
 198         struct si_stencil_ref           stencil_ref;
 199         struct r600_atom                spi_map;
 200         struct r600_atom                spi_ps_input;
 201
 202         /* Precomputed states. */
 203         struct si_pm4_state             *init_config;
 204         bool                            init_config_has_vgt_flush;
 205         struct si_pm4_state             *vgt_shader_config[4];
 206         /* With rasterizer discard, there doesn't have to be a pixel shader.
 207          * In that case, we bind this one: */
 208         void                            *dummy_pixel_shader;
 209
 210         /* shaders */
 211         struct si_shader_ctx_state      ps_shader;
 212         struct si_shader_ctx_state      gs_shader;
 213         struct si_shader_ctx_state      vs_shader;
 214         struct si_shader_ctx_state      tcs_shader;
 215         struct si_shader_ctx_state      tes_shader;
 216         struct si_cs_shader_state       cs_shader_state;
 217
 218         /* shader information */
 219         struct si_vertex_element        *vertex_elements;
 220         unsigned                        sprite_coord_enable;
 221         bool                            flatshade;
 222         bool                            force_persample_interp;
 223
 224         /* shader descriptors */
 225         struct si_descriptors           vertex_buffers;
 226         struct si_buffer_resources      const_buffers[SI_NUM_SHADERS];
 227         struct si_buffer_resources      rw_buffers[SI_NUM_SHADERS];
 228         struct si_textures_info         samplers[SI_NUM_SHADERS];
 229
 230         /* other shader resources */
 231         struct pipe_constant_buffer     null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
 232         struct pipe_resource            *esgs_ring;
 233         struct pipe_resource            *gsvs_ring;
 234         struct pipe_resource            *tf_ring;
 235         union pipe_color_union          *border_color_table; /* in CPU memory, any endian */
 236         struct r600_resource            *border_color_buffer;
 237         union pipe_color_union          *border_color_map; /* in VRAM (slow access), little endian */
 238         unsigned                        border_color_count;
 239
 240         /* Vertex and index buffers. */
 241         bool                            vertex_buffers_dirty;
 242         struct pipe_index_buffer        index_buffer;
 243         struct pipe_vertex_buffer       vertex_buffer[SI_NUM_VERTEX_BUFFERS];
 244
 245         /* MSAA config state. */
 246         int                             ps_iter_samples;
 247         bool                            smoothing_enabled;
 248
 249         /* DB render state. */
 250         bool                    dbcb_depth_copy_enabled;
 251         bool                    dbcb_stencil_copy_enabled;
 252         unsigned                dbcb_copy_sample;
 253         bool                    db_flush_depth_inplace;
 254         bool                    db_flush_stencil_inplace;
 255         bool                    db_depth_clear;
 256         bool                    db_depth_disable_expclear;
 257         unsigned                ps_db_shader_control;
 258
 259         /* Emitted draw state. */
 260         int                     last_base_vertex;
 261         int                     last_start_instance;
 262         int                     last_sh_base_reg;
 263         int                     last_primitive_restart_en;
 264         int                     last_restart_index;
 265         int                     last_gs_out_prim;
 266         int                     last_prim;
 267         int                     last_multi_vgt_param;
 268         int                     last_ls_hs_config;
 269         int                     last_rast_prim;
 270         unsigned                last_sc_line_stipple;
 271         int                     current_rast_prim; /* primitive type after TES, GS */
 272         unsigned                last_gsvs_itemsize;
 273
 274         /* Scratch buffer */
 275         struct r600_resource    *scratch_buffer;
 276         boolean                 emit_scratch_reloc;
 277         unsigned                scratch_waves;
 278         unsigned                spi_tmpring_size;
 279
 280         /* Emitted derived tessellation state. */
 281         struct si_shader        *last_ls; /* local shader (VS) */
 282         struct si_shader_selector *last_tcs;
 283         int                     last_num_tcs_input_cp;
 284         int                     last_tes_sh_base;
 285
 286         /* Debug state. */
 287         bool                    is_debug;
 288         uint32_t                *last_ib;
 289         unsigned                last_ib_dw_size;
 290         struct r600_resource    *last_trace_buf;
 291         struct r600_resource    *trace_buf;
 292         unsigned                trace_id;
 293         uint64_t                dmesg_timestamp;
 294         unsigned                last_bo_count;
 295         struct radeon_bo_list_item *last_bo_list;
 296 };
 297
 298 /* cik_sdma.c */
 299 void cik_sdma_copy(struct pipe_context *ctx,
 300                    struct pipe_resource *dst,
 301                    unsigned dst_level,
 302                    unsigned dstx, unsigned dsty, unsigned dstz,
 303                    struct pipe_resource *src,
 304                    unsigned src_level,
 305                    const struct pipe_box *src_box);
 306
 307 /* si_blit.c */
 308 void si_init_blit_functions(struct si_context *sctx);
 309 void si_flush_depth_textures(struct si_context *sctx,
 310                              struct si_textures_info *textures);
 311 void si_decompress_color_textures(struct si_context *sctx,
 312                                   struct si_textures_info *textures);
 313 void si_resource_copy_region(struct pipe_context *ctx,
 314                              struct pipe_resource *dst,
 315                              unsigned dst_level,
 316                              unsigned dstx, unsigned dsty, unsigned dstz,
 317                              struct pipe_resource *src,
 318                              unsigned src_level,
 319                              const struct pipe_box *src_box);
 320
 321 /* si_cp_dma.c */
 322 void si_copy_buffer(struct si_context *sctx,
 323                     struct pipe_resource *dst, struct pipe_resource *src,
 324                     uint64_t dst_offset, uint64_t src_offset, unsigned size,
 325                     bool is_framebuffer);
 326 void si_init_cp_dma_functions(struct si_context *sctx);
 327
 328 /* si_debug.c */
 329 void si_init_debug_functions(struct si_context *sctx);
 330 void si_check_vm_faults(struct si_context *sctx);
 331
 332 /* si_dma.c */
 333 void si_dma_copy(struct pipe_context *ctx,
 334                  struct pipe_resource *dst,
 335                  unsigned dst_level,
 336                  unsigned dstx, unsigned dsty, unsigned dstz,
 337                  struct pipe_resource *src,
 338                  unsigned src_level,
 339                  const struct pipe_box *src_box);
 340
 341 /* si_hw_context.c */
 342 void si_context_gfx_flush(void *context, unsigned flags,
 343                           struct pipe_fence_handle **fence);
 344 void si_begin_new_cs(struct si_context *ctx);
 345 void si_need_cs_space(struct si_context *ctx);
 346
 347 /* si_compute.c */
 348 void si_init_compute_functions(struct si_context *sctx);
 349
 350 /* si_uvd.c */
 351 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
 352                                                const struct pipe_video_codec *templ);
 353
 354 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
 355                                                  const struct pipe_video_buffer *tmpl);
 356
 357 /*
 358  * common helpers
 359  */
 360
 361 static inline struct r600_resource *
 362 si_resource_create_custom(struct pipe_screen *screen,
 363                           unsigned usage, unsigned size)
 364 {
 365         assert(size);
 366         return r600_resource(pipe_buffer_create(screen,
 367                 PIPE_BIND_CUSTOM, usage, size));
 368 }
 369
 370 static inline void
 371 si_invalidate_draw_sh_constants(struct si_context *sctx)
 372 {
 373         sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
 374         sctx->last_start_instance = -1; /* reset to an unknown value */
 375         sctx->last_sh_base_reg = -1; /* reset to an unknown value */
 376 }
 377
 378 static inline void
 379 si_set_atom_dirty(struct si_context *sctx,
 380                   struct r600_atom *atom, bool dirty)
 381 {
 382         unsigned bit = 1 << (atom->id - 1);
 383
 384         if (dirty)
 385                 sctx->dirty_atoms |= bit;
 386         else
 387                 sctx->dirty_atoms &= ~bit;
 388 }
 389
 390 static inline void
 391 si_mark_atom_dirty(struct si_context *sctx,
 392                    struct r600_atom *atom)
 393 {
 394         si_set_atom_dirty(sctx, atom, true);
 395 }
 396
 397 #endif