radeonsi: implement AMD_performance_monitor for CIK+
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef SI_PIPE_H
27 #define SI_PIPE_H
28
29 #include "si_state.h"
30
31 #include <llvm-c/TargetMachine.h>
32
33 #ifdef PIPE_ARCH_BIG_ENDIAN
34 #define SI_BIG_ENDIAN 1
35 #else
36 #define SI_BIG_ENDIAN 0
37 #endif
38
39 /* The base vertex and primitive restart can be any number, but we must pick
40 * one which will mean "unknown" for the purpose of state tracking and
41 * the number shouldn't be a commonly-used one. */
42 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
43 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
44 #define SI_NUM_SMOOTH_AA_SAMPLES 8
45 #define SI_GS_PER_ES 128
46
47 /* Instruction cache. */
48 #define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)
49 /* SMEM L1, other names: KCACHE, constant cache, DCACHE, data cache */
50 #define SI_CONTEXT_INV_SMEM_L1 (R600_CONTEXT_PRIVATE_FLAG << 1)
51 /* VMEM L1 can optionally be bypassed (GLC=1). Other names: TC L1 */
52 #define SI_CONTEXT_INV_VMEM_L1 (R600_CONTEXT_PRIVATE_FLAG << 2)
53 /* Used by everything except CB/DB, can be bypassed (SLC=1). Other names: TC L2 */
54 #define SI_CONTEXT_INV_GLOBAL_L2 (R600_CONTEXT_PRIVATE_FLAG << 3)
55 /* Framebuffer caches. */
56 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
57 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
58 #define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 6)
59 #define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 7)
60 /* Engine synchronization. */
61 #define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 8)
62 #define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9)
63 #define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10)
64 #define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11)
65 #define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 12)
66 /* Compute only. */
67 #define SI_CONTEXT_FLUSH_WITH_INV_L2 (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
68 #define SI_CONTEXT_FLAG_COMPUTE (R600_CONTEXT_PRIVATE_FLAG << 14)
69
70 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
71 SI_CONTEXT_FLUSH_AND_INV_CB_META | \
72 SI_CONTEXT_FLUSH_AND_INV_DB | \
73 SI_CONTEXT_FLUSH_AND_INV_DB_META)
74
75 #define SI_ENCODE_TRACE_POINT(id) (0xcafe0000 | ((id) & 0xffff))
76 #define SI_IS_TRACE_POINT(x) (((x) & 0xcafe0000) == 0xcafe0000)
77 #define SI_GET_TRACE_POINT_ID(x) ((x) & 0xffff)
78
79 #define SI_MAX_VIEWPORTS 16
80 #define SI_MAX_BORDER_COLORS 4096
81
82 struct si_compute;
83
84 struct si_screen {
85 struct r600_common_screen b;
86 unsigned gs_table_depth;
87 };
88
89 struct si_blend_color {
90 struct r600_atom atom;
91 struct pipe_blend_color state;
92 };
93
94 struct si_sampler_view {
95 struct pipe_sampler_view base;
96 struct list_head list;
97 struct r600_resource *resource;
98 struct r600_resource *dcc_buffer;
99 /* [0..7] = image descriptor
100 * [4..7] = buffer descriptor */
101 uint32_t state[8];
102 uint32_t fmask_state[8];
103 bool is_stencil_sampler;
104 };
105
106 struct si_sampler_state {
107 uint32_t val[4];
108 };
109
110 struct si_cs_shader_state {
111 struct si_compute *program;
112 };
113
114 struct si_textures_info {
115 struct si_sampler_views views;
116 struct si_sampler_states states;
117 uint32_t depth_texture_mask; /* which textures are depth */
118 uint32_t compressed_colortex_mask;
119 };
120
121 struct si_framebuffer {
122 struct r600_atom atom;
123 struct pipe_framebuffer_state state;
124 unsigned nr_samples;
125 unsigned log_samples;
126 unsigned cb0_is_integer;
127 unsigned compressed_cb_mask;
128 unsigned export_16bpc;
129 unsigned dirty_cbufs;
130 bool dirty_zsbuf;
131 };
132
133 struct si_clip_state {
134 struct r600_atom atom;
135 struct pipe_clip_state state;
136 };
137
138 struct si_sample_mask {
139 struct r600_atom atom;
140 uint16_t sample_mask;
141 };
142
143 struct si_scissors {
144 struct r600_atom atom;
145 unsigned dirty_mask;
146 struct pipe_scissor_state states[SI_MAX_VIEWPORTS];
147 };
148
149 struct si_viewports {
150 struct r600_atom atom;
151 unsigned dirty_mask;
152 struct pipe_viewport_state states[SI_MAX_VIEWPORTS];
153 };
154
155 /* A shader state consists of the shader selector, which is a constant state
156 * object shared by multiple contexts and shouldn't be modified, and
157 * the current shader variant selected for this context.
158 */
159 struct si_shader_ctx_state {
160 struct si_shader_selector *cso;
161 struct si_shader *current;
162 };
163
164 struct si_context {
165 struct r600_common_context b;
166 struct blitter_context *blitter;
167 void *custom_dsa_flush;
168 void *custom_blend_resolve;
169 void *custom_blend_decompress;
170 void *custom_blend_fastclear;
171 void *pstipple_sampler_state;
172 struct si_screen *screen;
173 struct pipe_fence_handle *last_gfx_fence;
174 struct si_shader_ctx_state fixed_func_tcs_shader;
175 LLVMTargetMachineRef tm;
176 bool gfx_flush_in_progress;
177
178 /* Atoms (direct states). */
179 union si_state_atoms atoms;
180 unsigned dirty_atoms; /* mask */
181 /* PM4 states (precomputed immutable states) */
182 union si_state queued;
183 union si_state emitted;
184
185 /* Atom declarations. */
186 struct r600_atom cache_flush;
187 struct si_framebuffer framebuffer;
188 struct r600_atom msaa_sample_locs;
189 struct r600_atom db_render_state;
190 struct r600_atom msaa_config;
191 struct si_sample_mask sample_mask;
192 struct r600_atom cb_target_mask;
193 struct si_blend_color blend_color;
194 struct r600_atom clip_regs;
195 struct si_clip_state clip_state;
196 struct si_shader_data shader_userdata;
197 struct si_scissors scissors;
198 struct si_viewports viewports;
199 struct si_stencil_ref stencil_ref;
200 struct r600_atom spi_map;
201 struct r600_atom spi_ps_input;
202
203 /* Precomputed states. */
204 struct si_pm4_state *init_config;
205 struct si_pm4_state *init_config_gs_rings;
206 bool init_config_has_vgt_flush;
207 struct si_pm4_state *vgt_shader_config[4];
208
209 /* shaders */
210 struct si_shader_ctx_state ps_shader;
211 struct si_shader_ctx_state gs_shader;
212 struct si_shader_ctx_state vs_shader;
213 struct si_shader_ctx_state tcs_shader;
214 struct si_shader_ctx_state tes_shader;
215 struct si_cs_shader_state cs_shader_state;
216
217 /* shader information */
218 struct si_vertex_element *vertex_elements;
219 unsigned sprite_coord_enable;
220 bool flatshade;
221 bool force_persample_interp;
222
223 /* shader descriptors */
224 struct si_descriptors vertex_buffers;
225 struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
226 struct si_buffer_resources rw_buffers[SI_NUM_SHADERS];
227 struct si_textures_info samplers[SI_NUM_SHADERS];
228
229 /* other shader resources */
230 struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
231 struct pipe_resource *esgs_ring;
232 struct pipe_resource *gsvs_ring;
233 struct pipe_resource *tf_ring;
234 union pipe_color_union *border_color_table; /* in CPU memory, any endian */
235 struct r600_resource *border_color_buffer;
236 union pipe_color_union *border_color_map; /* in VRAM (slow access), little endian */
237 unsigned border_color_count;
238
239 /* Vertex and index buffers. */
240 bool vertex_buffers_dirty;
241 struct pipe_index_buffer index_buffer;
242 struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
243
244 /* MSAA config state. */
245 int ps_iter_samples;
246 bool smoothing_enabled;
247
248 /* DB render state. */
249 bool dbcb_depth_copy_enabled;
250 bool dbcb_stencil_copy_enabled;
251 unsigned dbcb_copy_sample;
252 bool db_flush_depth_inplace;
253 bool db_flush_stencil_inplace;
254 bool db_depth_clear;
255 bool db_depth_disable_expclear;
256 unsigned ps_db_shader_control;
257
258 /* Emitted draw state. */
259 int last_base_vertex;
260 int last_start_instance;
261 int last_sh_base_reg;
262 int last_primitive_restart_en;
263 int last_restart_index;
264 int last_gs_out_prim;
265 int last_prim;
266 int last_multi_vgt_param;
267 int last_ls_hs_config;
268 int last_rast_prim;
269 unsigned last_sc_line_stipple;
270 int current_rast_prim; /* primitive type after TES, GS */
271 unsigned last_gsvs_itemsize;
272
273 /* Scratch buffer */
274 struct r600_resource *scratch_buffer;
275 boolean emit_scratch_reloc;
276 unsigned scratch_waves;
277 unsigned spi_tmpring_size;
278
279 /* Emitted derived tessellation state. */
280 struct si_shader *last_ls; /* local shader (VS) */
281 struct si_shader_selector *last_tcs;
282 int last_num_tcs_input_cp;
283 int last_tes_sh_base;
284
285 /* Debug state. */
286 bool is_debug;
287 uint32_t *last_ib;
288 unsigned last_ib_dw_size;
289 struct r600_resource *last_trace_buf;
290 struct r600_resource *trace_buf;
291 unsigned trace_id;
292 uint64_t dmesg_timestamp;
293 unsigned last_bo_count;
294 struct radeon_bo_list_item *last_bo_list;
295 };
296
297 /* cik_sdma.c */
298 void cik_sdma_copy(struct pipe_context *ctx,
299 struct pipe_resource *dst,
300 unsigned dst_level,
301 unsigned dstx, unsigned dsty, unsigned dstz,
302 struct pipe_resource *src,
303 unsigned src_level,
304 const struct pipe_box *src_box);
305
306 /* si_blit.c */
307 void si_init_blit_functions(struct si_context *sctx);
308 void si_flush_depth_textures(struct si_context *sctx,
309 struct si_textures_info *textures);
310 void si_decompress_color_textures(struct si_context *sctx,
311 struct si_textures_info *textures);
312 void si_resource_copy_region(struct pipe_context *ctx,
313 struct pipe_resource *dst,
314 unsigned dst_level,
315 unsigned dstx, unsigned dsty, unsigned dstz,
316 struct pipe_resource *src,
317 unsigned src_level,
318 const struct pipe_box *src_box);
319
320 /* si_cp_dma.c */
321 void si_copy_buffer(struct si_context *sctx,
322 struct pipe_resource *dst, struct pipe_resource *src,
323 uint64_t dst_offset, uint64_t src_offset, unsigned size,
324 bool is_framebuffer);
325 void si_init_cp_dma_functions(struct si_context *sctx);
326
327 /* si_debug.c */
328 void si_init_debug_functions(struct si_context *sctx);
329 void si_check_vm_faults(struct si_context *sctx);
330
331 /* si_dma.c */
332 void si_dma_copy(struct pipe_context *ctx,
333 struct pipe_resource *dst,
334 unsigned dst_level,
335 unsigned dstx, unsigned dsty, unsigned dstz,
336 struct pipe_resource *src,
337 unsigned src_level,
338 const struct pipe_box *src_box);
339
340 /* si_hw_context.c */
341 void si_context_gfx_flush(void *context, unsigned flags,
342 struct pipe_fence_handle **fence);
343 void si_begin_new_cs(struct si_context *ctx);
344 void si_need_cs_space(struct si_context *ctx);
345
346 /* si_compute.c */
347 void si_init_compute_functions(struct si_context *sctx);
348
349 /* si_perfcounters.c */
350 void si_init_perfcounters(struct si_screen *screen);
351
352 /* si_uvd.c */
353 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
354 const struct pipe_video_codec *templ);
355
356 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
357 const struct pipe_video_buffer *tmpl);
358
359 /*
360 * common helpers
361 */
362
363 static inline struct r600_resource *
364 si_resource_create_custom(struct pipe_screen *screen,
365 unsigned usage, unsigned size)
366 {
367 assert(size);
368 return r600_resource(pipe_buffer_create(screen,
369 PIPE_BIND_CUSTOM, usage, size));
370 }
371
372 static inline void
373 si_invalidate_draw_sh_constants(struct si_context *sctx)
374 {
375 sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
376 sctx->last_start_instance = -1; /* reset to an unknown value */
377 sctx->last_sh_base_reg = -1; /* reset to an unknown value */
378 }
379
380 static inline void
381 si_set_atom_dirty(struct si_context *sctx,
382 struct r600_atom *atom, bool dirty)
383 {
384 unsigned bit = 1 << (atom->id - 1);
385
386 if (dirty)
387 sctx->dirty_atoms |= bit;
388 else
389 sctx->dirty_atoms &= ~bit;
390 }
391
392 static inline void
393 si_mark_atom_dirty(struct si_context *sctx,
394 struct r600_atom *atom)
395 {
396 si_set_atom_dirty(sctx, atom, true);
397 }
398
399 #endif