radeonsi: generate derived and draw-related registers directly in the CS
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef SI_PIPE_H
27 #define SI_PIPE_H
28
29 #include "si_state.h"
30
31 #ifdef PIPE_ARCH_BIG_ENDIAN
32 #define SI_BIG_ENDIAN 1
33 #else
34 #define SI_BIG_ENDIAN 0
35 #endif
36
37 #define SI_TRACE_CS 0
38 #define SI_TRACE_CS_DWORDS 6
39
40 #define SI_MAX_DRAW_CS_DWORDS \
41 (/*clip + derived prim state:*/ 12 + /*draw regs:*/ 16 + /*draw packets:*/ 31)
42
43 struct si_compute;
44
45 struct si_screen {
46 struct r600_common_screen b;
47 };
48
49 struct si_sampler_view {
50 struct pipe_sampler_view base;
51 struct list_head list;
52 struct r600_resource *resource;
53 uint32_t state[8];
54 uint32_t fmask_state[8];
55 };
56
57 struct si_sampler_state {
58 uint32_t val[4];
59 uint32_t border_color[4];
60 };
61
62 struct si_cs_shader_state {
63 struct si_compute *program;
64 };
65
66 struct si_textures_info {
67 struct si_sampler_views views;
68 struct si_sampler_states states;
69 uint32_t depth_texture_mask; /* which textures are depth */
70 uint32_t compressed_colortex_mask;
71 };
72
73 struct si_framebuffer {
74 struct r600_atom atom;
75 struct pipe_framebuffer_state state;
76 unsigned nr_samples;
77 unsigned log_samples;
78 unsigned cb0_is_integer;
79 unsigned compressed_cb_mask;
80 unsigned export_16bpc;
81 };
82
83 #define SI_NUM_ATOMS(sctx) (sizeof((sctx)->atoms)/sizeof((sctx)->atoms.array[0]))
84
85 #define SI_NUM_SHADERS (PIPE_SHADER_GEOMETRY+1)
86
87 struct si_context {
88 struct r600_common_context b;
89 struct blitter_context *blitter;
90 void *custom_dsa_flush;
91 void *custom_blend_resolve;
92 void *custom_blend_decompress;
93 void *custom_blend_fastclear;
94 struct si_screen *screen;
95
96 union {
97 struct {
98 /* The order matters. */
99 struct r600_atom *vertex_buffers;
100 struct r600_atom *const_buffers[SI_NUM_SHADERS];
101 struct r600_atom *rw_buffers[SI_NUM_SHADERS];
102 struct r600_atom *sampler_views[SI_NUM_SHADERS];
103 struct r600_atom *sampler_states[SI_NUM_SHADERS];
104 /* Caches must be flushed after resource descriptors are
105 * updated in memory. */
106 struct r600_atom *cache_flush;
107 struct r600_atom *streamout_begin;
108 struct r600_atom *streamout_enable; /* must be after streamout_begin */
109 struct r600_atom *framebuffer;
110 struct r600_atom *db_render_state;
111 struct r600_atom *msaa_config;
112 } s;
113 struct r600_atom *array[0];
114 } atoms;
115
116 struct si_framebuffer framebuffer;
117 struct si_vertex_element *vertex_elements;
118 unsigned pa_sc_line_stipple;
119 unsigned pa_su_sc_mode_cntl;
120 /* for saving when using blitter */
121 struct pipe_stencil_ref stencil_ref;
122 /* shaders */
123 struct si_shader_selector *ps_shader;
124 struct si_shader_selector *gs_shader;
125 struct si_shader_selector *vs_shader;
126 struct si_cs_shader_state cs_shader_state;
127 /* shader information */
128 unsigned sprite_coord_enable;
129 struct si_descriptors vertex_buffers;
130 struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
131 struct si_buffer_resources rw_buffers[SI_NUM_SHADERS];
132 struct si_textures_info samplers[SI_NUM_SHADERS];
133 struct r600_resource *border_color_table;
134 unsigned border_color_offset;
135
136 struct r600_atom msaa_config;
137 int ps_iter_samples;
138
139 unsigned default_ps_gprs, default_vs_gprs;
140
141 /* Vertex and index buffers. */
142 bool vertex_buffers_dirty;
143 struct pipe_index_buffer index_buffer;
144 struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
145
146 /* With rasterizer discard, there doesn't have to be a pixel shader.
147 * In that case, we bind this one: */
148 void *dummy_pixel_shader;
149 struct si_pm4_state *gs_on;
150 struct si_pm4_state *gs_off;
151 struct si_pm4_state *gs_rings;
152 struct r600_atom cache_flush;
153 struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
154 struct pipe_resource *esgs_ring;
155 struct pipe_resource *gsvs_ring;
156
157 /* SI state handling */
158 union si_state queued;
159 union si_state emitted;
160
161 /* DB render state. */
162 struct r600_atom db_render_state;
163 bool dbcb_depth_copy_enabled;
164 bool dbcb_stencil_copy_enabled;
165 unsigned dbcb_copy_sample;
166 bool db_inplace_flush_enabled;
167 bool db_depth_clear;
168 bool db_depth_disable_expclear;
169 unsigned ps_db_shader_control;
170 };
171
172 /* si_blit.c */
173 void si_init_blit_functions(struct si_context *sctx);
174 void si_flush_depth_textures(struct si_context *sctx,
175 struct si_textures_info *textures);
176 void si_decompress_color_textures(struct si_context *sctx,
177 struct si_textures_info *textures);
178 void si_resource_copy_region(struct pipe_context *ctx,
179 struct pipe_resource *dst,
180 unsigned dst_level,
181 unsigned dstx, unsigned dsty, unsigned dstz,
182 struct pipe_resource *src,
183 unsigned src_level,
184 const struct pipe_box *src_box);
185
186 /* si_dma.c */
187 void si_dma_copy(struct pipe_context *ctx,
188 struct pipe_resource *dst,
189 unsigned dst_level,
190 unsigned dstx, unsigned dsty, unsigned dstz,
191 struct pipe_resource *src,
192 unsigned src_level,
193 const struct pipe_box *src_box);
194
195 /* si_hw_context.c */
196 void si_context_gfx_flush(void *context, unsigned flags,
197 struct pipe_fence_handle **fence);
198 void si_begin_new_cs(struct si_context *ctx);
199 void si_need_cs_space(struct si_context *ctx, unsigned num_dw, boolean count_draw_in);
200
201 #if SI_TRACE_CS
202 void si_trace_emit(struct si_context *sctx);
203 #endif
204
205 /* si_compute.c */
206 void si_init_compute_functions(struct si_context *sctx);
207
208 /* si_uvd.c */
209 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
210 const struct pipe_video_codec *templ);
211
212 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
213 const struct pipe_video_buffer *tmpl);
214
215 /*
216 * common helpers
217 */
218
219 static INLINE struct r600_resource *
220 si_resource_create_custom(struct pipe_screen *screen,
221 unsigned usage, unsigned size)
222 {
223 assert(size);
224 return r600_resource(pipe_buffer_create(screen,
225 PIPE_BIND_CUSTOM, usage, size));
226 }
227
228 #endif