2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
46 static const char *scratch_rsrc_dword0_symbol
=
47 "SCRATCH_RSRC_DWORD0";
49 static const char *scratch_rsrc_dword1_symbol
=
50 "SCRATCH_RSRC_DWORD1";
52 struct si_shader_output_values
54 LLVMValueRef values
[4];
55 unsigned semantic_name
;
56 unsigned semantic_index
;
57 ubyte vertex_stream
[4];
61 * Used to collect types and other info about arguments of the LLVM function
62 * before the function is created.
64 struct si_function_info
{
65 LLVMTypeRef types
[100];
66 LLVMValueRef
*assign
[100];
67 unsigned num_sgpr_params
;
76 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
77 struct si_screen
*sscreen
,
78 LLVMTargetMachineRef tm
);
80 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
81 struct lp_build_tgsi_context
*bld_base
,
82 struct lp_build_emit_data
*emit_data
);
84 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
87 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
88 union si_shader_part_key
*key
);
89 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
90 union si_shader_part_key
*key
);
91 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
92 union si_shader_part_key
*key
);
93 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
94 union si_shader_part_key
*key
);
96 /* Ideally pass the sample mask input to the PS epilog as v14, which
97 * is its usual location, so that the shader doesn't have to add v_mov.
99 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
102 CONST_ADDR_SPACE
= 2,
103 LOCAL_ADDR_SPACE
= 3,
106 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
109 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
115 static bool is_merged_shader(struct si_shader
*shader
)
117 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
120 return shader
->key
.as_ls
||
122 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
123 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
126 static void si_init_function_info(struct si_function_info
*fninfo
)
128 fninfo
->num_params
= 0;
129 fninfo
->num_sgpr_params
= 0;
132 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
133 enum si_arg_regfile regfile
, LLVMTypeRef type
,
134 LLVMValueRef
*assign
)
136 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
138 unsigned idx
= fninfo
->num_params
++;
139 assert(idx
< ARRAY_SIZE(fninfo
->types
));
141 if (regfile
== ARG_SGPR
)
142 fninfo
->num_sgpr_params
= fninfo
->num_params
;
144 fninfo
->types
[idx
] = type
;
145 fninfo
->assign
[idx
] = assign
;
149 static unsigned add_arg(struct si_function_info
*fninfo
,
150 enum si_arg_regfile regfile
, LLVMTypeRef type
)
152 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
155 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
156 enum si_arg_regfile regfile
, LLVMTypeRef type
,
157 LLVMValueRef
*assign
, unsigned idx
)
159 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
160 assert(actual
== idx
);
163 static void add_arg_checked(struct si_function_info
*fninfo
,
164 enum si_arg_regfile regfile
, LLVMTypeRef type
,
167 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
171 * Returns a unique index for a per-patch semantic name and index. The index
172 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
175 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
177 switch (semantic_name
) {
178 case TGSI_SEMANTIC_TESSOUTER
:
180 case TGSI_SEMANTIC_TESSINNER
:
182 case TGSI_SEMANTIC_PATCH
:
187 assert(!"invalid semantic name");
193 * Returns a unique index for a semantic name and index. The index must be
194 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
197 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
199 switch (semantic_name
) {
200 case TGSI_SEMANTIC_POSITION
:
202 case TGSI_SEMANTIC_GENERIC
:
203 /* Since some shader stages use the the highest used IO index
204 * to determine the size to allocate for inputs/outputs
205 * (in LDS, tess and GS rings). GENERIC should be placed right
206 * after POSITION to make that size as small as possible.
208 if (index
< SI_MAX_IO_GENERIC
)
211 assert(!"invalid generic index");
213 case TGSI_SEMANTIC_PSIZE
:
214 return SI_MAX_IO_GENERIC
+ 1;
215 case TGSI_SEMANTIC_CLIPDIST
:
217 return SI_MAX_IO_GENERIC
+ 2 + index
;
218 case TGSI_SEMANTIC_FOG
:
219 return SI_MAX_IO_GENERIC
+ 4;
220 case TGSI_SEMANTIC_LAYER
:
221 return SI_MAX_IO_GENERIC
+ 5;
222 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
223 return SI_MAX_IO_GENERIC
+ 6;
224 case TGSI_SEMANTIC_PRIMID
:
225 return SI_MAX_IO_GENERIC
+ 7;
226 case TGSI_SEMANTIC_COLOR
: /* these alias */
227 case TGSI_SEMANTIC_BCOLOR
:
229 return SI_MAX_IO_GENERIC
+ 8 + index
;
230 case TGSI_SEMANTIC_TEXCOORD
:
232 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
233 return SI_MAX_IO_GENERIC
+ 10 + index
;
235 assert(!"invalid semantic name");
241 * Get the value of a shader input parameter and extract a bitfield.
243 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
244 unsigned param
, unsigned rshift
,
247 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
250 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
251 value
= ac_to_integer(&ctx
->ac
, value
);
254 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
255 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
257 if (rshift
+ bitwidth
< 32) {
258 unsigned mask
= (1 << bitwidth
) - 1;
259 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
260 LLVMConstInt(ctx
->i32
, mask
, 0), "");
266 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
269 case PIPE_SHADER_TESS_CTRL
:
270 return unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 0, 8);
272 case PIPE_SHADER_TESS_EVAL
:
273 return LLVMGetParam(ctx
->main_fn
,
274 ctx
->param_tes_rel_patch_id
);
282 /* Tessellation shaders pass outputs to the next shader using LDS.
284 * LS outputs = TCS inputs
285 * TCS outputs = TES inputs
288 * - TCS inputs for patch 0
289 * - TCS inputs for patch 1
290 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
292 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
293 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
294 * - TCS outputs for patch 1
295 * - Per-patch TCS outputs for patch 1
296 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
297 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
300 * All three shaders VS(LS), TCS, TES share the same LDS space.
304 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
306 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
309 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
311 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
313 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
314 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
316 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
319 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
321 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
323 return LLVMConstInt(ctx
->i32
, stride
, 0);
326 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
328 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
329 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
331 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
332 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
333 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
334 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
335 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
336 num_patch_outputs
* 4;
337 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
341 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
343 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
345 ctx
->param_tcs_out_lds_offsets
,
351 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
353 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
355 ctx
->param_tcs_out_lds_offsets
,
361 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
363 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
364 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
366 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
370 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
372 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
373 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
374 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
376 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
377 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
383 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
385 LLVMValueRef patch0_patch_data_offset
=
386 get_tcs_out_patch0_patch_data_offset(ctx
);
387 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
388 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
390 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
391 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
396 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
398 unsigned tcs_out_vertices
=
399 ctx
->shader
->selector
?
400 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
402 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
403 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
404 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
406 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
409 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
414 case PIPE_SHADER_VERTEX
:
415 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
416 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
418 case PIPE_SHADER_TESS_CTRL
:
419 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
420 ctx
->shader
->is_monolithic
) {
421 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
422 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
424 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
432 static LLVMValueRef
get_instance_index_for_fetch(
433 struct si_shader_context
*ctx
,
434 unsigned param_start_instance
, LLVMValueRef divisor
)
436 LLVMValueRef result
= ctx
->abi
.instance_id
;
438 /* The division must be done before START_INSTANCE is added. */
439 if (divisor
!= ctx
->i32_1
)
440 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
442 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
443 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
446 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
448 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
450 unsigned double_index
)
452 LLVMBuilderRef builder
= ctx
->ac
.builder
;
453 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
454 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
455 LLVMVectorType(f64
, 2), "");
456 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
457 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
458 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
461 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
462 LLVMValueRef i32
, unsigned index
)
467 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
468 LLVMConstInt(ctx
->i32
, 16, 0), "");
470 return LLVMBuildSExt(ctx
->ac
.builder
,
471 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
476 void si_llvm_load_input_vs(
477 struct si_shader_context
*ctx
,
478 unsigned input_index
,
481 unsigned vs_blit_property
=
482 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
484 if (vs_blit_property
) {
485 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
486 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
487 LLVMIntULE
, vertex_id
,
489 /* Use LLVMIntNE, because we have 3 vertices and only
490 * the middle one should use y2.
492 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
493 LLVMIntNE
, vertex_id
,
496 if (input_index
== 0) {
498 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
499 ctx
->param_vs_blit_inputs
);
500 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
+ 1);
503 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
504 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
505 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
506 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
508 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
510 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
513 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
514 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
515 out
[2] = LLVMGetParam(ctx
->main_fn
,
516 ctx
->param_vs_blit_inputs
+ 2);
517 out
[3] = ctx
->ac
.f32_1
;
521 /* Color or texture coordinates: */
522 assert(input_index
== 1);
524 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
525 for (int i
= 0; i
< 4; i
++) {
526 out
[i
] = LLVMGetParam(ctx
->main_fn
,
527 ctx
->param_vs_blit_inputs
+ 3 + i
);
530 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
531 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
532 ctx
->param_vs_blit_inputs
+ 3);
533 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 4);
535 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
536 ctx
->param_vs_blit_inputs
+ 5);
537 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
538 ctx
->param_vs_blit_inputs
+ 6);
540 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
542 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
544 out
[2] = LLVMGetParam(ctx
->main_fn
,
545 ctx
->param_vs_blit_inputs
+ 7);
546 out
[3] = LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_blit_inputs
+ 8);
554 unsigned num_fetches
;
555 unsigned fetch_stride
;
557 LLVMValueRef t_list_ptr
;
558 LLVMValueRef t_offset
;
560 LLVMValueRef vertex_index
;
561 LLVMValueRef input
[3];
563 /* Load the T list */
564 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
566 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
568 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
570 vertex_index
= LLVMGetParam(ctx
->main_fn
,
571 ctx
->param_vertex_index0
+
574 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
576 /* Do multiple loads for special formats. */
578 case SI_FIX_FETCH_RGB_64_FLOAT
:
579 num_fetches
= 3; /* 3 2-dword loads */
582 case SI_FIX_FETCH_RGBA_64_FLOAT
:
583 num_fetches
= 2; /* 2 4-dword loads */
586 case SI_FIX_FETCH_RGB_8
:
587 case SI_FIX_FETCH_RGB_8_INT
:
591 case SI_FIX_FETCH_RGB_16
:
592 case SI_FIX_FETCH_RGB_16_INT
:
601 for (unsigned i
= 0; i
< num_fetches
; i
++) {
602 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
604 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
605 vertex_index
, voffset
,
609 /* Break up the vec4 into individual components */
610 for (chan
= 0; chan
< 4; chan
++) {
611 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
612 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
613 input
[0], llvm_chan
, "");
617 case SI_FIX_FETCH_A2_SNORM
:
618 case SI_FIX_FETCH_A2_SSCALED
:
619 case SI_FIX_FETCH_A2_SINT
: {
620 /* The hardware returns an unsigned value; convert it to a
623 LLVMValueRef tmp
= out
[3];
624 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
626 /* First, recover the sign-extended signed integer value. */
627 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
628 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
630 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
632 /* For the integer-like cases, do a natural sign extension.
634 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
635 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
638 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
639 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
640 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
641 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
643 /* Convert back to the right type. */
644 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
646 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
647 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
648 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
649 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
650 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
651 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
657 case SI_FIX_FETCH_RGBA_32_UNORM
:
658 case SI_FIX_FETCH_RGBX_32_UNORM
:
659 for (chan
= 0; chan
< 4; chan
++) {
660 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
661 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
662 out
[chan
], ctx
->f32
, "");
663 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
664 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
666 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
667 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
668 out
[3] = LLVMConstReal(ctx
->f32
, 1);
670 case SI_FIX_FETCH_RGBA_32_SNORM
:
671 case SI_FIX_FETCH_RGBX_32_SNORM
:
672 case SI_FIX_FETCH_RGBA_32_FIXED
:
673 case SI_FIX_FETCH_RGBX_32_FIXED
: {
675 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
676 scale
= 1.0 / 0x10000;
678 scale
= 1.0 / INT_MAX
;
680 for (chan
= 0; chan
< 4; chan
++) {
681 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
682 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
683 out
[chan
], ctx
->f32
, "");
684 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
685 LLVMConstReal(ctx
->f32
, scale
), "");
687 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
688 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
689 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
690 out
[3] = LLVMConstReal(ctx
->f32
, 1);
693 case SI_FIX_FETCH_RGBA_32_USCALED
:
694 for (chan
= 0; chan
< 4; chan
++) {
695 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
696 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
697 out
[chan
], ctx
->f32
, "");
700 case SI_FIX_FETCH_RGBA_32_SSCALED
:
701 for (chan
= 0; chan
< 4; chan
++) {
702 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
703 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
704 out
[chan
], ctx
->f32
, "");
707 case SI_FIX_FETCH_RG_64_FLOAT
:
708 for (chan
= 0; chan
< 2; chan
++)
709 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
711 out
[2] = LLVMConstReal(ctx
->f32
, 0);
712 out
[3] = LLVMConstReal(ctx
->f32
, 1);
714 case SI_FIX_FETCH_RGB_64_FLOAT
:
715 for (chan
= 0; chan
< 3; chan
++)
716 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
718 out
[3] = LLVMConstReal(ctx
->f32
, 1);
720 case SI_FIX_FETCH_RGBA_64_FLOAT
:
721 for (chan
= 0; chan
< 4; chan
++) {
722 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
726 case SI_FIX_FETCH_RGB_8
:
727 case SI_FIX_FETCH_RGB_8_INT
:
728 case SI_FIX_FETCH_RGB_16
:
729 case SI_FIX_FETCH_RGB_16_INT
:
730 for (chan
= 0; chan
< 3; chan
++) {
731 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
735 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
736 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
737 out
[3] = LLVMConstReal(ctx
->f32
, 1);
739 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
745 static void declare_input_vs(
746 struct si_shader_context
*ctx
,
747 unsigned input_index
,
748 const struct tgsi_full_declaration
*decl
,
751 si_llvm_load_input_vs(ctx
, input_index
, out
);
754 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
761 case PIPE_SHADER_VERTEX
:
762 return LLVMGetParam(ctx
->main_fn
,
763 ctx
->param_vs_prim_id
);
764 case PIPE_SHADER_TESS_CTRL
:
765 return LLVMGetParam(ctx
->main_fn
,
766 ctx
->param_tcs_patch_id
);
767 case PIPE_SHADER_TESS_EVAL
:
768 return LLVMGetParam(ctx
->main_fn
,
769 ctx
->param_tes_patch_id
);
770 case PIPE_SHADER_GEOMETRY
:
771 return ctx
->abi
.gs_prim_id
;
779 * Return the value of tgsi_ind_register for indexing.
780 * This is the indirect index with the constant offset added to it.
782 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
783 const struct tgsi_ind_register
*ind
,
789 if (ind
->File
== TGSI_FILE_ADDRESS
) {
790 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
791 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
793 struct tgsi_full_src_register src
= {};
795 src
.Register
.File
= ind
->File
;
796 src
.Register
.Index
= ind
->Index
;
798 /* Set the second index to 0 for constants. */
799 if (ind
->File
== TGSI_FILE_CONSTANT
)
800 src
.Register
.Dimension
= 1;
802 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
805 result
= ac_to_integer(&ctx
->ac
, result
);
809 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
810 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
811 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
812 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
817 * Like si_get_indirect_index, but restricts the return value to a (possibly
818 * undefined) value inside [0..num).
820 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
821 const struct tgsi_ind_register
*ind
,
822 int rel_index
, unsigned num
)
824 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
826 return si_llvm_bound_index(ctx
, result
, num
);
831 * Calculate a dword address given an input or output register and a stride.
833 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
834 const struct tgsi_full_dst_register
*dst
,
835 const struct tgsi_full_src_register
*src
,
836 LLVMValueRef vertex_dw_stride
,
837 LLVMValueRef base_addr
)
839 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
840 ubyte
*name
, *index
, *array_first
;
842 struct tgsi_full_dst_register reg
;
844 /* Set the register description. The address computation is the same
845 * for sources and destinations. */
847 reg
.Register
.File
= src
->Register
.File
;
848 reg
.Register
.Index
= src
->Register
.Index
;
849 reg
.Register
.Indirect
= src
->Register
.Indirect
;
850 reg
.Register
.Dimension
= src
->Register
.Dimension
;
851 reg
.Indirect
= src
->Indirect
;
852 reg
.Dimension
= src
->Dimension
;
853 reg
.DimIndirect
= src
->DimIndirect
;
857 /* If the register is 2-dimensional (e.g. an array of vertices
858 * in a primitive), calculate the base address of the vertex. */
859 if (reg
.Register
.Dimension
) {
862 if (reg
.Dimension
.Indirect
)
863 index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
864 1, reg
.Dimension
.Index
);
866 index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
868 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
869 LLVMBuildMul(ctx
->ac
.builder
, index
,
870 vertex_dw_stride
, ""), "");
873 /* Get information about the register. */
874 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
875 name
= info
->input_semantic_name
;
876 index
= info
->input_semantic_index
;
877 array_first
= info
->input_array_first
;
878 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
879 name
= info
->output_semantic_name
;
880 index
= info
->output_semantic_index
;
881 array_first
= info
->output_array_first
;
887 if (reg
.Register
.Indirect
) {
888 /* Add the relative address of the element. */
889 LLVMValueRef ind_index
;
891 if (reg
.Indirect
.ArrayID
)
892 first
= array_first
[reg
.Indirect
.ArrayID
];
894 first
= reg
.Register
.Index
;
896 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
897 1, reg
.Register
.Index
- first
);
899 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
900 LLVMBuildMul(ctx
->ac
.builder
, ind_index
,
901 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
903 param
= reg
.Register
.Dimension
?
904 si_shader_io_get_unique_index(name
[first
], index
[first
]) :
905 si_shader_io_get_unique_index_patch(name
[first
], index
[first
]);
907 param
= reg
.Register
.Dimension
?
908 si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
909 index
[reg
.Register
.Index
]) :
910 si_shader_io_get_unique_index_patch(name
[reg
.Register
.Index
],
911 index
[reg
.Register
.Index
]);
914 /* Add the base address of the element. */
915 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
916 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
919 /* The offchip buffer layout for TCS->TES is
921 * - attribute 0 of patch 0 vertex 0
922 * - attribute 0 of patch 0 vertex 1
923 * - attribute 0 of patch 0 vertex 2
925 * - attribute 0 of patch 1 vertex 0
926 * - attribute 0 of patch 1 vertex 1
928 * - attribute 1 of patch 0 vertex 0
929 * - attribute 1 of patch 0 vertex 1
931 * - per patch attribute 0 of patch 0
932 * - per patch attribute 0 of patch 1
935 * Note that every attribute has 4 components.
937 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
938 LLVMValueRef rel_patch_id
,
939 LLVMValueRef vertex_index
,
940 LLVMValueRef param_index
)
942 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
943 LLVMValueRef param_stride
, constant16
;
945 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
946 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
947 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
950 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
952 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
953 vertices_per_patch
, "");
955 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
958 param_stride
= total_vertices
;
960 base_addr
= rel_patch_id
;
961 param_stride
= num_patches
;
964 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
965 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
966 param_stride
, ""), "");
968 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
971 LLVMValueRef patch_data_offset
=
972 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
974 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
975 patch_data_offset
, "");
980 /* This is a generic helper that can be shared by the NIR and TGSI backends */
981 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
982 struct si_shader_context
*ctx
,
983 LLVMValueRef vertex_index
,
984 LLVMValueRef param_index
,
990 unsigned param_index_base
;
992 param_index_base
= is_patch
?
993 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
994 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
997 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
998 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1001 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1004 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1005 vertex_index
, param_index
);
1008 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1009 struct si_shader_context
*ctx
,
1010 const struct tgsi_full_dst_register
*dst
,
1011 const struct tgsi_full_src_register
*src
)
1013 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1014 ubyte
*name
, *index
, *array_first
;
1015 struct tgsi_full_src_register reg
;
1016 LLVMValueRef vertex_index
= NULL
;
1017 LLVMValueRef param_index
= NULL
;
1018 unsigned param_base
;
1020 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1022 if (reg
.Register
.Dimension
) {
1024 if (reg
.Dimension
.Indirect
)
1025 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1026 1, reg
.Dimension
.Index
);
1028 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1031 /* Get information about the register. */
1032 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1033 name
= info
->input_semantic_name
;
1034 index
= info
->input_semantic_index
;
1035 array_first
= info
->input_array_first
;
1036 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1037 name
= info
->output_semantic_name
;
1038 index
= info
->output_semantic_index
;
1039 array_first
= info
->output_array_first
;
1045 if (reg
.Register
.Indirect
) {
1046 if (reg
.Indirect
.ArrayID
)
1047 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1049 param_base
= reg
.Register
.Index
;
1051 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1052 1, reg
.Register
.Index
- param_base
);
1055 param_base
= reg
.Register
.Index
;
1058 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1059 param_index
, param_base
,
1060 name
, index
, !reg
.Register
.Dimension
);
1063 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1064 LLVMTypeRef type
, unsigned swizzle
,
1065 LLVMValueRef buffer
, LLVMValueRef offset
,
1066 LLVMValueRef base
, bool can_speculate
)
1068 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1069 LLVMValueRef value
, value2
;
1070 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1072 if (swizzle
== ~0) {
1073 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1074 0, 1, 0, can_speculate
, false);
1076 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1079 if (!llvm_type_is_64bit(ctx
, type
)) {
1080 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1081 0, 1, 0, can_speculate
, false);
1083 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1084 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1085 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1088 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1089 swizzle
* 4, 1, 0, can_speculate
, false);
1091 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1092 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1094 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1100 * \param type output value type
1101 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1102 * \param dw_addr address in dwords
1104 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1105 LLVMTypeRef type
, unsigned swizzle
,
1106 LLVMValueRef dw_addr
)
1108 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1111 if (swizzle
== ~0) {
1112 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1114 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1115 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1117 return lp_build_gather_values(&ctx
->gallivm
, values
,
1121 /* Split 64-bit loads. */
1122 if (llvm_type_is_64bit(ctx
, type
)) {
1123 LLVMValueRef lo
, hi
;
1125 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1126 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1127 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1130 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1131 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1133 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1135 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1141 * \param swizzle offset (typically 0..3)
1142 * \param dw_addr address in dwords
1143 * \param value value to store
1145 static void lds_store(struct si_shader_context
*ctx
,
1146 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1149 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1150 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1152 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1155 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
1158 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1160 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1161 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
1162 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
1164 uint64_t desc2
= 0xffffffff;
1165 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1166 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1167 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1168 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1169 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1170 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1171 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
1173 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
1174 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
1175 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
1176 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
1179 static LLVMValueRef
fetch_input_tcs(
1180 struct lp_build_tgsi_context
*bld_base
,
1181 const struct tgsi_full_src_register
*reg
,
1182 enum tgsi_opcode_type type
, unsigned swizzle
)
1184 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1185 LLVMValueRef dw_addr
, stride
;
1187 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1188 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1189 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1191 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1194 static LLVMValueRef
fetch_output_tcs(
1195 struct lp_build_tgsi_context
*bld_base
,
1196 const struct tgsi_full_src_register
*reg
,
1197 enum tgsi_opcode_type type
, unsigned swizzle
)
1199 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1200 LLVMValueRef dw_addr
, stride
;
1202 if (reg
->Register
.Dimension
) {
1203 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1204 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1205 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1207 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1208 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1211 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1214 static LLVMValueRef
fetch_input_tes(
1215 struct lp_build_tgsi_context
*bld_base
,
1216 const struct tgsi_full_src_register
*reg
,
1217 enum tgsi_opcode_type type
, unsigned swizzle
)
1219 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1220 LLVMValueRef buffer
, base
, addr
;
1222 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1224 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1225 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1227 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1228 buffer
, base
, addr
, true);
1231 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1232 const struct tgsi_full_instruction
*inst
,
1233 const struct tgsi_opcode_info
*info
,
1235 LLVMValueRef dst
[4])
1237 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1238 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1239 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1240 unsigned chan_index
;
1241 LLVMValueRef dw_addr
, stride
;
1242 LLVMValueRef buffer
, base
, buf_addr
;
1243 LLVMValueRef values
[4];
1244 bool skip_lds_store
;
1245 bool is_tess_factor
= false, is_tess_inner
= false;
1247 /* Only handle per-patch and per-vertex outputs here.
1248 * Vectors will be lowered to scalars and this function will be called again.
1250 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1251 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1252 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1256 if (reg
->Register
.Dimension
) {
1257 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1258 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1259 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1260 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1262 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1263 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1264 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1266 if (!reg
->Register
.Indirect
) {
1267 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1269 /* Always write tess factors into LDS for the TCS epilog. */
1270 if (name
== TGSI_SEMANTIC_TESSINNER
||
1271 name
== TGSI_SEMANTIC_TESSOUTER
) {
1272 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1273 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1274 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1275 is_tess_factor
= true;
1276 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1281 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1283 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1284 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1286 uint32_t writemask
= reg
->Register
.WriteMask
;
1288 chan_index
= u_bit_scan(&writemask
);
1289 LLVMValueRef value
= dst
[chan_index
];
1291 if (inst
->Instruction
.Saturate
)
1292 value
= ac_build_clamp(&ctx
->ac
, value
);
1294 /* Skip LDS stores if there is no LDS read of this output. */
1295 if (!skip_lds_store
)
1296 lds_store(ctx
, chan_index
, dw_addr
, value
);
1298 value
= ac_to_integer(&ctx
->ac
, value
);
1299 values
[chan_index
] = value
;
1301 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1302 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1304 4 * chan_index
, 1, 0, true, false);
1307 /* Write tess factors into VGPRs for the epilog. */
1308 if (is_tess_factor
&&
1309 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1310 if (!is_tess_inner
) {
1311 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1312 ctx
->invoc0_tess_factors
[chan_index
]);
1313 } else if (chan_index
< 2) {
1314 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1315 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1320 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1321 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1323 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1324 base
, 0, 1, 0, true, false);
1328 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1329 unsigned input_index
,
1330 unsigned vtx_offset_param
,
1334 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1335 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1336 struct si_shader
*shader
= ctx
->shader
;
1337 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1338 LLVMValueRef vtx_offset
, soffset
;
1339 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1340 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1341 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1345 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1347 /* GFX9 has the ESGS ring in LDS. */
1348 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1349 unsigned index
= vtx_offset_param
;
1351 switch (index
/ 2) {
1353 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1354 index
% 2 ? 16 : 0, 16);
1357 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1358 index
% 2 ? 16 : 0, 16);
1361 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1362 index
% 2 ? 16 : 0, 16);
1369 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1370 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1371 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1374 /* GFX6: input load from the ESGS ring in memory. */
1375 if (swizzle
== ~0) {
1376 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1378 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1379 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1382 return lp_build_gather_values(&ctx
->gallivm
, values
,
1386 /* Get the vertex offset parameter on GFX6. */
1387 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1389 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1391 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1393 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1394 vtx_offset
, soffset
, 0, 1, 0, true, false);
1395 if (llvm_type_is_64bit(ctx
, type
)) {
1396 LLVMValueRef value2
;
1397 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1399 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1400 ctx
->i32_0
, vtx_offset
, soffset
,
1401 0, 1, 0, true, false);
1402 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1404 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1407 static LLVMValueRef
fetch_input_gs(
1408 struct lp_build_tgsi_context
*bld_base
,
1409 const struct tgsi_full_src_register
*reg
,
1410 enum tgsi_opcode_type type
,
1413 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1414 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1416 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1417 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1418 return get_primitive_id(ctx
, swizzle
);
1420 if (!reg
->Register
.Dimension
)
1423 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1424 reg
->Dimension
.Index
,
1425 tgsi2llvmtype(bld_base
, type
),
1429 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1431 switch (interpolate
) {
1432 case TGSI_INTERPOLATE_CONSTANT
:
1435 case TGSI_INTERPOLATE_LINEAR
:
1436 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1437 return SI_PARAM_LINEAR_SAMPLE
;
1438 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1439 return SI_PARAM_LINEAR_CENTROID
;
1441 return SI_PARAM_LINEAR_CENTER
;
1443 case TGSI_INTERPOLATE_COLOR
:
1444 case TGSI_INTERPOLATE_PERSPECTIVE
:
1445 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1446 return SI_PARAM_PERSP_SAMPLE
;
1447 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1448 return SI_PARAM_PERSP_CENTROID
;
1450 return SI_PARAM_PERSP_CENTER
;
1453 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1458 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1459 unsigned attr_index
, unsigned chan
,
1460 LLVMValueRef prim_mask
,
1461 LLVMValueRef i
, LLVMValueRef j
)
1464 return ac_build_fs_interp(&ctx
->ac
,
1465 LLVMConstInt(ctx
->i32
, chan
, 0),
1466 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1469 return ac_build_fs_interp_mov(&ctx
->ac
,
1470 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1471 LLVMConstInt(ctx
->i32
, chan
, 0),
1472 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1477 * Interpolate a fragment shader input.
1479 * @param ctx context
1480 * @param input_index index of the input in hardware
1481 * @param semantic_name TGSI_SEMANTIC_*
1482 * @param semantic_index semantic index
1483 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1484 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1485 * @param interp_param interpolation weights (i,j)
1486 * @param prim_mask SI_PARAM_PRIM_MASK
1487 * @param face SI_PARAM_FRONT_FACE
1488 * @param result the return value (4 components)
1490 static void interp_fs_input(struct si_shader_context
*ctx
,
1491 unsigned input_index
,
1492 unsigned semantic_name
,
1493 unsigned semantic_index
,
1494 unsigned num_interp_inputs
,
1495 unsigned colors_read_mask
,
1496 LLVMValueRef interp_param
,
1497 LLVMValueRef prim_mask
,
1499 LLVMValueRef result
[4])
1501 LLVMValueRef i
= NULL
, j
= NULL
;
1504 /* fs.constant returns the param from the middle vertex, so it's not
1505 * really useful for flat shading. It's meant to be used for custom
1506 * interpolation (but the intrinsic can't fetch from the other two
1509 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1510 * to do the right thing. The only reason we use fs.constant is that
1511 * fs.interp cannot be used on integers, because they can be equal
1514 * When interp is false we will use fs.constant or for newer llvm,
1515 * amdgcn.interp.mov.
1517 bool interp
= interp_param
!= NULL
;
1520 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1521 LLVMVectorType(ctx
->f32
, 2), "");
1523 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1525 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1529 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1530 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1531 LLVMValueRef is_face_positive
;
1533 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1534 * otherwise it's at offset "num_inputs".
1536 unsigned back_attr_offset
= num_interp_inputs
;
1537 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1538 back_attr_offset
+= 1;
1540 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1541 face
, ctx
->i32_0
, "");
1543 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1544 LLVMValueRef front
, back
;
1546 front
= si_build_fs_interp(ctx
,
1549 back
= si_build_fs_interp(ctx
,
1550 back_attr_offset
, chan
,
1553 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1559 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1560 result
[0] = si_build_fs_interp(ctx
, input_index
,
1561 0, prim_mask
, i
, j
);
1563 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1564 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1566 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1567 result
[chan
] = si_build_fs_interp(ctx
,
1574 void si_llvm_load_input_fs(
1575 struct si_shader_context
*ctx
,
1576 unsigned input_index
,
1577 LLVMValueRef out
[4])
1579 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1580 struct si_shader
*shader
= ctx
->shader
;
1581 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1582 LLVMValueRef main_fn
= ctx
->main_fn
;
1583 LLVMValueRef interp_param
= NULL
;
1584 int interp_param_idx
;
1585 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1586 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1587 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1588 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1590 /* Get colors from input VGPRs (set by the prolog). */
1591 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1592 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1593 unsigned mask
= colors_read
>> (semantic_index
* 4);
1594 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1595 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1597 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1598 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1599 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1600 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1604 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1605 if (interp_param_idx
== -1)
1607 else if (interp_param_idx
) {
1608 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1611 interp_fs_input(ctx
, input_index
, semantic_name
,
1612 semantic_index
, 0, /* this param is unused */
1613 shader
->selector
->info
.colors_read
, interp_param
,
1614 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1615 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1619 static void declare_input_fs(
1620 struct si_shader_context
*ctx
,
1621 unsigned input_index
,
1622 const struct tgsi_full_declaration
*decl
,
1623 LLVMValueRef out
[4])
1625 si_llvm_load_input_fs(ctx
, input_index
, out
);
1628 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1630 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1635 * Load a dword from a constant buffer.
1637 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1638 LLVMValueRef resource
,
1639 LLVMValueRef offset
)
1641 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1642 0, 0, 0, true, true);
1645 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1647 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1648 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1649 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1650 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1652 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1653 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1654 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1656 LLVMValueRef pos
[4] = {
1657 buffer_load_const(ctx
, resource
, offset0
),
1658 buffer_load_const(ctx
, resource
, offset1
),
1659 LLVMConstReal(ctx
->f32
, 0),
1660 LLVMConstReal(ctx
->f32
, 0)
1663 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1666 void si_load_system_value(struct si_shader_context
*ctx
,
1668 const struct tgsi_full_declaration
*decl
)
1670 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1671 LLVMValueRef value
= 0;
1673 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1675 switch (decl
->Semantic
.Name
) {
1676 case TGSI_SEMANTIC_INSTANCEID
:
1677 value
= ctx
->abi
.instance_id
;
1680 case TGSI_SEMANTIC_VERTEXID
:
1681 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1683 ctx
->abi
.base_vertex
, "");
1686 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1687 /* Unused. Clarify the meaning in indexed vs. non-indexed
1688 * draws if this is ever used again. */
1692 case TGSI_SEMANTIC_BASEVERTEX
:
1694 /* For non-indexed draws, the base vertex set by the driver
1695 * (for direct draws) or the CP (for indirect draws) is the
1696 * first vertex ID, but GLSL expects 0 to be returned.
1698 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
1699 LLVMValueRef indexed
;
1701 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1702 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1704 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1705 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
1709 case TGSI_SEMANTIC_BASEINSTANCE
:
1710 value
= ctx
->abi
.start_instance
;
1713 case TGSI_SEMANTIC_DRAWID
:
1714 value
= ctx
->abi
.draw_id
;
1717 case TGSI_SEMANTIC_INVOCATIONID
:
1718 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1719 value
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
1720 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1721 value
= ctx
->abi
.gs_invocation_id
;
1723 assert(!"INVOCATIONID not implemented");
1726 case TGSI_SEMANTIC_POSITION
:
1728 LLVMValueRef pos
[4] = {
1729 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1730 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1731 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1732 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
1733 LLVMGetParam(ctx
->main_fn
,
1734 SI_PARAM_POS_W_FLOAT
)),
1736 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1740 case TGSI_SEMANTIC_FACE
:
1741 value
= ctx
->abi
.front_face
;
1744 case TGSI_SEMANTIC_SAMPLEID
:
1745 value
= get_sample_id(ctx
);
1748 case TGSI_SEMANTIC_SAMPLEPOS
: {
1749 LLVMValueRef pos
[4] = {
1750 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1751 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1752 LLVMConstReal(ctx
->f32
, 0),
1753 LLVMConstReal(ctx
->f32
, 0)
1755 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1756 TGSI_OPCODE_FRC
, pos
[0]);
1757 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1758 TGSI_OPCODE_FRC
, pos
[1]);
1759 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1763 case TGSI_SEMANTIC_SAMPLEMASK
:
1764 /* This can only occur with the OpenGL Core profile, which
1765 * doesn't support smoothing.
1767 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1770 case TGSI_SEMANTIC_TESSCOORD
:
1772 LLVMValueRef coord
[4] = {
1773 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1774 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1779 /* For triangles, the vector should be (u, v, 1-u-v). */
1780 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1781 PIPE_PRIM_TRIANGLES
)
1782 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
1783 lp_build_add(bld
, coord
[0], coord
[1]));
1785 value
= lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
1789 case TGSI_SEMANTIC_VERTICESIN
:
1790 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1791 value
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1792 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1793 value
= get_num_tcs_out_vertices(ctx
);
1795 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1798 case TGSI_SEMANTIC_TESSINNER
:
1799 case TGSI_SEMANTIC_TESSOUTER
:
1801 LLVMValueRef buffer
, base
, addr
;
1802 int param
= si_shader_io_get_unique_index_patch(decl
->Semantic
.Name
, 0);
1804 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1806 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1807 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1808 LLVMConstInt(ctx
->i32
, param
, 0));
1810 value
= buffer_load(&ctx
->bld_base
, ctx
->f32
,
1811 ~0, buffer
, base
, addr
, true);
1816 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1817 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1819 LLVMValueRef buf
, slot
, val
[4];
1822 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1823 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1824 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1825 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1827 for (i
= 0; i
< 4; i
++)
1828 val
[i
] = buffer_load_const(ctx
, buf
,
1829 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1830 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
1834 case TGSI_SEMANTIC_PRIMID
:
1835 value
= get_primitive_id(ctx
, 0);
1838 case TGSI_SEMANTIC_GRID_SIZE
:
1839 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_grid_size
);
1842 case TGSI_SEMANTIC_BLOCK_SIZE
:
1844 LLVMValueRef values
[3];
1846 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1848 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1849 unsigned sizes
[3] = {
1850 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1851 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1852 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1855 for (i
= 0; i
< 3; ++i
)
1856 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1858 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1860 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1865 case TGSI_SEMANTIC_BLOCK_ID
:
1867 LLVMValueRef values
[3];
1869 for (int i
= 0; i
< 3; i
++) {
1870 values
[i
] = ctx
->i32_0
;
1871 if (ctx
->param_block_id
[i
] >= 0) {
1872 values
[i
] = LLVMGetParam(ctx
->main_fn
,
1873 ctx
->param_block_id
[i
]);
1876 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1880 case TGSI_SEMANTIC_THREAD_ID
:
1881 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_thread_id
);
1884 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1885 value
= lp_build_intrinsic(ctx
->ac
.builder
,
1886 "llvm.amdgcn.ps.live",
1888 LP_FUNC_ATTR_READNONE
);
1889 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
1890 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
1893 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
1894 value
= LLVMConstInt(ctx
->i32
, 64, 0);
1897 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
1898 value
= ac_get_thread_id(&ctx
->ac
);
1901 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
1903 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1904 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
1905 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
1906 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
1910 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
1911 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
1912 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
1913 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
1915 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1916 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
1917 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
1918 /* All bits set except LSB */
1919 value
= LLVMConstInt(ctx
->i64
, -2, 0);
1922 value
= LLVMConstInt(ctx
->i64
, -1, 0);
1924 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
1925 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
1926 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
1927 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
1928 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
1929 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
1934 assert(!"unknown system value");
1938 ctx
->system_values
[index
] = value
;
1941 void si_declare_compute_memory(struct si_shader_context
*ctx
,
1942 const struct tgsi_full_declaration
*decl
)
1944 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1946 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1949 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1950 assert(decl
->Range
.First
== decl
->Range
.Last
);
1951 assert(!ctx
->ac
.lds
);
1953 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
1954 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1957 LLVMSetAlignment(var
, 4);
1959 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
1962 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1964 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1965 ctx
->param_const_and_shader_buffers
);
1967 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
1968 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
1971 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
1973 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1974 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
1976 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
1977 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
1978 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
1980 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
1984 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
1986 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1987 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
1988 ctx
->param_const_and_shader_buffers
);
1990 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
1991 index
= LLVMBuildSub(ctx
->ac
.builder
,
1992 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
1995 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
1998 static LLVMValueRef
fetch_constant(
1999 struct lp_build_tgsi_context
*bld_base
,
2000 const struct tgsi_full_src_register
*reg
,
2001 enum tgsi_opcode_type type
,
2004 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2005 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2006 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2009 LLVMValueRef addr
, bufp
;
2011 if (swizzle
== LP_CHAN_ALL
) {
2013 LLVMValueRef values
[4];
2014 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2015 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2017 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2020 /* Split 64-bit loads. */
2021 if (tgsi_type_is_64bit(type
)) {
2022 LLVMValueRef lo
, hi
;
2024 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2025 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2026 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2030 idx
= reg
->Register
.Index
* 4 + swizzle
;
2031 if (reg
->Register
.Indirect
) {
2032 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2034 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2037 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2038 if (sel
->info
.const_buffers_declared
== 1 &&
2039 sel
->info
.shader_buffers_declared
== 0) {
2041 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2043 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2044 * loads, and up to x4 load opcode merging. However, it leads to horrible
2045 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2047 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2049 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2050 * a descriptor and s_buffer_load_dword using it, so we can't expand
2051 * the pointer into a full descriptor like below. We have to use
2052 * s_load_dword instead. The only case when LLVM 5.0 would select
2053 * s_buffer_load_dword (that we have to prevent) is when we use use
2054 * a literal offset where we don't need bounds checking.
2056 if (ctx
->screen
->info
.chip_class
== SI
&&
2057 HAVE_LLVM
< 0x0600 &&
2058 !reg
->Register
.Indirect
) {
2059 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2060 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2061 return bitcast(bld_base
, type
, result
);
2064 /* Do the bounds checking with a descriptor, because
2065 * doing computation and manual bounds checking of 64-bit
2066 * addresses generates horrible VALU code with very high
2067 * VGPR usage and very low SIMD occupancy.
2069 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->i64
, "");
2070 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2072 LLVMValueRef desc_elems
[] = {
2073 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, ""),
2074 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, ""),
2075 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2076 LLVMConstInt(ctx
->i32
,
2077 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2078 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2079 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2080 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2081 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2082 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2084 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2085 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2086 return bitcast(bld_base
, type
, result
);
2089 assert(reg
->Register
.Dimension
);
2090 buf
= reg
->Dimension
.Index
;
2092 if (reg
->Dimension
.Indirect
) {
2093 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2095 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2096 reg
->Dimension
.Index
,
2097 ctx
->num_const_buffers
);
2098 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2099 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2100 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2102 bufp
= load_const_buffer_desc(ctx
, buf
);
2104 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2107 /* Upper 16 bits must be zero. */
2108 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
2109 LLVMValueRef val
[2])
2111 return LLVMBuildOr(ctx
->ac
.builder
, val
[0],
2112 LLVMBuildShl(ctx
->ac
.builder
, val
[1],
2113 LLVMConstInt(ctx
->i32
, 16, 0),
2117 /* Upper 16 bits are ignored and will be dropped. */
2118 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
2119 LLVMValueRef val
[2])
2121 LLVMValueRef v
[2] = {
2122 LLVMBuildAnd(ctx
->ac
.builder
, val
[0],
2123 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
2126 return si_llvm_pack_two_int16(ctx
, v
);
2129 /* Initialize arguments for the shader export intrinsic */
2130 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2131 LLVMValueRef
*values
,
2133 struct ac_export_args
*args
)
2135 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2136 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2137 LLVMValueRef val
[4];
2138 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2140 bool is_int8
, is_int10
;
2142 /* Default is 0xf. Adjusted below depending on the format. */
2143 args
->enabled_channels
= 0xf; /* writemask */
2145 /* Specify whether the EXEC mask represents the valid mask */
2146 args
->valid_mask
= 0;
2148 /* Specify whether this is the last export */
2151 /* Specify the target we are exporting */
2152 args
->target
= target
;
2154 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2155 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2156 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2157 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2159 assert(cbuf
>= 0 && cbuf
< 8);
2160 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2161 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2162 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2165 args
->compr
= false;
2166 args
->out
[0] = f32undef
;
2167 args
->out
[1] = f32undef
;
2168 args
->out
[2] = f32undef
;
2169 args
->out
[3] = f32undef
;
2171 switch (spi_shader_col_format
) {
2172 case V_028714_SPI_SHADER_ZERO
:
2173 args
->enabled_channels
= 0; /* writemask */
2174 args
->target
= V_008DFC_SQ_EXP_NULL
;
2177 case V_028714_SPI_SHADER_32_R
:
2178 args
->enabled_channels
= 1; /* writemask */
2179 args
->out
[0] = values
[0];
2182 case V_028714_SPI_SHADER_32_GR
:
2183 args
->enabled_channels
= 0x3; /* writemask */
2184 args
->out
[0] = values
[0];
2185 args
->out
[1] = values
[1];
2188 case V_028714_SPI_SHADER_32_AR
:
2189 args
->enabled_channels
= 0x9; /* writemask */
2190 args
->out
[0] = values
[0];
2191 args
->out
[3] = values
[3];
2194 case V_028714_SPI_SHADER_FP16_ABGR
:
2195 args
->compr
= 1; /* COMPR flag */
2197 for (chan
= 0; chan
< 2; chan
++) {
2198 LLVMValueRef pack_args
[2] = {
2200 values
[2 * chan
+ 1]
2202 LLVMValueRef packed
;
2204 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
2205 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2209 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2210 for (chan
= 0; chan
< 4; chan
++) {
2211 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
2212 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2213 LLVMConstReal(ctx
->f32
, 65535), "");
2214 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2215 LLVMConstReal(ctx
->f32
, 0.5), "");
2216 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2220 args
->compr
= 1; /* COMPR flag */
2221 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2222 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2225 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2226 for (chan
= 0; chan
< 4; chan
++) {
2227 /* Clamp between [-1, 1]. */
2228 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MIN
,
2230 LLVMConstReal(ctx
->f32
, 1));
2231 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MAX
,
2233 LLVMConstReal(ctx
->f32
, -1));
2234 /* Convert to a signed integer in [-32767, 32767]. */
2235 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2236 LLVMConstReal(ctx
->f32
, 32767), "");
2237 /* If positive, add 0.5, else add -0.5. */
2238 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2239 LLVMBuildSelect(builder
,
2240 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2241 val
[chan
], ctx
->ac
.f32_0
, ""),
2242 LLVMConstReal(ctx
->f32
, 0.5),
2243 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
2244 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2247 args
->compr
= 1; /* COMPR flag */
2248 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2249 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2252 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2253 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2254 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
2255 LLVMValueRef max_alpha
=
2256 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
2259 for (chan
= 0; chan
< 4; chan
++) {
2260 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2261 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_UMIN
,
2263 chan
== 3 ? max_alpha
: max_rgb
);
2266 args
->compr
= 1; /* COMPR flag */
2267 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2268 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2272 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2273 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2274 is_int8
? 127 : is_int10
? 511 : 32767, 0);
2275 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
2276 is_int8
? -128 : is_int10
? -512 : -32768, 0);
2277 LLVMValueRef max_alpha
=
2278 !is_int10
? max_rgb
: ctx
->i32_1
;
2279 LLVMValueRef min_alpha
=
2280 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
2283 for (chan
= 0; chan
< 4; chan
++) {
2284 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2285 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2287 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
2288 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2290 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
2293 args
->compr
= 1; /* COMPR flag */
2294 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2295 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2299 case V_028714_SPI_SHADER_32_ABGR
:
2300 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2305 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2308 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2310 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2311 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2312 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2313 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2314 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2315 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2316 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2317 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2319 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2322 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2323 SI_PARAM_ALPHA_REF
);
2324 LLVMValueRef alpha_pass
=
2325 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2326 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2328 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2332 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2334 unsigned samplemask_param
)
2336 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2337 LLVMValueRef coverage
;
2339 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2340 coverage
= LLVMGetParam(ctx
->main_fn
,
2342 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2344 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2346 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2348 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2351 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2352 LLVMConstReal(ctx
->f32
,
2353 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2355 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2358 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2359 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2363 unsigned const_chan
;
2364 LLVMValueRef base_elt
;
2365 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2366 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2367 SI_VS_CONST_CLIP_PLANES
, 0);
2368 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2370 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2371 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2376 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2378 /* Compute dot products of position and user clip plane vectors */
2379 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2380 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2382 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2383 const_chan
) * 4, 0);
2384 base_elt
= buffer_load_const(ctx
, const_resource
,
2387 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2388 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2389 out_elts
[const_chan
]));
2393 args
->enabled_channels
= 0xf;
2394 args
->valid_mask
= 0;
2396 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2401 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2405 if (so
->num_outputs
)
2406 fprintf(stderr
, "STREAMOUT\n");
2408 for (i
= 0; i
< so
->num_outputs
; i
++) {
2409 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2410 so
->output
[i
].start_component
;
2411 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2412 i
, so
->output
[i
].output_buffer
,
2413 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2414 so
->output
[i
].register_index
,
2415 mask
& 1 ? "x" : "",
2416 mask
& 2 ? "y" : "",
2417 mask
& 4 ? "z" : "",
2418 mask
& 8 ? "w" : "");
2422 static void emit_streamout_output(struct si_shader_context
*ctx
,
2423 LLVMValueRef
const *so_buffers
,
2424 LLVMValueRef
const *so_write_offsets
,
2425 struct pipe_stream_output
*stream_out
,
2426 struct si_shader_output_values
*shader_out
)
2428 unsigned buf_idx
= stream_out
->output_buffer
;
2429 unsigned start
= stream_out
->start_component
;
2430 unsigned num_comps
= stream_out
->num_components
;
2431 LLVMValueRef out
[4];
2433 assert(num_comps
&& num_comps
<= 4);
2434 if (!num_comps
|| num_comps
> 4)
2437 /* Load the output as int. */
2438 for (int j
= 0; j
< num_comps
; j
++) {
2439 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2441 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2444 /* Pack the output. */
2445 LLVMValueRef vdata
= NULL
;
2447 switch (num_comps
) {
2448 case 1: /* as i32 */
2451 case 2: /* as v2i32 */
2452 case 3: /* as v4i32 (aligned to 4) */
2453 case 4: /* as v4i32 */
2454 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2455 for (int j
= 0; j
< num_comps
; j
++) {
2456 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2457 LLVMConstInt(ctx
->i32
, j
, 0), "");
2462 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2464 so_write_offsets
[buf_idx
],
2466 stream_out
->dst_offset
* 4, 1, 1, true, false);
2470 * Write streamout data to buffers for vertex stream @p stream (different
2471 * vertex streams can occur for GS copy shaders).
2473 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2474 struct si_shader_output_values
*outputs
,
2475 unsigned noutput
, unsigned stream
)
2477 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2478 struct pipe_stream_output_info
*so
= &sel
->so
;
2479 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2481 struct lp_build_if_state if_ctx
;
2483 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2484 LLVMValueRef so_vtx_count
=
2485 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2487 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2489 /* can_emit = tid < so_vtx_count; */
2490 LLVMValueRef can_emit
=
2491 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2493 /* Emit the streamout code conditionally. This actually avoids
2494 * out-of-bounds buffer access. The hw tells us via the SGPR
2495 * (so_vtx_count) which threads are allowed to emit streamout data. */
2496 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2498 /* The buffer offset is computed as follows:
2499 * ByteOffset = streamout_offset[buffer_id]*4 +
2500 * (streamout_write_index + thread_id)*stride[buffer_id] +
2504 LLVMValueRef so_write_index
=
2505 LLVMGetParam(ctx
->main_fn
,
2506 ctx
->param_streamout_write_index
);
2508 /* Compute (streamout_write_index + thread_id). */
2509 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2511 /* Load the descriptor and compute the write offset for each
2512 * enabled buffer. */
2513 LLVMValueRef so_write_offset
[4] = {};
2514 LLVMValueRef so_buffers
[4];
2515 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2516 ctx
->param_rw_buffers
);
2518 for (i
= 0; i
< 4; i
++) {
2522 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2523 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2525 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2527 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2528 ctx
->param_streamout_offset
[i
]);
2529 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2531 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2532 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2533 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2536 /* Write streamout data. */
2537 for (i
= 0; i
< so
->num_outputs
; i
++) {
2538 unsigned reg
= so
->output
[i
].register_index
;
2543 if (stream
!= so
->output
[i
].stream
)
2546 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2547 &so
->output
[i
], &outputs
[reg
]);
2550 lp_build_endif(&if_ctx
);
2553 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2554 LLVMValueRef
*values
)
2556 struct ac_export_args args
;
2558 si_llvm_init_export_args(ctx
, values
,
2559 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2560 ac_build_export(&ctx
->ac
, &args
);
2563 static void si_build_param_exports(struct si_shader_context
*ctx
,
2564 struct si_shader_output_values
*outputs
,
2567 struct si_shader
*shader
= ctx
->shader
;
2568 unsigned param_count
= 0;
2570 for (unsigned i
= 0; i
< noutput
; i
++) {
2571 unsigned semantic_name
= outputs
[i
].semantic_name
;
2572 unsigned semantic_index
= outputs
[i
].semantic_index
;
2574 if (outputs
[i
].vertex_stream
[0] != 0 &&
2575 outputs
[i
].vertex_stream
[1] != 0 &&
2576 outputs
[i
].vertex_stream
[2] != 0 &&
2577 outputs
[i
].vertex_stream
[3] != 0)
2580 switch (semantic_name
) {
2581 case TGSI_SEMANTIC_LAYER
:
2582 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2583 case TGSI_SEMANTIC_CLIPDIST
:
2584 case TGSI_SEMANTIC_COLOR
:
2585 case TGSI_SEMANTIC_BCOLOR
:
2586 case TGSI_SEMANTIC_PRIMID
:
2587 case TGSI_SEMANTIC_FOG
:
2588 case TGSI_SEMANTIC_TEXCOORD
:
2589 case TGSI_SEMANTIC_GENERIC
:
2595 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2596 semantic_index
< SI_MAX_IO_GENERIC
) &&
2597 shader
->key
.opt
.kill_outputs
&
2598 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2601 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2603 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2604 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2607 shader
->info
.nr_param_exports
= param_count
;
2610 /* Generate export instructions for hardware VS shader stage */
2611 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2612 struct si_shader_output_values
*outputs
,
2615 struct si_shader
*shader
= ctx
->shader
;
2616 struct ac_export_args pos_args
[4] = {};
2617 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2621 /* Build position exports. */
2622 for (i
= 0; i
< noutput
; i
++) {
2623 switch (outputs
[i
].semantic_name
) {
2624 case TGSI_SEMANTIC_POSITION
:
2625 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2626 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2628 case TGSI_SEMANTIC_PSIZE
:
2629 psize_value
= outputs
[i
].values
[0];
2631 case TGSI_SEMANTIC_LAYER
:
2632 layer_value
= outputs
[i
].values
[0];
2634 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2635 viewport_index_value
= outputs
[i
].values
[0];
2637 case TGSI_SEMANTIC_EDGEFLAG
:
2638 edgeflag_value
= outputs
[i
].values
[0];
2640 case TGSI_SEMANTIC_CLIPDIST
:
2641 if (!shader
->key
.opt
.clip_disable
) {
2642 unsigned index
= 2 + outputs
[i
].semantic_index
;
2643 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2644 V_008DFC_SQ_EXP_POS
+ index
,
2648 case TGSI_SEMANTIC_CLIPVERTEX
:
2649 if (!shader
->key
.opt
.clip_disable
) {
2650 si_llvm_emit_clipvertex(ctx
, pos_args
,
2657 /* We need to add the position output manually if it's missing. */
2658 if (!pos_args
[0].out
[0]) {
2659 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2660 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2661 pos_args
[0].done
= 0; /* last export? */
2662 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2663 pos_args
[0].compr
= 0; /* COMPR flag */
2664 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2665 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2666 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2667 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2670 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2671 if (shader
->selector
->info
.writes_psize
||
2672 shader
->selector
->info
.writes_edgeflag
||
2673 shader
->selector
->info
.writes_viewport_index
||
2674 shader
->selector
->info
.writes_layer
) {
2675 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2676 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2677 (shader
->selector
->info
.writes_layer
<< 2);
2679 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2680 pos_args
[1].done
= 0; /* last export? */
2681 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2682 pos_args
[1].compr
= 0; /* COMPR flag */
2683 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2684 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2685 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2686 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2688 if (shader
->selector
->info
.writes_psize
)
2689 pos_args
[1].out
[0] = psize_value
;
2691 if (shader
->selector
->info
.writes_edgeflag
) {
2692 /* The output is a float, but the hw expects an integer
2693 * with the first bit containing the edge flag. */
2694 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2697 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2701 /* The LLVM intrinsic expects a float. */
2702 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2705 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2706 /* GFX9 has the layer in out.z[10:0] and the viewport
2707 * index in out.z[19:16].
2709 if (shader
->selector
->info
.writes_layer
)
2710 pos_args
[1].out
[2] = layer_value
;
2712 if (shader
->selector
->info
.writes_viewport_index
) {
2713 LLVMValueRef v
= viewport_index_value
;
2715 v
= ac_to_integer(&ctx
->ac
, v
);
2716 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2717 LLVMConstInt(ctx
->i32
, 16, 0), "");
2718 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2719 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2720 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2721 pos_args
[1].enabled_channels
|= 1 << 2;
2724 if (shader
->selector
->info
.writes_layer
)
2725 pos_args
[1].out
[2] = layer_value
;
2727 if (shader
->selector
->info
.writes_viewport_index
) {
2728 pos_args
[1].out
[3] = viewport_index_value
;
2729 pos_args
[1].enabled_channels
|= 1 << 3;
2734 for (i
= 0; i
< 4; i
++)
2735 if (pos_args
[i
].out
[0])
2736 shader
->info
.nr_pos_exports
++;
2739 for (i
= 0; i
< 4; i
++) {
2740 if (!pos_args
[i
].out
[0])
2743 /* Specify the target we are exporting */
2744 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2746 if (pos_idx
== shader
->info
.nr_pos_exports
)
2747 /* Specify that this is the last export */
2748 pos_args
[i
].done
= 1;
2750 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2753 /* Build parameter exports. */
2754 si_build_param_exports(ctx
, outputs
, noutput
);
2758 * Forward all outputs from the vertex shader to the TES. This is only used
2759 * for the fixed function TCS.
2761 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2763 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2764 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
2765 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2768 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2769 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2770 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2772 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
2773 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
2774 lds_vertex_stride
, "");
2775 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2776 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
2778 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
2780 unsigned i
= u_bit_scan64(&inputs
);
2782 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2783 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2786 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2787 get_rel_patch_id(ctx
),
2789 LLVMConstInt(ctx
->i32
, i
, 0));
2791 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
2794 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2795 buffer_offset
, 0, 1, 0, true, false);
2799 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2800 LLVMValueRef rel_patch_id
,
2801 LLVMValueRef invocation_id
,
2802 LLVMValueRef tcs_out_current_patch_data_offset
,
2803 LLVMValueRef invoc0_tf_outer
[4],
2804 LLVMValueRef invoc0_tf_inner
[2])
2806 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2807 struct si_shader
*shader
= ctx
->shader
;
2808 unsigned tess_inner_index
, tess_outer_index
;
2809 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2810 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
2811 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
2812 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2814 /* Add a barrier before loading tess factors from LDS. */
2815 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
2816 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2818 /* Do this only for invocation 0, because the tess levels are per-patch,
2821 * This can't jump, because invocation 0 executes this. It should
2822 * at least mask out the loads and stores for other invocations.
2824 lp_build_if(&if_ctx
, &ctx
->gallivm
,
2825 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
2826 invocation_id
, ctx
->i32_0
, ""));
2828 /* Determine the layout of one tess factor element in the buffer. */
2829 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2830 case PIPE_PRIM_LINES
:
2831 stride
= 2; /* 2 dwords, 1 vec2 store */
2835 case PIPE_PRIM_TRIANGLES
:
2836 stride
= 4; /* 4 dwords, 1 vec4 store */
2840 case PIPE_PRIM_QUADS
:
2841 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2850 for (i
= 0; i
< 4; i
++) {
2851 inner
[i
] = LLVMGetUndef(ctx
->i32
);
2852 outer
[i
] = LLVMGetUndef(ctx
->i32
);
2855 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
2856 /* Tess factors are in VGPRs. */
2857 for (i
= 0; i
< outer_comps
; i
++)
2858 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
2859 for (i
= 0; i
< inner_comps
; i
++)
2860 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
2862 /* Load tess_inner and tess_outer from LDS.
2863 * Any invocation can write them, so we can't get them from a temporary.
2865 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
2866 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
2868 lds_base
= tcs_out_current_patch_data_offset
;
2869 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2870 LLVMConstInt(ctx
->i32
,
2871 tess_inner_index
* 4, 0), "");
2872 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2873 LLVMConstInt(ctx
->i32
,
2874 tess_outer_index
* 4, 0), "");
2876 for (i
= 0; i
< outer_comps
; i
++) {
2878 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
2880 for (i
= 0; i
< inner_comps
; i
++) {
2881 inner
[i
] = out
[outer_comps
+i
] =
2882 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
2886 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2887 /* For isolines, the hardware expects tess factors in the
2888 * reverse order from what GLSL / TGSI specify.
2890 LLVMValueRef tmp
= out
[0];
2895 /* Convert the outputs to vectors for stores. */
2896 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
2900 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
2902 /* Get the buffer. */
2903 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
2905 /* Get the offset. */
2906 tf_base
= LLVMGetParam(ctx
->main_fn
,
2907 ctx
->param_tcs_factor_offset
);
2908 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
2909 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
2911 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
2912 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
2913 rel_patch_id
, ctx
->i32_0
, ""));
2915 /* Store the dynamic HS control word. */
2917 if (ctx
->screen
->info
.chip_class
<= VI
) {
2918 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
2919 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
2920 1, ctx
->i32_0
, tf_base
,
2921 offset
, 1, 0, true, false);
2925 lp_build_endif(&inner_if_ctx
);
2927 /* Store the tessellation factors. */
2928 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
2929 MIN2(stride
, 4), byteoffset
, tf_base
,
2930 offset
, 1, 0, true, false);
2933 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
2934 stride
- 4, byteoffset
, tf_base
,
2935 offset
, 1, 0, true, false);
2937 /* Store the tess factors into the offchip buffer if TES reads them. */
2938 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
2939 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
2940 LLVMValueRef tf_inner_offset
;
2941 unsigned param_outer
, param_inner
;
2943 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2944 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2946 param_outer
= si_shader_io_get_unique_index_patch(
2947 TGSI_SEMANTIC_TESSOUTER
, 0);
2948 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2949 LLVMConstInt(ctx
->i32
, param_outer
, 0));
2951 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
2952 util_next_power_of_two(outer_comps
));
2954 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
2955 outer_comps
, tf_outer_offset
,
2956 base
, 0, 1, 0, true, false);
2958 param_inner
= si_shader_io_get_unique_index_patch(
2959 TGSI_SEMANTIC_TESSINNER
, 0);
2960 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2961 LLVMConstInt(ctx
->i32
, param_inner
, 0));
2963 inner_vec
= inner_comps
== 1 ? inner
[0] :
2964 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
2965 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
2966 inner_comps
, tf_inner_offset
,
2967 base
, 0, 1, 0, true, false);
2971 lp_build_endif(&if_ctx
);
2975 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2976 unsigned param
, unsigned return_index
)
2978 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
2979 LLVMGetParam(ctx
->main_fn
, param
),
2984 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2985 unsigned param
, unsigned return_index
)
2987 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2988 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
2990 return LLVMBuildInsertValue(builder
, ret
,
2991 ac_to_float(&ctx
->ac
, p
),
2996 si_insert_input_ptr_as_2xi32(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2997 unsigned param
, unsigned return_index
)
2999 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3000 LLVMValueRef ptr
, lo
, hi
;
3002 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3003 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3004 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3005 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3006 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3007 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3008 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3011 /* This only writes the tessellation factor levels. */
3012 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3014 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3015 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3016 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3018 si_copy_tcs_inputs(bld_base
);
3020 rel_patch_id
= get_rel_patch_id(ctx
);
3021 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
3022 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3024 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3025 LLVMBasicBlockRef blocks
[2] = {
3026 LLVMGetInsertBlock(builder
),
3027 ctx
->merged_wrap_if_state
.entry_block
3029 LLVMValueRef values
[2];
3031 lp_build_endif(&ctx
->merged_wrap_if_state
);
3033 values
[0] = rel_patch_id
;
3034 values
[1] = LLVMGetUndef(ctx
->i32
);
3035 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3037 values
[0] = tf_lds_offset
;
3038 values
[1] = LLVMGetUndef(ctx
->i32
);
3039 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3041 values
[0] = invocation_id
;
3042 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3043 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3046 /* Return epilog parameters from this function. */
3047 LLVMValueRef ret
= ctx
->return_value
;
3050 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3051 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3052 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3053 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3054 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3055 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3056 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3057 /* Tess offchip and tess factor offsets are at the beginning. */
3058 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3059 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3060 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
3062 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3063 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3064 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3065 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3066 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3067 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3068 /* Tess offchip and tess factor offsets are after user SGPRs. */
3069 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3070 GFX6_TCS_NUM_USER_SGPR
);
3071 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3072 GFX6_TCS_NUM_USER_SGPR
+ 1);
3073 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3077 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3078 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3079 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3081 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3082 * the invocation_id output does not alias the param_tcs_rel_ids input,
3083 * which saves a V_MOV on gfx9.
3087 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3088 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3090 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3091 vgpr
++; /* skip the tess factor LDS offset */
3092 for (unsigned i
= 0; i
< 6; i
++) {
3093 LLVMValueRef value
=
3094 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3095 value
= ac_to_float(&ctx
->ac
, value
);
3096 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3099 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3101 ctx
->return_value
= ret
;
3104 /* Pass TCS inputs from LS to TCS on GFX9. */
3105 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3107 LLVMValueRef ret
= ctx
->return_value
;
3109 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3110 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3111 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3112 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3114 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3115 8 + SI_SGPR_RW_BUFFERS
);
3116 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3117 ctx
->param_bindless_samplers_and_images
,
3118 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3120 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3121 8 + SI_SGPR_VS_STATE_BITS
);
3122 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3123 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3124 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3125 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3126 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3127 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3128 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3129 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3130 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3131 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3133 unsigned desc_param
= ctx
->param_tcs_factor_addr_base64k
+ 2;
3134 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3135 8 + GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS
);
3136 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3137 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES
);
3139 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3140 ret
= si_insert_input_ret_float(ctx
, ret
,
3141 ctx
->param_tcs_patch_id
, vgpr
++);
3142 ret
= si_insert_input_ret_float(ctx
, ret
,
3143 ctx
->param_tcs_rel_ids
, vgpr
++);
3144 ctx
->return_value
= ret
;
3147 /* Pass GS inputs from ES to GS on GFX9. */
3148 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3150 LLVMValueRef ret
= ctx
->return_value
;
3152 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3153 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3154 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3156 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3157 8 + SI_SGPR_RW_BUFFERS
);
3158 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3159 ctx
->param_bindless_samplers_and_images
,
3160 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3162 unsigned desc_param
= ctx
->param_vs_state_bits
+ 1;
3163 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3164 8 + GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS
);
3165 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3166 8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES
);
3168 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3169 for (unsigned i
= 0; i
< 5; i
++) {
3170 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3171 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3173 ctx
->return_value
= ret
;
3176 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3177 unsigned max_outputs
,
3178 LLVMValueRef
*addrs
)
3180 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3181 struct si_shader
*shader
= ctx
->shader
;
3182 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3184 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3185 ctx
->param_rel_auto_id
);
3186 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3187 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3188 vertex_dw_stride
, "");
3190 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3191 * its inputs from it. */
3192 for (i
= 0; i
< info
->num_outputs
; i
++) {
3193 unsigned name
= info
->output_semantic_name
[i
];
3194 unsigned index
= info
->output_semantic_index
[i
];
3196 /* The ARB_shader_viewport_layer_array spec contains the
3199 * 2) What happens if gl_ViewportIndex or gl_Layer is
3200 * written in the vertex shader and a geometry shader is
3203 * RESOLVED: The value written by the last vertex processing
3204 * stage is used. If the last vertex processing stage
3205 * (vertex, tessellation evaluation or geometry) does not
3206 * statically assign to gl_ViewportIndex or gl_Layer, index
3207 * or layer zero is assumed.
3209 * So writes to those outputs in VS-as-LS are simply ignored.
3211 if (name
== TGSI_SEMANTIC_LAYER
||
3212 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3215 int param
= si_shader_io_get_unique_index(name
, index
);
3216 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3217 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3219 for (chan
= 0; chan
< 4; chan
++) {
3220 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3223 lds_store(ctx
, chan
, dw_addr
,
3224 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3228 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3229 si_set_ls_return_value_for_tcs(ctx
);
3232 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3233 unsigned max_outputs
,
3234 LLVMValueRef
*addrs
)
3236 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3237 struct si_shader
*es
= ctx
->shader
;
3238 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3239 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3240 ctx
->param_es2gs_offset
);
3241 LLVMValueRef lds_base
= NULL
;
3245 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3246 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3247 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3248 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3249 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3250 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3251 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3252 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3253 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3256 for (i
= 0; i
< info
->num_outputs
; i
++) {
3259 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3260 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3263 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3264 info
->output_semantic_index
[i
]);
3266 for (chan
= 0; chan
< 4; chan
++) {
3267 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3268 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3270 /* GFX9 has the ESGS ring in LDS. */
3271 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3272 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3276 ac_build_buffer_store_dword(&ctx
->ac
,
3278 out_val
, 1, NULL
, soffset
,
3279 (4 * param
+ chan
) * 4,
3284 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3285 si_set_es_return_value_for_gs(ctx
);
3288 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3290 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3291 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3293 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3296 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3298 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3299 si_get_gs_wave_id(ctx
));
3301 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3302 lp_build_endif(&ctx
->merged_wrap_if_state
);
3305 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3306 unsigned max_outputs
,
3307 LLVMValueRef
*addrs
)
3309 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3310 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3312 assert(info
->num_outputs
<= max_outputs
);
3314 emit_gs_epilogue(ctx
);
3317 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3319 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3320 emit_gs_epilogue(ctx
);
3323 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3324 unsigned max_outputs
,
3325 LLVMValueRef
*addrs
)
3327 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3328 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3329 struct si_shader_output_values
*outputs
= NULL
;
3332 assert(!ctx
->shader
->is_gs_copy_shader
);
3333 assert(info
->num_outputs
<= max_outputs
);
3335 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3337 /* Vertex color clamping.
3339 * This uses a state constant loaded in a user data SGPR and
3340 * an IF statement is added that clamps all colors if the constant
3343 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3344 struct lp_build_if_state if_ctx
;
3345 LLVMValueRef cond
= NULL
;
3346 LLVMValueRef addr
, val
;
3348 for (i
= 0; i
< info
->num_outputs
; i
++) {
3349 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3350 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3353 /* We've found a color. */
3355 /* The state is in the first bit of the user SGPR. */
3356 cond
= LLVMGetParam(ctx
->main_fn
,
3357 ctx
->param_vs_state_bits
);
3358 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3360 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3363 for (j
= 0; j
< 4; j
++) {
3364 addr
= addrs
[4 * i
+ j
];
3365 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3366 val
= ac_build_clamp(&ctx
->ac
, val
);
3367 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3372 lp_build_endif(&if_ctx
);
3375 for (i
= 0; i
< info
->num_outputs
; i
++) {
3376 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3377 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3379 for (j
= 0; j
< 4; j
++) {
3380 outputs
[i
].values
[j
] =
3381 LLVMBuildLoad(ctx
->ac
.builder
,
3384 outputs
[i
].vertex_stream
[j
] =
3385 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3389 if (ctx
->shader
->selector
->so
.num_outputs
)
3390 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3392 /* Export PrimitiveID. */
3393 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3394 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3395 outputs
[i
].semantic_index
= 0;
3396 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3397 for (j
= 1; j
< 4; j
++)
3398 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3400 memset(outputs
[i
].vertex_stream
, 0,
3401 sizeof(outputs
[i
].vertex_stream
));
3405 si_llvm_export_vs(ctx
, outputs
, i
);
3409 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3411 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3413 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3414 &ctx
->outputs
[0][0]);
3417 struct si_ps_exports
{
3419 struct ac_export_args args
[10];
3422 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
3423 bool writes_samplemask
)
3426 /* Z needs 32 bits. */
3427 if (writes_samplemask
)
3428 return V_028710_SPI_SHADER_32_ABGR
;
3429 else if (writes_stencil
)
3430 return V_028710_SPI_SHADER_32_GR
;
3432 return V_028710_SPI_SHADER_32_R
;
3433 } else if (writes_stencil
|| writes_samplemask
) {
3434 /* Both stencil and sample mask need only 16 bits. */
3435 return V_028710_SPI_SHADER_UINT16_ABGR
;
3437 return V_028710_SPI_SHADER_ZERO
;
3441 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3442 LLVMValueRef depth
, LLVMValueRef stencil
,
3443 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3445 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3446 struct lp_build_context
*base
= &bld_base
->base
;
3447 struct ac_export_args args
;
3449 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
3451 samplemask
!= NULL
);
3453 assert(depth
|| stencil
|| samplemask
);
3455 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3456 args
.done
= 1; /* DONE bit */
3458 /* Specify the target we are exporting */
3459 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
3461 args
.compr
= 0; /* COMP flag */
3462 args
.out
[0] = base
->undef
; /* R, depth */
3463 args
.out
[1] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
3464 args
.out
[2] = base
->undef
; /* B, sample mask */
3465 args
.out
[3] = base
->undef
; /* A, alpha to mask */
3467 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
3469 args
.compr
= 1; /* COMPR flag */
3472 /* Stencil should be in X[23:16]. */
3473 stencil
= ac_to_integer(&ctx
->ac
, stencil
);
3474 stencil
= LLVMBuildShl(ctx
->ac
.builder
, stencil
,
3475 LLVMConstInt(ctx
->i32
, 16, 0), "");
3476 args
.out
[0] = ac_to_float(&ctx
->ac
, stencil
);
3480 /* SampleMask should be in Y[15:0]. */
3481 args
.out
[1] = samplemask
;
3486 args
.out
[0] = depth
;
3490 args
.out
[1] = stencil
;
3494 args
.out
[2] = samplemask
;
3499 /* SI (except OLAND and HAINAN) has a bug that it only looks
3500 * at the X writemask component. */
3501 if (ctx
->screen
->info
.chip_class
== SI
&&
3502 ctx
->screen
->info
.family
!= CHIP_OLAND
&&
3503 ctx
->screen
->info
.family
!= CHIP_HAINAN
)
3506 /* Specify which components to enable */
3507 args
.enabled_channels
= mask
;
3509 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3512 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3513 LLVMValueRef
*color
, unsigned index
,
3514 unsigned samplemask_param
,
3515 bool is_last
, struct si_ps_exports
*exp
)
3517 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3521 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3522 for (i
= 0; i
< 4; i
++)
3523 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3526 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3527 color
[3] = ctx
->ac
.f32_1
;
3531 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3532 si_alpha_test(bld_base
, color
[3]);
3534 /* Line & polygon smoothing */
3535 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3536 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3539 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3540 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3541 struct ac_export_args args
[8];
3544 /* Get the export arguments, also find out what the last one is. */
3545 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3546 si_llvm_init_export_args(ctx
, color
,
3547 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3548 if (args
[c
].enabled_channels
)
3552 /* Emit all exports. */
3553 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3554 if (is_last
&& last
== c
) {
3555 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3556 args
[c
].done
= 1; /* DONE bit */
3557 } else if (!args
[c
].enabled_channels
)
3558 continue; /* unnecessary NULL export */
3560 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3563 struct ac_export_args args
;
3566 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3569 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3570 args
.done
= 1; /* DONE bit */
3571 } else if (!args
.enabled_channels
)
3572 return; /* unnecessary NULL export */
3574 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3578 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3579 struct si_ps_exports
*exp
)
3581 for (unsigned i
= 0; i
< exp
->num
; i
++)
3582 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3585 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3587 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3588 struct lp_build_context
*base
= &bld_base
->base
;
3589 struct ac_export_args args
;
3591 args
.enabled_channels
= 0x0; /* enabled channels */
3592 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3593 args
.done
= 1; /* DONE bit */
3594 args
.target
= V_008DFC_SQ_EXP_NULL
;
3595 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3596 args
.out
[0] = base
->undef
; /* R */
3597 args
.out
[1] = base
->undef
; /* G */
3598 args
.out
[2] = base
->undef
; /* B */
3599 args
.out
[3] = base
->undef
; /* A */
3601 ac_build_export(&ctx
->ac
, &args
);
3605 * Return PS outputs in this order:
3607 * v[0:3] = color0.xyzw
3608 * v[4:7] = color1.xyzw
3613 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3615 * The alpha-ref SGPR is returned via its original location.
3617 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3618 unsigned max_outputs
,
3619 LLVMValueRef
*addrs
)
3621 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3622 struct si_shader
*shader
= ctx
->shader
;
3623 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3624 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3625 unsigned i
, j
, first_vgpr
, vgpr
;
3627 LLVMValueRef color
[8][4] = {};
3628 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3631 if (ctx
->postponed_kill
)
3632 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3634 /* Read the output values. */
3635 for (i
= 0; i
< info
->num_outputs
; i
++) {
3636 unsigned semantic_name
= info
->output_semantic_name
[i
];
3637 unsigned semantic_index
= info
->output_semantic_index
[i
];
3639 switch (semantic_name
) {
3640 case TGSI_SEMANTIC_COLOR
:
3641 assert(semantic_index
< 8);
3642 for (j
= 0; j
< 4; j
++) {
3643 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3644 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3645 color
[semantic_index
][j
] = result
;
3648 case TGSI_SEMANTIC_POSITION
:
3649 depth
= LLVMBuildLoad(builder
,
3650 addrs
[4 * i
+ 2], "");
3652 case TGSI_SEMANTIC_STENCIL
:
3653 stencil
= LLVMBuildLoad(builder
,
3654 addrs
[4 * i
+ 1], "");
3656 case TGSI_SEMANTIC_SAMPLEMASK
:
3657 samplemask
= LLVMBuildLoad(builder
,
3658 addrs
[4 * i
+ 0], "");
3661 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3666 /* Fill the return structure. */
3667 ret
= ctx
->return_value
;
3670 ret
= LLVMBuildInsertValue(builder
, ret
,
3671 ac_to_integer(&ctx
->ac
,
3672 LLVMGetParam(ctx
->main_fn
,
3673 SI_PARAM_ALPHA_REF
)),
3674 SI_SGPR_ALPHA_REF
, "");
3677 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3678 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3682 for (j
= 0; j
< 4; j
++)
3683 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3686 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3688 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3690 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3692 /* Add the input sample mask for smoothing at the end. */
3693 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3694 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3695 ret
= LLVMBuildInsertValue(builder
, ret
,
3696 LLVMGetParam(ctx
->main_fn
,
3697 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3699 ctx
->return_value
= ret
;
3702 void si_emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3704 LLVMValueRef args
[1] = {
3705 LLVMConstInt(ctx
->i32
, simm16
, 0)
3707 lp_build_intrinsic(ctx
->ac
.builder
, "llvm.amdgcn.s.waitcnt",
3708 ctx
->voidt
, args
, 1, 0);
3711 static void membar_emit(
3712 const struct lp_build_tgsi_action
*action
,
3713 struct lp_build_tgsi_context
*bld_base
,
3714 struct lp_build_emit_data
*emit_data
)
3716 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3717 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3718 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3719 unsigned waitcnt
= NOOP_WAITCNT
;
3721 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3722 waitcnt
&= VM_CNT
& LGKM_CNT
;
3724 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3725 TGSI_MEMBAR_SHADER_BUFFER
|
3726 TGSI_MEMBAR_SHADER_IMAGE
))
3729 if (flags
& TGSI_MEMBAR_SHARED
)
3730 waitcnt
&= LGKM_CNT
;
3732 if (waitcnt
!= NOOP_WAITCNT
)
3733 si_emit_waitcnt(ctx
, waitcnt
);
3736 static void clock_emit(
3737 const struct lp_build_tgsi_action
*action
,
3738 struct lp_build_tgsi_context
*bld_base
,
3739 struct lp_build_emit_data
*emit_data
)
3741 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3744 tmp
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.readcyclecounter",
3745 ctx
->i64
, NULL
, 0, 0);
3746 tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->v2i32
, "");
3748 emit_data
->output
[0] =
3749 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3750 emit_data
->output
[1] =
3751 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3754 LLVMTypeRef
si_const_array(LLVMTypeRef elem_type
, int num_elements
)
3756 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3760 static void si_llvm_emit_ddxy(
3761 const struct lp_build_tgsi_action
*action
,
3762 struct lp_build_tgsi_context
*bld_base
,
3763 struct lp_build_emit_data
*emit_data
)
3765 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3766 unsigned opcode
= emit_data
->info
->opcode
;
3771 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3772 mask
= AC_TID_MASK_LEFT
;
3773 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3774 mask
= AC_TID_MASK_TOP
;
3776 mask
= AC_TID_MASK_TOP_LEFT
;
3778 /* for DDX we want to next X pixel, DDY next Y pixel. */
3779 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3781 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3782 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3783 emit_data
->output
[emit_data
->chan
] = val
;
3787 * this takes an I,J coordinate pair,
3788 * and works out the X and Y derivatives.
3789 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3791 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3792 struct lp_build_tgsi_context
*bld_base
,
3793 LLVMValueRef interp_ij
)
3795 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3796 LLVMValueRef result
[4], a
;
3799 for (i
= 0; i
< 2; i
++) {
3800 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3801 LLVMConstInt(ctx
->i32
, i
, 0), "");
3802 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3803 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3806 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
3809 static void interp_fetch_args(
3810 struct lp_build_tgsi_context
*bld_base
,
3811 struct lp_build_emit_data
*emit_data
)
3813 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3814 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3816 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3817 /* offset is in second src, first two channels */
3818 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
3821 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
3824 emit_data
->arg_count
= 2;
3825 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3826 LLVMValueRef sample_position
;
3827 LLVMValueRef sample_id
;
3828 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3830 /* fetch sample ID, then fetch its sample position,
3831 * and place into first two channels.
3833 sample_id
= lp_build_emit_fetch(bld_base
,
3834 emit_data
->inst
, 1, TGSI_CHAN_X
);
3835 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3837 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3838 * Language 4.50 spec says about interpolateAtSample:
3840 * "Returns the value of the input interpolant variable at
3841 * the location of sample number sample. If multisample
3842 * buffers are not available, the input variable will be
3843 * evaluated at the center of the pixel. If sample sample
3844 * does not exist, the position used to interpolate the
3845 * input variable is undefined."
3847 * This means that sample_id values outside of the valid are
3848 * in fact valid input, and the usual mechanism for loading the
3849 * sample position doesn't work.
3851 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3852 LLVMValueRef center
[4] = {
3853 LLVMConstReal(ctx
->f32
, 0.5),
3854 LLVMConstReal(ctx
->f32
, 0.5),
3859 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
3861 sample_position
= load_sample_position(ctx
, sample_id
);
3864 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3868 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
3869 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3872 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
3873 emit_data
->arg_count
= 2;
3877 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3878 struct lp_build_tgsi_context
*bld_base
,
3879 struct lp_build_emit_data
*emit_data
)
3881 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3882 struct si_shader
*shader
= ctx
->shader
;
3883 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3884 LLVMValueRef interp_param
;
3885 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3886 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3887 int input_base
, input_array_size
;
3890 LLVMValueRef prim_mask
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
3891 LLVMValueRef array_idx
;
3892 int interp_param_idx
;
3896 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
3898 if (input
->Register
.Indirect
) {
3899 unsigned array_id
= input
->Indirect
.ArrayID
;
3902 input_base
= info
->input_array_first
[array_id
];
3903 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
3905 input_base
= inst
->Src
[0].Register
.Index
;
3906 input_array_size
= info
->num_inputs
- input_base
;
3909 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
3910 1, input
->Register
.Index
- input_base
);
3912 input_base
= inst
->Src
[0].Register
.Index
;
3913 input_array_size
= 1;
3914 array_idx
= ctx
->i32_0
;
3917 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
3919 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3920 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
3921 location
= TGSI_INTERPOLATE_LOC_CENTER
;
3923 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
3925 interp_param_idx
= lookup_interp_param_index(interp
, location
);
3926 if (interp_param_idx
== -1)
3928 else if (interp_param_idx
)
3929 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
3931 interp_param
= NULL
;
3933 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3934 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3935 LLVMValueRef ij_out
[2];
3936 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
3939 * take the I then J parameters, and the DDX/Y for it, and
3940 * calculate the IJ inputs for the interpolator.
3941 * temp1 = ddx * offset/sample.x + I;
3942 * interp_param.I = ddy * offset/sample.y + temp1;
3943 * temp1 = ddx * offset/sample.x + J;
3944 * interp_param.J = ddy * offset/sample.y + temp1;
3946 for (i
= 0; i
< 2; i
++) {
3947 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
3948 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
3949 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3950 ddxy_out
, ix_ll
, "");
3951 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3952 ddxy_out
, iy_ll
, "");
3953 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3954 interp_param
, ix_ll
, "");
3955 LLVMValueRef temp1
, temp2
;
3957 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
3959 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
3961 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
3963 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
3965 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
3967 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
3971 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
3973 for (chan
= 0; chan
< 4; chan
++) {
3974 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
3975 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
3977 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
3978 LLVMValueRef v
, i
= NULL
, j
= NULL
;
3981 i
= LLVMBuildExtractElement(
3982 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
3983 j
= LLVMBuildExtractElement(
3984 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
3986 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
3989 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
3990 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
3993 emit_data
->output
[chan
] = LLVMBuildExtractElement(
3994 ctx
->ac
.builder
, gather
, array_idx
, "");
3998 static void vote_all_emit(
3999 const struct lp_build_tgsi_action
*action
,
4000 struct lp_build_tgsi_context
*bld_base
,
4001 struct lp_build_emit_data
*emit_data
)
4003 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4005 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4006 emit_data
->output
[emit_data
->chan
] =
4007 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4010 static void vote_any_emit(
4011 const struct lp_build_tgsi_action
*action
,
4012 struct lp_build_tgsi_context
*bld_base
,
4013 struct lp_build_emit_data
*emit_data
)
4015 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4017 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4018 emit_data
->output
[emit_data
->chan
] =
4019 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4022 static void vote_eq_emit(
4023 const struct lp_build_tgsi_action
*action
,
4024 struct lp_build_tgsi_context
*bld_base
,
4025 struct lp_build_emit_data
*emit_data
)
4027 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4029 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4030 emit_data
->output
[emit_data
->chan
] =
4031 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4034 static void ballot_emit(
4035 const struct lp_build_tgsi_action
*action
,
4036 struct lp_build_tgsi_context
*bld_base
,
4037 struct lp_build_emit_data
*emit_data
)
4039 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4040 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4043 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4044 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4045 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4047 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4048 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4051 static void read_invoc_fetch_args(
4052 struct lp_build_tgsi_context
*bld_base
,
4053 struct lp_build_emit_data
*emit_data
)
4055 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4056 0, emit_data
->src_chan
);
4058 /* Always read the source invocation (= lane) from the X channel. */
4059 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4061 emit_data
->arg_count
= 2;
4064 static void read_lane_emit(
4065 const struct lp_build_tgsi_action
*action
,
4066 struct lp_build_tgsi_context
*bld_base
,
4067 struct lp_build_emit_data
*emit_data
)
4069 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4071 /* We currently have no other way to prevent LLVM from lifting the icmp
4072 * calls to a dominating basic block.
4074 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4076 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4077 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4079 emit_data
->output
[emit_data
->chan
] =
4080 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4081 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4082 AC_FUNC_ATTR_READNONE
|
4083 AC_FUNC_ATTR_CONVERGENT
);
4086 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4087 struct lp_build_emit_data
*emit_data
)
4089 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4090 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4094 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4096 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4097 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4101 /* Emit one vertex from the geometry shader */
4102 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4104 LLVMValueRef
*addrs
)
4106 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4107 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4108 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4109 struct si_shader
*shader
= ctx
->shader
;
4110 struct lp_build_if_state if_state
;
4111 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4112 ctx
->param_gs2vs_offset
);
4113 LLVMValueRef gs_next_vertex
;
4114 LLVMValueRef can_emit
;
4115 unsigned chan
, offset
;
4118 /* Write vertex attribute values to GSVS ring */
4119 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4120 ctx
->gs_next_vertex
[stream
],
4123 /* If this thread has already emitted the declared maximum number of
4124 * vertices, skip the write: excessive vertex emissions are not
4125 * supposed to have any effect.
4127 * If the shader has no writes to memory, kill it instead. This skips
4128 * further memory loads and may allow LLVM to skip to the end
4131 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4132 LLVMConstInt(ctx
->i32
,
4133 shader
->selector
->gs_max_out_vertices
, 0), "");
4135 bool use_kill
= !info
->writes_memory
;
4137 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4139 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4143 for (i
= 0; i
< info
->num_outputs
; i
++) {
4144 for (chan
= 0; chan
< 4; chan
++) {
4145 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4146 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4149 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4150 LLVMValueRef voffset
=
4151 LLVMConstInt(ctx
->i32
, offset
*
4152 shader
->selector
->gs_max_out_vertices
, 0);
4155 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4156 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4158 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4160 ac_build_buffer_store_dword(&ctx
->ac
,
4161 ctx
->gsvs_ring
[stream
],
4163 voffset
, soffset
, 0,
4168 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4171 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4173 /* Signal vertex emission */
4174 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4175 si_get_gs_wave_id(ctx
));
4177 lp_build_endif(&if_state
);
4180 /* Emit one vertex from the geometry shader */
4181 static void si_tgsi_emit_vertex(
4182 const struct lp_build_tgsi_action
*action
,
4183 struct lp_build_tgsi_context
*bld_base
,
4184 struct lp_build_emit_data
*emit_data
)
4186 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4187 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4189 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4192 /* Cut one primitive from the geometry shader */
4193 static void si_llvm_emit_primitive(
4194 const struct lp_build_tgsi_action
*action
,
4195 struct lp_build_tgsi_context
*bld_base
,
4196 struct lp_build_emit_data
*emit_data
)
4198 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4201 /* Signal primitive cut */
4202 stream
= si_llvm_get_stream(bld_base
, emit_data
);
4203 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4204 si_get_gs_wave_id(ctx
));
4207 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4208 struct lp_build_tgsi_context
*bld_base
,
4209 struct lp_build_emit_data
*emit_data
)
4211 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4213 /* SI only (thanks to a hw bug workaround):
4214 * The real barrier instruction isn’t needed, because an entire patch
4215 * always fits into a single wave.
4217 if (ctx
->screen
->info
.chip_class
== SI
&&
4218 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4219 si_emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
4223 lp_build_intrinsic(ctx
->ac
.builder
,
4224 "llvm.amdgcn.s.barrier",
4225 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4228 static const struct lp_build_tgsi_action interp_action
= {
4229 .fetch_args
= interp_fetch_args
,
4230 .emit
= build_interp_intrinsic
,
4233 static void si_create_function(struct si_shader_context
*ctx
,
4235 LLVMTypeRef
*returns
, unsigned num_returns
,
4236 struct si_function_info
*fninfo
,
4237 unsigned max_workgroup_size
)
4241 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4242 fninfo
->types
, fninfo
->num_params
);
4243 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4245 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4246 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4248 /* The combination of:
4252 * allows the optimization passes to move loads and reduces
4253 * SGPR spilling significantly.
4255 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4256 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
4257 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4258 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4260 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4263 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4264 if (fninfo
->assign
[i
])
4265 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4268 if (max_workgroup_size
) {
4269 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4270 max_workgroup_size
);
4272 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4273 "no-signed-zeros-fp-math",
4276 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4277 /* These were copied from some LLVM test. */
4278 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4279 "less-precise-fpmad",
4281 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4284 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4287 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4293 static void declare_streamout_params(struct si_shader_context
*ctx
,
4294 struct pipe_stream_output_info
*so
,
4295 struct si_function_info
*fninfo
)
4299 /* Streamout SGPRs. */
4300 if (so
->num_outputs
) {
4301 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4302 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4304 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4306 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4308 /* A streamout buffer offset is loaded if the stride is non-zero. */
4309 for (i
= 0; i
< 4; i
++) {
4313 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4317 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4319 switch (shader
->selector
->type
) {
4320 case PIPE_SHADER_TESS_CTRL
:
4321 /* Return this so that LLVM doesn't remove s_barrier
4322 * instructions on chips where we use s_barrier. */
4323 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4325 case PIPE_SHADER_GEOMETRY
:
4326 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4328 case PIPE_SHADER_COMPUTE
:
4329 break; /* see below */
4335 const unsigned *properties
= shader
->selector
->info
.properties
;
4336 unsigned max_work_group_size
=
4337 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4338 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4339 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4341 if (!max_work_group_size
) {
4342 /* This is a variable group size compute shader,
4343 * compile it for the maximum possible group size.
4345 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4347 return max_work_group_size
;
4350 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4351 struct si_function_info
*fninfo
,
4354 LLVMTypeRef const_shader_buf_type
;
4356 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4357 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4358 const_shader_buf_type
= ctx
->f32
;
4360 const_shader_buf_type
= ctx
->v4i32
;
4362 unsigned const_and_shader_buffers
=
4363 add_arg(fninfo
, ARG_SGPR
,
4364 si_const_array(const_shader_buf_type
, 0));
4366 unsigned samplers_and_images
=
4367 add_arg(fninfo
, ARG_SGPR
,
4368 si_const_array(ctx
->v8i32
,
4369 SI_NUM_IMAGES
+ SI_NUM_SAMPLERS
* 2));
4371 if (assign_params
) {
4372 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4373 ctx
->param_samplers_and_images
= samplers_and_images
;
4377 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4378 struct si_function_info
*fninfo
)
4380 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4381 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
));
4382 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4383 si_const_array(ctx
->v8i32
, 0));
4386 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4387 struct si_function_info
*fninfo
)
4389 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4390 si_const_array(ctx
->v4i32
, SI_NUM_VERTEX_BUFFERS
));
4391 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4392 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4393 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4394 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4397 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4398 struct si_function_info
*fninfo
,
4399 unsigned *num_prolog_vgprs
)
4401 struct si_shader
*shader
= ctx
->shader
;
4403 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4404 if (shader
->key
.as_ls
) {
4405 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4406 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4408 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4409 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4411 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4413 if (!shader
->is_gs_copy_shader
) {
4414 /* Vertex load indices. */
4415 ctx
->param_vertex_index0
= fninfo
->num_params
;
4416 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4417 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4418 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4422 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4423 struct si_function_info
*fninfo
)
4425 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4426 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4427 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4428 ctx
->param_tes_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4432 /* Convenient merged shader definitions. */
4433 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4434 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4437 static void create_function(struct si_shader_context
*ctx
)
4439 struct si_shader
*shader
= ctx
->shader
;
4440 struct si_function_info fninfo
;
4441 LLVMTypeRef returns
[16+32*4];
4442 unsigned i
, num_return_sgprs
;
4443 unsigned num_returns
= 0;
4444 unsigned num_prolog_vgprs
= 0;
4445 unsigned type
= ctx
->type
;
4446 unsigned vs_blit_property
=
4447 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4449 si_init_function_info(&fninfo
);
4451 /* Set MERGED shaders. */
4452 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4453 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4454 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4455 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4456 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4459 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4462 case PIPE_SHADER_VERTEX
:
4463 declare_global_desc_pointers(ctx
, &fninfo
);
4465 if (vs_blit_property
) {
4466 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4467 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4468 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4469 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4471 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4472 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4473 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4474 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4475 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4476 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4477 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4478 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4479 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4480 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4481 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4482 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4486 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4490 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4491 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4493 if (shader
->key
.as_es
) {
4494 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4495 } else if (shader
->key
.as_ls
) {
4496 /* no extra parameters */
4498 if (shader
->is_gs_copy_shader
) {
4499 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4500 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4503 /* The locations of the other parameters are assigned dynamically. */
4504 declare_streamout_params(ctx
, &shader
->selector
->so
,
4509 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4512 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4513 declare_global_desc_pointers(ctx
, &fninfo
);
4514 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4515 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4516 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4517 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4518 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4519 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4520 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4521 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4522 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4525 ctx
->param_tcs_patch_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4526 ctx
->param_tcs_rel_ids
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4528 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4529 * placed after the user SGPRs.
4531 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4532 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4533 for (i
= 0; i
< 11; i
++)
4534 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4537 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4538 /* Merged stages have 8 system SGPRs at the beginning. */
4539 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_LO_HS */
4540 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_HI_HS */
4541 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4542 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4543 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4544 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4545 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4546 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4548 declare_global_desc_pointers(ctx
, &fninfo
);
4549 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4550 ctx
->type
== PIPE_SHADER_VERTEX
);
4551 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4553 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4554 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4555 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4556 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4557 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4558 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4560 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4561 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4563 /* VGPRs (first TCS, then VS) */
4564 ctx
->param_tcs_patch_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4565 ctx
->param_tcs_rel_ids
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4567 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4568 declare_vs_input_vgprs(ctx
, &fninfo
,
4571 /* LS return values are inputs to the TCS main shader part. */
4572 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4573 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4574 for (i
= 0; i
< 2; i
++)
4575 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4577 /* TCS return values are inputs to the TCS epilog.
4579 * param_tcs_offchip_offset, param_tcs_factor_offset,
4580 * param_tcs_offchip_layout, and param_rw_buffers
4581 * should be passed to the epilog.
4583 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4584 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4585 for (i
= 0; i
< 11; i
++)
4586 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4590 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4591 /* Merged stages have 8 system SGPRs at the beginning. */
4592 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_LO_GS) */
4593 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_HI_GS) */
4594 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4595 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4596 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4597 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4598 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4599 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4601 declare_global_desc_pointers(ctx
, &fninfo
);
4602 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4603 (ctx
->type
== PIPE_SHADER_VERTEX
||
4604 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4605 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4606 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4608 /* TESS_EVAL (and also GEOMETRY):
4609 * Declare as many input SGPRs as the VS has. */
4610 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4611 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4612 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4613 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4614 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4615 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4618 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4619 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4621 /* VGPRs (first GS, then VS/TES) */
4622 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4623 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4624 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4625 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4626 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4628 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4629 declare_vs_input_vgprs(ctx
, &fninfo
,
4631 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4632 declare_tes_input_vgprs(ctx
, &fninfo
);
4635 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4636 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4637 /* ES return values are inputs to GS. */
4638 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4639 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4640 for (i
= 0; i
< 5; i
++)
4641 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4645 case PIPE_SHADER_TESS_EVAL
:
4646 declare_global_desc_pointers(ctx
, &fninfo
);
4647 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4648 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4649 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4651 if (shader
->key
.as_es
) {
4652 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4653 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4654 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4656 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4657 declare_streamout_params(ctx
, &shader
->selector
->so
,
4659 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4663 declare_tes_input_vgprs(ctx
, &fninfo
);
4666 case PIPE_SHADER_GEOMETRY
:
4667 declare_global_desc_pointers(ctx
, &fninfo
);
4668 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4669 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4670 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4673 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4674 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4675 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4676 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4677 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4678 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4679 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4680 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4683 case PIPE_SHADER_FRAGMENT
:
4684 declare_global_desc_pointers(ctx
, &fninfo
);
4685 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4686 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4687 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->i32
, SI_PARAM_PRIM_MASK
);
4689 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4690 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4691 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4692 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4693 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4694 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4695 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4696 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4697 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4698 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4699 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4700 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4701 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4702 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4703 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4704 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4705 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4706 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4707 shader
->info
.face_vgpr_index
= 20;
4708 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4709 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4710 shader
->info
.ancillary_vgpr_index
= 21;
4711 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4712 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4713 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4715 /* Color inputs from the prolog. */
4716 if (shader
->selector
->info
.colors_read
) {
4717 unsigned num_color_elements
=
4718 util_bitcount(shader
->selector
->info
.colors_read
);
4720 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4721 for (i
= 0; i
< num_color_elements
; i
++)
4722 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4724 num_prolog_vgprs
+= num_color_elements
;
4727 /* Outputs for the epilog. */
4728 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4731 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4732 shader
->selector
->info
.writes_z
+
4733 shader
->selector
->info
.writes_stencil
+
4734 shader
->selector
->info
.writes_samplemask
+
4735 1 /* SampleMaskIn */;
4737 num_returns
= MAX2(num_returns
,
4739 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4741 for (i
= 0; i
< num_return_sgprs
; i
++)
4742 returns
[i
] = ctx
->i32
;
4743 for (; i
< num_returns
; i
++)
4744 returns
[i
] = ctx
->f32
;
4747 case PIPE_SHADER_COMPUTE
:
4748 declare_global_desc_pointers(ctx
, &fninfo
);
4749 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4750 if (shader
->selector
->info
.uses_grid_size
)
4751 ctx
->param_grid_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4752 if (shader
->selector
->info
.uses_block_size
)
4753 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4755 for (i
= 0; i
< 3; i
++) {
4756 ctx
->param_block_id
[i
] = -1;
4757 if (shader
->selector
->info
.uses_block_id
[i
])
4758 ctx
->param_block_id
[i
] = add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4761 ctx
->param_thread_id
= add_arg(&fninfo
, ARG_VGPR
, v3i32
);
4764 assert(0 && "unimplemented shader");
4768 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4769 si_get_max_workgroup_size(shader
));
4771 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4772 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4773 ctx
->separate_prolog
) {
4774 si_llvm_add_attribute(ctx
->main_fn
,
4775 "InitialPSInputAddr",
4776 S_0286D0_PERSP_SAMPLE_ENA(1) |
4777 S_0286D0_PERSP_CENTER_ENA(1) |
4778 S_0286D0_PERSP_CENTROID_ENA(1) |
4779 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4780 S_0286D0_LINEAR_CENTER_ENA(1) |
4781 S_0286D0_LINEAR_CENTROID_ENA(1) |
4782 S_0286D0_FRONT_FACE_ENA(1) |
4783 S_0286D0_ANCILLARY_ENA(1) |
4784 S_0286D0_POS_FIXED_PT_ENA(1));
4787 shader
->info
.num_input_sgprs
= 0;
4788 shader
->info
.num_input_vgprs
= 0;
4790 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4791 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4793 for (; i
< fninfo
.num_params
; ++i
)
4794 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4796 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4797 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4799 if (shader
->key
.as_ls
||
4800 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4801 /* GFX9 has the ESGS ring buffer in LDS. */
4802 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4803 ac_declare_lds_as_pointer(&ctx
->ac
);
4807 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4810 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4812 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4814 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4815 ctx
->param_rw_buffers
);
4817 if (ctx
->screen
->info
.chip_class
<= VI
&&
4818 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4820 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4822 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4825 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4828 if (ctx
->shader
->is_gs_copy_shader
) {
4829 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4832 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4833 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4834 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4835 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4836 LLVMValueRef base_ring
;
4838 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4840 /* The conceptual layout of the GSVS ring is
4841 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4842 * but the real memory layout is swizzled across
4844 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
4846 * Override the buffer descriptor accordingly.
4848 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
4849 uint64_t stream_offset
= 0;
4851 for (unsigned stream
= 0; stream
< 4; ++stream
) {
4852 unsigned num_components
;
4854 unsigned num_records
;
4855 LLVMValueRef ring
, tmp
;
4857 num_components
= sel
->info
.num_stream_output_components
[stream
];
4858 if (!num_components
)
4861 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
4863 /* Limit on the stride field for <= CIK. */
4864 assert(stride
< (1 << 14));
4868 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
4869 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
4870 tmp
= LLVMBuildAdd(builder
, tmp
,
4871 LLVMConstInt(ctx
->i64
,
4872 stream_offset
, 0), "");
4873 stream_offset
+= stride
* 64;
4875 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
4876 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
4877 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
4878 tmp
= LLVMBuildOr(builder
, tmp
,
4879 LLVMConstInt(ctx
->i32
,
4880 S_008F04_STRIDE(stride
) |
4881 S_008F04_SWIZZLE_ENABLE(1), 0), "");
4882 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
4883 ring
= LLVMBuildInsertElement(builder
, ring
,
4884 LLVMConstInt(ctx
->i32
, num_records
, 0),
4885 LLVMConstInt(ctx
->i32
, 2, 0), "");
4886 ring
= LLVMBuildInsertElement(builder
, ring
,
4887 LLVMConstInt(ctx
->i32
,
4888 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
4889 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
4890 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
4891 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
4892 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
4893 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
4894 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
4895 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
4896 S_008F0C_ADD_TID_ENABLE(1),
4898 LLVMConstInt(ctx
->i32
, 3, 0), "");
4900 ctx
->gsvs_ring
[stream
] = ring
;
4905 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
4906 LLVMValueRef param_rw_buffers
,
4907 unsigned param_pos_fixed_pt
)
4909 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4910 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
4912 /* Use the fixed-point gl_FragCoord input.
4913 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
4914 * per coordinate to get the repeating effect.
4916 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
4917 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
4919 /* Load the buffer descriptor. */
4920 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
4921 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
4923 /* The stipple pattern is 32x32, each row has 32 bits. */
4924 offset
= LLVMBuildMul(builder
, address
[1],
4925 LLVMConstInt(ctx
->i32
, 4, 0), "");
4926 row
= buffer_load_const(ctx
, desc
, offset
);
4927 row
= ac_to_integer(&ctx
->ac
, row
);
4928 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
4929 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
4930 ac_build_kill_if_false(&ctx
->ac
, bit
);
4933 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
4934 struct si_shader_config
*conf
,
4935 unsigned symbol_offset
)
4938 const unsigned char *config
=
4939 ac_shader_binary_config_start(binary
, symbol_offset
);
4940 bool really_needs_scratch
= false;
4942 /* LLVM adds SGPR spills to the scratch size.
4943 * Find out if we really need the scratch buffer.
4945 for (i
= 0; i
< binary
->reloc_count
; i
++) {
4946 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
4948 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
4949 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4950 really_needs_scratch
= true;
4955 /* XXX: We may be able to emit some of these values directly rather than
4956 * extracting fields to be emitted later.
4959 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
4960 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
4961 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
4963 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
4964 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
4965 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
4966 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
4967 case R_00B848_COMPUTE_PGM_RSRC1
:
4968 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
4969 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
4970 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
4971 conf
->rsrc1
= value
;
4973 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
4974 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
4976 case R_00B84C_COMPUTE_PGM_RSRC2
:
4977 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
4978 conf
->rsrc2
= value
;
4980 case R_0286CC_SPI_PS_INPUT_ENA
:
4981 conf
->spi_ps_input_ena
= value
;
4983 case R_0286D0_SPI_PS_INPUT_ADDR
:
4984 conf
->spi_ps_input_addr
= value
;
4986 case R_0286E8_SPI_TMPRING_SIZE
:
4987 case R_00B860_COMPUTE_TMPRING_SIZE
:
4988 /* WAVESIZE is in units of 256 dwords. */
4989 if (really_needs_scratch
)
4990 conf
->scratch_bytes_per_wave
=
4991 G_00B860_WAVESIZE(value
) * 256 * 4;
4993 case 0x4: /* SPILLED_SGPRS */
4994 conf
->spilled_sgprs
= value
;
4996 case 0x8: /* SPILLED_VGPRS */
4997 conf
->spilled_vgprs
= value
;
5001 static bool printed
;
5004 fprintf(stderr
, "Warning: LLVM emitted unknown "
5005 "config register: 0x%x\n", reg
);
5013 if (!conf
->spi_ps_input_addr
)
5014 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5017 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5018 uint64_t scratch_va
)
5021 uint32_t scratch_rsrc_dword0
= scratch_va
;
5022 uint32_t scratch_rsrc_dword1
=
5023 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5025 /* Enable scratch coalescing. */
5026 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5028 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5029 const struct ac_shader_reloc
*reloc
=
5030 &shader
->binary
.relocs
[i
];
5031 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5032 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5033 &scratch_rsrc_dword0
, 4);
5034 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5035 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5036 &scratch_rsrc_dword1
, 4);
5041 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5043 unsigned size
= shader
->binary
.code_size
;
5046 size
+= shader
->prolog
->binary
.code_size
;
5047 if (shader
->previous_stage
)
5048 size
+= shader
->previous_stage
->binary
.code_size
;
5049 if (shader
->prolog2
)
5050 size
+= shader
->prolog2
->binary
.code_size
;
5052 size
+= shader
->epilog
->binary
.code_size
;
5056 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5058 const struct ac_shader_binary
*prolog
=
5059 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5060 const struct ac_shader_binary
*previous_stage
=
5061 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5062 const struct ac_shader_binary
*prolog2
=
5063 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5064 const struct ac_shader_binary
*epilog
=
5065 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5066 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5067 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5068 (!epilog
? mainb
->rodata_size
: 0);
5071 assert(!prolog
|| !prolog
->rodata_size
);
5072 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5073 assert(!prolog2
|| !prolog2
->rodata_size
);
5074 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5075 !mainb
->rodata_size
);
5076 assert(!epilog
|| !epilog
->rodata_size
);
5078 r600_resource_reference(&shader
->bo
, NULL
);
5079 shader
->bo
= (struct r600_resource
*)
5080 si_aligned_buffer_create(&sscreen
->b
,
5081 sscreen
->cpdma_prefetch_writes_memory
?
5082 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5083 PIPE_USAGE_IMMUTABLE
,
5084 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5090 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5091 PIPE_TRANSFER_READ_WRITE
|
5092 PIPE_TRANSFER_UNSYNCHRONIZED
);
5094 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5095 * endian-independent. */
5097 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5098 ptr
+= prolog
->code_size
;
5100 if (previous_stage
) {
5101 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5102 ptr
+= previous_stage
->code_size
;
5105 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5106 ptr
+= prolog2
->code_size
;
5109 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5110 ptr
+= mainb
->code_size
;
5113 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5114 else if (mainb
->rodata_size
> 0)
5115 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5117 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5121 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5122 struct pipe_debug_callback
*debug
,
5123 const char *name
, FILE *file
)
5128 if (binary
->disasm_string
) {
5129 fprintf(file
, "Shader %s disassembly:\n", name
);
5130 fprintf(file
, "%s", binary
->disasm_string
);
5132 if (debug
&& debug
->debug_message
) {
5133 /* Very long debug messages are cut off, so send the
5134 * disassembly one line at a time. This causes more
5135 * overhead, but on the plus side it simplifies
5136 * parsing of resulting logs.
5138 pipe_debug_message(debug
, SHADER_INFO
,
5139 "Shader Disassembly Begin");
5141 line
= binary
->disasm_string
;
5143 p
= util_strchrnul(line
, '\n');
5147 pipe_debug_message(debug
, SHADER_INFO
,
5148 "%.*s", count
, line
);
5156 pipe_debug_message(debug
, SHADER_INFO
,
5157 "Shader Disassembly End");
5160 fprintf(file
, "Shader %s binary:\n", name
);
5161 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5162 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5163 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5164 binary
->code
[i
+ 1], binary
->code
[i
]);
5169 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5170 const struct si_shader
*shader
,
5171 struct pipe_debug_callback
*debug
,
5174 bool check_debug_option
)
5176 const struct si_shader_config
*conf
= &shader
->config
;
5177 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
5178 unsigned code_size
= si_get_shader_binary_size(shader
);
5179 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5180 unsigned lds_per_wave
= 0;
5181 unsigned max_simd_waves
;
5183 switch (sscreen
->info
.family
) {
5184 /* These always have 8 waves: */
5185 case CHIP_POLARIS10
:
5186 case CHIP_POLARIS11
:
5187 case CHIP_POLARIS12
:
5191 max_simd_waves
= 10;
5194 /* Compute LDS usage for PS. */
5195 switch (processor
) {
5196 case PIPE_SHADER_FRAGMENT
:
5197 /* The minimum usage per wave is (num_inputs * 48). The maximum
5198 * usage is (num_inputs * 48 * 16).
5199 * We can get anything in between and it varies between waves.
5201 * The 48 bytes per input for a single primitive is equal to
5202 * 4 bytes/component * 4 components/input * 3 points.
5204 * Other stages don't know the size at compile time or don't
5205 * allocate LDS per wave, but instead they do it per thread group.
5207 lds_per_wave
= conf
->lds_size
* lds_increment
+
5208 align(num_inputs
* 48, lds_increment
);
5210 case PIPE_SHADER_COMPUTE
:
5211 if (shader
->selector
) {
5212 unsigned max_workgroup_size
=
5213 si_get_max_workgroup_size(shader
);
5214 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5215 DIV_ROUND_UP(max_workgroup_size
, 64);
5220 /* Compute the per-SIMD wave counts. */
5221 if (conf
->num_sgprs
) {
5222 if (sscreen
->info
.chip_class
>= VI
)
5223 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5225 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5228 if (conf
->num_vgprs
)
5229 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5231 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5232 * 16KB makes some SIMDs unoccupied). */
5234 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5236 if (!check_debug_option
||
5237 si_can_dump_shader(sscreen
, processor
)) {
5238 if (processor
== PIPE_SHADER_FRAGMENT
) {
5239 fprintf(file
, "*** SHADER CONFIG ***\n"
5240 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5241 "SPI_PS_INPUT_ENA = 0x%04x\n",
5242 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5245 fprintf(file
, "*** SHADER STATS ***\n"
5248 "Spilled SGPRs: %d\n"
5249 "Spilled VGPRs: %d\n"
5250 "Private memory VGPRs: %d\n"
5251 "Code Size: %d bytes\n"
5253 "Scratch: %d bytes per wave\n"
5255 "********************\n\n\n",
5256 conf
->num_sgprs
, conf
->num_vgprs
,
5257 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5258 conf
->private_mem_vgprs
, code_size
,
5259 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5263 pipe_debug_message(debug
, SHADER_INFO
,
5264 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5265 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5266 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5267 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
5268 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5269 max_simd_waves
, conf
->spilled_sgprs
,
5270 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5273 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5275 switch (processor
) {
5276 case PIPE_SHADER_VERTEX
:
5277 if (shader
->key
.as_es
)
5278 return "Vertex Shader as ES";
5279 else if (shader
->key
.as_ls
)
5280 return "Vertex Shader as LS";
5282 return "Vertex Shader as VS";
5283 case PIPE_SHADER_TESS_CTRL
:
5284 return "Tessellation Control Shader";
5285 case PIPE_SHADER_TESS_EVAL
:
5286 if (shader
->key
.as_es
)
5287 return "Tessellation Evaluation Shader as ES";
5289 return "Tessellation Evaluation Shader as VS";
5290 case PIPE_SHADER_GEOMETRY
:
5291 if (shader
->is_gs_copy_shader
)
5292 return "GS Copy Shader as VS";
5294 return "Geometry Shader";
5295 case PIPE_SHADER_FRAGMENT
:
5296 return "Pixel Shader";
5297 case PIPE_SHADER_COMPUTE
:
5298 return "Compute Shader";
5300 return "Unknown Shader";
5304 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5305 struct pipe_debug_callback
*debug
, unsigned processor
,
5306 FILE *file
, bool check_debug_option
)
5308 if (!check_debug_option
||
5309 si_can_dump_shader(sscreen
, processor
))
5310 si_dump_shader_key(processor
, shader
, file
);
5312 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5313 if (shader
->previous_stage
&&
5314 shader
->previous_stage
->binary
.llvm_ir_string
) {
5315 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5316 si_get_shader_name(shader
, processor
));
5317 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5320 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5321 si_get_shader_name(shader
, processor
));
5322 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5325 if (!check_debug_option
||
5326 (si_can_dump_shader(sscreen
, processor
) &&
5327 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5328 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5331 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5332 debug
, "prolog", file
);
5333 if (shader
->previous_stage
)
5334 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5335 debug
, "previous stage", file
);
5336 if (shader
->prolog2
)
5337 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5338 debug
, "prolog2", file
);
5340 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5343 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5344 debug
, "epilog", file
);
5345 fprintf(file
, "\n");
5348 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
5349 check_debug_option
);
5352 static int si_compile_llvm(struct si_screen
*sscreen
,
5353 struct ac_shader_binary
*binary
,
5354 struct si_shader_config
*conf
,
5355 LLVMTargetMachineRef tm
,
5357 struct pipe_debug_callback
*debug
,
5362 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5364 if (si_can_dump_shader(sscreen
, processor
)) {
5365 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5367 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5368 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5369 ac_dump_module(mod
);
5370 fprintf(stderr
, "\n");
5374 if (sscreen
->record_llvm_ir
) {
5375 char *ir
= LLVMPrintModuleToString(mod
);
5376 binary
->llvm_ir_string
= strdup(ir
);
5377 LLVMDisposeMessage(ir
);
5380 if (!si_replace_shader(count
, binary
)) {
5381 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5386 si_shader_binary_read_config(binary
, conf
, 0);
5388 /* Enable 64-bit and 16-bit denormals, because there is no performance
5391 * If denormals are enabled, all floating-point output modifiers are
5394 * Don't enable denormals for 32-bit floats, because:
5395 * - Floating-point output modifiers would be ignored by the hw.
5396 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5397 * have to stop using those.
5398 * - SI & CI would be very slow.
5400 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5402 FREE(binary
->config
);
5403 FREE(binary
->global_symbol_offsets
);
5404 binary
->config
= NULL
;
5405 binary
->global_symbol_offsets
= NULL
;
5407 /* Some shaders can't have rodata because their binaries can be
5410 if (binary
->rodata_size
&&
5411 (processor
== PIPE_SHADER_VERTEX
||
5412 processor
== PIPE_SHADER_TESS_CTRL
||
5413 processor
== PIPE_SHADER_TESS_EVAL
||
5414 processor
== PIPE_SHADER_FRAGMENT
)) {
5415 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5422 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5424 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5425 LLVMBuildRetVoid(ctx
->ac
.builder
);
5427 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5430 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5432 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5433 LLVMTargetMachineRef tm
,
5434 struct si_shader_selector
*gs_selector
,
5435 struct pipe_debug_callback
*debug
)
5437 struct si_shader_context ctx
;
5438 struct si_shader
*shader
;
5439 LLVMBuilderRef builder
;
5440 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5441 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5442 struct si_shader_output_values
*outputs
;
5443 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5446 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5451 shader
= CALLOC_STRUCT(si_shader
);
5457 /* We can leave the fence as permanently signaled because the GS copy
5458 * shader only becomes visible globally after it has been compiled. */
5459 util_queue_fence_init(&shader
->ready
);
5461 shader
->selector
= gs_selector
;
5462 shader
->is_gs_copy_shader
= true;
5464 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5465 ctx
.shader
= shader
;
5466 ctx
.type
= PIPE_SHADER_VERTEX
;
5468 builder
= ctx
.ac
.builder
;
5470 create_function(&ctx
);
5471 preload_ring_buffers(&ctx
);
5473 LLVMValueRef voffset
=
5474 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5476 /* Fetch the vertex stream ID.*/
5477 LLVMValueRef stream_id
;
5479 if (gs_selector
->so
.num_outputs
)
5480 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5482 stream_id
= ctx
.i32_0
;
5484 /* Fill in output information. */
5485 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5486 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5487 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5489 for (int chan
= 0; chan
< 4; chan
++) {
5490 outputs
[i
].vertex_stream
[chan
] =
5491 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5495 LLVMBasicBlockRef end_bb
;
5496 LLVMValueRef switch_inst
;
5498 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5499 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5501 for (int stream
= 0; stream
< 4; stream
++) {
5502 LLVMBasicBlockRef bb
;
5505 if (!gsinfo
->num_stream_output_components
[stream
])
5508 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5511 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5512 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5513 LLVMPositionBuilderAtEnd(builder
, bb
);
5515 /* Fetch vertex data from GSVS ring */
5517 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5518 for (unsigned chan
= 0; chan
< 4; chan
++) {
5519 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5520 outputs
[i
].vertex_stream
[chan
] != stream
) {
5521 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5525 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5526 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5529 outputs
[i
].values
[chan
] =
5530 ac_build_buffer_load(&ctx
.ac
,
5531 ctx
.gsvs_ring
[0], 1,
5538 /* Streamout and exports. */
5539 if (gs_selector
->so
.num_outputs
) {
5540 si_llvm_emit_streamout(&ctx
, outputs
,
5541 gsinfo
->num_outputs
,
5546 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5548 LLVMBuildBr(builder
, end_bb
);
5551 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5553 LLVMBuildRetVoid(ctx
.ac
.builder
);
5555 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5556 si_llvm_optimize_module(&ctx
);
5558 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5559 &ctx
.shader
->config
, ctx
.tm
,
5561 debug
, PIPE_SHADER_GEOMETRY
,
5564 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5565 fprintf(stderr
, "GS Copy Shader:\n");
5566 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5567 PIPE_SHADER_GEOMETRY
, stderr
, true);
5568 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5571 si_llvm_dispose(&ctx
);
5582 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5583 const struct si_vs_prolog_bits
*prolog
,
5584 const char *prefix
, FILE *f
)
5586 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5587 prefix
, prolog
->instance_divisor_is_one
);
5588 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5589 prefix
, prolog
->instance_divisor_is_fetched
);
5590 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5591 prefix
, prolog
->ls_vgpr_fix
);
5593 fprintf(f
, " mono.vs.fix_fetch = {");
5594 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5595 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5599 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5602 const struct si_shader_key
*key
= &shader
->key
;
5604 fprintf(f
, "SHADER KEY\n");
5606 switch (processor
) {
5607 case PIPE_SHADER_VERTEX
:
5608 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5609 "part.vs.prolog", f
);
5610 fprintf(f
, " as_es = %u\n", key
->as_es
);
5611 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5612 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5613 key
->mono
.u
.vs_export_prim_id
);
5616 case PIPE_SHADER_TESS_CTRL
:
5617 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5618 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5619 "part.tcs.ls_prolog", f
);
5621 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5622 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5625 case PIPE_SHADER_TESS_EVAL
:
5626 fprintf(f
, " as_es = %u\n", key
->as_es
);
5627 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5628 key
->mono
.u
.vs_export_prim_id
);
5631 case PIPE_SHADER_GEOMETRY
:
5632 if (shader
->is_gs_copy_shader
)
5635 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5636 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5637 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5638 "part.gs.vs_prolog", f
);
5640 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5643 case PIPE_SHADER_COMPUTE
:
5646 case PIPE_SHADER_FRAGMENT
:
5647 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5648 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5649 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5650 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5651 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5652 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5653 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5654 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5655 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5656 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5657 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5658 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5659 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5660 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5661 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5662 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5663 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5670 if ((processor
== PIPE_SHADER_GEOMETRY
||
5671 processor
== PIPE_SHADER_TESS_EVAL
||
5672 processor
== PIPE_SHADER_VERTEX
) &&
5673 !key
->as_es
&& !key
->as_ls
) {
5674 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5675 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5679 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5680 struct si_screen
*sscreen
,
5681 LLVMTargetMachineRef tm
)
5683 struct lp_build_tgsi_context
*bld_base
;
5685 si_llvm_context_init(ctx
, sscreen
, tm
);
5687 bld_base
= &ctx
->bld_base
;
5688 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5690 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5691 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5692 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5694 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5696 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5698 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5699 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5700 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5701 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5703 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5704 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5705 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5706 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5707 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5708 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5709 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5710 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5711 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5713 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5714 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
5715 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5718 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5720 struct si_shader
*shader
= ctx
->shader
;
5721 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5723 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5724 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5725 shader
->key
.as_ls
||
5729 ac_optimize_vs_outputs(&ctx
->ac
,
5731 shader
->info
.vs_output_param_offset
,
5733 &shader
->info
.nr_param_exports
);
5736 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5738 ctx
->shader
->config
.private_mem_vgprs
= 0;
5740 /* Process all LLVM instructions. */
5741 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5743 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5746 LLVMValueRef inst
= next
;
5747 next
= LLVMGetNextInstruction(next
);
5749 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5752 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5753 /* No idea why LLVM aligns allocas to 4 elements. */
5754 unsigned alignment
= LLVMGetAlignment(inst
);
5755 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5756 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5758 bb
= LLVMGetNextBasicBlock(bb
);
5762 static void si_init_exec_full_mask(struct si_shader_context
*ctx
)
5764 LLVMValueRef full_mask
= LLVMConstInt(ctx
->i64
, ~0ull, 0);
5765 lp_build_intrinsic(ctx
->ac
.builder
,
5766 "llvm.amdgcn.init.exec", ctx
->voidt
,
5767 &full_mask
, 1, LP_FUNC_ATTR_CONVERGENT
);
5770 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5771 unsigned param
, unsigned bitoffset
)
5773 LLVMValueRef args
[] = {
5774 LLVMGetParam(ctx
->main_fn
, param
),
5775 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5777 lp_build_intrinsic(ctx
->ac
.builder
,
5778 "llvm.amdgcn.init.exec.from.input",
5779 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5782 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5783 const struct si_vs_prolog_bits
*key
)
5785 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5787 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5790 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5793 struct si_shader
*shader
= ctx
->shader
;
5794 struct si_shader_selector
*sel
= shader
->selector
;
5795 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5797 // TODO clean all this up!
5798 switch (ctx
->type
) {
5799 case PIPE_SHADER_VERTEX
:
5800 ctx
->load_input
= declare_input_vs
;
5801 if (shader
->key
.as_ls
)
5802 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5803 else if (shader
->key
.as_es
)
5804 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5806 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5807 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5809 case PIPE_SHADER_TESS_CTRL
:
5810 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5811 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5812 bld_base
->emit_store
= store_output_tcs
;
5813 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
5815 case PIPE_SHADER_TESS_EVAL
:
5816 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5817 if (shader
->key
.as_es
)
5818 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5820 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5821 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5823 case PIPE_SHADER_GEOMETRY
:
5824 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5825 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
5826 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
5827 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
5828 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
5830 case PIPE_SHADER_FRAGMENT
:
5831 ctx
->load_input
= declare_input_fs
;
5832 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
5833 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5835 case PIPE_SHADER_COMPUTE
:
5838 assert(!"Unsupported shader type");
5842 ctx
->abi
.load_ubo
= load_ubo
;
5843 ctx
->abi
.load_ssbo
= load_ssbo
;
5845 create_function(ctx
);
5846 preload_ring_buffers(ctx
);
5848 /* For GFX9 merged shaders:
5849 * - Set EXEC for the first shader. If the prolog is present, set
5850 * EXEC there instead.
5851 * - Add a barrier before the second shader.
5852 * - In the second shader, reset EXEC to ~0 and wrap the main part in
5853 * an if-statement. This is required for correctness in geometry
5854 * shaders, to ensure that empty GS waves do not send GS_EMIT and
5857 * For monolithic merged shaders, the first shader is wrapped in an
5858 * if-block together with its prolog in si_build_wrapper_function.
5860 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
5861 if (!is_monolithic
&&
5862 sel
->info
.num_instructions
> 1 && /* not empty shader */
5863 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5864 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5865 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5866 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
5867 si_init_exec_from_input(ctx
,
5868 ctx
->param_merged_wave_info
, 0);
5869 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5870 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5872 si_init_exec_full_mask(ctx
);
5874 /* The barrier must execute for all shaders in a
5877 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
5879 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
5881 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
5882 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
5883 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
5887 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
5888 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
5889 for (unsigned i
= 0; i
< 6; i
++) {
5890 ctx
->invoc0_tess_factors
[i
] =
5891 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
5895 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5897 for (i
= 0; i
< 4; i
++) {
5898 ctx
->gs_next_vertex
[i
] =
5899 lp_build_alloca(&ctx
->gallivm
,
5904 if (sel
->force_correct_derivs_after_kill
) {
5905 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
5906 /* true = don't kill. */
5907 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
5908 ctx
->postponed_kill
);
5912 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
5913 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
5917 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
5918 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
5923 si_llvm_build_ret(ctx
, ctx
->return_value
);
5928 * Compute the VS prolog key, which contains all the information needed to
5929 * build the VS prolog function, and set shader->info bits where needed.
5931 * \param info Shader info of the vertex shader.
5932 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
5933 * \param prolog_key Key of the VS prolog
5934 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
5935 * \param key Output shader part key.
5937 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
5938 unsigned num_input_sgprs
,
5939 const struct si_vs_prolog_bits
*prolog_key
,
5940 struct si_shader
*shader_out
,
5941 union si_shader_part_key
*key
)
5943 memset(key
, 0, sizeof(*key
));
5944 key
->vs_prolog
.states
= *prolog_key
;
5945 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
5946 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
5947 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
5948 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
5950 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
5951 key
->vs_prolog
.as_ls
= 1;
5952 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
5953 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
5954 key
->vs_prolog
.as_es
= 1;
5955 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
5958 /* Enable loading the InstanceID VGPR. */
5959 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
5961 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
5962 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
5963 shader_out
->info
.uses_instanceid
= true;
5967 * Compute the PS prolog key, which contains all the information needed to
5968 * build the PS prolog function, and set related bits in shader->config.
5970 static void si_get_ps_prolog_key(struct si_shader
*shader
,
5971 union si_shader_part_key
*key
,
5972 bool separate_prolog
)
5974 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5976 memset(key
, 0, sizeof(*key
));
5977 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
5978 key
->ps_prolog
.colors_read
= info
->colors_read
;
5979 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
5980 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
5981 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
5982 (key
->ps_prolog
.colors_read
||
5983 key
->ps_prolog
.states
.force_persp_sample_interp
||
5984 key
->ps_prolog
.states
.force_linear_sample_interp
||
5985 key
->ps_prolog
.states
.force_persp_center_interp
||
5986 key
->ps_prolog
.states
.force_linear_center_interp
||
5987 key
->ps_prolog
.states
.bc_optimize_for_persp
||
5988 key
->ps_prolog
.states
.bc_optimize_for_linear
);
5989 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
5991 if (info
->colors_read
) {
5992 unsigned *color
= shader
->selector
->color_attr_index
;
5994 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
5995 /* BCOLORs are stored after the last input. */
5996 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
5997 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
5998 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6001 for (unsigned i
= 0; i
< 2; i
++) {
6002 unsigned interp
= info
->input_interpolate
[color
[i
]];
6003 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6005 if (!(info
->colors_read
& (0xf << i
*4)))
6008 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6010 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6011 interp
== TGSI_INTERPOLATE_COLOR
)
6012 interp
= TGSI_INTERPOLATE_CONSTANT
;
6015 case TGSI_INTERPOLATE_CONSTANT
:
6016 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6018 case TGSI_INTERPOLATE_PERSPECTIVE
:
6019 case TGSI_INTERPOLATE_COLOR
:
6020 /* Force the interpolation location for colors here. */
6021 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6022 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6023 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6024 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6027 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6028 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6029 shader
->config
.spi_ps_input_ena
|=
6030 S_0286CC_PERSP_SAMPLE_ENA(1);
6032 case TGSI_INTERPOLATE_LOC_CENTER
:
6033 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6034 shader
->config
.spi_ps_input_ena
|=
6035 S_0286CC_PERSP_CENTER_ENA(1);
6037 case TGSI_INTERPOLATE_LOC_CENTROID
:
6038 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6039 shader
->config
.spi_ps_input_ena
|=
6040 S_0286CC_PERSP_CENTROID_ENA(1);
6046 case TGSI_INTERPOLATE_LINEAR
:
6047 /* Force the interpolation location for colors here. */
6048 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6049 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6050 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6051 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6053 /* The VGPR assignment for non-monolithic shaders
6054 * works because InitialPSInputAddr is set on the
6055 * main shader and PERSP_PULL_MODEL is never used.
6058 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6059 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6060 separate_prolog
? 6 : 9;
6061 shader
->config
.spi_ps_input_ena
|=
6062 S_0286CC_LINEAR_SAMPLE_ENA(1);
6064 case TGSI_INTERPOLATE_LOC_CENTER
:
6065 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6066 separate_prolog
? 8 : 11;
6067 shader
->config
.spi_ps_input_ena
|=
6068 S_0286CC_LINEAR_CENTER_ENA(1);
6070 case TGSI_INTERPOLATE_LOC_CENTROID
:
6071 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6072 separate_prolog
? 10 : 13;
6073 shader
->config
.spi_ps_input_ena
|=
6074 S_0286CC_LINEAR_CENTROID_ENA(1);
6088 * Check whether a PS prolog is required based on the key.
6090 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6092 return key
->ps_prolog
.colors_read
||
6093 key
->ps_prolog
.states
.force_persp_sample_interp
||
6094 key
->ps_prolog
.states
.force_linear_sample_interp
||
6095 key
->ps_prolog
.states
.force_persp_center_interp
||
6096 key
->ps_prolog
.states
.force_linear_center_interp
||
6097 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6098 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6099 key
->ps_prolog
.states
.poly_stipple
||
6100 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6104 * Compute the PS epilog key, which contains all the information needed to
6105 * build the PS epilog function.
6107 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6108 union si_shader_part_key
*key
)
6110 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6111 memset(key
, 0, sizeof(*key
));
6112 key
->ps_epilog
.colors_written
= info
->colors_written
;
6113 key
->ps_epilog
.writes_z
= info
->writes_z
;
6114 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6115 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6116 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6120 * Build the GS prolog function. Rotate the input vertices for triangle strips
6123 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6124 union si_shader_part_key
*key
)
6126 unsigned num_sgprs
, num_vgprs
;
6127 struct si_function_info fninfo
;
6128 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6129 LLVMTypeRef returns
[48];
6130 LLVMValueRef func
, ret
;
6132 si_init_function_info(&fninfo
);
6134 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6135 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
6136 num_vgprs
= 5; /* ES inputs are not needed by GS */
6138 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6142 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6143 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6144 returns
[i
] = ctx
->i32
;
6147 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6148 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6149 returns
[num_sgprs
+ i
] = ctx
->f32
;
6152 /* Create the function. */
6153 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6155 func
= ctx
->main_fn
;
6157 /* Set the full EXEC mask for the prolog, because we are only fiddling
6158 * with registers here. The main shader part will set the correct EXEC
6161 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6162 si_init_exec_full_mask(ctx
);
6164 /* Copy inputs to outputs. This should be no-op, as the registers match,
6165 * but it will prevent the compiler from overwriting them unintentionally.
6167 ret
= ctx
->return_value
;
6168 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6169 LLVMValueRef p
= LLVMGetParam(func
, i
);
6170 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6172 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6173 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6174 p
= ac_to_float(&ctx
->ac
, p
);
6175 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6178 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6179 /* Remap the input vertices for every other primitive. */
6180 const unsigned gfx6_vtx_params
[6] = {
6188 const unsigned gfx9_vtx_params
[3] = {
6193 LLVMValueRef vtx_in
[6], vtx_out
[6];
6194 LLVMValueRef prim_id
, rotate
;
6196 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6197 for (unsigned i
= 0; i
< 3; i
++) {
6198 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6199 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6202 for (unsigned i
= 0; i
< 6; i
++)
6203 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6206 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6207 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6209 for (unsigned i
= 0; i
< 6; ++i
) {
6210 LLVMValueRef base
, rotated
;
6212 rotated
= vtx_in
[(i
+ 4) % 6];
6213 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6216 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6217 for (unsigned i
= 0; i
< 3; i
++) {
6218 LLVMValueRef hi
, out
;
6220 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6221 LLVMConstInt(ctx
->i32
, 16, 0), "");
6222 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6223 out
= ac_to_float(&ctx
->ac
, out
);
6224 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6225 gfx9_vtx_params
[i
], "");
6228 for (unsigned i
= 0; i
< 6; i
++) {
6231 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6232 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6233 gfx6_vtx_params
[i
], "");
6238 LLVMBuildRet(builder
, ret
);
6242 * Given a list of shader part functions, build a wrapper function that
6243 * runs them in sequence to form a monolithic shader.
6245 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6246 LLVMValueRef
*parts
,
6249 unsigned next_shader_first_part
)
6251 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6252 /* PS epilog has one arg per color component; gfx9 merged shader
6253 * prologs need to forward 32 user SGPRs.
6255 struct si_function_info fninfo
;
6256 LLVMValueRef initial
[64], out
[64];
6257 LLVMTypeRef function_type
;
6258 unsigned num_first_params
;
6259 unsigned num_out
, initial_num_out
;
6260 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6261 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6262 unsigned num_sgprs
, num_vgprs
;
6264 struct lp_build_if_state if_state
;
6266 si_init_function_info(&fninfo
);
6268 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6269 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6270 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6273 /* The parameters of the wrapper function correspond to those of the
6274 * first part in terms of SGPRs and VGPRs, but we use the types of the
6275 * main part to get the right types. This is relevant for the
6276 * dereferenceable attribute on descriptor table pointers.
6281 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6282 num_first_params
= LLVMCountParamTypes(function_type
);
6284 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6285 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6287 if (ac_is_sgpr_param(param
)) {
6288 assert(num_vgprs
== 0);
6289 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6291 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6296 while (gprs
< num_sgprs
+ num_vgprs
) {
6297 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6298 LLVMTypeRef type
= LLVMTypeOf(param
);
6299 unsigned size
= ac_get_type_size(type
) / 4;
6301 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6303 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6304 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6305 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6310 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6311 si_get_max_workgroup_size(ctx
->shader
));
6313 if (is_merged_shader(ctx
->shader
))
6314 si_init_exec_full_mask(ctx
);
6316 /* Record the arguments of the function as if they were an output of
6322 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6323 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6324 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6325 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6326 unsigned size
= ac_get_type_size(param_type
) / 4;
6329 if (param_type
!= out_type
)
6330 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6331 out
[num_out
++] = param
;
6333 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6335 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6336 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6337 param_type
= ctx
->i64
;
6340 if (param_type
!= vector_type
)
6341 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6343 for (unsigned j
= 0; j
< size
; ++j
)
6344 out
[num_out
++] = LLVMBuildExtractElement(
6345 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6348 if (i
< fninfo
.num_sgpr_params
)
6349 num_out_sgpr
= num_out
;
6352 memcpy(initial
, out
, sizeof(out
));
6353 initial_num_out
= num_out
;
6354 initial_num_out_sgpr
= num_out_sgpr
;
6356 /* Now chain the parts. */
6357 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6358 LLVMValueRef in
[48];
6360 LLVMTypeRef ret_type
;
6361 unsigned out_idx
= 0;
6362 unsigned num_params
= LLVMCountParams(parts
[part
]);
6364 /* Merged shaders are executed conditionally depending
6365 * on the number of enabled threads passed in the input SGPRs. */
6366 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6367 LLVMValueRef ena
, count
= initial
[3];
6369 count
= LLVMBuildAnd(builder
, count
,
6370 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6371 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6372 ac_get_thread_id(&ctx
->ac
), count
, "");
6373 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6376 /* Derive arguments for the next part from outputs of the
6379 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6381 LLVMTypeRef param_type
;
6383 unsigned param_size
;
6384 LLVMValueRef arg
= NULL
;
6386 param
= LLVMGetParam(parts
[part
], param_idx
);
6387 param_type
= LLVMTypeOf(param
);
6388 param_size
= ac_get_type_size(param_type
) / 4;
6389 is_sgpr
= ac_is_sgpr_param(param
);
6392 #if HAVE_LLVM < 0x0400
6393 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
6395 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
6396 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
6398 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6401 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6402 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6404 if (param_size
== 1)
6407 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6409 if (LLVMTypeOf(arg
) != param_type
) {
6410 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6411 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6412 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6414 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6418 in
[param_idx
] = arg
;
6419 out_idx
+= param_size
;
6422 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6424 if (is_merged_shader(ctx
->shader
) &&
6425 part
+ 1 == next_shader_first_part
) {
6426 lp_build_endif(&if_state
);
6428 /* The second half of the merged shader should use
6429 * the inputs from the toplevel (wrapper) function,
6430 * not the return value from the last call.
6432 * That's because the last call was executed condi-
6433 * tionally, so we can't consume it in the main
6436 memcpy(out
, initial
, sizeof(initial
));
6437 num_out
= initial_num_out
;
6438 num_out_sgpr
= initial_num_out_sgpr
;
6442 /* Extract the returned GPRs. */
6443 ret_type
= LLVMTypeOf(ret
);
6447 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6448 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6450 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6452 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6454 LLVMBuildExtractValue(builder
, ret
, i
, "");
6456 assert(num_out
< ARRAY_SIZE(out
));
6457 out
[num_out
++] = val
;
6459 if (LLVMTypeOf(val
) == ctx
->i32
) {
6460 assert(num_out_sgpr
+ 1 == num_out
);
6461 num_out_sgpr
= num_out
;
6467 LLVMBuildRetVoid(builder
);
6470 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6471 LLVMTargetMachineRef tm
,
6472 struct si_shader
*shader
,
6474 struct pipe_debug_callback
*debug
)
6476 struct si_shader_selector
*sel
= shader
->selector
;
6477 struct si_shader_context ctx
;
6480 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6481 * conversion fails. */
6482 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6483 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6485 tgsi_dump(sel
->tokens
, 0);
6487 nir_print_shader(sel
->nir
, stderr
);
6488 si_dump_streamout(&sel
->so
);
6491 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6492 si_llvm_context_set_tgsi(&ctx
, shader
);
6493 ctx
.separate_prolog
= !is_monolithic
;
6495 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6496 sizeof(shader
->info
.vs_output_param_offset
));
6498 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6500 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6501 si_llvm_dispose(&ctx
);
6505 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6506 LLVMValueRef parts
[2];
6507 bool need_prolog
= sel
->vs_needs_prolog
;
6509 parts
[1] = ctx
.main_fn
;
6512 union si_shader_part_key prolog_key
;
6513 si_get_vs_prolog_key(&sel
->info
,
6514 shader
->info
.num_input_sgprs
,
6515 &shader
->key
.part
.vs
.prolog
,
6516 shader
, &prolog_key
);
6517 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6518 parts
[0] = ctx
.main_fn
;
6521 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6522 1 + need_prolog
, need_prolog
, 0);
6523 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6524 if (sscreen
->info
.chip_class
>= GFX9
) {
6525 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6526 LLVMValueRef parts
[4];
6527 bool vs_needs_prolog
=
6528 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6531 parts
[2] = ctx
.main_fn
;
6534 union si_shader_part_key tcs_epilog_key
;
6535 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6536 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6537 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6538 parts
[3] = ctx
.main_fn
;
6541 if (vs_needs_prolog
) {
6542 union si_shader_part_key vs_prolog_key
;
6543 si_get_vs_prolog_key(&ls
->info
,
6544 shader
->info
.num_input_sgprs
,
6545 &shader
->key
.part
.tcs
.ls_prolog
,
6546 shader
, &vs_prolog_key
);
6547 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6548 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6549 parts
[0] = ctx
.main_fn
;
6552 /* VS as LS main part */
6553 struct si_shader shader_ls
= {};
6554 shader_ls
.selector
= ls
;
6555 shader_ls
.key
.as_ls
= 1;
6556 shader_ls
.key
.mono
= shader
->key
.mono
;
6557 shader_ls
.key
.opt
= shader
->key
.opt
;
6558 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6560 if (!si_compile_tgsi_main(&ctx
, true)) {
6561 si_llvm_dispose(&ctx
);
6564 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6565 parts
[1] = ctx
.main_fn
;
6567 /* Reset the shader context. */
6568 ctx
.shader
= shader
;
6569 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6571 si_build_wrapper_function(&ctx
,
6572 parts
+ !vs_needs_prolog
,
6573 4 - !vs_needs_prolog
, 0,
6574 vs_needs_prolog
? 2 : 1);
6576 LLVMValueRef parts
[2];
6577 union si_shader_part_key epilog_key
;
6579 parts
[0] = ctx
.main_fn
;
6581 memset(&epilog_key
, 0, sizeof(epilog_key
));
6582 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6583 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6584 parts
[1] = ctx
.main_fn
;
6586 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6588 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6589 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6590 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6591 LLVMValueRef es_prolog
= NULL
;
6592 LLVMValueRef es_main
= NULL
;
6593 LLVMValueRef gs_prolog
= NULL
;
6594 LLVMValueRef gs_main
= ctx
.main_fn
;
6597 union si_shader_part_key gs_prolog_key
;
6598 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6599 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6600 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6601 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6602 gs_prolog
= ctx
.main_fn
;
6605 if (es
->vs_needs_prolog
) {
6606 union si_shader_part_key vs_prolog_key
;
6607 si_get_vs_prolog_key(&es
->info
,
6608 shader
->info
.num_input_sgprs
,
6609 &shader
->key
.part
.gs
.vs_prolog
,
6610 shader
, &vs_prolog_key
);
6611 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6612 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6613 es_prolog
= ctx
.main_fn
;
6617 struct si_shader shader_es
= {};
6618 shader_es
.selector
= es
;
6619 shader_es
.key
.as_es
= 1;
6620 shader_es
.key
.mono
= shader
->key
.mono
;
6621 shader_es
.key
.opt
= shader
->key
.opt
;
6622 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6624 if (!si_compile_tgsi_main(&ctx
, true)) {
6625 si_llvm_dispose(&ctx
);
6628 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6629 es_main
= ctx
.main_fn
;
6631 /* Reset the shader context. */
6632 ctx
.shader
= shader
;
6633 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6635 /* Prepare the array of shader parts. */
6636 LLVMValueRef parts
[4];
6637 unsigned num_parts
= 0, main_part
, next_first_part
;
6640 parts
[num_parts
++] = es_prolog
;
6642 parts
[main_part
= num_parts
++] = es_main
;
6643 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6644 parts
[num_parts
++] = gs_main
;
6646 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6647 main_part
, next_first_part
);
6649 LLVMValueRef parts
[2];
6650 union si_shader_part_key prolog_key
;
6652 parts
[1] = ctx
.main_fn
;
6654 memset(&prolog_key
, 0, sizeof(prolog_key
));
6655 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6656 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6657 parts
[0] = ctx
.main_fn
;
6659 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6661 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6662 LLVMValueRef parts
[3];
6663 union si_shader_part_key prolog_key
;
6664 union si_shader_part_key epilog_key
;
6667 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6668 need_prolog
= si_need_ps_prolog(&prolog_key
);
6670 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6673 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6674 parts
[0] = ctx
.main_fn
;
6677 si_get_ps_epilog_key(shader
, &epilog_key
);
6678 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6679 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6681 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6682 need_prolog
? 1 : 0, 0);
6685 si_llvm_optimize_module(&ctx
);
6687 /* Post-optimization transformations and analysis. */
6688 si_optimize_vs_outputs(&ctx
);
6690 if ((debug
&& debug
->debug_message
) ||
6691 si_can_dump_shader(sscreen
, ctx
.type
))
6692 si_count_scratch_private_memory(&ctx
);
6694 /* Compile to bytecode. */
6695 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6696 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6697 si_llvm_dispose(&ctx
);
6699 fprintf(stderr
, "LLVM failed to compile shader\n");
6703 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6704 * LLVM 3.9svn has this bug.
6706 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6707 unsigned wave_size
= 64;
6708 unsigned max_vgprs
= 256;
6709 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6710 unsigned max_sgprs_per_wave
= 128;
6711 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6712 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6713 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6715 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6716 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6718 if (shader
->config
.num_sgprs
> max_sgprs
||
6719 shader
->config
.num_vgprs
> max_vgprs
) {
6720 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6721 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6722 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6723 max_sgprs
, max_vgprs
);
6725 /* Just terminate the process, because dependent
6726 * shaders can hang due to bad input data, but use
6727 * the env var to allow shader-db to work.
6729 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6734 /* Add the scratch offset to input SGPRs. */
6735 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6736 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6738 /* Calculate the number of fragment input VGPRs. */
6739 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6740 shader
->info
.num_input_vgprs
= 0;
6741 shader
->info
.face_vgpr_index
= -1;
6742 shader
->info
.ancillary_vgpr_index
= -1;
6744 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6745 shader
->info
.num_input_vgprs
+= 2;
6746 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6747 shader
->info
.num_input_vgprs
+= 2;
6748 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6749 shader
->info
.num_input_vgprs
+= 2;
6750 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6751 shader
->info
.num_input_vgprs
+= 3;
6752 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6753 shader
->info
.num_input_vgprs
+= 2;
6754 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6755 shader
->info
.num_input_vgprs
+= 2;
6756 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6757 shader
->info
.num_input_vgprs
+= 2;
6758 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6759 shader
->info
.num_input_vgprs
+= 1;
6760 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6761 shader
->info
.num_input_vgprs
+= 1;
6762 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6763 shader
->info
.num_input_vgprs
+= 1;
6764 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6765 shader
->info
.num_input_vgprs
+= 1;
6766 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6767 shader
->info
.num_input_vgprs
+= 1;
6768 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6769 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6770 shader
->info
.num_input_vgprs
+= 1;
6772 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6773 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6774 shader
->info
.num_input_vgprs
+= 1;
6776 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6777 shader
->info
.num_input_vgprs
+= 1;
6778 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6779 shader
->info
.num_input_vgprs
+= 1;
6786 * Create, compile and return a shader part (prolog or epilog).
6788 * \param sscreen screen
6789 * \param list list of shader parts of the same category
6790 * \param type shader type
6791 * \param key shader part key
6792 * \param prolog whether the part being requested is a prolog
6793 * \param tm LLVM target machine
6794 * \param debug debug callback
6795 * \param build the callback responsible for building the main function
6796 * \return non-NULL on success
6798 static struct si_shader_part
*
6799 si_get_shader_part(struct si_screen
*sscreen
,
6800 struct si_shader_part
**list
,
6801 enum pipe_shader_type type
,
6803 union si_shader_part_key
*key
,
6804 LLVMTargetMachineRef tm
,
6805 struct pipe_debug_callback
*debug
,
6806 void (*build
)(struct si_shader_context
*,
6807 union si_shader_part_key
*),
6810 struct si_shader_part
*result
;
6812 mtx_lock(&sscreen
->shader_parts_mutex
);
6814 /* Find existing. */
6815 for (result
= *list
; result
; result
= result
->next
) {
6816 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
6817 mtx_unlock(&sscreen
->shader_parts_mutex
);
6822 /* Compile a new one. */
6823 result
= CALLOC_STRUCT(si_shader_part
);
6826 struct si_shader shader
= {};
6827 struct si_shader_context ctx
;
6829 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6830 ctx
.shader
= &shader
;
6834 case PIPE_SHADER_VERTEX
:
6835 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
6836 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
6838 case PIPE_SHADER_TESS_CTRL
:
6840 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
6842 case PIPE_SHADER_GEOMETRY
:
6845 case PIPE_SHADER_FRAGMENT
:
6847 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
6849 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
6852 unreachable("bad shader part");
6858 si_llvm_optimize_module(&ctx
);
6860 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
6861 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
6867 result
->next
= *list
;
6871 si_llvm_dispose(&ctx
);
6872 mtx_unlock(&sscreen
->shader_parts_mutex
);
6876 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
6878 LLVMValueRef ptr
[2], list
;
6879 bool is_merged_shader
=
6880 ctx
->screen
->info
.chip_class
>= GFX9
&&
6881 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6882 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6883 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
6885 /* Get the pointer to rw buffers. */
6886 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
6887 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS_HI
);
6888 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
6889 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
6890 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
6891 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
), "");
6896 * Build the vertex shader prolog function.
6898 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
6899 * All inputs are returned unmodified. The vertex load indices are
6900 * stored after them, which will be used by the API VS for fetching inputs.
6902 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
6907 * (VertexID + BaseVertex),
6908 * (InstanceID + StartInstance),
6909 * (InstanceID / 2 + StartInstance)
6911 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
6912 union si_shader_part_key
*key
)
6914 struct si_function_info fninfo
;
6915 LLVMTypeRef
*returns
;
6916 LLVMValueRef ret
, func
;
6918 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
6919 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
6920 LLVMValueRef input_vgprs
[9];
6921 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
6923 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
6925 si_init_function_info(&fninfo
);
6927 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
6928 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
6929 sizeof(LLVMTypeRef
));
6932 /* Declare input and output SGPRs. */
6933 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6934 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6935 returns
[num_returns
++] = ctx
->i32
;
6938 /* Preloaded VGPRs (outputs must be floats) */
6939 for (i
= 0; i
< num_input_vgprs
; i
++) {
6940 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
6941 returns
[num_returns
++] = ctx
->f32
;
6944 /* Vertex load indices. */
6945 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
6946 returns
[num_returns
++] = ctx
->f32
;
6948 /* Create the function. */
6949 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
6950 func
= ctx
->main_fn
;
6952 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
6953 if (!key
->vs_prolog
.is_monolithic
)
6954 si_init_exec_from_input(ctx
, 3, 0);
6956 if (key
->vs_prolog
.as_ls
&&
6957 ctx
->screen
->has_ls_vgpr_init_bug
) {
6958 /* If there are no HS threads, SPI loads the LS VGPRs
6959 * starting at VGPR 0. Shift them back to where they
6962 LLVMValueRef has_hs_threads
=
6963 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
6964 unpack_param(ctx
, 3, 8, 8),
6967 for (i
= 4; i
> 0; --i
) {
6968 input_vgprs
[i
+ 1] =
6969 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
6971 input_vgprs
[i
- 1], "");
6976 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
6977 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
6979 /* Copy inputs to outputs. This should be no-op, as the registers match,
6980 * but it will prevent the compiler from overwriting them unintentionally.
6982 ret
= ctx
->return_value
;
6983 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6984 LLVMValueRef p
= LLVMGetParam(func
, i
);
6985 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
6987 for (i
= 0; i
< num_input_vgprs
; i
++) {
6988 LLVMValueRef p
= input_vgprs
[i
];
6989 p
= ac_to_float(&ctx
->ac
, p
);
6990 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
6991 key
->vs_prolog
.num_input_sgprs
+ i
, "");
6994 /* Compute vertex load indices from instance divisors. */
6995 LLVMValueRef instance_divisor_constbuf
= NULL
;
6997 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
6998 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
6999 LLVMValueRef buf_index
=
7000 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7001 instance_divisor_constbuf
=
7002 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7005 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7006 bool divisor_is_one
=
7007 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7008 bool divisor_is_fetched
=
7009 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7012 if (divisor_is_one
|| divisor_is_fetched
) {
7013 LLVMValueRef divisor
= ctx
->i32_1
;
7015 if (divisor_is_fetched
) {
7016 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7017 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7018 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7021 /* InstanceID / Divisor + StartInstance */
7022 index
= get_instance_index_for_fetch(ctx
,
7024 SI_SGPR_START_INSTANCE
,
7027 /* VertexID + BaseVertex */
7028 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7030 LLVMGetParam(func
, user_sgpr_base
+
7031 SI_SGPR_BASE_VERTEX
), "");
7034 index
= ac_to_float(&ctx
->ac
, index
);
7035 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7036 fninfo
.num_params
+ i
, "");
7039 si_llvm_build_ret(ctx
, ret
);
7042 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7043 LLVMTargetMachineRef tm
,
7044 struct si_shader
*shader
,
7045 struct pipe_debug_callback
*debug
,
7046 struct si_shader
*main_part
,
7047 const struct si_vs_prolog_bits
*key
)
7049 struct si_shader_selector
*vs
= main_part
->selector
;
7051 if (!si_vs_needs_prolog(vs
, key
))
7054 /* Get the prolog. */
7055 union si_shader_part_key prolog_key
;
7056 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7057 key
, shader
, &prolog_key
);
7060 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7061 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7062 debug
, si_build_vs_prolog_function
,
7063 "Vertex Shader Prolog");
7064 return shader
->prolog
!= NULL
;
7068 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7070 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7071 LLVMTargetMachineRef tm
,
7072 struct si_shader
*shader
,
7073 struct pipe_debug_callback
*debug
)
7075 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7076 &shader
->key
.part
.vs
.prolog
);
7080 * Compile the TCS epilog function. This writes tesselation factors to memory
7081 * based on the output primitive type of the tesselator (determined by TES).
7083 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7084 union si_shader_part_key
*key
)
7086 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7087 struct si_function_info fninfo
;
7090 si_init_function_info(&fninfo
);
7092 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7093 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7094 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7095 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7096 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7097 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7098 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7099 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7100 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7101 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7102 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7103 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7104 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7105 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7106 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7107 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7108 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7109 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7110 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7111 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7112 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7113 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7115 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7116 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7117 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7118 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7119 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7120 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7121 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7122 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7123 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7124 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7125 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7126 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7129 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7130 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7131 unsigned tess_factors_idx
=
7132 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7133 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7134 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7136 for (unsigned i
= 0; i
< 6; i
++)
7137 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7139 /* Create the function. */
7140 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7141 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7142 ac_declare_lds_as_pointer(&ctx
->ac
);
7143 func
= ctx
->main_fn
;
7145 LLVMValueRef invoc0_tess_factors
[6];
7146 for (unsigned i
= 0; i
< 6; i
++)
7147 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7149 si_write_tess_factors(bld_base
,
7150 LLVMGetParam(func
, tess_factors_idx
),
7151 LLVMGetParam(func
, tess_factors_idx
+ 1),
7152 LLVMGetParam(func
, tess_factors_idx
+ 2),
7153 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7155 LLVMBuildRetVoid(ctx
->ac
.builder
);
7159 * Select and compile (or reuse) TCS parts (epilog).
7161 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7162 LLVMTargetMachineRef tm
,
7163 struct si_shader
*shader
,
7164 struct pipe_debug_callback
*debug
)
7166 if (sscreen
->info
.chip_class
>= GFX9
) {
7167 struct si_shader
*ls_main_part
=
7168 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7170 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7171 &shader
->key
.part
.tcs
.ls_prolog
))
7174 shader
->previous_stage
= ls_main_part
;
7177 /* Get the epilog. */
7178 union si_shader_part_key epilog_key
;
7179 memset(&epilog_key
, 0, sizeof(epilog_key
));
7180 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7182 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7183 PIPE_SHADER_TESS_CTRL
, false,
7184 &epilog_key
, tm
, debug
,
7185 si_build_tcs_epilog_function
,
7186 "Tessellation Control Shader Epilog");
7187 return shader
->epilog
!= NULL
;
7191 * Select and compile (or reuse) GS parts (prolog).
7193 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7194 LLVMTargetMachineRef tm
,
7195 struct si_shader
*shader
,
7196 struct pipe_debug_callback
*debug
)
7198 if (sscreen
->info
.chip_class
>= GFX9
) {
7199 struct si_shader
*es_main_part
=
7200 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7202 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7203 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7204 &shader
->key
.part
.gs
.vs_prolog
))
7207 shader
->previous_stage
= es_main_part
;
7210 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7213 union si_shader_part_key prolog_key
;
7214 memset(&prolog_key
, 0, sizeof(prolog_key
));
7215 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7217 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7218 PIPE_SHADER_GEOMETRY
, true,
7219 &prolog_key
, tm
, debug
,
7220 si_build_gs_prolog_function
,
7221 "Geometry Shader Prolog");
7222 return shader
->prolog2
!= NULL
;
7226 * Build the pixel shader prolog function. This handles:
7227 * - two-side color selection and interpolation
7228 * - overriding interpolation parameters for the API PS
7229 * - polygon stippling
7231 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7232 * overriden by other states. (e.g. per-sample interpolation)
7233 * Interpolated colors are stored after the preloaded VGPRs.
7235 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7236 union si_shader_part_key
*key
)
7238 struct si_function_info fninfo
;
7239 LLVMValueRef ret
, func
;
7240 int num_returns
, i
, num_color_channels
;
7242 assert(si_need_ps_prolog(key
));
7244 si_init_function_info(&fninfo
);
7246 /* Declare inputs. */
7247 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7248 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7250 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7251 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7253 /* Declare outputs (same as inputs + add colors if needed) */
7254 num_returns
= fninfo
.num_params
;
7255 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7256 for (i
= 0; i
< num_color_channels
; i
++)
7257 fninfo
.types
[num_returns
++] = ctx
->f32
;
7259 /* Create the function. */
7260 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7262 func
= ctx
->main_fn
;
7264 /* Copy inputs to outputs. This should be no-op, as the registers match,
7265 * but it will prevent the compiler from overwriting them unintentionally.
7267 ret
= ctx
->return_value
;
7268 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7269 LLVMValueRef p
= LLVMGetParam(func
, i
);
7270 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7273 /* Polygon stippling. */
7274 if (key
->ps_prolog
.states
.poly_stipple
) {
7275 /* POS_FIXED_PT is always last. */
7276 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7277 key
->ps_prolog
.num_input_vgprs
- 1;
7278 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7280 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7283 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7284 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7285 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7286 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7288 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7289 * The hw doesn't compute CENTROID if the whole wave only
7290 * contains fully-covered quads.
7292 * PRIM_MASK is after user SGPRs.
7294 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7295 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7296 LLVMConstInt(ctx
->i32
, 31, 0), "");
7297 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7300 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7301 /* Read PERSP_CENTER. */
7302 for (i
= 0; i
< 2; i
++)
7303 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7304 /* Read PERSP_CENTROID. */
7305 for (i
= 0; i
< 2; i
++)
7306 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7307 /* Select PERSP_CENTROID. */
7308 for (i
= 0; i
< 2; i
++) {
7309 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7310 center
[i
], centroid
[i
], "");
7311 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7312 tmp
, base
+ 4 + i
, "");
7315 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7316 /* Read LINEAR_CENTER. */
7317 for (i
= 0; i
< 2; i
++)
7318 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7319 /* Read LINEAR_CENTROID. */
7320 for (i
= 0; i
< 2; i
++)
7321 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7322 /* Select LINEAR_CENTROID. */
7323 for (i
= 0; i
< 2; i
++) {
7324 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7325 center
[i
], centroid
[i
], "");
7326 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7327 tmp
, base
+ 10 + i
, "");
7332 /* Force per-sample interpolation. */
7333 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7334 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7335 LLVMValueRef persp_sample
[2];
7337 /* Read PERSP_SAMPLE. */
7338 for (i
= 0; i
< 2; i
++)
7339 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7340 /* Overwrite PERSP_CENTER. */
7341 for (i
= 0; i
< 2; i
++)
7342 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7343 persp_sample
[i
], base
+ 2 + i
, "");
7344 /* Overwrite PERSP_CENTROID. */
7345 for (i
= 0; i
< 2; i
++)
7346 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7347 persp_sample
[i
], base
+ 4 + i
, "");
7349 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7350 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7351 LLVMValueRef linear_sample
[2];
7353 /* Read LINEAR_SAMPLE. */
7354 for (i
= 0; i
< 2; i
++)
7355 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7356 /* Overwrite LINEAR_CENTER. */
7357 for (i
= 0; i
< 2; i
++)
7358 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7359 linear_sample
[i
], base
+ 8 + i
, "");
7360 /* Overwrite LINEAR_CENTROID. */
7361 for (i
= 0; i
< 2; i
++)
7362 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7363 linear_sample
[i
], base
+ 10 + i
, "");
7366 /* Force center interpolation. */
7367 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7368 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7369 LLVMValueRef persp_center
[2];
7371 /* Read PERSP_CENTER. */
7372 for (i
= 0; i
< 2; i
++)
7373 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7374 /* Overwrite PERSP_SAMPLE. */
7375 for (i
= 0; i
< 2; i
++)
7376 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7377 persp_center
[i
], base
+ i
, "");
7378 /* Overwrite PERSP_CENTROID. */
7379 for (i
= 0; i
< 2; i
++)
7380 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7381 persp_center
[i
], base
+ 4 + i
, "");
7383 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7384 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7385 LLVMValueRef linear_center
[2];
7387 /* Read LINEAR_CENTER. */
7388 for (i
= 0; i
< 2; i
++)
7389 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7390 /* Overwrite LINEAR_SAMPLE. */
7391 for (i
= 0; i
< 2; i
++)
7392 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7393 linear_center
[i
], base
+ 6 + i
, "");
7394 /* Overwrite LINEAR_CENTROID. */
7395 for (i
= 0; i
< 2; i
++)
7396 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7397 linear_center
[i
], base
+ 10 + i
, "");
7400 /* Interpolate colors. */
7401 unsigned color_out_idx
= 0;
7402 for (i
= 0; i
< 2; i
++) {
7403 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7404 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7405 key
->ps_prolog
.face_vgpr_index
;
7406 LLVMValueRef interp
[2], color
[4];
7407 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7412 /* If the interpolation qualifier is not CONSTANT (-1). */
7413 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7414 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7415 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7417 /* Get the (i,j) updated by bc_optimize handling. */
7418 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7420 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7421 interp_vgpr
+ 1, "");
7422 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7425 /* Use the absolute location of the input. */
7426 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7428 if (key
->ps_prolog
.states
.color_two_side
) {
7429 face
= LLVMGetParam(func
, face_vgpr
);
7430 face
= ac_to_integer(&ctx
->ac
, face
);
7433 interp_fs_input(ctx
,
7434 key
->ps_prolog
.color_attr_index
[i
],
7435 TGSI_SEMANTIC_COLOR
, i
,
7436 key
->ps_prolog
.num_interp_inputs
,
7437 key
->ps_prolog
.colors_read
, interp_ij
,
7438 prim_mask
, face
, color
);
7441 unsigned chan
= u_bit_scan(&writemask
);
7442 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7443 fninfo
.num_params
+ color_out_idx
++, "");
7447 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7450 * "When per-sample shading is active due to the use of a fragment
7451 * input qualified by sample or due to the use of the gl_SampleID
7452 * or gl_SamplePosition variables, only the bit for the current
7453 * sample is set in gl_SampleMaskIn. When state specifies multiple
7454 * fragment shader invocations for a given fragment, the sample
7455 * mask for any single fragment shader invocation may specify a
7456 * subset of the covered samples for the fragment. In this case,
7457 * the bit corresponding to each covered sample will be set in
7458 * exactly one fragment shader invocation."
7460 * The samplemask loaded by hardware is always the coverage of the
7461 * entire pixel/fragment, so mask bits out based on the sample ID.
7463 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7464 /* The bit pattern matches that used by fixed function fragment
7466 static const uint16_t ps_iter_masks
[] = {
7467 0xffff, /* not used */
7473 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7475 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7476 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7477 key
->ps_prolog
.ancillary_vgpr_index
;
7478 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7479 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7481 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7482 samplemask
= LLVMBuildAnd(
7485 LLVMBuildShl(ctx
->ac
.builder
,
7486 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7489 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7491 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7492 ancillary_vgpr
+ 1, "");
7495 /* Tell LLVM to insert WQM instruction sequence when needed. */
7496 if (key
->ps_prolog
.wqm
) {
7497 LLVMAddTargetDependentFunctionAttr(func
,
7498 "amdgpu-ps-wqm-outputs", "");
7501 si_llvm_build_ret(ctx
, ret
);
7505 * Build the pixel shader epilog function. This handles everything that must be
7506 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7508 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7509 union si_shader_part_key
*key
)
7511 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7512 struct si_function_info fninfo
;
7513 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7515 struct si_ps_exports exp
= {};
7517 si_init_function_info(&fninfo
);
7519 /* Declare input SGPRs. */
7520 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7521 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7522 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7523 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7524 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7526 /* Declare input VGPRs. */
7527 unsigned required_num_params
=
7528 fninfo
.num_sgpr_params
+
7529 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7530 key
->ps_epilog
.writes_z
+
7531 key
->ps_epilog
.writes_stencil
+
7532 key
->ps_epilog
.writes_samplemask
;
7534 required_num_params
= MAX2(required_num_params
,
7535 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7537 while (fninfo
.num_params
< required_num_params
)
7538 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7540 /* Create the function. */
7541 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7542 /* Disable elimination of unused inputs. */
7543 si_llvm_add_attribute(ctx
->main_fn
,
7544 "InitialPSInputAddr", 0xffffff);
7546 /* Process colors. */
7547 unsigned vgpr
= fninfo
.num_sgpr_params
;
7548 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7549 int last_color_export
= -1;
7551 /* Find the last color export. */
7552 if (!key
->ps_epilog
.writes_z
&&
7553 !key
->ps_epilog
.writes_stencil
&&
7554 !key
->ps_epilog
.writes_samplemask
) {
7555 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7557 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7558 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7559 /* Just set this if any of the colorbuffers are enabled. */
7561 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7562 last_color_export
= 0;
7564 for (i
= 0; i
< 8; i
++)
7565 if (colors_written
& (1 << i
) &&
7566 (spi_format
>> (i
* 4)) & 0xf)
7567 last_color_export
= i
;
7571 while (colors_written
) {
7572 LLVMValueRef color
[4];
7573 int mrt
= u_bit_scan(&colors_written
);
7575 for (i
= 0; i
< 4; i
++)
7576 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7578 si_export_mrt_color(bld_base
, color
, mrt
,
7579 fninfo
.num_params
- 1,
7580 mrt
== last_color_export
, &exp
);
7583 /* Process depth, stencil, samplemask. */
7584 if (key
->ps_epilog
.writes_z
)
7585 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7586 if (key
->ps_epilog
.writes_stencil
)
7587 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7588 if (key
->ps_epilog
.writes_samplemask
)
7589 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7591 if (depth
|| stencil
|| samplemask
)
7592 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7593 else if (last_color_export
== -1)
7594 si_export_null(bld_base
);
7597 si_emit_ps_exports(ctx
, &exp
);
7600 LLVMBuildRetVoid(ctx
->ac
.builder
);
7604 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7606 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7607 LLVMTargetMachineRef tm
,
7608 struct si_shader
*shader
,
7609 struct pipe_debug_callback
*debug
)
7611 union si_shader_part_key prolog_key
;
7612 union si_shader_part_key epilog_key
;
7614 /* Get the prolog. */
7615 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7617 /* The prolog is a no-op if these aren't set. */
7618 if (si_need_ps_prolog(&prolog_key
)) {
7620 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7621 PIPE_SHADER_FRAGMENT
, true,
7622 &prolog_key
, tm
, debug
,
7623 si_build_ps_prolog_function
,
7624 "Fragment Shader Prolog");
7625 if (!shader
->prolog
)
7629 /* Get the epilog. */
7630 si_get_ps_epilog_key(shader
, &epilog_key
);
7633 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7634 PIPE_SHADER_FRAGMENT
, false,
7635 &epilog_key
, tm
, debug
,
7636 si_build_ps_epilog_function
,
7637 "Fragment Shader Epilog");
7638 if (!shader
->epilog
)
7641 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7642 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7643 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7644 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7647 /* Set up the enable bits for per-sample shading if needed. */
7648 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7649 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7650 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7651 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7652 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7653 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7655 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7656 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7657 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7658 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7659 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7660 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7662 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7663 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7664 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7665 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7666 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7667 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7669 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7670 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7671 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7672 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7673 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7674 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7677 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7678 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7679 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7680 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7681 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7684 /* At least one pair of interpolation weights must be enabled. */
7685 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7686 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7687 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7690 /* Samplemask fixup requires the sample ID. */
7691 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7692 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7693 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7696 /* The sample mask input is always enabled, because the API shader always
7697 * passes it through to the epilog. Disable it here if it's unused.
7699 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7700 !shader
->selector
->info
.reads_samplemask
)
7701 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7706 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7709 /* SPI barrier management bug:
7710 * Make sure we have at least 4k of LDS in use to avoid the bug.
7711 * It applies to workgroup sizes of more than one wavefront.
7713 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7714 sscreen
->info
.family
== CHIP_KABINI
||
7715 sscreen
->info
.family
== CHIP_MULLINS
)
7716 *lds_size
= MAX2(*lds_size
, 8);
7719 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7720 struct si_shader
*shader
)
7722 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7724 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7726 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7727 si_get_max_workgroup_size(shader
) > 64) {
7728 si_multiwave_lds_size_workaround(sscreen
,
7729 &shader
->config
.lds_size
);
7733 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7734 struct si_shader
*shader
,
7735 struct pipe_debug_callback
*debug
)
7737 struct si_shader_selector
*sel
= shader
->selector
;
7738 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7741 /* LS, ES, VS are compiled on demand if the main part hasn't been
7742 * compiled for that stage.
7744 * Vertex shaders are compiled on demand when a vertex fetch
7745 * workaround must be applied.
7747 if (shader
->is_monolithic
) {
7748 /* Monolithic shader (compiled as a whole, has many variants,
7749 * may take a long time to compile).
7751 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7755 /* The shader consists of several parts:
7757 * - the middle part is the user shader, it has 1 variant only
7758 * and it was compiled during the creation of the shader
7760 * - the prolog part is inserted at the beginning
7761 * - the epilog part is inserted at the end
7763 * The prolog and epilog have many (but simple) variants.
7765 * Starting with gfx9, geometry and tessellation control
7766 * shaders also contain the prolog and user shader parts of
7767 * the previous shader stage.
7773 /* Copy the compiled TGSI shader data over. */
7774 shader
->is_binary_shared
= true;
7775 shader
->binary
= mainp
->binary
;
7776 shader
->config
= mainp
->config
;
7777 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7778 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7779 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7780 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7781 memcpy(shader
->info
.vs_output_param_offset
,
7782 mainp
->info
.vs_output_param_offset
,
7783 sizeof(mainp
->info
.vs_output_param_offset
));
7784 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7785 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7786 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7788 /* Select prologs and/or epilogs. */
7789 switch (sel
->type
) {
7790 case PIPE_SHADER_VERTEX
:
7791 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
7794 case PIPE_SHADER_TESS_CTRL
:
7795 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
7798 case PIPE_SHADER_TESS_EVAL
:
7800 case PIPE_SHADER_GEOMETRY
:
7801 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
7804 case PIPE_SHADER_FRAGMENT
:
7805 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
7808 /* Make sure we have at least as many VGPRs as there
7809 * are allocated inputs.
7811 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7812 shader
->info
.num_input_vgprs
);
7816 /* Update SGPR and VGPR counts. */
7817 if (shader
->prolog
) {
7818 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7819 shader
->prolog
->config
.num_sgprs
);
7820 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7821 shader
->prolog
->config
.num_vgprs
);
7823 if (shader
->previous_stage
) {
7824 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7825 shader
->previous_stage
->config
.num_sgprs
);
7826 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7827 shader
->previous_stage
->config
.num_vgprs
);
7828 shader
->config
.spilled_sgprs
=
7829 MAX2(shader
->config
.spilled_sgprs
,
7830 shader
->previous_stage
->config
.spilled_sgprs
);
7831 shader
->config
.spilled_vgprs
=
7832 MAX2(shader
->config
.spilled_vgprs
,
7833 shader
->previous_stage
->config
.spilled_vgprs
);
7834 shader
->config
.private_mem_vgprs
=
7835 MAX2(shader
->config
.private_mem_vgprs
,
7836 shader
->previous_stage
->config
.private_mem_vgprs
);
7837 shader
->config
.scratch_bytes_per_wave
=
7838 MAX2(shader
->config
.scratch_bytes_per_wave
,
7839 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
7840 shader
->info
.uses_instanceid
|=
7841 shader
->previous_stage
->info
.uses_instanceid
;
7843 if (shader
->prolog2
) {
7844 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7845 shader
->prolog2
->config
.num_sgprs
);
7846 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7847 shader
->prolog2
->config
.num_vgprs
);
7849 if (shader
->epilog
) {
7850 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7851 shader
->epilog
->config
.num_sgprs
);
7852 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7853 shader
->epilog
->config
.num_vgprs
);
7857 si_fix_resource_usage(sscreen
, shader
);
7858 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
7862 r
= si_shader_binary_upload(sscreen
, shader
);
7864 fprintf(stderr
, "LLVM failed to upload shader\n");
7871 void si_shader_destroy(struct si_shader
*shader
)
7873 if (shader
->scratch_bo
)
7874 r600_resource_reference(&shader
->scratch_bo
, NULL
);
7876 r600_resource_reference(&shader
->bo
, NULL
);
7878 if (!shader
->is_binary_shared
)
7879 ac_shader_binary_clean(&shader
->binary
);
7881 free(shader
->shader_log
);