2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "radeon/radeon_elf_util.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_build.h"
40 #include "tgsi/tgsi_util.h"
41 #include "tgsi/tgsi_dump.h"
43 #include "ac_llvm_util.h"
44 #include "si_shader_internal.h"
49 static const char *scratch_rsrc_dword0_symbol
=
50 "SCRATCH_RSRC_DWORD0";
52 static const char *scratch_rsrc_dword1_symbol
=
53 "SCRATCH_RSRC_DWORD1";
55 struct si_shader_output_values
57 LLVMValueRef values
[4];
62 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
63 struct si_screen
*sscreen
,
64 struct si_shader
*shader
,
65 LLVMTargetMachineRef tm
);
67 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
68 struct lp_build_tgsi_context
*bld_base
,
69 struct lp_build_emit_data
*emit_data
);
71 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
74 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
75 union si_shader_part_key
*key
);
76 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
77 union si_shader_part_key
*key
);
78 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
79 union si_shader_part_key
*key
);
80 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
81 union si_shader_part_key
*key
);
82 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
83 union si_shader_part_key
*key
);
85 /* Ideally pass the sample mask input to the PS epilog as v13, which
86 * is its usual location, so that the shader doesn't have to add v_mov.
88 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
90 /* The VS location of the PrimitiveID input is the same in the epilog,
91 * so that the main shader part doesn't have to move it.
93 #define VS_EPILOG_PRIMID_LOC 2
101 #define SENDMSG_GS_DONE 3
103 #define SENDMSG_GS_OP_NOP (0 << 4)
104 #define SENDMSG_GS_OP_CUT (1 << 4)
105 #define SENDMSG_GS_OP_EMIT (2 << 4)
106 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
109 * Returns a unique index for a semantic name and index. The index must be
110 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
113 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_POSITION
:
118 case TGSI_SEMANTIC_PSIZE
:
120 case TGSI_SEMANTIC_CLIPDIST
:
123 case TGSI_SEMANTIC_GENERIC
:
127 assert(!"invalid generic index");
130 /* patch indices are completely separate and thus start from 0 */
131 case TGSI_SEMANTIC_TESSOUTER
:
133 case TGSI_SEMANTIC_TESSINNER
:
135 case TGSI_SEMANTIC_PATCH
:
139 assert(!"invalid semantic name");
144 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
147 case TGSI_SEMANTIC_FOG
:
149 case TGSI_SEMANTIC_LAYER
:
151 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
153 case TGSI_SEMANTIC_PRIMID
:
155 case TGSI_SEMANTIC_COLOR
: /* these alias */
156 case TGSI_SEMANTIC_BCOLOR
:
158 case TGSI_SEMANTIC_TEXCOORD
:
161 assert(!"invalid semantic name");
167 * Get the value of a shader input parameter and extract a bitfield.
169 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
170 unsigned param
, unsigned rshift
,
173 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
174 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
177 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
178 value
= bitcast(&ctx
->soa
.bld_base
,
179 TGSI_TYPE_UNSIGNED
, value
);
182 value
= LLVMBuildLShr(gallivm
->builder
, value
,
183 lp_build_const_int32(gallivm
, rshift
), "");
185 if (rshift
+ bitwidth
< 32) {
186 unsigned mask
= (1 << bitwidth
) - 1;
187 value
= LLVMBuildAnd(gallivm
->builder
, value
,
188 lp_build_const_int32(gallivm
, mask
), "");
194 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
197 case PIPE_SHADER_TESS_CTRL
:
198 return unpack_param(ctx
, SI_PARAM_REL_IDS
, 0, 8);
200 case PIPE_SHADER_TESS_EVAL
:
201 return LLVMGetParam(ctx
->main_fn
,
202 ctx
->param_tes_rel_patch_id
);
210 /* Tessellation shaders pass outputs to the next shader using LDS.
212 * LS outputs = TCS inputs
213 * TCS outputs = TES inputs
216 * - TCS inputs for patch 0
217 * - TCS inputs for patch 1
218 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
220 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
221 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
222 * - TCS outputs for patch 1
223 * - Per-patch TCS outputs for patch 1
224 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
225 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
228 * All three shaders VS(LS), TCS, TES share the same LDS space.
232 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
234 if (ctx
->type
== PIPE_SHADER_VERTEX
)
235 return unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 0, 13);
236 else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
237 return unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 0, 13);
245 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
247 return unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 0, 13);
251 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
253 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
255 SI_PARAM_TCS_OUT_OFFSETS
,
261 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
263 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
265 SI_PARAM_TCS_OUT_OFFSETS
,
271 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
273 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
274 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
275 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
277 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
281 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
283 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
284 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
285 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
286 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
288 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
289 LLVMBuildMul(gallivm
->builder
, patch_stride
,
295 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
297 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
298 LLVMValueRef patch0_patch_data_offset
=
299 get_tcs_out_patch0_patch_data_offset(ctx
);
300 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
301 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
303 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
304 LLVMBuildMul(gallivm
->builder
, patch_stride
,
309 static LLVMValueRef
build_gep0(struct si_shader_context
*ctx
,
310 LLVMValueRef base_ptr
, LLVMValueRef index
)
312 LLVMValueRef indices
[2] = {
313 LLVMConstInt(ctx
->i32
, 0, 0),
316 return LLVMBuildGEP(ctx
->gallivm
.builder
, base_ptr
,
320 static void build_indexed_store(struct si_shader_context
*ctx
,
321 LLVMValueRef base_ptr
, LLVMValueRef index
,
324 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
325 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
327 LLVMBuildStore(gallivm
->builder
, value
,
328 build_gep0(ctx
, base_ptr
, index
));
332 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
333 * It's equivalent to doing a load from &base_ptr[index].
335 * \param base_ptr Where the array starts.
336 * \param index The element index into the array.
337 * \param uniform Whether the base_ptr and index can be assumed to be
338 * dynamically uniform
340 static LLVMValueRef
build_indexed_load(struct si_shader_context
*ctx
,
341 LLVMValueRef base_ptr
, LLVMValueRef index
,
344 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
345 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
346 LLVMValueRef pointer
;
348 pointer
= build_gep0(ctx
, base_ptr
, index
);
350 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
351 return LLVMBuildLoad(gallivm
->builder
, pointer
, "");
355 * Do a load from &base_ptr[index], but also add a flag that it's loading
356 * a constant from a dynamically uniform index.
358 static LLVMValueRef
build_indexed_load_const(
359 struct si_shader_context
*ctx
,
360 LLVMValueRef base_ptr
, LLVMValueRef index
)
362 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
363 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
367 static LLVMValueRef
get_instance_index_for_fetch(
368 struct si_shader_context
*radeon_bld
,
369 unsigned param_start_instance
, unsigned divisor
)
371 struct si_shader_context
*ctx
=
372 si_shader_context(&radeon_bld
->soa
.bld_base
);
373 struct gallivm_state
*gallivm
= radeon_bld
->soa
.bld_base
.base
.gallivm
;
375 LLVMValueRef result
= LLVMGetParam(radeon_bld
->main_fn
,
376 ctx
->param_instance_id
);
378 /* The division must be done before START_INSTANCE is added. */
380 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
381 lp_build_const_int32(gallivm
, divisor
), "");
383 return LLVMBuildAdd(gallivm
->builder
, result
,
384 LLVMGetParam(radeon_bld
->main_fn
, param_start_instance
), "");
387 static void declare_input_vs(
388 struct si_shader_context
*ctx
,
389 unsigned input_index
,
390 const struct tgsi_full_declaration
*decl
,
393 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
394 struct gallivm_state
*gallivm
= base
->gallivm
;
399 LLVMValueRef t_list_ptr
;
400 LLVMValueRef t_offset
;
402 LLVMValueRef attribute_offset
;
403 LLVMValueRef buffer_index
;
404 LLVMValueRef args
[3];
407 /* Load the T list */
408 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VERTEX_BUFFERS
);
410 t_offset
= lp_build_const_int32(gallivm
, input_index
);
412 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
414 /* Build the attribute offset */
415 attribute_offset
= lp_build_const_int32(gallivm
, 0);
417 buffer_index
= LLVMGetParam(ctx
->main_fn
,
418 ctx
->param_vertex_index0
+
422 args
[1] = attribute_offset
;
423 args
[2] = buffer_index
;
424 input
= lp_build_intrinsic(gallivm
->builder
,
425 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
426 LP_FUNC_ATTR_READNONE
);
428 /* Break up the vec4 into individual components */
429 for (chan
= 0; chan
< 4; chan
++) {
430 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
431 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
432 input
, llvm_chan
, "");
435 fix_fetch
= (ctx
->shader
->key
.mono
.vs
.fix_fetch
>> (2 * input_index
)) & 3;
437 /* The hardware returns an unsigned value; convert it to a
440 LLVMValueRef tmp
= out
[3];
441 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
443 /* First, recover the sign-extended signed integer value. */
444 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
445 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
447 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
449 /* For the integer-like cases, do a natural sign extension.
451 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
452 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
455 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
456 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
457 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
458 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
460 /* Convert back to the right type. */
461 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
463 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
464 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
465 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
466 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
467 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
468 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
475 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
478 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
481 return bld_base
->uint_bld
.zero
;
484 case PIPE_SHADER_VERTEX
:
485 return LLVMGetParam(ctx
->main_fn
,
486 ctx
->param_vs_prim_id
);
487 case PIPE_SHADER_TESS_CTRL
:
488 return LLVMGetParam(ctx
->main_fn
,
490 case PIPE_SHADER_TESS_EVAL
:
491 return LLVMGetParam(ctx
->main_fn
,
492 ctx
->param_tes_patch_id
);
493 case PIPE_SHADER_GEOMETRY
:
494 return LLVMGetParam(ctx
->main_fn
,
495 SI_PARAM_PRIMITIVE_ID
);
498 return bld_base
->uint_bld
.zero
;
503 * Return the value of tgsi_ind_register for indexing.
504 * This is the indirect index with the constant offset added to it.
506 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
507 const struct tgsi_ind_register
*ind
,
510 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
513 result
= ctx
->soa
.addr
[ind
->Index
][ind
->Swizzle
];
514 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
515 result
= LLVMBuildAdd(gallivm
->builder
, result
,
516 lp_build_const_int32(gallivm
, rel_index
), "");
521 * Like get_indirect_index, but restricts the return value to a (possibly
522 * undefined) value inside [0..num).
524 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
525 const struct tgsi_ind_register
*ind
,
526 int rel_index
, unsigned num
)
528 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
530 /* LLVM 3.8: If indirect resource indexing is used:
534 if (HAVE_LLVM
<= 0x0308)
535 return LLVMGetUndef(ctx
->i32
);
537 return si_llvm_bound_index(ctx
, result
, num
);
542 * Calculate a dword address given an input or output register and a stride.
544 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
545 const struct tgsi_full_dst_register
*dst
,
546 const struct tgsi_full_src_register
*src
,
547 LLVMValueRef vertex_dw_stride
,
548 LLVMValueRef base_addr
)
550 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
551 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
552 ubyte
*name
, *index
, *array_first
;
554 struct tgsi_full_dst_register reg
;
556 /* Set the register description. The address computation is the same
557 * for sources and destinations. */
559 reg
.Register
.File
= src
->Register
.File
;
560 reg
.Register
.Index
= src
->Register
.Index
;
561 reg
.Register
.Indirect
= src
->Register
.Indirect
;
562 reg
.Register
.Dimension
= src
->Register
.Dimension
;
563 reg
.Indirect
= src
->Indirect
;
564 reg
.Dimension
= src
->Dimension
;
565 reg
.DimIndirect
= src
->DimIndirect
;
569 /* If the register is 2-dimensional (e.g. an array of vertices
570 * in a primitive), calculate the base address of the vertex. */
571 if (reg
.Register
.Dimension
) {
574 if (reg
.Dimension
.Indirect
)
575 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
576 reg
.Dimension
.Index
);
578 index
= lp_build_const_int32(gallivm
, reg
.Dimension
.Index
);
580 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
581 LLVMBuildMul(gallivm
->builder
, index
,
582 vertex_dw_stride
, ""), "");
585 /* Get information about the register. */
586 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
587 name
= info
->input_semantic_name
;
588 index
= info
->input_semantic_index
;
589 array_first
= info
->input_array_first
;
590 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
591 name
= info
->output_semantic_name
;
592 index
= info
->output_semantic_index
;
593 array_first
= info
->output_array_first
;
599 if (reg
.Register
.Indirect
) {
600 /* Add the relative address of the element. */
601 LLVMValueRef ind_index
;
603 if (reg
.Indirect
.ArrayID
)
604 first
= array_first
[reg
.Indirect
.ArrayID
];
606 first
= reg
.Register
.Index
;
608 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
609 reg
.Register
.Index
- first
);
611 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
612 LLVMBuildMul(gallivm
->builder
, ind_index
,
613 lp_build_const_int32(gallivm
, 4), ""), "");
615 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
617 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
618 index
[reg
.Register
.Index
]);
621 /* Add the base address of the element. */
622 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
623 lp_build_const_int32(gallivm
, param
* 4), "");
626 /* The offchip buffer layout for TCS->TES is
628 * - attribute 0 of patch 0 vertex 0
629 * - attribute 0 of patch 0 vertex 1
630 * - attribute 0 of patch 0 vertex 2
632 * - attribute 0 of patch 1 vertex 0
633 * - attribute 0 of patch 1 vertex 1
635 * - attribute 1 of patch 0 vertex 0
636 * - attribute 1 of patch 0 vertex 1
638 * - per patch attribute 0 of patch 0
639 * - per patch attribute 0 of patch 1
642 * Note that every attribute has 4 components.
644 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
645 LLVMValueRef vertex_index
,
646 LLVMValueRef param_index
)
648 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
649 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
650 LLVMValueRef param_stride
, constant16
;
652 vertices_per_patch
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 6);
653 num_patches
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 0, 9);
654 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
657 constant16
= lp_build_const_int32(gallivm
, 16);
659 base_addr
= LLVMBuildMul(gallivm
->builder
, get_rel_patch_id(ctx
),
660 vertices_per_patch
, "");
662 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
665 param_stride
= total_vertices
;
667 base_addr
= get_rel_patch_id(ctx
);
668 param_stride
= num_patches
;
671 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
672 LLVMBuildMul(gallivm
->builder
, param_index
,
673 param_stride
, ""), "");
675 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
678 LLVMValueRef patch_data_offset
=
679 unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 16, 16);
681 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
682 patch_data_offset
, "");
687 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
688 struct si_shader_context
*ctx
,
689 const struct tgsi_full_dst_register
*dst
,
690 const struct tgsi_full_src_register
*src
)
692 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
693 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
694 ubyte
*name
, *index
, *array_first
;
695 struct tgsi_full_src_register reg
;
696 LLVMValueRef vertex_index
= NULL
;
697 LLVMValueRef param_index
= NULL
;
698 unsigned param_index_base
, param_base
;
700 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
702 if (reg
.Register
.Dimension
) {
704 if (reg
.Dimension
.Indirect
)
705 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
706 reg
.Dimension
.Index
);
708 vertex_index
= lp_build_const_int32(gallivm
,
709 reg
.Dimension
.Index
);
712 /* Get information about the register. */
713 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
714 name
= info
->input_semantic_name
;
715 index
= info
->input_semantic_index
;
716 array_first
= info
->input_array_first
;
717 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
718 name
= info
->output_semantic_name
;
719 index
= info
->output_semantic_index
;
720 array_first
= info
->output_array_first
;
726 if (reg
.Register
.Indirect
) {
727 if (reg
.Indirect
.ArrayID
)
728 param_base
= array_first
[reg
.Indirect
.ArrayID
];
730 param_base
= reg
.Register
.Index
;
732 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
733 reg
.Register
.Index
- param_base
);
736 param_base
= reg
.Register
.Index
;
737 param_index
= lp_build_const_int32(gallivm
, 0);
740 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
743 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
744 lp_build_const_int32(gallivm
, param_index_base
),
747 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
750 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
751 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
752 * or v4i32 (num_channels=3,4). */
753 static void build_tbuffer_store(struct si_shader_context
*ctx
,
756 unsigned num_channels
,
758 LLVMValueRef soffset
,
759 unsigned inst_offset
,
768 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
769 LLVMValueRef args
[] = {
772 LLVMConstInt(ctx
->i32
, num_channels
, 0),
775 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
776 LLVMConstInt(ctx
->i32
, dfmt
, 0),
777 LLVMConstInt(ctx
->i32
, nfmt
, 0),
778 LLVMConstInt(ctx
->i32
, offen
, 0),
779 LLVMConstInt(ctx
->i32
, idxen
, 0),
780 LLVMConstInt(ctx
->i32
, glc
, 0),
781 LLVMConstInt(ctx
->i32
, slc
, 0),
782 LLVMConstInt(ctx
->i32
, tfe
, 0)
785 /* The instruction offset field has 12 bits */
786 assert(offen
|| inst_offset
< (1 << 12));
788 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
789 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
790 const char *types
[] = {"i32", "v2i32", "v4i32"};
792 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
794 lp_build_intrinsic(gallivm
->builder
, name
, ctx
->voidt
,
795 args
, ARRAY_SIZE(args
), 0);
798 static void build_tbuffer_store_dwords(struct si_shader_context
*ctx
,
801 unsigned num_channels
,
803 LLVMValueRef soffset
,
804 unsigned inst_offset
)
806 static unsigned dfmt
[] = {
807 V_008F0C_BUF_DATA_FORMAT_32
,
808 V_008F0C_BUF_DATA_FORMAT_32_32
,
809 V_008F0C_BUF_DATA_FORMAT_32_32_32
,
810 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
812 assert(num_channels
>= 1 && num_channels
<= 4);
814 build_tbuffer_store(ctx
, rsrc
, vdata
, num_channels
, vaddr
, soffset
,
815 inst_offset
, dfmt
[num_channels
-1],
816 V_008F0C_BUF_NUM_FORMAT_UINT
, 1, 0, 1, 1, 0);
819 static LLVMValueRef
build_buffer_load(struct si_shader_context
*ctx
,
823 LLVMValueRef voffset
,
824 LLVMValueRef soffset
,
825 unsigned inst_offset
,
829 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
830 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
832 if (HAVE_LLVM
>= 0x309) {
833 LLVMValueRef args
[] = {
834 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v4i32
, ""),
835 vindex
? vindex
: LLVMConstInt(ctx
->i32
, 0, 0),
836 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
837 LLVMConstInt(ctx
->i1
, glc
, 0),
838 LLVMConstInt(ctx
->i1
, slc
, 0)
841 LLVMTypeRef types
[] = {ctx
->f32
, LLVMVectorType(ctx
->f32
, 2),
843 const char *type_names
[] = {"f32", "v2f32", "v4f32"};
847 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], voffset
,
852 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], soffset
,
856 snprintf(name
, sizeof(name
), "llvm.amdgcn.buffer.load.%s",
859 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
860 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
862 LLVMValueRef args
[] = {
863 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v16i8
, ""),
864 voffset
? voffset
: vindex
,
866 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
867 LLVMConstInt(ctx
->i32
, voffset
? 1 : 0, 0), // offen
868 LLVMConstInt(ctx
->i32
, vindex
? 1 : 0, 0), //idxen
869 LLVMConstInt(ctx
->i32
, glc
, 0),
870 LLVMConstInt(ctx
->i32
, slc
, 0),
871 LLVMConstInt(ctx
->i32
, 0, 0), // TFE
874 LLVMTypeRef types
[] = {ctx
->i32
, LLVMVectorType(ctx
->i32
, 2),
876 const char *type_names
[] = {"i32", "v2i32", "v4i32"};
877 const char *arg_type
= "i32";
880 if (voffset
&& vindex
) {
881 LLVMValueRef vaddr
[] = {vindex
, voffset
};
884 args
[1] = lp_build_gather_values(gallivm
, vaddr
, 2);
887 snprintf(name
, sizeof(name
), "llvm.SI.buffer.load.dword.%s.%s",
888 type_names
[func
], arg_type
);
890 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
891 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
895 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
896 enum tgsi_opcode_type type
, unsigned swizzle
,
897 LLVMValueRef buffer
, LLVMValueRef offset
,
900 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
901 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
902 LLVMValueRef value
, value2
;
903 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
904 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
907 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
910 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
913 if (!tgsi_type_is_64bit(type
)) {
914 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
917 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
918 return LLVMBuildExtractElement(gallivm
->builder
, value
,
919 lp_build_const_int32(gallivm
, swizzle
), "");
922 value
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
925 value2
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
926 swizzle
* 4 + 4, 1, 0);
928 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
934 * \param type output value type
935 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
936 * \param dw_addr address in dwords
938 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
939 enum tgsi_opcode_type type
, unsigned swizzle
,
940 LLVMValueRef dw_addr
)
942 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
943 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
947 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
949 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
950 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
952 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
956 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
957 lp_build_const_int32(gallivm
, swizzle
));
959 value
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
960 if (tgsi_type_is_64bit(type
)) {
962 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
963 lp_build_const_int32(gallivm
, 1));
964 value2
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
965 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
968 return LLVMBuildBitCast(gallivm
->builder
, value
,
969 tgsi2llvmtype(bld_base
, type
), "");
975 * \param swizzle offset (typically 0..3)
976 * \param dw_addr address in dwords
977 * \param value value to store
979 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
980 unsigned swizzle
, LLVMValueRef dw_addr
,
983 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
984 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
986 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
987 lp_build_const_int32(gallivm
, swizzle
));
989 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
990 build_indexed_store(ctx
, ctx
->lds
,
994 static LLVMValueRef
fetch_input_tcs(
995 struct lp_build_tgsi_context
*bld_base
,
996 const struct tgsi_full_src_register
*reg
,
997 enum tgsi_opcode_type type
, unsigned swizzle
)
999 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1000 LLVMValueRef dw_addr
, stride
;
1002 stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
1003 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1004 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1006 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1009 static LLVMValueRef
fetch_output_tcs(
1010 struct lp_build_tgsi_context
*bld_base
,
1011 const struct tgsi_full_src_register
*reg
,
1012 enum tgsi_opcode_type type
, unsigned swizzle
)
1014 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1015 LLVMValueRef dw_addr
, stride
;
1017 if (reg
->Register
.Dimension
) {
1018 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1019 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1020 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1022 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1023 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1026 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1029 static LLVMValueRef
fetch_input_tes(
1030 struct lp_build_tgsi_context
*bld_base
,
1031 const struct tgsi_full_src_register
*reg
,
1032 enum tgsi_opcode_type type
, unsigned swizzle
)
1034 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1035 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1036 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1038 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1039 SI_PARAM_RW_BUFFERS
);
1040 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1041 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1043 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1044 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1046 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
);
1049 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1050 const struct tgsi_full_instruction
*inst
,
1051 const struct tgsi_opcode_info
*info
,
1052 LLVMValueRef dst
[4])
1054 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1055 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1056 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
1057 unsigned chan_index
;
1058 LLVMValueRef dw_addr
, stride
;
1059 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
1060 LLVMValueRef values
[4];
1062 /* Only handle per-patch and per-vertex outputs here.
1063 * Vectors will be lowered to scalars and this function will be called again.
1065 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1066 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1067 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
1071 if (reg
->Register
.Dimension
) {
1072 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1073 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1074 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1076 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1077 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1080 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1081 SI_PARAM_RW_BUFFERS
);
1082 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1083 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1085 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1086 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1089 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1090 LLVMValueRef value
= dst
[chan_index
];
1092 if (inst
->Instruction
.Saturate
)
1093 value
= si_llvm_saturate(bld_base
, value
);
1095 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1097 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1098 values
[chan_index
] = value
;
1100 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF) {
1101 build_tbuffer_store_dwords(ctx
, buffer
, value
, 1,
1107 if (inst
->Dst
[0].Register
.WriteMask
== 0xF) {
1108 LLVMValueRef value
= lp_build_gather_values(bld_base
->base
.gallivm
,
1110 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buf_addr
,
1115 static LLVMValueRef
fetch_input_gs(
1116 struct lp_build_tgsi_context
*bld_base
,
1117 const struct tgsi_full_src_register
*reg
,
1118 enum tgsi_opcode_type type
,
1121 struct lp_build_context
*base
= &bld_base
->base
;
1122 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1123 struct si_shader
*shader
= ctx
->shader
;
1124 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
1125 struct gallivm_state
*gallivm
= base
->gallivm
;
1126 LLVMValueRef vtx_offset
;
1127 LLVMValueRef args
[9];
1128 unsigned vtx_offset_param
;
1129 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1130 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1131 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1135 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1136 return get_primitive_id(bld_base
, swizzle
);
1138 if (!reg
->Register
.Dimension
)
1141 if (swizzle
== ~0) {
1142 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1144 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1145 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1147 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
1151 /* Get the vertex offset parameter */
1152 vtx_offset_param
= reg
->Dimension
.Index
;
1153 if (vtx_offset_param
< 2) {
1154 vtx_offset_param
+= SI_PARAM_VTX0_OFFSET
;
1156 assert(vtx_offset_param
< 6);
1157 vtx_offset_param
+= SI_PARAM_VTX2_OFFSET
- 2;
1159 vtx_offset
= lp_build_mul_imm(uint
,
1160 LLVMGetParam(ctx
->main_fn
,
1164 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1165 args
[0] = ctx
->esgs_ring
;
1166 args
[1] = vtx_offset
;
1167 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
) * 256);
1168 args
[3] = uint
->zero
;
1169 args
[4] = uint
->one
; /* OFFEN */
1170 args
[5] = uint
->zero
; /* IDXEN */
1171 args
[6] = uint
->one
; /* GLC */
1172 args
[7] = uint
->zero
; /* SLC */
1173 args
[8] = uint
->zero
; /* TFE */
1175 value
= lp_build_intrinsic(gallivm
->builder
,
1176 "llvm.SI.buffer.load.dword.i32.i32",
1178 LP_FUNC_ATTR_READONLY
);
1179 if (tgsi_type_is_64bit(type
)) {
1180 LLVMValueRef value2
;
1181 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
+ 1) * 256);
1182 value2
= lp_build_intrinsic(gallivm
->builder
,
1183 "llvm.SI.buffer.load.dword.i32.i32",
1185 LP_FUNC_ATTR_READONLY
);
1186 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1189 return LLVMBuildBitCast(gallivm
->builder
,
1191 tgsi2llvmtype(bld_base
, type
), "");
1194 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1196 switch (interpolate
) {
1197 case TGSI_INTERPOLATE_CONSTANT
:
1200 case TGSI_INTERPOLATE_LINEAR
:
1201 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1202 return SI_PARAM_LINEAR_SAMPLE
;
1203 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1204 return SI_PARAM_LINEAR_CENTROID
;
1206 return SI_PARAM_LINEAR_CENTER
;
1208 case TGSI_INTERPOLATE_COLOR
:
1209 case TGSI_INTERPOLATE_PERSPECTIVE
:
1210 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1211 return SI_PARAM_PERSP_SAMPLE
;
1212 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1213 return SI_PARAM_PERSP_CENTROID
;
1215 return SI_PARAM_PERSP_CENTER
;
1218 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1224 * Interpolate a fragment shader input.
1226 * @param ctx context
1227 * @param input_index index of the input in hardware
1228 * @param semantic_name TGSI_SEMANTIC_*
1229 * @param semantic_index semantic index
1230 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1231 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1232 * @param interp_param interpolation weights (i,j)
1233 * @param prim_mask SI_PARAM_PRIM_MASK
1234 * @param face SI_PARAM_FRONT_FACE
1235 * @param result the return value (4 components)
1237 static void interp_fs_input(struct si_shader_context
*ctx
,
1238 unsigned input_index
,
1239 unsigned semantic_name
,
1240 unsigned semantic_index
,
1241 unsigned num_interp_inputs
,
1242 unsigned colors_read_mask
,
1243 LLVMValueRef interp_param
,
1244 LLVMValueRef prim_mask
,
1246 LLVMValueRef result
[4])
1248 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
1249 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
1250 struct gallivm_state
*gallivm
= base
->gallivm
;
1251 const char *intr_name
;
1252 LLVMValueRef attr_number
;
1256 attr_number
= lp_build_const_int32(gallivm
, input_index
);
1258 /* fs.constant returns the param from the middle vertex, so it's not
1259 * really useful for flat shading. It's meant to be used for custom
1260 * interpolation (but the intrinsic can't fetch from the other two
1263 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1264 * to do the right thing. The only reason we use fs.constant is that
1265 * fs.interp cannot be used on integers, because they can be equal
1268 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
1270 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1271 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1272 LLVMValueRef args
[4];
1273 LLVMValueRef is_face_positive
;
1274 LLVMValueRef back_attr_number
;
1276 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1277 * otherwise it's at offset "num_inputs".
1279 unsigned back_attr_offset
= num_interp_inputs
;
1280 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1281 back_attr_offset
+= 1;
1283 back_attr_number
= lp_build_const_int32(gallivm
, back_attr_offset
);
1285 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1286 face
, uint
->zero
, "");
1288 args
[2] = prim_mask
;
1289 args
[3] = interp_param
;
1290 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1291 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1292 LLVMValueRef front
, back
;
1294 args
[0] = llvm_chan
;
1295 args
[1] = attr_number
;
1296 front
= lp_build_intrinsic(gallivm
->builder
, intr_name
,
1297 ctx
->f32
, args
, args
[3] ? 4 : 3,
1298 LP_FUNC_ATTR_READNONE
);
1300 args
[1] = back_attr_number
;
1301 back
= lp_build_intrinsic(gallivm
->builder
, intr_name
,
1302 ctx
->f32
, args
, args
[3] ? 4 : 3,
1303 LP_FUNC_ATTR_READNONE
);
1305 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1311 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1312 LLVMValueRef args
[4];
1314 args
[0] = uint
->zero
;
1315 args
[1] = attr_number
;
1316 args
[2] = prim_mask
;
1317 args
[3] = interp_param
;
1318 result
[0] = lp_build_intrinsic(gallivm
->builder
, intr_name
,
1319 ctx
->f32
, args
, args
[3] ? 4 : 3,
1320 LP_FUNC_ATTR_READNONE
);
1322 result
[2] = lp_build_const_float(gallivm
, 0.0f
);
1323 result
[3] = lp_build_const_float(gallivm
, 1.0f
);
1325 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1326 LLVMValueRef args
[4];
1327 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1329 args
[0] = llvm_chan
;
1330 args
[1] = attr_number
;
1331 args
[2] = prim_mask
;
1332 args
[3] = interp_param
;
1333 result
[chan
] = lp_build_intrinsic(gallivm
->builder
, intr_name
,
1334 ctx
->f32
, args
, args
[3] ? 4 : 3,
1335 LP_FUNC_ATTR_READNONE
);
1340 static void declare_input_fs(
1341 struct si_shader_context
*radeon_bld
,
1342 unsigned input_index
,
1343 const struct tgsi_full_declaration
*decl
,
1344 LLVMValueRef out
[4])
1346 struct lp_build_context
*base
= &radeon_bld
->soa
.bld_base
.base
;
1347 struct si_shader_context
*ctx
=
1348 si_shader_context(&radeon_bld
->soa
.bld_base
);
1349 struct si_shader
*shader
= ctx
->shader
;
1350 LLVMValueRef main_fn
= radeon_bld
->main_fn
;
1351 LLVMValueRef interp_param
= NULL
;
1352 int interp_param_idx
;
1354 /* Get colors from input VGPRs (set by the prolog). */
1355 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1356 unsigned i
= decl
->Semantic
.Index
;
1357 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1358 unsigned mask
= colors_read
>> (i
* 4);
1359 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1360 (i
? util_bitcount(colors_read
& 0xf) : 0);
1362 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1363 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1364 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1365 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1369 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1370 decl
->Interp
.Location
);
1371 if (interp_param_idx
== -1)
1373 else if (interp_param_idx
) {
1374 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1377 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1378 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1379 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1380 interp_param
= NULL
; /* load the constant color */
1382 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1383 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1384 shader
->selector
->info
.colors_read
, interp_param
,
1385 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1386 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1390 static LLVMValueRef
get_sample_id(struct si_shader_context
*radeon_bld
)
1392 return unpack_param(si_shader_context(&radeon_bld
->soa
.bld_base
),
1393 SI_PARAM_ANCILLARY
, 8, 4);
1397 * Set range metadata on an instruction. This can only be used on load and
1398 * call instructions. If you know an instruction can only produce the values
1399 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1400 * \p lo is the minimum value inclusive.
1401 * \p hi is the maximum value exclusive.
1403 static void set_range_metadata(struct si_shader_context
*ctx
,
1404 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1406 LLVMValueRef range_md
, md_args
[2];
1407 LLVMTypeRef type
= LLVMTypeOf(value
);
1408 LLVMContextRef context
= LLVMGetTypeContext(type
);
1410 md_args
[0] = LLVMConstInt(type
, lo
, false);
1411 md_args
[1] = LLVMConstInt(type
, hi
, false);
1412 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1413 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1416 static LLVMValueRef
get_thread_id(struct si_shader_context
*ctx
)
1418 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1421 if (HAVE_LLVM
< 0x0308) {
1422 tid
= lp_build_intrinsic(gallivm
->builder
, "llvm.SI.tid",
1423 ctx
->i32
, NULL
, 0, LP_FUNC_ATTR_READNONE
);
1425 LLVMValueRef tid_args
[2];
1426 tid_args
[0] = lp_build_const_int32(gallivm
, 0xffffffff);
1427 tid_args
[1] = lp_build_const_int32(gallivm
, 0);
1428 tid_args
[1] = lp_build_intrinsic(gallivm
->builder
,
1429 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1430 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1432 tid
= lp_build_intrinsic(gallivm
->builder
,
1433 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1434 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1436 set_range_metadata(ctx
, tid
, 0, 64);
1441 * Load a dword from a constant buffer.
1443 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1444 LLVMValueRef resource
,
1445 LLVMValueRef offset
)
1447 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1448 LLVMValueRef args
[2] = {resource
, offset
};
1450 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1451 LP_FUNC_ATTR_READNONE
);
1454 static LLVMValueRef
load_sample_position(struct si_shader_context
*radeon_bld
, LLVMValueRef sample_id
)
1456 struct si_shader_context
*ctx
=
1457 si_shader_context(&radeon_bld
->soa
.bld_base
);
1458 struct lp_build_context
*uint_bld
= &radeon_bld
->soa
.bld_base
.uint_bld
;
1459 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1460 LLVMBuilderRef builder
= gallivm
->builder
;
1461 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1462 LLVMValueRef buf_index
= lp_build_const_int32(gallivm
, SI_PS_CONST_SAMPLE_POSITIONS
);
1463 LLVMValueRef resource
= build_indexed_load_const(ctx
, desc
, buf_index
);
1465 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1466 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1467 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, lp_build_const_int32(gallivm
, 4), "");
1469 LLVMValueRef pos
[4] = {
1470 buffer_load_const(ctx
, resource
, offset0
),
1471 buffer_load_const(ctx
, resource
, offset1
),
1472 lp_build_const_float(gallivm
, 0),
1473 lp_build_const_float(gallivm
, 0)
1476 return lp_build_gather_values(gallivm
, pos
, 4);
1479 static void declare_system_value(
1480 struct si_shader_context
*radeon_bld
,
1482 const struct tgsi_full_declaration
*decl
)
1484 struct si_shader_context
*ctx
=
1485 si_shader_context(&radeon_bld
->soa
.bld_base
);
1486 struct lp_build_context
*bld
= &radeon_bld
->soa
.bld_base
.base
;
1487 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1488 LLVMValueRef value
= 0;
1490 switch (decl
->Semantic
.Name
) {
1491 case TGSI_SEMANTIC_INSTANCEID
:
1492 value
= LLVMGetParam(radeon_bld
->main_fn
,
1493 ctx
->param_instance_id
);
1496 case TGSI_SEMANTIC_VERTEXID
:
1497 value
= LLVMBuildAdd(gallivm
->builder
,
1498 LLVMGetParam(radeon_bld
->main_fn
,
1499 ctx
->param_vertex_id
),
1500 LLVMGetParam(radeon_bld
->main_fn
,
1501 SI_PARAM_BASE_VERTEX
), "");
1504 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1505 value
= LLVMGetParam(radeon_bld
->main_fn
,
1506 ctx
->param_vertex_id
);
1509 case TGSI_SEMANTIC_BASEVERTEX
:
1510 value
= LLVMGetParam(radeon_bld
->main_fn
,
1511 SI_PARAM_BASE_VERTEX
);
1514 case TGSI_SEMANTIC_BASEINSTANCE
:
1515 value
= LLVMGetParam(radeon_bld
->main_fn
,
1516 SI_PARAM_START_INSTANCE
);
1519 case TGSI_SEMANTIC_DRAWID
:
1520 value
= LLVMGetParam(radeon_bld
->main_fn
,
1524 case TGSI_SEMANTIC_INVOCATIONID
:
1525 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1526 value
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
1527 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1528 value
= LLVMGetParam(radeon_bld
->main_fn
,
1529 SI_PARAM_GS_INSTANCE_ID
);
1531 assert(!"INVOCATIONID not implemented");
1534 case TGSI_SEMANTIC_POSITION
:
1536 LLVMValueRef pos
[4] = {
1537 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1538 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1539 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1540 lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
, TGSI_OPCODE_RCP
,
1541 LLVMGetParam(radeon_bld
->main_fn
,
1542 SI_PARAM_POS_W_FLOAT
)),
1544 value
= lp_build_gather_values(gallivm
, pos
, 4);
1548 case TGSI_SEMANTIC_FACE
:
1549 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_FRONT_FACE
);
1552 case TGSI_SEMANTIC_SAMPLEID
:
1553 value
= get_sample_id(radeon_bld
);
1556 case TGSI_SEMANTIC_SAMPLEPOS
: {
1557 LLVMValueRef pos
[4] = {
1558 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1559 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1560 lp_build_const_float(gallivm
, 0),
1561 lp_build_const_float(gallivm
, 0)
1563 pos
[0] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1564 TGSI_OPCODE_FRC
, pos
[0]);
1565 pos
[1] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1566 TGSI_OPCODE_FRC
, pos
[1]);
1567 value
= lp_build_gather_values(gallivm
, pos
, 4);
1571 case TGSI_SEMANTIC_SAMPLEMASK
:
1572 /* This can only occur with the OpenGL Core profile, which
1573 * doesn't support smoothing.
1575 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1578 case TGSI_SEMANTIC_TESSCOORD
:
1580 LLVMValueRef coord
[4] = {
1581 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_u
),
1582 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_v
),
1587 /* For triangles, the vector should be (u, v, 1-u-v). */
1588 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1589 PIPE_PRIM_TRIANGLES
)
1590 coord
[2] = lp_build_sub(bld
, bld
->one
,
1591 lp_build_add(bld
, coord
[0], coord
[1]));
1593 value
= lp_build_gather_values(gallivm
, coord
, 4);
1597 case TGSI_SEMANTIC_VERTICESIN
:
1598 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1599 value
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 26, 6);
1600 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1601 value
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 7);
1603 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1606 case TGSI_SEMANTIC_TESSINNER
:
1607 case TGSI_SEMANTIC_TESSOUTER
:
1609 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1610 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1612 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1613 SI_PARAM_RW_BUFFERS
);
1614 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1615 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1617 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1618 addr
= get_tcs_tes_buffer_address(ctx
, NULL
,
1619 lp_build_const_int32(gallivm
, param
));
1621 value
= buffer_load(&radeon_bld
->soa
.bld_base
, TGSI_TYPE_FLOAT
,
1622 ~0, buffer
, base
, addr
);
1627 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1628 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1630 LLVMValueRef buf
, slot
, val
[4];
1633 slot
= lp_build_const_int32(gallivm
, SI_HS_CONST_DEFAULT_TESS_LEVELS
);
1634 buf
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1635 buf
= build_indexed_load_const(ctx
, buf
, slot
);
1636 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1638 for (i
= 0; i
< 4; i
++)
1639 val
[i
] = buffer_load_const(ctx
, buf
,
1640 lp_build_const_int32(gallivm
, (offset
+ i
) * 4));
1641 value
= lp_build_gather_values(gallivm
, val
, 4);
1645 case TGSI_SEMANTIC_PRIMID
:
1646 value
= get_primitive_id(&radeon_bld
->soa
.bld_base
, 0);
1649 case TGSI_SEMANTIC_GRID_SIZE
:
1650 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_GRID_SIZE
);
1653 case TGSI_SEMANTIC_BLOCK_SIZE
:
1655 LLVMValueRef values
[3];
1657 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1659 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1660 unsigned sizes
[3] = {
1661 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1662 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1663 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1666 for (i
= 0; i
< 3; ++i
)
1667 values
[i
] = lp_build_const_int32(gallivm
, sizes
[i
]);
1669 value
= lp_build_gather_values(gallivm
, values
, 3);
1671 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1676 case TGSI_SEMANTIC_BLOCK_ID
:
1677 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_ID
);
1680 case TGSI_SEMANTIC_THREAD_ID
:
1681 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_THREAD_ID
);
1684 #if HAVE_LLVM >= 0x0309
1685 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1686 value
= lp_build_intrinsic(gallivm
->builder
,
1687 "llvm.amdgcn.ps.live",
1689 LP_FUNC_ATTR_READNONE
);
1690 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1691 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1696 assert(!"unknown system value");
1700 radeon_bld
->system_values
[index
] = value
;
1703 static void declare_compute_memory(struct si_shader_context
*radeon_bld
,
1704 const struct tgsi_full_declaration
*decl
)
1706 struct si_shader_context
*ctx
=
1707 si_shader_context(&radeon_bld
->soa
.bld_base
);
1708 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1709 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1711 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1714 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1715 assert(decl
->Range
.First
== decl
->Range
.Last
);
1716 assert(!ctx
->shared_memory
);
1718 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1719 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1722 LLVMSetAlignment(var
, 4);
1724 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1727 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1729 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1730 SI_PARAM_CONST_BUFFERS
);
1732 return build_indexed_load_const(ctx
, list_ptr
,
1733 LLVMConstInt(ctx
->i32
, i
, 0));
1736 static LLVMValueRef
fetch_constant(
1737 struct lp_build_tgsi_context
*bld_base
,
1738 const struct tgsi_full_src_register
*reg
,
1739 enum tgsi_opcode_type type
,
1742 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1743 struct lp_build_context
*base
= &bld_base
->base
;
1744 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1747 LLVMValueRef addr
, bufp
;
1748 LLVMValueRef result
;
1750 if (swizzle
== LP_CHAN_ALL
) {
1752 LLVMValueRef values
[4];
1753 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1754 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1756 return lp_build_gather_values(bld_base
->base
.gallivm
, values
, 4);
1759 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1760 idx
= reg
->Register
.Index
* 4 + swizzle
;
1762 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1763 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_CONST_BUFFERS
);
1765 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1766 reg
->Dimension
.Index
,
1767 SI_NUM_CONST_BUFFERS
);
1768 bufp
= build_indexed_load_const(ctx
, ptr
, index
);
1770 bufp
= load_const_buffer_desc(ctx
, buf
);
1772 if (reg
->Register
.Indirect
) {
1773 addr
= ctx
->soa
.addr
[ireg
->Index
][ireg
->Swizzle
];
1774 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1775 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1776 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1777 lp_build_const_int32(base
->gallivm
, idx
* 4));
1779 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1782 result
= buffer_load_const(ctx
, bufp
, addr
);
1784 if (!tgsi_type_is_64bit(type
))
1785 result
= bitcast(bld_base
, type
, result
);
1787 LLVMValueRef addr2
, result2
;
1789 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1790 LLVMConstInt(ctx
->i32
, 4, 0));
1791 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1793 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1799 /* Upper 16 bits must be zero. */
1800 static LLVMValueRef
si_llvm_pack_two_int16(struct gallivm_state
*gallivm
,
1801 LLVMValueRef val
[2])
1803 return LLVMBuildOr(gallivm
->builder
, val
[0],
1804 LLVMBuildShl(gallivm
->builder
, val
[1],
1805 lp_build_const_int32(gallivm
, 16),
1809 /* Upper 16 bits are ignored and will be dropped. */
1810 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct gallivm_state
*gallivm
,
1811 LLVMValueRef val
[2])
1813 LLVMValueRef v
[2] = {
1814 LLVMBuildAnd(gallivm
->builder
, val
[0],
1815 lp_build_const_int32(gallivm
, 0xffff), ""),
1818 return si_llvm_pack_two_int16(gallivm
, v
);
1821 /* Initialize arguments for the shader export intrinsic */
1822 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1823 LLVMValueRef
*values
,
1827 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1828 struct lp_build_context
*uint
=
1829 &ctx
->soa
.bld_base
.uint_bld
;
1830 struct lp_build_context
*base
= &bld_base
->base
;
1831 struct gallivm_state
*gallivm
= base
->gallivm
;
1832 LLVMBuilderRef builder
= base
->gallivm
->builder
;
1833 LLVMValueRef val
[4];
1834 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1838 /* Default is 0xf. Adjusted below depending on the format. */
1839 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
1841 /* Specify whether the EXEC mask represents the valid mask */
1842 args
[1] = uint
->zero
;
1844 /* Specify whether this is the last export */
1845 args
[2] = uint
->zero
;
1847 /* Specify the target we are exporting */
1848 args
[3] = lp_build_const_int32(base
->gallivm
, target
);
1850 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1851 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1852 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1853 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1855 assert(cbuf
>= 0 && cbuf
< 8);
1856 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1857 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1860 args
[4] = uint
->zero
; /* COMPR flag */
1861 args
[5] = base
->undef
;
1862 args
[6] = base
->undef
;
1863 args
[7] = base
->undef
;
1864 args
[8] = base
->undef
;
1866 switch (spi_shader_col_format
) {
1867 case V_028714_SPI_SHADER_ZERO
:
1868 args
[0] = uint
->zero
; /* writemask */
1869 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
1872 case V_028714_SPI_SHADER_32_R
:
1873 args
[0] = uint
->one
; /* writemask */
1874 args
[5] = values
[0];
1877 case V_028714_SPI_SHADER_32_GR
:
1878 args
[0] = lp_build_const_int32(base
->gallivm
, 0x3); /* writemask */
1879 args
[5] = values
[0];
1880 args
[6] = values
[1];
1883 case V_028714_SPI_SHADER_32_AR
:
1884 args
[0] = lp_build_const_int32(base
->gallivm
, 0x9); /* writemask */
1885 args
[5] = values
[0];
1886 args
[8] = values
[3];
1889 case V_028714_SPI_SHADER_FP16_ABGR
:
1890 args
[4] = uint
->one
; /* COMPR flag */
1892 for (chan
= 0; chan
< 2; chan
++) {
1893 LLVMValueRef pack_args
[2] = {
1895 values
[2 * chan
+ 1]
1897 LLVMValueRef packed
;
1899 packed
= lp_build_intrinsic(base
->gallivm
->builder
,
1901 ctx
->i32
, pack_args
, 2,
1902 LP_FUNC_ATTR_READNONE
);
1904 LLVMBuildBitCast(base
->gallivm
->builder
,
1905 packed
, ctx
->f32
, "");
1909 case V_028714_SPI_SHADER_UNORM16_ABGR
:
1910 for (chan
= 0; chan
< 4; chan
++) {
1911 val
[chan
] = si_llvm_saturate(bld_base
, values
[chan
]);
1912 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1913 lp_build_const_float(gallivm
, 65535), "");
1914 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1915 lp_build_const_float(gallivm
, 0.5), "");
1916 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
1920 args
[4] = uint
->one
; /* COMPR flag */
1921 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1922 si_llvm_pack_two_int16(gallivm
, val
));
1923 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1924 si_llvm_pack_two_int16(gallivm
, val
+2));
1927 case V_028714_SPI_SHADER_SNORM16_ABGR
:
1928 for (chan
= 0; chan
< 4; chan
++) {
1929 /* Clamp between [-1, 1]. */
1930 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
1932 lp_build_const_float(gallivm
, 1));
1933 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
1935 lp_build_const_float(gallivm
, -1));
1936 /* Convert to a signed integer in [-32767, 32767]. */
1937 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1938 lp_build_const_float(gallivm
, 32767), "");
1939 /* If positive, add 0.5, else add -0.5. */
1940 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1941 LLVMBuildSelect(builder
,
1942 LLVMBuildFCmp(builder
, LLVMRealOGE
,
1943 val
[chan
], base
->zero
, ""),
1944 lp_build_const_float(gallivm
, 0.5),
1945 lp_build_const_float(gallivm
, -0.5), ""), "");
1946 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
1949 args
[4] = uint
->one
; /* COMPR flag */
1950 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1951 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
1952 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1953 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
1956 case V_028714_SPI_SHADER_UINT16_ABGR
: {
1957 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
1960 for (chan
= 0; chan
< 4; chan
++) {
1961 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1962 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
1966 args
[4] = uint
->one
; /* COMPR flag */
1967 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1968 si_llvm_pack_two_int16(gallivm
, val
));
1969 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1970 si_llvm_pack_two_int16(gallivm
, val
+2));
1974 case V_028714_SPI_SHADER_SINT16_ABGR
: {
1975 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
1977 LLVMValueRef min
= lp_build_const_int32(gallivm
, is_int8
?
1980 for (chan
= 0; chan
< 4; chan
++) {
1981 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1982 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1985 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1990 args
[4] = uint
->one
; /* COMPR flag */
1991 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1992 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
1993 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1994 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
1998 case V_028714_SPI_SHADER_32_ABGR
:
1999 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
2004 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2007 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2008 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2010 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2011 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2012 SI_PARAM_ALPHA_REF
);
2014 LLVMValueRef alpha_pass
=
2015 lp_build_cmp(&bld_base
->base
,
2016 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2019 lp_build_select(&bld_base
->base
,
2021 lp_build_const_float(gallivm
, 1.0f
),
2022 lp_build_const_float(gallivm
, -1.0f
));
2024 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
2025 ctx
->voidt
, &arg
, 1, 0);
2027 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kilp",
2028 ctx
->voidt
, NULL
, 0, 0);
2032 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2034 unsigned samplemask_param
)
2036 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2037 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2038 LLVMValueRef coverage
;
2040 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2041 coverage
= LLVMGetParam(ctx
->main_fn
,
2043 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
2045 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
2047 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2049 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2052 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2053 lp_build_const_float(gallivm
,
2054 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2056 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2059 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2060 LLVMValueRef (*pos
)[9], LLVMValueRef
*out_elts
)
2062 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2063 struct lp_build_context
*base
= &bld_base
->base
;
2064 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
2067 unsigned const_chan
;
2068 LLVMValueRef base_elt
;
2069 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2070 LLVMValueRef constbuf_index
= lp_build_const_int32(base
->gallivm
,
2071 SI_VS_CONST_CLIP_PLANES
);
2072 LLVMValueRef const_resource
= build_indexed_load_const(ctx
, ptr
, constbuf_index
);
2074 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2075 LLVMValueRef
*args
= pos
[2 + reg_index
];
2080 args
[8] = lp_build_const_float(base
->gallivm
, 0.0f
);
2082 /* Compute dot products of position and user clip plane vectors */
2083 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2084 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2085 args
[1] = lp_build_const_int32(base
->gallivm
,
2086 ((reg_index
* 4 + chan
) * 4 +
2088 base_elt
= buffer_load_const(ctx
, const_resource
,
2091 lp_build_add(base
, args
[5 + chan
],
2092 lp_build_mul(base
, base_elt
,
2093 out_elts
[const_chan
]));
2097 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf);
2098 args
[1] = uint
->zero
;
2099 args
[2] = uint
->zero
;
2100 args
[3] = lp_build_const_int32(base
->gallivm
,
2101 V_008DFC_SQ_EXP_POS
+ 2 + reg_index
);
2102 args
[4] = uint
->zero
;
2106 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2110 if (so
->num_outputs
)
2111 fprintf(stderr
, "STREAMOUT\n");
2113 for (i
= 0; i
< so
->num_outputs
; i
++) {
2114 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2115 so
->output
[i
].start_component
;
2116 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2117 i
, so
->output
[i
].output_buffer
,
2118 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2119 so
->output
[i
].register_index
,
2120 mask
& 1 ? "x" : "",
2121 mask
& 2 ? "y" : "",
2122 mask
& 4 ? "z" : "",
2123 mask
& 8 ? "w" : "");
2127 /* On SI, the vertex shader is responsible for writing streamout data
2129 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2130 struct si_shader_output_values
*outputs
,
2133 struct pipe_stream_output_info
*so
= &ctx
->shader
->selector
->so
;
2134 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2135 LLVMBuilderRef builder
= gallivm
->builder
;
2137 struct lp_build_if_state if_ctx
;
2138 LLVMValueRef so_buffers
[4];
2139 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2140 SI_PARAM_RW_BUFFERS
);
2142 /* Load the descriptors. */
2143 for (i
= 0; i
< 4; ++i
) {
2144 if (ctx
->shader
->selector
->so
.stride
[i
]) {
2145 LLVMValueRef offset
= lp_build_const_int32(gallivm
,
2146 SI_VS_STREAMOUT_BUF0
+ i
);
2148 so_buffers
[i
] = build_indexed_load_const(ctx
, buf_ptr
, offset
);
2152 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2153 LLVMValueRef so_vtx_count
=
2154 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2156 LLVMValueRef tid
= get_thread_id(ctx
);
2158 /* can_emit = tid < so_vtx_count; */
2159 LLVMValueRef can_emit
=
2160 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2162 LLVMValueRef stream_id
=
2163 unpack_param(ctx
, ctx
->param_streamout_config
, 24, 2);
2165 /* Emit the streamout code conditionally. This actually avoids
2166 * out-of-bounds buffer access. The hw tells us via the SGPR
2167 * (so_vtx_count) which threads are allowed to emit streamout data. */
2168 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2170 /* The buffer offset is computed as follows:
2171 * ByteOffset = streamout_offset[buffer_id]*4 +
2172 * (streamout_write_index + thread_id)*stride[buffer_id] +
2176 LLVMValueRef so_write_index
=
2177 LLVMGetParam(ctx
->main_fn
,
2178 ctx
->param_streamout_write_index
);
2180 /* Compute (streamout_write_index + thread_id). */
2181 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2183 /* Compute the write offset for each enabled buffer. */
2184 LLVMValueRef so_write_offset
[4] = {};
2185 for (i
= 0; i
< 4; i
++) {
2189 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2190 ctx
->param_streamout_offset
[i
]);
2191 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2193 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2194 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2195 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2198 /* Write streamout data. */
2199 for (i
= 0; i
< so
->num_outputs
; i
++) {
2200 unsigned buf_idx
= so
->output
[i
].output_buffer
;
2201 unsigned reg
= so
->output
[i
].register_index
;
2202 unsigned start
= so
->output
[i
].start_component
;
2203 unsigned num_comps
= so
->output
[i
].num_components
;
2204 unsigned stream
= so
->output
[i
].stream
;
2205 LLVMValueRef out
[4];
2206 struct lp_build_if_state if_ctx_stream
;
2208 assert(num_comps
&& num_comps
<= 4);
2209 if (!num_comps
|| num_comps
> 4)
2215 /* Load the output as int. */
2216 for (j
= 0; j
< num_comps
; j
++) {
2217 out
[j
] = LLVMBuildBitCast(builder
,
2218 outputs
[reg
].values
[start
+j
],
2222 /* Pack the output. */
2223 LLVMValueRef vdata
= NULL
;
2225 switch (num_comps
) {
2226 case 1: /* as i32 */
2229 case 2: /* as v2i32 */
2230 case 3: /* as v4i32 (aligned to 4) */
2231 case 4: /* as v4i32 */
2232 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2233 for (j
= 0; j
< num_comps
; j
++) {
2234 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2235 LLVMConstInt(ctx
->i32
, j
, 0), "");
2240 LLVMValueRef can_emit_stream
=
2241 LLVMBuildICmp(builder
, LLVMIntEQ
,
2243 lp_build_const_int32(gallivm
, stream
), "");
2245 lp_build_if(&if_ctx_stream
, gallivm
, can_emit_stream
);
2246 build_tbuffer_store_dwords(ctx
, so_buffers
[buf_idx
],
2248 so_write_offset
[buf_idx
],
2249 LLVMConstInt(ctx
->i32
, 0, 0),
2250 so
->output
[i
].dst_offset
*4);
2251 lp_build_endif(&if_ctx_stream
);
2254 lp_build_endif(&if_ctx
);
2258 /* Generate export instructions for hardware VS shader stage */
2259 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2260 struct si_shader_output_values
*outputs
,
2263 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2264 struct si_shader
*shader
= ctx
->shader
;
2265 struct lp_build_context
*base
= &bld_base
->base
;
2266 struct lp_build_context
*uint
=
2267 &ctx
->soa
.bld_base
.uint_bld
;
2268 LLVMValueRef args
[9];
2269 LLVMValueRef pos_args
[4][9] = { { 0 } };
2270 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2271 unsigned semantic_name
, semantic_index
;
2273 unsigned param_count
= 0;
2277 if (outputs
&& ctx
->shader
->selector
->so
.num_outputs
) {
2278 si_llvm_emit_streamout(ctx
, outputs
, noutput
);
2281 for (i
= 0; i
< noutput
; i
++) {
2282 semantic_name
= outputs
[i
].name
;
2283 semantic_index
= outputs
[i
].sid
;
2284 bool export_param
= true;
2286 switch (semantic_name
) {
2287 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2288 case TGSI_SEMANTIC_PSIZE
:
2289 case TGSI_SEMANTIC_CLIPVERTEX
:
2290 case TGSI_SEMANTIC_EDGEFLAG
:
2292 case TGSI_SEMANTIC_GENERIC
:
2293 case TGSI_SEMANTIC_CLIPDIST
:
2294 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2295 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2296 export_param
= false;
2299 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2300 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2301 export_param
= false;
2306 /* Select the correct target */
2307 switch(semantic_name
) {
2308 case TGSI_SEMANTIC_PSIZE
:
2309 psize_value
= outputs
[i
].values
[0];
2311 case TGSI_SEMANTIC_EDGEFLAG
:
2312 edgeflag_value
= outputs
[i
].values
[0];
2314 case TGSI_SEMANTIC_LAYER
:
2315 layer_value
= outputs
[i
].values
[0];
2316 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2317 goto handle_semantic
;
2318 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2319 viewport_index_value
= outputs
[i
].values
[0];
2320 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2321 goto handle_semantic
;
2322 case TGSI_SEMANTIC_POSITION
:
2323 target
= V_008DFC_SQ_EXP_POS
;
2325 case TGSI_SEMANTIC_COLOR
:
2326 case TGSI_SEMANTIC_BCOLOR
:
2329 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2330 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2331 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2334 case TGSI_SEMANTIC_CLIPDIST
:
2335 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2336 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2337 goto handle_semantic
;
2339 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2341 case TGSI_SEMANTIC_CLIPVERTEX
:
2342 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2344 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2346 case TGSI_SEMANTIC_PRIMID
:
2347 case TGSI_SEMANTIC_FOG
:
2348 case TGSI_SEMANTIC_TEXCOORD
:
2349 case TGSI_SEMANTIC_GENERIC
:
2352 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2353 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2354 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2360 "Warning: SI unhandled vs output type:%d\n",
2364 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, args
);
2366 if (target
>= V_008DFC_SQ_EXP_POS
&&
2367 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2368 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2369 args
, sizeof(args
));
2371 lp_build_intrinsic(base
->gallivm
->builder
,
2372 "llvm.SI.export", ctx
->voidt
,
2376 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2377 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2378 goto handle_semantic
;
2382 shader
->info
.nr_param_exports
= param_count
;
2384 /* We need to add the position output manually if it's missing. */
2385 if (!pos_args
[0][0]) {
2386 pos_args
[0][0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
2387 pos_args
[0][1] = uint
->zero
; /* EXEC mask */
2388 pos_args
[0][2] = uint
->zero
; /* last export? */
2389 pos_args
[0][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
);
2390 pos_args
[0][4] = uint
->zero
; /* COMPR flag */
2391 pos_args
[0][5] = base
->zero
; /* X */
2392 pos_args
[0][6] = base
->zero
; /* Y */
2393 pos_args
[0][7] = base
->zero
; /* Z */
2394 pos_args
[0][8] = base
->one
; /* W */
2397 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2398 if (shader
->selector
->info
.writes_psize
||
2399 shader
->selector
->info
.writes_edgeflag
||
2400 shader
->selector
->info
.writes_viewport_index
||
2401 shader
->selector
->info
.writes_layer
) {
2402 pos_args
[1][0] = lp_build_const_int32(base
->gallivm
, /* writemask */
2403 shader
->selector
->info
.writes_psize
|
2404 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2405 (shader
->selector
->info
.writes_layer
<< 2) |
2406 (shader
->selector
->info
.writes_viewport_index
<< 3));
2407 pos_args
[1][1] = uint
->zero
; /* EXEC mask */
2408 pos_args
[1][2] = uint
->zero
; /* last export? */
2409 pos_args
[1][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ 1);
2410 pos_args
[1][4] = uint
->zero
; /* COMPR flag */
2411 pos_args
[1][5] = base
->zero
; /* X */
2412 pos_args
[1][6] = base
->zero
; /* Y */
2413 pos_args
[1][7] = base
->zero
; /* Z */
2414 pos_args
[1][8] = base
->zero
; /* W */
2416 if (shader
->selector
->info
.writes_psize
)
2417 pos_args
[1][5] = psize_value
;
2419 if (shader
->selector
->info
.writes_edgeflag
) {
2420 /* The output is a float, but the hw expects an integer
2421 * with the first bit containing the edge flag. */
2422 edgeflag_value
= LLVMBuildFPToUI(base
->gallivm
->builder
,
2425 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2427 bld_base
->int_bld
.one
);
2429 /* The LLVM intrinsic expects a float. */
2430 pos_args
[1][6] = LLVMBuildBitCast(base
->gallivm
->builder
,
2435 if (shader
->selector
->info
.writes_layer
)
2436 pos_args
[1][7] = layer_value
;
2438 if (shader
->selector
->info
.writes_viewport_index
)
2439 pos_args
[1][8] = viewport_index_value
;
2442 for (i
= 0; i
< 4; i
++)
2444 shader
->info
.nr_pos_exports
++;
2447 for (i
= 0; i
< 4; i
++) {
2448 if (!pos_args
[i
][0])
2451 /* Specify the target we are exporting */
2452 pos_args
[i
][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ pos_idx
++);
2454 if (pos_idx
== shader
->info
.nr_pos_exports
)
2455 /* Specify that this is the last export */
2456 pos_args
[i
][2] = uint
->one
;
2458 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
2459 ctx
->voidt
, pos_args
[i
], 9, 0);
2464 * Forward all outputs from the vertex shader to the TES. This is only used
2465 * for the fixed function TCS.
2467 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2469 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2470 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2471 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2472 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2475 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2477 rw_buffers
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2478 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2479 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
2481 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2483 lds_vertex_stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
2484 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2485 lds_vertex_stride
, "");
2486 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2487 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2489 inputs
= ctx
->shader
->key
.mono
.tcs
.inputs_to_copy
;
2491 unsigned i
= u_bit_scan64(&inputs
);
2493 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2494 lp_build_const_int32(gallivm
, 4 * i
),
2497 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2499 lp_build_const_int32(gallivm
, i
));
2501 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2504 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buffer_addr
,
2509 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2510 LLVMValueRef rel_patch_id
,
2511 LLVMValueRef invocation_id
,
2512 LLVMValueRef tcs_out_current_patch_data_offset
)
2514 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2515 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2516 struct si_shader
*shader
= ctx
->shader
;
2517 unsigned tess_inner_index
, tess_outer_index
;
2518 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2519 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
;
2520 unsigned stride
, outer_comps
, inner_comps
, i
;
2521 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2523 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2525 /* Do this only for invocation 0, because the tess levels are per-patch,
2528 * This can't jump, because invocation 0 executes this. It should
2529 * at least mask out the loads and stores for other invocations.
2531 lp_build_if(&if_ctx
, gallivm
,
2532 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2533 invocation_id
, bld_base
->uint_bld
.zero
, ""));
2535 /* Determine the layout of one tess factor element in the buffer. */
2536 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2537 case PIPE_PRIM_LINES
:
2538 stride
= 2; /* 2 dwords, 1 vec2 store */
2542 case PIPE_PRIM_TRIANGLES
:
2543 stride
= 4; /* 4 dwords, 1 vec4 store */
2547 case PIPE_PRIM_QUADS
:
2548 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2557 /* Load tess_inner and tess_outer from LDS.
2558 * Any invocation can write them, so we can't get them from a temporary.
2560 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2561 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2563 lds_base
= tcs_out_current_patch_data_offset
;
2564 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2565 lp_build_const_int32(gallivm
,
2566 tess_inner_index
* 4), "");
2567 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2568 lp_build_const_int32(gallivm
,
2569 tess_outer_index
* 4), "");
2571 for (i
= 0; i
< outer_comps
; i
++)
2572 out
[i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2573 for (i
= 0; i
< inner_comps
; i
++)
2574 out
[outer_comps
+i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2576 /* Convert the outputs to vectors for stores. */
2577 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2581 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2583 /* Get the buffer. */
2584 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2585 SI_PARAM_RW_BUFFERS
);
2586 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2587 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_FACTOR
));
2589 /* Get the offset. */
2590 tf_base
= LLVMGetParam(ctx
->main_fn
,
2591 SI_PARAM_TESS_FACTOR_OFFSET
);
2592 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2593 lp_build_const_int32(gallivm
, 4 * stride
), "");
2595 lp_build_if(&inner_if_ctx
, gallivm
,
2596 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2597 rel_patch_id
, bld_base
->uint_bld
.zero
, ""));
2599 /* Store the dynamic HS control word. */
2600 build_tbuffer_store_dwords(ctx
, buffer
,
2601 lp_build_const_int32(gallivm
, 0x80000000),
2602 1, lp_build_const_int32(gallivm
, 0), tf_base
, 0);
2604 lp_build_endif(&inner_if_ctx
);
2606 /* Store the tessellation factors. */
2607 build_tbuffer_store_dwords(ctx
, buffer
, vec0
,
2608 MIN2(stride
, 4), byteoffset
, tf_base
, 4);
2610 build_tbuffer_store_dwords(ctx
, buffer
, vec1
,
2611 stride
- 4, byteoffset
, tf_base
, 20);
2612 lp_build_endif(&if_ctx
);
2615 /* This only writes the tessellation factor levels. */
2616 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2618 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2619 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2621 si_copy_tcs_inputs(bld_base
);
2623 rel_patch_id
= get_rel_patch_id(ctx
);
2624 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2625 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2627 /* Return epilog parameters from this function. */
2628 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
2629 LLVMValueRef ret
= ctx
->return_value
;
2630 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2633 /* RW_BUFFERS pointer */
2634 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2635 SI_PARAM_RW_BUFFERS
);
2636 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2637 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2638 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2639 bld_base
->uint_bld
.zero
, "");
2640 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2641 bld_base
->uint_bld
.one
, "");
2642 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2643 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2645 /* Tess factor buffer soffset is after user SGPRs. */
2646 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2647 SI_PARAM_TESS_FACTOR_OFFSET
);
2648 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2649 SI_TCS_NUM_USER_SGPR
+ 1, "");
2652 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2653 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2654 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2656 vgpr
= SI_TCS_NUM_USER_SGPR
+ 2;
2657 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2658 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2659 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2660 ctx
->return_value
= ret
;
2663 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2665 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2666 struct si_shader
*shader
= ctx
->shader
;
2667 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2668 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2670 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2671 ctx
->param_rel_auto_id
);
2672 LLVMValueRef vertex_dw_stride
=
2673 unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 13, 8);
2674 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2675 vertex_dw_stride
, "");
2677 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2678 * its inputs from it. */
2679 for (i
= 0; i
< info
->num_outputs
; i
++) {
2680 LLVMValueRef
*out_ptr
= ctx
->soa
.outputs
[i
];
2681 unsigned name
= info
->output_semantic_name
[i
];
2682 unsigned index
= info
->output_semantic_index
[i
];
2683 int param
= si_shader_io_get_unique_index(name
, index
);
2684 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2685 lp_build_const_int32(gallivm
, param
* 4), "");
2687 for (chan
= 0; chan
< 4; chan
++) {
2688 lds_store(bld_base
, chan
, dw_addr
,
2689 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2694 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2696 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2697 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2698 struct si_shader
*es
= ctx
->shader
;
2699 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2700 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2701 ctx
->param_es2gs_offset
);
2705 for (i
= 0; i
< info
->num_outputs
; i
++) {
2706 LLVMValueRef
*out_ptr
=
2707 ctx
->soa
.outputs
[i
];
2710 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2711 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2714 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2715 info
->output_semantic_index
[i
]);
2717 for (chan
= 0; chan
< 4; chan
++) {
2718 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2719 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2721 build_tbuffer_store(ctx
,
2724 LLVMGetUndef(ctx
->i32
), soffset
,
2725 (4 * param_index
+ chan
) * 4,
2726 V_008F0C_BUF_DATA_FORMAT_32
,
2727 V_008F0C_BUF_NUM_FORMAT_UINT
,
2733 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2735 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2736 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2737 LLVMValueRef args
[2];
2739 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
);
2740 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
2741 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
2742 ctx
->voidt
, args
, 2, 0);
2745 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2747 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2748 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2749 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2750 struct si_shader_output_values
*outputs
= NULL
;
2753 assert(!ctx
->shader
->is_gs_copy_shader
);
2755 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2757 /* Vertex color clamping.
2759 * This uses a state constant loaded in a user data SGPR and
2760 * an IF statement is added that clamps all colors if the constant
2763 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2764 struct lp_build_if_state if_ctx
;
2765 LLVMValueRef cond
= NULL
;
2766 LLVMValueRef addr
, val
;
2768 for (i
= 0; i
< info
->num_outputs
; i
++) {
2769 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2770 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2773 /* We've found a color. */
2775 /* The state is in the first bit of the user SGPR. */
2776 cond
= LLVMGetParam(ctx
->main_fn
,
2777 SI_PARAM_VS_STATE_BITS
);
2778 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2780 lp_build_if(&if_ctx
, gallivm
, cond
);
2783 for (j
= 0; j
< 4; j
++) {
2784 addr
= ctx
->soa
.outputs
[i
][j
];
2785 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2786 val
= si_llvm_saturate(bld_base
, val
);
2787 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2792 lp_build_endif(&if_ctx
);
2795 for (i
= 0; i
< info
->num_outputs
; i
++) {
2796 outputs
[i
].name
= info
->output_semantic_name
[i
];
2797 outputs
[i
].sid
= info
->output_semantic_index
[i
];
2799 for (j
= 0; j
< 4; j
++)
2800 outputs
[i
].values
[j
] =
2801 LLVMBuildLoad(gallivm
->builder
,
2802 ctx
->soa
.outputs
[i
][j
],
2806 /* Return the primitive ID from the LLVM function. */
2808 LLVMBuildInsertValue(gallivm
->builder
,
2810 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2811 get_primitive_id(bld_base
, 0)),
2812 VS_EPILOG_PRIMID_LOC
, "");
2814 si_llvm_export_vs(bld_base
, outputs
, i
);
2818 struct si_ps_exports
{
2820 LLVMValueRef args
[10][9];
2823 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2824 bool writes_samplemask
)
2827 /* Z needs 32 bits. */
2828 if (writes_samplemask
)
2829 return V_028710_SPI_SHADER_32_ABGR
;
2830 else if (writes_stencil
)
2831 return V_028710_SPI_SHADER_32_GR
;
2833 return V_028710_SPI_SHADER_32_R
;
2834 } else if (writes_stencil
|| writes_samplemask
) {
2835 /* Both stencil and sample mask need only 16 bits. */
2836 return V_028710_SPI_SHADER_UINT16_ABGR
;
2838 return V_028710_SPI_SHADER_ZERO
;
2842 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
2843 LLVMValueRef depth
, LLVMValueRef stencil
,
2844 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
2846 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2847 struct lp_build_context
*base
= &bld_base
->base
;
2848 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
2849 LLVMValueRef args
[9];
2851 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
2853 samplemask
!= NULL
);
2855 assert(depth
|| stencil
|| samplemask
);
2857 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
2858 args
[2] = uint
->one
; /* DONE bit */
2860 /* Specify the target we are exporting */
2861 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_MRTZ
);
2863 args
[4] = uint
->zero
; /* COMP flag */
2864 args
[5] = base
->undef
; /* R, depth */
2865 args
[6] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
2866 args
[7] = base
->undef
; /* B, sample mask */
2867 args
[8] = base
->undef
; /* A, alpha to mask */
2869 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
2871 args
[4] = uint
->one
; /* COMPR flag */
2874 /* Stencil should be in X[23:16]. */
2875 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
2876 stencil
= LLVMBuildShl(base
->gallivm
->builder
, stencil
,
2877 LLVMConstInt(ctx
->i32
, 16, 0), "");
2878 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
2882 /* SampleMask should be in Y[15:0]. */
2883 args
[6] = samplemask
;
2896 args
[7] = samplemask
;
2901 /* SI (except OLAND) has a bug that it only looks
2902 * at the X writemask component. */
2903 if (ctx
->screen
->b
.chip_class
== SI
&&
2904 ctx
->screen
->b
.family
!= CHIP_OLAND
)
2907 /* Specify which components to enable */
2908 args
[0] = lp_build_const_int32(base
->gallivm
, mask
);
2910 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
2913 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
2914 LLVMValueRef
*color
, unsigned index
,
2915 unsigned samplemask_param
,
2916 bool is_last
, struct si_ps_exports
*exp
)
2918 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2919 struct lp_build_context
*base
= &bld_base
->base
;
2923 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
2924 for (i
= 0; i
< 4; i
++)
2925 color
[i
] = si_llvm_saturate(bld_base
, color
[i
]);
2928 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
2929 color
[3] = base
->one
;
2933 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
2934 si_alpha_test(bld_base
, color
[3]);
2936 /* Line & polygon smoothing */
2937 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
2938 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
2941 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
2942 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
2943 LLVMValueRef args
[8][9];
2946 /* Get the export arguments, also find out what the last one is. */
2947 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2948 si_llvm_init_export_args(bld_base
, color
,
2949 V_008DFC_SQ_EXP_MRT
+ c
, args
[c
]);
2950 if (args
[c
][0] != bld_base
->uint_bld
.zero
)
2954 /* Emit all exports. */
2955 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2956 if (is_last
&& last
== c
) {
2957 args
[c
][1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
2958 args
[c
][2] = bld_base
->uint_bld
.one
; /* DONE bit */
2959 } else if (args
[c
][0] == bld_base
->uint_bld
.zero
)
2960 continue; /* unnecessary NULL export */
2962 memcpy(exp
->args
[exp
->num
++], args
[c
], sizeof(args
[c
]));
2965 LLVMValueRef args
[9];
2968 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
2971 args
[1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
2972 args
[2] = bld_base
->uint_bld
.one
; /* DONE bit */
2973 } else if (args
[0] == bld_base
->uint_bld
.zero
)
2974 return; /* unnecessary NULL export */
2976 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
2980 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
2981 struct si_ps_exports
*exp
)
2983 for (unsigned i
= 0; i
< exp
->num
; i
++)
2984 lp_build_intrinsic(ctx
->gallivm
.builder
,
2985 "llvm.SI.export", ctx
->voidt
,
2986 exp
->args
[i
], 9, 0);
2989 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
2991 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2992 struct lp_build_context
*base
= &bld_base
->base
;
2993 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
2994 LLVMValueRef args
[9];
2996 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
2997 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
2998 args
[2] = uint
->one
; /* DONE bit */
2999 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
3000 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
3001 args
[5] = base
->undef
; /* R */
3002 args
[6] = base
->undef
; /* G */
3003 args
[7] = base
->undef
; /* B */
3004 args
[8] = base
->undef
; /* A */
3006 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
3007 ctx
->voidt
, args
, 9, 0);
3011 * Return PS outputs in this order:
3013 * v[0:3] = color0.xyzw
3014 * v[4:7] = color1.xyzw
3019 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3021 * The alpha-ref SGPR is returned via its original location.
3023 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3025 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3026 struct si_shader
*shader
= ctx
->shader
;
3027 struct lp_build_context
*base
= &bld_base
->base
;
3028 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3029 LLVMBuilderRef builder
= base
->gallivm
->builder
;
3030 unsigned i
, j
, first_vgpr
, vgpr
;
3032 LLVMValueRef color
[8][4] = {};
3033 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3036 /* Read the output values. */
3037 for (i
= 0; i
< info
->num_outputs
; i
++) {
3038 unsigned semantic_name
= info
->output_semantic_name
[i
];
3039 unsigned semantic_index
= info
->output_semantic_index
[i
];
3041 switch (semantic_name
) {
3042 case TGSI_SEMANTIC_COLOR
:
3043 assert(semantic_index
< 8);
3044 for (j
= 0; j
< 4; j
++) {
3045 LLVMValueRef ptr
= ctx
->soa
.outputs
[i
][j
];
3046 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3047 color
[semantic_index
][j
] = result
;
3050 case TGSI_SEMANTIC_POSITION
:
3051 depth
= LLVMBuildLoad(builder
,
3052 ctx
->soa
.outputs
[i
][2], "");
3054 case TGSI_SEMANTIC_STENCIL
:
3055 stencil
= LLVMBuildLoad(builder
,
3056 ctx
->soa
.outputs
[i
][1], "");
3058 case TGSI_SEMANTIC_SAMPLEMASK
:
3059 samplemask
= LLVMBuildLoad(builder
,
3060 ctx
->soa
.outputs
[i
][0], "");
3063 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3068 /* Fill the return structure. */
3069 ret
= ctx
->return_value
;
3072 ret
= LLVMBuildInsertValue(builder
, ret
,
3073 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3074 LLVMGetParam(ctx
->main_fn
,
3075 SI_PARAM_ALPHA_REF
)),
3076 SI_SGPR_ALPHA_REF
, "");
3079 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3080 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3084 for (j
= 0; j
< 4; j
++)
3085 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3088 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3090 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3092 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3094 /* Add the input sample mask for smoothing at the end. */
3095 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3096 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3097 ret
= LLVMBuildInsertValue(builder
, ret
,
3098 LLVMGetParam(ctx
->main_fn
,
3099 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3101 ctx
->return_value
= ret
;
3105 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3106 * buffer in number of elements and return it as an i32.
3108 static LLVMValueRef
get_buffer_size(
3109 struct lp_build_tgsi_context
*bld_base
,
3110 LLVMValueRef descriptor
)
3112 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3113 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3114 LLVMBuilderRef builder
= gallivm
->builder
;
3116 LLVMBuildExtractElement(builder
, descriptor
,
3117 lp_build_const_int32(gallivm
, 6), "");
3119 if (ctx
->screen
->b
.chip_class
>= VI
) {
3120 /* On VI, the descriptor contains the size in bytes,
3121 * but TXQ must return the size in elements.
3122 * The stride is always non-zero for resources using TXQ.
3124 LLVMValueRef stride
=
3125 LLVMBuildExtractElement(builder
, descriptor
,
3126 lp_build_const_int32(gallivm
, 5), "");
3127 stride
= LLVMBuildLShr(builder
, stride
,
3128 lp_build_const_int32(gallivm
, 16), "");
3129 stride
= LLVMBuildAnd(builder
, stride
,
3130 lp_build_const_int32(gallivm
, 0x3FFF), "");
3132 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3139 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
3142 static void build_type_name_for_intr(
3144 char *buf
, unsigned bufsize
)
3146 LLVMTypeRef elem_type
= type
;
3148 assert(bufsize
>= 8);
3150 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
3151 int ret
= snprintf(buf
, bufsize
, "v%u",
3152 LLVMGetVectorSize(type
));
3154 char *type_name
= LLVMPrintTypeToString(type
);
3155 fprintf(stderr
, "Error building type name for: %s\n",
3159 elem_type
= LLVMGetElementType(type
);
3163 switch (LLVMGetTypeKind(elem_type
)) {
3165 case LLVMIntegerTypeKind
:
3166 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
3168 case LLVMFloatTypeKind
:
3169 snprintf(buf
, bufsize
, "f32");
3171 case LLVMDoubleTypeKind
:
3172 snprintf(buf
, bufsize
, "f64");
3177 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3178 struct lp_build_tgsi_context
*bld_base
,
3179 struct lp_build_emit_data
*emit_data
);
3181 /* Prevent optimizations (at least of memory accesses) across the current
3182 * point in the program by emitting empty inline assembly that is marked as
3183 * having side effects.
3185 static void emit_optimization_barrier(struct si_shader_context
*ctx
)
3187 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3188 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3189 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, "", "", true, false);
3190 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3193 static void emit_waitcnt(struct si_shader_context
*ctx
)
3195 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3196 LLVMBuilderRef builder
= gallivm
->builder
;
3197 LLVMValueRef args
[1] = {
3198 lp_build_const_int32(gallivm
, 0xf70)
3200 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3201 ctx
->voidt
, args
, 1, 0);
3204 static void membar_emit(
3205 const struct lp_build_tgsi_action
*action
,
3206 struct lp_build_tgsi_context
*bld_base
,
3207 struct lp_build_emit_data
*emit_data
)
3209 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3215 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3216 const struct tgsi_full_src_register
*reg
)
3219 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3220 SI_PARAM_SHADER_BUFFERS
);
3222 if (!reg
->Register
.Indirect
)
3223 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3225 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3226 reg
->Register
.Index
,
3227 SI_NUM_SHADER_BUFFERS
);
3229 return build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3232 static bool tgsi_is_array_sampler(unsigned target
)
3234 return target
== TGSI_TEXTURE_1D_ARRAY
||
3235 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3236 target
== TGSI_TEXTURE_2D_ARRAY
||
3237 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3238 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3239 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3240 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3243 static bool tgsi_is_array_image(unsigned target
)
3245 return target
== TGSI_TEXTURE_3D
||
3246 target
== TGSI_TEXTURE_CUBE
||
3247 target
== TGSI_TEXTURE_1D_ARRAY
||
3248 target
== TGSI_TEXTURE_2D_ARRAY
||
3249 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3250 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3254 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3256 * At least on Tonga, executing image stores on images with DCC enabled and
3257 * non-trivial can eventually lead to lockups. This can occur when an
3258 * application binds an image as read-only but then uses a shader that writes
3259 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3260 * program termination) in this case, but it doesn't cost much to be a bit
3261 * nicer: disabling DCC in the shader still leads to undefined results but
3262 * avoids the lockup.
3264 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3267 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3270 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3271 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3272 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3275 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3276 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3277 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3282 * Load the resource descriptor for \p image.
3286 struct lp_build_tgsi_context
*bld_base
,
3287 const struct tgsi_full_src_register
*image
,
3288 bool is_store
, unsigned target
,
3291 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3292 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3294 LLVMValueRef index
, tmp
;
3295 bool dcc_off
= target
!= TGSI_TEXTURE_BUFFER
&& is_store
;
3297 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3299 if (!image
->Register
.Indirect
) {
3300 const struct tgsi_shader_info
*info
= bld_base
->info
;
3302 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3304 if (info
->images_writemask
& (1 << image
->Register
.Index
) &&
3305 target
!= TGSI_TEXTURE_BUFFER
)
3308 /* From the GL_ARB_shader_image_load_store extension spec:
3310 * If a shader performs an image load, store, or atomic
3311 * operation using an image variable declared as an array,
3312 * and if the index used to select an individual element is
3313 * negative or greater than or equal to the size of the
3314 * array, the results of the operation are undefined but may
3315 * not lead to termination.
3317 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3318 image
->Register
.Index
,
3322 tmp
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3324 tmp
= force_dcc_off(ctx
, tmp
);
3328 static LLVMValueRef
image_fetch_coords(
3329 struct lp_build_tgsi_context
*bld_base
,
3330 const struct tgsi_full_instruction
*inst
,
3333 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3334 LLVMBuilderRef builder
= gallivm
->builder
;
3335 unsigned target
= inst
->Memory
.Texture
;
3336 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3337 LLVMValueRef coords
[4];
3341 for (chan
= 0; chan
< num_coords
; ++chan
) {
3342 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3343 tmp
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3347 if (num_coords
== 1)
3350 if (num_coords
== 3) {
3351 /* LLVM has difficulties lowering 3-element vectors. */
3352 coords
[3] = bld_base
->uint_bld
.undef
;
3356 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3360 * Append the extra mode bits that are used by image load and store.
3362 static void image_append_args(
3363 struct si_shader_context
*ctx
,
3364 struct lp_build_emit_data
* emit_data
,
3368 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3369 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3370 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3371 LLVMValueRef r128
= i1false
;
3372 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3374 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3376 LLVMValueRef slc
= i1false
;
3377 LLVMValueRef lwe
= i1false
;
3379 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3380 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3381 emit_data
->args
[emit_data
->arg_count
++] = da
;
3383 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3385 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3389 /* HAVE_LLVM >= 0x0400 */
3390 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3391 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3392 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3393 emit_data
->args
[emit_data
->arg_count
++] = da
;
3397 * Given a 256 bit resource, extract the top half (which stores the buffer
3398 * resource in the case of textures and images).
3400 static LLVMValueRef
extract_rsrc_top_half(
3401 struct si_shader_context
*ctx
,
3404 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3405 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
3406 LLVMTypeRef v2i128
= LLVMVectorType(ctx
->i128
, 2);
3408 rsrc
= LLVMBuildBitCast(gallivm
->builder
, rsrc
, v2i128
, "");
3409 rsrc
= LLVMBuildExtractElement(gallivm
->builder
, rsrc
, bld_base
->uint_bld
.one
, "");
3410 rsrc
= LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v4i32
, "");
3416 * Append the resource and indexing arguments for buffer intrinsics.
3418 * \param rsrc the v4i32 buffer resource
3419 * \param index index into the buffer (stride-based)
3420 * \param offset byte offset into the buffer
3422 static void buffer_append_args(
3423 struct si_shader_context
*ctx
,
3424 struct lp_build_emit_data
*emit_data
,
3427 LLVMValueRef offset
,
3430 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3431 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3432 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3434 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3435 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3436 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3438 emit_data
->args
[emit_data
->arg_count
++] =
3439 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3440 i1true
: i1false
; /* glc */
3442 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3445 static void load_fetch_args(
3446 struct lp_build_tgsi_context
* bld_base
,
3447 struct lp_build_emit_data
* emit_data
)
3449 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3450 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3451 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3452 unsigned target
= inst
->Memory
.Texture
;
3455 emit_data
->dst_type
= LLVMVectorType(bld_base
->base
.elem_type
, 4);
3457 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3458 LLVMBuilderRef builder
= gallivm
->builder
;
3459 LLVMValueRef offset
;
3462 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3464 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3465 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3467 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3469 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3470 LLVMValueRef coords
;
3472 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3473 coords
= image_fetch_coords(bld_base
, inst
, 1);
3475 if (target
== TGSI_TEXTURE_BUFFER
) {
3476 rsrc
= extract_rsrc_top_half(ctx
, rsrc
);
3477 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3478 bld_base
->uint_bld
.zero
, false);
3480 emit_data
->args
[0] = coords
;
3481 emit_data
->args
[1] = rsrc
;
3482 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
3483 emit_data
->arg_count
= 3;
3485 image_append_args(ctx
, emit_data
, target
, false);
3490 static void load_emit_buffer(struct si_shader_context
*ctx
,
3491 struct lp_build_emit_data
*emit_data
)
3493 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3494 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3495 LLVMBuilderRef builder
= gallivm
->builder
;
3496 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3497 uint count
= util_last_bit(writemask
);
3498 const char *intrinsic_name
;
3499 LLVMTypeRef dst_type
;
3503 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3504 dst_type
= ctx
->f32
;
3507 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3508 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3511 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3512 dst_type
= ctx
->v4f32
;
3516 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3517 builder
, intrinsic_name
, dst_type
,
3518 emit_data
->args
, emit_data
->arg_count
,
3519 LP_FUNC_ATTR_READONLY
);
3522 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3523 const struct tgsi_full_instruction
*inst
,
3524 LLVMTypeRef type
, int arg
)
3526 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3527 LLVMBuilderRef builder
= gallivm
->builder
;
3528 LLVMValueRef offset
, ptr
;
3531 offset
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, arg
, 0);
3532 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3534 ptr
= ctx
->shared_memory
;
3535 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3536 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3537 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3542 static void load_emit_memory(
3543 struct si_shader_context
*ctx
,
3544 struct lp_build_emit_data
*emit_data
)
3546 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3547 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3548 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3549 LLVMBuilderRef builder
= gallivm
->builder
;
3550 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3551 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3554 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 1);
3556 for (chan
= 0; chan
< 4; ++chan
) {
3557 if (!(writemask
& (1 << chan
))) {
3558 channels
[chan
] = LLVMGetUndef(base
->elem_type
);
3562 index
= lp_build_const_int32(gallivm
, chan
);
3563 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3564 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3566 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3569 static void get_image_intr_name(const char *base_name
,
3570 LLVMTypeRef data_type
,
3571 LLVMTypeRef coords_type
,
3572 LLVMTypeRef rsrc_type
,
3573 char *out_name
, unsigned out_len
)
3575 char coords_type_name
[8];
3577 build_type_name_for_intr(coords_type
, coords_type_name
,
3578 sizeof(coords_type_name
));
3580 if (HAVE_LLVM
<= 0x0309) {
3581 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
3583 char data_type_name
[8];
3584 char rsrc_type_name
[8];
3586 build_type_name_for_intr(data_type
, data_type_name
,
3587 sizeof(data_type_name
));
3588 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
3589 sizeof(rsrc_type_name
));
3590 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
3591 data_type_name
, coords_type_name
, rsrc_type_name
);
3595 static void load_emit(
3596 const struct lp_build_tgsi_action
*action
,
3597 struct lp_build_tgsi_context
*bld_base
,
3598 struct lp_build_emit_data
*emit_data
)
3600 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3601 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3602 LLVMBuilderRef builder
= gallivm
->builder
;
3603 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3604 char intrinsic_name
[64];
3606 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3607 load_emit_memory(ctx
, emit_data
);
3611 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3614 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3615 load_emit_buffer(ctx
, emit_data
);
3619 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3620 emit_data
->output
[emit_data
->chan
] =
3622 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3623 emit_data
->args
, emit_data
->arg_count
,
3624 LP_FUNC_ATTR_READONLY
);
3626 get_image_intr_name("llvm.amdgcn.image.load",
3627 emit_data
->dst_type
, /* vdata */
3628 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3629 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3630 intrinsic_name
, sizeof(intrinsic_name
));
3632 emit_data
->output
[emit_data
->chan
] =
3634 builder
, intrinsic_name
, emit_data
->dst_type
,
3635 emit_data
->args
, emit_data
->arg_count
,
3636 LP_FUNC_ATTR_READONLY
);
3640 static void store_fetch_args(
3641 struct lp_build_tgsi_context
* bld_base
,
3642 struct lp_build_emit_data
* emit_data
)
3644 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3645 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3646 LLVMBuilderRef builder
= gallivm
->builder
;
3647 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3648 struct tgsi_full_src_register memory
;
3649 LLVMValueRef chans
[4];
3654 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3656 for (chan
= 0; chan
< 4; ++chan
) {
3657 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3659 data
= lp_build_gather_values(gallivm
, chans
, 4);
3661 emit_data
->args
[emit_data
->arg_count
++] = data
;
3663 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3665 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3666 LLVMValueRef offset
;
3669 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3671 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3672 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3674 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3676 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3677 unsigned target
= inst
->Memory
.Texture
;
3678 LLVMValueRef coords
;
3680 coords
= image_fetch_coords(bld_base
, inst
, 0);
3682 if (target
== TGSI_TEXTURE_BUFFER
) {
3683 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3685 rsrc
= extract_rsrc_top_half(ctx
, rsrc
);
3686 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3687 bld_base
->uint_bld
.zero
, false);
3689 emit_data
->args
[1] = coords
;
3690 image_fetch_rsrc(bld_base
, &memory
, true, target
,
3691 &emit_data
->args
[2]);
3692 emit_data
->args
[3] = lp_build_const_int32(gallivm
, 15); /* dmask */
3693 emit_data
->arg_count
= 4;
3695 image_append_args(ctx
, emit_data
, target
, false);
3700 static void store_emit_buffer(
3701 struct si_shader_context
*ctx
,
3702 struct lp_build_emit_data
*emit_data
)
3704 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3705 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3706 LLVMBuilderRef builder
= gallivm
->builder
;
3707 struct lp_build_context
*uint_bld
= &ctx
->soa
.bld_base
.uint_bld
;
3708 LLVMValueRef base_data
= emit_data
->args
[0];
3709 LLVMValueRef base_offset
= emit_data
->args
[3];
3710 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3714 const char *intrinsic_name
;
3716 LLVMValueRef offset
;
3719 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3721 /* Due to an LLVM limitation, split 3-element writes
3722 * into a 2-element and a 1-element write. */
3724 writemask
|= 1 << (start
+ 2);
3730 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3731 } else if (count
== 2) {
3732 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3734 tmp
= LLVMBuildExtractElement(
3736 lp_build_const_int32(gallivm
, start
), "");
3737 data
= LLVMBuildInsertElement(
3738 builder
, LLVMGetUndef(v2f32
), tmp
,
3739 uint_bld
->zero
, "");
3741 tmp
= LLVMBuildExtractElement(
3743 lp_build_const_int32(gallivm
, start
+ 1), "");
3744 data
= LLVMBuildInsertElement(
3745 builder
, data
, tmp
, uint_bld
->one
, "");
3747 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3750 data
= LLVMBuildExtractElement(
3752 lp_build_const_int32(gallivm
, start
), "");
3753 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3756 offset
= base_offset
;
3758 offset
= LLVMBuildAdd(
3760 lp_build_const_int32(gallivm
, start
* 4), "");
3763 emit_data
->args
[0] = data
;
3764 emit_data
->args
[3] = offset
;
3767 builder
, intrinsic_name
, emit_data
->dst_type
,
3768 emit_data
->args
, emit_data
->arg_count
, 0);
3772 static void store_emit_memory(
3773 struct si_shader_context
*ctx
,
3774 struct lp_build_emit_data
*emit_data
)
3776 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3777 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3778 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3779 LLVMBuilderRef builder
= gallivm
->builder
;
3780 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3781 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3784 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 0);
3786 for (chan
= 0; chan
< 4; ++chan
) {
3787 if (!(writemask
& (1 << chan
))) {
3790 data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 1, chan
);
3791 index
= lp_build_const_int32(gallivm
, chan
);
3792 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3793 LLVMBuildStore(builder
, data
, derived_ptr
);
3797 static void store_emit(
3798 const struct lp_build_tgsi_action
*action
,
3799 struct lp_build_tgsi_context
*bld_base
,
3800 struct lp_build_emit_data
*emit_data
)
3802 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3803 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3804 LLVMBuilderRef builder
= gallivm
->builder
;
3805 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3806 unsigned target
= inst
->Memory
.Texture
;
3807 char intrinsic_name
[64];
3809 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3810 store_emit_memory(ctx
, emit_data
);
3814 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3817 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3818 store_emit_buffer(ctx
, emit_data
);
3822 if (target
== TGSI_TEXTURE_BUFFER
) {
3823 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3824 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
3825 emit_data
->dst_type
, emit_data
->args
,
3826 emit_data
->arg_count
, 0);
3828 get_image_intr_name("llvm.amdgcn.image.store",
3829 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
3830 LLVMTypeOf(emit_data
->args
[1]), /* coords */
3831 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
3832 intrinsic_name
, sizeof(intrinsic_name
));
3834 emit_data
->output
[emit_data
->chan
] =
3836 builder
, intrinsic_name
, emit_data
->dst_type
,
3837 emit_data
->args
, emit_data
->arg_count
, 0);
3841 static void atomic_fetch_args(
3842 struct lp_build_tgsi_context
* bld_base
,
3843 struct lp_build_emit_data
* emit_data
)
3845 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3846 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3847 LLVMBuilderRef builder
= gallivm
->builder
;
3848 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3849 LLVMValueRef data1
, data2
;
3853 emit_data
->dst_type
= bld_base
->base
.elem_type
;
3855 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
3856 data1
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3858 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
3859 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
3860 data2
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3863 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
3864 * of arguments, which is reversed relative to TGSI (and GLSL)
3866 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
3867 emit_data
->args
[emit_data
->arg_count
++] = data2
;
3868 emit_data
->args
[emit_data
->arg_count
++] = data1
;
3870 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3871 LLVMValueRef offset
;
3873 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3875 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3876 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3878 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3880 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3881 unsigned target
= inst
->Memory
.Texture
;
3882 LLVMValueRef coords
;
3884 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
3885 coords
= image_fetch_coords(bld_base
, inst
, 1);
3887 if (target
== TGSI_TEXTURE_BUFFER
) {
3888 rsrc
= extract_rsrc_top_half(ctx
, rsrc
);
3889 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3890 bld_base
->uint_bld
.zero
, true);
3892 emit_data
->args
[emit_data
->arg_count
++] = coords
;
3893 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3895 image_append_args(ctx
, emit_data
, target
, true);
3900 static void atomic_emit_memory(struct si_shader_context
*ctx
,
3901 struct lp_build_emit_data
*emit_data
) {
3902 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3903 LLVMBuilderRef builder
= gallivm
->builder
;
3904 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3905 LLVMValueRef ptr
, result
, arg
;
3907 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
3909 arg
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 2, 0);
3910 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
3912 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
3913 LLVMValueRef new_data
;
3914 new_data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
,
3917 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
3919 #if HAVE_LLVM >= 0x309
3920 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
3921 LLVMAtomicOrderingSequentiallyConsistent
,
3922 LLVMAtomicOrderingSequentiallyConsistent
,
3926 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
3928 LLVMAtomicRMWBinOp op
;
3930 switch(inst
->Instruction
.Opcode
) {
3931 case TGSI_OPCODE_ATOMUADD
:
3932 op
= LLVMAtomicRMWBinOpAdd
;
3934 case TGSI_OPCODE_ATOMXCHG
:
3935 op
= LLVMAtomicRMWBinOpXchg
;
3937 case TGSI_OPCODE_ATOMAND
:
3938 op
= LLVMAtomicRMWBinOpAnd
;
3940 case TGSI_OPCODE_ATOMOR
:
3941 op
= LLVMAtomicRMWBinOpOr
;
3943 case TGSI_OPCODE_ATOMXOR
:
3944 op
= LLVMAtomicRMWBinOpXor
;
3946 case TGSI_OPCODE_ATOMUMIN
:
3947 op
= LLVMAtomicRMWBinOpUMin
;
3949 case TGSI_OPCODE_ATOMUMAX
:
3950 op
= LLVMAtomicRMWBinOpUMax
;
3952 case TGSI_OPCODE_ATOMIMIN
:
3953 op
= LLVMAtomicRMWBinOpMin
;
3955 case TGSI_OPCODE_ATOMIMAX
:
3956 op
= LLVMAtomicRMWBinOpMax
;
3959 unreachable("unknown atomic opcode");
3962 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
3963 LLVMAtomicOrderingSequentiallyConsistent
,
3966 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
3969 static void atomic_emit(
3970 const struct lp_build_tgsi_action
*action
,
3971 struct lp_build_tgsi_context
*bld_base
,
3972 struct lp_build_emit_data
*emit_data
)
3974 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3975 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3976 LLVMBuilderRef builder
= gallivm
->builder
;
3977 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3978 char intrinsic_name
[40];
3981 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3982 atomic_emit_memory(ctx
, emit_data
);
3986 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
3987 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3988 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3989 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
3991 LLVMValueRef coords
;
3992 char coords_type
[8];
3994 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
3995 coords
= emit_data
->args
[2];
3997 coords
= emit_data
->args
[1];
3999 build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4000 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4001 "llvm.amdgcn.image.atomic.%s.%s",
4002 action
->intr_name
, coords_type
);
4005 tmp
= lp_build_intrinsic(
4006 builder
, intrinsic_name
, bld_base
->uint_bld
.elem_type
,
4007 emit_data
->args
, emit_data
->arg_count
, 0);
4008 emit_data
->output
[emit_data
->chan
] =
4009 LLVMBuildBitCast(builder
, tmp
, bld_base
->base
.elem_type
, "");
4012 static void resq_fetch_args(
4013 struct lp_build_tgsi_context
* bld_base
,
4014 struct lp_build_emit_data
* emit_data
)
4016 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4017 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4018 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4019 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4021 emit_data
->dst_type
= ctx
->v4i32
;
4023 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4024 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4025 emit_data
->arg_count
= 1;
4026 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4027 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4028 &emit_data
->args
[0]);
4029 emit_data
->arg_count
= 1;
4031 emit_data
->args
[0] = bld_base
->uint_bld
.zero
; /* mip level */
4032 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4033 &emit_data
->args
[1]);
4034 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
4035 emit_data
->args
[3] = bld_base
->uint_bld
.zero
; /* unorm */
4036 emit_data
->args
[4] = bld_base
->uint_bld
.zero
; /* r128 */
4037 emit_data
->args
[5] = tgsi_is_array_image(inst
->Memory
.Texture
) ?
4038 bld_base
->uint_bld
.one
: bld_base
->uint_bld
.zero
; /* da */
4039 emit_data
->args
[6] = bld_base
->uint_bld
.zero
; /* glc */
4040 emit_data
->args
[7] = bld_base
->uint_bld
.zero
; /* slc */
4041 emit_data
->args
[8] = bld_base
->uint_bld
.zero
; /* tfe */
4042 emit_data
->args
[9] = bld_base
->uint_bld
.zero
; /* lwe */
4043 emit_data
->arg_count
= 10;
4047 static void resq_emit(
4048 const struct lp_build_tgsi_action
*action
,
4049 struct lp_build_tgsi_context
*bld_base
,
4050 struct lp_build_emit_data
*emit_data
)
4052 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4053 LLVMBuilderRef builder
= gallivm
->builder
;
4054 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4057 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4058 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4059 lp_build_const_int32(gallivm
, 2), "");
4060 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4061 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4063 out
= lp_build_intrinsic(
4064 builder
, "llvm.SI.getresinfo.i32", emit_data
->dst_type
,
4065 emit_data
->args
, emit_data
->arg_count
,
4066 LP_FUNC_ATTR_READNONE
);
4068 /* Divide the number of layers by 6 to get the number of cubes. */
4069 if (inst
->Memory
.Texture
== TGSI_TEXTURE_CUBE_ARRAY
) {
4070 LLVMValueRef imm2
= lp_build_const_int32(gallivm
, 2);
4071 LLVMValueRef imm6
= lp_build_const_int32(gallivm
, 6);
4073 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4074 z
= LLVMBuildSDiv(builder
, z
, imm6
, "");
4075 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4079 emit_data
->output
[emit_data
->chan
] = out
;
4082 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4083 struct lp_build_emit_data
*emit_data
,
4084 unsigned opcode
, unsigned target
,
4085 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4086 LLVMValueRef
*param
, unsigned count
,
4089 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4091 unsigned is_rect
= target
== TGSI_TEXTURE_RECT
;
4093 /* Pad to power of two vector */
4094 while (count
< util_next_power_of_two(count
))
4095 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4097 /* Texture coordinates. */
4099 emit_data
->args
[0] = lp_build_gather_values(gallivm
, param
, count
);
4101 emit_data
->args
[0] = param
[0];
4104 emit_data
->args
[1] = res_ptr
;
4107 if (opcode
== TGSI_OPCODE_TXF
|| opcode
== TGSI_OPCODE_TXQ
)
4108 emit_data
->dst_type
= ctx
->v4i32
;
4110 emit_data
->dst_type
= ctx
->v4f32
;
4112 emit_data
->args
[num_args
++] = samp_ptr
;
4115 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, dmask
);
4116 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, is_rect
); /* unorm */
4117 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* r128 */
4118 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
,
4119 tgsi_is_array_sampler(target
)); /* da */
4120 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* glc */
4121 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* slc */
4122 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* tfe */
4123 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* lwe */
4125 emit_data
->arg_count
= num_args
;
4128 static const struct lp_build_tgsi_action tex_action
;
4136 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
4138 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
4143 * Load an image view, fmask view. or sampler state descriptor.
4145 static LLVMValueRef
load_sampler_desc_custom(struct si_shader_context
*ctx
,
4146 LLVMValueRef list
, LLVMValueRef index
,
4147 enum desc_type type
)
4149 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4150 LLVMBuilderRef builder
= gallivm
->builder
;
4154 /* The image is at [0:7]. */
4155 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4158 /* The FMASK is at [8:15]. */
4159 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4160 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4163 /* The sampler state is at [12:15]. */
4164 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4165 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4166 list
= LLVMBuildPointerCast(builder
, list
,
4167 const_array(ctx
->v4i32
, 0), "");
4171 return build_indexed_load_const(ctx
, list
, index
);
4174 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4175 LLVMValueRef index
, enum desc_type type
)
4177 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
,
4180 return load_sampler_desc_custom(ctx
, list
, index
, type
);
4183 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4186 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4187 * filtering manually. The driver sets img7 to a mask clearing
4188 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4189 * s_and_b32 samp0, samp0, img7
4192 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4194 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4195 LLVMValueRef res
, LLVMValueRef samp
)
4197 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4198 LLVMValueRef img7
, samp0
;
4200 if (ctx
->screen
->b
.chip_class
>= VI
)
4203 img7
= LLVMBuildExtractElement(builder
, res
,
4204 LLVMConstInt(ctx
->i32
, 7, 0), "");
4205 samp0
= LLVMBuildExtractElement(builder
, samp
,
4206 LLVMConstInt(ctx
->i32
, 0, 0), "");
4207 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4208 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4209 LLVMConstInt(ctx
->i32
, 0, 0), "");
4212 static void tex_fetch_ptrs(
4213 struct lp_build_tgsi_context
*bld_base
,
4214 struct lp_build_emit_data
*emit_data
,
4215 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4217 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4218 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4219 unsigned target
= inst
->Texture
.Texture
;
4220 unsigned sampler_src
;
4221 unsigned sampler_index
;
4224 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4225 sampler_index
= emit_data
->inst
->Src
[sampler_src
].Register
.Index
;
4227 if (emit_data
->inst
->Src
[sampler_src
].Register
.Indirect
) {
4228 const struct tgsi_full_src_register
*reg
= &emit_data
->inst
->Src
[sampler_src
];
4230 index
= get_bounded_indirect_index(ctx
,
4232 reg
->Register
.Index
,
4235 index
= LLVMConstInt(ctx
->i32
, sampler_index
, 0);
4238 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_IMAGE
);
4240 if (target
== TGSI_TEXTURE_2D_MSAA
||
4241 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4245 *fmask_ptr
= load_sampler_desc(ctx
, index
, DESC_FMASK
);
4248 *samp_ptr
= load_sampler_desc(ctx
, index
, DESC_SAMPLER
);
4249 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4256 static void txq_fetch_args(
4257 struct lp_build_tgsi_context
*bld_base
,
4258 struct lp_build_emit_data
*emit_data
)
4260 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4261 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4262 LLVMBuilderRef builder
= gallivm
->builder
;
4263 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4264 unsigned target
= inst
->Texture
.Texture
;
4265 LLVMValueRef res_ptr
;
4266 LLVMValueRef address
;
4268 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4270 if (target
== TGSI_TEXTURE_BUFFER
) {
4271 /* Read the size from the buffer descriptor directly. */
4272 LLVMValueRef res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
4273 emit_data
->args
[0] = get_buffer_size(bld_base
, res
);
4277 /* Textures - set the mip level. */
4278 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4280 set_tex_fetch_args(ctx
, emit_data
, TGSI_OPCODE_TXQ
, target
, res_ptr
,
4281 NULL
, &address
, 1, 0xf);
4284 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4285 struct lp_build_tgsi_context
*bld_base
,
4286 struct lp_build_emit_data
*emit_data
)
4288 struct lp_build_context
*base
= &bld_base
->base
;
4289 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4291 if (target
== TGSI_TEXTURE_BUFFER
) {
4292 /* Just return the buffer size. */
4293 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4297 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4298 base
->gallivm
->builder
, "llvm.SI.getresinfo.i32",
4299 emit_data
->dst_type
, emit_data
->args
, emit_data
->arg_count
,
4300 LP_FUNC_ATTR_READNONE
);
4302 /* Divide the number of layers by 6 to get the number of cubes. */
4303 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4304 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4305 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
4306 LLVMValueRef two
= lp_build_const_int32(bld_base
->base
.gallivm
, 2);
4307 LLVMValueRef six
= lp_build_const_int32(bld_base
->base
.gallivm
, 6);
4309 LLVMValueRef v4
= emit_data
->output
[emit_data
->chan
];
4310 LLVMValueRef z
= LLVMBuildExtractElement(builder
, v4
, two
, "");
4311 z
= LLVMBuildSDiv(builder
, z
, six
, "");
4313 emit_data
->output
[emit_data
->chan
] =
4314 LLVMBuildInsertElement(builder
, v4
, z
, two
, "");
4318 static void tex_fetch_args(
4319 struct lp_build_tgsi_context
*bld_base
,
4320 struct lp_build_emit_data
*emit_data
)
4322 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4323 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4324 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4325 unsigned opcode
= inst
->Instruction
.Opcode
;
4326 unsigned target
= inst
->Texture
.Texture
;
4327 LLVMValueRef coords
[5], derivs
[6];
4328 LLVMValueRef address
[16];
4329 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4330 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4333 unsigned num_deriv_channels
= 0;
4334 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4335 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4336 unsigned dmask
= 0xf;
4338 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4340 if (target
== TGSI_TEXTURE_BUFFER
) {
4341 LLVMTypeRef v2i128
= LLVMVectorType(ctx
->i128
, 2);
4343 /* Bitcast and truncate v8i32 to v16i8. */
4344 LLVMValueRef res
= res_ptr
;
4345 res
= LLVMBuildBitCast(gallivm
->builder
, res
, v2i128
, "");
4346 res
= LLVMBuildExtractElement(gallivm
->builder
, res
, bld_base
->uint_bld
.one
, "");
4347 res
= LLVMBuildBitCast(gallivm
->builder
, res
, ctx
->v16i8
, "");
4349 emit_data
->dst_type
= ctx
->v4f32
;
4350 emit_data
->args
[0] = res
;
4351 emit_data
->args
[1] = bld_base
->uint_bld
.zero
;
4352 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4353 emit_data
->arg_count
= 3;
4357 /* Fetch and project texture coordinates */
4358 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4359 for (chan
= 0; chan
< 3; chan
++ ) {
4360 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4363 if (opcode
== TGSI_OPCODE_TXP
)
4364 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4370 if (opcode
== TGSI_OPCODE_TXP
)
4371 coords
[3] = bld_base
->base
.one
;
4374 if (has_offset
&& opcode
!= TGSI_OPCODE_TXF
) {
4375 /* The offsets are six-bit signed integers packed like this:
4376 * X=[5:0], Y=[13:8], and Z=[21:16].
4378 LLVMValueRef offset
[3], pack
;
4380 assert(inst
->Texture
.NumOffsets
== 1);
4382 for (chan
= 0; chan
< 3; chan
++) {
4383 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4384 emit_data
->inst
, 0, chan
);
4385 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4386 lp_build_const_int32(gallivm
, 0x3f), "");
4388 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4389 lp_build_const_int32(gallivm
, chan
*8), "");
4392 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4393 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4394 address
[count
++] = pack
;
4397 /* Pack LOD bias value */
4398 if (opcode
== TGSI_OPCODE_TXB
)
4399 address
[count
++] = coords
[3];
4400 if (opcode
== TGSI_OPCODE_TXB2
)
4401 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4403 /* Pack depth comparison value */
4404 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4407 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4408 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4410 assert(ref_pos
>= 0);
4411 z
= coords
[ref_pos
];
4414 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4415 * so the depth comparison value isn't clamped for Z16 and
4416 * Z24 anymore. Do it manually here.
4418 * It's unnecessary if the original texture format was
4419 * Z32_FLOAT, but we don't know that here.
4421 if (ctx
->screen
->b
.chip_class
== VI
)
4422 z
= si_llvm_saturate(bld_base
, z
);
4424 address
[count
++] = z
;
4427 /* Pack user derivatives */
4428 if (opcode
== TGSI_OPCODE_TXD
) {
4429 int param
, num_src_deriv_channels
;
4432 case TGSI_TEXTURE_3D
:
4433 num_src_deriv_channels
= 3;
4434 num_deriv_channels
= 3;
4436 case TGSI_TEXTURE_2D
:
4437 case TGSI_TEXTURE_SHADOW2D
:
4438 case TGSI_TEXTURE_RECT
:
4439 case TGSI_TEXTURE_SHADOWRECT
:
4440 case TGSI_TEXTURE_2D_ARRAY
:
4441 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4442 num_src_deriv_channels
= 2;
4443 num_deriv_channels
= 2;
4445 case TGSI_TEXTURE_CUBE
:
4446 case TGSI_TEXTURE_SHADOWCUBE
:
4447 case TGSI_TEXTURE_CUBE_ARRAY
:
4448 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4449 /* Cube derivatives will be converted to 2D. */
4450 num_src_deriv_channels
= 3;
4451 num_deriv_channels
= 2;
4453 case TGSI_TEXTURE_1D
:
4454 case TGSI_TEXTURE_SHADOW1D
:
4455 case TGSI_TEXTURE_1D_ARRAY
:
4456 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4457 num_src_deriv_channels
= 1;
4458 num_deriv_channels
= 1;
4461 unreachable("invalid target");
4464 for (param
= 0; param
< 2; param
++)
4465 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4466 derivs
[param
* num_src_deriv_channels
+ chan
] =
4467 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4470 if (target
== TGSI_TEXTURE_CUBE
||
4471 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4472 target
== TGSI_TEXTURE_SHADOWCUBE
||
4473 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4474 si_prepare_cube_coords(bld_base
, emit_data
, coords
, derivs
);
4476 if (opcode
== TGSI_OPCODE_TXD
)
4477 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4478 address
[count
++] = derivs
[i
];
4480 /* Pack texture coordinates */
4481 address
[count
++] = coords
[0];
4483 address
[count
++] = coords
[1];
4485 address
[count
++] = coords
[2];
4487 /* Pack LOD or sample index */
4488 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4489 address
[count
++] = coords
[3];
4490 else if (opcode
== TGSI_OPCODE_TXL2
)
4491 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4494 assert(!"Cannot handle more than 16 texture address parameters");
4498 for (chan
= 0; chan
< count
; chan
++ ) {
4499 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4500 address
[chan
], ctx
->i32
, "");
4503 /* Adjust the sample index according to FMASK.
4505 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4506 * which is the identity mapping. Each nibble says which physical sample
4507 * should be fetched to get that sample.
4509 * For example, 0x11111100 means there are only 2 samples stored and
4510 * the second sample covers 3/4 of the pixel. When reading samples 0
4511 * and 1, return physical sample 0 (determined by the first two 0s
4512 * in FMASK), otherwise return physical sample 1.
4514 * The sample index should be adjusted as follows:
4515 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4517 if (target
== TGSI_TEXTURE_2D_MSAA
||
4518 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4519 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4520 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4521 LLVMValueRef txf_address
[4];
4522 unsigned txf_count
= count
;
4523 struct tgsi_full_instruction inst
= {};
4525 memcpy(txf_address
, address
, sizeof(txf_address
));
4527 if (target
== TGSI_TEXTURE_2D_MSAA
) {
4528 txf_address
[2] = bld_base
->uint_bld
.zero
;
4530 txf_address
[3] = bld_base
->uint_bld
.zero
;
4532 /* Read FMASK using TXF. */
4533 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF
;
4534 inst
.Texture
.Texture
= target
;
4535 txf_emit_data
.inst
= &inst
;
4536 txf_emit_data
.chan
= 0;
4537 set_tex_fetch_args(ctx
, &txf_emit_data
, TGSI_OPCODE_TXF
,
4538 target
, fmask_ptr
, NULL
,
4539 txf_address
, txf_count
, 0xf);
4540 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4542 /* Initialize some constants. */
4543 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4544 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4546 /* Apply the formula. */
4547 LLVMValueRef fmask
=
4548 LLVMBuildExtractElement(gallivm
->builder
,
4549 txf_emit_data
.output
[0],
4550 uint_bld
->zero
, "");
4552 unsigned sample_chan
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4554 LLVMValueRef sample_index4
=
4555 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4557 LLVMValueRef shifted_fmask
=
4558 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4560 LLVMValueRef final_sample
=
4561 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4563 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4564 * resource descriptor is 0 (invalid),
4566 LLVMValueRef fmask_desc
=
4567 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4570 LLVMValueRef fmask_word1
=
4571 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4574 LLVMValueRef word1_is_nonzero
=
4575 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4576 fmask_word1
, uint_bld
->zero
, "");
4578 /* Replace the MSAA sample index. */
4579 address
[sample_chan
] =
4580 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4581 final_sample
, address
[sample_chan
], "");
4584 if (opcode
== TGSI_OPCODE_TXF
) {
4585 /* add tex offsets */
4586 if (inst
->Texture
.NumOffsets
) {
4587 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4588 struct lp_build_tgsi_soa_context
*bld
= lp_soa_context(bld_base
);
4589 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4591 assert(inst
->Texture
.NumOffsets
== 1);
4594 case TGSI_TEXTURE_3D
:
4595 address
[2] = lp_build_add(uint_bld
, address
[2],
4596 bld
->immediates
[off
->Index
][off
->SwizzleZ
]);
4598 case TGSI_TEXTURE_2D
:
4599 case TGSI_TEXTURE_SHADOW2D
:
4600 case TGSI_TEXTURE_RECT
:
4601 case TGSI_TEXTURE_SHADOWRECT
:
4602 case TGSI_TEXTURE_2D_ARRAY
:
4603 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4605 lp_build_add(uint_bld
, address
[1],
4606 bld
->immediates
[off
->Index
][off
->SwizzleY
]);
4608 case TGSI_TEXTURE_1D
:
4609 case TGSI_TEXTURE_SHADOW1D
:
4610 case TGSI_TEXTURE_1D_ARRAY
:
4611 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4613 lp_build_add(uint_bld
, address
[0],
4614 bld
->immediates
[off
->Index
][off
->SwizzleX
]);
4616 /* texture offsets do not apply to other texture targets */
4621 if (opcode
== TGSI_OPCODE_TG4
) {
4622 unsigned gather_comp
= 0;
4624 /* DMASK was repurposed for GATHER4. 4 components are always
4625 * returned and DMASK works like a swizzle - it selects
4626 * the component to fetch. The only valid DMASK values are
4627 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4628 * (red,red,red,red) etc.) The ISA document doesn't mention
4632 /* Get the component index from src1.x for Gather4. */
4633 if (!tgsi_is_shadow_target(target
)) {
4634 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
4635 LLVMValueRef comp_imm
;
4636 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4638 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4640 comp_imm
= imms
[src1
.Index
][src1
.SwizzleX
];
4641 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4642 gather_comp
= CLAMP(gather_comp
, 0, 3);
4645 dmask
= 1 << gather_comp
;
4648 set_tex_fetch_args(ctx
, emit_data
, opcode
, target
, res_ptr
,
4649 samp_ptr
, address
, count
, dmask
);
4652 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4653 * incorrectly forces nearest filtering if the texture format is integer.
4654 * The only effect it has on Gather4, which always returns 4 texels for
4655 * bilinear filtering, is that the final coordinates are off by 0.5 of
4658 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4659 * or (0.5 / size) from the normalized coordinates.
4661 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4662 struct lp_build_emit_data
*emit_data
,
4663 const char *intr_name
,
4664 unsigned coord_vgpr_index
)
4666 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4667 LLVMValueRef coord
= emit_data
->args
[0];
4668 LLVMValueRef half_texel
[2];
4671 if (emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
||
4672 emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWRECT
) {
4673 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4675 struct tgsi_full_instruction txq_inst
= {};
4676 struct lp_build_emit_data txq_emit_data
= {};
4678 /* Query the texture size. */
4679 txq_inst
.Texture
.Texture
= emit_data
->inst
->Texture
.Texture
;
4680 txq_emit_data
.inst
= &txq_inst
;
4681 txq_emit_data
.dst_type
= ctx
->v4i32
;
4682 set_tex_fetch_args(ctx
, &txq_emit_data
, TGSI_OPCODE_TXQ
,
4683 txq_inst
.Texture
.Texture
,
4684 emit_data
->args
[1], NULL
,
4685 &ctx
->soa
.bld_base
.uint_bld
.zero
,
4687 txq_emit(NULL
, &ctx
->soa
.bld_base
, &txq_emit_data
);
4689 /* Compute -0.5 / size. */
4690 for (c
= 0; c
< 2; c
++) {
4692 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4693 LLVMConstInt(ctx
->i32
, c
, 0), "");
4694 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4696 lp_build_emit_llvm_unary(&ctx
->soa
.bld_base
,
4697 TGSI_OPCODE_RCP
, half_texel
[c
]);
4698 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4699 LLVMConstReal(ctx
->f32
, -0.5), "");
4703 for (c
= 0; c
< 2; c
++) {
4705 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4707 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4708 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4709 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4710 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4711 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4714 emit_data
->args
[0] = coord
;
4715 emit_data
->output
[emit_data
->chan
] =
4716 lp_build_intrinsic(builder
, intr_name
, emit_data
->dst_type
,
4717 emit_data
->args
, emit_data
->arg_count
,
4718 LP_FUNC_ATTR_READNONE
);
4721 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4722 struct lp_build_tgsi_context
*bld_base
,
4723 struct lp_build_emit_data
*emit_data
)
4725 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4726 struct lp_build_context
*base
= &bld_base
->base
;
4727 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4728 unsigned opcode
= inst
->Instruction
.Opcode
;
4729 unsigned target
= inst
->Texture
.Texture
;
4730 char intr_name
[127];
4731 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4732 bool is_shadow
= tgsi_is_shadow_target(target
);
4734 const char *name
= "llvm.SI.image.sample";
4735 const char *infix
= "";
4737 if (target
== TGSI_TEXTURE_BUFFER
) {
4738 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4739 base
->gallivm
->builder
,
4740 "llvm.SI.vs.load.input", emit_data
->dst_type
,
4741 emit_data
->args
, emit_data
->arg_count
,
4742 LP_FUNC_ATTR_READNONE
);
4747 case TGSI_OPCODE_TXF
:
4748 name
= target
== TGSI_TEXTURE_2D_MSAA
||
4749 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4750 "llvm.SI.image.load" :
4751 "llvm.SI.image.load.mip";
4755 case TGSI_OPCODE_LODQ
:
4756 name
= "llvm.SI.getlod";
4760 case TGSI_OPCODE_TEX
:
4761 case TGSI_OPCODE_TEX2
:
4762 case TGSI_OPCODE_TXP
:
4763 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4766 case TGSI_OPCODE_TXB
:
4767 case TGSI_OPCODE_TXB2
:
4768 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4771 case TGSI_OPCODE_TXL
:
4772 case TGSI_OPCODE_TXL2
:
4775 case TGSI_OPCODE_TXD
:
4778 case TGSI_OPCODE_TG4
:
4779 name
= "llvm.SI.gather4";
4787 /* Add the type and suffixes .c, .o if needed. */
4788 build_type_name_for_intr(LLVMTypeOf(emit_data
->args
[0]), type
, sizeof(type
));
4789 sprintf(intr_name
, "%s%s%s%s.%s",
4790 name
, is_shadow
? ".c" : "", infix
,
4791 has_offset
? ".o" : "", type
);
4793 /* The hardware needs special lowering for Gather4 with integer formats. */
4794 if (opcode
== TGSI_OPCODE_TG4
) {
4795 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4796 /* This will also work with non-constant indexing because of how
4797 * glsl_to_tgsi works and we intent to preserve that behavior.
4799 const unsigned src_idx
= 2;
4800 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4802 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4804 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4805 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
) {
4806 /* Texture coordinates start after:
4807 * {offset, bias, z-compare, derivatives}
4808 * Only the offset and z-compare can occur here.
4810 si_lower_gather4_integer(ctx
, emit_data
, intr_name
,
4811 (int)has_offset
+ (int)is_shadow
);
4816 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4817 base
->gallivm
->builder
, intr_name
, emit_data
->dst_type
,
4818 emit_data
->args
, emit_data
->arg_count
,
4819 LP_FUNC_ATTR_READNONE
);
4822 static void si_llvm_emit_txqs(
4823 const struct lp_build_tgsi_action
*action
,
4824 struct lp_build_tgsi_context
*bld_base
,
4825 struct lp_build_emit_data
*emit_data
)
4827 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4828 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4829 LLVMBuilderRef builder
= gallivm
->builder
;
4830 LLVMValueRef res
, samples
;
4831 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4833 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4836 /* Read the samples from the descriptor directly. */
4837 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
4838 samples
= LLVMBuildExtractElement(
4840 lp_build_const_int32(gallivm
, 3), "");
4841 samples
= LLVMBuildLShr(builder
, samples
,
4842 lp_build_const_int32(gallivm
, 16), "");
4843 samples
= LLVMBuildAnd(builder
, samples
,
4844 lp_build_const_int32(gallivm
, 0xf), "");
4845 samples
= LLVMBuildShl(builder
, lp_build_const_int32(gallivm
, 1),
4848 emit_data
->output
[emit_data
->chan
] = samples
;
4852 * SI implements derivatives using the local data store (LDS)
4853 * All writes to the LDS happen in all executing threads at
4854 * the same time. TID is the Thread ID for the current
4855 * thread and is a value between 0 and 63, representing
4856 * the thread's position in the wavefront.
4858 * For the pixel shader threads are grouped into quads of four pixels.
4859 * The TIDs of the pixels of a quad are:
4867 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
4868 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
4869 * the current pixel's column, and masking with 0xfffffffe yields the TID
4870 * of the left pixel of the current pixel's row.
4872 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
4873 * adding 2 yields the TID of the pixel below the top pixel.
4875 /* masks for thread ID. */
4876 #define TID_MASK_TOP_LEFT 0xfffffffc
4877 #define TID_MASK_TOP 0xfffffffd
4878 #define TID_MASK_LEFT 0xfffffffe
4880 static void si_llvm_emit_ddxy(
4881 const struct lp_build_tgsi_action
*action
,
4882 struct lp_build_tgsi_context
*bld_base
,
4883 struct lp_build_emit_data
*emit_data
)
4885 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4886 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4887 unsigned opcode
= emit_data
->info
->opcode
;
4888 LLVMValueRef thread_id
, tl
, trbl
, tl_tid
, trbl_tid
, val
, args
[2];
4892 thread_id
= get_thread_id(ctx
);
4894 if (opcode
== TGSI_OPCODE_DDX_FINE
)
4895 mask
= TID_MASK_LEFT
;
4896 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
4897 mask
= TID_MASK_TOP
;
4899 mask
= TID_MASK_TOP_LEFT
;
4901 tl_tid
= LLVMBuildAnd(gallivm
->builder
, thread_id
,
4902 lp_build_const_int32(gallivm
, mask
), "");
4904 /* for DDX we want to next X pixel, DDY next Y pixel. */
4905 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
4906 trbl_tid
= LLVMBuildAdd(gallivm
->builder
, tl_tid
,
4907 lp_build_const_int32(gallivm
, idx
), "");
4909 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
4911 if (ctx
->screen
->has_ds_bpermute
) {
4912 args
[0] = LLVMBuildMul(gallivm
->builder
, tl_tid
,
4913 lp_build_const_int32(gallivm
, 4), "");
4915 tl
= lp_build_intrinsic(gallivm
->builder
,
4916 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
4917 args
, 2, LP_FUNC_ATTR_READNONE
);
4919 args
[0] = LLVMBuildMul(gallivm
->builder
, trbl_tid
,
4920 lp_build_const_int32(gallivm
, 4), "");
4921 trbl
= lp_build_intrinsic(gallivm
->builder
,
4922 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
4923 args
, 2, LP_FUNC_ATTR_READNONE
);
4925 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
4927 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
4928 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
4929 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
4931 LLVMBuildStore(gallivm
->builder
, val
, store_ptr
);
4932 tl
= LLVMBuildLoad(gallivm
->builder
, load_ptr0
, "");
4933 trbl
= LLVMBuildLoad(gallivm
->builder
, load_ptr1
, "");
4936 tl
= LLVMBuildBitCast(gallivm
->builder
, tl
, ctx
->f32
, "");
4937 trbl
= LLVMBuildBitCast(gallivm
->builder
, trbl
, ctx
->f32
, "");
4939 emit_data
->output
[emit_data
->chan
] =
4940 LLVMBuildFSub(gallivm
->builder
, trbl
, tl
, "");
4944 * this takes an I,J coordinate pair,
4945 * and works out the X and Y derivatives.
4946 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
4948 static LLVMValueRef
si_llvm_emit_ddxy_interp(
4949 struct lp_build_tgsi_context
*bld_base
,
4950 LLVMValueRef interp_ij
)
4952 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4953 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4954 LLVMValueRef result
[4], a
;
4957 for (i
= 0; i
< 2; i
++) {
4958 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
4959 LLVMConstInt(ctx
->i32
, i
, 0), "");
4960 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
4961 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
4964 return lp_build_gather_values(gallivm
, result
, 4);
4967 static void interp_fetch_args(
4968 struct lp_build_tgsi_context
*bld_base
,
4969 struct lp_build_emit_data
*emit_data
)
4971 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4972 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4973 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4975 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4976 /* offset is in second src, first two channels */
4977 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4980 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4983 emit_data
->arg_count
= 2;
4984 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4985 LLVMValueRef sample_position
;
4986 LLVMValueRef sample_id
;
4987 LLVMValueRef halfval
= lp_build_const_float(gallivm
, 0.5f
);
4989 /* fetch sample ID, then fetch its sample position,
4990 * and place into first two channels.
4992 sample_id
= lp_build_emit_fetch(bld_base
,
4993 emit_data
->inst
, 1, TGSI_CHAN_X
);
4994 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
4996 sample_position
= load_sample_position(ctx
, sample_id
);
4998 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5000 lp_build_const_int32(gallivm
, 0), "");
5002 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5003 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5005 lp_build_const_int32(gallivm
, 1), "");
5006 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5007 emit_data
->arg_count
= 2;
5011 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5012 struct lp_build_tgsi_context
*bld_base
,
5013 struct lp_build_emit_data
*emit_data
)
5015 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5016 struct si_shader
*shader
= ctx
->shader
;
5017 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5018 LLVMValueRef interp_param
;
5019 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5020 const char *intr_name
;
5021 int input_index
= inst
->Src
[0].Register
.Index
;
5024 LLVMValueRef attr_number
;
5025 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5026 int interp_param_idx
;
5027 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5030 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5032 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5033 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5034 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5036 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5038 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5039 if (interp_param_idx
== -1)
5041 else if (interp_param_idx
)
5042 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5044 interp_param
= NULL
;
5046 attr_number
= lp_build_const_int32(gallivm
, input_index
);
5048 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5049 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5050 LLVMValueRef ij_out
[2];
5051 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5054 * take the I then J parameters, and the DDX/Y for it, and
5055 * calculate the IJ inputs for the interpolator.
5056 * temp1 = ddx * offset/sample.x + I;
5057 * interp_param.I = ddy * offset/sample.y + temp1;
5058 * temp1 = ddx * offset/sample.x + J;
5059 * interp_param.J = ddy * offset/sample.y + temp1;
5061 for (i
= 0; i
< 2; i
++) {
5062 LLVMValueRef ix_ll
= lp_build_const_int32(gallivm
, i
);
5063 LLVMValueRef iy_ll
= lp_build_const_int32(gallivm
, i
+ 2);
5064 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5065 ddxy_out
, ix_ll
, "");
5066 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5067 ddxy_out
, iy_ll
, "");
5068 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5069 interp_param
, ix_ll
, "");
5070 LLVMValueRef temp1
, temp2
;
5072 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5075 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5077 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5079 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5081 temp2
= LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5083 ij_out
[i
] = LLVMBuildBitCast(gallivm
->builder
,
5084 temp2
, ctx
->i32
, "");
5086 interp_param
= lp_build_gather_values(bld_base
->base
.gallivm
, ij_out
, 2);
5089 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
5090 for (chan
= 0; chan
< 4; chan
++) {
5091 LLVMValueRef args
[4];
5092 LLVMValueRef llvm_chan
;
5095 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5096 llvm_chan
= lp_build_const_int32(gallivm
, schan
);
5098 args
[0] = llvm_chan
;
5099 args
[1] = attr_number
;
5101 args
[3] = interp_param
;
5103 emit_data
->output
[chan
] =
5104 lp_build_intrinsic(gallivm
->builder
, intr_name
,
5105 ctx
->f32
, args
, args
[3] ? 4 : 3,
5106 LP_FUNC_ATTR_READNONE
);
5110 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5111 struct lp_build_emit_data
*emit_data
)
5113 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
5114 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5117 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5119 stream
= LLVMConstIntGetZExtValue(imms
[src0
.Index
][src0
.SwizzleX
]) & 0x3;
5123 /* Emit one vertex from the geometry shader */
5124 static void si_llvm_emit_vertex(
5125 const struct lp_build_tgsi_action
*action
,
5126 struct lp_build_tgsi_context
*bld_base
,
5127 struct lp_build_emit_data
*emit_data
)
5129 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5130 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5131 struct si_shader
*shader
= ctx
->shader
;
5132 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5133 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5134 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5135 SI_PARAM_GS2VS_OFFSET
);
5136 LLVMValueRef gs_next_vertex
;
5137 LLVMValueRef can_emit
, kill
;
5138 LLVMValueRef args
[2];
5143 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5145 /* Write vertex attribute values to GSVS ring */
5146 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5147 ctx
->gs_next_vertex
[stream
],
5150 /* If this thread has already emitted the declared maximum number of
5151 * vertices, kill it: excessive vertex emissions are not supposed to
5152 * have any effect, and GS threads have no externally observable
5153 * effects other than emitting vertices.
5155 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULE
, gs_next_vertex
,
5156 lp_build_const_int32(gallivm
,
5157 shader
->selector
->gs_max_out_vertices
), "");
5158 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5159 lp_build_const_float(gallivm
, 1.0f
),
5160 lp_build_const_float(gallivm
, -1.0f
));
5162 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
5163 ctx
->voidt
, &kill
, 1, 0);
5165 for (i
= 0; i
< info
->num_outputs
; i
++) {
5166 LLVMValueRef
*out_ptr
=
5167 ctx
->soa
.outputs
[i
];
5169 for (chan
= 0; chan
< 4; chan
++) {
5170 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5171 LLVMValueRef voffset
=
5172 lp_build_const_int32(gallivm
, (i
* 4 + chan
) *
5173 shader
->selector
->gs_max_out_vertices
);
5175 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5176 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5178 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5180 build_tbuffer_store(ctx
,
5181 ctx
->gsvs_ring
[stream
],
5183 voffset
, soffset
, 0,
5184 V_008F0C_BUF_DATA_FORMAT_32
,
5185 V_008F0C_BUF_NUM_FORMAT_UINT
,
5189 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5190 lp_build_const_int32(gallivm
, 1));
5192 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5194 /* Signal vertex emission */
5195 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (stream
<< 8));
5196 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5197 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5198 ctx
->voidt
, args
, 2, 0);
5201 /* Cut one primitive from the geometry shader */
5202 static void si_llvm_emit_primitive(
5203 const struct lp_build_tgsi_action
*action
,
5204 struct lp_build_tgsi_context
*bld_base
,
5205 struct lp_build_emit_data
*emit_data
)
5207 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5208 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5209 LLVMValueRef args
[2];
5212 /* Signal primitive cut */
5213 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5214 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (stream
<< 8));
5215 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5216 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5217 ctx
->voidt
, args
, 2, 0);
5220 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5221 struct lp_build_tgsi_context
*bld_base
,
5222 struct lp_build_emit_data
*emit_data
)
5224 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5225 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5227 /* The real barrier instruction isn’t needed, because an entire patch
5228 * always fits into a single wave.
5230 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5231 emit_optimization_barrier(ctx
);
5235 lp_build_intrinsic(gallivm
->builder
,
5236 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5237 : "llvm.AMDGPU.barrier.local",
5238 ctx
->voidt
, NULL
, 0, 0);
5241 static const struct lp_build_tgsi_action tex_action
= {
5242 .fetch_args
= tex_fetch_args
,
5243 .emit
= build_tex_intrinsic
,
5246 static const struct lp_build_tgsi_action interp_action
= {
5247 .fetch_args
= interp_fetch_args
,
5248 .emit
= build_interp_intrinsic
,
5251 static void si_create_function(struct si_shader_context
*ctx
,
5253 LLVMTypeRef
*returns
, unsigned num_returns
,
5254 LLVMTypeRef
*params
, unsigned num_params
,
5259 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5260 params
, num_params
);
5261 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5262 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5264 for (i
= 0; i
<= last_sgpr
; ++i
) {
5265 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5267 /* The combination of:
5271 * allows the optimization passes to move loads and reduces
5272 * SGPR spilling significantly.
5274 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5275 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5276 lp_add_attr_dereferenceable(P
, UINT64_MAX
);
5278 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5281 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5282 /* These were copied from some LLVM test. */
5283 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5284 "less-precise-fpmad",
5286 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5289 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5292 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5298 static void create_meta_data(struct si_shader_context
*ctx
)
5300 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
5302 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5303 "invariant.load", 14);
5304 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5306 ctx
->uniform_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5307 "amdgpu.uniform", 14);
5309 ctx
->empty_md
= LLVMMDNodeInContext(gallivm
->context
, NULL
, 0);
5312 static void declare_streamout_params(struct si_shader_context
*ctx
,
5313 struct pipe_stream_output_info
*so
,
5314 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5315 unsigned *num_params
)
5319 /* Streamout SGPRs. */
5320 if (so
->num_outputs
) {
5321 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5322 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5324 ctx
->param_streamout_config
= ctx
->param_tess_offchip
;
5326 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5328 /* A streamout buffer offset is loaded if the stride is non-zero. */
5329 for (i
= 0; i
< 4; i
++) {
5333 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5337 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5339 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5342 case LLVMIntegerTypeKind
:
5343 return LLVMGetIntTypeWidth(type
) / 8;
5344 case LLVMFloatTypeKind
:
5346 case LLVMPointerTypeKind
:
5348 case LLVMVectorTypeKind
:
5349 return LLVMGetVectorSize(type
) *
5350 llvm_get_type_size(LLVMGetElementType(type
));
5357 static void declare_tess_lds(struct si_shader_context
*ctx
)
5359 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5360 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5361 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5363 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5364 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, uint
->zero
,
5365 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5369 static void create_function(struct si_shader_context
*ctx
)
5371 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5372 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5373 struct si_shader
*shader
= ctx
->shader
;
5374 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_NUM_VERTEX_BUFFERS
], v3i32
;
5375 LLVMTypeRef returns
[16+32*4];
5376 unsigned i
, last_sgpr
, num_params
, num_return_sgprs
;
5377 unsigned num_returns
= 0;
5378 unsigned num_prolog_vgprs
= 0;
5380 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5382 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5383 params
[SI_PARAM_CONST_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5384 params
[SI_PARAM_SAMPLERS
] = const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5385 params
[SI_PARAM_IMAGES
] = const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5386 params
[SI_PARAM_SHADER_BUFFERS
] = const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5388 switch (ctx
->type
) {
5389 case PIPE_SHADER_VERTEX
:
5390 params
[SI_PARAM_VERTEX_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_VERTEX_BUFFERS
);
5391 params
[SI_PARAM_BASE_VERTEX
] = ctx
->i32
;
5392 params
[SI_PARAM_START_INSTANCE
] = ctx
->i32
;
5393 params
[SI_PARAM_DRAWID
] = ctx
->i32
;
5394 num_params
= SI_PARAM_DRAWID
+1;
5396 if (shader
->key
.as_es
) {
5397 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5398 } else if (shader
->key
.as_ls
) {
5399 params
[SI_PARAM_LS_OUT_LAYOUT
] = ctx
->i32
;
5400 num_params
= SI_PARAM_LS_OUT_LAYOUT
+1;
5402 if (shader
->is_gs_copy_shader
) {
5403 num_params
= SI_PARAM_RW_BUFFERS
+1;
5405 params
[SI_PARAM_VS_STATE_BITS
] = ctx
->i32
;
5406 num_params
= SI_PARAM_VS_STATE_BITS
+1;
5409 /* The locations of the other parameters are assigned dynamically. */
5410 declare_streamout_params(ctx
, &shader
->selector
->so
,
5411 params
, ctx
->i32
, &num_params
);
5414 last_sgpr
= num_params
-1;
5417 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5418 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5419 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5420 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5422 if (!shader
->is_gs_copy_shader
) {
5423 /* Vertex load indices. */
5424 ctx
->param_vertex_index0
= num_params
;
5426 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5427 params
[num_params
++] = ctx
->i32
;
5429 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5431 /* PrimitiveID output. */
5432 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5433 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5434 returns
[num_returns
++] = ctx
->f32
;
5438 case PIPE_SHADER_TESS_CTRL
:
5439 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5440 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
5441 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
5442 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
5443 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
5444 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
5445 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
5448 params
[SI_PARAM_PATCH_ID
] = ctx
->i32
;
5449 params
[SI_PARAM_REL_IDS
] = ctx
->i32
;
5450 num_params
= SI_PARAM_REL_IDS
+1;
5452 /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are
5453 * placed after the user SGPRs.
5455 for (i
= 0; i
< SI_TCS_NUM_USER_SGPR
+ 2; i
++)
5456 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5458 for (i
= 0; i
< 3; i
++)
5459 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5462 case PIPE_SHADER_TESS_EVAL
:
5463 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5464 num_params
= SI_PARAM_TCS_OFFCHIP_LAYOUT
+1;
5466 if (shader
->key
.as_es
) {
5467 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5468 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5469 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5471 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5472 declare_streamout_params(ctx
, &shader
->selector
->so
,
5473 params
, ctx
->i32
, &num_params
);
5474 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5476 last_sgpr
= num_params
- 1;
5479 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5480 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5481 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5482 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5484 /* PrimitiveID output. */
5485 if (!shader
->key
.as_es
)
5486 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5487 returns
[num_returns
++] = ctx
->f32
;
5490 case PIPE_SHADER_GEOMETRY
:
5491 params
[SI_PARAM_GS2VS_OFFSET
] = ctx
->i32
;
5492 params
[SI_PARAM_GS_WAVE_ID
] = ctx
->i32
;
5493 last_sgpr
= SI_PARAM_GS_WAVE_ID
;
5496 params
[SI_PARAM_VTX0_OFFSET
] = ctx
->i32
;
5497 params
[SI_PARAM_VTX1_OFFSET
] = ctx
->i32
;
5498 params
[SI_PARAM_PRIMITIVE_ID
] = ctx
->i32
;
5499 params
[SI_PARAM_VTX2_OFFSET
] = ctx
->i32
;
5500 params
[SI_PARAM_VTX3_OFFSET
] = ctx
->i32
;
5501 params
[SI_PARAM_VTX4_OFFSET
] = ctx
->i32
;
5502 params
[SI_PARAM_VTX5_OFFSET
] = ctx
->i32
;
5503 params
[SI_PARAM_GS_INSTANCE_ID
] = ctx
->i32
;
5504 num_params
= SI_PARAM_GS_INSTANCE_ID
+1;
5507 case PIPE_SHADER_FRAGMENT
:
5508 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5509 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5510 last_sgpr
= SI_PARAM_PRIM_MASK
;
5511 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5512 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5513 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5514 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5515 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5516 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5517 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5518 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5519 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5520 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5521 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5522 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5523 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5524 shader
->info
.face_vgpr_index
= 20;
5525 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5526 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5527 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5528 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5530 /* Color inputs from the prolog. */
5531 if (shader
->selector
->info
.colors_read
) {
5532 unsigned num_color_elements
=
5533 util_bitcount(shader
->selector
->info
.colors_read
);
5535 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5536 for (i
= 0; i
< num_color_elements
; i
++)
5537 params
[num_params
++] = ctx
->f32
;
5539 num_prolog_vgprs
+= num_color_elements
;
5542 /* Outputs for the epilog. */
5543 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5546 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5547 shader
->selector
->info
.writes_z
+
5548 shader
->selector
->info
.writes_stencil
+
5549 shader
->selector
->info
.writes_samplemask
+
5550 1 /* SampleMaskIn */;
5552 num_returns
= MAX2(num_returns
,
5554 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5556 for (i
= 0; i
< num_return_sgprs
; i
++)
5557 returns
[i
] = ctx
->i32
;
5558 for (; i
< num_returns
; i
++)
5559 returns
[i
] = ctx
->f32
;
5562 case PIPE_SHADER_COMPUTE
:
5563 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5564 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5565 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5566 last_sgpr
= SI_PARAM_BLOCK_ID
;
5568 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5569 num_params
= SI_PARAM_THREAD_ID
+ 1;
5572 assert(0 && "unimplemented shader");
5576 assert(num_params
<= ARRAY_SIZE(params
));
5578 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5579 num_params
, last_sgpr
);
5581 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5582 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5583 ctx
->separate_prolog
) {
5584 si_llvm_add_attribute(ctx
->main_fn
,
5585 "InitialPSInputAddr",
5586 S_0286D0_PERSP_SAMPLE_ENA(1) |
5587 S_0286D0_PERSP_CENTER_ENA(1) |
5588 S_0286D0_PERSP_CENTROID_ENA(1) |
5589 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5590 S_0286D0_LINEAR_CENTER_ENA(1) |
5591 S_0286D0_LINEAR_CENTROID_ENA(1) |
5592 S_0286D0_FRONT_FACE_ENA(1) |
5593 S_0286D0_POS_FIXED_PT_ENA(1));
5594 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5595 const unsigned *properties
= shader
->selector
->info
.properties
;
5596 unsigned max_work_group_size
=
5597 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5598 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5599 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5601 if (!max_work_group_size
) {
5602 /* This is a variable group size compute shader,
5603 * compile it for the maximum possible group size.
5605 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5608 si_llvm_add_attribute(ctx
->main_fn
,
5609 "amdgpu-max-work-group-size",
5610 max_work_group_size
);
5613 shader
->info
.num_input_sgprs
= 0;
5614 shader
->info
.num_input_vgprs
= 0;
5616 for (i
= 0; i
<= last_sgpr
; ++i
)
5617 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5619 for (; i
< num_params
; ++i
)
5620 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5622 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5623 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5625 if (!ctx
->screen
->has_ds_bpermute
&&
5627 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5628 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5629 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5630 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5631 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5632 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5634 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5635 LLVMArrayType(ctx
->i32
, 64),
5639 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5640 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5641 ctx
->type
== PIPE_SHADER_TESS_EVAL
)
5642 declare_tess_lds(ctx
);
5646 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5649 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5651 struct gallivm_state
*gallivm
=
5652 ctx
->soa
.bld_base
.base
.gallivm
;
5654 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5655 SI_PARAM_RW_BUFFERS
);
5657 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5658 ctx
->shader
->key
.as_es
) ||
5659 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5660 ctx
->shader
->key
.as_es
) ||
5661 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5663 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5665 LLVMValueRef offset
= lp_build_const_int32(gallivm
, ring
);
5668 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5671 if (ctx
->shader
->is_gs_copy_shader
) {
5672 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_VS_RING_GSVS
);
5675 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5677 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5679 for (i
= 0; i
< 4; i
++) {
5680 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_GS_RING_GSVS0
+ i
);
5683 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5688 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5689 LLVMValueRef param_rw_buffers
,
5690 unsigned param_pos_fixed_pt
)
5692 struct lp_build_tgsi_context
*bld_base
=
5694 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5695 LLVMBuilderRef builder
= gallivm
->builder
;
5696 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5698 /* Use the fixed-point gl_FragCoord input.
5699 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5700 * per coordinate to get the repeating effect.
5702 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5703 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5705 /* Load the buffer descriptor. */
5706 slot
= lp_build_const_int32(gallivm
, SI_PS_CONST_POLY_STIPPLE
);
5707 desc
= build_indexed_load_const(ctx
, param_rw_buffers
, slot
);
5709 /* The stipple pattern is 32x32, each row has 32 bits. */
5710 offset
= LLVMBuildMul(builder
, address
[1],
5711 LLVMConstInt(ctx
->i32
, 4, 0), "");
5712 row
= buffer_load_const(ctx
, desc
, offset
);
5713 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
5714 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5715 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5717 /* The intrinsic kills the thread if arg < 0. */
5718 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
5719 LLVMConstReal(ctx
->f32
, -1), "");
5720 lp_build_intrinsic(builder
, "llvm.AMDGPU.kill", ctx
->voidt
, &bit
, 1, 0);
5723 void si_shader_binary_read_config(struct radeon_shader_binary
*binary
,
5724 struct si_shader_config
*conf
,
5725 unsigned symbol_offset
)
5728 const unsigned char *config
=
5729 radeon_shader_binary_config_start(binary
, symbol_offset
);
5730 bool really_needs_scratch
= false;
5732 /* LLVM adds SGPR spills to the scratch size.
5733 * Find out if we really need the scratch buffer.
5735 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5736 const struct radeon_shader_reloc
*reloc
= &binary
->relocs
[i
];
5738 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5739 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5740 really_needs_scratch
= true;
5745 /* XXX: We may be able to emit some of these values directly rather than
5746 * extracting fields to be emitted later.
5749 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5750 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5751 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5753 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5754 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5755 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5756 case R_00B848_COMPUTE_PGM_RSRC1
:
5757 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5758 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5759 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5760 conf
->rsrc1
= value
;
5762 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5763 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5765 case R_00B84C_COMPUTE_PGM_RSRC2
:
5766 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5767 conf
->rsrc2
= value
;
5769 case R_0286CC_SPI_PS_INPUT_ENA
:
5770 conf
->spi_ps_input_ena
= value
;
5772 case R_0286D0_SPI_PS_INPUT_ADDR
:
5773 conf
->spi_ps_input_addr
= value
;
5775 case R_0286E8_SPI_TMPRING_SIZE
:
5776 case R_00B860_COMPUTE_TMPRING_SIZE
:
5777 /* WAVESIZE is in units of 256 dwords. */
5778 if (really_needs_scratch
)
5779 conf
->scratch_bytes_per_wave
=
5780 G_00B860_WAVESIZE(value
) * 256 * 4;
5782 case 0x4: /* SPILLED_SGPRS */
5783 conf
->spilled_sgprs
= value
;
5785 case 0x8: /* SPILLED_VGPRS */
5786 conf
->spilled_vgprs
= value
;
5790 static bool printed
;
5793 fprintf(stderr
, "Warning: LLVM emitted unknown "
5794 "config register: 0x%x\n", reg
);
5802 if (!conf
->spi_ps_input_addr
)
5803 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5806 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
5807 struct si_shader
*shader
,
5808 struct si_shader_config
*config
,
5809 uint64_t scratch_va
)
5812 uint32_t scratch_rsrc_dword0
= scratch_va
;
5813 uint32_t scratch_rsrc_dword1
=
5814 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5816 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
5819 if (HAVE_LLVM
>= 0x0309)
5820 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5822 scratch_rsrc_dword1
|=
5823 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
5825 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5826 const struct radeon_shader_reloc
*reloc
=
5827 &shader
->binary
.relocs
[i
];
5828 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5829 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5830 &scratch_rsrc_dword0
, 4);
5831 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5832 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5833 &scratch_rsrc_dword1
, 4);
5838 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
5840 unsigned size
= shader
->binary
.code_size
;
5843 size
+= shader
->prolog
->binary
.code_size
;
5845 size
+= shader
->epilog
->binary
.code_size
;
5849 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5851 const struct radeon_shader_binary
*prolog
=
5852 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5853 const struct radeon_shader_binary
*epilog
=
5854 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5855 const struct radeon_shader_binary
*mainb
= &shader
->binary
;
5856 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5857 (!epilog
? mainb
->rodata_size
: 0);
5860 assert(!prolog
|| !prolog
->rodata_size
);
5861 assert((!prolog
&& !epilog
) || !mainb
->rodata_size
);
5862 assert(!epilog
|| !epilog
->rodata_size
);
5864 r600_resource_reference(&shader
->bo
, NULL
);
5865 shader
->bo
= (struct r600_resource
*)
5866 pipe_buffer_create(&sscreen
->b
.b
, 0,
5867 PIPE_USAGE_IMMUTABLE
, bo_size
);
5872 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
5873 PIPE_TRANSFER_READ_WRITE
);
5876 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
5877 ptr
+= prolog
->code_size
;
5880 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
5881 ptr
+= mainb
->code_size
;
5884 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
5885 else if (mainb
->rodata_size
> 0)
5886 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5888 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
5892 static void si_shader_dump_disassembly(const struct radeon_shader_binary
*binary
,
5893 struct pipe_debug_callback
*debug
,
5894 const char *name
, FILE *file
)
5899 if (binary
->disasm_string
) {
5900 fprintf(file
, "Shader %s disassembly:\n", name
);
5901 fprintf(file
, "%s", binary
->disasm_string
);
5903 if (debug
&& debug
->debug_message
) {
5904 /* Very long debug messages are cut off, so send the
5905 * disassembly one line at a time. This causes more
5906 * overhead, but on the plus side it simplifies
5907 * parsing of resulting logs.
5909 pipe_debug_message(debug
, SHADER_INFO
,
5910 "Shader Disassembly Begin");
5912 line
= binary
->disasm_string
;
5914 p
= util_strchrnul(line
, '\n');
5918 pipe_debug_message(debug
, SHADER_INFO
,
5919 "%.*s", count
, line
);
5927 pipe_debug_message(debug
, SHADER_INFO
,
5928 "Shader Disassembly End");
5931 fprintf(file
, "Shader %s binary:\n", name
);
5932 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5933 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5934 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5935 binary
->code
[i
+ 1], binary
->code
[i
]);
5940 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5941 struct si_shader_config
*conf
,
5942 unsigned num_inputs
,
5944 struct pipe_debug_callback
*debug
,
5948 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
5949 unsigned lds_per_wave
= 0;
5950 unsigned max_simd_waves
= 10;
5952 /* Compute LDS usage for PS. */
5953 if (processor
== PIPE_SHADER_FRAGMENT
) {
5954 /* The minimum usage per wave is (num_inputs * 48). The maximum
5955 * usage is (num_inputs * 48 * 16).
5956 * We can get anything in between and it varies between waves.
5958 * The 48 bytes per input for a single primitive is equal to
5959 * 4 bytes/component * 4 components/input * 3 points.
5961 * Other stages don't know the size at compile time or don't
5962 * allocate LDS per wave, but instead they do it per thread group.
5964 lds_per_wave
= conf
->lds_size
* lds_increment
+
5965 align(num_inputs
* 48, lds_increment
);
5968 /* Compute the per-SIMD wave counts. */
5969 if (conf
->num_sgprs
) {
5970 if (sscreen
->b
.chip_class
>= VI
)
5971 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5973 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5976 if (conf
->num_vgprs
)
5977 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5979 /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD
5983 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5985 if (file
!= stderr
||
5986 r600_can_dump_shader(&sscreen
->b
, processor
)) {
5987 if (processor
== PIPE_SHADER_FRAGMENT
) {
5988 fprintf(file
, "*** SHADER CONFIG ***\n"
5989 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5990 "SPI_PS_INPUT_ENA = 0x%04x\n",
5991 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5994 fprintf(file
, "*** SHADER STATS ***\n"
5997 "Spilled SGPRs: %d\n"
5998 "Spilled VGPRs: %d\n"
5999 "Code Size: %d bytes\n"
6001 "Scratch: %d bytes per wave\n"
6003 "********************\n\n\n",
6004 conf
->num_sgprs
, conf
->num_vgprs
,
6005 conf
->spilled_sgprs
, conf
->spilled_vgprs
, code_size
,
6006 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6010 pipe_debug_message(debug
, SHADER_INFO
,
6011 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6012 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6013 "Spilled VGPRs: %d",
6014 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6015 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6016 max_simd_waves
, conf
->spilled_sgprs
,
6017 conf
->spilled_vgprs
);
6020 static const char *si_get_shader_name(struct si_shader
*shader
,
6023 switch (processor
) {
6024 case PIPE_SHADER_VERTEX
:
6025 if (shader
->key
.as_es
)
6026 return "Vertex Shader as ES";
6027 else if (shader
->key
.as_ls
)
6028 return "Vertex Shader as LS";
6030 return "Vertex Shader as VS";
6031 case PIPE_SHADER_TESS_CTRL
:
6032 return "Tessellation Control Shader";
6033 case PIPE_SHADER_TESS_EVAL
:
6034 if (shader
->key
.as_es
)
6035 return "Tessellation Evaluation Shader as ES";
6037 return "Tessellation Evaluation Shader as VS";
6038 case PIPE_SHADER_GEOMETRY
:
6039 if (shader
->is_gs_copy_shader
)
6040 return "GS Copy Shader as VS";
6042 return "Geometry Shader";
6043 case PIPE_SHADER_FRAGMENT
:
6044 return "Pixel Shader";
6045 case PIPE_SHADER_COMPUTE
:
6046 return "Compute Shader";
6048 return "Unknown Shader";
6052 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6053 struct pipe_debug_callback
*debug
, unsigned processor
,
6056 if (file
!= stderr
||
6057 r600_can_dump_shader(&sscreen
->b
, processor
))
6058 si_dump_shader_key(processor
, &shader
->key
, file
);
6060 if (file
!= stderr
&& shader
->binary
.llvm_ir_string
) {
6061 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6062 si_get_shader_name(shader
, processor
));
6063 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6066 if (file
!= stderr
||
6067 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6068 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6069 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6072 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6073 debug
, "prolog", file
);
6075 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6078 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6079 debug
, "epilog", file
);
6080 fprintf(file
, "\n");
6083 si_shader_dump_stats(sscreen
, &shader
->config
,
6084 shader
->selector
? shader
->selector
->info
.num_inputs
: 0,
6085 si_get_shader_binary_size(shader
), debug
, processor
,
6089 int si_compile_llvm(struct si_screen
*sscreen
,
6090 struct radeon_shader_binary
*binary
,
6091 struct si_shader_config
*conf
,
6092 LLVMTargetMachineRef tm
,
6094 struct pipe_debug_callback
*debug
,
6099 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6101 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6102 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6104 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6105 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6106 LLVMDumpModule(mod
);
6107 fprintf(stderr
, "\n");
6111 if (sscreen
->record_llvm_ir
) {
6112 char *ir
= LLVMPrintModuleToString(mod
);
6113 binary
->llvm_ir_string
= strdup(ir
);
6114 LLVMDisposeMessage(ir
);
6117 if (!si_replace_shader(count
, binary
)) {
6118 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6123 si_shader_binary_read_config(binary
, conf
, 0);
6125 /* Enable 64-bit and 16-bit denormals, because there is no performance
6128 * If denormals are enabled, all floating-point output modifiers are
6131 * Don't enable denormals for 32-bit floats, because:
6132 * - Floating-point output modifiers would be ignored by the hw.
6133 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6134 * have to stop using those.
6135 * - SI & CI would be very slow.
6137 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6139 FREE(binary
->config
);
6140 FREE(binary
->global_symbol_offsets
);
6141 binary
->config
= NULL
;
6142 binary
->global_symbol_offsets
= NULL
;
6144 /* Some shaders can't have rodata because their binaries can be
6147 if (binary
->rodata_size
&&
6148 (processor
== PIPE_SHADER_VERTEX
||
6149 processor
== PIPE_SHADER_TESS_CTRL
||
6150 processor
== PIPE_SHADER_TESS_EVAL
||
6151 processor
== PIPE_SHADER_FRAGMENT
)) {
6152 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6159 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6161 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6162 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6164 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6167 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6169 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6170 LLVMTargetMachineRef tm
,
6171 struct si_shader_selector
*gs_selector
,
6172 struct pipe_debug_callback
*debug
)
6174 struct si_shader_context ctx
;
6175 struct si_shader
*shader
;
6176 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6177 struct lp_build_tgsi_context
*bld_base
= &ctx
.soa
.bld_base
;
6178 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6179 struct si_shader_output_values
*outputs
;
6180 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6181 LLVMValueRef args
[9];
6184 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6189 shader
= CALLOC_STRUCT(si_shader
);
6196 shader
->selector
= gs_selector
;
6197 shader
->is_gs_copy_shader
= true;
6199 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
6200 ctx
.type
= PIPE_SHADER_VERTEX
;
6202 create_meta_data(&ctx
);
6203 create_function(&ctx
);
6204 preload_ring_buffers(&ctx
);
6206 args
[0] = ctx
.gsvs_ring
[0];
6207 args
[1] = lp_build_mul_imm(uint
,
6208 LLVMGetParam(ctx
.main_fn
,
6209 ctx
.param_vertex_id
),
6211 args
[3] = uint
->zero
;
6212 args
[4] = uint
->one
; /* OFFEN */
6213 args
[5] = uint
->zero
; /* IDXEN */
6214 args
[6] = uint
->one
; /* GLC */
6215 args
[7] = uint
->one
; /* SLC */
6216 args
[8] = uint
->zero
; /* TFE */
6218 /* Fetch vertex data from GSVS ring */
6219 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6222 outputs
[i
].name
= gsinfo
->output_semantic_name
[i
];
6223 outputs
[i
].sid
= gsinfo
->output_semantic_index
[i
];
6225 for (chan
= 0; chan
< 4; chan
++) {
6226 args
[2] = lp_build_const_int32(gallivm
,
6228 gs_selector
->gs_max_out_vertices
* 16 * 4);
6230 outputs
[i
].values
[chan
] =
6231 LLVMBuildBitCast(gallivm
->builder
,
6232 lp_build_intrinsic(gallivm
->builder
,
6233 "llvm.SI.buffer.load.dword.i32.i32",
6235 LP_FUNC_ATTR_READONLY
),
6240 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6242 LLVMBuildRetVoid(gallivm
->builder
);
6244 /* Dump LLVM IR before any optimization passes */
6245 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6246 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6247 LLVMDumpModule(bld_base
->base
.gallivm
->module
);
6249 si_llvm_finalize_module(&ctx
,
6250 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6252 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6253 &ctx
.shader
->config
, ctx
.tm
,
6254 bld_base
->base
.gallivm
->module
,
6255 debug
, PIPE_SHADER_GEOMETRY
,
6258 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6259 fprintf(stderr
, "GS Copy Shader:\n");
6260 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6261 PIPE_SHADER_GEOMETRY
, stderr
);
6262 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6265 si_llvm_dispose(&ctx
);
6276 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
6281 fprintf(f
, "SHADER KEY\n");
6284 case PIPE_SHADER_VERTEX
:
6285 fprintf(f
, " part.vs.prolog.instance_divisors = {");
6286 for (i
= 0; i
< ARRAY_SIZE(key
->part
.vs
.prolog
.instance_divisors
); i
++)
6287 fprintf(f
, !i
? "%u" : ", %u",
6288 key
->part
.vs
.prolog
.instance_divisors
[i
]);
6290 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n", key
->part
.vs
.epilog
.export_prim_id
);
6291 fprintf(f
, " as_es = %u\n", key
->as_es
);
6292 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6293 fprintf(f
, " mono.vs.fix_fetch = 0x%x\n", key
->mono
.vs
.fix_fetch
);
6296 case PIPE_SHADER_TESS_CTRL
:
6297 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6298 fprintf(f
, " mono.tcs.inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.tcs
.inputs_to_copy
);
6301 case PIPE_SHADER_TESS_EVAL
:
6302 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6303 fprintf(f
, " as_es = %u\n", key
->as_es
);
6306 case PIPE_SHADER_GEOMETRY
:
6307 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6310 case PIPE_SHADER_COMPUTE
:
6313 case PIPE_SHADER_FRAGMENT
:
6314 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6315 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6316 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6317 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6318 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6319 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6320 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6321 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6322 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6323 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6324 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6325 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6326 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6327 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6328 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6329 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6336 if ((shader
== PIPE_SHADER_GEOMETRY
||
6337 shader
== PIPE_SHADER_TESS_EVAL
||
6338 shader
== PIPE_SHADER_VERTEX
) &&
6339 !key
->as_es
&& !key
->as_ls
) {
6340 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6341 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6342 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6346 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6347 struct si_screen
*sscreen
,
6348 struct si_shader
*shader
,
6349 LLVMTargetMachineRef tm
)
6351 struct lp_build_tgsi_context
*bld_base
;
6352 struct lp_build_tgsi_action tmpl
= {};
6354 si_llvm_context_init(ctx
, sscreen
, shader
, tm
,
6355 (shader
&& shader
->selector
) ? &shader
->selector
->info
: NULL
,
6356 (shader
&& shader
->selector
) ? shader
->selector
->tokens
: NULL
);
6358 bld_base
= &ctx
->soa
.bld_base
;
6359 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6361 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6362 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6363 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6365 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6366 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6367 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6368 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6369 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6370 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6371 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6372 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6373 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6374 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6375 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6376 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6377 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6378 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6380 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6381 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6382 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6383 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6384 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6385 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6387 tmpl
.fetch_args
= atomic_fetch_args
;
6388 tmpl
.emit
= atomic_emit
;
6389 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6390 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6391 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6392 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6393 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6394 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6395 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6396 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6397 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6398 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6399 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6400 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6401 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6402 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6403 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6404 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6405 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6406 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6407 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6408 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6410 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6412 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6413 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6414 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6415 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6417 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6418 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6419 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6422 /* Return true if the PARAM export has been eliminated. */
6423 static bool si_eliminate_const_output(struct si_shader_context
*ctx
,
6424 LLVMValueRef inst
, unsigned offset
)
6426 struct si_shader
*shader
= ctx
->shader
;
6427 unsigned num_outputs
= shader
->selector
->info
.num_outputs
;
6428 unsigned i
, default_val
; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
6429 bool is_zero
[4] = {}, is_one
[4] = {};
6431 for (i
= 0; i
< 4; i
++) {
6432 LLVMBool loses_info
;
6433 LLVMValueRef p
= LLVMGetOperand(inst
, 5 + i
);
6435 /* It's a constant expression. Undef outputs are eliminated too. */
6436 if (LLVMIsUndef(p
)) {
6439 } else if (LLVMIsAConstantFP(p
)) {
6440 double a
= LLVMConstRealGetDouble(p
, &loses_info
);
6447 return false; /* other constant */
6452 /* Only certain combinations of 0 and 1 can be eliminated. */
6453 if (is_zero
[0] && is_zero
[1] && is_zero
[2])
6454 default_val
= is_zero
[3] ? 0 : 1;
6455 else if (is_one
[0] && is_one
[1] && is_one
[2])
6456 default_val
= is_zero
[3] ? 2 : 3;
6460 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
6461 LLVMInstructionEraseFromParent(inst
);
6463 /* Change OFFSET to DEFAULT_VAL. */
6464 for (i
= 0; i
< num_outputs
; i
++) {
6465 if (shader
->info
.vs_output_param_offset
[i
] == offset
) {
6466 shader
->info
.vs_output_param_offset
[i
] =
6467 EXP_PARAM_DEFAULT_VAL_0000
+ default_val
;
6474 struct si_vs_exports
{
6476 unsigned offset
[SI_MAX_VS_OUTPUTS
];
6477 LLVMValueRef inst
[SI_MAX_VS_OUTPUTS
];
6480 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6482 struct si_shader
*shader
= ctx
->shader
;
6483 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6484 LLVMBasicBlockRef bb
;
6485 struct si_vs_exports exports
;
6486 bool removed_any
= false;
6490 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6491 ctx
->type
== PIPE_SHADER_COMPUTE
||
6492 shader
->key
.as_es
||
6496 /* Process all LLVM instructions. */
6497 bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6499 LLVMValueRef inst
= LLVMGetFirstInstruction(bb
);
6502 LLVMValueRef cur
= inst
;
6503 inst
= LLVMGetNextInstruction(inst
);
6505 if (LLVMGetInstructionOpcode(cur
) != LLVMCall
)
6508 LLVMValueRef callee
= lp_get_called_value(cur
);
6510 if (!lp_is_function(callee
))
6513 const char *name
= LLVMGetValueName(callee
);
6514 unsigned num_args
= LLVMCountParams(callee
);
6516 /* Check if this is an export instruction. */
6517 if (num_args
!= 9 || strcmp(name
, "llvm.SI.export"))
6520 LLVMValueRef arg
= LLVMGetOperand(cur
, 3);
6521 unsigned target
= LLVMConstIntGetZExtValue(arg
);
6523 if (target
< V_008DFC_SQ_EXP_PARAM
)
6526 target
-= V_008DFC_SQ_EXP_PARAM
;
6528 /* Eliminate constant value PARAM exports. */
6529 if (si_eliminate_const_output(ctx
, cur
, target
)) {
6532 exports
.offset
[exports
.num
] = target
;
6533 exports
.inst
[exports
.num
] = cur
;
6537 bb
= LLVMGetNextBasicBlock(bb
);
6540 /* Remove holes in export memory due to removed PARAM exports.
6541 * This is done by renumbering all PARAM exports.
6544 ubyte current_offset
[SI_MAX_VS_OUTPUTS
];
6545 unsigned new_count
= 0;
6548 /* Make a copy of the offsets. We need the old version while
6549 * we are modifying some of them. */
6550 assert(sizeof(current_offset
) ==
6551 sizeof(shader
->info
.vs_output_param_offset
));
6552 memcpy(current_offset
, shader
->info
.vs_output_param_offset
,
6553 sizeof(current_offset
));
6555 for (i
= 0; i
< exports
.num
; i
++) {
6556 unsigned offset
= exports
.offset
[i
];
6558 for (out
= 0; out
< info
->num_outputs
; out
++) {
6559 if (current_offset
[out
] != offset
)
6562 LLVMSetOperand(exports
.inst
[i
], 3,
6563 LLVMConstInt(ctx
->i32
,
6564 V_008DFC_SQ_EXP_PARAM
+ new_count
, 0));
6565 shader
->info
.vs_output_param_offset
[out
] = new_count
;
6570 shader
->info
.nr_param_exports
= new_count
;
6574 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6575 struct si_shader
*shader
)
6577 struct si_shader_selector
*sel
= shader
->selector
;
6578 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
6580 switch (ctx
->type
) {
6581 case PIPE_SHADER_VERTEX
:
6582 ctx
->load_input
= declare_input_vs
;
6583 if (shader
->key
.as_ls
)
6584 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6585 else if (shader
->key
.as_es
)
6586 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6588 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6590 case PIPE_SHADER_TESS_CTRL
:
6591 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6592 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6593 bld_base
->emit_store
= store_output_tcs
;
6594 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
6596 case PIPE_SHADER_TESS_EVAL
:
6597 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6598 if (shader
->key
.as_es
)
6599 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6601 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6603 case PIPE_SHADER_GEOMETRY
:
6604 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6605 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
6607 case PIPE_SHADER_FRAGMENT
:
6608 ctx
->load_input
= declare_input_fs
;
6609 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
6611 case PIPE_SHADER_COMPUTE
:
6612 ctx
->declare_memory_region
= declare_compute_memory
;
6615 assert(!"Unsupported shader type");
6619 create_meta_data(ctx
);
6620 create_function(ctx
);
6621 preload_ring_buffers(ctx
);
6623 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6625 for (i
= 0; i
< 4; i
++) {
6626 ctx
->gs_next_vertex
[i
] =
6627 lp_build_alloca(bld_base
->base
.gallivm
,
6632 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6633 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6637 si_llvm_build_ret(ctx
, ctx
->return_value
);
6642 * Compute the VS prolog key, which contains all the information needed to
6643 * build the VS prolog function, and set shader->info bits where needed.
6645 static void si_get_vs_prolog_key(struct si_shader
*shader
,
6646 union si_shader_part_key
*key
)
6648 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6650 memset(key
, 0, sizeof(*key
));
6651 key
->vs_prolog
.states
= shader
->key
.part
.vs
.prolog
;
6652 key
->vs_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6653 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6655 /* Set the instanceID flag. */
6656 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
6657 if (key
->vs_prolog
.states
.instance_divisors
[i
])
6658 shader
->info
.uses_instanceid
= true;
6662 * Compute the VS epilog key, which contains all the information needed to
6663 * build the VS epilog function, and set the PrimitiveID output offset.
6665 static void si_get_vs_epilog_key(struct si_shader
*shader
,
6666 struct si_vs_epilog_bits
*states
,
6667 union si_shader_part_key
*key
)
6669 memset(key
, 0, sizeof(*key
));
6670 key
->vs_epilog
.states
= *states
;
6672 /* Set up the PrimitiveID output. */
6673 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
6674 unsigned index
= shader
->selector
->info
.num_outputs
;
6675 unsigned offset
= shader
->info
.nr_param_exports
++;
6677 key
->vs_epilog
.prim_id_param_offset
= offset
;
6678 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
6679 shader
->info
.vs_output_param_offset
[index
] = offset
;
6684 * Compute the PS prolog key, which contains all the information needed to
6685 * build the PS prolog function, and set related bits in shader->config.
6687 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6688 union si_shader_part_key
*key
,
6689 bool separate_prolog
)
6691 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6693 memset(key
, 0, sizeof(*key
));
6694 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6695 key
->ps_prolog
.colors_read
= info
->colors_read
;
6696 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6697 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6698 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6699 (key
->ps_prolog
.colors_read
||
6700 key
->ps_prolog
.states
.force_persp_sample_interp
||
6701 key
->ps_prolog
.states
.force_linear_sample_interp
||
6702 key
->ps_prolog
.states
.force_persp_center_interp
||
6703 key
->ps_prolog
.states
.force_linear_center_interp
||
6704 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6705 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6707 if (info
->colors_read
) {
6708 unsigned *color
= shader
->selector
->color_attr_index
;
6710 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6711 /* BCOLORs are stored after the last input. */
6712 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6713 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6714 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6717 for (unsigned i
= 0; i
< 2; i
++) {
6718 unsigned interp
= info
->input_interpolate
[color
[i
]];
6719 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6721 if (!(info
->colors_read
& (0xf << i
*4)))
6724 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6726 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6727 interp
== TGSI_INTERPOLATE_COLOR
)
6728 interp
= TGSI_INTERPOLATE_CONSTANT
;
6731 case TGSI_INTERPOLATE_CONSTANT
:
6732 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6734 case TGSI_INTERPOLATE_PERSPECTIVE
:
6735 case TGSI_INTERPOLATE_COLOR
:
6736 /* Force the interpolation location for colors here. */
6737 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6738 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6739 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6740 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6743 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6744 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6745 shader
->config
.spi_ps_input_ena
|=
6746 S_0286CC_PERSP_SAMPLE_ENA(1);
6748 case TGSI_INTERPOLATE_LOC_CENTER
:
6749 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6750 shader
->config
.spi_ps_input_ena
|=
6751 S_0286CC_PERSP_CENTER_ENA(1);
6753 case TGSI_INTERPOLATE_LOC_CENTROID
:
6754 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6755 shader
->config
.spi_ps_input_ena
|=
6756 S_0286CC_PERSP_CENTROID_ENA(1);
6762 case TGSI_INTERPOLATE_LINEAR
:
6763 /* Force the interpolation location for colors here. */
6764 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6765 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6766 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6767 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6769 /* The VGPR assignment for non-monolithic shaders
6770 * works because InitialPSInputAddr is set on the
6771 * main shader and PERSP_PULL_MODEL is never used.
6774 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6775 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6776 separate_prolog
? 6 : 9;
6777 shader
->config
.spi_ps_input_ena
|=
6778 S_0286CC_LINEAR_SAMPLE_ENA(1);
6780 case TGSI_INTERPOLATE_LOC_CENTER
:
6781 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6782 separate_prolog
? 8 : 11;
6783 shader
->config
.spi_ps_input_ena
|=
6784 S_0286CC_LINEAR_CENTER_ENA(1);
6786 case TGSI_INTERPOLATE_LOC_CENTROID
:
6787 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6788 separate_prolog
? 10 : 13;
6789 shader
->config
.spi_ps_input_ena
|=
6790 S_0286CC_LINEAR_CENTROID_ENA(1);
6804 * Check whether a PS prolog is required based on the key.
6806 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6808 return key
->ps_prolog
.colors_read
||
6809 key
->ps_prolog
.states
.force_persp_sample_interp
||
6810 key
->ps_prolog
.states
.force_linear_sample_interp
||
6811 key
->ps_prolog
.states
.force_persp_center_interp
||
6812 key
->ps_prolog
.states
.force_linear_center_interp
||
6813 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6814 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6815 key
->ps_prolog
.states
.poly_stipple
;
6819 * Compute the PS epilog key, which contains all the information needed to
6820 * build the PS epilog function.
6822 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6823 union si_shader_part_key
*key
)
6825 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6826 memset(key
, 0, sizeof(*key
));
6827 key
->ps_epilog
.colors_written
= info
->colors_written
;
6828 key
->ps_epilog
.writes_z
= info
->writes_z
;
6829 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6830 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6831 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6835 * Build the GS prolog function. Rotate the input vertices for triangle strips
6838 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6839 union si_shader_part_key
*key
)
6841 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
6842 const unsigned num_vgprs
= 8;
6843 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6844 LLVMBuilderRef builder
= gallivm
->builder
;
6845 LLVMTypeRef params
[32];
6846 LLVMTypeRef returns
[32];
6847 LLVMValueRef func
, ret
;
6849 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6850 params
[i
] = ctx
->i32
;
6851 returns
[i
] = ctx
->i32
;
6854 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6855 params
[num_sgprs
+ i
] = ctx
->i32
;
6856 returns
[num_sgprs
+ i
] = ctx
->f32
;
6859 /* Create the function. */
6860 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6861 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
6862 func
= ctx
->main_fn
;
6864 /* Copy inputs to outputs. This should be no-op, as the registers match,
6865 * but it will prevent the compiler from overwriting them unintentionally.
6867 ret
= ctx
->return_value
;
6868 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6869 LLVMValueRef p
= LLVMGetParam(func
, i
);
6870 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6872 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6873 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6874 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
6875 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6878 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6879 /* Remap the input vertices for every other primitive. */
6880 const unsigned vtx_params
[6] = {
6888 LLVMValueRef prim_id
, rotate
;
6890 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6891 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6893 for (unsigned i
= 0; i
< 6; ++i
) {
6894 LLVMValueRef base
, rotated
, actual
;
6895 base
= LLVMGetParam(func
, vtx_params
[i
]);
6896 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
6897 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6898 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
6899 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
6903 LLVMBuildRet(builder
, ret
);
6907 * Given a list of shader part functions, build a wrapper function that
6908 * runs them in sequence to form a monolithic shader.
6910 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6911 LLVMValueRef
*parts
,
6915 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6916 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
6917 /* PS epilog has one arg per color component */
6918 LLVMTypeRef param_types
[48];
6919 LLVMValueRef out
[48];
6920 LLVMTypeRef function_type
;
6921 unsigned num_params
;
6923 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6924 unsigned num_sgprs
, num_vgprs
;
6925 unsigned last_sgpr_param
;
6928 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6929 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6930 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6933 /* The parameters of the wrapper function correspond to those of the
6934 * first part in terms of SGPRs and VGPRs, but we use the types of the
6935 * main part to get the right types. This is relevant for the
6936 * dereferenceable attribute on descriptor table pointers.
6941 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6942 num_params
= LLVMCountParamTypes(function_type
);
6944 for (unsigned i
= 0; i
< num_params
; ++i
) {
6945 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6947 if (ac_is_sgpr_param(param
)) {
6948 assert(num_vgprs
== 0);
6949 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
6951 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
6954 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
6957 last_sgpr_param
= 0;
6959 while (gprs
< num_sgprs
+ num_vgprs
) {
6960 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
6963 param_types
[num_params
] = LLVMTypeOf(param
);
6964 if (gprs
< num_sgprs
)
6965 last_sgpr_param
= num_params
;
6966 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
6969 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6970 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6971 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6976 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
6978 /* Record the arguments of the function as if they were an output of
6984 for (unsigned i
= 0; i
< num_params
; ++i
) {
6985 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6986 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6987 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
6988 unsigned size
= llvm_get_type_size(param_type
) / 4;
6991 if (param_type
!= out_type
)
6992 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6993 out
[num_out
++] = param
;
6995 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6997 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6998 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6999 param_type
= ctx
->i64
;
7002 if (param_type
!= vector_type
)
7003 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7005 for (unsigned j
= 0; j
< size
; ++j
)
7006 out
[num_out
++] = LLVMBuildExtractElement(
7007 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7010 if (i
<= last_sgpr_param
)
7011 num_out_sgpr
= num_out
;
7014 /* Now chain the parts. */
7015 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7016 LLVMValueRef in
[48];
7018 LLVMTypeRef ret_type
;
7019 unsigned out_idx
= 0;
7021 num_params
= LLVMCountParams(parts
[part
]);
7022 assert(num_params
<= ARRAY_SIZE(param_types
));
7024 /* Derive arguments for the next part from outputs of the
7027 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7029 LLVMTypeRef param_type
;
7031 unsigned param_size
;
7032 LLVMValueRef arg
= NULL
;
7034 param
= LLVMGetParam(parts
[part
], param_idx
);
7035 param_type
= LLVMTypeOf(param
);
7036 param_size
= llvm_get_type_size(param_type
) / 4;
7037 is_sgpr
= ac_is_sgpr_param(param
);
7040 #if HAVE_LLVM < 0x0400
7041 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7043 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7044 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7046 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7049 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7050 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7052 if (param_size
== 1)
7055 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7057 if (LLVMTypeOf(arg
) != param_type
) {
7058 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7059 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7060 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7062 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7066 in
[param_idx
] = arg
;
7067 out_idx
+= param_size
;
7070 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7071 ret_type
= LLVMTypeOf(ret
);
7073 /* Extract the returned GPRs. */
7077 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7078 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7080 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7082 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7084 LLVMBuildExtractValue(builder
, ret
, i
, "");
7086 out
[num_out
++] = val
;
7088 if (LLVMTypeOf(val
) == ctx
->i32
) {
7089 assert(num_out_sgpr
+ 1 == num_out
);
7090 num_out_sgpr
= num_out
;
7096 LLVMBuildRetVoid(builder
);
7099 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7100 LLVMTargetMachineRef tm
,
7101 struct si_shader
*shader
,
7103 struct pipe_debug_callback
*debug
)
7105 struct si_shader_selector
*sel
= shader
->selector
;
7106 struct si_shader_context ctx
;
7107 struct lp_build_tgsi_context
*bld_base
;
7111 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7112 * conversion fails. */
7113 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7114 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7115 tgsi_dump(sel
->tokens
, 0);
7116 si_dump_streamout(&sel
->so
);
7119 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
7120 ctx
.separate_prolog
= !is_monolithic
;
7122 memset(shader
->info
.vs_output_param_offset
, EXP_PARAM_UNDEFINED
,
7123 sizeof(shader
->info
.vs_output_param_offset
));
7125 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7127 bld_base
= &ctx
.soa
.bld_base
;
7128 ctx
.load_system_value
= declare_system_value
;
7130 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7131 si_llvm_dispose(&ctx
);
7135 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7136 LLVMValueRef parts
[3];
7140 need_prolog
= sel
->info
.num_inputs
;
7141 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7143 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7146 union si_shader_part_key prolog_key
;
7147 si_get_vs_prolog_key(shader
, &prolog_key
);
7148 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7149 parts
[0] = ctx
.main_fn
;
7153 union si_shader_part_key epilog_key
;
7154 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7155 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7156 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7159 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7160 need_prolog
? 1 : 0);
7161 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7162 LLVMValueRef parts
[2];
7163 union si_shader_part_key epilog_key
;
7165 parts
[0] = ctx
.main_fn
;
7167 memset(&epilog_key
, 0, sizeof(epilog_key
));
7168 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7169 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7170 parts
[1] = ctx
.main_fn
;
7172 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7173 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7174 !shader
->key
.as_es
) {
7175 LLVMValueRef parts
[2];
7176 union si_shader_part_key epilog_key
;
7178 parts
[0] = ctx
.main_fn
;
7180 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7181 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7182 parts
[1] = ctx
.main_fn
;
7184 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7185 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7186 LLVMValueRef parts
[2];
7187 union si_shader_part_key prolog_key
;
7189 parts
[1] = ctx
.main_fn
;
7191 memset(&prolog_key
, 0, sizeof(prolog_key
));
7192 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7193 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7194 parts
[0] = ctx
.main_fn
;
7196 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7197 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7198 LLVMValueRef parts
[3];
7199 union si_shader_part_key prolog_key
;
7200 union si_shader_part_key epilog_key
;
7203 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7204 need_prolog
= si_need_ps_prolog(&prolog_key
);
7206 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7209 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7210 parts
[0] = ctx
.main_fn
;
7213 si_get_ps_epilog_key(shader
, &epilog_key
);
7214 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7215 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7217 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7220 mod
= bld_base
->base
.gallivm
->module
;
7222 /* Dump LLVM IR before any optimization passes */
7223 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7224 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7225 LLVMDumpModule(mod
);
7227 si_llvm_finalize_module(&ctx
,
7228 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7230 /* Post-optimization transformations. */
7231 si_eliminate_const_vs_outputs(&ctx
);
7233 /* Compile to bytecode. */
7234 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7235 mod
, debug
, ctx
.type
, "TGSI shader");
7236 si_llvm_dispose(&ctx
);
7238 fprintf(stderr
, "LLVM failed to compile shader\n");
7242 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7243 * LLVM 3.9svn has this bug.
7245 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7246 unsigned *props
= sel
->info
.properties
;
7247 unsigned wave_size
= 64;
7248 unsigned max_vgprs
= 256;
7249 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7250 unsigned max_sgprs_per_wave
= 128;
7251 unsigned max_block_threads
;
7253 if (props
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
])
7254 max_block_threads
= props
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
7255 props
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
7256 props
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
7258 max_block_threads
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
7260 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7261 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7263 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7264 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7266 if (shader
->config
.num_sgprs
> max_sgprs
||
7267 shader
->config
.num_vgprs
> max_vgprs
) {
7268 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7269 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7270 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7271 max_sgprs
, max_vgprs
);
7273 /* Just terminate the process, because dependent
7274 * shaders can hang due to bad input data, but use
7275 * the env var to allow shader-db to work.
7277 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7282 /* Add the scratch offset to input SGPRs. */
7283 if (shader
->config
.scratch_bytes_per_wave
)
7284 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7286 /* Calculate the number of fragment input VGPRs. */
7287 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7288 shader
->info
.num_input_vgprs
= 0;
7289 shader
->info
.face_vgpr_index
= -1;
7291 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7292 shader
->info
.num_input_vgprs
+= 2;
7293 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7294 shader
->info
.num_input_vgprs
+= 2;
7295 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7296 shader
->info
.num_input_vgprs
+= 2;
7297 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7298 shader
->info
.num_input_vgprs
+= 3;
7299 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7300 shader
->info
.num_input_vgprs
+= 2;
7301 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7302 shader
->info
.num_input_vgprs
+= 2;
7303 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7304 shader
->info
.num_input_vgprs
+= 2;
7305 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7306 shader
->info
.num_input_vgprs
+= 1;
7307 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7308 shader
->info
.num_input_vgprs
+= 1;
7309 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7310 shader
->info
.num_input_vgprs
+= 1;
7311 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7312 shader
->info
.num_input_vgprs
+= 1;
7313 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7314 shader
->info
.num_input_vgprs
+= 1;
7315 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7316 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7317 shader
->info
.num_input_vgprs
+= 1;
7319 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7320 shader
->info
.num_input_vgprs
+= 1;
7321 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7322 shader
->info
.num_input_vgprs
+= 1;
7323 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7324 shader
->info
.num_input_vgprs
+= 1;
7331 * Create, compile and return a shader part (prolog or epilog).
7333 * \param sscreen screen
7334 * \param list list of shader parts of the same category
7335 * \param type shader type
7336 * \param key shader part key
7337 * \param prolog whether the part being requested is a prolog
7338 * \param tm LLVM target machine
7339 * \param debug debug callback
7340 * \param build the callback responsible for building the main function
7341 * \return non-NULL on success
7343 static struct si_shader_part
*
7344 si_get_shader_part(struct si_screen
*sscreen
,
7345 struct si_shader_part
**list
,
7346 enum pipe_shader_type type
,
7348 union si_shader_part_key
*key
,
7349 LLVMTargetMachineRef tm
,
7350 struct pipe_debug_callback
*debug
,
7351 void (*build
)(struct si_shader_context
*,
7352 union si_shader_part_key
*),
7355 struct si_shader_part
*result
;
7357 pipe_mutex_lock(sscreen
->shader_parts_mutex
);
7359 /* Find existing. */
7360 for (result
= *list
; result
; result
= result
->next
) {
7361 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7362 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7367 /* Compile a new one. */
7368 result
= CALLOC_STRUCT(si_shader_part
);
7371 struct si_shader shader
= {};
7372 struct si_shader_context ctx
;
7373 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7375 si_init_shader_ctx(&ctx
, sscreen
, &shader
, tm
);
7379 case PIPE_SHADER_VERTEX
:
7381 case PIPE_SHADER_TESS_CTRL
:
7383 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7385 case PIPE_SHADER_GEOMETRY
:
7388 case PIPE_SHADER_FRAGMENT
:
7390 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7392 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7395 unreachable("bad shader part");
7401 si_llvm_finalize_module(&ctx
,
7402 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7404 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7405 gallivm
->module
, debug
, ctx
.type
, name
)) {
7411 result
->next
= *list
;
7415 si_llvm_dispose(&ctx
);
7416 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7421 * Build the vertex shader prolog function.
7423 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7424 * All inputs are returned unmodified. The vertex load indices are
7425 * stored after them, which will be used by the API VS for fetching inputs.
7427 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7432 * (VertexID + BaseVertex),
7433 * (InstanceID + StartInstance),
7434 * (InstanceID / 2 + StartInstance)
7436 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7437 union si_shader_part_key
*key
)
7439 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7440 LLVMTypeRef
*params
, *returns
;
7441 LLVMValueRef ret
, func
;
7442 int last_sgpr
, num_params
, num_returns
, i
;
7444 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7445 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7447 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7448 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7449 sizeof(LLVMTypeRef
));
7450 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7451 key
->vs_prolog
.last_input
+ 1) *
7452 sizeof(LLVMTypeRef
));
7456 /* Declare input and output SGPRs. */
7458 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7459 params
[num_params
++] = ctx
->i32
;
7460 returns
[num_returns
++] = ctx
->i32
;
7462 last_sgpr
= num_params
- 1;
7464 /* 4 preloaded VGPRs (outputs must be floats) */
7465 for (i
= 0; i
< 4; i
++) {
7466 params
[num_params
++] = ctx
->i32
;
7467 returns
[num_returns
++] = ctx
->f32
;
7470 /* Vertex load indices. */
7471 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7472 returns
[num_returns
++] = ctx
->f32
;
7474 /* Create the function. */
7475 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7476 num_params
, last_sgpr
);
7477 func
= ctx
->main_fn
;
7479 /* Copy inputs to outputs. This should be no-op, as the registers match,
7480 * but it will prevent the compiler from overwriting them unintentionally.
7482 ret
= ctx
->return_value
;
7483 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7484 LLVMValueRef p
= LLVMGetParam(func
, i
);
7485 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7487 for (i
= num_params
- 4; i
< num_params
; i
++) {
7488 LLVMValueRef p
= LLVMGetParam(func
, i
);
7489 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7490 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7493 /* Compute vertex load indices from instance divisors. */
7494 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7495 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7499 /* InstanceID / Divisor + StartInstance */
7500 index
= get_instance_index_for_fetch(ctx
,
7501 SI_SGPR_START_INSTANCE
,
7504 /* VertexID + BaseVertex */
7505 index
= LLVMBuildAdd(gallivm
->builder
,
7506 LLVMGetParam(func
, ctx
->param_vertex_id
),
7507 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7510 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7511 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7515 si_llvm_build_ret(ctx
, ret
);
7519 * Build the vertex shader epilog function. This is also used by the tessellation
7520 * evaluation shader compiled as VS.
7522 * The input is PrimitiveID.
7524 * If PrimitiveID is required by the pixel shader, export it.
7525 * Otherwise, do nothing.
7527 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7528 union si_shader_part_key
*key
)
7530 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7531 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7532 LLVMTypeRef params
[5];
7535 /* Declare input VGPRs. */
7536 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7537 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7538 assert(num_params
<= ARRAY_SIZE(params
));
7540 for (i
= 0; i
< num_params
; i
++)
7541 params
[i
] = ctx
->f32
;
7543 /* Create the function. */
7544 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7547 if (key
->vs_epilog
.states
.export_prim_id
) {
7548 struct lp_build_context
*base
= &bld_base
->base
;
7549 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
7550 LLVMValueRef args
[9];
7552 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
7553 args
[1] = uint
->zero
; /* whether the EXEC mask is valid */
7554 args
[2] = uint
->zero
; /* DONE bit */
7555 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_PARAM
+
7556 key
->vs_epilog
.prim_id_param_offset
);
7557 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
7558 args
[5] = LLVMGetParam(ctx
->main_fn
,
7559 VS_EPILOG_PRIMID_LOC
); /* X */
7560 args
[6] = base
->undef
; /* Y */
7561 args
[7] = base
->undef
; /* Z */
7562 args
[8] = base
->undef
; /* W */
7564 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
7565 LLVMVoidTypeInContext(base
->gallivm
->context
),
7569 LLVMBuildRetVoid(gallivm
->builder
);
7573 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7575 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7576 LLVMTargetMachineRef tm
,
7577 struct si_shader
*shader
,
7578 struct pipe_debug_callback
*debug
,
7579 struct si_vs_epilog_bits
*states
)
7581 union si_shader_part_key epilog_key
;
7583 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7585 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7586 PIPE_SHADER_VERTEX
, true,
7587 &epilog_key
, tm
, debug
,
7588 si_build_vs_epilog_function
,
7589 "Vertex Shader Epilog");
7590 return shader
->epilog
!= NULL
;
7594 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7596 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7597 LLVMTargetMachineRef tm
,
7598 struct si_shader
*shader
,
7599 struct pipe_debug_callback
*debug
)
7601 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7602 union si_shader_part_key prolog_key
;
7604 /* Get the prolog. */
7605 si_get_vs_prolog_key(shader
, &prolog_key
);
7607 /* The prolog is a no-op if there are no inputs. */
7608 if (info
->num_inputs
) {
7610 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7611 PIPE_SHADER_VERTEX
, true,
7612 &prolog_key
, tm
, debug
,
7613 si_build_vs_prolog_function
,
7614 "Vertex Shader Prolog");
7615 if (!shader
->prolog
)
7619 /* Get the epilog. */
7620 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
7621 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7622 &shader
->key
.part
.vs
.epilog
))
7629 * Select and compile (or reuse) TES parts (epilog).
7631 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
7632 LLVMTargetMachineRef tm
,
7633 struct si_shader
*shader
,
7634 struct pipe_debug_callback
*debug
)
7636 if (shader
->key
.as_es
)
7639 /* TES compiled as VS. */
7640 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7641 &shader
->key
.part
.tes
.epilog
);
7645 * Compile the TCS epilog function. This writes tesselation factors to memory
7646 * based on the output primitive type of the tesselator (determined by TES).
7648 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7649 union si_shader_part_key
*key
)
7651 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7652 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7653 LLVMTypeRef params
[16];
7655 int last_sgpr
, num_params
;
7657 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
7658 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
7659 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
7660 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
7661 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
7662 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
7663 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
7664 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
7665 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
7666 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
7667 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
7668 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
7669 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
7670 num_params
= last_sgpr
+ 1;
7672 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
7673 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
7674 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
7676 /* Create the function. */
7677 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
7678 declare_tess_lds(ctx
);
7679 func
= ctx
->main_fn
;
7681 si_write_tess_factors(bld_base
,
7682 LLVMGetParam(func
, last_sgpr
+ 1),
7683 LLVMGetParam(func
, last_sgpr
+ 2),
7684 LLVMGetParam(func
, last_sgpr
+ 3));
7686 LLVMBuildRetVoid(gallivm
->builder
);
7690 * Select and compile (or reuse) TCS parts (epilog).
7692 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7693 LLVMTargetMachineRef tm
,
7694 struct si_shader
*shader
,
7695 struct pipe_debug_callback
*debug
)
7697 union si_shader_part_key epilog_key
;
7699 /* Get the epilog. */
7700 memset(&epilog_key
, 0, sizeof(epilog_key
));
7701 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7703 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7704 PIPE_SHADER_TESS_CTRL
, false,
7705 &epilog_key
, tm
, debug
,
7706 si_build_tcs_epilog_function
,
7707 "Tessellation Control Shader Epilog");
7708 return shader
->epilog
!= NULL
;
7712 * Select and compile (or reuse) GS parts (prolog).
7714 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7715 LLVMTargetMachineRef tm
,
7716 struct si_shader
*shader
,
7717 struct pipe_debug_callback
*debug
)
7719 union si_shader_part_key prolog_key
;
7721 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7724 memset(&prolog_key
, 0, sizeof(prolog_key
));
7725 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7727 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7728 PIPE_SHADER_GEOMETRY
, true,
7729 &prolog_key
, tm
, debug
,
7730 si_build_gs_prolog_function
,
7731 "Geometry Shader Prolog");
7732 return shader
->prolog
!= NULL
;
7736 * Build the pixel shader prolog function. This handles:
7737 * - two-side color selection and interpolation
7738 * - overriding interpolation parameters for the API PS
7739 * - polygon stippling
7741 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7742 * overriden by other states. (e.g. per-sample interpolation)
7743 * Interpolated colors are stored after the preloaded VGPRs.
7745 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7746 union si_shader_part_key
*key
)
7748 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7749 LLVMTypeRef
*params
;
7750 LLVMValueRef ret
, func
;
7751 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
7753 assert(si_need_ps_prolog(key
));
7755 /* Number of inputs + 8 color elements. */
7756 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
7757 key
->ps_prolog
.num_input_vgprs
+ 8) *
7758 sizeof(LLVMTypeRef
));
7760 /* Declare inputs. */
7762 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7763 params
[num_params
++] = ctx
->i32
;
7764 last_sgpr
= num_params
- 1;
7766 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7767 params
[num_params
++] = ctx
->f32
;
7769 /* Declare outputs (same as inputs + add colors if needed) */
7770 num_returns
= num_params
;
7771 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7772 for (i
= 0; i
< num_color_channels
; i
++)
7773 params
[num_returns
++] = ctx
->f32
;
7775 /* Create the function. */
7776 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
7777 num_params
, last_sgpr
);
7778 func
= ctx
->main_fn
;
7780 /* Copy inputs to outputs. This should be no-op, as the registers match,
7781 * but it will prevent the compiler from overwriting them unintentionally.
7783 ret
= ctx
->return_value
;
7784 for (i
= 0; i
< num_params
; i
++) {
7785 LLVMValueRef p
= LLVMGetParam(func
, i
);
7786 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7789 /* Polygon stippling. */
7790 if (key
->ps_prolog
.states
.poly_stipple
) {
7791 /* POS_FIXED_PT is always last. */
7792 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7793 key
->ps_prolog
.num_input_vgprs
- 1;
7794 LLVMValueRef ptr
[2], list
;
7796 /* Get the pointer to rw buffers. */
7797 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
7798 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
7799 list
= lp_build_gather_values(gallivm
, ptr
, 2);
7800 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
7801 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
7802 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
7804 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7807 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7808 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7809 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7810 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7812 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7813 * The hw doesn't compute CENTROID if the whole wave only
7814 * contains fully-covered quads.
7816 * PRIM_MASK is after user SGPRs.
7818 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7819 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
7820 LLVMConstInt(ctx
->i32
, 31, 0), "");
7821 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
7824 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7825 /* Read PERSP_CENTER. */
7826 for (i
= 0; i
< 2; i
++)
7827 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7828 /* Read PERSP_CENTROID. */
7829 for (i
= 0; i
< 2; i
++)
7830 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7831 /* Select PERSP_CENTROID. */
7832 for (i
= 0; i
< 2; i
++) {
7833 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
7834 center
[i
], centroid
[i
], "");
7835 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7836 tmp
, base
+ 4 + i
, "");
7839 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7840 /* Read LINEAR_CENTER. */
7841 for (i
= 0; i
< 2; i
++)
7842 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7843 /* Read LINEAR_CENTROID. */
7844 for (i
= 0; i
< 2; i
++)
7845 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7846 /* Select LINEAR_CENTROID. */
7847 for (i
= 0; i
< 2; i
++) {
7848 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
7849 center
[i
], centroid
[i
], "");
7850 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7851 tmp
, base
+ 10 + i
, "");
7856 /* Force per-sample interpolation. */
7857 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7858 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7859 LLVMValueRef persp_sample
[2];
7861 /* Read PERSP_SAMPLE. */
7862 for (i
= 0; i
< 2; i
++)
7863 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7864 /* Overwrite PERSP_CENTER. */
7865 for (i
= 0; i
< 2; i
++)
7866 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7867 persp_sample
[i
], base
+ 2 + i
, "");
7868 /* Overwrite PERSP_CENTROID. */
7869 for (i
= 0; i
< 2; i
++)
7870 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7871 persp_sample
[i
], base
+ 4 + i
, "");
7873 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7874 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7875 LLVMValueRef linear_sample
[2];
7877 /* Read LINEAR_SAMPLE. */
7878 for (i
= 0; i
< 2; i
++)
7879 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7880 /* Overwrite LINEAR_CENTER. */
7881 for (i
= 0; i
< 2; i
++)
7882 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7883 linear_sample
[i
], base
+ 8 + i
, "");
7884 /* Overwrite LINEAR_CENTROID. */
7885 for (i
= 0; i
< 2; i
++)
7886 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7887 linear_sample
[i
], base
+ 10 + i
, "");
7890 /* Force center interpolation. */
7891 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7892 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7893 LLVMValueRef persp_center
[2];
7895 /* Read PERSP_CENTER. */
7896 for (i
= 0; i
< 2; i
++)
7897 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7898 /* Overwrite PERSP_SAMPLE. */
7899 for (i
= 0; i
< 2; i
++)
7900 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7901 persp_center
[i
], base
+ i
, "");
7902 /* Overwrite PERSP_CENTROID. */
7903 for (i
= 0; i
< 2; i
++)
7904 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7905 persp_center
[i
], base
+ 4 + i
, "");
7907 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7908 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7909 LLVMValueRef linear_center
[2];
7911 /* Read LINEAR_CENTER. */
7912 for (i
= 0; i
< 2; i
++)
7913 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7914 /* Overwrite LINEAR_SAMPLE. */
7915 for (i
= 0; i
< 2; i
++)
7916 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7917 linear_center
[i
], base
+ 6 + i
, "");
7918 /* Overwrite LINEAR_CENTROID. */
7919 for (i
= 0; i
< 2; i
++)
7920 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
7921 linear_center
[i
], base
+ 10 + i
, "");
7924 /* Interpolate colors. */
7925 for (i
= 0; i
< 2; i
++) {
7926 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7927 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7928 key
->ps_prolog
.face_vgpr_index
;
7929 LLVMValueRef interp
[2], color
[4];
7930 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7935 /* If the interpolation qualifier is not CONSTANT (-1). */
7936 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7937 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7938 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7940 /* Get the (i,j) updated by bc_optimize handling. */
7941 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
7943 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
7944 interp_vgpr
+ 1, "");
7945 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
7946 interp_ij
= LLVMBuildBitCast(gallivm
->builder
, interp_ij
,
7950 /* Use the absolute location of the input. */
7951 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7953 if (key
->ps_prolog
.states
.color_two_side
) {
7954 face
= LLVMGetParam(func
, face_vgpr
);
7955 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
7958 interp_fs_input(ctx
,
7959 key
->ps_prolog
.color_attr_index
[i
],
7960 TGSI_SEMANTIC_COLOR
, i
,
7961 key
->ps_prolog
.num_interp_inputs
,
7962 key
->ps_prolog
.colors_read
, interp_ij
,
7963 prim_mask
, face
, color
);
7966 unsigned chan
= u_bit_scan(&writemask
);
7967 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
7972 /* Tell LLVM to insert WQM instruction sequence when needed. */
7973 if (key
->ps_prolog
.wqm
) {
7974 LLVMAddTargetDependentFunctionAttr(func
,
7975 "amdgpu-ps-wqm-outputs", "");
7978 si_llvm_build_ret(ctx
, ret
);
7982 * Build the pixel shader epilog function. This handles everything that must be
7983 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7985 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7986 union si_shader_part_key
*key
)
7988 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7989 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7990 LLVMTypeRef params
[16+8*4+3];
7991 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7992 int last_sgpr
, num_params
, i
;
7993 struct si_ps_exports exp
= {};
7995 /* Declare input SGPRs. */
7996 params
[SI_PARAM_RW_BUFFERS
] = ctx
->i64
;
7997 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
7998 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
7999 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8000 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8001 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8002 last_sgpr
= SI_PARAM_ALPHA_REF
;
8004 /* Declare input VGPRs. */
8005 num_params
= (last_sgpr
+ 1) +
8006 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8007 key
->ps_epilog
.writes_z
+
8008 key
->ps_epilog
.writes_stencil
+
8009 key
->ps_epilog
.writes_samplemask
;
8011 num_params
= MAX2(num_params
,
8012 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8014 assert(num_params
<= ARRAY_SIZE(params
));
8016 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8017 params
[i
] = ctx
->f32
;
8019 /* Create the function. */
8020 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8021 /* Disable elimination of unused inputs. */
8022 si_llvm_add_attribute(ctx
->main_fn
,
8023 "InitialPSInputAddr", 0xffffff);
8025 /* Process colors. */
8026 unsigned vgpr
= last_sgpr
+ 1;
8027 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8028 int last_color_export
= -1;
8030 /* Find the last color export. */
8031 if (!key
->ps_epilog
.writes_z
&&
8032 !key
->ps_epilog
.writes_stencil
&&
8033 !key
->ps_epilog
.writes_samplemask
) {
8034 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8036 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8037 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8038 /* Just set this if any of the colorbuffers are enabled. */
8040 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8041 last_color_export
= 0;
8043 for (i
= 0; i
< 8; i
++)
8044 if (colors_written
& (1 << i
) &&
8045 (spi_format
>> (i
* 4)) & 0xf)
8046 last_color_export
= i
;
8050 while (colors_written
) {
8051 LLVMValueRef color
[4];
8052 int mrt
= u_bit_scan(&colors_written
);
8054 for (i
= 0; i
< 4; i
++)
8055 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8057 si_export_mrt_color(bld_base
, color
, mrt
,
8059 mrt
== last_color_export
, &exp
);
8062 /* Process depth, stencil, samplemask. */
8063 if (key
->ps_epilog
.writes_z
)
8064 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8065 if (key
->ps_epilog
.writes_stencil
)
8066 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8067 if (key
->ps_epilog
.writes_samplemask
)
8068 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8070 if (depth
|| stencil
|| samplemask
)
8071 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8072 else if (last_color_export
== -1)
8073 si_export_null(bld_base
);
8076 si_emit_ps_exports(ctx
, &exp
);
8079 LLVMBuildRetVoid(gallivm
->builder
);
8083 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8085 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8086 LLVMTargetMachineRef tm
,
8087 struct si_shader
*shader
,
8088 struct pipe_debug_callback
*debug
)
8090 union si_shader_part_key prolog_key
;
8091 union si_shader_part_key epilog_key
;
8093 /* Get the prolog. */
8094 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8096 /* The prolog is a no-op if these aren't set. */
8097 if (si_need_ps_prolog(&prolog_key
)) {
8099 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8100 PIPE_SHADER_FRAGMENT
, true,
8101 &prolog_key
, tm
, debug
,
8102 si_build_ps_prolog_function
,
8103 "Fragment Shader Prolog");
8104 if (!shader
->prolog
)
8108 /* Get the epilog. */
8109 si_get_ps_epilog_key(shader
, &epilog_key
);
8112 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8113 PIPE_SHADER_FRAGMENT
, false,
8114 &epilog_key
, tm
, debug
,
8115 si_build_ps_epilog_function
,
8116 "Fragment Shader Epilog");
8117 if (!shader
->epilog
)
8120 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8121 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8122 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8123 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8126 /* Set up the enable bits for per-sample shading if needed. */
8127 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8128 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8129 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8130 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8131 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8132 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8134 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8135 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8136 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8137 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8138 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8139 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8141 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8142 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8143 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8144 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8145 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8146 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8148 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8149 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8150 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8151 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8152 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8153 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8156 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8157 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8158 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8159 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8160 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8163 /* At least one pair of interpolation weights must be enabled. */
8164 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8165 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8166 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8169 /* The sample mask input is always enabled, because the API shader always
8170 * passes it through to the epilog. Disable it here if it's unused.
8172 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8173 !shader
->selector
->info
.reads_samplemask
)
8174 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8179 static void si_fix_num_sgprs(struct si_shader
*shader
)
8181 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8183 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8186 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8187 struct si_shader
*shader
,
8188 struct pipe_debug_callback
*debug
)
8190 struct si_shader_selector
*sel
= shader
->selector
;
8191 struct si_shader
*mainp
= sel
->main_shader_part
;
8194 /* LS, ES, VS are compiled on demand if the main part hasn't been
8195 * compiled for that stage.
8197 * Vertex shaders are compiled on demand when a vertex fetch
8198 * workaround must be applied.
8200 if (shader
->is_monolithic
) {
8201 /* Monolithic shader (compiled as a whole, has many variants,
8202 * may take a long time to compile).
8204 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8208 /* The shader consists of 2-3 parts:
8210 * - the middle part is the user shader, it has 1 variant only
8211 * and it was compiled during the creation of the shader
8213 * - the prolog part is inserted at the beginning
8214 * - the epilog part is inserted at the end
8216 * The prolog and epilog have many (but simple) variants.
8219 /* Copy the compiled TGSI shader data over. */
8220 shader
->is_binary_shared
= true;
8221 shader
->binary
= mainp
->binary
;
8222 shader
->config
= mainp
->config
;
8223 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8224 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8225 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8226 memcpy(shader
->info
.vs_output_param_offset
,
8227 mainp
->info
.vs_output_param_offset
,
8228 sizeof(mainp
->info
.vs_output_param_offset
));
8229 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8230 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8231 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8233 /* Select prologs and/or epilogs. */
8234 switch (sel
->type
) {
8235 case PIPE_SHADER_VERTEX
:
8236 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8239 case PIPE_SHADER_TESS_CTRL
:
8240 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8243 case PIPE_SHADER_TESS_EVAL
:
8244 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8247 case PIPE_SHADER_GEOMETRY
:
8248 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8251 case PIPE_SHADER_FRAGMENT
:
8252 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8255 /* Make sure we have at least as many VGPRs as there
8256 * are allocated inputs.
8258 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8259 shader
->info
.num_input_vgprs
);
8263 /* Update SGPR and VGPR counts. */
8264 if (shader
->prolog
) {
8265 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8266 shader
->prolog
->config
.num_sgprs
);
8267 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8268 shader
->prolog
->config
.num_vgprs
);
8270 if (shader
->epilog
) {
8271 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8272 shader
->epilog
->config
.num_sgprs
);
8273 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8274 shader
->epilog
->config
.num_vgprs
);
8278 si_fix_num_sgprs(shader
);
8279 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8283 r
= si_shader_binary_upload(sscreen
, shader
);
8285 fprintf(stderr
, "LLVM failed to upload shader\n");
8292 void si_shader_destroy(struct si_shader
*shader
)
8294 if (shader
->scratch_bo
)
8295 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8297 r600_resource_reference(&shader
->bo
, NULL
);
8299 if (!shader
->is_binary_shared
)
8300 radeon_shader_binary_clean(&shader
->binary
);
8302 free(shader
->shader_log
);