2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "util/u_memory.h"
37 #include "util/u_string.h"
38 #include "tgsi/tgsi_build.h"
39 #include "tgsi/tgsi_util.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "ac_binary.h"
43 #include "ac_llvm_util.h"
44 #include "ac_exp_param.h"
45 #include "si_shader_internal.h"
50 static const char *scratch_rsrc_dword0_symbol
=
51 "SCRATCH_RSRC_DWORD0";
53 static const char *scratch_rsrc_dword1_symbol
=
54 "SCRATCH_RSRC_DWORD1";
56 struct si_shader_output_values
58 LLVMValueRef values
[4];
59 unsigned semantic_name
;
60 unsigned semantic_index
;
61 ubyte vertex_stream
[4];
64 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
65 struct si_screen
*sscreen
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
75 static unsigned llvm_get_type_size(LLVMTypeRef type
);
77 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
86 /* Ideally pass the sample mask input to the PS epilog as v13, which
87 * is its usual location, so that the shader doesn't have to add v_mov.
89 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
96 static bool is_merged_shader(struct si_shader
*shader
)
98 if (shader
->selector
->screen
->b
.chip_class
<= VI
)
101 return shader
->key
.as_ls
||
103 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
104 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
108 * Returns a unique index for a per-patch semantic name and index. The index
109 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
112 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
114 switch (semantic_name
) {
115 case TGSI_SEMANTIC_TESSOUTER
:
117 case TGSI_SEMANTIC_TESSINNER
:
119 case TGSI_SEMANTIC_PATCH
:
124 assert(!"invalid semantic name");
130 * Returns a unique index for a semantic name and index. The index must be
131 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
134 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
136 switch (semantic_name
) {
137 case TGSI_SEMANTIC_POSITION
:
139 case TGSI_SEMANTIC_GENERIC
:
140 /* Since some shader stages use the the highest used IO index
141 * to determine the size to allocate for inputs/outputs
142 * (in LDS, tess and GS rings). GENERIC should be placed right
143 * after POSITION to make that size as small as possible.
145 if (index
< SI_MAX_IO_GENERIC
)
148 assert(!"invalid generic index");
150 case TGSI_SEMANTIC_PSIZE
:
151 return SI_MAX_IO_GENERIC
+ 1;
152 case TGSI_SEMANTIC_CLIPDIST
:
154 return SI_MAX_IO_GENERIC
+ 2 + index
;
155 case TGSI_SEMANTIC_FOG
:
156 return SI_MAX_IO_GENERIC
+ 4;
157 case TGSI_SEMANTIC_LAYER
:
158 return SI_MAX_IO_GENERIC
+ 5;
159 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
160 return SI_MAX_IO_GENERIC
+ 6;
161 case TGSI_SEMANTIC_PRIMID
:
162 return SI_MAX_IO_GENERIC
+ 7;
163 case TGSI_SEMANTIC_COLOR
: /* these alias */
164 case TGSI_SEMANTIC_BCOLOR
:
166 return SI_MAX_IO_GENERIC
+ 8 + index
;
167 case TGSI_SEMANTIC_TEXCOORD
:
169 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
170 return SI_MAX_IO_GENERIC
+ 10 + index
;
172 assert(!"invalid semantic name");
178 * Get the value of a shader input parameter and extract a bitfield.
180 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
181 unsigned param
, unsigned rshift
,
184 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
185 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
188 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
189 value
= bitcast(&ctx
->bld_base
,
190 TGSI_TYPE_UNSIGNED
, value
);
193 value
= LLVMBuildLShr(gallivm
->builder
, value
,
194 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
196 if (rshift
+ bitwidth
< 32) {
197 unsigned mask
= (1 << bitwidth
) - 1;
198 value
= LLVMBuildAnd(gallivm
->builder
, value
,
199 LLVMConstInt(ctx
->i32
, mask
, 0), "");
205 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
208 case PIPE_SHADER_TESS_CTRL
:
209 return unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 0, 8);
211 case PIPE_SHADER_TESS_EVAL
:
212 return LLVMGetParam(ctx
->main_fn
,
213 ctx
->param_tes_rel_patch_id
);
221 /* Tessellation shaders pass outputs to the next shader using LDS.
223 * LS outputs = TCS inputs
224 * TCS outputs = TES inputs
227 * - TCS inputs for patch 0
228 * - TCS inputs for patch 1
229 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
231 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
232 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
233 * - TCS outputs for patch 1
234 * - Per-patch TCS outputs for patch 1
235 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
236 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
239 * All three shaders VS(LS), TCS, TES share the same LDS space.
243 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
245 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
249 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
251 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
255 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
257 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
259 ctx
->param_tcs_out_lds_offsets
,
265 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
267 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
269 ctx
->param_tcs_out_lds_offsets
,
275 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
277 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
278 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
279 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
281 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
285 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
287 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
288 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
289 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
290 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
292 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
293 LLVMBuildMul(gallivm
->builder
, patch_stride
,
299 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
301 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
302 LLVMValueRef patch0_patch_data_offset
=
303 get_tcs_out_patch0_patch_data_offset(ctx
);
304 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
305 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
307 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
308 LLVMBuildMul(gallivm
->builder
, patch_stride
,
313 static LLVMValueRef
get_instance_index_for_fetch(
314 struct si_shader_context
*ctx
,
315 unsigned param_start_instance
, unsigned divisor
)
317 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
319 LLVMValueRef result
= LLVMGetParam(ctx
->main_fn
,
320 ctx
->param_instance_id
);
322 /* The division must be done before START_INSTANCE is added. */
324 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
325 LLVMConstInt(ctx
->i32
, divisor
, 0), "");
327 return LLVMBuildAdd(gallivm
->builder
, result
,
328 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
331 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
333 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
335 unsigned double_index
)
337 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
338 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->gallivm
.context
);
339 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
340 LLVMVectorType(f64
, 2), "");
341 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
342 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
343 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
346 static void declare_input_vs(
347 struct si_shader_context
*ctx
,
348 unsigned input_index
,
349 const struct tgsi_full_declaration
*decl
,
352 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
356 unsigned num_fetches
;
357 unsigned fetch_stride
;
359 LLVMValueRef t_list_ptr
;
360 LLVMValueRef t_offset
;
362 LLVMValueRef vertex_index
;
363 LLVMValueRef input
[3];
365 /* Load the T list */
366 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
368 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
370 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
372 vertex_index
= LLVMGetParam(ctx
->main_fn
,
373 ctx
->param_vertex_index0
+
376 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
378 /* Do multiple loads for special formats. */
380 case SI_FIX_FETCH_RGB_64_FLOAT
:
381 num_fetches
= 3; /* 3 2-dword loads */
384 case SI_FIX_FETCH_RGBA_64_FLOAT
:
385 num_fetches
= 2; /* 2 4-dword loads */
388 case SI_FIX_FETCH_RGB_8
:
389 case SI_FIX_FETCH_RGB_8_INT
:
393 case SI_FIX_FETCH_RGB_16
:
394 case SI_FIX_FETCH_RGB_16_INT
:
403 for (unsigned i
= 0; i
< num_fetches
; i
++) {
404 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
406 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
407 vertex_index
, voffset
,
411 /* Break up the vec4 into individual components */
412 for (chan
= 0; chan
< 4; chan
++) {
413 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
414 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
415 input
[0], llvm_chan
, "");
419 case SI_FIX_FETCH_A2_SNORM
:
420 case SI_FIX_FETCH_A2_SSCALED
:
421 case SI_FIX_FETCH_A2_SINT
: {
422 /* The hardware returns an unsigned value; convert it to a
425 LLVMValueRef tmp
= out
[3];
426 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
428 /* First, recover the sign-extended signed integer value. */
429 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
430 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
432 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
434 /* For the integer-like cases, do a natural sign extension.
436 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
437 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
440 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
441 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
442 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
443 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
445 /* Convert back to the right type. */
446 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
448 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
449 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
450 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
451 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
452 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
453 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
459 case SI_FIX_FETCH_RGBA_32_UNORM
:
460 case SI_FIX_FETCH_RGBX_32_UNORM
:
461 for (chan
= 0; chan
< 4; chan
++) {
462 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
464 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
465 out
[chan
], ctx
->f32
, "");
466 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
467 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
469 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
470 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
471 out
[3] = LLVMConstReal(ctx
->f32
, 1);
473 case SI_FIX_FETCH_RGBA_32_SNORM
:
474 case SI_FIX_FETCH_RGBX_32_SNORM
:
475 case SI_FIX_FETCH_RGBA_32_FIXED
:
476 case SI_FIX_FETCH_RGBX_32_FIXED
: {
478 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
479 scale
= 1.0 / 0x10000;
481 scale
= 1.0 / INT_MAX
;
483 for (chan
= 0; chan
< 4; chan
++) {
484 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
486 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
487 out
[chan
], ctx
->f32
, "");
488 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
489 LLVMConstReal(ctx
->f32
, scale
), "");
491 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
492 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
493 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
494 out
[3] = LLVMConstReal(ctx
->f32
, 1);
497 case SI_FIX_FETCH_RGBA_32_USCALED
:
498 for (chan
= 0; chan
< 4; chan
++) {
499 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
501 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
502 out
[chan
], ctx
->f32
, "");
505 case SI_FIX_FETCH_RGBA_32_SSCALED
:
506 for (chan
= 0; chan
< 4; chan
++) {
507 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
509 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
510 out
[chan
], ctx
->f32
, "");
513 case SI_FIX_FETCH_RG_64_FLOAT
:
514 for (chan
= 0; chan
< 2; chan
++)
515 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
517 out
[2] = LLVMConstReal(ctx
->f32
, 0);
518 out
[3] = LLVMConstReal(ctx
->f32
, 1);
520 case SI_FIX_FETCH_RGB_64_FLOAT
:
521 for (chan
= 0; chan
< 3; chan
++)
522 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
524 out
[3] = LLVMConstReal(ctx
->f32
, 1);
526 case SI_FIX_FETCH_RGBA_64_FLOAT
:
527 for (chan
= 0; chan
< 4; chan
++) {
528 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
532 case SI_FIX_FETCH_RGB_8
:
533 case SI_FIX_FETCH_RGB_8_INT
:
534 case SI_FIX_FETCH_RGB_16
:
535 case SI_FIX_FETCH_RGB_16_INT
:
536 for (chan
= 0; chan
< 3; chan
++) {
537 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
541 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
542 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
543 out
[3] = LLVMConstReal(ctx
->f32
, 1);
545 out
[3] = LLVMBuildBitCast(gallivm
->builder
, ctx
->i32_1
,
552 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
555 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
561 case PIPE_SHADER_VERTEX
:
562 return LLVMGetParam(ctx
->main_fn
,
563 ctx
->param_vs_prim_id
);
564 case PIPE_SHADER_TESS_CTRL
:
565 return LLVMGetParam(ctx
->main_fn
,
566 ctx
->param_tcs_patch_id
);
567 case PIPE_SHADER_TESS_EVAL
:
568 return LLVMGetParam(ctx
->main_fn
,
569 ctx
->param_tes_patch_id
);
570 case PIPE_SHADER_GEOMETRY
:
571 return LLVMGetParam(ctx
->main_fn
,
572 ctx
->param_gs_prim_id
);
580 * Return the value of tgsi_ind_register for indexing.
581 * This is the indirect index with the constant offset added to it.
583 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
584 const struct tgsi_ind_register
*ind
,
587 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
590 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
591 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
592 result
= LLVMBuildAdd(gallivm
->builder
, result
,
593 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
598 * Like get_indirect_index, but restricts the return value to a (possibly
599 * undefined) value inside [0..num).
601 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
602 const struct tgsi_ind_register
*ind
,
603 int rel_index
, unsigned num
)
605 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
607 return si_llvm_bound_index(ctx
, result
, num
);
612 * Calculate a dword address given an input or output register and a stride.
614 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
615 const struct tgsi_full_dst_register
*dst
,
616 const struct tgsi_full_src_register
*src
,
617 LLVMValueRef vertex_dw_stride
,
618 LLVMValueRef base_addr
)
620 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
621 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
622 ubyte
*name
, *index
, *array_first
;
624 struct tgsi_full_dst_register reg
;
626 /* Set the register description. The address computation is the same
627 * for sources and destinations. */
629 reg
.Register
.File
= src
->Register
.File
;
630 reg
.Register
.Index
= src
->Register
.Index
;
631 reg
.Register
.Indirect
= src
->Register
.Indirect
;
632 reg
.Register
.Dimension
= src
->Register
.Dimension
;
633 reg
.Indirect
= src
->Indirect
;
634 reg
.Dimension
= src
->Dimension
;
635 reg
.DimIndirect
= src
->DimIndirect
;
639 /* If the register is 2-dimensional (e.g. an array of vertices
640 * in a primitive), calculate the base address of the vertex. */
641 if (reg
.Register
.Dimension
) {
644 if (reg
.Dimension
.Indirect
)
645 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
646 reg
.Dimension
.Index
);
648 index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
650 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
651 LLVMBuildMul(gallivm
->builder
, index
,
652 vertex_dw_stride
, ""), "");
655 /* Get information about the register. */
656 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
657 name
= info
->input_semantic_name
;
658 index
= info
->input_semantic_index
;
659 array_first
= info
->input_array_first
;
660 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
661 name
= info
->output_semantic_name
;
662 index
= info
->output_semantic_index
;
663 array_first
= info
->output_array_first
;
669 if (reg
.Register
.Indirect
) {
670 /* Add the relative address of the element. */
671 LLVMValueRef ind_index
;
673 if (reg
.Indirect
.ArrayID
)
674 first
= array_first
[reg
.Indirect
.ArrayID
];
676 first
= reg
.Register
.Index
;
678 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
679 reg
.Register
.Index
- first
);
681 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
682 LLVMBuildMul(gallivm
->builder
, ind_index
,
683 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
685 param
= reg
.Register
.Dimension
?
686 si_shader_io_get_unique_index(name
[first
], index
[first
]) :
687 si_shader_io_get_unique_index_patch(name
[first
], index
[first
]);
689 param
= reg
.Register
.Dimension
?
690 si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
691 index
[reg
.Register
.Index
]) :
692 si_shader_io_get_unique_index_patch(name
[reg
.Register
.Index
],
693 index
[reg
.Register
.Index
]);
696 /* Add the base address of the element. */
697 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
698 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
701 /* The offchip buffer layout for TCS->TES is
703 * - attribute 0 of patch 0 vertex 0
704 * - attribute 0 of patch 0 vertex 1
705 * - attribute 0 of patch 0 vertex 2
707 * - attribute 0 of patch 1 vertex 0
708 * - attribute 0 of patch 1 vertex 1
710 * - attribute 1 of patch 0 vertex 0
711 * - attribute 1 of patch 0 vertex 1
713 * - per patch attribute 0 of patch 0
714 * - per patch attribute 0 of patch 1
717 * Note that every attribute has 4 components.
719 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
720 LLVMValueRef rel_patch_id
,
721 LLVMValueRef vertex_index
,
722 LLVMValueRef param_index
)
724 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
725 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
726 LLVMValueRef param_stride
, constant16
;
728 vertices_per_patch
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
729 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
730 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
733 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
735 base_addr
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
736 vertices_per_patch
, "");
738 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
741 param_stride
= total_vertices
;
743 base_addr
= rel_patch_id
;
744 param_stride
= num_patches
;
747 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
748 LLVMBuildMul(gallivm
->builder
, param_index
,
749 param_stride
, ""), "");
751 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
754 LLVMValueRef patch_data_offset
=
755 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
757 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
758 patch_data_offset
, "");
763 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
764 struct si_shader_context
*ctx
,
765 const struct tgsi_full_dst_register
*dst
,
766 const struct tgsi_full_src_register
*src
)
768 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
769 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
770 ubyte
*name
, *index
, *array_first
;
771 struct tgsi_full_src_register reg
;
772 LLVMValueRef vertex_index
= NULL
;
773 LLVMValueRef param_index
= NULL
;
774 unsigned param_index_base
, param_base
;
776 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
778 if (reg
.Register
.Dimension
) {
780 if (reg
.Dimension
.Indirect
)
781 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
782 reg
.Dimension
.Index
);
784 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
787 /* Get information about the register. */
788 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
789 name
= info
->input_semantic_name
;
790 index
= info
->input_semantic_index
;
791 array_first
= info
->input_array_first
;
792 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
793 name
= info
->output_semantic_name
;
794 index
= info
->output_semantic_index
;
795 array_first
= info
->output_array_first
;
801 if (reg
.Register
.Indirect
) {
802 if (reg
.Indirect
.ArrayID
)
803 param_base
= array_first
[reg
.Indirect
.ArrayID
];
805 param_base
= reg
.Register
.Index
;
807 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
808 reg
.Register
.Index
- param_base
);
811 param_base
= reg
.Register
.Index
;
812 param_index
= ctx
->i32_0
;
815 param_index_base
= reg
.Register
.Dimension
?
816 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]) :
817 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]);
819 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
820 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
823 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
824 vertex_index
, param_index
);
827 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
828 enum tgsi_opcode_type type
, unsigned swizzle
,
829 LLVMValueRef buffer
, LLVMValueRef offset
,
830 LLVMValueRef base
, bool can_speculate
)
832 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
833 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
834 LLVMValueRef value
, value2
;
835 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
836 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
839 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
840 0, 1, 0, can_speculate
, false);
842 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
845 if (!tgsi_type_is_64bit(type
)) {
846 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
847 0, 1, 0, can_speculate
, false);
849 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
850 return LLVMBuildExtractElement(gallivm
->builder
, value
,
851 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
854 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
855 swizzle
* 4, 1, 0, can_speculate
, false);
857 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
858 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
860 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
866 * \param type output value type
867 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
868 * \param dw_addr address in dwords
870 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
871 enum tgsi_opcode_type type
, unsigned swizzle
,
872 LLVMValueRef dw_addr
)
874 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
875 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
879 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
881 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
882 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
884 return lp_build_gather_values(gallivm
, values
,
888 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
889 LLVMConstInt(ctx
->i32
, swizzle
, 0));
891 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
892 if (tgsi_type_is_64bit(type
)) {
894 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
896 value2
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
897 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
900 return LLVMBuildBitCast(gallivm
->builder
, value
,
901 tgsi2llvmtype(bld_base
, type
), "");
907 * \param swizzle offset (typically 0..3)
908 * \param dw_addr address in dwords
909 * \param value value to store
911 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
912 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
915 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
916 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
918 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
919 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
921 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
922 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
926 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
929 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
931 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
932 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
933 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
935 uint64_t desc2
= 0xffffffff;
936 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
937 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
938 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
939 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
940 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
941 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
942 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
944 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
945 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
946 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
947 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
950 static LLVMValueRef
fetch_input_tcs(
951 struct lp_build_tgsi_context
*bld_base
,
952 const struct tgsi_full_src_register
*reg
,
953 enum tgsi_opcode_type type
, unsigned swizzle
)
955 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
956 LLVMValueRef dw_addr
, stride
;
958 stride
= unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
959 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
960 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
962 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
965 static LLVMValueRef
fetch_output_tcs(
966 struct lp_build_tgsi_context
*bld_base
,
967 const struct tgsi_full_src_register
*reg
,
968 enum tgsi_opcode_type type
, unsigned swizzle
)
970 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
971 LLVMValueRef dw_addr
, stride
;
973 if (reg
->Register
.Dimension
) {
974 stride
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 8);
975 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
976 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
978 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
979 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
982 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
985 static LLVMValueRef
fetch_input_tes(
986 struct lp_build_tgsi_context
*bld_base
,
987 const struct tgsi_full_src_register
*reg
,
988 enum tgsi_opcode_type type
, unsigned swizzle
)
990 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
991 LLVMValueRef buffer
, base
, addr
;
993 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
995 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
996 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
998 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
, true);
1001 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1002 const struct tgsi_full_instruction
*inst
,
1003 const struct tgsi_opcode_info
*info
,
1004 LLVMValueRef dst
[4])
1006 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1007 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1008 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
1009 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1010 unsigned chan_index
;
1011 LLVMValueRef dw_addr
, stride
;
1012 LLVMValueRef buffer
, base
, buf_addr
;
1013 LLVMValueRef values
[4];
1014 bool skip_lds_store
;
1015 bool is_tess_factor
= false;
1017 /* Only handle per-patch and per-vertex outputs here.
1018 * Vectors will be lowered to scalars and this function will be called again.
1020 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1021 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1022 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
1026 if (reg
->Register
.Dimension
) {
1027 stride
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 8);
1028 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1029 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1030 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1032 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1033 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1034 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1036 if (!reg
->Register
.Indirect
) {
1037 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1039 /* Always write tess factors into LDS for the TCS epilog. */
1040 if (name
== TGSI_SEMANTIC_TESSINNER
||
1041 name
== TGSI_SEMANTIC_TESSOUTER
) {
1042 skip_lds_store
= false;
1043 is_tess_factor
= true;
1048 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1050 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1051 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1054 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1055 LLVMValueRef value
= dst
[chan_index
];
1057 if (inst
->Instruction
.Saturate
)
1058 value
= ac_build_clamp(&ctx
->ac
, value
);
1060 /* Skip LDS stores if there is no LDS read of this output. */
1061 if (!skip_lds_store
)
1062 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1064 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1065 values
[chan_index
] = value
;
1067 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1068 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1070 4 * chan_index
, 1, 0, true, false);
1074 if (inst
->Dst
[0].Register
.WriteMask
== 0xF && !is_tess_factor
) {
1075 LLVMValueRef value
= lp_build_gather_values(gallivm
,
1077 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1078 base
, 0, 1, 0, true, false);
1082 static LLVMValueRef
fetch_input_gs(
1083 struct lp_build_tgsi_context
*bld_base
,
1084 const struct tgsi_full_src_register
*reg
,
1085 enum tgsi_opcode_type type
,
1088 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1089 struct si_shader
*shader
= ctx
->shader
;
1090 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1091 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1092 LLVMValueRef vtx_offset
, soffset
;
1093 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1094 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1095 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1099 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1100 return get_primitive_id(bld_base
, swizzle
);
1102 if (!reg
->Register
.Dimension
)
1105 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1107 /* GFX9 has the ESGS ring in LDS. */
1108 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
1109 unsigned index
= reg
->Dimension
.Index
;
1111 switch (index
/ 2) {
1113 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1114 index
% 2 ? 16 : 0, 16);
1117 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1118 index
% 2 ? 16 : 0, 16);
1121 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1122 index
% 2 ? 16 : 0, 16);
1129 vtx_offset
= LLVMBuildAdd(gallivm
->builder
, vtx_offset
,
1130 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1131 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1134 /* GFX6: input load from the ESGS ring in memory. */
1135 if (swizzle
== ~0) {
1136 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1138 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1139 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1141 return lp_build_gather_values(gallivm
, values
,
1145 /* Get the vertex offset parameter on GFX6. */
1146 unsigned vtx_offset_param
= reg
->Dimension
.Index
;
1147 if (vtx_offset_param
< 2) {
1148 vtx_offset_param
+= ctx
->param_gs_vtx0_offset
;
1150 assert(vtx_offset_param
< 6);
1151 vtx_offset_param
+= ctx
->param_gs_vtx2_offset
- 2;
1153 vtx_offset
= lp_build_mul_imm(uint
,
1154 LLVMGetParam(ctx
->main_fn
,
1158 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1160 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1161 vtx_offset
, soffset
, 0, 1, 0, true, false);
1162 if (tgsi_type_is_64bit(type
)) {
1163 LLVMValueRef value2
;
1164 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1166 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1167 ctx
->i32_0
, vtx_offset
, soffset
,
1168 0, 1, 0, true, false);
1169 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1172 return LLVMBuildBitCast(gallivm
->builder
,
1174 tgsi2llvmtype(bld_base
, type
), "");
1177 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1179 switch (interpolate
) {
1180 case TGSI_INTERPOLATE_CONSTANT
:
1183 case TGSI_INTERPOLATE_LINEAR
:
1184 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1185 return SI_PARAM_LINEAR_SAMPLE
;
1186 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1187 return SI_PARAM_LINEAR_CENTROID
;
1189 return SI_PARAM_LINEAR_CENTER
;
1191 case TGSI_INTERPOLATE_COLOR
:
1192 case TGSI_INTERPOLATE_PERSPECTIVE
:
1193 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1194 return SI_PARAM_PERSP_SAMPLE
;
1195 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1196 return SI_PARAM_PERSP_CENTROID
;
1198 return SI_PARAM_PERSP_CENTER
;
1201 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1207 * Interpolate a fragment shader input.
1209 * @param ctx context
1210 * @param input_index index of the input in hardware
1211 * @param semantic_name TGSI_SEMANTIC_*
1212 * @param semantic_index semantic index
1213 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1214 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1215 * @param interp_param interpolation weights (i,j)
1216 * @param prim_mask SI_PARAM_PRIM_MASK
1217 * @param face SI_PARAM_FRONT_FACE
1218 * @param result the return value (4 components)
1220 static void interp_fs_input(struct si_shader_context
*ctx
,
1221 unsigned input_index
,
1222 unsigned semantic_name
,
1223 unsigned semantic_index
,
1224 unsigned num_interp_inputs
,
1225 unsigned colors_read_mask
,
1226 LLVMValueRef interp_param
,
1227 LLVMValueRef prim_mask
,
1229 LLVMValueRef result
[4])
1231 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1232 LLVMValueRef attr_number
;
1237 /* fs.constant returns the param from the middle vertex, so it's not
1238 * really useful for flat shading. It's meant to be used for custom
1239 * interpolation (but the intrinsic can't fetch from the other two
1242 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1243 * to do the right thing. The only reason we use fs.constant is that
1244 * fs.interp cannot be used on integers, because they can be equal
1247 * When interp is false we will use fs.constant or for newer llvm,
1248 * amdgcn.interp.mov.
1250 bool interp
= interp_param
!= NULL
;
1252 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
1255 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1256 LLVMVectorType(ctx
->f32
, 2), "");
1258 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1260 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1264 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1265 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1266 LLVMValueRef is_face_positive
;
1267 LLVMValueRef back_attr_number
;
1269 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1270 * otherwise it's at offset "num_inputs".
1272 unsigned back_attr_offset
= num_interp_inputs
;
1273 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1274 back_attr_offset
+= 1;
1276 back_attr_number
= LLVMConstInt(ctx
->i32
, back_attr_offset
, 0);
1278 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1279 face
, ctx
->i32_0
, "");
1281 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1282 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1283 LLVMValueRef front
, back
;
1286 front
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1287 attr_number
, prim_mask
,
1289 back
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1290 back_attr_number
, prim_mask
,
1293 front
= ac_build_fs_interp_mov(&ctx
->ac
,
1294 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1295 llvm_chan
, attr_number
, prim_mask
);
1296 back
= ac_build_fs_interp_mov(&ctx
->ac
,
1297 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1298 llvm_chan
, back_attr_number
, prim_mask
);
1301 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1307 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1309 result
[0] = ac_build_fs_interp(&ctx
->ac
, ctx
->i32_0
,
1310 attr_number
, prim_mask
, i
, j
);
1312 result
[0] = ac_build_fs_interp_mov(&ctx
->ac
, ctx
->i32_0
,
1313 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1314 attr_number
, prim_mask
);
1317 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1318 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1320 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1321 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1324 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
1325 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1327 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
1328 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1329 llvm_chan
, attr_number
, prim_mask
);
1335 static void declare_input_fs(
1336 struct si_shader_context
*ctx
,
1337 unsigned input_index
,
1338 const struct tgsi_full_declaration
*decl
,
1339 LLVMValueRef out
[4])
1341 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1342 struct si_shader
*shader
= ctx
->shader
;
1343 LLVMValueRef main_fn
= ctx
->main_fn
;
1344 LLVMValueRef interp_param
= NULL
;
1345 int interp_param_idx
;
1347 /* Get colors from input VGPRs (set by the prolog). */
1348 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1349 unsigned i
= decl
->Semantic
.Index
;
1350 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1351 unsigned mask
= colors_read
>> (i
* 4);
1352 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1353 (i
? util_bitcount(colors_read
& 0xf) : 0);
1355 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1356 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1357 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1358 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1362 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1363 decl
->Interp
.Location
);
1364 if (interp_param_idx
== -1)
1366 else if (interp_param_idx
) {
1367 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1370 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1371 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1372 shader
->selector
->info
.colors_read
, interp_param
,
1373 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1374 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1378 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1380 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1385 * Load a dword from a constant buffer.
1387 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1388 LLVMValueRef resource
,
1389 LLVMValueRef offset
)
1391 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1392 0, 0, 0, true, true);
1395 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1397 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1398 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1399 LLVMBuilderRef builder
= gallivm
->builder
;
1400 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1401 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1402 LLVMValueRef resource
= ac_build_indexed_load_const(&ctx
->ac
, desc
, buf_index
);
1404 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1405 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1406 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1408 LLVMValueRef pos
[4] = {
1409 buffer_load_const(ctx
, resource
, offset0
),
1410 buffer_load_const(ctx
, resource
, offset1
),
1411 LLVMConstReal(ctx
->f32
, 0),
1412 LLVMConstReal(ctx
->f32
, 0)
1415 return lp_build_gather_values(gallivm
, pos
, 4);
1418 static void declare_system_value(struct si_shader_context
*ctx
,
1420 const struct tgsi_full_declaration
*decl
)
1422 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1423 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1424 LLVMValueRef value
= 0;
1426 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1428 switch (decl
->Semantic
.Name
) {
1429 case TGSI_SEMANTIC_INSTANCEID
:
1430 value
= LLVMGetParam(ctx
->main_fn
,
1431 ctx
->param_instance_id
);
1434 case TGSI_SEMANTIC_VERTEXID
:
1435 value
= LLVMBuildAdd(gallivm
->builder
,
1436 LLVMGetParam(ctx
->main_fn
,
1437 ctx
->param_vertex_id
),
1438 LLVMGetParam(ctx
->main_fn
,
1439 ctx
->param_base_vertex
), "");
1442 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1443 /* Unused. Clarify the meaning in indexed vs. non-indexed
1444 * draws if this is ever used again. */
1448 case TGSI_SEMANTIC_BASEVERTEX
:
1450 /* For non-indexed draws, the base vertex set by the driver
1451 * (for direct draws) or the CP (for indirect draws) is the
1452 * first vertex ID, but GLSL expects 0 to be returned.
1454 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
1455 LLVMValueRef indexed
;
1457 indexed
= LLVMBuildLShr(gallivm
->builder
, vs_state
, ctx
->i32_1
, "");
1458 indexed
= LLVMBuildTrunc(gallivm
->builder
, indexed
, ctx
->i1
, "");
1460 value
= LLVMBuildSelect(gallivm
->builder
, indexed
,
1461 LLVMGetParam(ctx
->main_fn
, ctx
->param_base_vertex
),
1466 case TGSI_SEMANTIC_BASEINSTANCE
:
1467 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_start_instance
);
1470 case TGSI_SEMANTIC_DRAWID
:
1471 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_draw_id
);
1474 case TGSI_SEMANTIC_INVOCATIONID
:
1475 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1476 value
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
1477 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1478 value
= LLVMGetParam(ctx
->main_fn
,
1479 ctx
->param_gs_instance_id
);
1481 assert(!"INVOCATIONID not implemented");
1484 case TGSI_SEMANTIC_POSITION
:
1486 LLVMValueRef pos
[4] = {
1487 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1488 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1489 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1490 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
1491 LLVMGetParam(ctx
->main_fn
,
1492 SI_PARAM_POS_W_FLOAT
)),
1494 value
= lp_build_gather_values(gallivm
, pos
, 4);
1498 case TGSI_SEMANTIC_FACE
:
1499 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_FRONT_FACE
);
1502 case TGSI_SEMANTIC_SAMPLEID
:
1503 value
= get_sample_id(ctx
);
1506 case TGSI_SEMANTIC_SAMPLEPOS
: {
1507 LLVMValueRef pos
[4] = {
1508 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1509 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1510 LLVMConstReal(ctx
->f32
, 0),
1511 LLVMConstReal(ctx
->f32
, 0)
1513 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1514 TGSI_OPCODE_FRC
, pos
[0]);
1515 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1516 TGSI_OPCODE_FRC
, pos
[1]);
1517 value
= lp_build_gather_values(gallivm
, pos
, 4);
1521 case TGSI_SEMANTIC_SAMPLEMASK
:
1522 /* This can only occur with the OpenGL Core profile, which
1523 * doesn't support smoothing.
1525 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1528 case TGSI_SEMANTIC_TESSCOORD
:
1530 LLVMValueRef coord
[4] = {
1531 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1532 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1537 /* For triangles, the vector should be (u, v, 1-u-v). */
1538 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1539 PIPE_PRIM_TRIANGLES
)
1540 coord
[2] = lp_build_sub(bld
, bld
->one
,
1541 lp_build_add(bld
, coord
[0], coord
[1]));
1543 value
= lp_build_gather_values(gallivm
, coord
, 4);
1547 case TGSI_SEMANTIC_VERTICESIN
:
1548 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1549 value
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1550 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1551 value
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
1553 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1556 case TGSI_SEMANTIC_TESSINNER
:
1557 case TGSI_SEMANTIC_TESSOUTER
:
1559 LLVMValueRef buffer
, base
, addr
;
1560 int param
= si_shader_io_get_unique_index_patch(decl
->Semantic
.Name
, 0);
1562 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1564 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1565 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1566 LLVMConstInt(ctx
->i32
, param
, 0));
1568 value
= buffer_load(&ctx
->bld_base
, TGSI_TYPE_FLOAT
,
1569 ~0, buffer
, base
, addr
, true);
1574 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1575 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1577 LLVMValueRef buf
, slot
, val
[4];
1580 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1581 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1582 buf
= ac_build_indexed_load_const(&ctx
->ac
, buf
, slot
);
1583 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1585 for (i
= 0; i
< 4; i
++)
1586 val
[i
] = buffer_load_const(ctx
, buf
,
1587 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1588 value
= lp_build_gather_values(gallivm
, val
, 4);
1592 case TGSI_SEMANTIC_PRIMID
:
1593 value
= get_primitive_id(&ctx
->bld_base
, 0);
1596 case TGSI_SEMANTIC_GRID_SIZE
:
1597 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_grid_size
);
1600 case TGSI_SEMANTIC_BLOCK_SIZE
:
1602 LLVMValueRef values
[3];
1604 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1606 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1607 unsigned sizes
[3] = {
1608 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1609 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1610 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1613 for (i
= 0; i
< 3; ++i
)
1614 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1616 value
= lp_build_gather_values(gallivm
, values
, 3);
1618 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1623 case TGSI_SEMANTIC_BLOCK_ID
:
1625 LLVMValueRef values
[3];
1627 for (int i
= 0; i
< 3; i
++) {
1628 values
[i
] = ctx
->i32_0
;
1629 if (ctx
->param_block_id
[i
] >= 0) {
1630 values
[i
] = LLVMGetParam(ctx
->main_fn
,
1631 ctx
->param_block_id
[i
]);
1634 value
= lp_build_gather_values(gallivm
, values
, 3);
1638 case TGSI_SEMANTIC_THREAD_ID
:
1639 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_thread_id
);
1642 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1643 value
= lp_build_intrinsic(gallivm
->builder
,
1644 "llvm.amdgcn.ps.live",
1646 LP_FUNC_ATTR_READNONE
);
1647 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1648 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1651 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
1652 value
= LLVMConstInt(ctx
->i32
, 64, 0);
1655 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
1656 value
= ac_get_thread_id(&ctx
->ac
);
1659 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
1661 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1662 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1663 value
= LLVMBuildShl(gallivm
->builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
1664 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1668 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
1669 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
1670 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
1671 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
1673 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1674 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
1675 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
1676 /* All bits set except LSB */
1677 value
= LLVMConstInt(ctx
->i64
, -2, 0);
1680 value
= LLVMConstInt(ctx
->i64
, -1, 0);
1682 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1683 value
= LLVMBuildShl(gallivm
->builder
, value
, id
, "");
1684 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
1685 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
1686 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1687 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1692 assert(!"unknown system value");
1696 ctx
->system_values
[index
] = value
;
1699 static void declare_compute_memory(struct si_shader_context
*ctx
,
1700 const struct tgsi_full_declaration
*decl
)
1702 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1703 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1705 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1708 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1709 assert(decl
->Range
.First
== decl
->Range
.Last
);
1710 assert(!ctx
->shared_memory
);
1712 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1713 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1716 LLVMSetAlignment(var
, 4);
1718 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1721 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1723 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1724 ctx
->param_const_and_shader_buffers
);
1726 return ac_build_indexed_load_const(&ctx
->ac
, list_ptr
,
1727 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
1730 static LLVMValueRef
fetch_constant(
1731 struct lp_build_tgsi_context
*bld_base
,
1732 const struct tgsi_full_src_register
*reg
,
1733 enum tgsi_opcode_type type
,
1736 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1737 struct lp_build_context
*base
= &bld_base
->base
;
1738 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1741 LLVMValueRef addr
, bufp
;
1742 LLVMValueRef result
;
1744 if (swizzle
== LP_CHAN_ALL
) {
1746 LLVMValueRef values
[4];
1747 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1748 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1750 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
1753 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1754 idx
= reg
->Register
.Index
* 4 + swizzle
;
1756 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1757 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
1759 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1760 reg
->Dimension
.Index
,
1761 ctx
->num_const_buffers
);
1762 index
= LLVMBuildAdd(ctx
->gallivm
.builder
, index
,
1763 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
1764 bufp
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, index
);
1766 bufp
= load_const_buffer_desc(ctx
, buf
);
1768 if (reg
->Register
.Indirect
) {
1769 addr
= ctx
->addrs
[ireg
->Index
][ireg
->Swizzle
];
1770 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1771 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1772 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1773 LLVMConstInt(ctx
->i32
, idx
* 4, 0));
1775 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1778 result
= buffer_load_const(ctx
, bufp
, addr
);
1780 if (!tgsi_type_is_64bit(type
))
1781 result
= bitcast(bld_base
, type
, result
);
1783 LLVMValueRef addr2
, result2
;
1785 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1786 LLVMConstInt(ctx
->i32
, 4, 0));
1787 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1789 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1795 /* Upper 16 bits must be zero. */
1796 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
1797 LLVMValueRef val
[2])
1799 return LLVMBuildOr(ctx
->gallivm
.builder
, val
[0],
1800 LLVMBuildShl(ctx
->gallivm
.builder
, val
[1],
1801 LLVMConstInt(ctx
->i32
, 16, 0),
1805 /* Upper 16 bits are ignored and will be dropped. */
1806 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
1807 LLVMValueRef val
[2])
1809 LLVMValueRef v
[2] = {
1810 LLVMBuildAnd(ctx
->gallivm
.builder
, val
[0],
1811 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
1814 return si_llvm_pack_two_int16(ctx
, v
);
1817 /* Initialize arguments for the shader export intrinsic */
1818 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1819 LLVMValueRef
*values
,
1821 struct ac_export_args
*args
)
1823 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1824 struct lp_build_context
*base
= &bld_base
->base
;
1825 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1826 LLVMValueRef val
[4];
1827 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1829 bool is_int8
, is_int10
;
1831 /* Default is 0xf. Adjusted below depending on the format. */
1832 args
->enabled_channels
= 0xf; /* writemask */
1834 /* Specify whether the EXEC mask represents the valid mask */
1835 args
->valid_mask
= 0;
1837 /* Specify whether this is the last export */
1840 /* Specify the target we are exporting */
1841 args
->target
= target
;
1843 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1844 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1845 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1846 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1848 assert(cbuf
>= 0 && cbuf
< 8);
1849 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1850 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1851 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
1854 args
->compr
= false;
1855 args
->out
[0] = base
->undef
;
1856 args
->out
[1] = base
->undef
;
1857 args
->out
[2] = base
->undef
;
1858 args
->out
[3] = base
->undef
;
1860 switch (spi_shader_col_format
) {
1861 case V_028714_SPI_SHADER_ZERO
:
1862 args
->enabled_channels
= 0; /* writemask */
1863 args
->target
= V_008DFC_SQ_EXP_NULL
;
1866 case V_028714_SPI_SHADER_32_R
:
1867 args
->enabled_channels
= 1; /* writemask */
1868 args
->out
[0] = values
[0];
1871 case V_028714_SPI_SHADER_32_GR
:
1872 args
->enabled_channels
= 0x3; /* writemask */
1873 args
->out
[0] = values
[0];
1874 args
->out
[1] = values
[1];
1877 case V_028714_SPI_SHADER_32_AR
:
1878 args
->enabled_channels
= 0x9; /* writemask */
1879 args
->out
[0] = values
[0];
1880 args
->out
[3] = values
[3];
1883 case V_028714_SPI_SHADER_FP16_ABGR
:
1884 args
->compr
= 1; /* COMPR flag */
1886 for (chan
= 0; chan
< 2; chan
++) {
1887 LLVMValueRef pack_args
[2] = {
1889 values
[2 * chan
+ 1]
1891 LLVMValueRef packed
;
1893 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
1895 LLVMBuildBitCast(ctx
->gallivm
.builder
,
1896 packed
, ctx
->f32
, "");
1900 case V_028714_SPI_SHADER_UNORM16_ABGR
:
1901 for (chan
= 0; chan
< 4; chan
++) {
1902 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
1903 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1904 LLVMConstReal(ctx
->f32
, 65535), "");
1905 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1906 LLVMConstReal(ctx
->f32
, 0.5), "");
1907 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
1911 args
->compr
= 1; /* COMPR flag */
1912 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1913 si_llvm_pack_two_int16(ctx
, val
));
1914 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1915 si_llvm_pack_two_int16(ctx
, val
+2));
1918 case V_028714_SPI_SHADER_SNORM16_ABGR
:
1919 for (chan
= 0; chan
< 4; chan
++) {
1920 /* Clamp between [-1, 1]. */
1921 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
1923 LLVMConstReal(ctx
->f32
, 1));
1924 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
1926 LLVMConstReal(ctx
->f32
, -1));
1927 /* Convert to a signed integer in [-32767, 32767]. */
1928 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1929 LLVMConstReal(ctx
->f32
, 32767), "");
1930 /* If positive, add 0.5, else add -0.5. */
1931 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1932 LLVMBuildSelect(builder
,
1933 LLVMBuildFCmp(builder
, LLVMRealOGE
,
1934 val
[chan
], base
->zero
, ""),
1935 LLVMConstReal(ctx
->f32
, 0.5),
1936 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
1937 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
1940 args
->compr
= 1; /* COMPR flag */
1941 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1942 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1943 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1944 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1947 case V_028714_SPI_SHADER_UINT16_ABGR
: {
1948 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1949 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
1950 LLVMValueRef max_alpha
=
1951 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
1954 for (chan
= 0; chan
< 4; chan
++) {
1955 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1956 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
1958 chan
== 3 ? max_alpha
: max_rgb
);
1961 args
->compr
= 1; /* COMPR flag */
1962 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1963 si_llvm_pack_two_int16(ctx
, val
));
1964 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1965 si_llvm_pack_two_int16(ctx
, val
+2));
1969 case V_028714_SPI_SHADER_SINT16_ABGR
: {
1970 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1971 is_int8
? 127 : is_int10
? 511 : 32767, 0);
1972 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
1973 is_int8
? -128 : is_int10
? -512 : -32768, 0);
1974 LLVMValueRef max_alpha
=
1975 !is_int10
? max_rgb
: ctx
->i32_1
;
1976 LLVMValueRef min_alpha
=
1977 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
1980 for (chan
= 0; chan
< 4; chan
++) {
1981 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1982 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1984 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
1985 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1987 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
1990 args
->compr
= 1; /* COMPR flag */
1991 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1992 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1993 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1994 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1998 case V_028714_SPI_SHADER_32_ABGR
:
1999 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2004 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2007 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2009 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2010 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2011 SI_PARAM_ALPHA_REF
);
2013 LLVMValueRef alpha_pass
=
2014 lp_build_cmp(&bld_base
->base
,
2015 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2018 lp_build_select(&bld_base
->base
,
2020 LLVMConstReal(ctx
->f32
, 1.0f
),
2021 LLVMConstReal(ctx
->f32
, -1.0f
));
2023 ac_build_kill(&ctx
->ac
, arg
);
2025 ac_build_kill(&ctx
->ac
, NULL
);
2029 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2031 unsigned samplemask_param
)
2033 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2034 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2035 LLVMValueRef coverage
;
2037 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2038 coverage
= LLVMGetParam(ctx
->main_fn
,
2040 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
2042 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
2044 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2046 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2049 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2050 LLVMConstReal(ctx
->f32
,
2051 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2053 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2056 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2057 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2059 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2060 struct lp_build_context
*base
= &bld_base
->base
;
2063 unsigned const_chan
;
2064 LLVMValueRef base_elt
;
2065 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2066 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2067 SI_VS_CONST_CLIP_PLANES
, 0);
2068 LLVMValueRef const_resource
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, constbuf_index
);
2070 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2071 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2076 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2078 /* Compute dot products of position and user clip plane vectors */
2079 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2080 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2082 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2083 const_chan
) * 4, 0);
2084 base_elt
= buffer_load_const(ctx
, const_resource
,
2087 lp_build_add(base
, args
->out
[chan
],
2088 lp_build_mul(base
, base_elt
,
2089 out_elts
[const_chan
]));
2093 args
->enabled_channels
= 0xf;
2094 args
->valid_mask
= 0;
2096 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2101 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2105 if (so
->num_outputs
)
2106 fprintf(stderr
, "STREAMOUT\n");
2108 for (i
= 0; i
< so
->num_outputs
; i
++) {
2109 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2110 so
->output
[i
].start_component
;
2111 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2112 i
, so
->output
[i
].output_buffer
,
2113 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2114 so
->output
[i
].register_index
,
2115 mask
& 1 ? "x" : "",
2116 mask
& 2 ? "y" : "",
2117 mask
& 4 ? "z" : "",
2118 mask
& 8 ? "w" : "");
2122 static void emit_streamout_output(struct si_shader_context
*ctx
,
2123 LLVMValueRef
const *so_buffers
,
2124 LLVMValueRef
const *so_write_offsets
,
2125 struct pipe_stream_output
*stream_out
,
2126 struct si_shader_output_values
*shader_out
)
2128 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2129 LLVMBuilderRef builder
= gallivm
->builder
;
2130 unsigned buf_idx
= stream_out
->output_buffer
;
2131 unsigned start
= stream_out
->start_component
;
2132 unsigned num_comps
= stream_out
->num_components
;
2133 LLVMValueRef out
[4];
2135 assert(num_comps
&& num_comps
<= 4);
2136 if (!num_comps
|| num_comps
> 4)
2139 /* Load the output as int. */
2140 for (int j
= 0; j
< num_comps
; j
++) {
2141 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2143 out
[j
] = LLVMBuildBitCast(builder
,
2144 shader_out
->values
[start
+ j
],
2148 /* Pack the output. */
2149 LLVMValueRef vdata
= NULL
;
2151 switch (num_comps
) {
2152 case 1: /* as i32 */
2155 case 2: /* as v2i32 */
2156 case 3: /* as v4i32 (aligned to 4) */
2157 case 4: /* as v4i32 */
2158 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2159 for (int j
= 0; j
< num_comps
; j
++) {
2160 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2161 LLVMConstInt(ctx
->i32
, j
, 0), "");
2166 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2168 so_write_offsets
[buf_idx
],
2170 stream_out
->dst_offset
* 4, 1, 1, true, false);
2174 * Write streamout data to buffers for vertex stream @p stream (different
2175 * vertex streams can occur for GS copy shaders).
2177 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2178 struct si_shader_output_values
*outputs
,
2179 unsigned noutput
, unsigned stream
)
2181 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2182 struct pipe_stream_output_info
*so
= &sel
->so
;
2183 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2184 LLVMBuilderRef builder
= gallivm
->builder
;
2186 struct lp_build_if_state if_ctx
;
2188 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2189 LLVMValueRef so_vtx_count
=
2190 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2192 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2194 /* can_emit = tid < so_vtx_count; */
2195 LLVMValueRef can_emit
=
2196 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2198 /* Emit the streamout code conditionally. This actually avoids
2199 * out-of-bounds buffer access. The hw tells us via the SGPR
2200 * (so_vtx_count) which threads are allowed to emit streamout data. */
2201 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2203 /* The buffer offset is computed as follows:
2204 * ByteOffset = streamout_offset[buffer_id]*4 +
2205 * (streamout_write_index + thread_id)*stride[buffer_id] +
2209 LLVMValueRef so_write_index
=
2210 LLVMGetParam(ctx
->main_fn
,
2211 ctx
->param_streamout_write_index
);
2213 /* Compute (streamout_write_index + thread_id). */
2214 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2216 /* Load the descriptor and compute the write offset for each
2217 * enabled buffer. */
2218 LLVMValueRef so_write_offset
[4] = {};
2219 LLVMValueRef so_buffers
[4];
2220 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2221 ctx
->param_rw_buffers
);
2223 for (i
= 0; i
< 4; i
++) {
2227 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2228 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2230 so_buffers
[i
] = ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
2232 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2233 ctx
->param_streamout_offset
[i
]);
2234 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2236 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2237 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2238 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2241 /* Write streamout data. */
2242 for (i
= 0; i
< so
->num_outputs
; i
++) {
2243 unsigned reg
= so
->output
[i
].register_index
;
2248 if (stream
!= so
->output
[i
].stream
)
2251 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2252 &so
->output
[i
], &outputs
[reg
]);
2255 lp_build_endif(&if_ctx
);
2259 /* Generate export instructions for hardware VS shader stage */
2260 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2261 struct si_shader_output_values
*outputs
,
2264 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2265 struct si_shader
*shader
= ctx
->shader
;
2266 struct lp_build_context
*base
= &bld_base
->base
;
2267 struct ac_export_args args
, pos_args
[4] = {};
2268 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2269 unsigned semantic_name
, semantic_index
;
2271 unsigned param_count
= 0;
2275 for (i
= 0; i
< noutput
; i
++) {
2276 semantic_name
= outputs
[i
].semantic_name
;
2277 semantic_index
= outputs
[i
].semantic_index
;
2278 bool export_param
= true;
2280 switch (semantic_name
) {
2281 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2282 case TGSI_SEMANTIC_PSIZE
:
2283 case TGSI_SEMANTIC_CLIPVERTEX
:
2284 case TGSI_SEMANTIC_EDGEFLAG
:
2286 case TGSI_SEMANTIC_GENERIC
:
2287 /* don't process indices the function can't handle */
2288 if (semantic_index
>= SI_MAX_IO_GENERIC
)
2292 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2293 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2294 export_param
= false;
2297 if (outputs
[i
].vertex_stream
[0] != 0 &&
2298 outputs
[i
].vertex_stream
[1] != 0 &&
2299 outputs
[i
].vertex_stream
[2] != 0 &&
2300 outputs
[i
].vertex_stream
[3] != 0)
2301 export_param
= false;
2304 /* Select the correct target */
2305 switch(semantic_name
) {
2306 case TGSI_SEMANTIC_PSIZE
:
2307 psize_value
= outputs
[i
].values
[0];
2309 case TGSI_SEMANTIC_EDGEFLAG
:
2310 edgeflag_value
= outputs
[i
].values
[0];
2312 case TGSI_SEMANTIC_LAYER
:
2313 layer_value
= outputs
[i
].values
[0];
2314 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2315 goto handle_semantic
;
2316 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2317 viewport_index_value
= outputs
[i
].values
[0];
2318 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2319 goto handle_semantic
;
2320 case TGSI_SEMANTIC_POSITION
:
2321 target
= V_008DFC_SQ_EXP_POS
;
2323 case TGSI_SEMANTIC_CLIPDIST
:
2324 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2325 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2326 goto handle_semantic
;
2328 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2330 case TGSI_SEMANTIC_CLIPVERTEX
:
2331 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2333 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2335 case TGSI_SEMANTIC_COLOR
:
2336 case TGSI_SEMANTIC_BCOLOR
:
2337 case TGSI_SEMANTIC_PRIMID
:
2338 case TGSI_SEMANTIC_FOG
:
2339 case TGSI_SEMANTIC_TEXCOORD
:
2340 case TGSI_SEMANTIC_GENERIC
:
2343 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2344 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2345 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2351 "Warning: SI unhandled vs output type:%d\n",
2355 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, &args
);
2357 if (target
>= V_008DFC_SQ_EXP_POS
&&
2358 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2359 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2360 &args
, sizeof(args
));
2362 ac_build_export(&ctx
->ac
, &args
);
2365 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2366 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2367 goto handle_semantic
;
2371 shader
->info
.nr_param_exports
= param_count
;
2373 /* We need to add the position output manually if it's missing. */
2374 if (!pos_args
[0].out
[0]) {
2375 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2376 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2377 pos_args
[0].done
= 0; /* last export? */
2378 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2379 pos_args
[0].compr
= 0; /* COMPR flag */
2380 pos_args
[0].out
[0] = base
->zero
; /* X */
2381 pos_args
[0].out
[1] = base
->zero
; /* Y */
2382 pos_args
[0].out
[2] = base
->zero
; /* Z */
2383 pos_args
[0].out
[3] = base
->one
; /* W */
2386 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2387 if (shader
->selector
->info
.writes_psize
||
2388 shader
->selector
->info
.writes_edgeflag
||
2389 shader
->selector
->info
.writes_viewport_index
||
2390 shader
->selector
->info
.writes_layer
) {
2391 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2392 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2393 (shader
->selector
->info
.writes_layer
<< 2);
2395 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2396 pos_args
[1].done
= 0; /* last export? */
2397 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2398 pos_args
[1].compr
= 0; /* COMPR flag */
2399 pos_args
[1].out
[0] = base
->zero
; /* X */
2400 pos_args
[1].out
[1] = base
->zero
; /* Y */
2401 pos_args
[1].out
[2] = base
->zero
; /* Z */
2402 pos_args
[1].out
[3] = base
->zero
; /* W */
2404 if (shader
->selector
->info
.writes_psize
)
2405 pos_args
[1].out
[0] = psize_value
;
2407 if (shader
->selector
->info
.writes_edgeflag
) {
2408 /* The output is a float, but the hw expects an integer
2409 * with the first bit containing the edge flag. */
2410 edgeflag_value
= LLVMBuildFPToUI(ctx
->gallivm
.builder
,
2413 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2417 /* The LLVM intrinsic expects a float. */
2418 pos_args
[1].out
[1] = LLVMBuildBitCast(ctx
->gallivm
.builder
,
2423 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2424 /* GFX9 has the layer in out.z[10:0] and the viewport
2425 * index in out.z[19:16].
2427 if (shader
->selector
->info
.writes_layer
)
2428 pos_args
[1].out
[2] = layer_value
;
2430 if (shader
->selector
->info
.writes_viewport_index
) {
2431 LLVMValueRef v
= viewport_index_value
;
2433 v
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, v
);
2434 v
= LLVMBuildShl(ctx
->gallivm
.builder
, v
,
2435 LLVMConstInt(ctx
->i32
, 16, 0), "");
2436 v
= LLVMBuildOr(ctx
->gallivm
.builder
, v
,
2437 bitcast(bld_base
, TGSI_TYPE_UNSIGNED
,
2438 pos_args
[1].out
[2]), "");
2439 pos_args
[1].out
[2] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, v
);
2440 pos_args
[1].enabled_channels
|= 1 << 2;
2443 if (shader
->selector
->info
.writes_layer
)
2444 pos_args
[1].out
[2] = layer_value
;
2446 if (shader
->selector
->info
.writes_viewport_index
) {
2447 pos_args
[1].out
[3] = viewport_index_value
;
2448 pos_args
[1].enabled_channels
|= 1 << 3;
2453 for (i
= 0; i
< 4; i
++)
2454 if (pos_args
[i
].out
[0])
2455 shader
->info
.nr_pos_exports
++;
2458 for (i
= 0; i
< 4; i
++) {
2459 if (!pos_args
[i
].out
[0])
2462 /* Specify the target we are exporting */
2463 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2465 if (pos_idx
== shader
->info
.nr_pos_exports
)
2466 /* Specify that this is the last export */
2467 pos_args
[i
].done
= 1;
2469 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2474 * Forward all outputs from the vertex shader to the TES. This is only used
2475 * for the fixed function TCS.
2477 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2479 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2480 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2481 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
2482 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2485 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2486 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2487 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2489 lds_vertex_stride
= unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
2490 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2491 lds_vertex_stride
, "");
2492 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2493 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2495 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
2497 unsigned i
= u_bit_scan64(&inputs
);
2499 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2500 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2503 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2504 get_rel_patch_id(ctx
),
2506 LLVMConstInt(ctx
->i32
, i
, 0));
2508 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2511 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2512 buffer_offset
, 0, 1, 0, true, false);
2516 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2517 LLVMValueRef rel_patch_id
,
2518 LLVMValueRef invocation_id
,
2519 LLVMValueRef tcs_out_current_patch_data_offset
)
2521 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2522 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2523 struct si_shader
*shader
= ctx
->shader
;
2524 unsigned tess_inner_index
, tess_outer_index
;
2525 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2526 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
2527 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
2528 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2530 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2532 /* Do this only for invocation 0, because the tess levels are per-patch,
2535 * This can't jump, because invocation 0 executes this. It should
2536 * at least mask out the loads and stores for other invocations.
2538 lp_build_if(&if_ctx
, gallivm
,
2539 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2540 invocation_id
, ctx
->i32_0
, ""));
2542 /* Determine the layout of one tess factor element in the buffer. */
2543 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2544 case PIPE_PRIM_LINES
:
2545 stride
= 2; /* 2 dwords, 1 vec2 store */
2549 case PIPE_PRIM_TRIANGLES
:
2550 stride
= 4; /* 4 dwords, 1 vec4 store */
2554 case PIPE_PRIM_QUADS
:
2555 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2564 /* Load tess_inner and tess_outer from LDS.
2565 * Any invocation can write them, so we can't get them from a temporary.
2567 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
2568 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
2570 lds_base
= tcs_out_current_patch_data_offset
;
2571 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2572 LLVMConstInt(ctx
->i32
,
2573 tess_inner_index
* 4, 0), "");
2574 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2575 LLVMConstInt(ctx
->i32
,
2576 tess_outer_index
* 4, 0), "");
2578 for (i
= 0; i
< 4; i
++) {
2579 inner
[i
] = LLVMGetUndef(ctx
->i32
);
2580 outer
[i
] = LLVMGetUndef(ctx
->i32
);
2583 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2584 /* For isolines, the hardware expects tess factors in the
2585 * reverse order from what GLSL / TGSI specify.
2587 outer
[0] = out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2588 outer
[1] = out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2590 for (i
= 0; i
< outer_comps
; i
++) {
2592 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2594 for (i
= 0; i
< inner_comps
; i
++) {
2595 inner
[i
] = out
[outer_comps
+i
] =
2596 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2600 /* Convert the outputs to vectors for stores. */
2601 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2605 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2607 /* Get the buffer. */
2608 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
2610 /* Get the offset. */
2611 tf_base
= LLVMGetParam(ctx
->main_fn
,
2612 ctx
->param_tcs_factor_offset
);
2613 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2614 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
2616 lp_build_if(&inner_if_ctx
, gallivm
,
2617 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2618 rel_patch_id
, ctx
->i32_0
, ""));
2620 /* Store the dynamic HS control word. */
2622 if (ctx
->screen
->b
.chip_class
<= VI
) {
2623 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
2624 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
2625 1, ctx
->i32_0
, tf_base
,
2626 offset
, 1, 0, true, false);
2630 lp_build_endif(&inner_if_ctx
);
2632 /* Store the tessellation factors. */
2633 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
2634 MIN2(stride
, 4), byteoffset
, tf_base
,
2635 offset
, 1, 0, true, false);
2638 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
2639 stride
- 4, byteoffset
, tf_base
,
2640 offset
, 1, 0, true, false);
2642 /* Store the tess factors into the offchip buffer if TES reads them. */
2643 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
2644 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
2645 LLVMValueRef tf_inner_offset
;
2646 unsigned param_outer
, param_inner
;
2648 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2649 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2651 param_outer
= si_shader_io_get_unique_index_patch(
2652 TGSI_SEMANTIC_TESSOUTER
, 0);
2653 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2654 LLVMConstInt(ctx
->i32
, param_outer
, 0));
2656 outer_vec
= lp_build_gather_values(gallivm
, outer
,
2657 util_next_power_of_two(outer_comps
));
2659 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
2660 outer_comps
, tf_outer_offset
,
2661 base
, 0, 1, 0, true, false);
2663 param_inner
= si_shader_io_get_unique_index_patch(
2664 TGSI_SEMANTIC_TESSINNER
, 0);
2665 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2666 LLVMConstInt(ctx
->i32
, param_inner
, 0));
2668 inner_vec
= inner_comps
== 1 ? inner
[0] :
2669 lp_build_gather_values(gallivm
, inner
, inner_comps
);
2670 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
2671 inner_comps
, tf_inner_offset
,
2672 base
, 0, 1, 0, true, false);
2676 lp_build_endif(&if_ctx
);
2680 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2681 unsigned param
, unsigned return_index
)
2683 return LLVMBuildInsertValue(ctx
->gallivm
.builder
, ret
,
2684 LLVMGetParam(ctx
->main_fn
, param
),
2689 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2690 unsigned param
, unsigned return_index
)
2692 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
2693 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
2695 return LLVMBuildInsertValue(builder
, ret
,
2696 LLVMBuildBitCast(builder
, p
, ctx
->f32
, ""),
2701 si_insert_input_ptr_as_2xi32(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2702 unsigned param
, unsigned return_index
)
2704 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
2705 LLVMValueRef ptr
, lo
, hi
;
2707 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
2708 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
2709 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
2710 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
2711 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
2712 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
2713 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
2716 /* This only writes the tessellation factor levels. */
2717 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2719 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2720 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2722 si_copy_tcs_inputs(bld_base
);
2724 rel_patch_id
= get_rel_patch_id(ctx
);
2725 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2726 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2728 /* Return epilog parameters from this function. */
2729 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
2730 LLVMValueRef ret
= ctx
->return_value
;
2733 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2734 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2735 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
2736 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2737 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2738 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2739 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2740 /* Tess offchip and tess factor offsets are at the beginning. */
2741 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
2742 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
2743 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
2745 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2746 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
2747 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2748 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2749 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2750 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2751 /* Tess offchip and tess factor offsets are after user SGPRs. */
2752 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
2753 GFX6_TCS_NUM_USER_SGPR
);
2754 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
2755 GFX6_TCS_NUM_USER_SGPR
+ 1);
2756 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
2760 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2761 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2762 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2764 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2765 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2766 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2767 ctx
->return_value
= ret
;
2770 /* Pass TCS inputs from LS to TCS on GFX9. */
2771 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
2773 LLVMValueRef ret
= ctx
->return_value
;
2775 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
, 0);
2776 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
2777 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
2778 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
2779 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
2781 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
2782 8 + SI_SGPR_VS_STATE_BITS
);
2783 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2784 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
2785 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
2786 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
2787 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
2788 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
2789 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2790 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2791 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2792 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2794 unsigned desc_param
= ctx
->param_tcs_factor_addr_base64k
+ 2;
2795 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
2796 8 + GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS
);
2797 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
2798 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES
);
2800 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
2801 ret
= si_insert_input_ret_float(ctx
, ret
,
2802 ctx
->param_tcs_patch_id
, vgpr
++);
2803 ret
= si_insert_input_ret_float(ctx
, ret
,
2804 ctx
->param_tcs_rel_ids
, vgpr
++);
2805 ctx
->return_value
= ret
;
2808 /* Pass GS inputs from ES to GS on GFX9. */
2809 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
2811 LLVMValueRef ret
= ctx
->return_value
;
2813 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
, 0);
2814 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
2815 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
2817 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
2819 unsigned desc_param
= ctx
->param_vs_state_bits
+ 1;
2820 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
2821 8 + GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS
);
2822 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
2823 8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES
);
2825 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
2826 for (unsigned i
= 0; i
< 5; i
++) {
2827 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
2828 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
2830 ctx
->return_value
= ret
;
2833 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2835 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2836 struct si_shader
*shader
= ctx
->shader
;
2837 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2838 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2840 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2841 ctx
->param_rel_auto_id
);
2842 LLVMValueRef vertex_dw_stride
=
2843 unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
2844 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2845 vertex_dw_stride
, "");
2847 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2848 * its inputs from it. */
2849 for (i
= 0; i
< info
->num_outputs
; i
++) {
2850 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2851 unsigned name
= info
->output_semantic_name
[i
];
2852 unsigned index
= info
->output_semantic_index
[i
];
2854 /* The ARB_shader_viewport_layer_array spec contains the
2857 * 2) What happens if gl_ViewportIndex or gl_Layer is
2858 * written in the vertex shader and a geometry shader is
2861 * RESOLVED: The value written by the last vertex processing
2862 * stage is used. If the last vertex processing stage
2863 * (vertex, tessellation evaluation or geometry) does not
2864 * statically assign to gl_ViewportIndex or gl_Layer, index
2865 * or layer zero is assumed.
2867 * So writes to those outputs in VS-as-LS are simply ignored.
2869 if (name
== TGSI_SEMANTIC_LAYER
||
2870 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
2873 int param
= si_shader_io_get_unique_index(name
, index
);
2874 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2875 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
2877 for (chan
= 0; chan
< 4; chan
++) {
2878 lds_store(bld_base
, chan
, dw_addr
,
2879 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2883 if (ctx
->screen
->b
.chip_class
>= GFX9
)
2884 si_set_ls_return_value_for_tcs(ctx
);
2887 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2889 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2890 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2891 struct si_shader
*es
= ctx
->shader
;
2892 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2893 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2894 ctx
->param_es2gs_offset
);
2895 LLVMValueRef lds_base
= NULL
;
2899 if (ctx
->screen
->b
.chip_class
>= GFX9
&& info
->num_outputs
) {
2900 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
2901 lds_base
= LLVMBuildMul(gallivm
->builder
, ac_get_thread_id(&ctx
->ac
),
2902 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
2905 for (i
= 0; i
< info
->num_outputs
; i
++) {
2906 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2909 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2910 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2913 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2914 info
->output_semantic_index
[i
]);
2916 for (chan
= 0; chan
< 4; chan
++) {
2917 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2918 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2920 /* GFX9 has the ESGS ring in LDS. */
2921 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2922 lds_store(bld_base
, param
* 4 + chan
, lds_base
, out_val
);
2926 ac_build_buffer_store_dword(&ctx
->ac
,
2928 out_val
, 1, NULL
, soffset
,
2929 (4 * param
+ chan
) * 4,
2934 if (ctx
->screen
->b
.chip_class
>= GFX9
)
2935 si_set_es_return_value_for_gs(ctx
);
2938 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
2940 if (ctx
->screen
->b
.chip_class
>= GFX9
)
2941 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
2943 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
2946 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2948 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2950 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
2951 si_get_gs_wave_id(ctx
));
2954 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2956 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2957 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2958 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2959 struct si_shader_output_values
*outputs
= NULL
;
2962 assert(!ctx
->shader
->is_gs_copy_shader
);
2964 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2966 /* Vertex color clamping.
2968 * This uses a state constant loaded in a user data SGPR and
2969 * an IF statement is added that clamps all colors if the constant
2972 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2973 struct lp_build_if_state if_ctx
;
2974 LLVMValueRef cond
= NULL
;
2975 LLVMValueRef addr
, val
;
2977 for (i
= 0; i
< info
->num_outputs
; i
++) {
2978 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2979 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2982 /* We've found a color. */
2984 /* The state is in the first bit of the user SGPR. */
2985 cond
= LLVMGetParam(ctx
->main_fn
,
2986 ctx
->param_vs_state_bits
);
2987 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2989 lp_build_if(&if_ctx
, gallivm
, cond
);
2992 for (j
= 0; j
< 4; j
++) {
2993 addr
= ctx
->outputs
[i
][j
];
2994 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2995 val
= ac_build_clamp(&ctx
->ac
, val
);
2996 LLVMBuildStore(gallivm
->builder
, val
, addr
);
3001 lp_build_endif(&if_ctx
);
3004 for (i
= 0; i
< info
->num_outputs
; i
++) {
3005 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3006 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3008 for (j
= 0; j
< 4; j
++) {
3009 outputs
[i
].values
[j
] =
3010 LLVMBuildLoad(gallivm
->builder
,
3013 outputs
[i
].vertex_stream
[j
] =
3014 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3018 if (ctx
->shader
->selector
->so
.num_outputs
)
3019 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3021 /* Export PrimitiveID. */
3022 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3023 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3024 outputs
[i
].semantic_index
= 0;
3025 outputs
[i
].values
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
3026 get_primitive_id(bld_base
, 0));
3027 for (j
= 1; j
< 4; j
++)
3028 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3030 memset(outputs
[i
].vertex_stream
, 0,
3031 sizeof(outputs
[i
].vertex_stream
));
3035 si_llvm_export_vs(bld_base
, outputs
, i
);
3039 struct si_ps_exports
{
3041 struct ac_export_args args
[10];
3044 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
3045 bool writes_samplemask
)
3048 /* Z needs 32 bits. */
3049 if (writes_samplemask
)
3050 return V_028710_SPI_SHADER_32_ABGR
;
3051 else if (writes_stencil
)
3052 return V_028710_SPI_SHADER_32_GR
;
3054 return V_028710_SPI_SHADER_32_R
;
3055 } else if (writes_stencil
|| writes_samplemask
) {
3056 /* Both stencil and sample mask need only 16 bits. */
3057 return V_028710_SPI_SHADER_UINT16_ABGR
;
3059 return V_028710_SPI_SHADER_ZERO
;
3063 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3064 LLVMValueRef depth
, LLVMValueRef stencil
,
3065 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3067 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3068 struct lp_build_context
*base
= &bld_base
->base
;
3069 struct ac_export_args args
;
3071 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
3073 samplemask
!= NULL
);
3075 assert(depth
|| stencil
|| samplemask
);
3077 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3078 args
.done
= 1; /* DONE bit */
3080 /* Specify the target we are exporting */
3081 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
3083 args
.compr
= 0; /* COMP flag */
3084 args
.out
[0] = base
->undef
; /* R, depth */
3085 args
.out
[1] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
3086 args
.out
[2] = base
->undef
; /* B, sample mask */
3087 args
.out
[3] = base
->undef
; /* A, alpha to mask */
3089 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
3091 args
.compr
= 1; /* COMPR flag */
3094 /* Stencil should be in X[23:16]. */
3095 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
3096 stencil
= LLVMBuildShl(ctx
->gallivm
.builder
, stencil
,
3097 LLVMConstInt(ctx
->i32
, 16, 0), "");
3098 args
.out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
3102 /* SampleMask should be in Y[15:0]. */
3103 args
.out
[1] = samplemask
;
3108 args
.out
[0] = depth
;
3112 args
.out
[1] = stencil
;
3116 args
.out
[2] = samplemask
;
3121 /* SI (except OLAND and HAINAN) has a bug that it only looks
3122 * at the X writemask component. */
3123 if (ctx
->screen
->b
.chip_class
== SI
&&
3124 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
3125 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
3128 /* Specify which components to enable */
3129 args
.enabled_channels
= mask
;
3131 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3134 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3135 LLVMValueRef
*color
, unsigned index
,
3136 unsigned samplemask_param
,
3137 bool is_last
, struct si_ps_exports
*exp
)
3139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3140 struct lp_build_context
*base
= &bld_base
->base
;
3144 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3145 for (i
= 0; i
< 4; i
++)
3146 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3149 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3150 color
[3] = base
->one
;
3154 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3155 si_alpha_test(bld_base
, color
[3]);
3157 /* Line & polygon smoothing */
3158 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3159 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3162 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3163 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3164 struct ac_export_args args
[8];
3167 /* Get the export arguments, also find out what the last one is. */
3168 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3169 si_llvm_init_export_args(bld_base
, color
,
3170 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3171 if (args
[c
].enabled_channels
)
3175 /* Emit all exports. */
3176 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3177 if (is_last
&& last
== c
) {
3178 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3179 args
[c
].done
= 1; /* DONE bit */
3180 } else if (!args
[c
].enabled_channels
)
3181 continue; /* unnecessary NULL export */
3183 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3186 struct ac_export_args args
;
3189 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3192 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3193 args
.done
= 1; /* DONE bit */
3194 } else if (!args
.enabled_channels
)
3195 return; /* unnecessary NULL export */
3197 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3201 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3202 struct si_ps_exports
*exp
)
3204 for (unsigned i
= 0; i
< exp
->num
; i
++)
3205 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3208 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3210 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3211 struct lp_build_context
*base
= &bld_base
->base
;
3212 struct ac_export_args args
;
3214 args
.enabled_channels
= 0x0; /* enabled channels */
3215 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3216 args
.done
= 1; /* DONE bit */
3217 args
.target
= V_008DFC_SQ_EXP_NULL
;
3218 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3219 args
.out
[0] = base
->undef
; /* R */
3220 args
.out
[1] = base
->undef
; /* G */
3221 args
.out
[2] = base
->undef
; /* B */
3222 args
.out
[3] = base
->undef
; /* A */
3224 ac_build_export(&ctx
->ac
, &args
);
3228 * Return PS outputs in this order:
3230 * v[0:3] = color0.xyzw
3231 * v[4:7] = color1.xyzw
3236 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3238 * The alpha-ref SGPR is returned via its original location.
3240 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3242 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3243 struct si_shader
*shader
= ctx
->shader
;
3244 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3245 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3246 unsigned i
, j
, first_vgpr
, vgpr
;
3248 LLVMValueRef color
[8][4] = {};
3249 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3252 /* Read the output values. */
3253 for (i
= 0; i
< info
->num_outputs
; i
++) {
3254 unsigned semantic_name
= info
->output_semantic_name
[i
];
3255 unsigned semantic_index
= info
->output_semantic_index
[i
];
3257 switch (semantic_name
) {
3258 case TGSI_SEMANTIC_COLOR
:
3259 assert(semantic_index
< 8);
3260 for (j
= 0; j
< 4; j
++) {
3261 LLVMValueRef ptr
= ctx
->outputs
[i
][j
];
3262 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3263 color
[semantic_index
][j
] = result
;
3266 case TGSI_SEMANTIC_POSITION
:
3267 depth
= LLVMBuildLoad(builder
,
3268 ctx
->outputs
[i
][2], "");
3270 case TGSI_SEMANTIC_STENCIL
:
3271 stencil
= LLVMBuildLoad(builder
,
3272 ctx
->outputs
[i
][1], "");
3274 case TGSI_SEMANTIC_SAMPLEMASK
:
3275 samplemask
= LLVMBuildLoad(builder
,
3276 ctx
->outputs
[i
][0], "");
3279 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3284 /* Fill the return structure. */
3285 ret
= ctx
->return_value
;
3288 ret
= LLVMBuildInsertValue(builder
, ret
,
3289 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3290 LLVMGetParam(ctx
->main_fn
,
3291 SI_PARAM_ALPHA_REF
)),
3292 SI_SGPR_ALPHA_REF
, "");
3295 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3296 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3300 for (j
= 0; j
< 4; j
++)
3301 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3304 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3306 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3308 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3310 /* Add the input sample mask for smoothing at the end. */
3311 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3312 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3313 ret
= LLVMBuildInsertValue(builder
, ret
,
3314 LLVMGetParam(ctx
->main_fn
,
3315 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3317 ctx
->return_value
= ret
;
3320 /* Prevent optimizations (at least of memory accesses) across the current
3321 * point in the program by emitting empty inline assembly that is marked as
3322 * having side effects.
3324 * Optionally, a value can be passed through the inline assembly to prevent
3325 * LLVM from hoisting calls to ReadNone functions.
3327 static void emit_optimization_barrier(struct si_shader_context
*ctx
,
3328 LLVMValueRef
*pvgpr
)
3330 static int counter
= 0;
3332 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3335 snprintf(code
, sizeof(code
), "; %d", p_atomic_inc_return(&counter
));
3338 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3339 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "", true, false);
3340 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3342 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->i32
, &ctx
->i32
, 1, false);
3343 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "=v,0", true, false);
3344 LLVMValueRef vgpr
= *pvgpr
;
3345 LLVMTypeRef vgpr_type
= LLVMTypeOf(vgpr
);
3346 unsigned vgpr_size
= llvm_get_type_size(vgpr_type
);
3349 assert(vgpr_size
% 4 == 0);
3351 vgpr
= LLVMBuildBitCast(builder
, vgpr
, LLVMVectorType(ctx
->i32
, vgpr_size
/ 4), "");
3352 vgpr0
= LLVMBuildExtractElement(builder
, vgpr
, ctx
->i32_0
, "");
3353 vgpr0
= LLVMBuildCall(builder
, inlineasm
, &vgpr0
, 1, "");
3354 vgpr
= LLVMBuildInsertElement(builder
, vgpr
, vgpr0
, ctx
->i32_0
, "");
3355 vgpr
= LLVMBuildBitCast(builder
, vgpr
, vgpr_type
, "");
3361 void si_emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3363 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3364 LLVMBuilderRef builder
= gallivm
->builder
;
3365 LLVMValueRef args
[1] = {
3366 LLVMConstInt(ctx
->i32
, simm16
, 0)
3368 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3369 ctx
->voidt
, args
, 1, 0);
3372 static void membar_emit(
3373 const struct lp_build_tgsi_action
*action
,
3374 struct lp_build_tgsi_context
*bld_base
,
3375 struct lp_build_emit_data
*emit_data
)
3377 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3378 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3379 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3380 unsigned waitcnt
= NOOP_WAITCNT
;
3382 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3383 waitcnt
&= VM_CNT
& LGKM_CNT
;
3385 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3386 TGSI_MEMBAR_SHADER_BUFFER
|
3387 TGSI_MEMBAR_SHADER_IMAGE
))
3390 if (flags
& TGSI_MEMBAR_SHARED
)
3391 waitcnt
&= LGKM_CNT
;
3393 if (waitcnt
!= NOOP_WAITCNT
)
3394 si_emit_waitcnt(ctx
, waitcnt
);
3397 static void clock_emit(
3398 const struct lp_build_tgsi_action
*action
,
3399 struct lp_build_tgsi_context
*bld_base
,
3400 struct lp_build_emit_data
*emit_data
)
3402 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3403 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3406 tmp
= lp_build_intrinsic(gallivm
->builder
, "llvm.readcyclecounter",
3407 ctx
->i64
, NULL
, 0, 0);
3408 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->v2i32
, "");
3410 emit_data
->output
[0] =
3411 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_0
, "");
3412 emit_data
->output
[1] =
3413 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_1
, "");
3416 LLVMTypeRef
si_const_array(LLVMTypeRef elem_type
, int num_elements
)
3418 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3422 static void si_llvm_emit_ddxy(
3423 const struct lp_build_tgsi_action
*action
,
3424 struct lp_build_tgsi_context
*bld_base
,
3425 struct lp_build_emit_data
*emit_data
)
3427 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3428 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3429 unsigned opcode
= emit_data
->info
->opcode
;
3434 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3435 mask
= AC_TID_MASK_LEFT
;
3436 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3437 mask
= AC_TID_MASK_TOP
;
3439 mask
= AC_TID_MASK_TOP_LEFT
;
3441 /* for DDX we want to next X pixel, DDY next Y pixel. */
3442 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3444 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
3445 val
= ac_build_ddxy(&ctx
->ac
, ctx
->screen
->has_ds_bpermute
,
3446 mask
, idx
, ctx
->lds
, val
);
3447 emit_data
->output
[emit_data
->chan
] = val
;
3451 * this takes an I,J coordinate pair,
3452 * and works out the X and Y derivatives.
3453 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3455 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3456 struct lp_build_tgsi_context
*bld_base
,
3457 LLVMValueRef interp_ij
)
3459 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3460 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3461 LLVMValueRef result
[4], a
;
3464 for (i
= 0; i
< 2; i
++) {
3465 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
3466 LLVMConstInt(ctx
->i32
, i
, 0), "");
3467 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3468 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3471 return lp_build_gather_values(gallivm
, result
, 4);
3474 static void interp_fetch_args(
3475 struct lp_build_tgsi_context
*bld_base
,
3476 struct lp_build_emit_data
*emit_data
)
3478 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3479 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3480 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3482 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3483 /* offset is in second src, first two channels */
3484 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
3487 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
3490 emit_data
->arg_count
= 2;
3491 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3492 LLVMValueRef sample_position
;
3493 LLVMValueRef sample_id
;
3494 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3496 /* fetch sample ID, then fetch its sample position,
3497 * and place into first two channels.
3499 sample_id
= lp_build_emit_fetch(bld_base
,
3500 emit_data
->inst
, 1, TGSI_CHAN_X
);
3501 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
3503 sample_position
= load_sample_position(ctx
, sample_id
);
3505 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
3509 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
3510 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
3513 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
3514 emit_data
->arg_count
= 2;
3518 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3519 struct lp_build_tgsi_context
*bld_base
,
3520 struct lp_build_emit_data
*emit_data
)
3522 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3523 struct si_shader
*shader
= ctx
->shader
;
3524 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3525 LLVMValueRef interp_param
;
3526 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3527 int input_index
= inst
->Src
[0].Register
.Index
;
3530 LLVMValueRef attr_number
;
3531 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
3532 int interp_param_idx
;
3533 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
3536 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
3538 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3539 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
3540 location
= TGSI_INTERPOLATE_LOC_CENTER
;
3542 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
3544 interp_param_idx
= lookup_interp_param_index(interp
, location
);
3545 if (interp_param_idx
== -1)
3547 else if (interp_param_idx
)
3548 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
3550 interp_param
= NULL
;
3552 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
3554 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3555 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3556 LLVMValueRef ij_out
[2];
3557 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
3560 * take the I then J parameters, and the DDX/Y for it, and
3561 * calculate the IJ inputs for the interpolator.
3562 * temp1 = ddx * offset/sample.x + I;
3563 * interp_param.I = ddy * offset/sample.y + temp1;
3564 * temp1 = ddx * offset/sample.x + J;
3565 * interp_param.J = ddy * offset/sample.y + temp1;
3567 for (i
= 0; i
< 2; i
++) {
3568 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
3569 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
3570 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
3571 ddxy_out
, ix_ll
, "");
3572 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
3573 ddxy_out
, iy_ll
, "");
3574 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
3575 interp_param
, ix_ll
, "");
3576 LLVMValueRef temp1
, temp2
;
3578 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
3581 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
3583 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
3585 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
3587 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
3589 interp_param
= lp_build_gather_values(gallivm
, ij_out
, 2);
3592 for (chan
= 0; chan
< 4; chan
++) {
3593 LLVMValueRef llvm_chan
;
3596 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
3597 llvm_chan
= LLVMConstInt(ctx
->i32
, schan
, 0);
3600 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
3601 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3602 LLVMValueRef i
= LLVMBuildExtractElement(
3603 gallivm
->builder
, interp_param
, ctx
->i32_0
, "");
3604 LLVMValueRef j
= LLVMBuildExtractElement(
3605 gallivm
->builder
, interp_param
, ctx
->i32_1
, "");
3606 emit_data
->output
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3607 llvm_chan
, attr_number
, params
,
3610 emit_data
->output
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3611 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
3612 llvm_chan
, attr_number
, params
);
3617 static LLVMValueRef
si_emit_ballot(struct si_shader_context
*ctx
,
3620 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3621 LLVMValueRef args
[3] = {
3624 LLVMConstInt(ctx
->i32
, LLVMIntNE
, 0)
3627 /* We currently have no other way to prevent LLVM from lifting the icmp
3628 * calls to a dominating basic block.
3630 emit_optimization_barrier(ctx
, &args
[0]);
3632 if (LLVMTypeOf(args
[0]) != ctx
->i32
)
3633 args
[0] = LLVMBuildBitCast(gallivm
->builder
, args
[0], ctx
->i32
, "");
3635 return lp_build_intrinsic(gallivm
->builder
,
3636 "llvm.amdgcn.icmp.i32",
3638 LP_FUNC_ATTR_NOUNWIND
|
3639 LP_FUNC_ATTR_READNONE
|
3640 LP_FUNC_ATTR_CONVERGENT
);
3643 static void vote_all_emit(
3644 const struct lp_build_tgsi_action
*action
,
3645 struct lp_build_tgsi_context
*bld_base
,
3646 struct lp_build_emit_data
*emit_data
)
3648 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3649 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3650 LLVMValueRef active_set
, vote_set
;
3653 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
3654 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
3656 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
3657 emit_data
->output
[emit_data
->chan
] =
3658 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
3661 static void vote_any_emit(
3662 const struct lp_build_tgsi_action
*action
,
3663 struct lp_build_tgsi_context
*bld_base
,
3664 struct lp_build_emit_data
*emit_data
)
3666 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3667 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3668 LLVMValueRef vote_set
;
3671 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
3673 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
3674 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
3675 emit_data
->output
[emit_data
->chan
] =
3676 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
3679 static void vote_eq_emit(
3680 const struct lp_build_tgsi_action
*action
,
3681 struct lp_build_tgsi_context
*bld_base
,
3682 struct lp_build_emit_data
*emit_data
)
3684 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3685 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3686 LLVMValueRef active_set
, vote_set
;
3687 LLVMValueRef all
, none
, tmp
;
3689 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
3690 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
3692 all
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
3693 none
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
3694 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
3695 tmp
= LLVMBuildOr(gallivm
->builder
, all
, none
, "");
3696 emit_data
->output
[emit_data
->chan
] =
3697 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
3700 static void ballot_emit(
3701 const struct lp_build_tgsi_action
*action
,
3702 struct lp_build_tgsi_context
*bld_base
,
3703 struct lp_build_emit_data
*emit_data
)
3705 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3706 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3709 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
3710 tmp
= si_emit_ballot(ctx
, tmp
);
3711 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
3713 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
3714 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
3717 static void read_invoc_fetch_args(
3718 struct lp_build_tgsi_context
*bld_base
,
3719 struct lp_build_emit_data
*emit_data
)
3721 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
3722 0, emit_data
->src_chan
);
3724 /* Always read the source invocation (= lane) from the X channel. */
3725 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
3727 emit_data
->arg_count
= 2;
3730 static void read_lane_emit(
3731 const struct lp_build_tgsi_action
*action
,
3732 struct lp_build_tgsi_context
*bld_base
,
3733 struct lp_build_emit_data
*emit_data
)
3735 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3736 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3738 /* We currently have no other way to prevent LLVM from lifting the icmp
3739 * calls to a dominating basic block.
3741 emit_optimization_barrier(ctx
, &emit_data
->args
[0]);
3743 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
) {
3744 emit_data
->args
[i
] = LLVMBuildBitCast(builder
, emit_data
->args
[i
],
3748 emit_data
->output
[emit_data
->chan
] =
3749 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
3750 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
3751 AC_FUNC_ATTR_READNONE
|
3752 AC_FUNC_ATTR_CONVERGENT
);
3755 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
3756 struct lp_build_emit_data
*emit_data
)
3758 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3759 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
3763 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
3765 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
3766 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
3770 /* Emit one vertex from the geometry shader */
3771 static void si_llvm_emit_vertex(
3772 const struct lp_build_tgsi_action
*action
,
3773 struct lp_build_tgsi_context
*bld_base
,
3774 struct lp_build_emit_data
*emit_data
)
3776 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3777 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3778 struct si_shader
*shader
= ctx
->shader
;
3779 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3780 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3781 struct lp_build_if_state if_state
;
3782 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3783 ctx
->param_gs2vs_offset
);
3784 LLVMValueRef gs_next_vertex
;
3785 LLVMValueRef can_emit
, kill
;
3786 unsigned chan
, offset
;
3790 stream
= si_llvm_get_stream(bld_base
, emit_data
);
3792 /* Write vertex attribute values to GSVS ring */
3793 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
3794 ctx
->gs_next_vertex
[stream
],
3797 /* If this thread has already emitted the declared maximum number of
3798 * vertices, skip the write: excessive vertex emissions are not
3799 * supposed to have any effect.
3801 * If the shader has no writes to memory, kill it instead. This skips
3802 * further memory loads and may allow LLVM to skip to the end
3805 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
3806 LLVMConstInt(ctx
->i32
,
3807 shader
->selector
->gs_max_out_vertices
, 0), "");
3809 bool use_kill
= !info
->writes_memory
;
3811 kill
= lp_build_select(&bld_base
->base
, can_emit
,
3812 LLVMConstReal(ctx
->f32
, 1.0f
),
3813 LLVMConstReal(ctx
->f32
, -1.0f
));
3815 ac_build_kill(&ctx
->ac
, kill
);
3817 lp_build_if(&if_state
, gallivm
, can_emit
);
3821 for (i
= 0; i
< info
->num_outputs
; i
++) {
3822 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
3824 for (chan
= 0; chan
< 4; chan
++) {
3825 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
3826 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
3829 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
3830 LLVMValueRef voffset
=
3831 LLVMConstInt(ctx
->i32
, offset
*
3832 shader
->selector
->gs_max_out_vertices
, 0);
3835 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
3836 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
3838 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
3840 ac_build_buffer_store_dword(&ctx
->ac
,
3841 ctx
->gsvs_ring
[stream
],
3843 voffset
, soffset
, 0,
3848 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
3851 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
3853 /* Signal vertex emission */
3854 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
3855 si_get_gs_wave_id(ctx
));
3857 lp_build_endif(&if_state
);
3860 /* Cut one primitive from the geometry shader */
3861 static void si_llvm_emit_primitive(
3862 const struct lp_build_tgsi_action
*action
,
3863 struct lp_build_tgsi_context
*bld_base
,
3864 struct lp_build_emit_data
*emit_data
)
3866 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3869 /* Signal primitive cut */
3870 stream
= si_llvm_get_stream(bld_base
, emit_data
);
3871 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
3872 si_get_gs_wave_id(ctx
));
3875 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
3876 struct lp_build_tgsi_context
*bld_base
,
3877 struct lp_build_emit_data
*emit_data
)
3879 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3880 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3882 /* SI only (thanks to a hw bug workaround):
3883 * The real barrier instruction isn’t needed, because an entire patch
3884 * always fits into a single wave.
3886 if (ctx
->screen
->b
.chip_class
== SI
&&
3887 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
3888 si_emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3892 lp_build_intrinsic(gallivm
->builder
,
3893 "llvm.amdgcn.s.barrier",
3894 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
3897 static const struct lp_build_tgsi_action interp_action
= {
3898 .fetch_args
= interp_fetch_args
,
3899 .emit
= build_interp_intrinsic
,
3902 static void si_create_function(struct si_shader_context
*ctx
,
3904 LLVMTypeRef
*returns
, unsigned num_returns
,
3905 LLVMTypeRef
*params
, unsigned num_params
,
3906 int last_sgpr
, unsigned max_workgroup_size
)
3910 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
3911 params
, num_params
);
3912 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
3914 for (i
= 0; i
<= last_sgpr
; ++i
) {
3915 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
3917 /* The combination of:
3921 * allows the optimization passes to move loads and reduces
3922 * SGPR spilling significantly.
3924 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
3925 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
3926 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
3927 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
3929 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
3932 if (max_workgroup_size
) {
3933 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
3934 max_workgroup_size
);
3936 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
3937 "no-signed-zeros-fp-math",
3940 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
3941 /* These were copied from some LLVM test. */
3942 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
3943 "less-precise-fpmad",
3945 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
3948 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
3951 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
3957 static void declare_streamout_params(struct si_shader_context
*ctx
,
3958 struct pipe_stream_output_info
*so
,
3959 LLVMTypeRef
*params
, LLVMTypeRef i32
,
3960 unsigned *num_params
)
3964 /* Streamout SGPRs. */
3965 if (so
->num_outputs
) {
3966 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
3967 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
3969 ctx
->param_streamout_config
= *num_params
- 1;
3971 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
3973 /* A streamout buffer offset is loaded if the stride is non-zero. */
3974 for (i
= 0; i
< 4; i
++) {
3978 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
3982 static unsigned llvm_get_type_size(LLVMTypeRef type
)
3984 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
3987 case LLVMIntegerTypeKind
:
3988 return LLVMGetIntTypeWidth(type
) / 8;
3989 case LLVMFloatTypeKind
:
3991 case LLVMPointerTypeKind
:
3993 case LLVMVectorTypeKind
:
3994 return LLVMGetVectorSize(type
) *
3995 llvm_get_type_size(LLVMGetElementType(type
));
3996 case LLVMArrayTypeKind
:
3997 return LLVMGetArrayLength(type
) *
3998 llvm_get_type_size(LLVMGetElementType(type
));
4005 static void declare_lds_as_pointer(struct si_shader_context
*ctx
)
4007 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4009 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
4010 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, ctx
->i32_0
,
4011 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
4015 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4017 switch (shader
->selector
->type
) {
4018 case PIPE_SHADER_TESS_CTRL
:
4019 /* Return this so that LLVM doesn't remove s_barrier
4020 * instructions on chips where we use s_barrier. */
4021 return shader
->selector
->screen
->b
.chip_class
>= CIK
? 128 : 64;
4023 case PIPE_SHADER_GEOMETRY
:
4024 return shader
->selector
->screen
->b
.chip_class
>= GFX9
? 128 : 64;
4026 case PIPE_SHADER_COMPUTE
:
4027 break; /* see below */
4033 const unsigned *properties
= shader
->selector
->info
.properties
;
4034 unsigned max_work_group_size
=
4035 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4036 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4037 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4039 if (!max_work_group_size
) {
4040 /* This is a variable group size compute shader,
4041 * compile it for the maximum possible group size.
4043 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4045 return max_work_group_size
;
4048 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4049 LLVMTypeRef
*params
,
4050 unsigned *num_params
,
4053 params
[(*num_params
)++] = si_const_array(ctx
->v4i32
,
4054 SI_NUM_SHADER_BUFFERS
+ SI_NUM_CONST_BUFFERS
);
4055 params
[(*num_params
)++] = si_const_array(ctx
->v8i32
,
4056 SI_NUM_IMAGES
+ SI_NUM_SAMPLERS
* 2);
4058 if (assign_params
) {
4059 ctx
->param_const_and_shader_buffers
= *num_params
- 2;
4060 ctx
->param_samplers_and_images
= *num_params
- 1;
4064 static void declare_default_desc_pointers(struct si_shader_context
*ctx
,
4065 LLVMTypeRef
*params
,
4066 unsigned *num_params
)
4068 params
[ctx
->param_rw_buffers
= (*num_params
)++] =
4069 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
);
4070 declare_per_stage_desc_pointers(ctx
, params
, num_params
, true);
4073 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4074 LLVMTypeRef
*params
,
4075 unsigned *num_params
)
4077 params
[ctx
->param_vertex_buffers
= (*num_params
)++] =
4078 si_const_array(ctx
->v4i32
, SI_NUM_VERTEX_BUFFERS
);
4079 params
[ctx
->param_base_vertex
= (*num_params
)++] = ctx
->i32
;
4080 params
[ctx
->param_start_instance
= (*num_params
)++] = ctx
->i32
;
4081 params
[ctx
->param_draw_id
= (*num_params
)++] = ctx
->i32
;
4082 params
[ctx
->param_vs_state_bits
= (*num_params
)++] = ctx
->i32
;
4085 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4086 LLVMTypeRef
*params
, unsigned *num_params
,
4087 unsigned *num_prolog_vgprs
)
4089 struct si_shader
*shader
= ctx
->shader
;
4091 params
[ctx
->param_vertex_id
= (*num_params
)++] = ctx
->i32
;
4092 if (shader
->key
.as_ls
) {
4093 params
[ctx
->param_rel_auto_id
= (*num_params
)++] = ctx
->i32
;
4094 params
[ctx
->param_instance_id
= (*num_params
)++] = ctx
->i32
;
4096 params
[ctx
->param_instance_id
= (*num_params
)++] = ctx
->i32
;
4097 params
[ctx
->param_vs_prim_id
= (*num_params
)++] = ctx
->i32
;
4099 params
[(*num_params
)++] = ctx
->i32
; /* unused */
4101 if (!shader
->is_gs_copy_shader
) {
4102 /* Vertex load indices. */
4103 ctx
->param_vertex_index0
= (*num_params
);
4104 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4105 params
[(*num_params
)++] = ctx
->i32
;
4106 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4110 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4111 LLVMTypeRef
*params
, unsigned *num_params
)
4113 params
[ctx
->param_tes_u
= (*num_params
)++] = ctx
->f32
;
4114 params
[ctx
->param_tes_v
= (*num_params
)++] = ctx
->f32
;
4115 params
[ctx
->param_tes_rel_patch_id
= (*num_params
)++] = ctx
->i32
;
4116 params
[ctx
->param_tes_patch_id
= (*num_params
)++] = ctx
->i32
;
4120 /* Convenient merged shader definitions. */
4121 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4122 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4125 static void create_function(struct si_shader_context
*ctx
)
4127 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
4128 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4129 struct si_shader
*shader
= ctx
->shader
;
4130 LLVMTypeRef params
[100]; /* just make it large enough */
4131 LLVMTypeRef returns
[16+32*4];
4132 unsigned i
, last_sgpr
, num_params
= 0, num_return_sgprs
;
4133 unsigned num_returns
= 0;
4134 unsigned num_prolog_vgprs
= 0;
4135 unsigned type
= ctx
->type
;
4137 /* Set MERGED shaders. */
4138 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4139 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4140 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4141 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4142 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4145 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4148 case PIPE_SHADER_VERTEX
:
4149 declare_default_desc_pointers(ctx
, params
, &num_params
);
4150 declare_vs_specific_input_sgprs(ctx
, params
, &num_params
);
4152 if (shader
->key
.as_es
) {
4153 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
4154 } else if (shader
->key
.as_ls
) {
4155 /* no extra parameters */
4157 if (shader
->is_gs_copy_shader
)
4158 num_params
= ctx
->param_rw_buffers
+ 1;
4160 /* The locations of the other parameters are assigned dynamically. */
4161 declare_streamout_params(ctx
, &shader
->selector
->so
,
4162 params
, ctx
->i32
, &num_params
);
4165 last_sgpr
= num_params
-1;
4168 declare_vs_input_vgprs(ctx
, params
, &num_params
,
4172 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4173 declare_default_desc_pointers(ctx
, params
, &num_params
);
4174 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
4175 params
[ctx
->param_tcs_out_lds_offsets
= num_params
++] = ctx
->i32
;
4176 params
[ctx
->param_tcs_out_lds_layout
= num_params
++] = ctx
->i32
;
4177 params
[ctx
->param_vs_state_bits
= num_params
++] = ctx
->i32
;
4178 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
4179 params
[ctx
->param_tcs_factor_addr_base64k
= num_params
++] = ctx
->i32
;
4180 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
4181 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
4182 last_sgpr
= num_params
- 1;
4185 params
[ctx
->param_tcs_patch_id
= num_params
++] = ctx
->i32
;
4186 params
[ctx
->param_tcs_rel_ids
= num_params
++] = ctx
->i32
;
4188 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4189 * placed after the user SGPRs.
4191 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4192 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4193 for (i
= 0; i
< 3; i
++)
4194 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4197 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4198 /* Merged stages have 8 system SGPRs at the beginning. */
4199 params
[ctx
->param_rw_buffers
= num_params
++] = /* SPI_SHADER_USER_DATA_ADDR_LO_HS */
4200 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
);
4201 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
4202 params
[ctx
->param_merged_wave_info
= num_params
++] = ctx
->i32
;
4203 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
4204 params
[ctx
->param_merged_scratch_offset
= num_params
++] = ctx
->i32
;
4205 params
[num_params
++] = ctx
->i32
; /* unused */
4206 params
[num_params
++] = ctx
->i32
; /* unused */
4208 params
[num_params
++] = ctx
->i32
; /* unused */
4209 params
[num_params
++] = ctx
->i32
; /* unused */
4210 declare_per_stage_desc_pointers(ctx
, params
, &num_params
,
4211 ctx
->type
== PIPE_SHADER_VERTEX
);
4212 declare_vs_specific_input_sgprs(ctx
, params
, &num_params
);
4214 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
4215 params
[ctx
->param_tcs_out_lds_offsets
= num_params
++] = ctx
->i32
;
4216 params
[ctx
->param_tcs_out_lds_layout
= num_params
++] = ctx
->i32
;
4217 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
4218 params
[ctx
->param_tcs_factor_addr_base64k
= num_params
++] = ctx
->i32
;
4219 params
[num_params
++] = ctx
->i32
; /* unused */
4221 declare_per_stage_desc_pointers(ctx
, params
, &num_params
,
4222 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4223 last_sgpr
= num_params
- 1;
4225 /* VGPRs (first TCS, then VS) */
4226 params
[ctx
->param_tcs_patch_id
= num_params
++] = ctx
->i32
;
4227 params
[ctx
->param_tcs_rel_ids
= num_params
++] = ctx
->i32
;
4229 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4230 declare_vs_input_vgprs(ctx
, params
, &num_params
,
4233 /* LS return values are inputs to the TCS main shader part. */
4234 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4235 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4236 for (i
= 0; i
< 2; i
++)
4237 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4239 /* TCS return values are inputs to the TCS epilog.
4241 * param_tcs_offchip_offset, param_tcs_factor_offset,
4242 * param_tcs_offchip_layout, and param_rw_buffers
4243 * should be passed to the epilog.
4245 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4246 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4247 for (i
= 0; i
< 3; i
++)
4248 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4252 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4253 /* Merged stages have 8 system SGPRs at the beginning. */
4254 params
[ctx
->param_rw_buffers
= num_params
++] = /* SPI_SHADER_USER_DATA_ADDR_LO_GS */
4255 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
);
4256 params
[ctx
->param_gs2vs_offset
= num_params
++] = ctx
->i32
;
4257 params
[ctx
->param_merged_wave_info
= num_params
++] = ctx
->i32
;
4258 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
4259 params
[ctx
->param_merged_scratch_offset
= num_params
++] = ctx
->i32
;
4260 params
[num_params
++] = ctx
->i32
; /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4261 params
[num_params
++] = ctx
->i32
; /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4263 params
[num_params
++] = ctx
->i32
; /* unused */
4264 params
[num_params
++] = ctx
->i32
; /* unused */
4265 declare_per_stage_desc_pointers(ctx
, params
, &num_params
,
4266 (ctx
->type
== PIPE_SHADER_VERTEX
||
4267 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4268 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4269 declare_vs_specific_input_sgprs(ctx
, params
, &num_params
);
4271 /* TESS_EVAL (and also GEOMETRY):
4272 * Declare as many input SGPRs as the VS has. */
4273 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
4274 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
4275 params
[num_params
++] = ctx
->i32
; /* unused */
4276 params
[num_params
++] = ctx
->i32
; /* unused */
4277 params
[num_params
++] = ctx
->i32
; /* unused */
4278 params
[ctx
->param_vs_state_bits
= num_params
++] = ctx
->i32
; /* unused */
4281 declare_per_stage_desc_pointers(ctx
, params
, &num_params
,
4282 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4283 last_sgpr
= num_params
- 1;
4285 /* VGPRs (first GS, then VS/TES) */
4286 params
[ctx
->param_gs_vtx01_offset
= num_params
++] = ctx
->i32
;
4287 params
[ctx
->param_gs_vtx23_offset
= num_params
++] = ctx
->i32
;
4288 params
[ctx
->param_gs_prim_id
= num_params
++] = ctx
->i32
;
4289 params
[ctx
->param_gs_instance_id
= num_params
++] = ctx
->i32
;
4290 params
[ctx
->param_gs_vtx45_offset
= num_params
++] = ctx
->i32
;
4292 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4293 declare_vs_input_vgprs(ctx
, params
, &num_params
,
4295 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4296 declare_tes_input_vgprs(ctx
, params
, &num_params
);
4299 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4300 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4301 /* ES return values are inputs to GS. */
4302 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4303 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4304 for (i
= 0; i
< 5; i
++)
4305 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4309 case PIPE_SHADER_TESS_EVAL
:
4310 declare_default_desc_pointers(ctx
, params
, &num_params
);
4311 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
4312 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
4314 if (shader
->key
.as_es
) {
4315 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
4316 params
[num_params
++] = ctx
->i32
;
4317 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
4319 params
[num_params
++] = ctx
->i32
;
4320 declare_streamout_params(ctx
, &shader
->selector
->so
,
4321 params
, ctx
->i32
, &num_params
);
4322 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
4324 last_sgpr
= num_params
- 1;
4327 declare_tes_input_vgprs(ctx
, params
, &num_params
);
4330 case PIPE_SHADER_GEOMETRY
:
4331 declare_default_desc_pointers(ctx
, params
, &num_params
);
4332 params
[ctx
->param_gs2vs_offset
= num_params
++] = ctx
->i32
;
4333 params
[ctx
->param_gs_wave_id
= num_params
++] = ctx
->i32
;
4334 last_sgpr
= num_params
- 1;
4337 params
[ctx
->param_gs_vtx0_offset
= num_params
++] = ctx
->i32
;
4338 params
[ctx
->param_gs_vtx1_offset
= num_params
++] = ctx
->i32
;
4339 params
[ctx
->param_gs_prim_id
= num_params
++] = ctx
->i32
;
4340 params
[ctx
->param_gs_vtx2_offset
= num_params
++] = ctx
->i32
;
4341 params
[ctx
->param_gs_vtx3_offset
= num_params
++] = ctx
->i32
;
4342 params
[ctx
->param_gs_vtx4_offset
= num_params
++] = ctx
->i32
;
4343 params
[ctx
->param_gs_vtx5_offset
= num_params
++] = ctx
->i32
;
4344 params
[ctx
->param_gs_instance_id
= num_params
++] = ctx
->i32
;
4347 case PIPE_SHADER_FRAGMENT
:
4348 declare_default_desc_pointers(ctx
, params
, &num_params
);
4349 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
4350 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
4351 last_sgpr
= SI_PARAM_PRIM_MASK
;
4352 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
4353 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
4354 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
4355 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
4356 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
4357 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
4358 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
4359 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
4360 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
4361 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
4362 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
4363 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
4364 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
4365 shader
->info
.face_vgpr_index
= 20;
4366 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
4367 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
4368 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
4369 num_params
= SI_PARAM_POS_FIXED_PT
+1;
4371 /* Color inputs from the prolog. */
4372 if (shader
->selector
->info
.colors_read
) {
4373 unsigned num_color_elements
=
4374 util_bitcount(shader
->selector
->info
.colors_read
);
4376 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
4377 for (i
= 0; i
< num_color_elements
; i
++)
4378 params
[num_params
++] = ctx
->f32
;
4380 num_prolog_vgprs
+= num_color_elements
;
4383 /* Outputs for the epilog. */
4384 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4387 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4388 shader
->selector
->info
.writes_z
+
4389 shader
->selector
->info
.writes_stencil
+
4390 shader
->selector
->info
.writes_samplemask
+
4391 1 /* SampleMaskIn */;
4393 num_returns
= MAX2(num_returns
,
4395 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4397 for (i
= 0; i
< num_return_sgprs
; i
++)
4398 returns
[i
] = ctx
->i32
;
4399 for (; i
< num_returns
; i
++)
4400 returns
[i
] = ctx
->f32
;
4403 case PIPE_SHADER_COMPUTE
:
4404 declare_default_desc_pointers(ctx
, params
, &num_params
);
4405 if (shader
->selector
->info
.uses_grid_size
)
4406 params
[ctx
->param_grid_size
= num_params
++] = v3i32
;
4407 if (shader
->selector
->info
.uses_block_size
)
4408 params
[ctx
->param_block_size
= num_params
++] = v3i32
;
4410 for (i
= 0; i
< 3; i
++) {
4411 ctx
->param_block_id
[i
] = -1;
4412 if (shader
->selector
->info
.uses_block_id
[i
])
4413 params
[ctx
->param_block_id
[i
] = num_params
++] = ctx
->i32
;
4415 last_sgpr
= num_params
- 1;
4417 params
[ctx
->param_thread_id
= num_params
++] = v3i32
;
4420 assert(0 && "unimplemented shader");
4424 assert(num_params
<= ARRAY_SIZE(params
));
4426 si_create_function(ctx
, "main", returns
, num_returns
, params
,
4427 num_params
, last_sgpr
,
4428 si_get_max_workgroup_size(shader
));
4430 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4431 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4432 ctx
->separate_prolog
) {
4433 si_llvm_add_attribute(ctx
->main_fn
,
4434 "InitialPSInputAddr",
4435 S_0286D0_PERSP_SAMPLE_ENA(1) |
4436 S_0286D0_PERSP_CENTER_ENA(1) |
4437 S_0286D0_PERSP_CENTROID_ENA(1) |
4438 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4439 S_0286D0_LINEAR_CENTER_ENA(1) |
4440 S_0286D0_LINEAR_CENTROID_ENA(1) |
4441 S_0286D0_FRONT_FACE_ENA(1) |
4442 S_0286D0_POS_FIXED_PT_ENA(1));
4445 shader
->info
.num_input_sgprs
= 0;
4446 shader
->info
.num_input_vgprs
= 0;
4448 for (i
= 0; i
<= last_sgpr
; ++i
)
4449 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
4451 for (; i
< num_params
; ++i
)
4452 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
4454 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4455 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4457 if (!ctx
->screen
->has_ds_bpermute
&&
4459 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
4460 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
4461 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
4462 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
4463 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
4464 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
4466 LLVMAddGlobalInAddressSpace(gallivm
->module
,
4467 LLVMArrayType(ctx
->i32
, 64),
4471 if (shader
->key
.as_ls
||
4472 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4473 /* GFX9 has the ESGS ring buffer in LDS. */
4474 (ctx
->screen
->b
.chip_class
>= GFX9
&&
4475 (shader
->key
.as_es
||
4476 ctx
->type
== PIPE_SHADER_GEOMETRY
)))
4477 declare_lds_as_pointer(ctx
);
4481 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4484 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4486 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4487 LLVMBuilderRef builder
= gallivm
->builder
;
4489 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4490 ctx
->param_rw_buffers
);
4492 if (ctx
->screen
->b
.chip_class
<= VI
&&
4493 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4495 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4497 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4500 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4503 if (ctx
->shader
->is_gs_copy_shader
) {
4504 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4507 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4508 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4509 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4510 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4511 LLVMValueRef base_ring
;
4513 base_ring
= ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4515 /* The conceptual layout of the GSVS ring is
4516 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4517 * but the real memory layout is swizzled across
4519 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
4521 * Override the buffer descriptor accordingly.
4523 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
4524 uint64_t stream_offset
= 0;
4526 for (unsigned stream
= 0; stream
< 4; ++stream
) {
4527 unsigned num_components
;
4529 unsigned num_records
;
4530 LLVMValueRef ring
, tmp
;
4532 num_components
= sel
->info
.num_stream_output_components
[stream
];
4533 if (!num_components
)
4536 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
4538 /* Limit on the stride field for <= CIK. */
4539 assert(stride
< (1 << 14));
4543 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
4544 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
4545 tmp
= LLVMBuildAdd(builder
, tmp
,
4546 LLVMConstInt(ctx
->i64
,
4547 stream_offset
, 0), "");
4548 stream_offset
+= stride
* 64;
4550 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
4551 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
4552 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
4553 tmp
= LLVMBuildOr(builder
, tmp
,
4554 LLVMConstInt(ctx
->i32
,
4555 S_008F04_STRIDE(stride
) |
4556 S_008F04_SWIZZLE_ENABLE(1), 0), "");
4557 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
4558 ring
= LLVMBuildInsertElement(builder
, ring
,
4559 LLVMConstInt(ctx
->i32
, num_records
, 0),
4560 LLVMConstInt(ctx
->i32
, 2, 0), "");
4561 ring
= LLVMBuildInsertElement(builder
, ring
,
4562 LLVMConstInt(ctx
->i32
,
4563 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
4564 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
4565 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
4566 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
4567 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
4568 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
4569 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
4570 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
4571 S_008F0C_ADD_TID_ENABLE(1),
4573 LLVMConstInt(ctx
->i32
, 3, 0), "");
4575 ctx
->gsvs_ring
[stream
] = ring
;
4580 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
4581 LLVMValueRef param_rw_buffers
,
4582 unsigned param_pos_fixed_pt
)
4584 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4585 LLVMBuilderRef builder
= gallivm
->builder
;
4586 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
4588 /* Use the fixed-point gl_FragCoord input.
4589 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
4590 * per coordinate to get the repeating effect.
4592 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
4593 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
4595 /* Load the buffer descriptor. */
4596 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
4597 desc
= ac_build_indexed_load_const(&ctx
->ac
, param_rw_buffers
, slot
);
4599 /* The stipple pattern is 32x32, each row has 32 bits. */
4600 offset
= LLVMBuildMul(builder
, address
[1],
4601 LLVMConstInt(ctx
->i32
, 4, 0), "");
4602 row
= buffer_load_const(ctx
, desc
, offset
);
4603 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
4604 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
4605 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
4607 /* The intrinsic kills the thread if arg < 0. */
4608 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
4609 LLVMConstReal(ctx
->f32
, -1), "");
4610 ac_build_kill(&ctx
->ac
, bit
);
4613 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
4614 struct si_shader_config
*conf
,
4615 unsigned symbol_offset
)
4618 const unsigned char *config
=
4619 ac_shader_binary_config_start(binary
, symbol_offset
);
4620 bool really_needs_scratch
= false;
4622 /* LLVM adds SGPR spills to the scratch size.
4623 * Find out if we really need the scratch buffer.
4625 for (i
= 0; i
< binary
->reloc_count
; i
++) {
4626 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
4628 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
4629 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4630 really_needs_scratch
= true;
4635 /* XXX: We may be able to emit some of these values directly rather than
4636 * extracting fields to be emitted later.
4639 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
4640 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
4641 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
4643 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
4644 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
4645 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
4646 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
4647 case R_00B848_COMPUTE_PGM_RSRC1
:
4648 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
4649 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
4650 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
4651 conf
->rsrc1
= value
;
4653 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
4654 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
4656 case R_00B84C_COMPUTE_PGM_RSRC2
:
4657 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
4658 conf
->rsrc2
= value
;
4660 case R_0286CC_SPI_PS_INPUT_ENA
:
4661 conf
->spi_ps_input_ena
= value
;
4663 case R_0286D0_SPI_PS_INPUT_ADDR
:
4664 conf
->spi_ps_input_addr
= value
;
4666 case R_0286E8_SPI_TMPRING_SIZE
:
4667 case R_00B860_COMPUTE_TMPRING_SIZE
:
4668 /* WAVESIZE is in units of 256 dwords. */
4669 if (really_needs_scratch
)
4670 conf
->scratch_bytes_per_wave
=
4671 G_00B860_WAVESIZE(value
) * 256 * 4;
4673 case 0x4: /* SPILLED_SGPRS */
4674 conf
->spilled_sgprs
= value
;
4676 case 0x8: /* SPILLED_VGPRS */
4677 conf
->spilled_vgprs
= value
;
4681 static bool printed
;
4684 fprintf(stderr
, "Warning: LLVM emitted unknown "
4685 "config register: 0x%x\n", reg
);
4693 if (!conf
->spi_ps_input_addr
)
4694 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
4697 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
4698 uint64_t scratch_va
)
4701 uint32_t scratch_rsrc_dword0
= scratch_va
;
4702 uint32_t scratch_rsrc_dword1
=
4703 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
4705 /* Enable scratch coalescing. */
4706 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
4708 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
4709 const struct ac_shader_reloc
*reloc
=
4710 &shader
->binary
.relocs
[i
];
4711 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
4712 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
4713 &scratch_rsrc_dword0
, 4);
4714 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4715 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
4716 &scratch_rsrc_dword1
, 4);
4721 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
4723 unsigned size
= shader
->binary
.code_size
;
4726 size
+= shader
->prolog
->binary
.code_size
;
4727 if (shader
->previous_stage
)
4728 size
+= shader
->previous_stage
->binary
.code_size
;
4729 if (shader
->prolog2
)
4730 size
+= shader
->prolog2
->binary
.code_size
;
4732 size
+= shader
->epilog
->binary
.code_size
;
4736 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
4738 const struct ac_shader_binary
*prolog
=
4739 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
4740 const struct ac_shader_binary
*previous_stage
=
4741 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
4742 const struct ac_shader_binary
*prolog2
=
4743 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
4744 const struct ac_shader_binary
*epilog
=
4745 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
4746 const struct ac_shader_binary
*mainb
= &shader
->binary
;
4747 unsigned bo_size
= si_get_shader_binary_size(shader
) +
4748 (!epilog
? mainb
->rodata_size
: 0);
4751 assert(!prolog
|| !prolog
->rodata_size
);
4752 assert(!previous_stage
|| !previous_stage
->rodata_size
);
4753 assert(!prolog2
|| !prolog2
->rodata_size
);
4754 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
4755 !mainb
->rodata_size
);
4756 assert(!epilog
|| !epilog
->rodata_size
);
4758 /* GFX9 can fetch at most 128 bytes past the end of the shader.
4759 * Prevent VM faults.
4761 if (sscreen
->b
.chip_class
>= GFX9
)
4764 r600_resource_reference(&shader
->bo
, NULL
);
4765 shader
->bo
= (struct r600_resource
*)
4766 pipe_buffer_create(&sscreen
->b
.b
, 0,
4767 PIPE_USAGE_IMMUTABLE
,
4768 align(bo_size
, SI_CPDMA_ALIGNMENT
));
4773 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
4774 PIPE_TRANSFER_READ_WRITE
|
4775 PIPE_TRANSFER_UNSYNCHRONIZED
);
4777 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
4778 * endian-independent. */
4780 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
4781 ptr
+= prolog
->code_size
;
4783 if (previous_stage
) {
4784 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
4785 ptr
+= previous_stage
->code_size
;
4788 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
4789 ptr
+= prolog2
->code_size
;
4792 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
4793 ptr
+= mainb
->code_size
;
4796 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
4797 else if (mainb
->rodata_size
> 0)
4798 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
4800 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
4804 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
4805 struct pipe_debug_callback
*debug
,
4806 const char *name
, FILE *file
)
4811 if (binary
->disasm_string
) {
4812 fprintf(file
, "Shader %s disassembly:\n", name
);
4813 fprintf(file
, "%s", binary
->disasm_string
);
4815 if (debug
&& debug
->debug_message
) {
4816 /* Very long debug messages are cut off, so send the
4817 * disassembly one line at a time. This causes more
4818 * overhead, but on the plus side it simplifies
4819 * parsing of resulting logs.
4821 pipe_debug_message(debug
, SHADER_INFO
,
4822 "Shader Disassembly Begin");
4824 line
= binary
->disasm_string
;
4826 p
= util_strchrnul(line
, '\n');
4830 pipe_debug_message(debug
, SHADER_INFO
,
4831 "%.*s", count
, line
);
4839 pipe_debug_message(debug
, SHADER_INFO
,
4840 "Shader Disassembly End");
4843 fprintf(file
, "Shader %s binary:\n", name
);
4844 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
4845 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
4846 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
4847 binary
->code
[i
+ 1], binary
->code
[i
]);
4852 static void si_shader_dump_stats(struct si_screen
*sscreen
,
4853 const struct si_shader
*shader
,
4854 struct pipe_debug_callback
*debug
,
4857 bool check_debug_option
)
4859 const struct si_shader_config
*conf
= &shader
->config
;
4860 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
4861 unsigned code_size
= si_get_shader_binary_size(shader
);
4862 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
4863 unsigned lds_per_wave
= 0;
4864 unsigned max_simd_waves
= 10;
4866 /* Compute LDS usage for PS. */
4867 switch (processor
) {
4868 case PIPE_SHADER_FRAGMENT
:
4869 /* The minimum usage per wave is (num_inputs * 48). The maximum
4870 * usage is (num_inputs * 48 * 16).
4871 * We can get anything in between and it varies between waves.
4873 * The 48 bytes per input for a single primitive is equal to
4874 * 4 bytes/component * 4 components/input * 3 points.
4876 * Other stages don't know the size at compile time or don't
4877 * allocate LDS per wave, but instead they do it per thread group.
4879 lds_per_wave
= conf
->lds_size
* lds_increment
+
4880 align(num_inputs
* 48, lds_increment
);
4882 case PIPE_SHADER_COMPUTE
:
4883 if (shader
->selector
) {
4884 unsigned max_workgroup_size
=
4885 si_get_max_workgroup_size(shader
);
4886 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
4887 DIV_ROUND_UP(max_workgroup_size
, 64);
4892 /* Compute the per-SIMD wave counts. */
4893 if (conf
->num_sgprs
) {
4894 if (sscreen
->b
.chip_class
>= VI
)
4895 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
4897 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
4900 if (conf
->num_vgprs
)
4901 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
4903 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
4904 * 16KB makes some SIMDs unoccupied). */
4906 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
4908 if (!check_debug_option
||
4909 r600_can_dump_shader(&sscreen
->b
, processor
)) {
4910 if (processor
== PIPE_SHADER_FRAGMENT
) {
4911 fprintf(file
, "*** SHADER CONFIG ***\n"
4912 "SPI_PS_INPUT_ADDR = 0x%04x\n"
4913 "SPI_PS_INPUT_ENA = 0x%04x\n",
4914 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
4917 fprintf(file
, "*** SHADER STATS ***\n"
4920 "Spilled SGPRs: %d\n"
4921 "Spilled VGPRs: %d\n"
4922 "Private memory VGPRs: %d\n"
4923 "Code Size: %d bytes\n"
4925 "Scratch: %d bytes per wave\n"
4927 "********************\n\n\n",
4928 conf
->num_sgprs
, conf
->num_vgprs
,
4929 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
4930 conf
->private_mem_vgprs
, code_size
,
4931 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
4935 pipe_debug_message(debug
, SHADER_INFO
,
4936 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
4937 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
4938 "Spilled VGPRs: %d PrivMem VGPRs: %d",
4939 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
4940 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
4941 max_simd_waves
, conf
->spilled_sgprs
,
4942 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
4945 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
4947 switch (processor
) {
4948 case PIPE_SHADER_VERTEX
:
4949 if (shader
->key
.as_es
)
4950 return "Vertex Shader as ES";
4951 else if (shader
->key
.as_ls
)
4952 return "Vertex Shader as LS";
4954 return "Vertex Shader as VS";
4955 case PIPE_SHADER_TESS_CTRL
:
4956 return "Tessellation Control Shader";
4957 case PIPE_SHADER_TESS_EVAL
:
4958 if (shader
->key
.as_es
)
4959 return "Tessellation Evaluation Shader as ES";
4961 return "Tessellation Evaluation Shader as VS";
4962 case PIPE_SHADER_GEOMETRY
:
4963 if (shader
->is_gs_copy_shader
)
4964 return "GS Copy Shader as VS";
4966 return "Geometry Shader";
4967 case PIPE_SHADER_FRAGMENT
:
4968 return "Pixel Shader";
4969 case PIPE_SHADER_COMPUTE
:
4970 return "Compute Shader";
4972 return "Unknown Shader";
4976 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
4977 struct pipe_debug_callback
*debug
, unsigned processor
,
4978 FILE *file
, bool check_debug_option
)
4980 if (!check_debug_option
||
4981 r600_can_dump_shader(&sscreen
->b
, processor
))
4982 si_dump_shader_key(processor
, shader
, file
);
4984 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
4985 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
4986 si_get_shader_name(shader
, processor
));
4987 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
4990 if (!check_debug_option
||
4991 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
4992 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
4993 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
4996 si_shader_dump_disassembly(&shader
->prolog
->binary
,
4997 debug
, "prolog", file
);
4998 if (shader
->previous_stage
)
4999 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5000 debug
, "previous stage", file
);
5001 if (shader
->prolog2
)
5002 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5003 debug
, "prolog2", file
);
5005 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5008 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5009 debug
, "epilog", file
);
5010 fprintf(file
, "\n");
5013 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
5014 check_debug_option
);
5017 static int si_compile_llvm(struct si_screen
*sscreen
,
5018 struct ac_shader_binary
*binary
,
5019 struct si_shader_config
*conf
,
5020 LLVMTargetMachineRef tm
,
5022 struct pipe_debug_callback
*debug
,
5027 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
5029 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
5030 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5032 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
5033 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5034 ac_dump_module(mod
);
5035 fprintf(stderr
, "\n");
5039 if (sscreen
->record_llvm_ir
) {
5040 char *ir
= LLVMPrintModuleToString(mod
);
5041 binary
->llvm_ir_string
= strdup(ir
);
5042 LLVMDisposeMessage(ir
);
5045 if (!si_replace_shader(count
, binary
)) {
5046 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5051 si_shader_binary_read_config(binary
, conf
, 0);
5053 /* Enable 64-bit and 16-bit denormals, because there is no performance
5056 * If denormals are enabled, all floating-point output modifiers are
5059 * Don't enable denormals for 32-bit floats, because:
5060 * - Floating-point output modifiers would be ignored by the hw.
5061 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5062 * have to stop using those.
5063 * - SI & CI would be very slow.
5065 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5067 FREE(binary
->config
);
5068 FREE(binary
->global_symbol_offsets
);
5069 binary
->config
= NULL
;
5070 binary
->global_symbol_offsets
= NULL
;
5072 /* Some shaders can't have rodata because their binaries can be
5075 if (binary
->rodata_size
&&
5076 (processor
== PIPE_SHADER_VERTEX
||
5077 processor
== PIPE_SHADER_TESS_CTRL
||
5078 processor
== PIPE_SHADER_TESS_EVAL
||
5079 processor
== PIPE_SHADER_FRAGMENT
)) {
5080 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5087 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5089 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5090 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
5092 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
5095 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5097 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5098 LLVMTargetMachineRef tm
,
5099 struct si_shader_selector
*gs_selector
,
5100 struct pipe_debug_callback
*debug
)
5102 struct si_shader_context ctx
;
5103 struct si_shader
*shader
;
5104 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
5105 LLVMBuilderRef builder
;
5106 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5107 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5108 struct si_shader_output_values
*outputs
;
5109 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5112 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5117 shader
= CALLOC_STRUCT(si_shader
);
5124 shader
->selector
= gs_selector
;
5125 shader
->is_gs_copy_shader
= true;
5127 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5128 ctx
.shader
= shader
;
5129 ctx
.type
= PIPE_SHADER_VERTEX
;
5131 builder
= gallivm
->builder
;
5133 create_function(&ctx
);
5134 preload_ring_buffers(&ctx
);
5136 LLVMValueRef voffset
=
5137 lp_build_mul_imm(uint
, LLVMGetParam(ctx
.main_fn
,
5138 ctx
.param_vertex_id
), 4);
5140 /* Fetch the vertex stream ID.*/
5141 LLVMValueRef stream_id
;
5143 if (gs_selector
->so
.num_outputs
)
5144 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5146 stream_id
= ctx
.i32_0
;
5148 /* Fill in output information. */
5149 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5150 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5151 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5153 for (int chan
= 0; chan
< 4; chan
++) {
5154 outputs
[i
].vertex_stream
[chan
] =
5155 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5159 LLVMBasicBlockRef end_bb
;
5160 LLVMValueRef switch_inst
;
5162 end_bb
= LLVMAppendBasicBlockInContext(gallivm
->context
, ctx
.main_fn
, "end");
5163 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5165 for (int stream
= 0; stream
< 4; stream
++) {
5166 LLVMBasicBlockRef bb
;
5169 if (!gsinfo
->num_stream_output_components
[stream
])
5172 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5175 bb
= LLVMInsertBasicBlockInContext(gallivm
->context
, end_bb
, "out");
5176 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5177 LLVMPositionBuilderAtEnd(builder
, bb
);
5179 /* Fetch vertex data from GSVS ring */
5181 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5182 for (unsigned chan
= 0; chan
< 4; chan
++) {
5183 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5184 outputs
[i
].vertex_stream
[chan
] != stream
) {
5185 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5189 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5190 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5193 outputs
[i
].values
[chan
] =
5194 ac_build_buffer_load(&ctx
.ac
,
5195 ctx
.gsvs_ring
[0], 1,
5202 /* Streamout and exports. */
5203 if (gs_selector
->so
.num_outputs
) {
5204 si_llvm_emit_streamout(&ctx
, outputs
,
5205 gsinfo
->num_outputs
,
5210 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
5212 LLVMBuildBr(builder
, end_bb
);
5215 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5217 LLVMBuildRetVoid(gallivm
->builder
);
5219 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5220 si_llvm_optimize_module(&ctx
);
5222 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5223 &ctx
.shader
->config
, ctx
.tm
,
5225 debug
, PIPE_SHADER_GEOMETRY
,
5228 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
5229 fprintf(stderr
, "GS Copy Shader:\n");
5230 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5231 PIPE_SHADER_GEOMETRY
, stderr
, true);
5232 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5235 si_llvm_dispose(&ctx
);
5246 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5247 const struct si_vs_prolog_bits
*prolog
,
5248 const char *prefix
, FILE *f
)
5250 fprintf(f
, " %s.instance_divisors = {", prefix
);
5251 for (int i
= 0; i
< ARRAY_SIZE(prolog
->instance_divisors
); i
++) {
5252 fprintf(f
, !i
? "%u" : ", %u",
5253 prolog
->instance_divisors
[i
]);
5257 fprintf(f
, " mono.vs.fix_fetch = {");
5258 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5259 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5263 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5266 const struct si_shader_key
*key
= &shader
->key
;
5268 fprintf(f
, "SHADER KEY\n");
5270 switch (processor
) {
5271 case PIPE_SHADER_VERTEX
:
5272 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5273 "part.vs.prolog", f
);
5274 fprintf(f
, " as_es = %u\n", key
->as_es
);
5275 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5276 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5277 key
->mono
.u
.vs_export_prim_id
);
5280 case PIPE_SHADER_TESS_CTRL
:
5281 if (shader
->selector
->screen
->b
.chip_class
>= GFX9
) {
5282 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5283 "part.tcs.ls_prolog", f
);
5285 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5286 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5289 case PIPE_SHADER_TESS_EVAL
:
5290 fprintf(f
, " as_es = %u\n", key
->as_es
);
5291 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5292 key
->mono
.u
.vs_export_prim_id
);
5295 case PIPE_SHADER_GEOMETRY
:
5296 if (shader
->is_gs_copy_shader
)
5299 if (shader
->selector
->screen
->b
.chip_class
>= GFX9
&&
5300 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5301 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5302 "part.gs.vs_prolog", f
);
5304 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5307 case PIPE_SHADER_COMPUTE
:
5310 case PIPE_SHADER_FRAGMENT
:
5311 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5312 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5313 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5314 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5315 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5316 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5317 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5318 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5319 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5320 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5321 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5322 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5323 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5324 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5325 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5326 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5327 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5334 if ((processor
== PIPE_SHADER_GEOMETRY
||
5335 processor
== PIPE_SHADER_TESS_EVAL
||
5336 processor
== PIPE_SHADER_VERTEX
) &&
5337 !key
->as_es
&& !key
->as_ls
) {
5338 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
5339 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
5343 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5344 struct si_screen
*sscreen
,
5345 LLVMTargetMachineRef tm
)
5347 struct lp_build_tgsi_context
*bld_base
;
5349 si_llvm_context_init(ctx
, sscreen
, tm
);
5351 bld_base
= &ctx
->bld_base
;
5352 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5354 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5355 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5356 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5358 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5360 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5362 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5363 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5364 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5365 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5367 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5368 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5369 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5370 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5371 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5372 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5373 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5374 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5375 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5377 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
5378 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
5379 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5382 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5384 struct si_shader
*shader
= ctx
->shader
;
5385 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5387 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5388 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5389 shader
->key
.as_ls
||
5393 ac_optimize_vs_outputs(&ctx
->ac
,
5395 shader
->info
.vs_output_param_offset
,
5397 &shader
->info
.nr_param_exports
);
5400 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5402 ctx
->shader
->config
.private_mem_vgprs
= 0;
5404 /* Process all LLVM instructions. */
5405 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5407 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5410 LLVMValueRef inst
= next
;
5411 next
= LLVMGetNextInstruction(next
);
5413 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5416 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5417 /* No idea why LLVM aligns allocas to 4 elements. */
5418 unsigned alignment
= LLVMGetAlignment(inst
);
5419 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
5420 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5422 bb
= LLVMGetNextBasicBlock(bb
);
5426 static void si_init_exec_full_mask(struct si_shader_context
*ctx
)
5428 LLVMValueRef full_mask
= LLVMConstInt(ctx
->i64
, ~0ull, 0);
5429 lp_build_intrinsic(ctx
->gallivm
.builder
,
5430 "llvm.amdgcn.init.exec", ctx
->voidt
,
5431 &full_mask
, 1, LP_FUNC_ATTR_CONVERGENT
);
5434 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5435 unsigned param
, unsigned bitoffset
)
5437 LLVMValueRef args
[] = {
5438 LLVMGetParam(ctx
->main_fn
, param
),
5439 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5441 lp_build_intrinsic(ctx
->gallivm
.builder
,
5442 "llvm.amdgcn.init.exec.from.input",
5443 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5446 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5449 struct si_shader
*shader
= ctx
->shader
;
5450 struct si_shader_selector
*sel
= shader
->selector
;
5451 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5453 switch (ctx
->type
) {
5454 case PIPE_SHADER_VERTEX
:
5455 ctx
->load_input
= declare_input_vs
;
5456 if (shader
->key
.as_ls
)
5457 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
5458 else if (shader
->key
.as_es
)
5459 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
5461 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
5463 case PIPE_SHADER_TESS_CTRL
:
5464 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5465 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5466 bld_base
->emit_store
= store_output_tcs
;
5467 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
5469 case PIPE_SHADER_TESS_EVAL
:
5470 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5471 if (shader
->key
.as_es
)
5472 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
5474 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
5476 case PIPE_SHADER_GEOMETRY
:
5477 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5478 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
5480 case PIPE_SHADER_FRAGMENT
:
5481 ctx
->load_input
= declare_input_fs
;
5482 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
5484 case PIPE_SHADER_COMPUTE
:
5485 ctx
->declare_memory_region
= declare_compute_memory
;
5488 assert(!"Unsupported shader type");
5492 create_function(ctx
);
5493 preload_ring_buffers(ctx
);
5495 /* For GFX9 merged shaders:
5496 * - Set EXEC. If the prolog is present, set EXEC there instead.
5497 * - Add a barrier before the second shader.
5499 * The same thing for monolithic shaders is done in
5500 * si_build_wrapper_function.
5502 if (ctx
->screen
->b
.chip_class
>= GFX9
&& !is_monolithic
) {
5503 if (sel
->info
.num_instructions
> 1 && /* not empty shader */
5504 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5505 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5506 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5507 !sel
->vs_needs_prolog
))) {
5508 si_init_exec_from_input(ctx
,
5509 ctx
->param_merged_wave_info
, 0);
5510 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5511 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5512 si_init_exec_from_input(ctx
,
5513 ctx
->param_merged_wave_info
, 8);
5514 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
5518 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5520 for (i
= 0; i
< 4; i
++) {
5521 ctx
->gs_next_vertex
[i
] =
5522 lp_build_alloca(&ctx
->gallivm
,
5527 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
5528 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
5532 si_llvm_build_ret(ctx
, ctx
->return_value
);
5537 * Compute the VS prolog key, which contains all the information needed to
5538 * build the VS prolog function, and set shader->info bits where needed.
5540 * \param info Shader info of the vertex shader.
5541 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
5542 * \param prolog_key Key of the VS prolog
5543 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
5544 * \param key Output shader part key.
5546 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
5547 unsigned num_input_sgprs
,
5548 const struct si_vs_prolog_bits
*prolog_key
,
5549 struct si_shader
*shader_out
,
5550 union si_shader_part_key
*key
)
5552 memset(key
, 0, sizeof(*key
));
5553 key
->vs_prolog
.states
= *prolog_key
;
5554 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
5555 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
5556 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
5558 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
5559 key
->vs_prolog
.as_ls
= 1;
5560 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
5561 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
5562 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
5565 /* Set the instanceID flag. */
5566 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
5567 if (key
->vs_prolog
.states
.instance_divisors
[i
])
5568 shader_out
->info
.uses_instanceid
= true;
5572 * Compute the PS prolog key, which contains all the information needed to
5573 * build the PS prolog function, and set related bits in shader->config.
5575 static void si_get_ps_prolog_key(struct si_shader
*shader
,
5576 union si_shader_part_key
*key
,
5577 bool separate_prolog
)
5579 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5581 memset(key
, 0, sizeof(*key
));
5582 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
5583 key
->ps_prolog
.colors_read
= info
->colors_read
;
5584 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
5585 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
5586 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
5587 (key
->ps_prolog
.colors_read
||
5588 key
->ps_prolog
.states
.force_persp_sample_interp
||
5589 key
->ps_prolog
.states
.force_linear_sample_interp
||
5590 key
->ps_prolog
.states
.force_persp_center_interp
||
5591 key
->ps_prolog
.states
.force_linear_center_interp
||
5592 key
->ps_prolog
.states
.bc_optimize_for_persp
||
5593 key
->ps_prolog
.states
.bc_optimize_for_linear
);
5595 if (info
->colors_read
) {
5596 unsigned *color
= shader
->selector
->color_attr_index
;
5598 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
5599 /* BCOLORs are stored after the last input. */
5600 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
5601 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
5602 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
5605 for (unsigned i
= 0; i
< 2; i
++) {
5606 unsigned interp
= info
->input_interpolate
[color
[i
]];
5607 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
5609 if (!(info
->colors_read
& (0xf << i
*4)))
5612 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
5614 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
5615 interp
== TGSI_INTERPOLATE_COLOR
)
5616 interp
= TGSI_INTERPOLATE_CONSTANT
;
5619 case TGSI_INTERPOLATE_CONSTANT
:
5620 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
5622 case TGSI_INTERPOLATE_PERSPECTIVE
:
5623 case TGSI_INTERPOLATE_COLOR
:
5624 /* Force the interpolation location for colors here. */
5625 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
5626 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
5627 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
5628 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5631 case TGSI_INTERPOLATE_LOC_SAMPLE
:
5632 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
5633 shader
->config
.spi_ps_input_ena
|=
5634 S_0286CC_PERSP_SAMPLE_ENA(1);
5636 case TGSI_INTERPOLATE_LOC_CENTER
:
5637 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
5638 shader
->config
.spi_ps_input_ena
|=
5639 S_0286CC_PERSP_CENTER_ENA(1);
5641 case TGSI_INTERPOLATE_LOC_CENTROID
:
5642 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
5643 shader
->config
.spi_ps_input_ena
|=
5644 S_0286CC_PERSP_CENTROID_ENA(1);
5650 case TGSI_INTERPOLATE_LINEAR
:
5651 /* Force the interpolation location for colors here. */
5652 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
5653 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
5654 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
5655 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5657 /* The VGPR assignment for non-monolithic shaders
5658 * works because InitialPSInputAddr is set on the
5659 * main shader and PERSP_PULL_MODEL is never used.
5662 case TGSI_INTERPOLATE_LOC_SAMPLE
:
5663 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5664 separate_prolog
? 6 : 9;
5665 shader
->config
.spi_ps_input_ena
|=
5666 S_0286CC_LINEAR_SAMPLE_ENA(1);
5668 case TGSI_INTERPOLATE_LOC_CENTER
:
5669 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5670 separate_prolog
? 8 : 11;
5671 shader
->config
.spi_ps_input_ena
|=
5672 S_0286CC_LINEAR_CENTER_ENA(1);
5674 case TGSI_INTERPOLATE_LOC_CENTROID
:
5675 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5676 separate_prolog
? 10 : 13;
5677 shader
->config
.spi_ps_input_ena
|=
5678 S_0286CC_LINEAR_CENTROID_ENA(1);
5692 * Check whether a PS prolog is required based on the key.
5694 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
5696 return key
->ps_prolog
.colors_read
||
5697 key
->ps_prolog
.states
.force_persp_sample_interp
||
5698 key
->ps_prolog
.states
.force_linear_sample_interp
||
5699 key
->ps_prolog
.states
.force_persp_center_interp
||
5700 key
->ps_prolog
.states
.force_linear_center_interp
||
5701 key
->ps_prolog
.states
.bc_optimize_for_persp
||
5702 key
->ps_prolog
.states
.bc_optimize_for_linear
||
5703 key
->ps_prolog
.states
.poly_stipple
;
5707 * Compute the PS epilog key, which contains all the information needed to
5708 * build the PS epilog function.
5710 static void si_get_ps_epilog_key(struct si_shader
*shader
,
5711 union si_shader_part_key
*key
)
5713 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5714 memset(key
, 0, sizeof(*key
));
5715 key
->ps_epilog
.colors_written
= info
->colors_written
;
5716 key
->ps_epilog
.writes_z
= info
->writes_z
;
5717 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
5718 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
5719 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
5723 * Build the GS prolog function. Rotate the input vertices for triangle strips
5726 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
5727 union si_shader_part_key
*key
)
5729 unsigned num_sgprs
, num_vgprs
;
5730 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5731 LLVMBuilderRef builder
= gallivm
->builder
;
5732 LLVMTypeRef params
[48]; /* 40 SGPRs (maximum) + some VGPRs */
5733 LLVMTypeRef returns
[48];
5734 LLVMValueRef func
, ret
;
5736 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
5737 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
5738 num_vgprs
= 5; /* ES inputs are not needed by GS */
5740 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
5744 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
5745 params
[i
] = ctx
->i32
;
5746 returns
[i
] = ctx
->i32
;
5749 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
5750 params
[num_sgprs
+ i
] = ctx
->i32
;
5751 returns
[num_sgprs
+ i
] = ctx
->f32
;
5754 /* Create the function. */
5755 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
5756 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1, 0);
5757 func
= ctx
->main_fn
;
5759 /* Set the full EXEC mask for the prolog, because we are only fiddling
5760 * with registers here. The main shader part will set the correct EXEC
5763 if (ctx
->screen
->b
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
5764 si_init_exec_full_mask(ctx
);
5766 /* Copy inputs to outputs. This should be no-op, as the registers match,
5767 * but it will prevent the compiler from overwriting them unintentionally.
5769 ret
= ctx
->return_value
;
5770 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
5771 LLVMValueRef p
= LLVMGetParam(func
, i
);
5772 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
5774 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
5775 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
5776 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
5777 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
5780 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
5781 /* Remap the input vertices for every other primitive. */
5782 const unsigned gfx6_vtx_params
[6] = {
5790 const unsigned gfx9_vtx_params
[3] = {
5795 LLVMValueRef vtx_in
[6], vtx_out
[6];
5796 LLVMValueRef prim_id
, rotate
;
5798 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
5799 for (unsigned i
= 0; i
< 3; i
++) {
5800 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
5801 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
5804 for (unsigned i
= 0; i
< 6; i
++)
5805 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
5808 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
5809 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
5811 for (unsigned i
= 0; i
< 6; ++i
) {
5812 LLVMValueRef base
, rotated
;
5814 rotated
= vtx_in
[(i
+ 4) % 6];
5815 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
5818 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
5819 for (unsigned i
= 0; i
< 3; i
++) {
5820 LLVMValueRef hi
, out
;
5822 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
5823 LLVMConstInt(ctx
->i32
, 16, 0), "");
5824 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
5825 out
= LLVMBuildBitCast(builder
, out
, ctx
->f32
, "");
5826 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
5827 gfx9_vtx_params
[i
], "");
5830 for (unsigned i
= 0; i
< 6; i
++) {
5833 out
= LLVMBuildBitCast(builder
, vtx_out
[i
], ctx
->f32
, "");
5834 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
5835 gfx6_vtx_params
[i
], "");
5840 LLVMBuildRet(builder
, ret
);
5844 * Given a list of shader part functions, build a wrapper function that
5845 * runs them in sequence to form a monolithic shader.
5847 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
5848 LLVMValueRef
*parts
,
5851 unsigned next_shader_first_part
)
5853 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5854 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
5855 /* PS epilog has one arg per color component */
5856 LLVMTypeRef param_types
[48];
5857 LLVMValueRef initial
[48], out
[48];
5858 LLVMTypeRef function_type
;
5859 unsigned num_params
;
5860 unsigned num_out
, initial_num_out
;
5861 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
5862 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
5863 unsigned num_sgprs
, num_vgprs
;
5864 unsigned last_sgpr_param
;
5866 struct lp_build_if_state if_state
;
5868 for (unsigned i
= 0; i
< num_parts
; ++i
) {
5869 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
5870 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
5873 /* The parameters of the wrapper function correspond to those of the
5874 * first part in terms of SGPRs and VGPRs, but we use the types of the
5875 * main part to get the right types. This is relevant for the
5876 * dereferenceable attribute on descriptor table pointers.
5881 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
5882 num_params
= LLVMCountParamTypes(function_type
);
5884 for (unsigned i
= 0; i
< num_params
; ++i
) {
5885 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
5887 if (ac_is_sgpr_param(param
)) {
5888 assert(num_vgprs
== 0);
5889 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
5891 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
5894 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
5897 last_sgpr_param
= 0;
5899 while (gprs
< num_sgprs
+ num_vgprs
) {
5900 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
5903 param_types
[num_params
] = LLVMTypeOf(param
);
5904 if (gprs
< num_sgprs
)
5905 last_sgpr_param
= num_params
;
5906 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
5909 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
5910 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
5911 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
5916 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
,
5918 si_get_max_workgroup_size(ctx
->shader
));
5920 if (is_merged_shader(ctx
->shader
))
5921 si_init_exec_full_mask(ctx
);
5923 /* Record the arguments of the function as if they were an output of
5929 for (unsigned i
= 0; i
< num_params
; ++i
) {
5930 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
5931 LLVMTypeRef param_type
= LLVMTypeOf(param
);
5932 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
5933 unsigned size
= llvm_get_type_size(param_type
) / 4;
5936 if (param_type
!= out_type
)
5937 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
5938 out
[num_out
++] = param
;
5940 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
5942 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
5943 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
5944 param_type
= ctx
->i64
;
5947 if (param_type
!= vector_type
)
5948 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
5950 for (unsigned j
= 0; j
< size
; ++j
)
5951 out
[num_out
++] = LLVMBuildExtractElement(
5952 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
5955 if (i
<= last_sgpr_param
)
5956 num_out_sgpr
= num_out
;
5959 memcpy(initial
, out
, sizeof(out
));
5960 initial_num_out
= num_out
;
5961 initial_num_out_sgpr
= num_out_sgpr
;
5963 /* Now chain the parts. */
5964 for (unsigned part
= 0; part
< num_parts
; ++part
) {
5965 LLVMValueRef in
[48];
5967 LLVMTypeRef ret_type
;
5968 unsigned out_idx
= 0;
5970 num_params
= LLVMCountParams(parts
[part
]);
5971 assert(num_params
<= ARRAY_SIZE(param_types
));
5973 /* Merged shaders are executed conditionally depending
5974 * on the number of enabled threads passed in the input SGPRs. */
5975 if (is_merged_shader(ctx
->shader
) &&
5976 (part
== 0 || part
== next_shader_first_part
)) {
5977 LLVMValueRef ena
, count
= initial
[3];
5979 /* The thread count for the 2nd shader is at bit-offset 8. */
5980 if (part
== next_shader_first_part
) {
5981 count
= LLVMBuildLShr(builder
, count
,
5982 LLVMConstInt(ctx
->i32
, 8, 0), "");
5984 count
= LLVMBuildAnd(builder
, count
,
5985 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
5986 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
5987 ac_get_thread_id(&ctx
->ac
), count
, "");
5988 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
5991 /* Derive arguments for the next part from outputs of the
5994 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
5996 LLVMTypeRef param_type
;
5998 unsigned param_size
;
5999 LLVMValueRef arg
= NULL
;
6001 param
= LLVMGetParam(parts
[part
], param_idx
);
6002 param_type
= LLVMTypeOf(param
);
6003 param_size
= llvm_get_type_size(param_type
) / 4;
6004 is_sgpr
= ac_is_sgpr_param(param
);
6007 #if HAVE_LLVM < 0x0400
6008 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
6010 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
6011 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
6013 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6016 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6017 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6019 if (param_size
== 1)
6022 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
6024 if (LLVMTypeOf(arg
) != param_type
) {
6025 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6026 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6027 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6029 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6033 in
[param_idx
] = arg
;
6034 out_idx
+= param_size
;
6037 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6039 if (is_merged_shader(ctx
->shader
) &&
6040 (part
+ 1 == next_shader_first_part
||
6041 part
+ 1 == num_parts
)) {
6042 lp_build_endif(&if_state
);
6044 if (part
+ 1 == next_shader_first_part
) {
6045 /* A barrier is required between 2 merged shaders. */
6046 si_llvm_emit_barrier(NULL
, &ctx
->bld_base
, NULL
);
6048 /* The second half of the merged shader should use
6049 * the inputs from the toplevel (wrapper) function,
6050 * not the return value from the last call.
6052 * That's because the last call was executed condi-
6053 * tionally, so we can't consume it in the main
6056 memcpy(out
, initial
, sizeof(initial
));
6057 num_out
= initial_num_out
;
6058 num_out_sgpr
= initial_num_out_sgpr
;
6063 /* Extract the returned GPRs. */
6064 ret_type
= LLVMTypeOf(ret
);
6068 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6069 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6071 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6073 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6075 LLVMBuildExtractValue(builder
, ret
, i
, "");
6077 out
[num_out
++] = val
;
6079 if (LLVMTypeOf(val
) == ctx
->i32
) {
6080 assert(num_out_sgpr
+ 1 == num_out
);
6081 num_out_sgpr
= num_out
;
6087 LLVMBuildRetVoid(builder
);
6090 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6091 LLVMTargetMachineRef tm
,
6092 struct si_shader
*shader
,
6094 struct pipe_debug_callback
*debug
)
6096 struct si_shader_selector
*sel
= shader
->selector
;
6097 struct si_shader_context ctx
;
6100 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6101 * conversion fails. */
6102 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
6103 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
6104 tgsi_dump(sel
->tokens
, 0);
6105 si_dump_streamout(&sel
->so
);
6108 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6109 si_llvm_context_set_tgsi(&ctx
, shader
);
6110 ctx
.separate_prolog
= !is_monolithic
;
6112 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6113 sizeof(shader
->info
.vs_output_param_offset
));
6115 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6117 ctx
.load_system_value
= declare_system_value
;
6119 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6120 si_llvm_dispose(&ctx
);
6124 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6125 LLVMValueRef parts
[2];
6126 bool need_prolog
= sel
->vs_needs_prolog
;
6128 parts
[1] = ctx
.main_fn
;
6131 union si_shader_part_key prolog_key
;
6132 si_get_vs_prolog_key(&sel
->info
,
6133 shader
->info
.num_input_sgprs
,
6134 &shader
->key
.part
.vs
.prolog
,
6135 shader
, &prolog_key
);
6136 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6137 parts
[0] = ctx
.main_fn
;
6140 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6141 1 + need_prolog
, need_prolog
, 0);
6142 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6143 if (sscreen
->b
.chip_class
>= GFX9
) {
6144 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6145 LLVMValueRef parts
[4];
6148 parts
[2] = ctx
.main_fn
;
6151 union si_shader_part_key tcs_epilog_key
;
6152 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6153 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6154 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6155 parts
[3] = ctx
.main_fn
;
6158 if (ls
->vs_needs_prolog
) {
6159 union si_shader_part_key vs_prolog_key
;
6160 si_get_vs_prolog_key(&ls
->info
,
6161 shader
->info
.num_input_sgprs
,
6162 &shader
->key
.part
.tcs
.ls_prolog
,
6163 shader
, &vs_prolog_key
);
6164 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6165 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6166 parts
[0] = ctx
.main_fn
;
6169 /* VS as LS main part */
6170 struct si_shader shader_ls
= {};
6171 shader_ls
.selector
= ls
;
6172 shader_ls
.key
.as_ls
= 1;
6173 shader_ls
.key
.mono
= shader
->key
.mono
;
6174 shader_ls
.key
.opt
= shader
->key
.opt
;
6175 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6177 if (!si_compile_tgsi_main(&ctx
, true)) {
6178 si_llvm_dispose(&ctx
);
6181 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6182 parts
[1] = ctx
.main_fn
;
6184 /* Reset the shader context. */
6185 ctx
.shader
= shader
;
6186 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6188 si_build_wrapper_function(&ctx
,
6189 parts
+ !ls
->vs_needs_prolog
,
6190 4 - !ls
->vs_needs_prolog
, 0,
6191 ls
->vs_needs_prolog
? 2 : 1);
6193 LLVMValueRef parts
[2];
6194 union si_shader_part_key epilog_key
;
6196 parts
[0] = ctx
.main_fn
;
6198 memset(&epilog_key
, 0, sizeof(epilog_key
));
6199 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6200 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6201 parts
[1] = ctx
.main_fn
;
6203 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6205 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6206 if (ctx
.screen
->b
.chip_class
>= GFX9
) {
6207 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6208 LLVMValueRef es_prolog
= NULL
;
6209 LLVMValueRef es_main
= NULL
;
6210 LLVMValueRef gs_prolog
= NULL
;
6211 LLVMValueRef gs_main
= ctx
.main_fn
;
6214 union si_shader_part_key gs_prolog_key
;
6215 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6216 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6217 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6218 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6219 gs_prolog
= ctx
.main_fn
;
6222 if (es
->vs_needs_prolog
) {
6223 union si_shader_part_key vs_prolog_key
;
6224 si_get_vs_prolog_key(&es
->info
,
6225 shader
->info
.num_input_sgprs
,
6226 &shader
->key
.part
.tcs
.ls_prolog
,
6227 shader
, &vs_prolog_key
);
6228 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6229 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6230 es_prolog
= ctx
.main_fn
;
6234 struct si_shader shader_es
= {};
6235 shader_es
.selector
= es
;
6236 shader_es
.key
.as_es
= 1;
6237 shader_es
.key
.mono
= shader
->key
.mono
;
6238 shader_es
.key
.opt
= shader
->key
.opt
;
6239 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6241 if (!si_compile_tgsi_main(&ctx
, true)) {
6242 si_llvm_dispose(&ctx
);
6245 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6246 es_main
= ctx
.main_fn
;
6248 /* Reset the shader context. */
6249 ctx
.shader
= shader
;
6250 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6252 /* Prepare the array of shader parts. */
6253 LLVMValueRef parts
[4];
6254 unsigned num_parts
= 0, main_part
, next_first_part
;
6257 parts
[num_parts
++] = es_prolog
;
6259 parts
[main_part
= num_parts
++] = es_main
;
6260 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6261 parts
[num_parts
++] = gs_main
;
6263 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6264 main_part
, next_first_part
);
6266 LLVMValueRef parts
[2];
6267 union si_shader_part_key prolog_key
;
6269 parts
[1] = ctx
.main_fn
;
6271 memset(&prolog_key
, 0, sizeof(prolog_key
));
6272 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6273 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6274 parts
[0] = ctx
.main_fn
;
6276 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6278 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6279 LLVMValueRef parts
[3];
6280 union si_shader_part_key prolog_key
;
6281 union si_shader_part_key epilog_key
;
6284 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6285 need_prolog
= si_need_ps_prolog(&prolog_key
);
6287 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6290 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6291 parts
[0] = ctx
.main_fn
;
6294 si_get_ps_epilog_key(shader
, &epilog_key
);
6295 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6296 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6298 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6299 need_prolog
? 1 : 0, 0);
6302 si_llvm_optimize_module(&ctx
);
6304 /* Post-optimization transformations and analysis. */
6305 si_optimize_vs_outputs(&ctx
);
6307 if ((debug
&& debug
->debug_message
) ||
6308 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
6309 si_count_scratch_private_memory(&ctx
);
6311 /* Compile to bytecode. */
6312 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6313 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6314 si_llvm_dispose(&ctx
);
6316 fprintf(stderr
, "LLVM failed to compile shader\n");
6320 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6321 * LLVM 3.9svn has this bug.
6323 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6324 unsigned wave_size
= 64;
6325 unsigned max_vgprs
= 256;
6326 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
6327 unsigned max_sgprs_per_wave
= 128;
6328 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6329 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6330 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6332 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6333 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6335 if (shader
->config
.num_sgprs
> max_sgprs
||
6336 shader
->config
.num_vgprs
> max_vgprs
) {
6337 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6338 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6339 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6340 max_sgprs
, max_vgprs
);
6342 /* Just terminate the process, because dependent
6343 * shaders can hang due to bad input data, but use
6344 * the env var to allow shader-db to work.
6346 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6351 /* Add the scratch offset to input SGPRs. */
6352 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6353 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6355 /* Calculate the number of fragment input VGPRs. */
6356 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6357 shader
->info
.num_input_vgprs
= 0;
6358 shader
->info
.face_vgpr_index
= -1;
6360 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6361 shader
->info
.num_input_vgprs
+= 2;
6362 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6363 shader
->info
.num_input_vgprs
+= 2;
6364 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6365 shader
->info
.num_input_vgprs
+= 2;
6366 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6367 shader
->info
.num_input_vgprs
+= 3;
6368 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6369 shader
->info
.num_input_vgprs
+= 2;
6370 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6371 shader
->info
.num_input_vgprs
+= 2;
6372 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6373 shader
->info
.num_input_vgprs
+= 2;
6374 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6375 shader
->info
.num_input_vgprs
+= 1;
6376 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6377 shader
->info
.num_input_vgprs
+= 1;
6378 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6379 shader
->info
.num_input_vgprs
+= 1;
6380 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6381 shader
->info
.num_input_vgprs
+= 1;
6382 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6383 shader
->info
.num_input_vgprs
+= 1;
6384 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6385 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6386 shader
->info
.num_input_vgprs
+= 1;
6388 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
6389 shader
->info
.num_input_vgprs
+= 1;
6390 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6391 shader
->info
.num_input_vgprs
+= 1;
6392 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6393 shader
->info
.num_input_vgprs
+= 1;
6400 * Create, compile and return a shader part (prolog or epilog).
6402 * \param sscreen screen
6403 * \param list list of shader parts of the same category
6404 * \param type shader type
6405 * \param key shader part key
6406 * \param prolog whether the part being requested is a prolog
6407 * \param tm LLVM target machine
6408 * \param debug debug callback
6409 * \param build the callback responsible for building the main function
6410 * \return non-NULL on success
6412 static struct si_shader_part
*
6413 si_get_shader_part(struct si_screen
*sscreen
,
6414 struct si_shader_part
**list
,
6415 enum pipe_shader_type type
,
6417 union si_shader_part_key
*key
,
6418 LLVMTargetMachineRef tm
,
6419 struct pipe_debug_callback
*debug
,
6420 void (*build
)(struct si_shader_context
*,
6421 union si_shader_part_key
*),
6424 struct si_shader_part
*result
;
6426 mtx_lock(&sscreen
->shader_parts_mutex
);
6428 /* Find existing. */
6429 for (result
= *list
; result
; result
= result
->next
) {
6430 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
6431 mtx_unlock(&sscreen
->shader_parts_mutex
);
6436 /* Compile a new one. */
6437 result
= CALLOC_STRUCT(si_shader_part
);
6440 struct si_shader shader
= {};
6441 struct si_shader_context ctx
;
6442 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6444 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6445 ctx
.shader
= &shader
;
6449 case PIPE_SHADER_VERTEX
:
6451 case PIPE_SHADER_TESS_CTRL
:
6453 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
6455 case PIPE_SHADER_GEOMETRY
:
6458 case PIPE_SHADER_FRAGMENT
:
6460 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
6462 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
6465 unreachable("bad shader part");
6471 si_llvm_optimize_module(&ctx
);
6473 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
6474 gallivm
->module
, debug
, ctx
.type
, name
)) {
6480 result
->next
= *list
;
6484 si_llvm_dispose(&ctx
);
6485 mtx_unlock(&sscreen
->shader_parts_mutex
);
6490 * Build the vertex shader prolog function.
6492 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
6493 * All inputs are returned unmodified. The vertex load indices are
6494 * stored after them, which will be used by the API VS for fetching inputs.
6496 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
6501 * (VertexID + BaseVertex),
6502 * (InstanceID + StartInstance),
6503 * (InstanceID / 2 + StartInstance)
6505 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
6506 union si_shader_part_key
*key
)
6508 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6509 LLVMTypeRef
*params
, *returns
;
6510 LLVMValueRef ret
, func
;
6511 int last_sgpr
, num_params
, num_returns
, i
;
6512 unsigned first_vs_vgpr
= key
->vs_prolog
.num_input_sgprs
+
6513 key
->vs_prolog
.num_merged_next_stage_vgprs
;
6514 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
6515 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
6517 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
6519 ctx
->param_vertex_id
= first_vs_vgpr
;
6520 ctx
->param_instance_id
= first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
6522 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
6523 params
= alloca(num_all_input_regs
* sizeof(LLVMTypeRef
));
6524 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
6525 sizeof(LLVMTypeRef
));
6529 /* Declare input and output SGPRs. */
6531 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6532 params
[num_params
++] = ctx
->i32
;
6533 returns
[num_returns
++] = ctx
->i32
;
6535 last_sgpr
= num_params
- 1;
6537 /* Preloaded VGPRs (outputs must be floats) */
6538 for (i
= 0; i
< num_input_vgprs
; i
++) {
6539 params
[num_params
++] = ctx
->i32
;
6540 returns
[num_returns
++] = ctx
->f32
;
6543 /* Vertex load indices. */
6544 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
6545 returns
[num_returns
++] = ctx
->f32
;
6547 /* Create the function. */
6548 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
6549 num_params
, last_sgpr
, 0);
6550 func
= ctx
->main_fn
;
6552 if (key
->vs_prolog
.num_merged_next_stage_vgprs
&&
6553 !key
->vs_prolog
.is_monolithic
)
6554 si_init_exec_from_input(ctx
, 3, 0);
6556 /* Copy inputs to outputs. This should be no-op, as the registers match,
6557 * but it will prevent the compiler from overwriting them unintentionally.
6559 ret
= ctx
->return_value
;
6560 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6561 LLVMValueRef p
= LLVMGetParam(func
, i
);
6562 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
6564 for (; i
< num_params
; i
++) {
6565 LLVMValueRef p
= LLVMGetParam(func
, i
);
6566 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
6567 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
6570 /* Compute vertex load indices from instance divisors. */
6571 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
6572 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
6576 /* InstanceID / Divisor + StartInstance */
6577 index
= get_instance_index_for_fetch(ctx
,
6579 SI_SGPR_START_INSTANCE
,
6582 /* VertexID + BaseVertex */
6583 index
= LLVMBuildAdd(gallivm
->builder
,
6584 LLVMGetParam(func
, ctx
->param_vertex_id
),
6585 LLVMGetParam(func
, user_sgpr_base
+
6586 SI_SGPR_BASE_VERTEX
), "");
6589 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
6590 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
6594 si_llvm_build_ret(ctx
, ret
);
6597 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
6598 LLVMTargetMachineRef tm
,
6599 struct si_shader
*shader
,
6600 struct pipe_debug_callback
*debug
,
6601 struct si_shader
*main_part
,
6602 const struct si_vs_prolog_bits
*key
)
6604 struct si_shader_selector
*vs
= main_part
->selector
;
6606 /* The prolog is a no-op if there are no inputs. */
6607 if (!vs
->vs_needs_prolog
)
6610 /* Get the prolog. */
6611 union si_shader_part_key prolog_key
;
6612 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
6613 key
, shader
, &prolog_key
);
6616 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
6617 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
6618 debug
, si_build_vs_prolog_function
,
6619 "Vertex Shader Prolog");
6620 return shader
->prolog
!= NULL
;
6624 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
6626 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
6627 LLVMTargetMachineRef tm
,
6628 struct si_shader
*shader
,
6629 struct pipe_debug_callback
*debug
)
6631 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
6632 &shader
->key
.part
.vs
.prolog
);
6636 * Compile the TCS epilog function. This writes tesselation factors to memory
6637 * based on the output primitive type of the tesselator (determined by TES).
6639 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
6640 union si_shader_part_key
*key
)
6642 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6643 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6644 LLVMTypeRef params
[32];
6646 int last_sgpr
, num_params
= 0;
6648 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
6649 params
[num_params
++] = ctx
->i64
;
6650 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
6651 params
[num_params
++] = ctx
->i32
; /* wave info */
6652 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
6653 params
[num_params
++] = ctx
->i32
;
6654 params
[num_params
++] = ctx
->i32
;
6655 params
[num_params
++] = ctx
->i32
;
6656 params
[num_params
++] = ctx
->i64
;
6657 params
[num_params
++] = ctx
->i64
;
6658 params
[num_params
++] = ctx
->i64
;
6659 params
[num_params
++] = ctx
->i64
;
6660 params
[num_params
++] = ctx
->i32
;
6661 params
[num_params
++] = ctx
->i32
;
6662 params
[num_params
++] = ctx
->i32
;
6663 params
[num_params
++] = ctx
->i32
;
6664 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
6665 params
[num_params
++] = ctx
->i32
;
6666 params
[num_params
++] = ctx
->i32
;
6667 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
6668 params
[ctx
->param_tcs_factor_addr_base64k
= num_params
++] = ctx
->i32
;
6670 params
[num_params
++] = ctx
->i64
;
6671 params
[num_params
++] = ctx
->i64
;
6672 params
[num_params
++] = ctx
->i64
;
6673 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
6674 params
[num_params
++] = ctx
->i32
;
6675 params
[num_params
++] = ctx
->i32
;
6676 params
[num_params
++] = ctx
->i32
;
6677 params
[ctx
->param_tcs_offchip_addr_base64k
= num_params
++] = ctx
->i32
;
6678 params
[ctx
->param_tcs_factor_addr_base64k
= num_params
++] = ctx
->i32
;
6679 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
6680 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
6682 last_sgpr
= num_params
- 1;
6684 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
6685 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
6686 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
6688 /* Create the function. */
6689 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
,
6690 ctx
->screen
->b
.chip_class
>= CIK
? 128 : 64);
6691 declare_lds_as_pointer(ctx
);
6692 func
= ctx
->main_fn
;
6694 si_write_tess_factors(bld_base
,
6695 LLVMGetParam(func
, last_sgpr
+ 1),
6696 LLVMGetParam(func
, last_sgpr
+ 2),
6697 LLVMGetParam(func
, last_sgpr
+ 3));
6699 LLVMBuildRetVoid(gallivm
->builder
);
6703 * Select and compile (or reuse) TCS parts (epilog).
6705 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
6706 LLVMTargetMachineRef tm
,
6707 struct si_shader
*shader
,
6708 struct pipe_debug_callback
*debug
)
6710 if (sscreen
->b
.chip_class
>= GFX9
) {
6711 struct si_shader
*ls_main_part
=
6712 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
6714 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
6715 &shader
->key
.part
.tcs
.ls_prolog
))
6718 shader
->previous_stage
= ls_main_part
;
6721 /* Get the epilog. */
6722 union si_shader_part_key epilog_key
;
6723 memset(&epilog_key
, 0, sizeof(epilog_key
));
6724 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6726 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
6727 PIPE_SHADER_TESS_CTRL
, false,
6728 &epilog_key
, tm
, debug
,
6729 si_build_tcs_epilog_function
,
6730 "Tessellation Control Shader Epilog");
6731 return shader
->epilog
!= NULL
;
6735 * Select and compile (or reuse) GS parts (prolog).
6737 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
6738 LLVMTargetMachineRef tm
,
6739 struct si_shader
*shader
,
6740 struct pipe_debug_callback
*debug
)
6742 if (sscreen
->b
.chip_class
>= GFX9
) {
6743 struct si_shader
*es_main_part
=
6744 shader
->key
.part
.gs
.es
->main_shader_part_es
;
6746 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
6747 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
6748 &shader
->key
.part
.gs
.vs_prolog
))
6751 shader
->previous_stage
= es_main_part
;
6754 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
6757 union si_shader_part_key prolog_key
;
6758 memset(&prolog_key
, 0, sizeof(prolog_key
));
6759 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6761 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
6762 PIPE_SHADER_GEOMETRY
, true,
6763 &prolog_key
, tm
, debug
,
6764 si_build_gs_prolog_function
,
6765 "Geometry Shader Prolog");
6766 return shader
->prolog2
!= NULL
;
6770 * Build the pixel shader prolog function. This handles:
6771 * - two-side color selection and interpolation
6772 * - overriding interpolation parameters for the API PS
6773 * - polygon stippling
6775 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
6776 * overriden by other states. (e.g. per-sample interpolation)
6777 * Interpolated colors are stored after the preloaded VGPRs.
6779 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
6780 union si_shader_part_key
*key
)
6782 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6783 LLVMTypeRef
*params
;
6784 LLVMValueRef ret
, func
;
6785 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
6787 assert(si_need_ps_prolog(key
));
6789 /* Number of inputs + 8 color elements. */
6790 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
6791 key
->ps_prolog
.num_input_vgprs
+ 8) *
6792 sizeof(LLVMTypeRef
));
6794 /* Declare inputs. */
6796 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
6797 params
[num_params
++] = ctx
->i32
;
6798 last_sgpr
= num_params
- 1;
6800 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
6801 params
[num_params
++] = ctx
->f32
;
6803 /* Declare outputs (same as inputs + add colors if needed) */
6804 num_returns
= num_params
;
6805 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
6806 for (i
= 0; i
< num_color_channels
; i
++)
6807 params
[num_returns
++] = ctx
->f32
;
6809 /* Create the function. */
6810 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
6811 num_params
, last_sgpr
, 0);
6812 func
= ctx
->main_fn
;
6814 /* Copy inputs to outputs. This should be no-op, as the registers match,
6815 * but it will prevent the compiler from overwriting them unintentionally.
6817 ret
= ctx
->return_value
;
6818 for (i
= 0; i
< num_params
; i
++) {
6819 LLVMValueRef p
= LLVMGetParam(func
, i
);
6820 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
6823 /* Polygon stippling. */
6824 if (key
->ps_prolog
.states
.poly_stipple
) {
6825 /* POS_FIXED_PT is always last. */
6826 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
6827 key
->ps_prolog
.num_input_vgprs
- 1;
6828 LLVMValueRef ptr
[2], list
;
6830 /* Get the pointer to rw buffers. */
6831 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
6832 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
6833 list
= lp_build_gather_values(gallivm
, ptr
, 2);
6834 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
6835 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
6836 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
), "");
6838 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
6841 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
6842 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
6843 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
6844 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
6846 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
6847 * The hw doesn't compute CENTROID if the whole wave only
6848 * contains fully-covered quads.
6850 * PRIM_MASK is after user SGPRs.
6852 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
6853 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
6854 LLVMConstInt(ctx
->i32
, 31, 0), "");
6855 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
6858 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
6859 /* Read PERSP_CENTER. */
6860 for (i
= 0; i
< 2; i
++)
6861 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
6862 /* Read PERSP_CENTROID. */
6863 for (i
= 0; i
< 2; i
++)
6864 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
6865 /* Select PERSP_CENTROID. */
6866 for (i
= 0; i
< 2; i
++) {
6867 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
6868 center
[i
], centroid
[i
], "");
6869 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6870 tmp
, base
+ 4 + i
, "");
6873 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
6874 /* Read LINEAR_CENTER. */
6875 for (i
= 0; i
< 2; i
++)
6876 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
6877 /* Read LINEAR_CENTROID. */
6878 for (i
= 0; i
< 2; i
++)
6879 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
6880 /* Select LINEAR_CENTROID. */
6881 for (i
= 0; i
< 2; i
++) {
6882 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
6883 center
[i
], centroid
[i
], "");
6884 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6885 tmp
, base
+ 10 + i
, "");
6890 /* Force per-sample interpolation. */
6891 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
6892 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
6893 LLVMValueRef persp_sample
[2];
6895 /* Read PERSP_SAMPLE. */
6896 for (i
= 0; i
< 2; i
++)
6897 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
6898 /* Overwrite PERSP_CENTER. */
6899 for (i
= 0; i
< 2; i
++)
6900 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6901 persp_sample
[i
], base
+ 2 + i
, "");
6902 /* Overwrite PERSP_CENTROID. */
6903 for (i
= 0; i
< 2; i
++)
6904 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6905 persp_sample
[i
], base
+ 4 + i
, "");
6907 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
6908 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
6909 LLVMValueRef linear_sample
[2];
6911 /* Read LINEAR_SAMPLE. */
6912 for (i
= 0; i
< 2; i
++)
6913 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
6914 /* Overwrite LINEAR_CENTER. */
6915 for (i
= 0; i
< 2; i
++)
6916 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6917 linear_sample
[i
], base
+ 8 + i
, "");
6918 /* Overwrite LINEAR_CENTROID. */
6919 for (i
= 0; i
< 2; i
++)
6920 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6921 linear_sample
[i
], base
+ 10 + i
, "");
6924 /* Force center interpolation. */
6925 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
6926 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
6927 LLVMValueRef persp_center
[2];
6929 /* Read PERSP_CENTER. */
6930 for (i
= 0; i
< 2; i
++)
6931 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
6932 /* Overwrite PERSP_SAMPLE. */
6933 for (i
= 0; i
< 2; i
++)
6934 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6935 persp_center
[i
], base
+ i
, "");
6936 /* Overwrite PERSP_CENTROID. */
6937 for (i
= 0; i
< 2; i
++)
6938 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6939 persp_center
[i
], base
+ 4 + i
, "");
6941 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
6942 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
6943 LLVMValueRef linear_center
[2];
6945 /* Read LINEAR_CENTER. */
6946 for (i
= 0; i
< 2; i
++)
6947 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
6948 /* Overwrite LINEAR_SAMPLE. */
6949 for (i
= 0; i
< 2; i
++)
6950 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6951 linear_center
[i
], base
+ 6 + i
, "");
6952 /* Overwrite LINEAR_CENTROID. */
6953 for (i
= 0; i
< 2; i
++)
6954 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
6955 linear_center
[i
], base
+ 10 + i
, "");
6958 /* Interpolate colors. */
6959 for (i
= 0; i
< 2; i
++) {
6960 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
6961 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
6962 key
->ps_prolog
.face_vgpr_index
;
6963 LLVMValueRef interp
[2], color
[4];
6964 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
6969 /* If the interpolation qualifier is not CONSTANT (-1). */
6970 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
6971 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
6972 key
->ps_prolog
.color_interp_vgpr_index
[i
];
6974 /* Get the (i,j) updated by bc_optimize handling. */
6975 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
6977 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
6978 interp_vgpr
+ 1, "");
6979 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
6982 /* Use the absolute location of the input. */
6983 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
6985 if (key
->ps_prolog
.states
.color_two_side
) {
6986 face
= LLVMGetParam(func
, face_vgpr
);
6987 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
6990 interp_fs_input(ctx
,
6991 key
->ps_prolog
.color_attr_index
[i
],
6992 TGSI_SEMANTIC_COLOR
, i
,
6993 key
->ps_prolog
.num_interp_inputs
,
6994 key
->ps_prolog
.colors_read
, interp_ij
,
6995 prim_mask
, face
, color
);
6998 unsigned chan
= u_bit_scan(&writemask
);
6999 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
7004 /* Tell LLVM to insert WQM instruction sequence when needed. */
7005 if (key
->ps_prolog
.wqm
) {
7006 LLVMAddTargetDependentFunctionAttr(func
,
7007 "amdgpu-ps-wqm-outputs", "");
7010 si_llvm_build_ret(ctx
, ret
);
7014 * Build the pixel shader epilog function. This handles everything that must be
7015 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7017 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7018 union si_shader_part_key
*key
)
7020 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7021 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7022 LLVMTypeRef params
[16+8*4+3];
7023 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7024 int last_sgpr
, num_params
= 0, i
;
7025 struct si_ps_exports exp
= {};
7027 /* Declare input SGPRs. */
7028 params
[ctx
->param_rw_buffers
= num_params
++] = ctx
->i64
;
7029 params
[ctx
->param_const_and_shader_buffers
= num_params
++] = ctx
->i64
;
7030 params
[ctx
->param_samplers_and_images
= num_params
++] = ctx
->i64
;
7031 assert(num_params
== SI_PARAM_ALPHA_REF
);
7032 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
7033 last_sgpr
= SI_PARAM_ALPHA_REF
;
7035 /* Declare input VGPRs. */
7036 num_params
= (last_sgpr
+ 1) +
7037 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7038 key
->ps_epilog
.writes_z
+
7039 key
->ps_epilog
.writes_stencil
+
7040 key
->ps_epilog
.writes_samplemask
;
7042 num_params
= MAX2(num_params
,
7043 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7045 assert(num_params
<= ARRAY_SIZE(params
));
7047 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
7048 params
[i
] = ctx
->f32
;
7050 /* Create the function. */
7051 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
,
7053 /* Disable elimination of unused inputs. */
7054 si_llvm_add_attribute(ctx
->main_fn
,
7055 "InitialPSInputAddr", 0xffffff);
7057 /* Process colors. */
7058 unsigned vgpr
= last_sgpr
+ 1;
7059 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7060 int last_color_export
= -1;
7062 /* Find the last color export. */
7063 if (!key
->ps_epilog
.writes_z
&&
7064 !key
->ps_epilog
.writes_stencil
&&
7065 !key
->ps_epilog
.writes_samplemask
) {
7066 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7068 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7069 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7070 /* Just set this if any of the colorbuffers are enabled. */
7072 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7073 last_color_export
= 0;
7075 for (i
= 0; i
< 8; i
++)
7076 if (colors_written
& (1 << i
) &&
7077 (spi_format
>> (i
* 4)) & 0xf)
7078 last_color_export
= i
;
7082 while (colors_written
) {
7083 LLVMValueRef color
[4];
7084 int mrt
= u_bit_scan(&colors_written
);
7086 for (i
= 0; i
< 4; i
++)
7087 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7089 si_export_mrt_color(bld_base
, color
, mrt
,
7091 mrt
== last_color_export
, &exp
);
7094 /* Process depth, stencil, samplemask. */
7095 if (key
->ps_epilog
.writes_z
)
7096 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7097 if (key
->ps_epilog
.writes_stencil
)
7098 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7099 if (key
->ps_epilog
.writes_samplemask
)
7100 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7102 if (depth
|| stencil
|| samplemask
)
7103 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7104 else if (last_color_export
== -1)
7105 si_export_null(bld_base
);
7108 si_emit_ps_exports(ctx
, &exp
);
7111 LLVMBuildRetVoid(gallivm
->builder
);
7115 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7117 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7118 LLVMTargetMachineRef tm
,
7119 struct si_shader
*shader
,
7120 struct pipe_debug_callback
*debug
)
7122 union si_shader_part_key prolog_key
;
7123 union si_shader_part_key epilog_key
;
7125 /* Get the prolog. */
7126 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7128 /* The prolog is a no-op if these aren't set. */
7129 if (si_need_ps_prolog(&prolog_key
)) {
7131 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7132 PIPE_SHADER_FRAGMENT
, true,
7133 &prolog_key
, tm
, debug
,
7134 si_build_ps_prolog_function
,
7135 "Fragment Shader Prolog");
7136 if (!shader
->prolog
)
7140 /* Get the epilog. */
7141 si_get_ps_epilog_key(shader
, &epilog_key
);
7144 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7145 PIPE_SHADER_FRAGMENT
, false,
7146 &epilog_key
, tm
, debug
,
7147 si_build_ps_epilog_function
,
7148 "Fragment Shader Epilog");
7149 if (!shader
->epilog
)
7152 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7153 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7154 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7155 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7158 /* Set up the enable bits for per-sample shading if needed. */
7159 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7160 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7161 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7162 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7163 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7164 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7166 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7167 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7168 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7169 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7170 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7171 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7173 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7174 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7175 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7176 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7177 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7178 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7180 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7181 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7182 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7183 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7184 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7185 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7188 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7189 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7190 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7191 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7192 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7195 /* At least one pair of interpolation weights must be enabled. */
7196 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7197 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7198 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7201 /* The sample mask input is always enabled, because the API shader always
7202 * passes it through to the epilog. Disable it here if it's unused.
7204 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7205 !shader
->selector
->info
.reads_samplemask
)
7206 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7211 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7214 /* SPI barrier management bug:
7215 * Make sure we have at least 4k of LDS in use to avoid the bug.
7216 * It applies to workgroup sizes of more than one wavefront.
7218 if (sscreen
->b
.family
== CHIP_BONAIRE
||
7219 sscreen
->b
.family
== CHIP_KABINI
||
7220 sscreen
->b
.family
== CHIP_MULLINS
)
7221 *lds_size
= MAX2(*lds_size
, 8);
7224 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7225 struct si_shader
*shader
)
7227 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7229 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7231 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7232 si_get_max_workgroup_size(shader
) > 64) {
7233 si_multiwave_lds_size_workaround(sscreen
,
7234 &shader
->config
.lds_size
);
7238 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7239 struct si_shader
*shader
,
7240 struct pipe_debug_callback
*debug
)
7242 struct si_shader_selector
*sel
= shader
->selector
;
7243 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7246 /* LS, ES, VS are compiled on demand if the main part hasn't been
7247 * compiled for that stage.
7249 * Vertex shaders are compiled on demand when a vertex fetch
7250 * workaround must be applied.
7252 if (shader
->is_monolithic
) {
7253 /* Monolithic shader (compiled as a whole, has many variants,
7254 * may take a long time to compile).
7256 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7260 /* The shader consists of 2-3 parts:
7262 * - the middle part is the user shader, it has 1 variant only
7263 * and it was compiled during the creation of the shader
7265 * - the prolog part is inserted at the beginning
7266 * - the epilog part is inserted at the end
7268 * The prolog and epilog have many (but simple) variants.
7271 /* Copy the compiled TGSI shader data over. */
7272 shader
->is_binary_shared
= true;
7273 shader
->binary
= mainp
->binary
;
7274 shader
->config
= mainp
->config
;
7275 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7276 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7277 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7278 memcpy(shader
->info
.vs_output_param_offset
,
7279 mainp
->info
.vs_output_param_offset
,
7280 sizeof(mainp
->info
.vs_output_param_offset
));
7281 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7282 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7283 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7285 /* Select prologs and/or epilogs. */
7286 switch (sel
->type
) {
7287 case PIPE_SHADER_VERTEX
:
7288 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
7291 case PIPE_SHADER_TESS_CTRL
:
7292 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
7295 case PIPE_SHADER_TESS_EVAL
:
7297 case PIPE_SHADER_GEOMETRY
:
7298 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
7301 case PIPE_SHADER_FRAGMENT
:
7302 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
7305 /* Make sure we have at least as many VGPRs as there
7306 * are allocated inputs.
7308 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7309 shader
->info
.num_input_vgprs
);
7313 /* Update SGPR and VGPR counts. */
7314 if (shader
->prolog
) {
7315 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7316 shader
->prolog
->config
.num_sgprs
);
7317 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7318 shader
->prolog
->config
.num_vgprs
);
7320 if (shader
->previous_stage
) {
7321 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7322 shader
->previous_stage
->config
.num_sgprs
);
7323 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7324 shader
->previous_stage
->config
.num_vgprs
);
7325 shader
->config
.spilled_sgprs
=
7326 MAX2(shader
->config
.spilled_sgprs
,
7327 shader
->previous_stage
->config
.spilled_sgprs
);
7328 shader
->config
.spilled_vgprs
=
7329 MAX2(shader
->config
.spilled_vgprs
,
7330 shader
->previous_stage
->config
.spilled_vgprs
);
7331 shader
->config
.private_mem_vgprs
=
7332 MAX2(shader
->config
.private_mem_vgprs
,
7333 shader
->previous_stage
->config
.private_mem_vgprs
);
7334 shader
->config
.scratch_bytes_per_wave
=
7335 MAX2(shader
->config
.scratch_bytes_per_wave
,
7336 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
7337 shader
->info
.uses_instanceid
|=
7338 shader
->previous_stage
->info
.uses_instanceid
;
7340 if (shader
->prolog2
) {
7341 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7342 shader
->prolog2
->config
.num_sgprs
);
7343 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7344 shader
->prolog2
->config
.num_vgprs
);
7346 if (shader
->epilog
) {
7347 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7348 shader
->epilog
->config
.num_sgprs
);
7349 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7350 shader
->epilog
->config
.num_vgprs
);
7354 si_fix_resource_usage(sscreen
, shader
);
7355 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
7359 r
= si_shader_binary_upload(sscreen
, shader
);
7361 fprintf(stderr
, "LLVM failed to upload shader\n");
7368 void si_shader_destroy(struct si_shader
*shader
)
7370 if (shader
->scratch_bo
)
7371 r600_resource_reference(&shader
->scratch_bo
, NULL
);
7373 r600_resource_reference(&shader
->bo
, NULL
);
7375 if (!shader
->is_binary_shared
)
7376 radeon_shader_binary_clean(&shader
->binary
);
7378 free(shader
->shader_log
);