2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "radeon/radeon_elf_util.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_build.h"
40 #include "tgsi/tgsi_util.h"
41 #include "tgsi/tgsi_dump.h"
43 #include "ac_llvm_util.h"
44 #include "si_shader_internal.h"
49 static const char *scratch_rsrc_dword0_symbol
=
50 "SCRATCH_RSRC_DWORD0";
52 static const char *scratch_rsrc_dword1_symbol
=
53 "SCRATCH_RSRC_DWORD1";
55 struct si_shader_output_values
57 LLVMValueRef values
[4];
58 unsigned semantic_name
;
59 unsigned semantic_index
;
60 ubyte vertex_stream
[4];
63 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
64 struct si_screen
*sscreen
,
65 struct si_shader
*shader
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
75 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
76 union si_shader_part_key
*key
);
77 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
86 /* Ideally pass the sample mask input to the PS epilog as v13, which
87 * is its usual location, so that the shader doesn't have to add v_mov.
89 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
91 /* The VS location of the PrimitiveID input is the same in the epilog,
92 * so that the main shader part doesn't have to move it.
94 #define VS_EPILOG_PRIMID_LOC 2
102 #define SENDMSG_GS_DONE 3
104 #define SENDMSG_GS_OP_NOP (0 << 4)
105 #define SENDMSG_GS_OP_CUT (1 << 4)
106 #define SENDMSG_GS_OP_EMIT (2 << 4)
107 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
110 * Returns a unique index for a semantic name and index. The index must be
111 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
114 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
116 switch (semantic_name
) {
117 case TGSI_SEMANTIC_POSITION
:
119 case TGSI_SEMANTIC_PSIZE
:
121 case TGSI_SEMANTIC_CLIPDIST
:
124 case TGSI_SEMANTIC_GENERIC
:
128 assert(!"invalid generic index");
131 /* patch indices are completely separate and thus start from 0 */
132 case TGSI_SEMANTIC_TESSOUTER
:
134 case TGSI_SEMANTIC_TESSINNER
:
136 case TGSI_SEMANTIC_PATCH
:
140 assert(!"invalid semantic name");
145 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
148 case TGSI_SEMANTIC_FOG
:
150 case TGSI_SEMANTIC_LAYER
:
152 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
154 case TGSI_SEMANTIC_PRIMID
:
156 case TGSI_SEMANTIC_COLOR
: /* these alias */
157 case TGSI_SEMANTIC_BCOLOR
:
159 case TGSI_SEMANTIC_TEXCOORD
:
162 assert(!"invalid semantic name");
168 * Get the value of a shader input parameter and extract a bitfield.
170 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
171 unsigned param
, unsigned rshift
,
174 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
175 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
178 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
179 value
= bitcast(&ctx
->soa
.bld_base
,
180 TGSI_TYPE_UNSIGNED
, value
);
183 value
= LLVMBuildLShr(gallivm
->builder
, value
,
184 lp_build_const_int32(gallivm
, rshift
), "");
186 if (rshift
+ bitwidth
< 32) {
187 unsigned mask
= (1 << bitwidth
) - 1;
188 value
= LLVMBuildAnd(gallivm
->builder
, value
,
189 lp_build_const_int32(gallivm
, mask
), "");
195 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
198 case PIPE_SHADER_TESS_CTRL
:
199 return unpack_param(ctx
, SI_PARAM_REL_IDS
, 0, 8);
201 case PIPE_SHADER_TESS_EVAL
:
202 return LLVMGetParam(ctx
->main_fn
,
203 ctx
->param_tes_rel_patch_id
);
211 /* Tessellation shaders pass outputs to the next shader using LDS.
213 * LS outputs = TCS inputs
214 * TCS outputs = TES inputs
217 * - TCS inputs for patch 0
218 * - TCS inputs for patch 1
219 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
221 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
222 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
223 * - TCS outputs for patch 1
224 * - Per-patch TCS outputs for patch 1
225 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
226 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
229 * All three shaders VS(LS), TCS, TES share the same LDS space.
233 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
235 if (ctx
->type
== PIPE_SHADER_VERTEX
)
236 return unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 0, 13);
237 else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
238 return unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 0, 13);
246 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
248 return unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 0, 13);
252 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
254 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
256 SI_PARAM_TCS_OUT_OFFSETS
,
262 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
264 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
266 SI_PARAM_TCS_OUT_OFFSETS
,
272 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
274 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
275 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
276 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
278 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
282 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
284 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
285 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
286 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
287 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
289 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
290 LLVMBuildMul(gallivm
->builder
, patch_stride
,
296 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
298 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
299 LLVMValueRef patch0_patch_data_offset
=
300 get_tcs_out_patch0_patch_data_offset(ctx
);
301 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
302 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
304 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
305 LLVMBuildMul(gallivm
->builder
, patch_stride
,
310 static LLVMValueRef
build_gep0(struct si_shader_context
*ctx
,
311 LLVMValueRef base_ptr
, LLVMValueRef index
)
313 LLVMValueRef indices
[2] = {
314 LLVMConstInt(ctx
->i32
, 0, 0),
317 return LLVMBuildGEP(ctx
->gallivm
.builder
, base_ptr
,
321 static void build_indexed_store(struct si_shader_context
*ctx
,
322 LLVMValueRef base_ptr
, LLVMValueRef index
,
325 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
326 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
328 LLVMBuildStore(gallivm
->builder
, value
,
329 build_gep0(ctx
, base_ptr
, index
));
333 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
334 * It's equivalent to doing a load from &base_ptr[index].
336 * \param base_ptr Where the array starts.
337 * \param index The element index into the array.
338 * \param uniform Whether the base_ptr and index can be assumed to be
339 * dynamically uniform
341 static LLVMValueRef
build_indexed_load(struct si_shader_context
*ctx
,
342 LLVMValueRef base_ptr
, LLVMValueRef index
,
345 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
346 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
347 LLVMValueRef pointer
;
349 pointer
= build_gep0(ctx
, base_ptr
, index
);
351 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
352 return LLVMBuildLoad(gallivm
->builder
, pointer
, "");
356 * Do a load from &base_ptr[index], but also add a flag that it's loading
357 * a constant from a dynamically uniform index.
359 static LLVMValueRef
build_indexed_load_const(
360 struct si_shader_context
*ctx
,
361 LLVMValueRef base_ptr
, LLVMValueRef index
)
363 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
364 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
368 static LLVMValueRef
get_instance_index_for_fetch(
369 struct si_shader_context
*radeon_bld
,
370 unsigned param_start_instance
, unsigned divisor
)
372 struct si_shader_context
*ctx
=
373 si_shader_context(&radeon_bld
->soa
.bld_base
);
374 struct gallivm_state
*gallivm
= radeon_bld
->soa
.bld_base
.base
.gallivm
;
376 LLVMValueRef result
= LLVMGetParam(radeon_bld
->main_fn
,
377 ctx
->param_instance_id
);
379 /* The division must be done before START_INSTANCE is added. */
381 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
382 lp_build_const_int32(gallivm
, divisor
), "");
384 return LLVMBuildAdd(gallivm
->builder
, result
,
385 LLVMGetParam(radeon_bld
->main_fn
, param_start_instance
), "");
388 static void declare_input_vs(
389 struct si_shader_context
*ctx
,
390 unsigned input_index
,
391 const struct tgsi_full_declaration
*decl
,
394 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
395 struct gallivm_state
*gallivm
= base
->gallivm
;
400 LLVMValueRef t_list_ptr
;
401 LLVMValueRef t_offset
;
403 LLVMValueRef attribute_offset
;
404 LLVMValueRef buffer_index
;
405 LLVMValueRef args
[3];
408 /* Load the T list */
409 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VERTEX_BUFFERS
);
411 t_offset
= lp_build_const_int32(gallivm
, input_index
);
413 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
415 /* Build the attribute offset */
416 attribute_offset
= lp_build_const_int32(gallivm
, 0);
418 buffer_index
= LLVMGetParam(ctx
->main_fn
,
419 ctx
->param_vertex_index0
+
423 args
[1] = attribute_offset
;
424 args
[2] = buffer_index
;
425 input
= lp_build_intrinsic(gallivm
->builder
,
426 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
427 LP_FUNC_ATTR_READNONE
);
429 /* Break up the vec4 into individual components */
430 for (chan
= 0; chan
< 4; chan
++) {
431 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
432 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
433 input
, llvm_chan
, "");
436 fix_fetch
= (ctx
->shader
->key
.mono
.vs
.fix_fetch
>> (2 * input_index
)) & 3;
438 /* The hardware returns an unsigned value; convert it to a
441 LLVMValueRef tmp
= out
[3];
442 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
444 /* First, recover the sign-extended signed integer value. */
445 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
446 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
448 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
450 /* For the integer-like cases, do a natural sign extension.
452 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
453 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
456 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
457 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
458 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
459 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
461 /* Convert back to the right type. */
462 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
464 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
465 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
466 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
467 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
468 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
469 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
476 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
479 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
482 return bld_base
->uint_bld
.zero
;
485 case PIPE_SHADER_VERTEX
:
486 return LLVMGetParam(ctx
->main_fn
,
487 ctx
->param_vs_prim_id
);
488 case PIPE_SHADER_TESS_CTRL
:
489 return LLVMGetParam(ctx
->main_fn
,
491 case PIPE_SHADER_TESS_EVAL
:
492 return LLVMGetParam(ctx
->main_fn
,
493 ctx
->param_tes_patch_id
);
494 case PIPE_SHADER_GEOMETRY
:
495 return LLVMGetParam(ctx
->main_fn
,
496 SI_PARAM_PRIMITIVE_ID
);
499 return bld_base
->uint_bld
.zero
;
504 * Return the value of tgsi_ind_register for indexing.
505 * This is the indirect index with the constant offset added to it.
507 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
508 const struct tgsi_ind_register
*ind
,
511 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
514 result
= ctx
->soa
.addr
[ind
->Index
][ind
->Swizzle
];
515 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
516 result
= LLVMBuildAdd(gallivm
->builder
, result
,
517 lp_build_const_int32(gallivm
, rel_index
), "");
522 * Like get_indirect_index, but restricts the return value to a (possibly
523 * undefined) value inside [0..num).
525 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
526 const struct tgsi_ind_register
*ind
,
527 int rel_index
, unsigned num
)
529 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
531 /* LLVM 3.8: If indirect resource indexing is used:
535 if (HAVE_LLVM
<= 0x0308)
536 return LLVMGetUndef(ctx
->i32
);
538 return si_llvm_bound_index(ctx
, result
, num
);
543 * Calculate a dword address given an input or output register and a stride.
545 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
546 const struct tgsi_full_dst_register
*dst
,
547 const struct tgsi_full_src_register
*src
,
548 LLVMValueRef vertex_dw_stride
,
549 LLVMValueRef base_addr
)
551 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
552 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
553 ubyte
*name
, *index
, *array_first
;
555 struct tgsi_full_dst_register reg
;
557 /* Set the register description. The address computation is the same
558 * for sources and destinations. */
560 reg
.Register
.File
= src
->Register
.File
;
561 reg
.Register
.Index
= src
->Register
.Index
;
562 reg
.Register
.Indirect
= src
->Register
.Indirect
;
563 reg
.Register
.Dimension
= src
->Register
.Dimension
;
564 reg
.Indirect
= src
->Indirect
;
565 reg
.Dimension
= src
->Dimension
;
566 reg
.DimIndirect
= src
->DimIndirect
;
570 /* If the register is 2-dimensional (e.g. an array of vertices
571 * in a primitive), calculate the base address of the vertex. */
572 if (reg
.Register
.Dimension
) {
575 if (reg
.Dimension
.Indirect
)
576 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
577 reg
.Dimension
.Index
);
579 index
= lp_build_const_int32(gallivm
, reg
.Dimension
.Index
);
581 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
582 LLVMBuildMul(gallivm
->builder
, index
,
583 vertex_dw_stride
, ""), "");
586 /* Get information about the register. */
587 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
588 name
= info
->input_semantic_name
;
589 index
= info
->input_semantic_index
;
590 array_first
= info
->input_array_first
;
591 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
592 name
= info
->output_semantic_name
;
593 index
= info
->output_semantic_index
;
594 array_first
= info
->output_array_first
;
600 if (reg
.Register
.Indirect
) {
601 /* Add the relative address of the element. */
602 LLVMValueRef ind_index
;
604 if (reg
.Indirect
.ArrayID
)
605 first
= array_first
[reg
.Indirect
.ArrayID
];
607 first
= reg
.Register
.Index
;
609 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
610 reg
.Register
.Index
- first
);
612 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
613 LLVMBuildMul(gallivm
->builder
, ind_index
,
614 lp_build_const_int32(gallivm
, 4), ""), "");
616 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
618 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
619 index
[reg
.Register
.Index
]);
622 /* Add the base address of the element. */
623 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
624 lp_build_const_int32(gallivm
, param
* 4), "");
627 /* The offchip buffer layout for TCS->TES is
629 * - attribute 0 of patch 0 vertex 0
630 * - attribute 0 of patch 0 vertex 1
631 * - attribute 0 of patch 0 vertex 2
633 * - attribute 0 of patch 1 vertex 0
634 * - attribute 0 of patch 1 vertex 1
636 * - attribute 1 of patch 0 vertex 0
637 * - attribute 1 of patch 0 vertex 1
639 * - per patch attribute 0 of patch 0
640 * - per patch attribute 0 of patch 1
643 * Note that every attribute has 4 components.
645 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
646 LLVMValueRef vertex_index
,
647 LLVMValueRef param_index
)
649 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
650 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
651 LLVMValueRef param_stride
, constant16
;
653 vertices_per_patch
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 6);
654 num_patches
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 0, 9);
655 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
658 constant16
= lp_build_const_int32(gallivm
, 16);
660 base_addr
= LLVMBuildMul(gallivm
->builder
, get_rel_patch_id(ctx
),
661 vertices_per_patch
, "");
663 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
666 param_stride
= total_vertices
;
668 base_addr
= get_rel_patch_id(ctx
);
669 param_stride
= num_patches
;
672 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
673 LLVMBuildMul(gallivm
->builder
, param_index
,
674 param_stride
, ""), "");
676 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
679 LLVMValueRef patch_data_offset
=
680 unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 16, 16);
682 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
683 patch_data_offset
, "");
688 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
689 struct si_shader_context
*ctx
,
690 const struct tgsi_full_dst_register
*dst
,
691 const struct tgsi_full_src_register
*src
)
693 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
694 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
695 ubyte
*name
, *index
, *array_first
;
696 struct tgsi_full_src_register reg
;
697 LLVMValueRef vertex_index
= NULL
;
698 LLVMValueRef param_index
= NULL
;
699 unsigned param_index_base
, param_base
;
701 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
703 if (reg
.Register
.Dimension
) {
705 if (reg
.Dimension
.Indirect
)
706 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
707 reg
.Dimension
.Index
);
709 vertex_index
= lp_build_const_int32(gallivm
,
710 reg
.Dimension
.Index
);
713 /* Get information about the register. */
714 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
715 name
= info
->input_semantic_name
;
716 index
= info
->input_semantic_index
;
717 array_first
= info
->input_array_first
;
718 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
719 name
= info
->output_semantic_name
;
720 index
= info
->output_semantic_index
;
721 array_first
= info
->output_array_first
;
727 if (reg
.Register
.Indirect
) {
728 if (reg
.Indirect
.ArrayID
)
729 param_base
= array_first
[reg
.Indirect
.ArrayID
];
731 param_base
= reg
.Register
.Index
;
733 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
734 reg
.Register
.Index
- param_base
);
737 param_base
= reg
.Register
.Index
;
738 param_index
= lp_build_const_int32(gallivm
, 0);
741 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
744 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
745 lp_build_const_int32(gallivm
, param_index_base
),
748 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
751 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
752 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
753 * or v4i32 (num_channels=3,4). */
754 static void build_tbuffer_store(struct si_shader_context
*ctx
,
757 unsigned num_channels
,
759 LLVMValueRef soffset
,
760 unsigned inst_offset
,
769 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
770 LLVMValueRef args
[] = {
773 LLVMConstInt(ctx
->i32
, num_channels
, 0),
776 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
777 LLVMConstInt(ctx
->i32
, dfmt
, 0),
778 LLVMConstInt(ctx
->i32
, nfmt
, 0),
779 LLVMConstInt(ctx
->i32
, offen
, 0),
780 LLVMConstInt(ctx
->i32
, idxen
, 0),
781 LLVMConstInt(ctx
->i32
, glc
, 0),
782 LLVMConstInt(ctx
->i32
, slc
, 0),
783 LLVMConstInt(ctx
->i32
, tfe
, 0)
786 /* The instruction offset field has 12 bits */
787 assert(offen
|| inst_offset
< (1 << 12));
789 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
790 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
791 const char *types
[] = {"i32", "v2i32", "v4i32"};
793 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
795 lp_build_intrinsic(gallivm
->builder
, name
, ctx
->voidt
,
796 args
, ARRAY_SIZE(args
), 0);
799 static void build_tbuffer_store_dwords(struct si_shader_context
*ctx
,
802 unsigned num_channels
,
804 LLVMValueRef soffset
,
805 unsigned inst_offset
)
807 static unsigned dfmt
[] = {
808 V_008F0C_BUF_DATA_FORMAT_32
,
809 V_008F0C_BUF_DATA_FORMAT_32_32
,
810 V_008F0C_BUF_DATA_FORMAT_32_32_32
,
811 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
813 assert(num_channels
>= 1 && num_channels
<= 4);
815 build_tbuffer_store(ctx
, rsrc
, vdata
, num_channels
, vaddr
, soffset
,
816 inst_offset
, dfmt
[num_channels
-1],
817 V_008F0C_BUF_NUM_FORMAT_UINT
, 1, 0, 1, 1, 0);
820 static LLVMValueRef
build_buffer_load(struct si_shader_context
*ctx
,
824 LLVMValueRef voffset
,
825 LLVMValueRef soffset
,
826 unsigned inst_offset
,
830 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
831 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
833 if (HAVE_LLVM
>= 0x309) {
834 LLVMValueRef args
[] = {
835 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v4i32
, ""),
836 vindex
? vindex
: LLVMConstInt(ctx
->i32
, 0, 0),
837 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
838 LLVMConstInt(ctx
->i1
, glc
, 0),
839 LLVMConstInt(ctx
->i1
, slc
, 0)
842 LLVMTypeRef types
[] = {ctx
->f32
, LLVMVectorType(ctx
->f32
, 2),
844 const char *type_names
[] = {"f32", "v2f32", "v4f32"};
848 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], voffset
,
853 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], soffset
,
857 snprintf(name
, sizeof(name
), "llvm.amdgcn.buffer.load.%s",
860 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
861 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
863 LLVMValueRef args
[] = {
864 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v16i8
, ""),
865 voffset
? voffset
: vindex
,
867 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
868 LLVMConstInt(ctx
->i32
, voffset
? 1 : 0, 0), // offen
869 LLVMConstInt(ctx
->i32
, vindex
? 1 : 0, 0), //idxen
870 LLVMConstInt(ctx
->i32
, glc
, 0),
871 LLVMConstInt(ctx
->i32
, slc
, 0),
872 LLVMConstInt(ctx
->i32
, 0, 0), // TFE
875 LLVMTypeRef types
[] = {ctx
->i32
, LLVMVectorType(ctx
->i32
, 2),
877 const char *type_names
[] = {"i32", "v2i32", "v4i32"};
878 const char *arg_type
= "i32";
881 if (voffset
&& vindex
) {
882 LLVMValueRef vaddr
[] = {vindex
, voffset
};
885 args
[1] = lp_build_gather_values(gallivm
, vaddr
, 2);
888 snprintf(name
, sizeof(name
), "llvm.SI.buffer.load.dword.%s.%s",
889 type_names
[func
], arg_type
);
891 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
892 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
896 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
897 enum tgsi_opcode_type type
, unsigned swizzle
,
898 LLVMValueRef buffer
, LLVMValueRef offset
,
901 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
902 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
903 LLVMValueRef value
, value2
;
904 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
905 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
908 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
911 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
914 if (!tgsi_type_is_64bit(type
)) {
915 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
918 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
919 return LLVMBuildExtractElement(gallivm
->builder
, value
,
920 lp_build_const_int32(gallivm
, swizzle
), "");
923 value
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
926 value2
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
927 swizzle
* 4 + 4, 1, 0);
929 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
935 * \param type output value type
936 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
937 * \param dw_addr address in dwords
939 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
940 enum tgsi_opcode_type type
, unsigned swizzle
,
941 LLVMValueRef dw_addr
)
943 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
944 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
948 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
950 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
951 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
953 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
957 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
958 lp_build_const_int32(gallivm
, swizzle
));
960 value
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
961 if (tgsi_type_is_64bit(type
)) {
963 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
964 lp_build_const_int32(gallivm
, 1));
965 value2
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
966 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
969 return LLVMBuildBitCast(gallivm
->builder
, value
,
970 tgsi2llvmtype(bld_base
, type
), "");
976 * \param swizzle offset (typically 0..3)
977 * \param dw_addr address in dwords
978 * \param value value to store
980 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
981 unsigned swizzle
, LLVMValueRef dw_addr
,
984 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
985 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
987 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
988 lp_build_const_int32(gallivm
, swizzle
));
990 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
991 build_indexed_store(ctx
, ctx
->lds
,
995 static LLVMValueRef
fetch_input_tcs(
996 struct lp_build_tgsi_context
*bld_base
,
997 const struct tgsi_full_src_register
*reg
,
998 enum tgsi_opcode_type type
, unsigned swizzle
)
1000 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1001 LLVMValueRef dw_addr
, stride
;
1003 stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
1004 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1005 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1007 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1010 static LLVMValueRef
fetch_output_tcs(
1011 struct lp_build_tgsi_context
*bld_base
,
1012 const struct tgsi_full_src_register
*reg
,
1013 enum tgsi_opcode_type type
, unsigned swizzle
)
1015 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1016 LLVMValueRef dw_addr
, stride
;
1018 if (reg
->Register
.Dimension
) {
1019 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1020 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1021 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1023 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1024 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1027 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1030 static LLVMValueRef
fetch_input_tes(
1031 struct lp_build_tgsi_context
*bld_base
,
1032 const struct tgsi_full_src_register
*reg
,
1033 enum tgsi_opcode_type type
, unsigned swizzle
)
1035 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1036 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1037 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1039 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1040 SI_PARAM_RW_BUFFERS
);
1041 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1042 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1044 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1045 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1047 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
);
1050 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1051 const struct tgsi_full_instruction
*inst
,
1052 const struct tgsi_opcode_info
*info
,
1053 LLVMValueRef dst
[4])
1055 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1056 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1057 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
1058 unsigned chan_index
;
1059 LLVMValueRef dw_addr
, stride
;
1060 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
1061 LLVMValueRef values
[4];
1063 /* Only handle per-patch and per-vertex outputs here.
1064 * Vectors will be lowered to scalars and this function will be called again.
1066 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1067 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1068 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
1072 if (reg
->Register
.Dimension
) {
1073 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1074 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1075 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1077 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1078 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1081 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1082 SI_PARAM_RW_BUFFERS
);
1083 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1084 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1086 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1087 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1090 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1091 LLVMValueRef value
= dst
[chan_index
];
1093 if (inst
->Instruction
.Saturate
)
1094 value
= si_llvm_saturate(bld_base
, value
);
1096 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1098 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1099 values
[chan_index
] = value
;
1101 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF) {
1102 build_tbuffer_store_dwords(ctx
, buffer
, value
, 1,
1108 if (inst
->Dst
[0].Register
.WriteMask
== 0xF) {
1109 LLVMValueRef value
= lp_build_gather_values(bld_base
->base
.gallivm
,
1111 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buf_addr
,
1116 static LLVMValueRef
fetch_input_gs(
1117 struct lp_build_tgsi_context
*bld_base
,
1118 const struct tgsi_full_src_register
*reg
,
1119 enum tgsi_opcode_type type
,
1122 struct lp_build_context
*base
= &bld_base
->base
;
1123 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1124 struct si_shader
*shader
= ctx
->shader
;
1125 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
1126 struct gallivm_state
*gallivm
= base
->gallivm
;
1127 LLVMValueRef vtx_offset
;
1128 LLVMValueRef args
[9];
1129 unsigned vtx_offset_param
;
1130 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1131 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1132 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1136 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1137 return get_primitive_id(bld_base
, swizzle
);
1139 if (!reg
->Register
.Dimension
)
1142 if (swizzle
== ~0) {
1143 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1145 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1146 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1148 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
1152 /* Get the vertex offset parameter */
1153 vtx_offset_param
= reg
->Dimension
.Index
;
1154 if (vtx_offset_param
< 2) {
1155 vtx_offset_param
+= SI_PARAM_VTX0_OFFSET
;
1157 assert(vtx_offset_param
< 6);
1158 vtx_offset_param
+= SI_PARAM_VTX2_OFFSET
- 2;
1160 vtx_offset
= lp_build_mul_imm(uint
,
1161 LLVMGetParam(ctx
->main_fn
,
1165 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1166 args
[0] = ctx
->esgs_ring
;
1167 args
[1] = vtx_offset
;
1168 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
) * 256);
1169 args
[3] = uint
->zero
;
1170 args
[4] = uint
->one
; /* OFFEN */
1171 args
[5] = uint
->zero
; /* IDXEN */
1172 args
[6] = uint
->one
; /* GLC */
1173 args
[7] = uint
->zero
; /* SLC */
1174 args
[8] = uint
->zero
; /* TFE */
1176 value
= lp_build_intrinsic(gallivm
->builder
,
1177 "llvm.SI.buffer.load.dword.i32.i32",
1179 LP_FUNC_ATTR_READONLY
);
1180 if (tgsi_type_is_64bit(type
)) {
1181 LLVMValueRef value2
;
1182 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
+ 1) * 256);
1183 value2
= lp_build_intrinsic(gallivm
->builder
,
1184 "llvm.SI.buffer.load.dword.i32.i32",
1186 LP_FUNC_ATTR_READONLY
);
1187 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1190 return LLVMBuildBitCast(gallivm
->builder
,
1192 tgsi2llvmtype(bld_base
, type
), "");
1195 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1197 switch (interpolate
) {
1198 case TGSI_INTERPOLATE_CONSTANT
:
1201 case TGSI_INTERPOLATE_LINEAR
:
1202 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1203 return SI_PARAM_LINEAR_SAMPLE
;
1204 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1205 return SI_PARAM_LINEAR_CENTROID
;
1207 return SI_PARAM_LINEAR_CENTER
;
1209 case TGSI_INTERPOLATE_COLOR
:
1210 case TGSI_INTERPOLATE_PERSPECTIVE
:
1211 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1212 return SI_PARAM_PERSP_SAMPLE
;
1213 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1214 return SI_PARAM_PERSP_CENTROID
;
1216 return SI_PARAM_PERSP_CENTER
;
1219 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1224 static LLVMValueRef
build_fs_interp(
1225 struct lp_build_tgsi_context
*bld_base
,
1226 LLVMValueRef llvm_chan
,
1227 LLVMValueRef attr_number
,
1228 LLVMValueRef params
,
1232 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1233 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1234 LLVMValueRef args
[5];
1236 if (HAVE_LLVM
< 0x0400) {
1238 ij
[0] = LLVMBuildBitCast(gallivm
->builder
, i
, ctx
->i32
, "");
1239 ij
[1] = LLVMBuildBitCast(gallivm
->builder
, j
, ctx
->i32
, "");
1241 args
[0] = llvm_chan
;
1242 args
[1] = attr_number
;
1244 args
[3] = lp_build_gather_values(gallivm
, ij
, 2);
1245 return lp_build_intrinsic(gallivm
->builder
, "llvm.SI.fs.interp",
1247 LP_FUNC_ATTR_READNONE
);
1251 args
[1] = llvm_chan
;
1252 args
[2] = attr_number
;
1255 p1
= lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p1",
1256 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1260 args
[2] = llvm_chan
;
1261 args
[3] = attr_number
;
1264 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p2",
1265 ctx
->f32
, args
, 5, LP_FUNC_ATTR_READNONE
);
1268 static LLVMValueRef
build_fs_interp_mov(
1269 struct lp_build_tgsi_context
*bld_base
,
1270 LLVMValueRef parameter
,
1271 LLVMValueRef llvm_chan
,
1272 LLVMValueRef attr_number
,
1273 LLVMValueRef params
) {
1275 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1276 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1277 LLVMValueRef args
[4];
1278 if (HAVE_LLVM
< 0x0400) {
1279 args
[0] = llvm_chan
;
1280 args
[1] = attr_number
;
1283 return lp_build_intrinsic(gallivm
->builder
,
1284 "llvm.SI.fs.constant",
1286 LP_FUNC_ATTR_READNONE
);
1289 args
[0] = parameter
;
1290 args
[1] = llvm_chan
;
1291 args
[2] = attr_number
;
1294 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.mov",
1295 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1299 * Interpolate a fragment shader input.
1301 * @param ctx context
1302 * @param input_index index of the input in hardware
1303 * @param semantic_name TGSI_SEMANTIC_*
1304 * @param semantic_index semantic index
1305 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1306 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1307 * @param interp_param interpolation weights (i,j)
1308 * @param prim_mask SI_PARAM_PRIM_MASK
1309 * @param face SI_PARAM_FRONT_FACE
1310 * @param result the return value (4 components)
1312 static void interp_fs_input(struct si_shader_context
*ctx
,
1313 unsigned input_index
,
1314 unsigned semantic_name
,
1315 unsigned semantic_index
,
1316 unsigned num_interp_inputs
,
1317 unsigned colors_read_mask
,
1318 LLVMValueRef interp_param
,
1319 LLVMValueRef prim_mask
,
1321 LLVMValueRef result
[4])
1323 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
1324 struct lp_build_context
*base
= &bld_base
->base
;
1325 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
1326 struct gallivm_state
*gallivm
= base
->gallivm
;
1327 LLVMValueRef attr_number
;
1332 /* fs.constant returns the param from the middle vertex, so it's not
1333 * really useful for flat shading. It's meant to be used for custom
1334 * interpolation (but the intrinsic can't fetch from the other two
1337 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1338 * to do the right thing. The only reason we use fs.constant is that
1339 * fs.interp cannot be used on integers, because they can be equal
1342 * When interp is false we will use fs.constant or for newer llvm,
1343 * amdgcn.interp.mov.
1345 bool interp
= interp_param
!= NULL
;
1347 attr_number
= lp_build_const_int32(gallivm
, input_index
);
1350 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1351 LLVMVectorType(ctx
->f32
, 2), "");
1353 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1355 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1359 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1360 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1361 LLVMValueRef is_face_positive
;
1362 LLVMValueRef back_attr_number
;
1364 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1365 * otherwise it's at offset "num_inputs".
1367 unsigned back_attr_offset
= num_interp_inputs
;
1368 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1369 back_attr_offset
+= 1;
1371 back_attr_number
= lp_build_const_int32(gallivm
, back_attr_offset
);
1373 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1374 face
, uint
->zero
, "");
1376 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1377 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1378 LLVMValueRef front
, back
;
1381 front
= build_fs_interp(bld_base
, llvm_chan
,
1382 attr_number
, prim_mask
,
1384 back
= build_fs_interp(bld_base
, llvm_chan
,
1385 back_attr_number
, prim_mask
,
1388 front
= build_fs_interp_mov(bld_base
,
1389 lp_build_const_int32(gallivm
, 2), /* P0 */
1390 llvm_chan
, attr_number
, prim_mask
);
1391 back
= build_fs_interp_mov(bld_base
,
1392 lp_build_const_int32(gallivm
, 2), /* P0 */
1393 llvm_chan
, back_attr_number
, prim_mask
);
1396 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1402 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1404 result
[0] = build_fs_interp(bld_base
, uint
->zero
,
1405 attr_number
, prim_mask
, i
, j
);
1407 result
[0] = build_fs_interp_mov(bld_base
, uint
->zero
,
1408 lp_build_const_int32(gallivm
, 2), /* P0 */
1409 attr_number
, prim_mask
);
1412 result
[2] = lp_build_const_float(gallivm
, 0.0f
);
1413 result
[3] = lp_build_const_float(gallivm
, 1.0f
);
1415 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1416 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1419 result
[chan
] = build_fs_interp(bld_base
,
1420 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1422 result
[chan
] = build_fs_interp_mov(bld_base
,
1423 lp_build_const_int32(gallivm
, 2), /* P0 */
1424 llvm_chan
, attr_number
, prim_mask
);
1430 static void declare_input_fs(
1431 struct si_shader_context
*radeon_bld
,
1432 unsigned input_index
,
1433 const struct tgsi_full_declaration
*decl
,
1434 LLVMValueRef out
[4])
1436 struct lp_build_context
*base
= &radeon_bld
->soa
.bld_base
.base
;
1437 struct si_shader_context
*ctx
=
1438 si_shader_context(&radeon_bld
->soa
.bld_base
);
1439 struct si_shader
*shader
= ctx
->shader
;
1440 LLVMValueRef main_fn
= radeon_bld
->main_fn
;
1441 LLVMValueRef interp_param
= NULL
;
1442 int interp_param_idx
;
1444 /* Get colors from input VGPRs (set by the prolog). */
1445 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1446 unsigned i
= decl
->Semantic
.Index
;
1447 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1448 unsigned mask
= colors_read
>> (i
* 4);
1449 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1450 (i
? util_bitcount(colors_read
& 0xf) : 0);
1452 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1453 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1454 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1455 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1459 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1460 decl
->Interp
.Location
);
1461 if (interp_param_idx
== -1)
1463 else if (interp_param_idx
) {
1464 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1467 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1468 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1469 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1470 interp_param
= NULL
; /* load the constant color */
1472 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1473 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1474 shader
->selector
->info
.colors_read
, interp_param
,
1475 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1476 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1480 static LLVMValueRef
get_sample_id(struct si_shader_context
*radeon_bld
)
1482 return unpack_param(si_shader_context(&radeon_bld
->soa
.bld_base
),
1483 SI_PARAM_ANCILLARY
, 8, 4);
1487 * Set range metadata on an instruction. This can only be used on load and
1488 * call instructions. If you know an instruction can only produce the values
1489 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1490 * \p lo is the minimum value inclusive.
1491 * \p hi is the maximum value exclusive.
1493 static void set_range_metadata(struct si_shader_context
*ctx
,
1494 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1496 LLVMValueRef range_md
, md_args
[2];
1497 LLVMTypeRef type
= LLVMTypeOf(value
);
1498 LLVMContextRef context
= LLVMGetTypeContext(type
);
1500 md_args
[0] = LLVMConstInt(type
, lo
, false);
1501 md_args
[1] = LLVMConstInt(type
, hi
, false);
1502 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1503 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1506 static LLVMValueRef
get_thread_id(struct si_shader_context
*ctx
)
1508 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1511 if (HAVE_LLVM
< 0x0308) {
1512 tid
= lp_build_intrinsic(gallivm
->builder
, "llvm.SI.tid",
1513 ctx
->i32
, NULL
, 0, LP_FUNC_ATTR_READNONE
);
1515 LLVMValueRef tid_args
[2];
1516 tid_args
[0] = lp_build_const_int32(gallivm
, 0xffffffff);
1517 tid_args
[1] = lp_build_const_int32(gallivm
, 0);
1518 tid_args
[1] = lp_build_intrinsic(gallivm
->builder
,
1519 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1520 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1522 tid
= lp_build_intrinsic(gallivm
->builder
,
1523 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1524 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1526 set_range_metadata(ctx
, tid
, 0, 64);
1531 * Load a dword from a constant buffer.
1533 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1534 LLVMValueRef resource
,
1535 LLVMValueRef offset
)
1537 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1538 LLVMValueRef args
[2] = {resource
, offset
};
1540 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1541 LP_FUNC_ATTR_READNONE
);
1544 static LLVMValueRef
load_sample_position(struct si_shader_context
*radeon_bld
, LLVMValueRef sample_id
)
1546 struct si_shader_context
*ctx
=
1547 si_shader_context(&radeon_bld
->soa
.bld_base
);
1548 struct lp_build_context
*uint_bld
= &radeon_bld
->soa
.bld_base
.uint_bld
;
1549 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1550 LLVMBuilderRef builder
= gallivm
->builder
;
1551 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1552 LLVMValueRef buf_index
= lp_build_const_int32(gallivm
, SI_PS_CONST_SAMPLE_POSITIONS
);
1553 LLVMValueRef resource
= build_indexed_load_const(ctx
, desc
, buf_index
);
1555 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1556 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1557 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, lp_build_const_int32(gallivm
, 4), "");
1559 LLVMValueRef pos
[4] = {
1560 buffer_load_const(ctx
, resource
, offset0
),
1561 buffer_load_const(ctx
, resource
, offset1
),
1562 lp_build_const_float(gallivm
, 0),
1563 lp_build_const_float(gallivm
, 0)
1566 return lp_build_gather_values(gallivm
, pos
, 4);
1569 static void declare_system_value(
1570 struct si_shader_context
*radeon_bld
,
1572 const struct tgsi_full_declaration
*decl
)
1574 struct si_shader_context
*ctx
=
1575 si_shader_context(&radeon_bld
->soa
.bld_base
);
1576 struct lp_build_context
*bld
= &radeon_bld
->soa
.bld_base
.base
;
1577 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1578 LLVMValueRef value
= 0;
1580 switch (decl
->Semantic
.Name
) {
1581 case TGSI_SEMANTIC_INSTANCEID
:
1582 value
= LLVMGetParam(radeon_bld
->main_fn
,
1583 ctx
->param_instance_id
);
1586 case TGSI_SEMANTIC_VERTEXID
:
1587 value
= LLVMBuildAdd(gallivm
->builder
,
1588 LLVMGetParam(radeon_bld
->main_fn
,
1589 ctx
->param_vertex_id
),
1590 LLVMGetParam(radeon_bld
->main_fn
,
1591 SI_PARAM_BASE_VERTEX
), "");
1594 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1595 value
= LLVMGetParam(radeon_bld
->main_fn
,
1596 ctx
->param_vertex_id
);
1599 case TGSI_SEMANTIC_BASEVERTEX
:
1600 value
= LLVMGetParam(radeon_bld
->main_fn
,
1601 SI_PARAM_BASE_VERTEX
);
1604 case TGSI_SEMANTIC_BASEINSTANCE
:
1605 value
= LLVMGetParam(radeon_bld
->main_fn
,
1606 SI_PARAM_START_INSTANCE
);
1609 case TGSI_SEMANTIC_DRAWID
:
1610 value
= LLVMGetParam(radeon_bld
->main_fn
,
1614 case TGSI_SEMANTIC_INVOCATIONID
:
1615 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1616 value
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
1617 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1618 value
= LLVMGetParam(radeon_bld
->main_fn
,
1619 SI_PARAM_GS_INSTANCE_ID
);
1621 assert(!"INVOCATIONID not implemented");
1624 case TGSI_SEMANTIC_POSITION
:
1626 LLVMValueRef pos
[4] = {
1627 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1628 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1629 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1630 lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
, TGSI_OPCODE_RCP
,
1631 LLVMGetParam(radeon_bld
->main_fn
,
1632 SI_PARAM_POS_W_FLOAT
)),
1634 value
= lp_build_gather_values(gallivm
, pos
, 4);
1638 case TGSI_SEMANTIC_FACE
:
1639 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_FRONT_FACE
);
1642 case TGSI_SEMANTIC_SAMPLEID
:
1643 value
= get_sample_id(radeon_bld
);
1646 case TGSI_SEMANTIC_SAMPLEPOS
: {
1647 LLVMValueRef pos
[4] = {
1648 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1649 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1650 lp_build_const_float(gallivm
, 0),
1651 lp_build_const_float(gallivm
, 0)
1653 pos
[0] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1654 TGSI_OPCODE_FRC
, pos
[0]);
1655 pos
[1] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1656 TGSI_OPCODE_FRC
, pos
[1]);
1657 value
= lp_build_gather_values(gallivm
, pos
, 4);
1661 case TGSI_SEMANTIC_SAMPLEMASK
:
1662 /* This can only occur with the OpenGL Core profile, which
1663 * doesn't support smoothing.
1665 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1668 case TGSI_SEMANTIC_TESSCOORD
:
1670 LLVMValueRef coord
[4] = {
1671 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_u
),
1672 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_v
),
1677 /* For triangles, the vector should be (u, v, 1-u-v). */
1678 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1679 PIPE_PRIM_TRIANGLES
)
1680 coord
[2] = lp_build_sub(bld
, bld
->one
,
1681 lp_build_add(bld
, coord
[0], coord
[1]));
1683 value
= lp_build_gather_values(gallivm
, coord
, 4);
1687 case TGSI_SEMANTIC_VERTICESIN
:
1688 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1689 value
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 26, 6);
1690 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1691 value
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 7);
1693 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1696 case TGSI_SEMANTIC_TESSINNER
:
1697 case TGSI_SEMANTIC_TESSOUTER
:
1699 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1700 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1702 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1703 SI_PARAM_RW_BUFFERS
);
1704 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1705 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1707 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1708 addr
= get_tcs_tes_buffer_address(ctx
, NULL
,
1709 lp_build_const_int32(gallivm
, param
));
1711 value
= buffer_load(&radeon_bld
->soa
.bld_base
, TGSI_TYPE_FLOAT
,
1712 ~0, buffer
, base
, addr
);
1717 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1718 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1720 LLVMValueRef buf
, slot
, val
[4];
1723 slot
= lp_build_const_int32(gallivm
, SI_HS_CONST_DEFAULT_TESS_LEVELS
);
1724 buf
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1725 buf
= build_indexed_load_const(ctx
, buf
, slot
);
1726 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1728 for (i
= 0; i
< 4; i
++)
1729 val
[i
] = buffer_load_const(ctx
, buf
,
1730 lp_build_const_int32(gallivm
, (offset
+ i
) * 4));
1731 value
= lp_build_gather_values(gallivm
, val
, 4);
1735 case TGSI_SEMANTIC_PRIMID
:
1736 value
= get_primitive_id(&radeon_bld
->soa
.bld_base
, 0);
1739 case TGSI_SEMANTIC_GRID_SIZE
:
1740 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_GRID_SIZE
);
1743 case TGSI_SEMANTIC_BLOCK_SIZE
:
1745 LLVMValueRef values
[3];
1747 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1749 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1750 unsigned sizes
[3] = {
1751 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1752 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1753 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1756 for (i
= 0; i
< 3; ++i
)
1757 values
[i
] = lp_build_const_int32(gallivm
, sizes
[i
]);
1759 value
= lp_build_gather_values(gallivm
, values
, 3);
1761 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1766 case TGSI_SEMANTIC_BLOCK_ID
:
1767 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_ID
);
1770 case TGSI_SEMANTIC_THREAD_ID
:
1771 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_THREAD_ID
);
1774 #if HAVE_LLVM >= 0x0309
1775 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1776 value
= lp_build_intrinsic(gallivm
->builder
,
1777 "llvm.amdgcn.ps.live",
1779 LP_FUNC_ATTR_READNONE
);
1780 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1781 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1786 assert(!"unknown system value");
1790 radeon_bld
->system_values
[index
] = value
;
1793 static void declare_compute_memory(struct si_shader_context
*radeon_bld
,
1794 const struct tgsi_full_declaration
*decl
)
1796 struct si_shader_context
*ctx
=
1797 si_shader_context(&radeon_bld
->soa
.bld_base
);
1798 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1799 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1801 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1804 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1805 assert(decl
->Range
.First
== decl
->Range
.Last
);
1806 assert(!ctx
->shared_memory
);
1808 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1809 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1812 LLVMSetAlignment(var
, 4);
1814 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1817 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1819 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1820 SI_PARAM_CONST_BUFFERS
);
1822 return build_indexed_load_const(ctx
, list_ptr
,
1823 LLVMConstInt(ctx
->i32
, i
, 0));
1826 static LLVMValueRef
fetch_constant(
1827 struct lp_build_tgsi_context
*bld_base
,
1828 const struct tgsi_full_src_register
*reg
,
1829 enum tgsi_opcode_type type
,
1832 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1833 struct lp_build_context
*base
= &bld_base
->base
;
1834 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1837 LLVMValueRef addr
, bufp
;
1838 LLVMValueRef result
;
1840 if (swizzle
== LP_CHAN_ALL
) {
1842 LLVMValueRef values
[4];
1843 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1844 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1846 return lp_build_gather_values(bld_base
->base
.gallivm
, values
, 4);
1849 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1850 idx
= reg
->Register
.Index
* 4 + swizzle
;
1852 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1853 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_CONST_BUFFERS
);
1855 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1856 reg
->Dimension
.Index
,
1857 SI_NUM_CONST_BUFFERS
);
1858 bufp
= build_indexed_load_const(ctx
, ptr
, index
);
1860 bufp
= load_const_buffer_desc(ctx
, buf
);
1862 if (reg
->Register
.Indirect
) {
1863 addr
= ctx
->soa
.addr
[ireg
->Index
][ireg
->Swizzle
];
1864 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1865 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1866 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1867 lp_build_const_int32(base
->gallivm
, idx
* 4));
1869 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1872 result
= buffer_load_const(ctx
, bufp
, addr
);
1874 if (!tgsi_type_is_64bit(type
))
1875 result
= bitcast(bld_base
, type
, result
);
1877 LLVMValueRef addr2
, result2
;
1879 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1880 LLVMConstInt(ctx
->i32
, 4, 0));
1881 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1883 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1889 /* Upper 16 bits must be zero. */
1890 static LLVMValueRef
si_llvm_pack_two_int16(struct gallivm_state
*gallivm
,
1891 LLVMValueRef val
[2])
1893 return LLVMBuildOr(gallivm
->builder
, val
[0],
1894 LLVMBuildShl(gallivm
->builder
, val
[1],
1895 lp_build_const_int32(gallivm
, 16),
1899 /* Upper 16 bits are ignored and will be dropped. */
1900 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct gallivm_state
*gallivm
,
1901 LLVMValueRef val
[2])
1903 LLVMValueRef v
[2] = {
1904 LLVMBuildAnd(gallivm
->builder
, val
[0],
1905 lp_build_const_int32(gallivm
, 0xffff), ""),
1908 return si_llvm_pack_two_int16(gallivm
, v
);
1911 /* Initialize arguments for the shader export intrinsic */
1912 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1913 LLVMValueRef
*values
,
1917 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1918 struct lp_build_context
*uint
=
1919 &ctx
->soa
.bld_base
.uint_bld
;
1920 struct lp_build_context
*base
= &bld_base
->base
;
1921 struct gallivm_state
*gallivm
= base
->gallivm
;
1922 LLVMBuilderRef builder
= base
->gallivm
->builder
;
1923 LLVMValueRef val
[4];
1924 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1928 /* Default is 0xf. Adjusted below depending on the format. */
1929 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
1931 /* Specify whether the EXEC mask represents the valid mask */
1932 args
[1] = uint
->zero
;
1934 /* Specify whether this is the last export */
1935 args
[2] = uint
->zero
;
1937 /* Specify the target we are exporting */
1938 args
[3] = lp_build_const_int32(base
->gallivm
, target
);
1940 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1941 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1942 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1943 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1945 assert(cbuf
>= 0 && cbuf
< 8);
1946 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1947 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1950 args
[4] = uint
->zero
; /* COMPR flag */
1951 args
[5] = base
->undef
;
1952 args
[6] = base
->undef
;
1953 args
[7] = base
->undef
;
1954 args
[8] = base
->undef
;
1956 switch (spi_shader_col_format
) {
1957 case V_028714_SPI_SHADER_ZERO
:
1958 args
[0] = uint
->zero
; /* writemask */
1959 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
1962 case V_028714_SPI_SHADER_32_R
:
1963 args
[0] = uint
->one
; /* writemask */
1964 args
[5] = values
[0];
1967 case V_028714_SPI_SHADER_32_GR
:
1968 args
[0] = lp_build_const_int32(base
->gallivm
, 0x3); /* writemask */
1969 args
[5] = values
[0];
1970 args
[6] = values
[1];
1973 case V_028714_SPI_SHADER_32_AR
:
1974 args
[0] = lp_build_const_int32(base
->gallivm
, 0x9); /* writemask */
1975 args
[5] = values
[0];
1976 args
[8] = values
[3];
1979 case V_028714_SPI_SHADER_FP16_ABGR
:
1980 args
[4] = uint
->one
; /* COMPR flag */
1982 for (chan
= 0; chan
< 2; chan
++) {
1983 LLVMValueRef pack_args
[2] = {
1985 values
[2 * chan
+ 1]
1987 LLVMValueRef packed
;
1989 packed
= lp_build_intrinsic(base
->gallivm
->builder
,
1991 ctx
->i32
, pack_args
, 2,
1992 LP_FUNC_ATTR_READNONE
);
1994 LLVMBuildBitCast(base
->gallivm
->builder
,
1995 packed
, ctx
->f32
, "");
1999 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2000 for (chan
= 0; chan
< 4; chan
++) {
2001 val
[chan
] = si_llvm_saturate(bld_base
, values
[chan
]);
2002 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2003 lp_build_const_float(gallivm
, 65535), "");
2004 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2005 lp_build_const_float(gallivm
, 0.5), "");
2006 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2010 args
[4] = uint
->one
; /* COMPR flag */
2011 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2012 si_llvm_pack_two_int16(gallivm
, val
));
2013 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2014 si_llvm_pack_two_int16(gallivm
, val
+2));
2017 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2018 for (chan
= 0; chan
< 4; chan
++) {
2019 /* Clamp between [-1, 1]. */
2020 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
2022 lp_build_const_float(gallivm
, 1));
2023 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
2025 lp_build_const_float(gallivm
, -1));
2026 /* Convert to a signed integer in [-32767, 32767]. */
2027 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2028 lp_build_const_float(gallivm
, 32767), "");
2029 /* If positive, add 0.5, else add -0.5. */
2030 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2031 LLVMBuildSelect(builder
,
2032 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2033 val
[chan
], base
->zero
, ""),
2034 lp_build_const_float(gallivm
, 0.5),
2035 lp_build_const_float(gallivm
, -0.5), ""), "");
2036 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2039 args
[4] = uint
->one
; /* COMPR flag */
2040 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2041 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2042 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2043 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2046 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2047 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2050 for (chan
= 0; chan
< 4; chan
++) {
2051 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2052 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
2056 args
[4] = uint
->one
; /* COMPR flag */
2057 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2058 si_llvm_pack_two_int16(gallivm
, val
));
2059 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2060 si_llvm_pack_two_int16(gallivm
, val
+2));
2064 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2065 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2067 LLVMValueRef min
= lp_build_const_int32(gallivm
, is_int8
?
2070 for (chan
= 0; chan
< 4; chan
++) {
2071 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2072 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2075 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2080 args
[4] = uint
->one
; /* COMPR flag */
2081 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2082 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2083 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2084 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2088 case V_028714_SPI_SHADER_32_ABGR
:
2089 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
2094 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2097 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2098 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2100 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2101 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2102 SI_PARAM_ALPHA_REF
);
2104 LLVMValueRef alpha_pass
=
2105 lp_build_cmp(&bld_base
->base
,
2106 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2109 lp_build_select(&bld_base
->base
,
2111 lp_build_const_float(gallivm
, 1.0f
),
2112 lp_build_const_float(gallivm
, -1.0f
));
2114 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
2115 ctx
->voidt
, &arg
, 1, 0);
2117 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kilp",
2118 ctx
->voidt
, NULL
, 0, 0);
2122 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2124 unsigned samplemask_param
)
2126 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2127 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2128 LLVMValueRef coverage
;
2130 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2131 coverage
= LLVMGetParam(ctx
->main_fn
,
2133 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
2135 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
2137 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2139 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2142 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2143 lp_build_const_float(gallivm
,
2144 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2146 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2149 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2150 LLVMValueRef (*pos
)[9], LLVMValueRef
*out_elts
)
2152 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2153 struct lp_build_context
*base
= &bld_base
->base
;
2154 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
2157 unsigned const_chan
;
2158 LLVMValueRef base_elt
;
2159 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2160 LLVMValueRef constbuf_index
= lp_build_const_int32(base
->gallivm
,
2161 SI_VS_CONST_CLIP_PLANES
);
2162 LLVMValueRef const_resource
= build_indexed_load_const(ctx
, ptr
, constbuf_index
);
2164 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2165 LLVMValueRef
*args
= pos
[2 + reg_index
];
2170 args
[8] = lp_build_const_float(base
->gallivm
, 0.0f
);
2172 /* Compute dot products of position and user clip plane vectors */
2173 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2174 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2175 args
[1] = lp_build_const_int32(base
->gallivm
,
2176 ((reg_index
* 4 + chan
) * 4 +
2178 base_elt
= buffer_load_const(ctx
, const_resource
,
2181 lp_build_add(base
, args
[5 + chan
],
2182 lp_build_mul(base
, base_elt
,
2183 out_elts
[const_chan
]));
2187 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf);
2188 args
[1] = uint
->zero
;
2189 args
[2] = uint
->zero
;
2190 args
[3] = lp_build_const_int32(base
->gallivm
,
2191 V_008DFC_SQ_EXP_POS
+ 2 + reg_index
);
2192 args
[4] = uint
->zero
;
2196 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2200 if (so
->num_outputs
)
2201 fprintf(stderr
, "STREAMOUT\n");
2203 for (i
= 0; i
< so
->num_outputs
; i
++) {
2204 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2205 so
->output
[i
].start_component
;
2206 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2207 i
, so
->output
[i
].output_buffer
,
2208 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2209 so
->output
[i
].register_index
,
2210 mask
& 1 ? "x" : "",
2211 mask
& 2 ? "y" : "",
2212 mask
& 4 ? "z" : "",
2213 mask
& 8 ? "w" : "");
2217 static void emit_streamout_output(struct si_shader_context
*ctx
,
2218 LLVMValueRef
const *so_buffers
,
2219 LLVMValueRef
const *so_write_offsets
,
2220 struct pipe_stream_output
*stream_out
,
2221 struct si_shader_output_values
*shader_out
)
2223 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2224 LLVMBuilderRef builder
= gallivm
->builder
;
2225 unsigned buf_idx
= stream_out
->output_buffer
;
2226 unsigned start
= stream_out
->start_component
;
2227 unsigned num_comps
= stream_out
->num_components
;
2228 LLVMValueRef out
[4];
2230 assert(num_comps
&& num_comps
<= 4);
2231 if (!num_comps
|| num_comps
> 4)
2234 /* Load the output as int. */
2235 for (int j
= 0; j
< num_comps
; j
++) {
2236 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2238 out
[j
] = LLVMBuildBitCast(builder
,
2239 shader_out
->values
[start
+ j
],
2243 /* Pack the output. */
2244 LLVMValueRef vdata
= NULL
;
2246 switch (num_comps
) {
2247 case 1: /* as i32 */
2250 case 2: /* as v2i32 */
2251 case 3: /* as v4i32 (aligned to 4) */
2252 case 4: /* as v4i32 */
2253 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2254 for (int j
= 0; j
< num_comps
; j
++) {
2255 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2256 LLVMConstInt(ctx
->i32
, j
, 0), "");
2261 build_tbuffer_store_dwords(ctx
, so_buffers
[buf_idx
],
2263 so_write_offsets
[buf_idx
],
2264 LLVMConstInt(ctx
->i32
, 0, 0),
2265 stream_out
->dst_offset
* 4);
2269 * Write streamout data to buffers for vertex stream @p stream (different
2270 * vertex streams can occur for GS copy shaders).
2272 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2273 struct si_shader_output_values
*outputs
,
2274 unsigned noutput
, unsigned stream
)
2276 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2277 struct pipe_stream_output_info
*so
= &sel
->so
;
2278 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2279 LLVMBuilderRef builder
= gallivm
->builder
;
2281 struct lp_build_if_state if_ctx
;
2283 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2284 LLVMValueRef so_vtx_count
=
2285 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2287 LLVMValueRef tid
= get_thread_id(ctx
);
2289 /* can_emit = tid < so_vtx_count; */
2290 LLVMValueRef can_emit
=
2291 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2293 /* Emit the streamout code conditionally. This actually avoids
2294 * out-of-bounds buffer access. The hw tells us via the SGPR
2295 * (so_vtx_count) which threads are allowed to emit streamout data. */
2296 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2298 /* The buffer offset is computed as follows:
2299 * ByteOffset = streamout_offset[buffer_id]*4 +
2300 * (streamout_write_index + thread_id)*stride[buffer_id] +
2304 LLVMValueRef so_write_index
=
2305 LLVMGetParam(ctx
->main_fn
,
2306 ctx
->param_streamout_write_index
);
2308 /* Compute (streamout_write_index + thread_id). */
2309 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2311 /* Load the descriptor and compute the write offset for each
2312 * enabled buffer. */
2313 LLVMValueRef so_write_offset
[4] = {};
2314 LLVMValueRef so_buffers
[4];
2315 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2316 SI_PARAM_RW_BUFFERS
);
2318 for (i
= 0; i
< 4; i
++) {
2322 LLVMValueRef offset
= lp_build_const_int32(gallivm
,
2323 SI_VS_STREAMOUT_BUF0
+ i
);
2325 so_buffers
[i
] = build_indexed_load_const(ctx
, buf_ptr
, offset
);
2327 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2328 ctx
->param_streamout_offset
[i
]);
2329 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2331 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2332 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2333 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2336 /* Write streamout data. */
2337 for (i
= 0; i
< so
->num_outputs
; i
++) {
2338 unsigned reg
= so
->output
[i
].register_index
;
2343 if (stream
!= so
->output
[i
].stream
)
2346 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2347 &so
->output
[i
], &outputs
[reg
]);
2350 lp_build_endif(&if_ctx
);
2354 /* Generate export instructions for hardware VS shader stage */
2355 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2356 struct si_shader_output_values
*outputs
,
2359 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2360 struct si_shader
*shader
= ctx
->shader
;
2361 struct lp_build_context
*base
= &bld_base
->base
;
2362 struct lp_build_context
*uint
=
2363 &ctx
->soa
.bld_base
.uint_bld
;
2364 LLVMValueRef args
[9];
2365 LLVMValueRef pos_args
[4][9] = { { 0 } };
2366 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2367 unsigned semantic_name
, semantic_index
;
2369 unsigned param_count
= 0;
2373 for (i
= 0; i
< noutput
; i
++) {
2374 semantic_name
= outputs
[i
].semantic_name
;
2375 semantic_index
= outputs
[i
].semantic_index
;
2376 bool export_param
= true;
2378 switch (semantic_name
) {
2379 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2380 case TGSI_SEMANTIC_PSIZE
:
2381 case TGSI_SEMANTIC_CLIPVERTEX
:
2382 case TGSI_SEMANTIC_EDGEFLAG
:
2384 case TGSI_SEMANTIC_GENERIC
:
2385 case TGSI_SEMANTIC_CLIPDIST
:
2386 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2387 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2388 export_param
= false;
2391 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2392 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2393 export_param
= false;
2397 if (outputs
[i
].vertex_stream
[0] != 0 &&
2398 outputs
[i
].vertex_stream
[1] != 0 &&
2399 outputs
[i
].vertex_stream
[2] != 0 &&
2400 outputs
[i
].vertex_stream
[3] != 0)
2401 export_param
= false;
2404 /* Select the correct target */
2405 switch(semantic_name
) {
2406 case TGSI_SEMANTIC_PSIZE
:
2407 psize_value
= outputs
[i
].values
[0];
2409 case TGSI_SEMANTIC_EDGEFLAG
:
2410 edgeflag_value
= outputs
[i
].values
[0];
2412 case TGSI_SEMANTIC_LAYER
:
2413 layer_value
= outputs
[i
].values
[0];
2414 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2415 goto handle_semantic
;
2416 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2417 viewport_index_value
= outputs
[i
].values
[0];
2418 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2419 goto handle_semantic
;
2420 case TGSI_SEMANTIC_POSITION
:
2421 target
= V_008DFC_SQ_EXP_POS
;
2423 case TGSI_SEMANTIC_COLOR
:
2424 case TGSI_SEMANTIC_BCOLOR
:
2427 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2428 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2429 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2432 case TGSI_SEMANTIC_CLIPDIST
:
2433 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2434 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2435 goto handle_semantic
;
2437 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2439 case TGSI_SEMANTIC_CLIPVERTEX
:
2440 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2442 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2444 case TGSI_SEMANTIC_PRIMID
:
2445 case TGSI_SEMANTIC_FOG
:
2446 case TGSI_SEMANTIC_TEXCOORD
:
2447 case TGSI_SEMANTIC_GENERIC
:
2450 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2451 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2452 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2458 "Warning: SI unhandled vs output type:%d\n",
2462 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, args
);
2464 if (target
>= V_008DFC_SQ_EXP_POS
&&
2465 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2466 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2467 args
, sizeof(args
));
2469 lp_build_intrinsic(base
->gallivm
->builder
,
2470 "llvm.SI.export", ctx
->voidt
,
2474 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2475 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2476 goto handle_semantic
;
2480 shader
->info
.nr_param_exports
= param_count
;
2482 /* We need to add the position output manually if it's missing. */
2483 if (!pos_args
[0][0]) {
2484 pos_args
[0][0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
2485 pos_args
[0][1] = uint
->zero
; /* EXEC mask */
2486 pos_args
[0][2] = uint
->zero
; /* last export? */
2487 pos_args
[0][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
);
2488 pos_args
[0][4] = uint
->zero
; /* COMPR flag */
2489 pos_args
[0][5] = base
->zero
; /* X */
2490 pos_args
[0][6] = base
->zero
; /* Y */
2491 pos_args
[0][7] = base
->zero
; /* Z */
2492 pos_args
[0][8] = base
->one
; /* W */
2495 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2496 if (shader
->selector
->info
.writes_psize
||
2497 shader
->selector
->info
.writes_edgeflag
||
2498 shader
->selector
->info
.writes_viewport_index
||
2499 shader
->selector
->info
.writes_layer
) {
2500 pos_args
[1][0] = lp_build_const_int32(base
->gallivm
, /* writemask */
2501 shader
->selector
->info
.writes_psize
|
2502 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2503 (shader
->selector
->info
.writes_layer
<< 2) |
2504 (shader
->selector
->info
.writes_viewport_index
<< 3));
2505 pos_args
[1][1] = uint
->zero
; /* EXEC mask */
2506 pos_args
[1][2] = uint
->zero
; /* last export? */
2507 pos_args
[1][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ 1);
2508 pos_args
[1][4] = uint
->zero
; /* COMPR flag */
2509 pos_args
[1][5] = base
->zero
; /* X */
2510 pos_args
[1][6] = base
->zero
; /* Y */
2511 pos_args
[1][7] = base
->zero
; /* Z */
2512 pos_args
[1][8] = base
->zero
; /* W */
2514 if (shader
->selector
->info
.writes_psize
)
2515 pos_args
[1][5] = psize_value
;
2517 if (shader
->selector
->info
.writes_edgeflag
) {
2518 /* The output is a float, but the hw expects an integer
2519 * with the first bit containing the edge flag. */
2520 edgeflag_value
= LLVMBuildFPToUI(base
->gallivm
->builder
,
2523 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2525 bld_base
->int_bld
.one
);
2527 /* The LLVM intrinsic expects a float. */
2528 pos_args
[1][6] = LLVMBuildBitCast(base
->gallivm
->builder
,
2533 if (shader
->selector
->info
.writes_layer
)
2534 pos_args
[1][7] = layer_value
;
2536 if (shader
->selector
->info
.writes_viewport_index
)
2537 pos_args
[1][8] = viewport_index_value
;
2540 for (i
= 0; i
< 4; i
++)
2542 shader
->info
.nr_pos_exports
++;
2545 for (i
= 0; i
< 4; i
++) {
2546 if (!pos_args
[i
][0])
2549 /* Specify the target we are exporting */
2550 pos_args
[i
][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ pos_idx
++);
2552 if (pos_idx
== shader
->info
.nr_pos_exports
)
2553 /* Specify that this is the last export */
2554 pos_args
[i
][2] = uint
->one
;
2556 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
2557 ctx
->voidt
, pos_args
[i
], 9, 0);
2562 * Forward all outputs from the vertex shader to the TES. This is only used
2563 * for the fixed function TCS.
2565 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2567 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2568 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2569 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2570 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2573 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2575 rw_buffers
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2576 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2577 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
2579 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2581 lds_vertex_stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
2582 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2583 lds_vertex_stride
, "");
2584 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2585 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2587 inputs
= ctx
->shader
->key
.mono
.tcs
.inputs_to_copy
;
2589 unsigned i
= u_bit_scan64(&inputs
);
2591 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2592 lp_build_const_int32(gallivm
, 4 * i
),
2595 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2597 lp_build_const_int32(gallivm
, i
));
2599 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2602 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buffer_addr
,
2607 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2608 LLVMValueRef rel_patch_id
,
2609 LLVMValueRef invocation_id
,
2610 LLVMValueRef tcs_out_current_patch_data_offset
)
2612 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2613 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2614 struct si_shader
*shader
= ctx
->shader
;
2615 unsigned tess_inner_index
, tess_outer_index
;
2616 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2617 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
;
2618 unsigned stride
, outer_comps
, inner_comps
, i
;
2619 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2621 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2623 /* Do this only for invocation 0, because the tess levels are per-patch,
2626 * This can't jump, because invocation 0 executes this. It should
2627 * at least mask out the loads and stores for other invocations.
2629 lp_build_if(&if_ctx
, gallivm
,
2630 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2631 invocation_id
, bld_base
->uint_bld
.zero
, ""));
2633 /* Determine the layout of one tess factor element in the buffer. */
2634 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2635 case PIPE_PRIM_LINES
:
2636 stride
= 2; /* 2 dwords, 1 vec2 store */
2640 case PIPE_PRIM_TRIANGLES
:
2641 stride
= 4; /* 4 dwords, 1 vec4 store */
2645 case PIPE_PRIM_QUADS
:
2646 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2655 /* Load tess_inner and tess_outer from LDS.
2656 * Any invocation can write them, so we can't get them from a temporary.
2658 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2659 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2661 lds_base
= tcs_out_current_patch_data_offset
;
2662 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2663 lp_build_const_int32(gallivm
,
2664 tess_inner_index
* 4), "");
2665 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2666 lp_build_const_int32(gallivm
,
2667 tess_outer_index
* 4), "");
2669 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2670 /* For isolines, the hardware expects tess factors in the
2671 * reverse order from what GLSL / TGSI specify.
2673 out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2674 out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2676 for (i
= 0; i
< outer_comps
; i
++)
2677 out
[i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2678 for (i
= 0; i
< inner_comps
; i
++)
2679 out
[outer_comps
+i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2682 /* Convert the outputs to vectors for stores. */
2683 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2687 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2689 /* Get the buffer. */
2690 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2691 SI_PARAM_RW_BUFFERS
);
2692 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2693 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_FACTOR
));
2695 /* Get the offset. */
2696 tf_base
= LLVMGetParam(ctx
->main_fn
,
2697 SI_PARAM_TESS_FACTOR_OFFSET
);
2698 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2699 lp_build_const_int32(gallivm
, 4 * stride
), "");
2701 lp_build_if(&inner_if_ctx
, gallivm
,
2702 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2703 rel_patch_id
, bld_base
->uint_bld
.zero
, ""));
2705 /* Store the dynamic HS control word. */
2706 build_tbuffer_store_dwords(ctx
, buffer
,
2707 lp_build_const_int32(gallivm
, 0x80000000),
2708 1, lp_build_const_int32(gallivm
, 0), tf_base
, 0);
2710 lp_build_endif(&inner_if_ctx
);
2712 /* Store the tessellation factors. */
2713 build_tbuffer_store_dwords(ctx
, buffer
, vec0
,
2714 MIN2(stride
, 4), byteoffset
, tf_base
, 4);
2716 build_tbuffer_store_dwords(ctx
, buffer
, vec1
,
2717 stride
- 4, byteoffset
, tf_base
, 20);
2718 lp_build_endif(&if_ctx
);
2721 /* This only writes the tessellation factor levels. */
2722 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2724 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2725 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2727 si_copy_tcs_inputs(bld_base
);
2729 rel_patch_id
= get_rel_patch_id(ctx
);
2730 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2731 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2733 /* Return epilog parameters from this function. */
2734 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
2735 LLVMValueRef ret
= ctx
->return_value
;
2736 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2739 /* RW_BUFFERS pointer */
2740 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2741 SI_PARAM_RW_BUFFERS
);
2742 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2743 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2744 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2745 bld_base
->uint_bld
.zero
, "");
2746 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2747 bld_base
->uint_bld
.one
, "");
2748 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2749 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2751 /* Tess factor buffer soffset is after user SGPRs. */
2752 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2753 SI_PARAM_TESS_FACTOR_OFFSET
);
2754 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2755 SI_TCS_NUM_USER_SGPR
+ 1, "");
2758 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2759 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2760 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2762 vgpr
= SI_TCS_NUM_USER_SGPR
+ 2;
2763 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2764 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2765 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2766 ctx
->return_value
= ret
;
2769 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2771 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2772 struct si_shader
*shader
= ctx
->shader
;
2773 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2774 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2776 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2777 ctx
->param_rel_auto_id
);
2778 LLVMValueRef vertex_dw_stride
=
2779 unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 13, 8);
2780 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2781 vertex_dw_stride
, "");
2783 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2784 * its inputs from it. */
2785 for (i
= 0; i
< info
->num_outputs
; i
++) {
2786 LLVMValueRef
*out_ptr
= ctx
->soa
.outputs
[i
];
2787 unsigned name
= info
->output_semantic_name
[i
];
2788 unsigned index
= info
->output_semantic_index
[i
];
2789 int param
= si_shader_io_get_unique_index(name
, index
);
2790 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2791 lp_build_const_int32(gallivm
, param
* 4), "");
2793 for (chan
= 0; chan
< 4; chan
++) {
2794 lds_store(bld_base
, chan
, dw_addr
,
2795 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2800 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2802 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2803 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2804 struct si_shader
*es
= ctx
->shader
;
2805 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2806 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2807 ctx
->param_es2gs_offset
);
2811 for (i
= 0; i
< info
->num_outputs
; i
++) {
2812 LLVMValueRef
*out_ptr
=
2813 ctx
->soa
.outputs
[i
];
2816 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2817 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2820 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2821 info
->output_semantic_index
[i
]);
2823 for (chan
= 0; chan
< 4; chan
++) {
2824 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2825 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2827 build_tbuffer_store(ctx
,
2830 LLVMGetUndef(ctx
->i32
), soffset
,
2831 (4 * param_index
+ chan
) * 4,
2832 V_008F0C_BUF_DATA_FORMAT_32
,
2833 V_008F0C_BUF_NUM_FORMAT_UINT
,
2839 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2841 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2842 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2843 LLVMValueRef args
[2];
2845 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
);
2846 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
2847 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
2848 ctx
->voidt
, args
, 2, 0);
2851 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2853 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2854 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2855 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2856 struct si_shader_output_values
*outputs
= NULL
;
2859 assert(!ctx
->shader
->is_gs_copy_shader
);
2861 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2863 /* Vertex color clamping.
2865 * This uses a state constant loaded in a user data SGPR and
2866 * an IF statement is added that clamps all colors if the constant
2869 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2870 struct lp_build_if_state if_ctx
;
2871 LLVMValueRef cond
= NULL
;
2872 LLVMValueRef addr
, val
;
2874 for (i
= 0; i
< info
->num_outputs
; i
++) {
2875 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2876 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2879 /* We've found a color. */
2881 /* The state is in the first bit of the user SGPR. */
2882 cond
= LLVMGetParam(ctx
->main_fn
,
2883 SI_PARAM_VS_STATE_BITS
);
2884 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2886 lp_build_if(&if_ctx
, gallivm
, cond
);
2889 for (j
= 0; j
< 4; j
++) {
2890 addr
= ctx
->soa
.outputs
[i
][j
];
2891 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2892 val
= si_llvm_saturate(bld_base
, val
);
2893 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2898 lp_build_endif(&if_ctx
);
2901 for (i
= 0; i
< info
->num_outputs
; i
++) {
2902 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
2903 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
2905 for (j
= 0; j
< 4; j
++) {
2906 outputs
[i
].values
[j
] =
2907 LLVMBuildLoad(gallivm
->builder
,
2908 ctx
->soa
.outputs
[i
][j
],
2910 outputs
[i
].vertex_stream
[j
] =
2911 (info
->output_streams
[i
] >> (2 * j
)) & 3;
2916 /* Return the primitive ID from the LLVM function. */
2918 LLVMBuildInsertValue(gallivm
->builder
,
2920 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2921 get_primitive_id(bld_base
, 0)),
2922 VS_EPILOG_PRIMID_LOC
, "");
2924 if (ctx
->shader
->selector
->so
.num_outputs
)
2925 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
2926 si_llvm_export_vs(bld_base
, outputs
, i
);
2930 struct si_ps_exports
{
2932 LLVMValueRef args
[10][9];
2935 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2936 bool writes_samplemask
)
2939 /* Z needs 32 bits. */
2940 if (writes_samplemask
)
2941 return V_028710_SPI_SHADER_32_ABGR
;
2942 else if (writes_stencil
)
2943 return V_028710_SPI_SHADER_32_GR
;
2945 return V_028710_SPI_SHADER_32_R
;
2946 } else if (writes_stencil
|| writes_samplemask
) {
2947 /* Both stencil and sample mask need only 16 bits. */
2948 return V_028710_SPI_SHADER_UINT16_ABGR
;
2950 return V_028710_SPI_SHADER_ZERO
;
2954 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
2955 LLVMValueRef depth
, LLVMValueRef stencil
,
2956 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
2958 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2959 struct lp_build_context
*base
= &bld_base
->base
;
2960 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
2961 LLVMValueRef args
[9];
2963 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
2965 samplemask
!= NULL
);
2967 assert(depth
|| stencil
|| samplemask
);
2969 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
2970 args
[2] = uint
->one
; /* DONE bit */
2972 /* Specify the target we are exporting */
2973 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_MRTZ
);
2975 args
[4] = uint
->zero
; /* COMP flag */
2976 args
[5] = base
->undef
; /* R, depth */
2977 args
[6] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
2978 args
[7] = base
->undef
; /* B, sample mask */
2979 args
[8] = base
->undef
; /* A, alpha to mask */
2981 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
2983 args
[4] = uint
->one
; /* COMPR flag */
2986 /* Stencil should be in X[23:16]. */
2987 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
2988 stencil
= LLVMBuildShl(base
->gallivm
->builder
, stencil
,
2989 LLVMConstInt(ctx
->i32
, 16, 0), "");
2990 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
2994 /* SampleMask should be in Y[15:0]. */
2995 args
[6] = samplemask
;
3008 args
[7] = samplemask
;
3013 /* SI (except OLAND and HAINAN) has a bug that it only looks
3014 * at the X writemask component. */
3015 if (ctx
->screen
->b
.chip_class
== SI
&&
3016 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
3017 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
3020 /* Specify which components to enable */
3021 args
[0] = lp_build_const_int32(base
->gallivm
, mask
);
3023 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3026 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3027 LLVMValueRef
*color
, unsigned index
,
3028 unsigned samplemask_param
,
3029 bool is_last
, struct si_ps_exports
*exp
)
3031 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3032 struct lp_build_context
*base
= &bld_base
->base
;
3036 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3037 for (i
= 0; i
< 4; i
++)
3038 color
[i
] = si_llvm_saturate(bld_base
, color
[i
]);
3041 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3042 color
[3] = base
->one
;
3046 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3047 si_alpha_test(bld_base
, color
[3]);
3049 /* Line & polygon smoothing */
3050 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3051 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3054 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3055 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3056 LLVMValueRef args
[8][9];
3059 /* Get the export arguments, also find out what the last one is. */
3060 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3061 si_llvm_init_export_args(bld_base
, color
,
3062 V_008DFC_SQ_EXP_MRT
+ c
, args
[c
]);
3063 if (args
[c
][0] != bld_base
->uint_bld
.zero
)
3067 /* Emit all exports. */
3068 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3069 if (is_last
&& last
== c
) {
3070 args
[c
][1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3071 args
[c
][2] = bld_base
->uint_bld
.one
; /* DONE bit */
3072 } else if (args
[c
][0] == bld_base
->uint_bld
.zero
)
3073 continue; /* unnecessary NULL export */
3075 memcpy(exp
->args
[exp
->num
++], args
[c
], sizeof(args
[c
]));
3078 LLVMValueRef args
[9];
3081 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3084 args
[1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3085 args
[2] = bld_base
->uint_bld
.one
; /* DONE bit */
3086 } else if (args
[0] == bld_base
->uint_bld
.zero
)
3087 return; /* unnecessary NULL export */
3089 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3093 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3094 struct si_ps_exports
*exp
)
3096 for (unsigned i
= 0; i
< exp
->num
; i
++)
3097 lp_build_intrinsic(ctx
->gallivm
.builder
,
3098 "llvm.SI.export", ctx
->voidt
,
3099 exp
->args
[i
], 9, 0);
3102 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3104 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3105 struct lp_build_context
*base
= &bld_base
->base
;
3106 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3107 LLVMValueRef args
[9];
3109 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
3110 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
3111 args
[2] = uint
->one
; /* DONE bit */
3112 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
3113 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
3114 args
[5] = base
->undef
; /* R */
3115 args
[6] = base
->undef
; /* G */
3116 args
[7] = base
->undef
; /* B */
3117 args
[8] = base
->undef
; /* A */
3119 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
3120 ctx
->voidt
, args
, 9, 0);
3124 * Return PS outputs in this order:
3126 * v[0:3] = color0.xyzw
3127 * v[4:7] = color1.xyzw
3132 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3134 * The alpha-ref SGPR is returned via its original location.
3136 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3138 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3139 struct si_shader
*shader
= ctx
->shader
;
3140 struct lp_build_context
*base
= &bld_base
->base
;
3141 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3142 LLVMBuilderRef builder
= base
->gallivm
->builder
;
3143 unsigned i
, j
, first_vgpr
, vgpr
;
3145 LLVMValueRef color
[8][4] = {};
3146 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3149 /* Read the output values. */
3150 for (i
= 0; i
< info
->num_outputs
; i
++) {
3151 unsigned semantic_name
= info
->output_semantic_name
[i
];
3152 unsigned semantic_index
= info
->output_semantic_index
[i
];
3154 switch (semantic_name
) {
3155 case TGSI_SEMANTIC_COLOR
:
3156 assert(semantic_index
< 8);
3157 for (j
= 0; j
< 4; j
++) {
3158 LLVMValueRef ptr
= ctx
->soa
.outputs
[i
][j
];
3159 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3160 color
[semantic_index
][j
] = result
;
3163 case TGSI_SEMANTIC_POSITION
:
3164 depth
= LLVMBuildLoad(builder
,
3165 ctx
->soa
.outputs
[i
][2], "");
3167 case TGSI_SEMANTIC_STENCIL
:
3168 stencil
= LLVMBuildLoad(builder
,
3169 ctx
->soa
.outputs
[i
][1], "");
3171 case TGSI_SEMANTIC_SAMPLEMASK
:
3172 samplemask
= LLVMBuildLoad(builder
,
3173 ctx
->soa
.outputs
[i
][0], "");
3176 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3181 /* Fill the return structure. */
3182 ret
= ctx
->return_value
;
3185 ret
= LLVMBuildInsertValue(builder
, ret
,
3186 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3187 LLVMGetParam(ctx
->main_fn
,
3188 SI_PARAM_ALPHA_REF
)),
3189 SI_SGPR_ALPHA_REF
, "");
3192 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3193 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3197 for (j
= 0; j
< 4; j
++)
3198 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3201 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3203 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3205 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3207 /* Add the input sample mask for smoothing at the end. */
3208 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3209 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3210 ret
= LLVMBuildInsertValue(builder
, ret
,
3211 LLVMGetParam(ctx
->main_fn
,
3212 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3214 ctx
->return_value
= ret
;
3218 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3219 * buffer in number of elements and return it as an i32.
3221 static LLVMValueRef
get_buffer_size(
3222 struct lp_build_tgsi_context
*bld_base
,
3223 LLVMValueRef descriptor
)
3225 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3226 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3227 LLVMBuilderRef builder
= gallivm
->builder
;
3229 LLVMBuildExtractElement(builder
, descriptor
,
3230 lp_build_const_int32(gallivm
, 2), "");
3232 if (ctx
->screen
->b
.chip_class
>= VI
) {
3233 /* On VI, the descriptor contains the size in bytes,
3234 * but TXQ must return the size in elements.
3235 * The stride is always non-zero for resources using TXQ.
3237 LLVMValueRef stride
=
3238 LLVMBuildExtractElement(builder
, descriptor
,
3239 lp_build_const_int32(gallivm
, 1), "");
3240 stride
= LLVMBuildLShr(builder
, stride
,
3241 lp_build_const_int32(gallivm
, 16), "");
3242 stride
= LLVMBuildAnd(builder
, stride
,
3243 lp_build_const_int32(gallivm
, 0x3FFF), "");
3245 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3252 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
3255 static void build_type_name_for_intr(
3257 char *buf
, unsigned bufsize
)
3259 LLVMTypeRef elem_type
= type
;
3261 assert(bufsize
>= 8);
3263 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
3264 int ret
= snprintf(buf
, bufsize
, "v%u",
3265 LLVMGetVectorSize(type
));
3267 char *type_name
= LLVMPrintTypeToString(type
);
3268 fprintf(stderr
, "Error building type name for: %s\n",
3272 elem_type
= LLVMGetElementType(type
);
3276 switch (LLVMGetTypeKind(elem_type
)) {
3278 case LLVMIntegerTypeKind
:
3279 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
3281 case LLVMFloatTypeKind
:
3282 snprintf(buf
, bufsize
, "f32");
3284 case LLVMDoubleTypeKind
:
3285 snprintf(buf
, bufsize
, "f64");
3290 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3291 struct lp_build_tgsi_context
*bld_base
,
3292 struct lp_build_emit_data
*emit_data
);
3294 /* Prevent optimizations (at least of memory accesses) across the current
3295 * point in the program by emitting empty inline assembly that is marked as
3296 * having side effects.
3298 #if 0 /* unused currently */
3299 static void emit_optimization_barrier(struct si_shader_context
*ctx
)
3301 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3302 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3303 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, "", "", true, false);
3304 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3308 /* Combine these with & instead of |. */
3309 #define NOOP_WAITCNT 0xf7f
3310 #define LGKM_CNT 0x07f
3311 #define VM_CNT 0xf70
3313 static void emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3315 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3316 LLVMBuilderRef builder
= gallivm
->builder
;
3317 LLVMValueRef args
[1] = {
3318 lp_build_const_int32(gallivm
, simm16
)
3320 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3321 ctx
->voidt
, args
, 1, 0);
3324 static void membar_emit(
3325 const struct lp_build_tgsi_action
*action
,
3326 struct lp_build_tgsi_context
*bld_base
,
3327 struct lp_build_emit_data
*emit_data
)
3329 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3330 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3331 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3332 unsigned waitcnt
= NOOP_WAITCNT
;
3334 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3335 waitcnt
&= VM_CNT
& LGKM_CNT
;
3337 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3338 TGSI_MEMBAR_SHADER_BUFFER
|
3339 TGSI_MEMBAR_SHADER_IMAGE
))
3342 if (flags
& TGSI_MEMBAR_SHARED
)
3343 waitcnt
&= LGKM_CNT
;
3345 if (waitcnt
!= NOOP_WAITCNT
)
3346 emit_waitcnt(ctx
, waitcnt
);
3350 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3351 const struct tgsi_full_src_register
*reg
)
3354 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3355 SI_PARAM_SHADER_BUFFERS
);
3357 if (!reg
->Register
.Indirect
)
3358 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3360 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3361 reg
->Register
.Index
,
3362 SI_NUM_SHADER_BUFFERS
);
3364 return build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3367 static bool tgsi_is_array_sampler(unsigned target
)
3369 return target
== TGSI_TEXTURE_1D_ARRAY
||
3370 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3371 target
== TGSI_TEXTURE_2D_ARRAY
||
3372 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3373 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3374 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3375 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3378 static bool tgsi_is_array_image(unsigned target
)
3380 return target
== TGSI_TEXTURE_3D
||
3381 target
== TGSI_TEXTURE_CUBE
||
3382 target
== TGSI_TEXTURE_1D_ARRAY
||
3383 target
== TGSI_TEXTURE_2D_ARRAY
||
3384 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3385 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3389 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3391 * At least on Tonga, executing image stores on images with DCC enabled and
3392 * non-trivial can eventually lead to lockups. This can occur when an
3393 * application binds an image as read-only but then uses a shader that writes
3394 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3395 * program termination) in this case, but it doesn't cost much to be a bit
3396 * nicer: disabling DCC in the shader still leads to undefined results but
3397 * avoids the lockup.
3399 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3402 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3405 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3406 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3407 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3410 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3411 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3412 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3416 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
3418 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3423 * Load the resource descriptor for \p image.
3427 struct lp_build_tgsi_context
*bld_base
,
3428 const struct tgsi_full_src_register
*image
,
3429 bool is_store
, unsigned target
,
3432 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3433 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3435 LLVMValueRef index
, tmp
;
3436 bool dcc_off
= target
!= TGSI_TEXTURE_BUFFER
&& is_store
;
3438 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3440 if (!image
->Register
.Indirect
) {
3441 const struct tgsi_shader_info
*info
= bld_base
->info
;
3443 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3445 if (info
->images_writemask
& (1 << image
->Register
.Index
) &&
3446 target
!= TGSI_TEXTURE_BUFFER
)
3449 /* From the GL_ARB_shader_image_load_store extension spec:
3451 * If a shader performs an image load, store, or atomic
3452 * operation using an image variable declared as an array,
3453 * and if the index used to select an individual element is
3454 * negative or greater than or equal to the size of the
3455 * array, the results of the operation are undefined but may
3456 * not lead to termination.
3458 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3459 image
->Register
.Index
,
3463 if (target
== TGSI_TEXTURE_BUFFER
) {
3464 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3466 rsrc_ptr
= LLVMBuildPointerCast(builder
, rsrc_ptr
,
3467 const_array(ctx
->v4i32
, 0), "");
3468 index
= LLVMBuildMul(builder
, index
,
3469 LLVMConstInt(ctx
->i32
, 2, 0), "");
3470 index
= LLVMBuildAdd(builder
, index
,
3471 LLVMConstInt(ctx
->i32
, 1, 0), "");
3472 *rsrc
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3476 tmp
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3478 tmp
= force_dcc_off(ctx
, tmp
);
3482 static LLVMValueRef
image_fetch_coords(
3483 struct lp_build_tgsi_context
*bld_base
,
3484 const struct tgsi_full_instruction
*inst
,
3487 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3488 LLVMBuilderRef builder
= gallivm
->builder
;
3489 unsigned target
= inst
->Memory
.Texture
;
3490 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3491 LLVMValueRef coords
[4];
3495 for (chan
= 0; chan
< num_coords
; ++chan
) {
3496 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3497 tmp
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3501 if (num_coords
== 1)
3504 if (num_coords
== 3) {
3505 /* LLVM has difficulties lowering 3-element vectors. */
3506 coords
[3] = bld_base
->uint_bld
.undef
;
3510 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3514 * Append the extra mode bits that are used by image load and store.
3516 static void image_append_args(
3517 struct si_shader_context
*ctx
,
3518 struct lp_build_emit_data
* emit_data
,
3523 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3524 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3525 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3526 LLVMValueRef r128
= i1false
;
3527 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3530 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3532 LLVMValueRef slc
= i1false
;
3533 LLVMValueRef lwe
= i1false
;
3535 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3536 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3537 emit_data
->args
[emit_data
->arg_count
++] = da
;
3539 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3541 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3545 /* HAVE_LLVM >= 0x0400 */
3546 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3547 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3548 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3549 emit_data
->args
[emit_data
->arg_count
++] = da
;
3553 * Append the resource and indexing arguments for buffer intrinsics.
3555 * \param rsrc the v4i32 buffer resource
3556 * \param index index into the buffer (stride-based)
3557 * \param offset byte offset into the buffer
3559 static void buffer_append_args(
3560 struct si_shader_context
*ctx
,
3561 struct lp_build_emit_data
*emit_data
,
3564 LLVMValueRef offset
,
3568 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3569 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3570 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3572 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3573 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3574 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3576 emit_data
->args
[emit_data
->arg_count
++] =
3578 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3579 i1true
: i1false
; /* glc */
3581 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3584 static void load_fetch_args(
3585 struct lp_build_tgsi_context
* bld_base
,
3586 struct lp_build_emit_data
* emit_data
)
3588 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3589 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3590 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3591 unsigned target
= inst
->Memory
.Texture
;
3594 emit_data
->dst_type
= LLVMVectorType(bld_base
->base
.elem_type
, 4);
3596 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3597 LLVMBuilderRef builder
= gallivm
->builder
;
3598 LLVMValueRef offset
;
3601 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3603 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3604 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3606 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3607 offset
, false, false);
3608 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3609 LLVMValueRef coords
;
3611 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3612 coords
= image_fetch_coords(bld_base
, inst
, 1);
3614 if (target
== TGSI_TEXTURE_BUFFER
) {
3615 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3616 bld_base
->uint_bld
.zero
, false, false);
3618 emit_data
->args
[0] = coords
;
3619 emit_data
->args
[1] = rsrc
;
3620 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
3621 emit_data
->arg_count
= 3;
3623 image_append_args(ctx
, emit_data
, target
, false, false);
3628 static void load_emit_buffer(struct si_shader_context
*ctx
,
3629 struct lp_build_emit_data
*emit_data
)
3631 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3632 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3633 LLVMBuilderRef builder
= gallivm
->builder
;
3634 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3635 uint count
= util_last_bit(writemask
);
3636 const char *intrinsic_name
;
3637 LLVMTypeRef dst_type
;
3641 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3642 dst_type
= ctx
->f32
;
3645 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3646 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3649 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3650 dst_type
= ctx
->v4f32
;
3654 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3655 builder
, intrinsic_name
, dst_type
,
3656 emit_data
->args
, emit_data
->arg_count
,
3657 LP_FUNC_ATTR_READONLY
);
3660 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3661 const struct tgsi_full_instruction
*inst
,
3662 LLVMTypeRef type
, int arg
)
3664 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3665 LLVMBuilderRef builder
= gallivm
->builder
;
3666 LLVMValueRef offset
, ptr
;
3669 offset
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, arg
, 0);
3670 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3672 ptr
= ctx
->shared_memory
;
3673 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3674 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3675 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3680 static void load_emit_memory(
3681 struct si_shader_context
*ctx
,
3682 struct lp_build_emit_data
*emit_data
)
3684 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3685 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3686 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3687 LLVMBuilderRef builder
= gallivm
->builder
;
3688 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3689 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3692 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 1);
3694 for (chan
= 0; chan
< 4; ++chan
) {
3695 if (!(writemask
& (1 << chan
))) {
3696 channels
[chan
] = LLVMGetUndef(base
->elem_type
);
3700 index
= lp_build_const_int32(gallivm
, chan
);
3701 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3702 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3704 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3707 static void get_image_intr_name(const char *base_name
,
3708 LLVMTypeRef data_type
,
3709 LLVMTypeRef coords_type
,
3710 LLVMTypeRef rsrc_type
,
3711 char *out_name
, unsigned out_len
)
3713 char coords_type_name
[8];
3715 build_type_name_for_intr(coords_type
, coords_type_name
,
3716 sizeof(coords_type_name
));
3718 if (HAVE_LLVM
<= 0x0309) {
3719 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
3721 char data_type_name
[8];
3722 char rsrc_type_name
[8];
3724 build_type_name_for_intr(data_type
, data_type_name
,
3725 sizeof(data_type_name
));
3726 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
3727 sizeof(rsrc_type_name
));
3728 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
3729 data_type_name
, coords_type_name
, rsrc_type_name
);
3733 static void load_emit(
3734 const struct lp_build_tgsi_action
*action
,
3735 struct lp_build_tgsi_context
*bld_base
,
3736 struct lp_build_emit_data
*emit_data
)
3738 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3739 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3740 LLVMBuilderRef builder
= gallivm
->builder
;
3741 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3742 char intrinsic_name
[64];
3744 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3745 load_emit_memory(ctx
, emit_data
);
3749 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3750 emit_waitcnt(ctx
, VM_CNT
);
3752 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3753 load_emit_buffer(ctx
, emit_data
);
3757 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3758 emit_data
->output
[emit_data
->chan
] =
3760 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3761 emit_data
->args
, emit_data
->arg_count
,
3762 LP_FUNC_ATTR_READONLY
);
3764 get_image_intr_name("llvm.amdgcn.image.load",
3765 emit_data
->dst_type
, /* vdata */
3766 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3767 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3768 intrinsic_name
, sizeof(intrinsic_name
));
3770 emit_data
->output
[emit_data
->chan
] =
3772 builder
, intrinsic_name
, emit_data
->dst_type
,
3773 emit_data
->args
, emit_data
->arg_count
,
3774 LP_FUNC_ATTR_READONLY
);
3778 static void store_fetch_args(
3779 struct lp_build_tgsi_context
* bld_base
,
3780 struct lp_build_emit_data
* emit_data
)
3782 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3783 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3784 LLVMBuilderRef builder
= gallivm
->builder
;
3785 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3786 struct tgsi_full_src_register memory
;
3787 LLVMValueRef chans
[4];
3792 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3794 for (chan
= 0; chan
< 4; ++chan
) {
3795 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3797 data
= lp_build_gather_values(gallivm
, chans
, 4);
3799 emit_data
->args
[emit_data
->arg_count
++] = data
;
3801 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3803 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3804 LLVMValueRef offset
;
3807 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3809 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3810 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3812 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3813 offset
, false, false);
3814 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3815 unsigned target
= inst
->Memory
.Texture
;
3816 LLVMValueRef coords
;
3818 /* 8bit/16bit TC L1 write corruption bug on SI.
3819 * All store opcodes not aligned to a dword are affected.
3821 * The only way to get unaligned stores in radeonsi is through
3824 bool force_glc
= ctx
->screen
->b
.chip_class
== SI
;
3826 coords
= image_fetch_coords(bld_base
, inst
, 0);
3828 if (target
== TGSI_TEXTURE_BUFFER
) {
3829 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3830 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3831 bld_base
->uint_bld
.zero
, false, force_glc
);
3833 emit_data
->args
[1] = coords
;
3834 image_fetch_rsrc(bld_base
, &memory
, true, target
,
3835 &emit_data
->args
[2]);
3836 emit_data
->args
[3] = lp_build_const_int32(gallivm
, 15); /* dmask */
3837 emit_data
->arg_count
= 4;
3839 image_append_args(ctx
, emit_data
, target
, false, force_glc
);
3844 static void store_emit_buffer(
3845 struct si_shader_context
*ctx
,
3846 struct lp_build_emit_data
*emit_data
)
3848 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3849 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3850 LLVMBuilderRef builder
= gallivm
->builder
;
3851 struct lp_build_context
*uint_bld
= &ctx
->soa
.bld_base
.uint_bld
;
3852 LLVMValueRef base_data
= emit_data
->args
[0];
3853 LLVMValueRef base_offset
= emit_data
->args
[3];
3854 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3858 const char *intrinsic_name
;
3860 LLVMValueRef offset
;
3863 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3865 /* Due to an LLVM limitation, split 3-element writes
3866 * into a 2-element and a 1-element write. */
3868 writemask
|= 1 << (start
+ 2);
3874 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3875 } else if (count
== 2) {
3876 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3878 tmp
= LLVMBuildExtractElement(
3880 lp_build_const_int32(gallivm
, start
), "");
3881 data
= LLVMBuildInsertElement(
3882 builder
, LLVMGetUndef(v2f32
), tmp
,
3883 uint_bld
->zero
, "");
3885 tmp
= LLVMBuildExtractElement(
3887 lp_build_const_int32(gallivm
, start
+ 1), "");
3888 data
= LLVMBuildInsertElement(
3889 builder
, data
, tmp
, uint_bld
->one
, "");
3891 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3894 data
= LLVMBuildExtractElement(
3896 lp_build_const_int32(gallivm
, start
), "");
3897 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3900 offset
= base_offset
;
3902 offset
= LLVMBuildAdd(
3904 lp_build_const_int32(gallivm
, start
* 4), "");
3907 emit_data
->args
[0] = data
;
3908 emit_data
->args
[3] = offset
;
3911 builder
, intrinsic_name
, emit_data
->dst_type
,
3912 emit_data
->args
, emit_data
->arg_count
, 0);
3916 static void store_emit_memory(
3917 struct si_shader_context
*ctx
,
3918 struct lp_build_emit_data
*emit_data
)
3920 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3921 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3922 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3923 LLVMBuilderRef builder
= gallivm
->builder
;
3924 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3925 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3928 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 0);
3930 for (chan
= 0; chan
< 4; ++chan
) {
3931 if (!(writemask
& (1 << chan
))) {
3934 data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 1, chan
);
3935 index
= lp_build_const_int32(gallivm
, chan
);
3936 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3937 LLVMBuildStore(builder
, data
, derived_ptr
);
3941 static void store_emit(
3942 const struct lp_build_tgsi_action
*action
,
3943 struct lp_build_tgsi_context
*bld_base
,
3944 struct lp_build_emit_data
*emit_data
)
3946 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3947 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3948 LLVMBuilderRef builder
= gallivm
->builder
;
3949 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3950 unsigned target
= inst
->Memory
.Texture
;
3951 char intrinsic_name
[64];
3953 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3954 store_emit_memory(ctx
, emit_data
);
3958 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3959 emit_waitcnt(ctx
, VM_CNT
);
3961 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3962 store_emit_buffer(ctx
, emit_data
);
3966 if (target
== TGSI_TEXTURE_BUFFER
) {
3967 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3968 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
3969 emit_data
->dst_type
, emit_data
->args
,
3970 emit_data
->arg_count
, 0);
3972 get_image_intr_name("llvm.amdgcn.image.store",
3973 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
3974 LLVMTypeOf(emit_data
->args
[1]), /* coords */
3975 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
3976 intrinsic_name
, sizeof(intrinsic_name
));
3978 emit_data
->output
[emit_data
->chan
] =
3980 builder
, intrinsic_name
, emit_data
->dst_type
,
3981 emit_data
->args
, emit_data
->arg_count
, 0);
3985 static void atomic_fetch_args(
3986 struct lp_build_tgsi_context
* bld_base
,
3987 struct lp_build_emit_data
* emit_data
)
3989 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3990 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3991 LLVMBuilderRef builder
= gallivm
->builder
;
3992 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3993 LLVMValueRef data1
, data2
;
3997 emit_data
->dst_type
= bld_base
->base
.elem_type
;
3999 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
4000 data1
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4002 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4003 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
4004 data2
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4007 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
4008 * of arguments, which is reversed relative to TGSI (and GLSL)
4010 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4011 emit_data
->args
[emit_data
->arg_count
++] = data2
;
4012 emit_data
->args
[emit_data
->arg_count
++] = data1
;
4014 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4015 LLVMValueRef offset
;
4017 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
4019 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
4020 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4022 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
4023 offset
, true, false);
4024 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
4025 unsigned target
= inst
->Memory
.Texture
;
4026 LLVMValueRef coords
;
4028 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
4029 coords
= image_fetch_coords(bld_base
, inst
, 1);
4031 if (target
== TGSI_TEXTURE_BUFFER
) {
4032 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
4033 bld_base
->uint_bld
.zero
, true, false);
4035 emit_data
->args
[emit_data
->arg_count
++] = coords
;
4036 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
4038 image_append_args(ctx
, emit_data
, target
, true, false);
4043 static void atomic_emit_memory(struct si_shader_context
*ctx
,
4044 struct lp_build_emit_data
*emit_data
) {
4045 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4046 LLVMBuilderRef builder
= gallivm
->builder
;
4047 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4048 LLVMValueRef ptr
, result
, arg
;
4050 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
4052 arg
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 2, 0);
4053 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
4055 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4056 LLVMValueRef new_data
;
4057 new_data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
,
4060 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
4062 #if HAVE_LLVM >= 0x309
4063 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
4064 LLVMAtomicOrderingSequentiallyConsistent
,
4065 LLVMAtomicOrderingSequentiallyConsistent
,
4069 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
4071 LLVMAtomicRMWBinOp op
;
4073 switch(inst
->Instruction
.Opcode
) {
4074 case TGSI_OPCODE_ATOMUADD
:
4075 op
= LLVMAtomicRMWBinOpAdd
;
4077 case TGSI_OPCODE_ATOMXCHG
:
4078 op
= LLVMAtomicRMWBinOpXchg
;
4080 case TGSI_OPCODE_ATOMAND
:
4081 op
= LLVMAtomicRMWBinOpAnd
;
4083 case TGSI_OPCODE_ATOMOR
:
4084 op
= LLVMAtomicRMWBinOpOr
;
4086 case TGSI_OPCODE_ATOMXOR
:
4087 op
= LLVMAtomicRMWBinOpXor
;
4089 case TGSI_OPCODE_ATOMUMIN
:
4090 op
= LLVMAtomicRMWBinOpUMin
;
4092 case TGSI_OPCODE_ATOMUMAX
:
4093 op
= LLVMAtomicRMWBinOpUMax
;
4095 case TGSI_OPCODE_ATOMIMIN
:
4096 op
= LLVMAtomicRMWBinOpMin
;
4098 case TGSI_OPCODE_ATOMIMAX
:
4099 op
= LLVMAtomicRMWBinOpMax
;
4102 unreachable("unknown atomic opcode");
4105 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
4106 LLVMAtomicOrderingSequentiallyConsistent
,
4109 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
4112 static void atomic_emit(
4113 const struct lp_build_tgsi_action
*action
,
4114 struct lp_build_tgsi_context
*bld_base
,
4115 struct lp_build_emit_data
*emit_data
)
4117 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4118 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4119 LLVMBuilderRef builder
= gallivm
->builder
;
4120 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4121 char intrinsic_name
[40];
4124 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4125 atomic_emit_memory(ctx
, emit_data
);
4129 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
4130 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4131 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4132 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
4134 LLVMValueRef coords
;
4135 char coords_type
[8];
4137 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4138 coords
= emit_data
->args
[2];
4140 coords
= emit_data
->args
[1];
4142 build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4143 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4144 "llvm.amdgcn.image.atomic.%s.%s",
4145 action
->intr_name
, coords_type
);
4148 tmp
= lp_build_intrinsic(
4149 builder
, intrinsic_name
, bld_base
->uint_bld
.elem_type
,
4150 emit_data
->args
, emit_data
->arg_count
, 0);
4151 emit_data
->output
[emit_data
->chan
] =
4152 LLVMBuildBitCast(builder
, tmp
, bld_base
->base
.elem_type
, "");
4155 static void resq_fetch_args(
4156 struct lp_build_tgsi_context
* bld_base
,
4157 struct lp_build_emit_data
* emit_data
)
4159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4160 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4161 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4162 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4164 emit_data
->dst_type
= ctx
->v4i32
;
4166 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4167 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4168 emit_data
->arg_count
= 1;
4169 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4170 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4171 &emit_data
->args
[0]);
4172 emit_data
->arg_count
= 1;
4174 emit_data
->args
[0] = bld_base
->uint_bld
.zero
; /* mip level */
4175 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4176 &emit_data
->args
[1]);
4177 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
4178 emit_data
->args
[3] = bld_base
->uint_bld
.zero
; /* unorm */
4179 emit_data
->args
[4] = bld_base
->uint_bld
.zero
; /* r128 */
4180 emit_data
->args
[5] = tgsi_is_array_image(inst
->Memory
.Texture
) ?
4181 bld_base
->uint_bld
.one
: bld_base
->uint_bld
.zero
; /* da */
4182 emit_data
->args
[6] = bld_base
->uint_bld
.zero
; /* glc */
4183 emit_data
->args
[7] = bld_base
->uint_bld
.zero
; /* slc */
4184 emit_data
->args
[8] = bld_base
->uint_bld
.zero
; /* tfe */
4185 emit_data
->args
[9] = bld_base
->uint_bld
.zero
; /* lwe */
4186 emit_data
->arg_count
= 10;
4190 static void resq_emit(
4191 const struct lp_build_tgsi_action
*action
,
4192 struct lp_build_tgsi_context
*bld_base
,
4193 struct lp_build_emit_data
*emit_data
)
4195 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4196 LLVMBuilderRef builder
= gallivm
->builder
;
4197 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4200 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4201 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4202 lp_build_const_int32(gallivm
, 2), "");
4203 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4204 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4206 out
= lp_build_intrinsic(
4207 builder
, "llvm.SI.getresinfo.i32", emit_data
->dst_type
,
4208 emit_data
->args
, emit_data
->arg_count
,
4209 LP_FUNC_ATTR_READNONE
);
4211 /* Divide the number of layers by 6 to get the number of cubes. */
4212 if (inst
->Memory
.Texture
== TGSI_TEXTURE_CUBE_ARRAY
) {
4213 LLVMValueRef imm2
= lp_build_const_int32(gallivm
, 2);
4214 LLVMValueRef imm6
= lp_build_const_int32(gallivm
, 6);
4216 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4217 z
= LLVMBuildSDiv(builder
, z
, imm6
, "");
4218 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4222 emit_data
->output
[emit_data
->chan
] = out
;
4225 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4226 struct lp_build_emit_data
*emit_data
,
4227 unsigned opcode
, unsigned target
,
4228 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4229 LLVMValueRef
*param
, unsigned count
,
4232 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4234 unsigned is_rect
= target
== TGSI_TEXTURE_RECT
;
4236 /* Pad to power of two vector */
4237 while (count
< util_next_power_of_two(count
))
4238 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4240 /* Texture coordinates. */
4242 emit_data
->args
[0] = lp_build_gather_values(gallivm
, param
, count
);
4244 emit_data
->args
[0] = param
[0];
4247 emit_data
->args
[1] = res_ptr
;
4250 if (opcode
== TGSI_OPCODE_TXF
|| opcode
== TGSI_OPCODE_TXQ
)
4251 emit_data
->dst_type
= ctx
->v4i32
;
4253 emit_data
->dst_type
= ctx
->v4f32
;
4255 emit_data
->args
[num_args
++] = samp_ptr
;
4258 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, dmask
);
4259 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, is_rect
); /* unorm */
4260 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* r128 */
4261 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
,
4262 tgsi_is_array_sampler(target
)); /* da */
4263 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* glc */
4264 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* slc */
4265 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* tfe */
4266 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* lwe */
4268 emit_data
->arg_count
= num_args
;
4271 static const struct lp_build_tgsi_action tex_action
;
4281 * Load an image view, fmask view. or sampler state descriptor.
4283 static LLVMValueRef
load_sampler_desc_custom(struct si_shader_context
*ctx
,
4284 LLVMValueRef list
, LLVMValueRef index
,
4285 enum desc_type type
)
4287 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4288 LLVMBuilderRef builder
= gallivm
->builder
;
4292 /* The image is at [0:7]. */
4293 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4296 /* The buffer is in [4:7]. */
4297 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4298 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4299 list
= LLVMBuildPointerCast(builder
, list
,
4300 const_array(ctx
->v4i32
, 0), "");
4303 /* The FMASK is at [8:15]. */
4304 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4305 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4308 /* The sampler state is at [12:15]. */
4309 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4310 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4311 list
= LLVMBuildPointerCast(builder
, list
,
4312 const_array(ctx
->v4i32
, 0), "");
4316 return build_indexed_load_const(ctx
, list
, index
);
4319 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4320 LLVMValueRef index
, enum desc_type type
)
4322 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
,
4325 return load_sampler_desc_custom(ctx
, list
, index
, type
);
4328 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4331 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4332 * filtering manually. The driver sets img7 to a mask clearing
4333 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4334 * s_and_b32 samp0, samp0, img7
4337 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4339 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4340 LLVMValueRef res
, LLVMValueRef samp
)
4342 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4343 LLVMValueRef img7
, samp0
;
4345 if (ctx
->screen
->b
.chip_class
>= VI
)
4348 img7
= LLVMBuildExtractElement(builder
, res
,
4349 LLVMConstInt(ctx
->i32
, 7, 0), "");
4350 samp0
= LLVMBuildExtractElement(builder
, samp
,
4351 LLVMConstInt(ctx
->i32
, 0, 0), "");
4352 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4353 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4354 LLVMConstInt(ctx
->i32
, 0, 0), "");
4357 static void tex_fetch_ptrs(
4358 struct lp_build_tgsi_context
*bld_base
,
4359 struct lp_build_emit_data
*emit_data
,
4360 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4362 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4363 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4364 unsigned target
= inst
->Texture
.Texture
;
4365 unsigned sampler_src
;
4366 unsigned sampler_index
;
4369 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4370 sampler_index
= emit_data
->inst
->Src
[sampler_src
].Register
.Index
;
4372 if (emit_data
->inst
->Src
[sampler_src
].Register
.Indirect
) {
4373 const struct tgsi_full_src_register
*reg
= &emit_data
->inst
->Src
[sampler_src
];
4375 index
= get_bounded_indirect_index(ctx
,
4377 reg
->Register
.Index
,
4380 index
= LLVMConstInt(ctx
->i32
, sampler_index
, 0);
4383 if (target
== TGSI_TEXTURE_BUFFER
)
4384 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_BUFFER
);
4386 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_IMAGE
);
4393 if (target
== TGSI_TEXTURE_2D_MSAA
||
4394 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4396 *fmask_ptr
= load_sampler_desc(ctx
, index
, DESC_FMASK
);
4397 } else if (target
!= TGSI_TEXTURE_BUFFER
) {
4399 *samp_ptr
= load_sampler_desc(ctx
, index
, DESC_SAMPLER
);
4400 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4405 static void txq_fetch_args(
4406 struct lp_build_tgsi_context
*bld_base
,
4407 struct lp_build_emit_data
*emit_data
)
4409 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4410 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4411 unsigned target
= inst
->Texture
.Texture
;
4412 LLVMValueRef res_ptr
;
4413 LLVMValueRef address
;
4415 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4417 if (target
== TGSI_TEXTURE_BUFFER
) {
4418 /* Read the size from the buffer descriptor directly. */
4419 emit_data
->args
[0] = get_buffer_size(bld_base
, res_ptr
);
4423 /* Textures - set the mip level. */
4424 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4426 set_tex_fetch_args(ctx
, emit_data
, TGSI_OPCODE_TXQ
, target
, res_ptr
,
4427 NULL
, &address
, 1, 0xf);
4430 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4431 struct lp_build_tgsi_context
*bld_base
,
4432 struct lp_build_emit_data
*emit_data
)
4434 struct lp_build_context
*base
= &bld_base
->base
;
4435 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4437 if (target
== TGSI_TEXTURE_BUFFER
) {
4438 /* Just return the buffer size. */
4439 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4443 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4444 base
->gallivm
->builder
, "llvm.SI.getresinfo.i32",
4445 emit_data
->dst_type
, emit_data
->args
, emit_data
->arg_count
,
4446 LP_FUNC_ATTR_READNONE
);
4448 /* Divide the number of layers by 6 to get the number of cubes. */
4449 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4450 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4451 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
4452 LLVMValueRef two
= lp_build_const_int32(bld_base
->base
.gallivm
, 2);
4453 LLVMValueRef six
= lp_build_const_int32(bld_base
->base
.gallivm
, 6);
4455 LLVMValueRef v4
= emit_data
->output
[emit_data
->chan
];
4456 LLVMValueRef z
= LLVMBuildExtractElement(builder
, v4
, two
, "");
4457 z
= LLVMBuildSDiv(builder
, z
, six
, "");
4459 emit_data
->output
[emit_data
->chan
] =
4460 LLVMBuildInsertElement(builder
, v4
, z
, two
, "");
4464 static void tex_fetch_args(
4465 struct lp_build_tgsi_context
*bld_base
,
4466 struct lp_build_emit_data
*emit_data
)
4468 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4469 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4470 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4471 unsigned opcode
= inst
->Instruction
.Opcode
;
4472 unsigned target
= inst
->Texture
.Texture
;
4473 LLVMValueRef coords
[5], derivs
[6];
4474 LLVMValueRef address
[16];
4475 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4476 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4479 unsigned num_deriv_channels
= 0;
4480 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4481 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4482 unsigned dmask
= 0xf;
4484 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4486 if (target
== TGSI_TEXTURE_BUFFER
) {
4487 emit_data
->dst_type
= ctx
->v4f32
;
4488 emit_data
->args
[0] = LLVMBuildBitCast(gallivm
->builder
, res_ptr
,
4490 emit_data
->args
[1] = bld_base
->uint_bld
.zero
;
4491 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4492 emit_data
->arg_count
= 3;
4496 /* Fetch and project texture coordinates */
4497 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4498 for (chan
= 0; chan
< 3; chan
++ ) {
4499 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4502 if (opcode
== TGSI_OPCODE_TXP
)
4503 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4509 if (opcode
== TGSI_OPCODE_TXP
)
4510 coords
[3] = bld_base
->base
.one
;
4513 if (has_offset
&& opcode
!= TGSI_OPCODE_TXF
) {
4514 /* The offsets are six-bit signed integers packed like this:
4515 * X=[5:0], Y=[13:8], and Z=[21:16].
4517 LLVMValueRef offset
[3], pack
;
4519 assert(inst
->Texture
.NumOffsets
== 1);
4521 for (chan
= 0; chan
< 3; chan
++) {
4522 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4523 emit_data
->inst
, 0, chan
);
4524 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4525 lp_build_const_int32(gallivm
, 0x3f), "");
4527 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4528 lp_build_const_int32(gallivm
, chan
*8), "");
4531 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4532 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4533 address
[count
++] = pack
;
4536 /* Pack LOD bias value */
4537 if (opcode
== TGSI_OPCODE_TXB
)
4538 address
[count
++] = coords
[3];
4539 if (opcode
== TGSI_OPCODE_TXB2
)
4540 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4542 /* Pack depth comparison value */
4543 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4546 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4547 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4549 assert(ref_pos
>= 0);
4550 z
= coords
[ref_pos
];
4553 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4554 * so the depth comparison value isn't clamped for Z16 and
4555 * Z24 anymore. Do it manually here.
4557 * It's unnecessary if the original texture format was
4558 * Z32_FLOAT, but we don't know that here.
4560 if (ctx
->screen
->b
.chip_class
== VI
)
4561 z
= si_llvm_saturate(bld_base
, z
);
4563 address
[count
++] = z
;
4566 /* Pack user derivatives */
4567 if (opcode
== TGSI_OPCODE_TXD
) {
4568 int param
, num_src_deriv_channels
;
4571 case TGSI_TEXTURE_3D
:
4572 num_src_deriv_channels
= 3;
4573 num_deriv_channels
= 3;
4575 case TGSI_TEXTURE_2D
:
4576 case TGSI_TEXTURE_SHADOW2D
:
4577 case TGSI_TEXTURE_RECT
:
4578 case TGSI_TEXTURE_SHADOWRECT
:
4579 case TGSI_TEXTURE_2D_ARRAY
:
4580 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4581 num_src_deriv_channels
= 2;
4582 num_deriv_channels
= 2;
4584 case TGSI_TEXTURE_CUBE
:
4585 case TGSI_TEXTURE_SHADOWCUBE
:
4586 case TGSI_TEXTURE_CUBE_ARRAY
:
4587 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4588 /* Cube derivatives will be converted to 2D. */
4589 num_src_deriv_channels
= 3;
4590 num_deriv_channels
= 2;
4592 case TGSI_TEXTURE_1D
:
4593 case TGSI_TEXTURE_SHADOW1D
:
4594 case TGSI_TEXTURE_1D_ARRAY
:
4595 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4596 num_src_deriv_channels
= 1;
4597 num_deriv_channels
= 1;
4600 unreachable("invalid target");
4603 for (param
= 0; param
< 2; param
++)
4604 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4605 derivs
[param
* num_src_deriv_channels
+ chan
] =
4606 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4609 if (target
== TGSI_TEXTURE_CUBE
||
4610 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4611 target
== TGSI_TEXTURE_SHADOWCUBE
||
4612 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4613 si_prepare_cube_coords(bld_base
, emit_data
, coords
, derivs
);
4615 if (opcode
== TGSI_OPCODE_TXD
)
4616 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4617 address
[count
++] = derivs
[i
];
4619 /* Pack texture coordinates */
4620 address
[count
++] = coords
[0];
4622 address
[count
++] = coords
[1];
4624 address
[count
++] = coords
[2];
4626 /* Pack LOD or sample index */
4627 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4628 address
[count
++] = coords
[3];
4629 else if (opcode
== TGSI_OPCODE_TXL2
)
4630 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4633 assert(!"Cannot handle more than 16 texture address parameters");
4637 for (chan
= 0; chan
< count
; chan
++ ) {
4638 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4639 address
[chan
], ctx
->i32
, "");
4642 /* Adjust the sample index according to FMASK.
4644 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4645 * which is the identity mapping. Each nibble says which physical sample
4646 * should be fetched to get that sample.
4648 * For example, 0x11111100 means there are only 2 samples stored and
4649 * the second sample covers 3/4 of the pixel. When reading samples 0
4650 * and 1, return physical sample 0 (determined by the first two 0s
4651 * in FMASK), otherwise return physical sample 1.
4653 * The sample index should be adjusted as follows:
4654 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4656 if (target
== TGSI_TEXTURE_2D_MSAA
||
4657 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4658 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4659 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4660 LLVMValueRef txf_address
[4];
4661 unsigned txf_count
= count
;
4662 struct tgsi_full_instruction inst
= {};
4664 memcpy(txf_address
, address
, sizeof(txf_address
));
4666 if (target
== TGSI_TEXTURE_2D_MSAA
) {
4667 txf_address
[2] = bld_base
->uint_bld
.zero
;
4669 txf_address
[3] = bld_base
->uint_bld
.zero
;
4671 /* Read FMASK using TXF. */
4672 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF
;
4673 inst
.Texture
.Texture
= target
;
4674 txf_emit_data
.inst
= &inst
;
4675 txf_emit_data
.chan
= 0;
4676 set_tex_fetch_args(ctx
, &txf_emit_data
, TGSI_OPCODE_TXF
,
4677 target
, fmask_ptr
, NULL
,
4678 txf_address
, txf_count
, 0xf);
4679 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4681 /* Initialize some constants. */
4682 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4683 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4685 /* Apply the formula. */
4686 LLVMValueRef fmask
=
4687 LLVMBuildExtractElement(gallivm
->builder
,
4688 txf_emit_data
.output
[0],
4689 uint_bld
->zero
, "");
4691 unsigned sample_chan
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4693 LLVMValueRef sample_index4
=
4694 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4696 LLVMValueRef shifted_fmask
=
4697 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4699 LLVMValueRef final_sample
=
4700 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4702 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4703 * resource descriptor is 0 (invalid),
4705 LLVMValueRef fmask_desc
=
4706 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4709 LLVMValueRef fmask_word1
=
4710 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4713 LLVMValueRef word1_is_nonzero
=
4714 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4715 fmask_word1
, uint_bld
->zero
, "");
4717 /* Replace the MSAA sample index. */
4718 address
[sample_chan
] =
4719 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4720 final_sample
, address
[sample_chan
], "");
4723 if (opcode
== TGSI_OPCODE_TXF
) {
4724 /* add tex offsets */
4725 if (inst
->Texture
.NumOffsets
) {
4726 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4727 struct lp_build_tgsi_soa_context
*bld
= lp_soa_context(bld_base
);
4728 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4730 assert(inst
->Texture
.NumOffsets
== 1);
4733 case TGSI_TEXTURE_3D
:
4734 address
[2] = lp_build_add(uint_bld
, address
[2],
4735 bld
->immediates
[off
->Index
][off
->SwizzleZ
]);
4737 case TGSI_TEXTURE_2D
:
4738 case TGSI_TEXTURE_SHADOW2D
:
4739 case TGSI_TEXTURE_RECT
:
4740 case TGSI_TEXTURE_SHADOWRECT
:
4741 case TGSI_TEXTURE_2D_ARRAY
:
4742 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4744 lp_build_add(uint_bld
, address
[1],
4745 bld
->immediates
[off
->Index
][off
->SwizzleY
]);
4747 case TGSI_TEXTURE_1D
:
4748 case TGSI_TEXTURE_SHADOW1D
:
4749 case TGSI_TEXTURE_1D_ARRAY
:
4750 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4752 lp_build_add(uint_bld
, address
[0],
4753 bld
->immediates
[off
->Index
][off
->SwizzleX
]);
4755 /* texture offsets do not apply to other texture targets */
4760 if (opcode
== TGSI_OPCODE_TG4
) {
4761 unsigned gather_comp
= 0;
4763 /* DMASK was repurposed for GATHER4. 4 components are always
4764 * returned and DMASK works like a swizzle - it selects
4765 * the component to fetch. The only valid DMASK values are
4766 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4767 * (red,red,red,red) etc.) The ISA document doesn't mention
4771 /* Get the component index from src1.x for Gather4. */
4772 if (!tgsi_is_shadow_target(target
)) {
4773 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
4774 LLVMValueRef comp_imm
;
4775 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4777 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4779 comp_imm
= imms
[src1
.Index
][src1
.SwizzleX
];
4780 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4781 gather_comp
= CLAMP(gather_comp
, 0, 3);
4784 dmask
= 1 << gather_comp
;
4787 set_tex_fetch_args(ctx
, emit_data
, opcode
, target
, res_ptr
,
4788 samp_ptr
, address
, count
, dmask
);
4791 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4792 * incorrectly forces nearest filtering if the texture format is integer.
4793 * The only effect it has on Gather4, which always returns 4 texels for
4794 * bilinear filtering, is that the final coordinates are off by 0.5 of
4797 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4798 * or (0.5 / size) from the normalized coordinates.
4800 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4801 struct lp_build_emit_data
*emit_data
,
4802 const char *intr_name
,
4803 unsigned coord_vgpr_index
)
4805 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4806 LLVMValueRef coord
= emit_data
->args
[0];
4807 LLVMValueRef half_texel
[2];
4810 if (emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
||
4811 emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWRECT
) {
4812 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4814 struct tgsi_full_instruction txq_inst
= {};
4815 struct lp_build_emit_data txq_emit_data
= {};
4817 /* Query the texture size. */
4818 txq_inst
.Texture
.Texture
= emit_data
->inst
->Texture
.Texture
;
4819 txq_emit_data
.inst
= &txq_inst
;
4820 txq_emit_data
.dst_type
= ctx
->v4i32
;
4821 set_tex_fetch_args(ctx
, &txq_emit_data
, TGSI_OPCODE_TXQ
,
4822 txq_inst
.Texture
.Texture
,
4823 emit_data
->args
[1], NULL
,
4824 &ctx
->soa
.bld_base
.uint_bld
.zero
,
4826 txq_emit(NULL
, &ctx
->soa
.bld_base
, &txq_emit_data
);
4828 /* Compute -0.5 / size. */
4829 for (c
= 0; c
< 2; c
++) {
4831 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4832 LLVMConstInt(ctx
->i32
, c
, 0), "");
4833 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4835 lp_build_emit_llvm_unary(&ctx
->soa
.bld_base
,
4836 TGSI_OPCODE_RCP
, half_texel
[c
]);
4837 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4838 LLVMConstReal(ctx
->f32
, -0.5), "");
4842 for (c
= 0; c
< 2; c
++) {
4844 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4846 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4847 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4848 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4849 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4850 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4853 emit_data
->args
[0] = coord
;
4854 emit_data
->output
[emit_data
->chan
] =
4855 lp_build_intrinsic(builder
, intr_name
, emit_data
->dst_type
,
4856 emit_data
->args
, emit_data
->arg_count
,
4857 LP_FUNC_ATTR_READNONE
);
4860 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4861 struct lp_build_tgsi_context
*bld_base
,
4862 struct lp_build_emit_data
*emit_data
)
4864 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4865 struct lp_build_context
*base
= &bld_base
->base
;
4866 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4867 unsigned opcode
= inst
->Instruction
.Opcode
;
4868 unsigned target
= inst
->Texture
.Texture
;
4869 char intr_name
[127];
4870 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4871 bool is_shadow
= tgsi_is_shadow_target(target
);
4873 const char *name
= "llvm.SI.image.sample";
4874 const char *infix
= "";
4876 if (target
== TGSI_TEXTURE_BUFFER
) {
4877 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4878 base
->gallivm
->builder
,
4879 "llvm.SI.vs.load.input", emit_data
->dst_type
,
4880 emit_data
->args
, emit_data
->arg_count
,
4881 LP_FUNC_ATTR_READNONE
);
4886 case TGSI_OPCODE_TXF
:
4887 name
= target
== TGSI_TEXTURE_2D_MSAA
||
4888 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4889 "llvm.SI.image.load" :
4890 "llvm.SI.image.load.mip";
4894 case TGSI_OPCODE_LODQ
:
4895 name
= "llvm.SI.getlod";
4899 case TGSI_OPCODE_TEX
:
4900 case TGSI_OPCODE_TEX2
:
4901 case TGSI_OPCODE_TXP
:
4902 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4905 case TGSI_OPCODE_TXB
:
4906 case TGSI_OPCODE_TXB2
:
4907 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4910 case TGSI_OPCODE_TXL
:
4911 case TGSI_OPCODE_TXL2
:
4914 case TGSI_OPCODE_TXD
:
4917 case TGSI_OPCODE_TG4
:
4918 name
= "llvm.SI.gather4";
4926 /* Add the type and suffixes .c, .o if needed. */
4927 build_type_name_for_intr(LLVMTypeOf(emit_data
->args
[0]), type
, sizeof(type
));
4928 sprintf(intr_name
, "%s%s%s%s.%s",
4929 name
, is_shadow
? ".c" : "", infix
,
4930 has_offset
? ".o" : "", type
);
4932 /* The hardware needs special lowering for Gather4 with integer formats. */
4933 if (opcode
== TGSI_OPCODE_TG4
) {
4934 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4935 /* This will also work with non-constant indexing because of how
4936 * glsl_to_tgsi works and we intent to preserve that behavior.
4938 const unsigned src_idx
= 2;
4939 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4941 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4943 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4944 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
) {
4945 /* Texture coordinates start after:
4946 * {offset, bias, z-compare, derivatives}
4947 * Only the offset and z-compare can occur here.
4949 si_lower_gather4_integer(ctx
, emit_data
, intr_name
,
4950 (int)has_offset
+ (int)is_shadow
);
4955 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4956 base
->gallivm
->builder
, intr_name
, emit_data
->dst_type
,
4957 emit_data
->args
, emit_data
->arg_count
,
4958 LP_FUNC_ATTR_READNONE
);
4961 static void si_llvm_emit_txqs(
4962 const struct lp_build_tgsi_action
*action
,
4963 struct lp_build_tgsi_context
*bld_base
,
4964 struct lp_build_emit_data
*emit_data
)
4966 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4967 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4968 LLVMBuilderRef builder
= gallivm
->builder
;
4969 LLVMValueRef res
, samples
;
4970 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4972 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4975 /* Read the samples from the descriptor directly. */
4976 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
4977 samples
= LLVMBuildExtractElement(
4979 lp_build_const_int32(gallivm
, 3), "");
4980 samples
= LLVMBuildLShr(builder
, samples
,
4981 lp_build_const_int32(gallivm
, 16), "");
4982 samples
= LLVMBuildAnd(builder
, samples
,
4983 lp_build_const_int32(gallivm
, 0xf), "");
4984 samples
= LLVMBuildShl(builder
, lp_build_const_int32(gallivm
, 1),
4987 emit_data
->output
[emit_data
->chan
] = samples
;
4991 * SI implements derivatives using the local data store (LDS)
4992 * All writes to the LDS happen in all executing threads at
4993 * the same time. TID is the Thread ID for the current
4994 * thread and is a value between 0 and 63, representing
4995 * the thread's position in the wavefront.
4997 * For the pixel shader threads are grouped into quads of four pixels.
4998 * The TIDs of the pixels of a quad are:
5006 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
5007 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
5008 * the current pixel's column, and masking with 0xfffffffe yields the TID
5009 * of the left pixel of the current pixel's row.
5011 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
5012 * adding 2 yields the TID of the pixel below the top pixel.
5014 /* masks for thread ID. */
5015 #define TID_MASK_TOP_LEFT 0xfffffffc
5016 #define TID_MASK_TOP 0xfffffffd
5017 #define TID_MASK_LEFT 0xfffffffe
5019 static void si_llvm_emit_ddxy(
5020 const struct lp_build_tgsi_action
*action
,
5021 struct lp_build_tgsi_context
*bld_base
,
5022 struct lp_build_emit_data
*emit_data
)
5024 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5025 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5026 unsigned opcode
= emit_data
->info
->opcode
;
5027 LLVMValueRef thread_id
, tl
, trbl
, tl_tid
, trbl_tid
, val
, args
[2];
5031 thread_id
= get_thread_id(ctx
);
5033 if (opcode
== TGSI_OPCODE_DDX_FINE
)
5034 mask
= TID_MASK_LEFT
;
5035 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
5036 mask
= TID_MASK_TOP
;
5038 mask
= TID_MASK_TOP_LEFT
;
5040 tl_tid
= LLVMBuildAnd(gallivm
->builder
, thread_id
,
5041 lp_build_const_int32(gallivm
, mask
), "");
5043 /* for DDX we want to next X pixel, DDY next Y pixel. */
5044 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
5045 trbl_tid
= LLVMBuildAdd(gallivm
->builder
, tl_tid
,
5046 lp_build_const_int32(gallivm
, idx
), "");
5048 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
5050 if (ctx
->screen
->has_ds_bpermute
) {
5051 args
[0] = LLVMBuildMul(gallivm
->builder
, tl_tid
,
5052 lp_build_const_int32(gallivm
, 4), "");
5054 tl
= lp_build_intrinsic(gallivm
->builder
,
5055 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5056 args
, 2, LP_FUNC_ATTR_READNONE
);
5058 args
[0] = LLVMBuildMul(gallivm
->builder
, trbl_tid
,
5059 lp_build_const_int32(gallivm
, 4), "");
5060 trbl
= lp_build_intrinsic(gallivm
->builder
,
5061 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5062 args
, 2, LP_FUNC_ATTR_READNONE
);
5064 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
5066 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
5067 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
5068 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
5070 LLVMBuildStore(gallivm
->builder
, val
, store_ptr
);
5071 tl
= LLVMBuildLoad(gallivm
->builder
, load_ptr0
, "");
5072 trbl
= LLVMBuildLoad(gallivm
->builder
, load_ptr1
, "");
5075 tl
= LLVMBuildBitCast(gallivm
->builder
, tl
, ctx
->f32
, "");
5076 trbl
= LLVMBuildBitCast(gallivm
->builder
, trbl
, ctx
->f32
, "");
5078 emit_data
->output
[emit_data
->chan
] =
5079 LLVMBuildFSub(gallivm
->builder
, trbl
, tl
, "");
5083 * this takes an I,J coordinate pair,
5084 * and works out the X and Y derivatives.
5085 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
5087 static LLVMValueRef
si_llvm_emit_ddxy_interp(
5088 struct lp_build_tgsi_context
*bld_base
,
5089 LLVMValueRef interp_ij
)
5091 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5092 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5093 LLVMValueRef result
[4], a
;
5096 for (i
= 0; i
< 2; i
++) {
5097 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
5098 LLVMConstInt(ctx
->i32
, i
, 0), "");
5099 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
5100 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
5103 return lp_build_gather_values(gallivm
, result
, 4);
5106 static void interp_fetch_args(
5107 struct lp_build_tgsi_context
*bld_base
,
5108 struct lp_build_emit_data
*emit_data
)
5110 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5111 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5112 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5114 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
5115 /* offset is in second src, first two channels */
5116 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
5119 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
5122 emit_data
->arg_count
= 2;
5123 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5124 LLVMValueRef sample_position
;
5125 LLVMValueRef sample_id
;
5126 LLVMValueRef halfval
= lp_build_const_float(gallivm
, 0.5f
);
5128 /* fetch sample ID, then fetch its sample position,
5129 * and place into first two channels.
5131 sample_id
= lp_build_emit_fetch(bld_base
,
5132 emit_data
->inst
, 1, TGSI_CHAN_X
);
5133 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
5135 sample_position
= load_sample_position(ctx
, sample_id
);
5137 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5139 lp_build_const_int32(gallivm
, 0), "");
5141 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5142 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5144 lp_build_const_int32(gallivm
, 1), "");
5145 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5146 emit_data
->arg_count
= 2;
5150 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5151 struct lp_build_tgsi_context
*bld_base
,
5152 struct lp_build_emit_data
*emit_data
)
5154 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5155 struct si_shader
*shader
= ctx
->shader
;
5156 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5157 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5158 LLVMValueRef interp_param
;
5159 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5160 int input_index
= inst
->Src
[0].Register
.Index
;
5163 LLVMValueRef attr_number
;
5164 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5165 int interp_param_idx
;
5166 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5169 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5171 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5172 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5173 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5175 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5177 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5178 if (interp_param_idx
== -1)
5180 else if (interp_param_idx
)
5181 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5183 interp_param
= NULL
;
5185 attr_number
= lp_build_const_int32(gallivm
, input_index
);
5187 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5188 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5189 LLVMValueRef ij_out
[2];
5190 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5193 * take the I then J parameters, and the DDX/Y for it, and
5194 * calculate the IJ inputs for the interpolator.
5195 * temp1 = ddx * offset/sample.x + I;
5196 * interp_param.I = ddy * offset/sample.y + temp1;
5197 * temp1 = ddx * offset/sample.x + J;
5198 * interp_param.J = ddy * offset/sample.y + temp1;
5200 for (i
= 0; i
< 2; i
++) {
5201 LLVMValueRef ix_ll
= lp_build_const_int32(gallivm
, i
);
5202 LLVMValueRef iy_ll
= lp_build_const_int32(gallivm
, i
+ 2);
5203 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5204 ddxy_out
, ix_ll
, "");
5205 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5206 ddxy_out
, iy_ll
, "");
5207 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5208 interp_param
, ix_ll
, "");
5209 LLVMValueRef temp1
, temp2
;
5211 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5214 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5216 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5218 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5220 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5222 interp_param
= lp_build_gather_values(bld_base
->base
.gallivm
, ij_out
, 2);
5225 for (chan
= 0; chan
< 4; chan
++) {
5226 LLVMValueRef llvm_chan
;
5229 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5230 llvm_chan
= lp_build_const_int32(gallivm
, schan
);
5233 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
5234 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
5235 LLVMValueRef i
= LLVMBuildExtractElement(
5236 gallivm
->builder
, interp_param
, uint
->zero
, "");
5237 LLVMValueRef j
= LLVMBuildExtractElement(
5238 gallivm
->builder
, interp_param
, uint
->one
, "");
5239 emit_data
->output
[chan
] = build_fs_interp(bld_base
,
5240 llvm_chan
, attr_number
, params
,
5243 emit_data
->output
[chan
] = build_fs_interp_mov(bld_base
,
5244 lp_build_const_int32(gallivm
, 2), /* P0 */
5245 llvm_chan
, attr_number
, params
);
5250 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5251 struct lp_build_emit_data
*emit_data
)
5253 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
5254 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5257 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5259 stream
= LLVMConstIntGetZExtValue(imms
[src0
.Index
][src0
.SwizzleX
]) & 0x3;
5263 /* Emit one vertex from the geometry shader */
5264 static void si_llvm_emit_vertex(
5265 const struct lp_build_tgsi_action
*action
,
5266 struct lp_build_tgsi_context
*bld_base
,
5267 struct lp_build_emit_data
*emit_data
)
5269 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5270 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5271 struct si_shader
*shader
= ctx
->shader
;
5272 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5273 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5274 struct lp_build_if_state if_state
;
5275 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5276 SI_PARAM_GS2VS_OFFSET
);
5277 LLVMValueRef gs_next_vertex
;
5278 LLVMValueRef can_emit
, kill
;
5279 LLVMValueRef args
[2];
5280 unsigned chan
, offset
;
5284 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5286 /* Write vertex attribute values to GSVS ring */
5287 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5288 ctx
->gs_next_vertex
[stream
],
5291 /* If this thread has already emitted the declared maximum number of
5292 * vertices, skip the write: excessive vertex emissions are not
5293 * supposed to have any effect.
5295 * If the shader has no writes to memory, kill it instead. This skips
5296 * further memory loads and may allow LLVM to skip to the end
5299 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
5300 lp_build_const_int32(gallivm
,
5301 shader
->selector
->gs_max_out_vertices
), "");
5303 bool use_kill
= !info
->writes_memory
;
5305 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5306 lp_build_const_float(gallivm
, 1.0f
),
5307 lp_build_const_float(gallivm
, -1.0f
));
5309 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
5310 ctx
->voidt
, &kill
, 1, 0);
5312 lp_build_if(&if_state
, gallivm
, can_emit
);
5316 for (i
= 0; i
< info
->num_outputs
; i
++) {
5317 LLVMValueRef
*out_ptr
=
5318 ctx
->soa
.outputs
[i
];
5320 for (chan
= 0; chan
< 4; chan
++) {
5321 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
5322 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
5325 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5326 LLVMValueRef voffset
=
5327 lp_build_const_int32(gallivm
, offset
*
5328 shader
->selector
->gs_max_out_vertices
);
5331 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5332 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5334 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5336 build_tbuffer_store(ctx
,
5337 ctx
->gsvs_ring
[stream
],
5339 voffset
, soffset
, 0,
5340 V_008F0C_BUF_DATA_FORMAT_32
,
5341 V_008F0C_BUF_NUM_FORMAT_UINT
,
5346 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5347 lp_build_const_int32(gallivm
, 1));
5349 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5351 /* Signal vertex emission */
5352 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (stream
<< 8));
5353 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5354 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5355 ctx
->voidt
, args
, 2, 0);
5358 lp_build_endif(&if_state
);
5361 /* Cut one primitive from the geometry shader */
5362 static void si_llvm_emit_primitive(
5363 const struct lp_build_tgsi_action
*action
,
5364 struct lp_build_tgsi_context
*bld_base
,
5365 struct lp_build_emit_data
*emit_data
)
5367 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5368 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5369 LLVMValueRef args
[2];
5372 /* Signal primitive cut */
5373 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5374 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (stream
<< 8));
5375 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5376 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5377 ctx
->voidt
, args
, 2, 0);
5380 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5381 struct lp_build_tgsi_context
*bld_base
,
5382 struct lp_build_emit_data
*emit_data
)
5384 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5385 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5387 /* The real barrier instruction isn’t needed, because an entire patch
5388 * always fits into a single wave.
5390 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5391 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
5395 lp_build_intrinsic(gallivm
->builder
,
5396 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5397 : "llvm.AMDGPU.barrier.local",
5398 ctx
->voidt
, NULL
, 0, 0);
5401 static const struct lp_build_tgsi_action tex_action
= {
5402 .fetch_args
= tex_fetch_args
,
5403 .emit
= build_tex_intrinsic
,
5406 static const struct lp_build_tgsi_action interp_action
= {
5407 .fetch_args
= interp_fetch_args
,
5408 .emit
= build_interp_intrinsic
,
5411 static void si_create_function(struct si_shader_context
*ctx
,
5413 LLVMTypeRef
*returns
, unsigned num_returns
,
5414 LLVMTypeRef
*params
, unsigned num_params
,
5419 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5420 params
, num_params
);
5421 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5422 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5424 for (i
= 0; i
<= last_sgpr
; ++i
) {
5425 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5427 /* The combination of:
5431 * allows the optimization passes to move loads and reduces
5432 * SGPR spilling significantly.
5434 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5435 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5436 lp_add_attr_dereferenceable(P
, UINT64_MAX
);
5438 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5441 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5442 /* These were copied from some LLVM test. */
5443 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5444 "less-precise-fpmad",
5446 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5449 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5452 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5458 static void create_meta_data(struct si_shader_context
*ctx
)
5460 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
5462 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5463 "invariant.load", 14);
5464 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5466 ctx
->uniform_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5467 "amdgpu.uniform", 14);
5469 ctx
->empty_md
= LLVMMDNodeInContext(gallivm
->context
, NULL
, 0);
5472 static void declare_streamout_params(struct si_shader_context
*ctx
,
5473 struct pipe_stream_output_info
*so
,
5474 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5475 unsigned *num_params
)
5479 /* Streamout SGPRs. */
5480 if (so
->num_outputs
) {
5481 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5482 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5484 ctx
->param_streamout_config
= ctx
->param_tess_offchip
;
5486 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5488 /* A streamout buffer offset is loaded if the stride is non-zero. */
5489 for (i
= 0; i
< 4; i
++) {
5493 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5497 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5499 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5502 case LLVMIntegerTypeKind
:
5503 return LLVMGetIntTypeWidth(type
) / 8;
5504 case LLVMFloatTypeKind
:
5506 case LLVMPointerTypeKind
:
5508 case LLVMVectorTypeKind
:
5509 return LLVMGetVectorSize(type
) *
5510 llvm_get_type_size(LLVMGetElementType(type
));
5511 case LLVMArrayTypeKind
:
5512 return LLVMGetArrayLength(type
) *
5513 llvm_get_type_size(LLVMGetElementType(type
));
5520 static void declare_tess_lds(struct si_shader_context
*ctx
)
5522 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5523 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5524 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5526 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5527 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, uint
->zero
,
5528 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5532 static unsigned si_get_max_workgroup_size(struct si_shader
*shader
)
5534 const unsigned *properties
= shader
->selector
->info
.properties
;
5535 unsigned max_work_group_size
=
5536 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5537 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5538 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5540 if (!max_work_group_size
) {
5541 /* This is a variable group size compute shader,
5542 * compile it for the maximum possible group size.
5544 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5546 return max_work_group_size
;
5549 static void create_function(struct si_shader_context
*ctx
)
5551 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5552 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5553 struct si_shader
*shader
= ctx
->shader
;
5554 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_NUM_VERTEX_BUFFERS
], v3i32
;
5555 LLVMTypeRef returns
[16+32*4];
5556 unsigned i
, last_sgpr
, num_params
, num_return_sgprs
;
5557 unsigned num_returns
= 0;
5558 unsigned num_prolog_vgprs
= 0;
5560 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5562 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5563 params
[SI_PARAM_CONST_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5564 params
[SI_PARAM_SAMPLERS
] = const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5565 params
[SI_PARAM_IMAGES
] = const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5566 params
[SI_PARAM_SHADER_BUFFERS
] = const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5568 switch (ctx
->type
) {
5569 case PIPE_SHADER_VERTEX
:
5570 params
[SI_PARAM_VERTEX_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_VERTEX_BUFFERS
);
5571 params
[SI_PARAM_BASE_VERTEX
] = ctx
->i32
;
5572 params
[SI_PARAM_START_INSTANCE
] = ctx
->i32
;
5573 params
[SI_PARAM_DRAWID
] = ctx
->i32
;
5574 num_params
= SI_PARAM_DRAWID
+1;
5576 if (shader
->key
.as_es
) {
5577 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5578 } else if (shader
->key
.as_ls
) {
5579 params
[SI_PARAM_LS_OUT_LAYOUT
] = ctx
->i32
;
5580 num_params
= SI_PARAM_LS_OUT_LAYOUT
+1;
5582 if (shader
->is_gs_copy_shader
) {
5583 num_params
= SI_PARAM_RW_BUFFERS
+1;
5585 params
[SI_PARAM_VS_STATE_BITS
] = ctx
->i32
;
5586 num_params
= SI_PARAM_VS_STATE_BITS
+1;
5589 /* The locations of the other parameters are assigned dynamically. */
5590 declare_streamout_params(ctx
, &shader
->selector
->so
,
5591 params
, ctx
->i32
, &num_params
);
5594 last_sgpr
= num_params
-1;
5597 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5598 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5599 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5600 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5602 if (!shader
->is_gs_copy_shader
) {
5603 /* Vertex load indices. */
5604 ctx
->param_vertex_index0
= num_params
;
5606 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5607 params
[num_params
++] = ctx
->i32
;
5609 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5611 /* PrimitiveID output. */
5612 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5613 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5614 returns
[num_returns
++] = ctx
->f32
;
5618 case PIPE_SHADER_TESS_CTRL
:
5619 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5620 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
5621 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
5622 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
5623 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
5624 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
5625 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
5628 params
[SI_PARAM_PATCH_ID
] = ctx
->i32
;
5629 params
[SI_PARAM_REL_IDS
] = ctx
->i32
;
5630 num_params
= SI_PARAM_REL_IDS
+1;
5632 /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are
5633 * placed after the user SGPRs.
5635 for (i
= 0; i
< SI_TCS_NUM_USER_SGPR
+ 2; i
++)
5636 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5638 for (i
= 0; i
< 3; i
++)
5639 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5642 case PIPE_SHADER_TESS_EVAL
:
5643 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5644 num_params
= SI_PARAM_TCS_OFFCHIP_LAYOUT
+1;
5646 if (shader
->key
.as_es
) {
5647 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5648 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5649 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5651 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5652 declare_streamout_params(ctx
, &shader
->selector
->so
,
5653 params
, ctx
->i32
, &num_params
);
5654 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5656 last_sgpr
= num_params
- 1;
5659 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5660 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5661 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5662 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5664 /* PrimitiveID output. */
5665 if (!shader
->key
.as_es
)
5666 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5667 returns
[num_returns
++] = ctx
->f32
;
5670 case PIPE_SHADER_GEOMETRY
:
5671 params
[SI_PARAM_GS2VS_OFFSET
] = ctx
->i32
;
5672 params
[SI_PARAM_GS_WAVE_ID
] = ctx
->i32
;
5673 last_sgpr
= SI_PARAM_GS_WAVE_ID
;
5676 params
[SI_PARAM_VTX0_OFFSET
] = ctx
->i32
;
5677 params
[SI_PARAM_VTX1_OFFSET
] = ctx
->i32
;
5678 params
[SI_PARAM_PRIMITIVE_ID
] = ctx
->i32
;
5679 params
[SI_PARAM_VTX2_OFFSET
] = ctx
->i32
;
5680 params
[SI_PARAM_VTX3_OFFSET
] = ctx
->i32
;
5681 params
[SI_PARAM_VTX4_OFFSET
] = ctx
->i32
;
5682 params
[SI_PARAM_VTX5_OFFSET
] = ctx
->i32
;
5683 params
[SI_PARAM_GS_INSTANCE_ID
] = ctx
->i32
;
5684 num_params
= SI_PARAM_GS_INSTANCE_ID
+1;
5687 case PIPE_SHADER_FRAGMENT
:
5688 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5689 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5690 last_sgpr
= SI_PARAM_PRIM_MASK
;
5691 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5692 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5693 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5694 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5695 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5696 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5697 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5698 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5699 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5700 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5701 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5702 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5703 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5704 shader
->info
.face_vgpr_index
= 20;
5705 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5706 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5707 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5708 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5710 /* Color inputs from the prolog. */
5711 if (shader
->selector
->info
.colors_read
) {
5712 unsigned num_color_elements
=
5713 util_bitcount(shader
->selector
->info
.colors_read
);
5715 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5716 for (i
= 0; i
< num_color_elements
; i
++)
5717 params
[num_params
++] = ctx
->f32
;
5719 num_prolog_vgprs
+= num_color_elements
;
5722 /* Outputs for the epilog. */
5723 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5726 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5727 shader
->selector
->info
.writes_z
+
5728 shader
->selector
->info
.writes_stencil
+
5729 shader
->selector
->info
.writes_samplemask
+
5730 1 /* SampleMaskIn */;
5732 num_returns
= MAX2(num_returns
,
5734 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5736 for (i
= 0; i
< num_return_sgprs
; i
++)
5737 returns
[i
] = ctx
->i32
;
5738 for (; i
< num_returns
; i
++)
5739 returns
[i
] = ctx
->f32
;
5742 case PIPE_SHADER_COMPUTE
:
5743 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5744 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5745 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5746 last_sgpr
= SI_PARAM_BLOCK_ID
;
5748 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5749 num_params
= SI_PARAM_THREAD_ID
+ 1;
5752 assert(0 && "unimplemented shader");
5756 assert(num_params
<= ARRAY_SIZE(params
));
5758 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5759 num_params
, last_sgpr
);
5761 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5762 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5763 ctx
->separate_prolog
) {
5764 si_llvm_add_attribute(ctx
->main_fn
,
5765 "InitialPSInputAddr",
5766 S_0286D0_PERSP_SAMPLE_ENA(1) |
5767 S_0286D0_PERSP_CENTER_ENA(1) |
5768 S_0286D0_PERSP_CENTROID_ENA(1) |
5769 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5770 S_0286D0_LINEAR_CENTER_ENA(1) |
5771 S_0286D0_LINEAR_CENTROID_ENA(1) |
5772 S_0286D0_FRONT_FACE_ENA(1) |
5773 S_0286D0_POS_FIXED_PT_ENA(1));
5774 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5775 si_llvm_add_attribute(ctx
->main_fn
,
5776 "amdgpu-max-work-group-size",
5777 si_get_max_workgroup_size(shader
));
5780 shader
->info
.num_input_sgprs
= 0;
5781 shader
->info
.num_input_vgprs
= 0;
5783 for (i
= 0; i
<= last_sgpr
; ++i
)
5784 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5786 for (; i
< num_params
; ++i
)
5787 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5789 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5790 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5792 if (!ctx
->screen
->has_ds_bpermute
&&
5794 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5795 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5796 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5797 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5798 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5799 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5801 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5802 LLVMArrayType(ctx
->i32
, 64),
5806 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5807 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5808 ctx
->type
== PIPE_SHADER_TESS_EVAL
)
5809 declare_tess_lds(ctx
);
5813 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5816 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5818 struct gallivm_state
*gallivm
=
5819 ctx
->soa
.bld_base
.base
.gallivm
;
5821 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5822 SI_PARAM_RW_BUFFERS
);
5824 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5825 ctx
->shader
->key
.as_es
) ||
5826 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5827 ctx
->shader
->key
.as_es
) ||
5828 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5830 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5832 LLVMValueRef offset
= lp_build_const_int32(gallivm
, ring
);
5835 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5838 if (ctx
->shader
->is_gs_copy_shader
) {
5839 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_VS_RING_GSVS
);
5842 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5844 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5846 for (i
= 0; i
< 4; i
++) {
5847 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_GS_RING_GSVS0
+ i
);
5850 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5855 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5856 LLVMValueRef param_rw_buffers
,
5857 unsigned param_pos_fixed_pt
)
5859 struct lp_build_tgsi_context
*bld_base
=
5861 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5862 LLVMBuilderRef builder
= gallivm
->builder
;
5863 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5865 /* Use the fixed-point gl_FragCoord input.
5866 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5867 * per coordinate to get the repeating effect.
5869 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5870 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5872 /* Load the buffer descriptor. */
5873 slot
= lp_build_const_int32(gallivm
, SI_PS_CONST_POLY_STIPPLE
);
5874 desc
= build_indexed_load_const(ctx
, param_rw_buffers
, slot
);
5876 /* The stipple pattern is 32x32, each row has 32 bits. */
5877 offset
= LLVMBuildMul(builder
, address
[1],
5878 LLVMConstInt(ctx
->i32
, 4, 0), "");
5879 row
= buffer_load_const(ctx
, desc
, offset
);
5880 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
5881 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5882 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5884 /* The intrinsic kills the thread if arg < 0. */
5885 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
5886 LLVMConstReal(ctx
->f32
, -1), "");
5887 lp_build_intrinsic(builder
, "llvm.AMDGPU.kill", ctx
->voidt
, &bit
, 1, 0);
5890 void si_shader_binary_read_config(struct radeon_shader_binary
*binary
,
5891 struct si_shader_config
*conf
,
5892 unsigned symbol_offset
)
5895 const unsigned char *config
=
5896 radeon_shader_binary_config_start(binary
, symbol_offset
);
5897 bool really_needs_scratch
= false;
5899 /* LLVM adds SGPR spills to the scratch size.
5900 * Find out if we really need the scratch buffer.
5902 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5903 const struct radeon_shader_reloc
*reloc
= &binary
->relocs
[i
];
5905 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5906 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5907 really_needs_scratch
= true;
5912 /* XXX: We may be able to emit some of these values directly rather than
5913 * extracting fields to be emitted later.
5916 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5917 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5918 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5920 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5921 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5922 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5923 case R_00B848_COMPUTE_PGM_RSRC1
:
5924 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5925 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5926 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5927 conf
->rsrc1
= value
;
5929 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5930 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5932 case R_00B84C_COMPUTE_PGM_RSRC2
:
5933 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5934 conf
->rsrc2
= value
;
5936 case R_0286CC_SPI_PS_INPUT_ENA
:
5937 conf
->spi_ps_input_ena
= value
;
5939 case R_0286D0_SPI_PS_INPUT_ADDR
:
5940 conf
->spi_ps_input_addr
= value
;
5942 case R_0286E8_SPI_TMPRING_SIZE
:
5943 case R_00B860_COMPUTE_TMPRING_SIZE
:
5944 /* WAVESIZE is in units of 256 dwords. */
5945 if (really_needs_scratch
)
5946 conf
->scratch_bytes_per_wave
=
5947 G_00B860_WAVESIZE(value
) * 256 * 4;
5949 case 0x4: /* SPILLED_SGPRS */
5950 conf
->spilled_sgprs
= value
;
5952 case 0x8: /* SPILLED_VGPRS */
5953 conf
->spilled_vgprs
= value
;
5957 static bool printed
;
5960 fprintf(stderr
, "Warning: LLVM emitted unknown "
5961 "config register: 0x%x\n", reg
);
5969 if (!conf
->spi_ps_input_addr
)
5970 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5973 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
5974 struct si_shader
*shader
,
5975 struct si_shader_config
*config
,
5976 uint64_t scratch_va
)
5979 uint32_t scratch_rsrc_dword0
= scratch_va
;
5980 uint32_t scratch_rsrc_dword1
=
5981 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5983 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
5986 if (HAVE_LLVM
>= 0x0309)
5987 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5989 scratch_rsrc_dword1
|=
5990 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
5992 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5993 const struct radeon_shader_reloc
*reloc
=
5994 &shader
->binary
.relocs
[i
];
5995 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5996 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5997 &scratch_rsrc_dword0
, 4);
5998 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5999 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6000 &scratch_rsrc_dword1
, 4);
6005 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
6007 unsigned size
= shader
->binary
.code_size
;
6010 size
+= shader
->prolog
->binary
.code_size
;
6012 size
+= shader
->epilog
->binary
.code_size
;
6016 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
6018 const struct radeon_shader_binary
*prolog
=
6019 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
6020 const struct radeon_shader_binary
*epilog
=
6021 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
6022 const struct radeon_shader_binary
*mainb
= &shader
->binary
;
6023 unsigned bo_size
= si_get_shader_binary_size(shader
) +
6024 (!epilog
? mainb
->rodata_size
: 0);
6027 assert(!prolog
|| !prolog
->rodata_size
);
6028 assert((!prolog
&& !epilog
) || !mainb
->rodata_size
);
6029 assert(!epilog
|| !epilog
->rodata_size
);
6031 r600_resource_reference(&shader
->bo
, NULL
);
6032 shader
->bo
= (struct r600_resource
*)
6033 pipe_buffer_create(&sscreen
->b
.b
, 0,
6034 PIPE_USAGE_IMMUTABLE
, bo_size
);
6039 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
6040 PIPE_TRANSFER_READ_WRITE
);
6043 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
6044 ptr
+= prolog
->code_size
;
6047 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
6048 ptr
+= mainb
->code_size
;
6051 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
6052 else if (mainb
->rodata_size
> 0)
6053 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
6055 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
6059 static void si_shader_dump_disassembly(const struct radeon_shader_binary
*binary
,
6060 struct pipe_debug_callback
*debug
,
6061 const char *name
, FILE *file
)
6066 if (binary
->disasm_string
) {
6067 fprintf(file
, "Shader %s disassembly:\n", name
);
6068 fprintf(file
, "%s", binary
->disasm_string
);
6070 if (debug
&& debug
->debug_message
) {
6071 /* Very long debug messages are cut off, so send the
6072 * disassembly one line at a time. This causes more
6073 * overhead, but on the plus side it simplifies
6074 * parsing of resulting logs.
6076 pipe_debug_message(debug
, SHADER_INFO
,
6077 "Shader Disassembly Begin");
6079 line
= binary
->disasm_string
;
6081 p
= util_strchrnul(line
, '\n');
6085 pipe_debug_message(debug
, SHADER_INFO
,
6086 "%.*s", count
, line
);
6094 pipe_debug_message(debug
, SHADER_INFO
,
6095 "Shader Disassembly End");
6098 fprintf(file
, "Shader %s binary:\n", name
);
6099 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
6100 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
6101 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
6102 binary
->code
[i
+ 1], binary
->code
[i
]);
6107 static void si_shader_dump_stats(struct si_screen
*sscreen
,
6108 struct si_shader
*shader
,
6109 struct pipe_debug_callback
*debug
,
6113 struct si_shader_config
*conf
= &shader
->config
;
6114 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
6115 unsigned code_size
= si_get_shader_binary_size(shader
);
6116 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
6117 unsigned lds_per_wave
= 0;
6118 unsigned max_simd_waves
= 10;
6120 /* Compute LDS usage for PS. */
6121 switch (processor
) {
6122 case PIPE_SHADER_FRAGMENT
:
6123 /* The minimum usage per wave is (num_inputs * 48). The maximum
6124 * usage is (num_inputs * 48 * 16).
6125 * We can get anything in between and it varies between waves.
6127 * The 48 bytes per input for a single primitive is equal to
6128 * 4 bytes/component * 4 components/input * 3 points.
6130 * Other stages don't know the size at compile time or don't
6131 * allocate LDS per wave, but instead they do it per thread group.
6133 lds_per_wave
= conf
->lds_size
* lds_increment
+
6134 align(num_inputs
* 48, lds_increment
);
6136 case PIPE_SHADER_COMPUTE
:
6137 if (shader
->selector
) {
6138 unsigned max_workgroup_size
=
6139 si_get_max_workgroup_size(shader
);
6140 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
6141 DIV_ROUND_UP(max_workgroup_size
, 64);
6146 /* Compute the per-SIMD wave counts. */
6147 if (conf
->num_sgprs
) {
6148 if (sscreen
->b
.chip_class
>= VI
)
6149 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
6151 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
6154 if (conf
->num_vgprs
)
6155 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
6157 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
6158 * 16KB makes some SIMDs unoccupied). */
6160 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
6162 if (file
!= stderr
||
6163 r600_can_dump_shader(&sscreen
->b
, processor
)) {
6164 if (processor
== PIPE_SHADER_FRAGMENT
) {
6165 fprintf(file
, "*** SHADER CONFIG ***\n"
6166 "SPI_PS_INPUT_ADDR = 0x%04x\n"
6167 "SPI_PS_INPUT_ENA = 0x%04x\n",
6168 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
6171 fprintf(file
, "*** SHADER STATS ***\n"
6174 "Spilled SGPRs: %d\n"
6175 "Spilled VGPRs: %d\n"
6176 "Private memory VGPRs: %d\n"
6177 "Code Size: %d bytes\n"
6179 "Scratch: %d bytes per wave\n"
6181 "********************\n\n\n",
6182 conf
->num_sgprs
, conf
->num_vgprs
,
6183 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
6184 conf
->private_mem_vgprs
, code_size
,
6185 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6189 pipe_debug_message(debug
, SHADER_INFO
,
6190 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6191 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6192 "Spilled VGPRs: %d PrivMem VGPRs: %d",
6193 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6194 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6195 max_simd_waves
, conf
->spilled_sgprs
,
6196 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
6199 static const char *si_get_shader_name(struct si_shader
*shader
,
6202 switch (processor
) {
6203 case PIPE_SHADER_VERTEX
:
6204 if (shader
->key
.as_es
)
6205 return "Vertex Shader as ES";
6206 else if (shader
->key
.as_ls
)
6207 return "Vertex Shader as LS";
6209 return "Vertex Shader as VS";
6210 case PIPE_SHADER_TESS_CTRL
:
6211 return "Tessellation Control Shader";
6212 case PIPE_SHADER_TESS_EVAL
:
6213 if (shader
->key
.as_es
)
6214 return "Tessellation Evaluation Shader as ES";
6216 return "Tessellation Evaluation Shader as VS";
6217 case PIPE_SHADER_GEOMETRY
:
6218 if (shader
->is_gs_copy_shader
)
6219 return "GS Copy Shader as VS";
6221 return "Geometry Shader";
6222 case PIPE_SHADER_FRAGMENT
:
6223 return "Pixel Shader";
6224 case PIPE_SHADER_COMPUTE
:
6225 return "Compute Shader";
6227 return "Unknown Shader";
6231 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6232 struct pipe_debug_callback
*debug
, unsigned processor
,
6235 if (file
!= stderr
||
6236 r600_can_dump_shader(&sscreen
->b
, processor
))
6237 si_dump_shader_key(processor
, &shader
->key
, file
);
6239 if (file
!= stderr
&& shader
->binary
.llvm_ir_string
) {
6240 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6241 si_get_shader_name(shader
, processor
));
6242 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6245 if (file
!= stderr
||
6246 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6247 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6248 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6251 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6252 debug
, "prolog", file
);
6254 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6257 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6258 debug
, "epilog", file
);
6259 fprintf(file
, "\n");
6262 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
);
6265 int si_compile_llvm(struct si_screen
*sscreen
,
6266 struct radeon_shader_binary
*binary
,
6267 struct si_shader_config
*conf
,
6268 LLVMTargetMachineRef tm
,
6270 struct pipe_debug_callback
*debug
,
6275 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6277 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6278 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6280 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6281 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6282 LLVMDumpModule(mod
);
6283 fprintf(stderr
, "\n");
6287 if (sscreen
->record_llvm_ir
) {
6288 char *ir
= LLVMPrintModuleToString(mod
);
6289 binary
->llvm_ir_string
= strdup(ir
);
6290 LLVMDisposeMessage(ir
);
6293 if (!si_replace_shader(count
, binary
)) {
6294 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6299 si_shader_binary_read_config(binary
, conf
, 0);
6301 /* Enable 64-bit and 16-bit denormals, because there is no performance
6304 * If denormals are enabled, all floating-point output modifiers are
6307 * Don't enable denormals for 32-bit floats, because:
6308 * - Floating-point output modifiers would be ignored by the hw.
6309 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6310 * have to stop using those.
6311 * - SI & CI would be very slow.
6313 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6315 FREE(binary
->config
);
6316 FREE(binary
->global_symbol_offsets
);
6317 binary
->config
= NULL
;
6318 binary
->global_symbol_offsets
= NULL
;
6320 /* Some shaders can't have rodata because their binaries can be
6323 if (binary
->rodata_size
&&
6324 (processor
== PIPE_SHADER_VERTEX
||
6325 processor
== PIPE_SHADER_TESS_CTRL
||
6326 processor
== PIPE_SHADER_TESS_EVAL
||
6327 processor
== PIPE_SHADER_FRAGMENT
)) {
6328 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6335 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6337 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6338 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6340 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6343 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6345 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6346 LLVMTargetMachineRef tm
,
6347 struct si_shader_selector
*gs_selector
,
6348 struct pipe_debug_callback
*debug
)
6350 struct si_shader_context ctx
;
6351 struct si_shader
*shader
;
6352 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6353 LLVMBuilderRef builder
;
6354 struct lp_build_tgsi_context
*bld_base
= &ctx
.soa
.bld_base
;
6355 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6356 struct si_shader_output_values
*outputs
;
6357 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6358 LLVMValueRef args
[9];
6361 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6366 shader
= CALLOC_STRUCT(si_shader
);
6373 shader
->selector
= gs_selector
;
6374 shader
->is_gs_copy_shader
= true;
6376 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
6377 ctx
.type
= PIPE_SHADER_VERTEX
;
6379 builder
= gallivm
->builder
;
6381 create_meta_data(&ctx
);
6382 create_function(&ctx
);
6383 preload_ring_buffers(&ctx
);
6385 args
[0] = ctx
.gsvs_ring
[0];
6386 args
[1] = lp_build_mul_imm(uint
,
6387 LLVMGetParam(ctx
.main_fn
,
6388 ctx
.param_vertex_id
),
6390 args
[3] = uint
->zero
;
6391 args
[4] = uint
->one
; /* OFFEN */
6392 args
[5] = uint
->zero
; /* IDXEN */
6393 args
[6] = uint
->one
; /* GLC */
6394 args
[7] = uint
->one
; /* SLC */
6395 args
[8] = uint
->zero
; /* TFE */
6397 /* Fetch the vertex stream ID.*/
6398 LLVMValueRef stream_id
;
6400 if (gs_selector
->so
.num_outputs
)
6401 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
6403 stream_id
= uint
->zero
;
6405 /* Fill in output information. */
6406 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6407 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
6408 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
6410 for (int chan
= 0; chan
< 4; chan
++) {
6411 outputs
[i
].vertex_stream
[chan
] =
6412 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
6416 LLVMBasicBlockRef end_bb
;
6417 LLVMValueRef switch_inst
;
6419 end_bb
= LLVMAppendBasicBlockInContext(gallivm
->context
, ctx
.main_fn
, "end");
6420 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
6422 for (int stream
= 0; stream
< 4; stream
++) {
6423 LLVMBasicBlockRef bb
;
6426 if (!gsinfo
->num_stream_output_components
[stream
])
6429 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
6432 bb
= LLVMInsertBasicBlockInContext(gallivm
->context
, end_bb
, "out");
6433 LLVMAddCase(switch_inst
, lp_build_const_int32(gallivm
, stream
), bb
);
6434 LLVMPositionBuilderAtEnd(builder
, bb
);
6436 /* Fetch vertex data from GSVS ring */
6438 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6439 for (unsigned chan
= 0; chan
< 4; chan
++) {
6440 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
6441 outputs
[i
].vertex_stream
[chan
] != stream
) {
6442 outputs
[i
].values
[chan
] = ctx
.soa
.bld_base
.base
.undef
;
6446 args
[2] = lp_build_const_int32(
6448 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4);
6451 outputs
[i
].values
[chan
] =
6452 LLVMBuildBitCast(gallivm
->builder
,
6453 lp_build_intrinsic(gallivm
->builder
,
6454 "llvm.SI.buffer.load.dword.i32.i32",
6456 LP_FUNC_ATTR_READONLY
),
6461 /* Streamout and exports. */
6462 if (gs_selector
->so
.num_outputs
) {
6463 si_llvm_emit_streamout(&ctx
, outputs
,
6464 gsinfo
->num_outputs
,
6469 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6471 LLVMBuildBr(builder
, end_bb
);
6474 LLVMPositionBuilderAtEnd(builder
, end_bb
);
6476 LLVMBuildRetVoid(gallivm
->builder
);
6478 /* Dump LLVM IR before any optimization passes */
6479 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6480 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6481 LLVMDumpModule(bld_base
->base
.gallivm
->module
);
6483 si_llvm_finalize_module(&ctx
,
6484 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6486 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6487 &ctx
.shader
->config
, ctx
.tm
,
6488 bld_base
->base
.gallivm
->module
,
6489 debug
, PIPE_SHADER_GEOMETRY
,
6492 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6493 fprintf(stderr
, "GS Copy Shader:\n");
6494 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6495 PIPE_SHADER_GEOMETRY
, stderr
);
6496 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6499 si_llvm_dispose(&ctx
);
6510 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
6515 fprintf(f
, "SHADER KEY\n");
6518 case PIPE_SHADER_VERTEX
:
6519 fprintf(f
, " part.vs.prolog.instance_divisors = {");
6520 for (i
= 0; i
< ARRAY_SIZE(key
->part
.vs
.prolog
.instance_divisors
); i
++)
6521 fprintf(f
, !i
? "%u" : ", %u",
6522 key
->part
.vs
.prolog
.instance_divisors
[i
]);
6524 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n", key
->part
.vs
.epilog
.export_prim_id
);
6525 fprintf(f
, " as_es = %u\n", key
->as_es
);
6526 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6527 fprintf(f
, " mono.vs.fix_fetch = 0x%x\n", key
->mono
.vs
.fix_fetch
);
6530 case PIPE_SHADER_TESS_CTRL
:
6531 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6532 fprintf(f
, " mono.tcs.inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.tcs
.inputs_to_copy
);
6535 case PIPE_SHADER_TESS_EVAL
:
6536 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6537 fprintf(f
, " as_es = %u\n", key
->as_es
);
6540 case PIPE_SHADER_GEOMETRY
:
6541 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6544 case PIPE_SHADER_COMPUTE
:
6547 case PIPE_SHADER_FRAGMENT
:
6548 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6549 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6550 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6551 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6552 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6553 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6554 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6555 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6556 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6557 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6558 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6559 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6560 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6561 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6562 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6563 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6570 if ((shader
== PIPE_SHADER_GEOMETRY
||
6571 shader
== PIPE_SHADER_TESS_EVAL
||
6572 shader
== PIPE_SHADER_VERTEX
) &&
6573 !key
->as_es
&& !key
->as_ls
) {
6574 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6575 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6576 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6580 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6581 struct si_screen
*sscreen
,
6582 struct si_shader
*shader
,
6583 LLVMTargetMachineRef tm
)
6585 struct lp_build_tgsi_context
*bld_base
;
6586 struct lp_build_tgsi_action tmpl
= {};
6588 si_llvm_context_init(ctx
, sscreen
, shader
, tm
,
6589 (shader
&& shader
->selector
) ? &shader
->selector
->info
: NULL
,
6590 (shader
&& shader
->selector
) ? shader
->selector
->tokens
: NULL
);
6592 bld_base
= &ctx
->soa
.bld_base
;
6593 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6595 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6596 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6597 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6599 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6600 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6601 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6602 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6603 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6604 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6605 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6606 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6607 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6608 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6609 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6610 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6611 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6612 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6614 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6615 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6616 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6617 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6618 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6619 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6621 tmpl
.fetch_args
= atomic_fetch_args
;
6622 tmpl
.emit
= atomic_emit
;
6623 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6624 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6625 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6626 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6627 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6628 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6629 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6630 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6631 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6632 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6633 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6634 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6635 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6636 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6637 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6638 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6639 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6640 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6641 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6642 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6644 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6646 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6647 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6648 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6649 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6651 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6652 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6653 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6656 /* Return true if the PARAM export has been eliminated. */
6657 static bool si_eliminate_const_output(struct si_shader_context
*ctx
,
6658 LLVMValueRef inst
, unsigned offset
)
6660 struct si_shader
*shader
= ctx
->shader
;
6661 unsigned num_outputs
= shader
->selector
->info
.num_outputs
;
6662 unsigned i
, default_val
; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
6663 bool is_zero
[4] = {}, is_one
[4] = {};
6665 for (i
= 0; i
< 4; i
++) {
6666 LLVMBool loses_info
;
6667 LLVMValueRef p
= LLVMGetOperand(inst
, 5 + i
);
6669 /* It's a constant expression. Undef outputs are eliminated too. */
6670 if (LLVMIsUndef(p
)) {
6673 } else if (LLVMIsAConstantFP(p
)) {
6674 double a
= LLVMConstRealGetDouble(p
, &loses_info
);
6681 return false; /* other constant */
6686 /* Only certain combinations of 0 and 1 can be eliminated. */
6687 if (is_zero
[0] && is_zero
[1] && is_zero
[2])
6688 default_val
= is_zero
[3] ? 0 : 1;
6689 else if (is_one
[0] && is_one
[1] && is_one
[2])
6690 default_val
= is_zero
[3] ? 2 : 3;
6694 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
6695 LLVMInstructionEraseFromParent(inst
);
6697 /* Change OFFSET to DEFAULT_VAL. */
6698 for (i
= 0; i
< num_outputs
; i
++) {
6699 if (shader
->info
.vs_output_param_offset
[i
] == offset
) {
6700 shader
->info
.vs_output_param_offset
[i
] =
6701 EXP_PARAM_DEFAULT_VAL_0000
+ default_val
;
6708 struct si_vs_exports
{
6710 unsigned offset
[SI_MAX_VS_OUTPUTS
];
6711 LLVMValueRef inst
[SI_MAX_VS_OUTPUTS
];
6714 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6716 struct si_shader
*shader
= ctx
->shader
;
6717 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6718 LLVMBasicBlockRef bb
;
6719 struct si_vs_exports exports
;
6720 bool removed_any
= false;
6724 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6725 ctx
->type
== PIPE_SHADER_COMPUTE
||
6726 shader
->key
.as_es
||
6730 /* Process all LLVM instructions. */
6731 bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6733 LLVMValueRef inst
= LLVMGetFirstInstruction(bb
);
6736 LLVMValueRef cur
= inst
;
6737 inst
= LLVMGetNextInstruction(inst
);
6739 if (LLVMGetInstructionOpcode(cur
) != LLVMCall
)
6742 LLVMValueRef callee
= lp_get_called_value(cur
);
6744 if (!lp_is_function(callee
))
6747 const char *name
= LLVMGetValueName(callee
);
6748 unsigned num_args
= LLVMCountParams(callee
);
6750 /* Check if this is an export instruction. */
6751 if (num_args
!= 9 || strcmp(name
, "llvm.SI.export"))
6754 LLVMValueRef arg
= LLVMGetOperand(cur
, 3);
6755 unsigned target
= LLVMConstIntGetZExtValue(arg
);
6757 if (target
< V_008DFC_SQ_EXP_PARAM
)
6760 target
-= V_008DFC_SQ_EXP_PARAM
;
6762 /* Eliminate constant value PARAM exports. */
6763 if (si_eliminate_const_output(ctx
, cur
, target
)) {
6766 exports
.offset
[exports
.num
] = target
;
6767 exports
.inst
[exports
.num
] = cur
;
6771 bb
= LLVMGetNextBasicBlock(bb
);
6774 /* Remove holes in export memory due to removed PARAM exports.
6775 * This is done by renumbering all PARAM exports.
6778 ubyte current_offset
[SI_MAX_VS_OUTPUTS
];
6779 unsigned new_count
= 0;
6782 /* Make a copy of the offsets. We need the old version while
6783 * we are modifying some of them. */
6784 assert(sizeof(current_offset
) ==
6785 sizeof(shader
->info
.vs_output_param_offset
));
6786 memcpy(current_offset
, shader
->info
.vs_output_param_offset
,
6787 sizeof(current_offset
));
6789 for (i
= 0; i
< exports
.num
; i
++) {
6790 unsigned offset
= exports
.offset
[i
];
6792 for (out
= 0; out
< info
->num_outputs
; out
++) {
6793 if (current_offset
[out
] != offset
)
6796 LLVMSetOperand(exports
.inst
[i
], 3,
6797 LLVMConstInt(ctx
->i32
,
6798 V_008DFC_SQ_EXP_PARAM
+ new_count
, 0));
6799 shader
->info
.vs_output_param_offset
[out
] = new_count
;
6804 shader
->info
.nr_param_exports
= new_count
;
6808 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
6810 ctx
->shader
->config
.private_mem_vgprs
= 0;
6812 /* Process all LLVM instructions. */
6813 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6815 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
6818 LLVMValueRef inst
= next
;
6819 next
= LLVMGetNextInstruction(next
);
6821 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
6824 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
6825 /* No idea why LLVM aligns allocas to 4 elements. */
6826 unsigned alignment
= LLVMGetAlignment(inst
);
6827 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
6828 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
6830 bb
= LLVMGetNextBasicBlock(bb
);
6834 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6835 struct si_shader
*shader
)
6837 struct si_shader_selector
*sel
= shader
->selector
;
6838 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
6840 switch (ctx
->type
) {
6841 case PIPE_SHADER_VERTEX
:
6842 ctx
->load_input
= declare_input_vs
;
6843 if (shader
->key
.as_ls
)
6844 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6845 else if (shader
->key
.as_es
)
6846 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6848 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6850 case PIPE_SHADER_TESS_CTRL
:
6851 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6852 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6853 bld_base
->emit_store
= store_output_tcs
;
6854 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
6856 case PIPE_SHADER_TESS_EVAL
:
6857 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6858 if (shader
->key
.as_es
)
6859 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6861 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6863 case PIPE_SHADER_GEOMETRY
:
6864 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6865 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
6867 case PIPE_SHADER_FRAGMENT
:
6868 ctx
->load_input
= declare_input_fs
;
6869 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
6871 case PIPE_SHADER_COMPUTE
:
6872 ctx
->declare_memory_region
= declare_compute_memory
;
6875 assert(!"Unsupported shader type");
6879 create_meta_data(ctx
);
6880 create_function(ctx
);
6881 preload_ring_buffers(ctx
);
6883 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6885 for (i
= 0; i
< 4; i
++) {
6886 ctx
->gs_next_vertex
[i
] =
6887 lp_build_alloca(bld_base
->base
.gallivm
,
6892 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6893 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6897 si_llvm_build_ret(ctx
, ctx
->return_value
);
6902 * Compute the VS prolog key, which contains all the information needed to
6903 * build the VS prolog function, and set shader->info bits where needed.
6905 static void si_get_vs_prolog_key(struct si_shader
*shader
,
6906 union si_shader_part_key
*key
)
6908 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6910 memset(key
, 0, sizeof(*key
));
6911 key
->vs_prolog
.states
= shader
->key
.part
.vs
.prolog
;
6912 key
->vs_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6913 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6915 /* Set the instanceID flag. */
6916 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
6917 if (key
->vs_prolog
.states
.instance_divisors
[i
])
6918 shader
->info
.uses_instanceid
= true;
6922 * Compute the VS epilog key, which contains all the information needed to
6923 * build the VS epilog function, and set the PrimitiveID output offset.
6925 static void si_get_vs_epilog_key(struct si_shader
*shader
,
6926 struct si_vs_epilog_bits
*states
,
6927 union si_shader_part_key
*key
)
6929 memset(key
, 0, sizeof(*key
));
6930 key
->vs_epilog
.states
= *states
;
6932 /* Set up the PrimitiveID output. */
6933 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
6934 unsigned index
= shader
->selector
->info
.num_outputs
;
6935 unsigned offset
= shader
->info
.nr_param_exports
++;
6937 key
->vs_epilog
.prim_id_param_offset
= offset
;
6938 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
6939 shader
->info
.vs_output_param_offset
[index
] = offset
;
6944 * Compute the PS prolog key, which contains all the information needed to
6945 * build the PS prolog function, and set related bits in shader->config.
6947 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6948 union si_shader_part_key
*key
,
6949 bool separate_prolog
)
6951 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6953 memset(key
, 0, sizeof(*key
));
6954 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6955 key
->ps_prolog
.colors_read
= info
->colors_read
;
6956 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6957 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6958 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6959 (key
->ps_prolog
.colors_read
||
6960 key
->ps_prolog
.states
.force_persp_sample_interp
||
6961 key
->ps_prolog
.states
.force_linear_sample_interp
||
6962 key
->ps_prolog
.states
.force_persp_center_interp
||
6963 key
->ps_prolog
.states
.force_linear_center_interp
||
6964 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6965 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6967 if (info
->colors_read
) {
6968 unsigned *color
= shader
->selector
->color_attr_index
;
6970 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6971 /* BCOLORs are stored after the last input. */
6972 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6973 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6974 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6977 for (unsigned i
= 0; i
< 2; i
++) {
6978 unsigned interp
= info
->input_interpolate
[color
[i
]];
6979 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6981 if (!(info
->colors_read
& (0xf << i
*4)))
6984 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6986 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6987 interp
== TGSI_INTERPOLATE_COLOR
)
6988 interp
= TGSI_INTERPOLATE_CONSTANT
;
6991 case TGSI_INTERPOLATE_CONSTANT
:
6992 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6994 case TGSI_INTERPOLATE_PERSPECTIVE
:
6995 case TGSI_INTERPOLATE_COLOR
:
6996 /* Force the interpolation location for colors here. */
6997 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6998 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6999 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
7000 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7003 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7004 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
7005 shader
->config
.spi_ps_input_ena
|=
7006 S_0286CC_PERSP_SAMPLE_ENA(1);
7008 case TGSI_INTERPOLATE_LOC_CENTER
:
7009 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
7010 shader
->config
.spi_ps_input_ena
|=
7011 S_0286CC_PERSP_CENTER_ENA(1);
7013 case TGSI_INTERPOLATE_LOC_CENTROID
:
7014 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
7015 shader
->config
.spi_ps_input_ena
|=
7016 S_0286CC_PERSP_CENTROID_ENA(1);
7022 case TGSI_INTERPOLATE_LINEAR
:
7023 /* Force the interpolation location for colors here. */
7024 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
7025 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7026 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
7027 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7029 /* The VGPR assignment for non-monolithic shaders
7030 * works because InitialPSInputAddr is set on the
7031 * main shader and PERSP_PULL_MODEL is never used.
7034 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7035 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7036 separate_prolog
? 6 : 9;
7037 shader
->config
.spi_ps_input_ena
|=
7038 S_0286CC_LINEAR_SAMPLE_ENA(1);
7040 case TGSI_INTERPOLATE_LOC_CENTER
:
7041 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7042 separate_prolog
? 8 : 11;
7043 shader
->config
.spi_ps_input_ena
|=
7044 S_0286CC_LINEAR_CENTER_ENA(1);
7046 case TGSI_INTERPOLATE_LOC_CENTROID
:
7047 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7048 separate_prolog
? 10 : 13;
7049 shader
->config
.spi_ps_input_ena
|=
7050 S_0286CC_LINEAR_CENTROID_ENA(1);
7064 * Check whether a PS prolog is required based on the key.
7066 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
7068 return key
->ps_prolog
.colors_read
||
7069 key
->ps_prolog
.states
.force_persp_sample_interp
||
7070 key
->ps_prolog
.states
.force_linear_sample_interp
||
7071 key
->ps_prolog
.states
.force_persp_center_interp
||
7072 key
->ps_prolog
.states
.force_linear_center_interp
||
7073 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7074 key
->ps_prolog
.states
.bc_optimize_for_linear
||
7075 key
->ps_prolog
.states
.poly_stipple
;
7079 * Compute the PS epilog key, which contains all the information needed to
7080 * build the PS epilog function.
7082 static void si_get_ps_epilog_key(struct si_shader
*shader
,
7083 union si_shader_part_key
*key
)
7085 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7086 memset(key
, 0, sizeof(*key
));
7087 key
->ps_epilog
.colors_written
= info
->colors_written
;
7088 key
->ps_epilog
.writes_z
= info
->writes_z
;
7089 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
7090 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
7091 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
7095 * Build the GS prolog function. Rotate the input vertices for triangle strips
7098 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
7099 union si_shader_part_key
*key
)
7101 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
7102 const unsigned num_vgprs
= 8;
7103 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7104 LLVMBuilderRef builder
= gallivm
->builder
;
7105 LLVMTypeRef params
[32];
7106 LLVMTypeRef returns
[32];
7107 LLVMValueRef func
, ret
;
7109 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
7110 params
[i
] = ctx
->i32
;
7111 returns
[i
] = ctx
->i32
;
7114 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
7115 params
[num_sgprs
+ i
] = ctx
->i32
;
7116 returns
[num_sgprs
+ i
] = ctx
->f32
;
7119 /* Create the function. */
7120 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
7121 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
7122 func
= ctx
->main_fn
;
7124 /* Copy inputs to outputs. This should be no-op, as the registers match,
7125 * but it will prevent the compiler from overwriting them unintentionally.
7127 ret
= ctx
->return_value
;
7128 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
7129 LLVMValueRef p
= LLVMGetParam(func
, i
);
7130 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
7132 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
7133 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
7134 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
7135 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
7138 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
7139 /* Remap the input vertices for every other primitive. */
7140 const unsigned vtx_params
[6] = {
7148 LLVMValueRef prim_id
, rotate
;
7150 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
7151 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
7153 for (unsigned i
= 0; i
< 6; ++i
) {
7154 LLVMValueRef base
, rotated
, actual
;
7155 base
= LLVMGetParam(func
, vtx_params
[i
]);
7156 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
7157 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
7158 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
7159 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
7163 LLVMBuildRet(builder
, ret
);
7167 * Given a list of shader part functions, build a wrapper function that
7168 * runs them in sequence to form a monolithic shader.
7170 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
7171 LLVMValueRef
*parts
,
7175 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7176 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
7177 /* PS epilog has one arg per color component */
7178 LLVMTypeRef param_types
[48];
7179 LLVMValueRef out
[48];
7180 LLVMTypeRef function_type
;
7181 unsigned num_params
;
7183 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
7184 unsigned num_sgprs
, num_vgprs
;
7185 unsigned last_sgpr_param
;
7188 for (unsigned i
= 0; i
< num_parts
; ++i
) {
7189 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
7190 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
7193 /* The parameters of the wrapper function correspond to those of the
7194 * first part in terms of SGPRs and VGPRs, but we use the types of the
7195 * main part to get the right types. This is relevant for the
7196 * dereferenceable attribute on descriptor table pointers.
7201 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
7202 num_params
= LLVMCountParamTypes(function_type
);
7204 for (unsigned i
= 0; i
< num_params
; ++i
) {
7205 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
7207 if (ac_is_sgpr_param(param
)) {
7208 assert(num_vgprs
== 0);
7209 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7211 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7214 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
7217 last_sgpr_param
= 0;
7219 while (gprs
< num_sgprs
+ num_vgprs
) {
7220 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
7223 param_types
[num_params
] = LLVMTypeOf(param
);
7224 if (gprs
< num_sgprs
)
7225 last_sgpr_param
= num_params
;
7226 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
7229 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
7230 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
7231 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
7236 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
7238 /* Record the arguments of the function as if they were an output of
7244 for (unsigned i
= 0; i
< num_params
; ++i
) {
7245 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
7246 LLVMTypeRef param_type
= LLVMTypeOf(param
);
7247 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
7248 unsigned size
= llvm_get_type_size(param_type
) / 4;
7251 if (param_type
!= out_type
)
7252 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
7253 out
[num_out
++] = param
;
7255 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
7257 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7258 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
7259 param_type
= ctx
->i64
;
7262 if (param_type
!= vector_type
)
7263 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7265 for (unsigned j
= 0; j
< size
; ++j
)
7266 out
[num_out
++] = LLVMBuildExtractElement(
7267 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7270 if (i
<= last_sgpr_param
)
7271 num_out_sgpr
= num_out
;
7274 /* Now chain the parts. */
7275 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7276 LLVMValueRef in
[48];
7278 LLVMTypeRef ret_type
;
7279 unsigned out_idx
= 0;
7281 num_params
= LLVMCountParams(parts
[part
]);
7282 assert(num_params
<= ARRAY_SIZE(param_types
));
7284 /* Derive arguments for the next part from outputs of the
7287 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7289 LLVMTypeRef param_type
;
7291 unsigned param_size
;
7292 LLVMValueRef arg
= NULL
;
7294 param
= LLVMGetParam(parts
[part
], param_idx
);
7295 param_type
= LLVMTypeOf(param
);
7296 param_size
= llvm_get_type_size(param_type
) / 4;
7297 is_sgpr
= ac_is_sgpr_param(param
);
7300 #if HAVE_LLVM < 0x0400
7301 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7303 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7304 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7306 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7309 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7310 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7312 if (param_size
== 1)
7315 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7317 if (LLVMTypeOf(arg
) != param_type
) {
7318 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7319 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7320 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7322 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7326 in
[param_idx
] = arg
;
7327 out_idx
+= param_size
;
7330 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7331 ret_type
= LLVMTypeOf(ret
);
7333 /* Extract the returned GPRs. */
7337 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7338 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7340 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7342 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7344 LLVMBuildExtractValue(builder
, ret
, i
, "");
7346 out
[num_out
++] = val
;
7348 if (LLVMTypeOf(val
) == ctx
->i32
) {
7349 assert(num_out_sgpr
+ 1 == num_out
);
7350 num_out_sgpr
= num_out
;
7356 LLVMBuildRetVoid(builder
);
7359 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7360 LLVMTargetMachineRef tm
,
7361 struct si_shader
*shader
,
7363 struct pipe_debug_callback
*debug
)
7365 struct si_shader_selector
*sel
= shader
->selector
;
7366 struct si_shader_context ctx
;
7367 struct lp_build_tgsi_context
*bld_base
;
7371 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7372 * conversion fails. */
7373 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7374 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7375 tgsi_dump(sel
->tokens
, 0);
7376 si_dump_streamout(&sel
->so
);
7379 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
7380 ctx
.separate_prolog
= !is_monolithic
;
7382 memset(shader
->info
.vs_output_param_offset
, EXP_PARAM_UNDEFINED
,
7383 sizeof(shader
->info
.vs_output_param_offset
));
7385 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7387 bld_base
= &ctx
.soa
.bld_base
;
7388 ctx
.load_system_value
= declare_system_value
;
7390 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7391 si_llvm_dispose(&ctx
);
7395 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7396 LLVMValueRef parts
[3];
7400 need_prolog
= sel
->info
.num_inputs
;
7401 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7403 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7406 union si_shader_part_key prolog_key
;
7407 si_get_vs_prolog_key(shader
, &prolog_key
);
7408 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7409 parts
[0] = ctx
.main_fn
;
7413 union si_shader_part_key epilog_key
;
7414 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7415 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7416 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7419 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7420 need_prolog
? 1 : 0);
7421 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7422 LLVMValueRef parts
[2];
7423 union si_shader_part_key epilog_key
;
7425 parts
[0] = ctx
.main_fn
;
7427 memset(&epilog_key
, 0, sizeof(epilog_key
));
7428 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7429 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7430 parts
[1] = ctx
.main_fn
;
7432 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7433 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7434 !shader
->key
.as_es
) {
7435 LLVMValueRef parts
[2];
7436 union si_shader_part_key epilog_key
;
7438 parts
[0] = ctx
.main_fn
;
7440 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7441 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7442 parts
[1] = ctx
.main_fn
;
7444 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7445 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7446 LLVMValueRef parts
[2];
7447 union si_shader_part_key prolog_key
;
7449 parts
[1] = ctx
.main_fn
;
7451 memset(&prolog_key
, 0, sizeof(prolog_key
));
7452 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7453 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7454 parts
[0] = ctx
.main_fn
;
7456 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7457 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7458 LLVMValueRef parts
[3];
7459 union si_shader_part_key prolog_key
;
7460 union si_shader_part_key epilog_key
;
7463 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7464 need_prolog
= si_need_ps_prolog(&prolog_key
);
7466 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7469 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7470 parts
[0] = ctx
.main_fn
;
7473 si_get_ps_epilog_key(shader
, &epilog_key
);
7474 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7475 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7477 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7480 mod
= bld_base
->base
.gallivm
->module
;
7482 /* Dump LLVM IR before any optimization passes */
7483 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7484 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7485 LLVMDumpModule(mod
);
7487 si_llvm_finalize_module(&ctx
,
7488 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7490 /* Post-optimization transformations and analysis. */
7491 si_eliminate_const_vs_outputs(&ctx
);
7493 if ((debug
&& debug
->debug_message
) ||
7494 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7495 si_count_scratch_private_memory(&ctx
);
7497 /* Compile to bytecode. */
7498 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7499 mod
, debug
, ctx
.type
, "TGSI shader");
7500 si_llvm_dispose(&ctx
);
7502 fprintf(stderr
, "LLVM failed to compile shader\n");
7506 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7507 * LLVM 3.9svn has this bug.
7509 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7510 unsigned wave_size
= 64;
7511 unsigned max_vgprs
= 256;
7512 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7513 unsigned max_sgprs_per_wave
= 128;
7514 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7515 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7516 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7518 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7519 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7521 if (shader
->config
.num_sgprs
> max_sgprs
||
7522 shader
->config
.num_vgprs
> max_vgprs
) {
7523 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7524 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7525 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7526 max_sgprs
, max_vgprs
);
7528 /* Just terminate the process, because dependent
7529 * shaders can hang due to bad input data, but use
7530 * the env var to allow shader-db to work.
7532 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7537 /* Add the scratch offset to input SGPRs. */
7538 if (shader
->config
.scratch_bytes_per_wave
)
7539 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7541 /* Calculate the number of fragment input VGPRs. */
7542 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7543 shader
->info
.num_input_vgprs
= 0;
7544 shader
->info
.face_vgpr_index
= -1;
7546 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7547 shader
->info
.num_input_vgprs
+= 2;
7548 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7549 shader
->info
.num_input_vgprs
+= 2;
7550 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7551 shader
->info
.num_input_vgprs
+= 2;
7552 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7553 shader
->info
.num_input_vgprs
+= 3;
7554 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7555 shader
->info
.num_input_vgprs
+= 2;
7556 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7557 shader
->info
.num_input_vgprs
+= 2;
7558 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7559 shader
->info
.num_input_vgprs
+= 2;
7560 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7561 shader
->info
.num_input_vgprs
+= 1;
7562 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7563 shader
->info
.num_input_vgprs
+= 1;
7564 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7565 shader
->info
.num_input_vgprs
+= 1;
7566 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7567 shader
->info
.num_input_vgprs
+= 1;
7568 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7569 shader
->info
.num_input_vgprs
+= 1;
7570 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7571 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7572 shader
->info
.num_input_vgprs
+= 1;
7574 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7575 shader
->info
.num_input_vgprs
+= 1;
7576 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7577 shader
->info
.num_input_vgprs
+= 1;
7578 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7579 shader
->info
.num_input_vgprs
+= 1;
7586 * Create, compile and return a shader part (prolog or epilog).
7588 * \param sscreen screen
7589 * \param list list of shader parts of the same category
7590 * \param type shader type
7591 * \param key shader part key
7592 * \param prolog whether the part being requested is a prolog
7593 * \param tm LLVM target machine
7594 * \param debug debug callback
7595 * \param build the callback responsible for building the main function
7596 * \return non-NULL on success
7598 static struct si_shader_part
*
7599 si_get_shader_part(struct si_screen
*sscreen
,
7600 struct si_shader_part
**list
,
7601 enum pipe_shader_type type
,
7603 union si_shader_part_key
*key
,
7604 LLVMTargetMachineRef tm
,
7605 struct pipe_debug_callback
*debug
,
7606 void (*build
)(struct si_shader_context
*,
7607 union si_shader_part_key
*),
7610 struct si_shader_part
*result
;
7612 pipe_mutex_lock(sscreen
->shader_parts_mutex
);
7614 /* Find existing. */
7615 for (result
= *list
; result
; result
= result
->next
) {
7616 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7617 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7622 /* Compile a new one. */
7623 result
= CALLOC_STRUCT(si_shader_part
);
7626 struct si_shader shader
= {};
7627 struct si_shader_context ctx
;
7628 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7630 si_init_shader_ctx(&ctx
, sscreen
, &shader
, tm
);
7634 case PIPE_SHADER_VERTEX
:
7636 case PIPE_SHADER_TESS_CTRL
:
7638 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7640 case PIPE_SHADER_GEOMETRY
:
7643 case PIPE_SHADER_FRAGMENT
:
7645 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7647 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7650 unreachable("bad shader part");
7656 si_llvm_finalize_module(&ctx
,
7657 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7659 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7660 gallivm
->module
, debug
, ctx
.type
, name
)) {
7666 result
->next
= *list
;
7670 si_llvm_dispose(&ctx
);
7671 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7676 * Build the vertex shader prolog function.
7678 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7679 * All inputs are returned unmodified. The vertex load indices are
7680 * stored after them, which will be used by the API VS for fetching inputs.
7682 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7687 * (VertexID + BaseVertex),
7688 * (InstanceID + StartInstance),
7689 * (InstanceID / 2 + StartInstance)
7691 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7692 union si_shader_part_key
*key
)
7694 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7695 LLVMTypeRef
*params
, *returns
;
7696 LLVMValueRef ret
, func
;
7697 int last_sgpr
, num_params
, num_returns
, i
;
7699 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7700 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7702 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7703 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7704 sizeof(LLVMTypeRef
));
7705 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7706 key
->vs_prolog
.last_input
+ 1) *
7707 sizeof(LLVMTypeRef
));
7711 /* Declare input and output SGPRs. */
7713 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7714 params
[num_params
++] = ctx
->i32
;
7715 returns
[num_returns
++] = ctx
->i32
;
7717 last_sgpr
= num_params
- 1;
7719 /* 4 preloaded VGPRs (outputs must be floats) */
7720 for (i
= 0; i
< 4; i
++) {
7721 params
[num_params
++] = ctx
->i32
;
7722 returns
[num_returns
++] = ctx
->f32
;
7725 /* Vertex load indices. */
7726 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7727 returns
[num_returns
++] = ctx
->f32
;
7729 /* Create the function. */
7730 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7731 num_params
, last_sgpr
);
7732 func
= ctx
->main_fn
;
7734 /* Copy inputs to outputs. This should be no-op, as the registers match,
7735 * but it will prevent the compiler from overwriting them unintentionally.
7737 ret
= ctx
->return_value
;
7738 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7739 LLVMValueRef p
= LLVMGetParam(func
, i
);
7740 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7742 for (i
= num_params
- 4; i
< num_params
; i
++) {
7743 LLVMValueRef p
= LLVMGetParam(func
, i
);
7744 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7745 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7748 /* Compute vertex load indices from instance divisors. */
7749 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7750 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7754 /* InstanceID / Divisor + StartInstance */
7755 index
= get_instance_index_for_fetch(ctx
,
7756 SI_SGPR_START_INSTANCE
,
7759 /* VertexID + BaseVertex */
7760 index
= LLVMBuildAdd(gallivm
->builder
,
7761 LLVMGetParam(func
, ctx
->param_vertex_id
),
7762 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7765 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7766 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7770 si_llvm_build_ret(ctx
, ret
);
7774 * Build the vertex shader epilog function. This is also used by the tessellation
7775 * evaluation shader compiled as VS.
7777 * The input is PrimitiveID.
7779 * If PrimitiveID is required by the pixel shader, export it.
7780 * Otherwise, do nothing.
7782 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7783 union si_shader_part_key
*key
)
7785 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7786 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7787 LLVMTypeRef params
[5];
7790 /* Declare input VGPRs. */
7791 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7792 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7793 assert(num_params
<= ARRAY_SIZE(params
));
7795 for (i
= 0; i
< num_params
; i
++)
7796 params
[i
] = ctx
->f32
;
7798 /* Create the function. */
7799 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7802 if (key
->vs_epilog
.states
.export_prim_id
) {
7803 struct lp_build_context
*base
= &bld_base
->base
;
7804 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
7805 LLVMValueRef args
[9];
7807 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
7808 args
[1] = uint
->zero
; /* whether the EXEC mask is valid */
7809 args
[2] = uint
->zero
; /* DONE bit */
7810 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_PARAM
+
7811 key
->vs_epilog
.prim_id_param_offset
);
7812 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
7813 args
[5] = LLVMGetParam(ctx
->main_fn
,
7814 VS_EPILOG_PRIMID_LOC
); /* X */
7815 args
[6] = base
->undef
; /* Y */
7816 args
[7] = base
->undef
; /* Z */
7817 args
[8] = base
->undef
; /* W */
7819 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
7820 LLVMVoidTypeInContext(base
->gallivm
->context
),
7824 LLVMBuildRetVoid(gallivm
->builder
);
7828 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7830 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7831 LLVMTargetMachineRef tm
,
7832 struct si_shader
*shader
,
7833 struct pipe_debug_callback
*debug
,
7834 struct si_vs_epilog_bits
*states
)
7836 union si_shader_part_key epilog_key
;
7838 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7840 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7841 PIPE_SHADER_VERTEX
, true,
7842 &epilog_key
, tm
, debug
,
7843 si_build_vs_epilog_function
,
7844 "Vertex Shader Epilog");
7845 return shader
->epilog
!= NULL
;
7849 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7851 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7852 LLVMTargetMachineRef tm
,
7853 struct si_shader
*shader
,
7854 struct pipe_debug_callback
*debug
)
7856 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7857 union si_shader_part_key prolog_key
;
7859 /* Get the prolog. */
7860 si_get_vs_prolog_key(shader
, &prolog_key
);
7862 /* The prolog is a no-op if there are no inputs. */
7863 if (info
->num_inputs
) {
7865 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7866 PIPE_SHADER_VERTEX
, true,
7867 &prolog_key
, tm
, debug
,
7868 si_build_vs_prolog_function
,
7869 "Vertex Shader Prolog");
7870 if (!shader
->prolog
)
7874 /* Get the epilog. */
7875 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
7876 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7877 &shader
->key
.part
.vs
.epilog
))
7884 * Select and compile (or reuse) TES parts (epilog).
7886 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
7887 LLVMTargetMachineRef tm
,
7888 struct si_shader
*shader
,
7889 struct pipe_debug_callback
*debug
)
7891 if (shader
->key
.as_es
)
7894 /* TES compiled as VS. */
7895 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7896 &shader
->key
.part
.tes
.epilog
);
7900 * Compile the TCS epilog function. This writes tesselation factors to memory
7901 * based on the output primitive type of the tesselator (determined by TES).
7903 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7904 union si_shader_part_key
*key
)
7906 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7907 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7908 LLVMTypeRef params
[16];
7910 int last_sgpr
, num_params
;
7912 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
7913 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
7914 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
7915 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
7916 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
7917 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
7918 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
7919 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
7920 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
7921 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
7922 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
7923 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
7924 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
7925 num_params
= last_sgpr
+ 1;
7927 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
7928 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
7929 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
7931 /* Create the function. */
7932 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
7933 declare_tess_lds(ctx
);
7934 func
= ctx
->main_fn
;
7936 si_write_tess_factors(bld_base
,
7937 LLVMGetParam(func
, last_sgpr
+ 1),
7938 LLVMGetParam(func
, last_sgpr
+ 2),
7939 LLVMGetParam(func
, last_sgpr
+ 3));
7941 LLVMBuildRetVoid(gallivm
->builder
);
7945 * Select and compile (or reuse) TCS parts (epilog).
7947 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7948 LLVMTargetMachineRef tm
,
7949 struct si_shader
*shader
,
7950 struct pipe_debug_callback
*debug
)
7952 union si_shader_part_key epilog_key
;
7954 /* Get the epilog. */
7955 memset(&epilog_key
, 0, sizeof(epilog_key
));
7956 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7958 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7959 PIPE_SHADER_TESS_CTRL
, false,
7960 &epilog_key
, tm
, debug
,
7961 si_build_tcs_epilog_function
,
7962 "Tessellation Control Shader Epilog");
7963 return shader
->epilog
!= NULL
;
7967 * Select and compile (or reuse) GS parts (prolog).
7969 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7970 LLVMTargetMachineRef tm
,
7971 struct si_shader
*shader
,
7972 struct pipe_debug_callback
*debug
)
7974 union si_shader_part_key prolog_key
;
7976 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7979 memset(&prolog_key
, 0, sizeof(prolog_key
));
7980 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7982 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7983 PIPE_SHADER_GEOMETRY
, true,
7984 &prolog_key
, tm
, debug
,
7985 si_build_gs_prolog_function
,
7986 "Geometry Shader Prolog");
7987 return shader
->prolog
!= NULL
;
7991 * Build the pixel shader prolog function. This handles:
7992 * - two-side color selection and interpolation
7993 * - overriding interpolation parameters for the API PS
7994 * - polygon stippling
7996 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7997 * overriden by other states. (e.g. per-sample interpolation)
7998 * Interpolated colors are stored after the preloaded VGPRs.
8000 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
8001 union si_shader_part_key
*key
)
8003 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8004 LLVMTypeRef
*params
;
8005 LLVMValueRef ret
, func
;
8006 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
8008 assert(si_need_ps_prolog(key
));
8010 /* Number of inputs + 8 color elements. */
8011 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
8012 key
->ps_prolog
.num_input_vgprs
+ 8) *
8013 sizeof(LLVMTypeRef
));
8015 /* Declare inputs. */
8017 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
8018 params
[num_params
++] = ctx
->i32
;
8019 last_sgpr
= num_params
- 1;
8021 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
8022 params
[num_params
++] = ctx
->f32
;
8024 /* Declare outputs (same as inputs + add colors if needed) */
8025 num_returns
= num_params
;
8026 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
8027 for (i
= 0; i
< num_color_channels
; i
++)
8028 params
[num_returns
++] = ctx
->f32
;
8030 /* Create the function. */
8031 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
8032 num_params
, last_sgpr
);
8033 func
= ctx
->main_fn
;
8035 /* Copy inputs to outputs. This should be no-op, as the registers match,
8036 * but it will prevent the compiler from overwriting them unintentionally.
8038 ret
= ctx
->return_value
;
8039 for (i
= 0; i
< num_params
; i
++) {
8040 LLVMValueRef p
= LLVMGetParam(func
, i
);
8041 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
8044 /* Polygon stippling. */
8045 if (key
->ps_prolog
.states
.poly_stipple
) {
8046 /* POS_FIXED_PT is always last. */
8047 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
8048 key
->ps_prolog
.num_input_vgprs
- 1;
8049 LLVMValueRef ptr
[2], list
;
8051 /* Get the pointer to rw buffers. */
8052 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
8053 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
8054 list
= lp_build_gather_values(gallivm
, ptr
, 2);
8055 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
8056 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
8057 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
8059 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
8062 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
8063 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8064 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8065 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
8067 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
8068 * The hw doesn't compute CENTROID if the whole wave only
8069 * contains fully-covered quads.
8071 * PRIM_MASK is after user SGPRs.
8073 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8074 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
8075 LLVMConstInt(ctx
->i32
, 31, 0), "");
8076 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
8079 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
8080 /* Read PERSP_CENTER. */
8081 for (i
= 0; i
< 2; i
++)
8082 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8083 /* Read PERSP_CENTROID. */
8084 for (i
= 0; i
< 2; i
++)
8085 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
8086 /* Select PERSP_CENTROID. */
8087 for (i
= 0; i
< 2; i
++) {
8088 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8089 center
[i
], centroid
[i
], "");
8090 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8091 tmp
, base
+ 4 + i
, "");
8094 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8095 /* Read LINEAR_CENTER. */
8096 for (i
= 0; i
< 2; i
++)
8097 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8098 /* Read LINEAR_CENTROID. */
8099 for (i
= 0; i
< 2; i
++)
8100 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
8101 /* Select LINEAR_CENTROID. */
8102 for (i
= 0; i
< 2; i
++) {
8103 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8104 center
[i
], centroid
[i
], "");
8105 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8106 tmp
, base
+ 10 + i
, "");
8111 /* Force per-sample interpolation. */
8112 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
8113 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8114 LLVMValueRef persp_sample
[2];
8116 /* Read PERSP_SAMPLE. */
8117 for (i
= 0; i
< 2; i
++)
8118 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
8119 /* Overwrite PERSP_CENTER. */
8120 for (i
= 0; i
< 2; i
++)
8121 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8122 persp_sample
[i
], base
+ 2 + i
, "");
8123 /* Overwrite PERSP_CENTROID. */
8124 for (i
= 0; i
< 2; i
++)
8125 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8126 persp_sample
[i
], base
+ 4 + i
, "");
8128 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
8129 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8130 LLVMValueRef linear_sample
[2];
8132 /* Read LINEAR_SAMPLE. */
8133 for (i
= 0; i
< 2; i
++)
8134 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
8135 /* Overwrite LINEAR_CENTER. */
8136 for (i
= 0; i
< 2; i
++)
8137 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8138 linear_sample
[i
], base
+ 8 + i
, "");
8139 /* Overwrite LINEAR_CENTROID. */
8140 for (i
= 0; i
< 2; i
++)
8141 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8142 linear_sample
[i
], base
+ 10 + i
, "");
8145 /* Force center interpolation. */
8146 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
8147 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8148 LLVMValueRef persp_center
[2];
8150 /* Read PERSP_CENTER. */
8151 for (i
= 0; i
< 2; i
++)
8152 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8153 /* Overwrite PERSP_SAMPLE. */
8154 for (i
= 0; i
< 2; i
++)
8155 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8156 persp_center
[i
], base
+ i
, "");
8157 /* Overwrite PERSP_CENTROID. */
8158 for (i
= 0; i
< 2; i
++)
8159 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8160 persp_center
[i
], base
+ 4 + i
, "");
8162 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
8163 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8164 LLVMValueRef linear_center
[2];
8166 /* Read LINEAR_CENTER. */
8167 for (i
= 0; i
< 2; i
++)
8168 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8169 /* Overwrite LINEAR_SAMPLE. */
8170 for (i
= 0; i
< 2; i
++)
8171 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8172 linear_center
[i
], base
+ 6 + i
, "");
8173 /* Overwrite LINEAR_CENTROID. */
8174 for (i
= 0; i
< 2; i
++)
8175 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8176 linear_center
[i
], base
+ 10 + i
, "");
8179 /* Interpolate colors. */
8180 for (i
= 0; i
< 2; i
++) {
8181 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
8182 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8183 key
->ps_prolog
.face_vgpr_index
;
8184 LLVMValueRef interp
[2], color
[4];
8185 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
8190 /* If the interpolation qualifier is not CONSTANT (-1). */
8191 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
8192 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8193 key
->ps_prolog
.color_interp_vgpr_index
[i
];
8195 /* Get the (i,j) updated by bc_optimize handling. */
8196 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8198 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8199 interp_vgpr
+ 1, "");
8200 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
8203 /* Use the absolute location of the input. */
8204 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8206 if (key
->ps_prolog
.states
.color_two_side
) {
8207 face
= LLVMGetParam(func
, face_vgpr
);
8208 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
8211 interp_fs_input(ctx
,
8212 key
->ps_prolog
.color_attr_index
[i
],
8213 TGSI_SEMANTIC_COLOR
, i
,
8214 key
->ps_prolog
.num_interp_inputs
,
8215 key
->ps_prolog
.colors_read
, interp_ij
,
8216 prim_mask
, face
, color
);
8219 unsigned chan
= u_bit_scan(&writemask
);
8220 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
8225 /* Tell LLVM to insert WQM instruction sequence when needed. */
8226 if (key
->ps_prolog
.wqm
) {
8227 LLVMAddTargetDependentFunctionAttr(func
,
8228 "amdgpu-ps-wqm-outputs", "");
8231 si_llvm_build_ret(ctx
, ret
);
8235 * Build the pixel shader epilog function. This handles everything that must be
8236 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8238 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8239 union si_shader_part_key
*key
)
8241 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8242 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
8243 LLVMTypeRef params
[16+8*4+3];
8244 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8245 int last_sgpr
, num_params
, i
;
8246 struct si_ps_exports exp
= {};
8248 /* Declare input SGPRs. */
8249 params
[SI_PARAM_RW_BUFFERS
] = ctx
->i64
;
8250 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8251 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8252 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8253 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8254 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8255 last_sgpr
= SI_PARAM_ALPHA_REF
;
8257 /* Declare input VGPRs. */
8258 num_params
= (last_sgpr
+ 1) +
8259 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8260 key
->ps_epilog
.writes_z
+
8261 key
->ps_epilog
.writes_stencil
+
8262 key
->ps_epilog
.writes_samplemask
;
8264 num_params
= MAX2(num_params
,
8265 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8267 assert(num_params
<= ARRAY_SIZE(params
));
8269 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8270 params
[i
] = ctx
->f32
;
8272 /* Create the function. */
8273 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8274 /* Disable elimination of unused inputs. */
8275 si_llvm_add_attribute(ctx
->main_fn
,
8276 "InitialPSInputAddr", 0xffffff);
8278 /* Process colors. */
8279 unsigned vgpr
= last_sgpr
+ 1;
8280 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8281 int last_color_export
= -1;
8283 /* Find the last color export. */
8284 if (!key
->ps_epilog
.writes_z
&&
8285 !key
->ps_epilog
.writes_stencil
&&
8286 !key
->ps_epilog
.writes_samplemask
) {
8287 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8289 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8290 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8291 /* Just set this if any of the colorbuffers are enabled. */
8293 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8294 last_color_export
= 0;
8296 for (i
= 0; i
< 8; i
++)
8297 if (colors_written
& (1 << i
) &&
8298 (spi_format
>> (i
* 4)) & 0xf)
8299 last_color_export
= i
;
8303 while (colors_written
) {
8304 LLVMValueRef color
[4];
8305 int mrt
= u_bit_scan(&colors_written
);
8307 for (i
= 0; i
< 4; i
++)
8308 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8310 si_export_mrt_color(bld_base
, color
, mrt
,
8312 mrt
== last_color_export
, &exp
);
8315 /* Process depth, stencil, samplemask. */
8316 if (key
->ps_epilog
.writes_z
)
8317 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8318 if (key
->ps_epilog
.writes_stencil
)
8319 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8320 if (key
->ps_epilog
.writes_samplemask
)
8321 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8323 if (depth
|| stencil
|| samplemask
)
8324 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8325 else if (last_color_export
== -1)
8326 si_export_null(bld_base
);
8329 si_emit_ps_exports(ctx
, &exp
);
8332 LLVMBuildRetVoid(gallivm
->builder
);
8336 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8338 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8339 LLVMTargetMachineRef tm
,
8340 struct si_shader
*shader
,
8341 struct pipe_debug_callback
*debug
)
8343 union si_shader_part_key prolog_key
;
8344 union si_shader_part_key epilog_key
;
8346 /* Get the prolog. */
8347 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8349 /* The prolog is a no-op if these aren't set. */
8350 if (si_need_ps_prolog(&prolog_key
)) {
8352 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8353 PIPE_SHADER_FRAGMENT
, true,
8354 &prolog_key
, tm
, debug
,
8355 si_build_ps_prolog_function
,
8356 "Fragment Shader Prolog");
8357 if (!shader
->prolog
)
8361 /* Get the epilog. */
8362 si_get_ps_epilog_key(shader
, &epilog_key
);
8365 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8366 PIPE_SHADER_FRAGMENT
, false,
8367 &epilog_key
, tm
, debug
,
8368 si_build_ps_epilog_function
,
8369 "Fragment Shader Epilog");
8370 if (!shader
->epilog
)
8373 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8374 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8375 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8376 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8379 /* Set up the enable bits for per-sample shading if needed. */
8380 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8381 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8382 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8383 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8384 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8385 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8387 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8388 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8389 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8390 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8391 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8392 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8394 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8395 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8396 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8397 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8398 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8399 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8401 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8402 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8403 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8404 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8405 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8406 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8409 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8410 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8411 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8412 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8413 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8416 /* At least one pair of interpolation weights must be enabled. */
8417 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8418 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8419 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8422 /* The sample mask input is always enabled, because the API shader always
8423 * passes it through to the epilog. Disable it here if it's unused.
8425 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8426 !shader
->selector
->info
.reads_samplemask
)
8427 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8432 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8435 /* SPI barrier management bug:
8436 * Make sure we have at least 4k of LDS in use to avoid the bug.
8437 * It applies to workgroup sizes of more than one wavefront.
8439 if (sscreen
->b
.family
== CHIP_BONAIRE
||
8440 sscreen
->b
.family
== CHIP_KABINI
||
8441 sscreen
->b
.family
== CHIP_MULLINS
)
8442 *lds_size
= MAX2(*lds_size
, 8);
8445 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8446 struct si_shader
*shader
)
8448 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8450 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8452 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8453 si_get_max_workgroup_size(shader
) > 64) {
8454 si_multiwave_lds_size_workaround(sscreen
,
8455 &shader
->config
.lds_size
);
8459 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8460 struct si_shader
*shader
,
8461 struct pipe_debug_callback
*debug
)
8463 struct si_shader_selector
*sel
= shader
->selector
;
8464 struct si_shader
*mainp
= sel
->main_shader_part
;
8467 /* LS, ES, VS are compiled on demand if the main part hasn't been
8468 * compiled for that stage.
8470 * Vertex shaders are compiled on demand when a vertex fetch
8471 * workaround must be applied.
8473 if (shader
->is_monolithic
) {
8474 /* Monolithic shader (compiled as a whole, has many variants,
8475 * may take a long time to compile).
8477 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8481 /* The shader consists of 2-3 parts:
8483 * - the middle part is the user shader, it has 1 variant only
8484 * and it was compiled during the creation of the shader
8486 * - the prolog part is inserted at the beginning
8487 * - the epilog part is inserted at the end
8489 * The prolog and epilog have many (but simple) variants.
8492 /* Copy the compiled TGSI shader data over. */
8493 shader
->is_binary_shared
= true;
8494 shader
->binary
= mainp
->binary
;
8495 shader
->config
= mainp
->config
;
8496 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8497 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8498 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8499 memcpy(shader
->info
.vs_output_param_offset
,
8500 mainp
->info
.vs_output_param_offset
,
8501 sizeof(mainp
->info
.vs_output_param_offset
));
8502 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8503 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8504 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8506 /* Select prologs and/or epilogs. */
8507 switch (sel
->type
) {
8508 case PIPE_SHADER_VERTEX
:
8509 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8512 case PIPE_SHADER_TESS_CTRL
:
8513 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8516 case PIPE_SHADER_TESS_EVAL
:
8517 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8520 case PIPE_SHADER_GEOMETRY
:
8521 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8524 case PIPE_SHADER_FRAGMENT
:
8525 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8528 /* Make sure we have at least as many VGPRs as there
8529 * are allocated inputs.
8531 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8532 shader
->info
.num_input_vgprs
);
8536 /* Update SGPR and VGPR counts. */
8537 if (shader
->prolog
) {
8538 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8539 shader
->prolog
->config
.num_sgprs
);
8540 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8541 shader
->prolog
->config
.num_vgprs
);
8543 if (shader
->epilog
) {
8544 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8545 shader
->epilog
->config
.num_sgprs
);
8546 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8547 shader
->epilog
->config
.num_vgprs
);
8551 si_fix_resource_usage(sscreen
, shader
);
8552 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8556 r
= si_shader_binary_upload(sscreen
, shader
);
8558 fprintf(stderr
, "LLVM failed to upload shader\n");
8565 void si_shader_destroy(struct si_shader
*shader
)
8567 if (shader
->scratch_bo
)
8568 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8570 r600_resource_reference(&shader
->bo
, NULL
);
8572 if (!shader
->is_binary_shared
)
8573 radeon_shader_binary_clean(&shader
->binary
);
8575 free(shader
->shader_log
);