2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "gallivm/lp_bld_const.h"
26 #include "gallivm/lp_bld_gather.h"
27 #include "gallivm/lp_bld_intr.h"
28 #include "gallivm/lp_bld_logic.h"
29 #include "gallivm/lp_bld_arit.h"
30 #include "gallivm/lp_bld_flow.h"
31 #include "gallivm/lp_bld_misc.h"
32 #include "util/u_memory.h"
33 #include "util/u_string.h"
34 #include "tgsi/tgsi_build.h"
35 #include "tgsi/tgsi_util.h"
36 #include "tgsi/tgsi_dump.h"
38 #include "ac_binary.h"
39 #include "ac_llvm_util.h"
40 #include "ac_exp_param.h"
41 #include "ac_shader_util.h"
42 #include "si_shader_internal.h"
46 #include "compiler/nir/nir.h"
48 static const char *scratch_rsrc_dword0_symbol
=
49 "SCRATCH_RSRC_DWORD0";
51 static const char *scratch_rsrc_dword1_symbol
=
52 "SCRATCH_RSRC_DWORD1";
54 struct si_shader_output_values
56 LLVMValueRef values
[4];
57 unsigned semantic_name
;
58 unsigned semantic_index
;
59 ubyte vertex_stream
[4];
63 * Used to collect types and other info about arguments of the LLVM function
64 * before the function is created.
66 struct si_function_info
{
67 LLVMTypeRef types
[100];
68 LLVMValueRef
*assign
[100];
69 unsigned num_sgpr_params
;
78 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
79 struct si_screen
*sscreen
,
80 LLVMTargetMachineRef tm
);
82 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
83 struct lp_build_tgsi_context
*bld_base
,
84 struct lp_build_emit_data
*emit_data
);
86 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
89 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
90 union si_shader_part_key
*key
);
91 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
92 union si_shader_part_key
*key
);
93 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
94 union si_shader_part_key
*key
);
95 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
96 union si_shader_part_key
*key
);
98 /* Ideally pass the sample mask input to the PS epilog as v14, which
99 * is its usual location, so that the shader doesn't have to add v_mov.
101 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
103 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
106 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
112 static bool is_merged_shader(struct si_shader
*shader
)
114 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
117 return shader
->key
.as_ls
||
119 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
120 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
123 static void si_init_function_info(struct si_function_info
*fninfo
)
125 fninfo
->num_params
= 0;
126 fninfo
->num_sgpr_params
= 0;
129 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
130 enum si_arg_regfile regfile
, LLVMTypeRef type
,
131 LLVMValueRef
*assign
)
133 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
135 unsigned idx
= fninfo
->num_params
++;
136 assert(idx
< ARRAY_SIZE(fninfo
->types
));
138 if (regfile
== ARG_SGPR
)
139 fninfo
->num_sgpr_params
= fninfo
->num_params
;
141 fninfo
->types
[idx
] = type
;
142 fninfo
->assign
[idx
] = assign
;
146 static unsigned add_arg(struct si_function_info
*fninfo
,
147 enum si_arg_regfile regfile
, LLVMTypeRef type
)
149 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
152 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
153 enum si_arg_regfile regfile
, LLVMTypeRef type
,
154 LLVMValueRef
*assign
, unsigned idx
)
156 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
157 assert(actual
== idx
);
160 static void add_arg_checked(struct si_function_info
*fninfo
,
161 enum si_arg_regfile regfile
, LLVMTypeRef type
,
164 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
168 * Returns a unique index for a per-patch semantic name and index. The index
169 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
172 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
174 switch (semantic_name
) {
175 case TGSI_SEMANTIC_TESSOUTER
:
177 case TGSI_SEMANTIC_TESSINNER
:
179 case TGSI_SEMANTIC_PATCH
:
184 assert(!"invalid semantic name");
190 * Returns a unique index for a semantic name and index. The index must be
191 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
194 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
196 switch (semantic_name
) {
197 case TGSI_SEMANTIC_POSITION
:
199 case TGSI_SEMANTIC_GENERIC
:
200 /* Since some shader stages use the the highest used IO index
201 * to determine the size to allocate for inputs/outputs
202 * (in LDS, tess and GS rings). GENERIC should be placed right
203 * after POSITION to make that size as small as possible.
205 if (index
< SI_MAX_IO_GENERIC
)
208 assert(!"invalid generic index");
210 case TGSI_SEMANTIC_PSIZE
:
211 return SI_MAX_IO_GENERIC
+ 1;
212 case TGSI_SEMANTIC_CLIPDIST
:
214 return SI_MAX_IO_GENERIC
+ 2 + index
;
215 case TGSI_SEMANTIC_FOG
:
216 return SI_MAX_IO_GENERIC
+ 4;
217 case TGSI_SEMANTIC_LAYER
:
218 return SI_MAX_IO_GENERIC
+ 5;
219 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
220 return SI_MAX_IO_GENERIC
+ 6;
221 case TGSI_SEMANTIC_PRIMID
:
222 return SI_MAX_IO_GENERIC
+ 7;
223 case TGSI_SEMANTIC_COLOR
: /* these alias */
224 case TGSI_SEMANTIC_BCOLOR
:
226 return SI_MAX_IO_GENERIC
+ 8 + index
;
227 case TGSI_SEMANTIC_TEXCOORD
:
229 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
230 return SI_MAX_IO_GENERIC
+ 10 + index
;
232 assert(!"invalid semantic name");
238 * Get the value of a shader input parameter and extract a bitfield.
240 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
241 LLVMValueRef value
, unsigned rshift
,
244 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
245 value
= ac_to_integer(&ctx
->ac
, value
);
248 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
249 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
251 if (rshift
+ bitwidth
< 32) {
252 unsigned mask
= (1 << bitwidth
) - 1;
253 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
254 LLVMConstInt(ctx
->i32
, mask
, 0), "");
260 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
261 unsigned param
, unsigned rshift
,
264 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
266 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
269 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
272 case PIPE_SHADER_TESS_CTRL
:
273 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
275 case PIPE_SHADER_TESS_EVAL
:
276 return LLVMGetParam(ctx
->main_fn
,
277 ctx
->param_tes_rel_patch_id
);
285 /* Tessellation shaders pass outputs to the next shader using LDS.
287 * LS outputs = TCS inputs
288 * TCS outputs = TES inputs
291 * - TCS inputs for patch 0
292 * - TCS inputs for patch 1
293 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
295 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
296 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
297 * - TCS outputs for patch 1
298 * - Per-patch TCS outputs for patch 1
299 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
300 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
303 * All three shaders VS(LS), TCS, TES share the same LDS space.
307 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
309 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
312 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
314 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
316 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
317 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
319 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
322 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
324 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
326 return LLVMConstInt(ctx
->i32
, stride
, 0);
329 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
331 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
332 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
334 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
335 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
336 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
337 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
338 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
339 num_patch_outputs
* 4;
340 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
344 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
346 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
348 ctx
->param_tcs_out_lds_offsets
,
354 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
356 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
358 ctx
->param_tcs_out_lds_offsets
,
364 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
366 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
367 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
369 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
373 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
375 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
376 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
377 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
379 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
380 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
386 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
388 LLVMValueRef patch0_patch_data_offset
=
389 get_tcs_out_patch0_patch_data_offset(ctx
);
390 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
391 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
393 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
394 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
399 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
401 unsigned tcs_out_vertices
=
402 ctx
->shader
->selector
?
403 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
405 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
406 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
407 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
409 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
412 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
417 case PIPE_SHADER_VERTEX
:
418 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
419 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
421 case PIPE_SHADER_TESS_CTRL
:
422 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
423 ctx
->shader
->is_monolithic
) {
424 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
425 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
427 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
435 static LLVMValueRef
get_instance_index_for_fetch(
436 struct si_shader_context
*ctx
,
437 unsigned param_start_instance
, LLVMValueRef divisor
)
439 LLVMValueRef result
= ctx
->abi
.instance_id
;
441 /* The division must be done before START_INSTANCE is added. */
442 if (divisor
!= ctx
->i32_1
)
443 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
445 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
446 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
449 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
451 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
453 unsigned double_index
)
455 LLVMBuilderRef builder
= ctx
->ac
.builder
;
456 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
457 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
458 LLVMVectorType(f64
, 2), "");
459 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
460 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
461 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
464 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
465 LLVMValueRef i32
, unsigned index
)
470 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
471 LLVMConstInt(ctx
->i32
, 16, 0), "");
473 return LLVMBuildSExt(ctx
->ac
.builder
,
474 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
479 void si_llvm_load_input_vs(
480 struct si_shader_context
*ctx
,
481 unsigned input_index
,
484 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
485 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
487 if (vs_blit_property
) {
488 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
489 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
490 LLVMIntULE
, vertex_id
,
492 /* Use LLVMIntNE, because we have 3 vertices and only
493 * the middle one should use y2.
495 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
496 LLVMIntNE
, vertex_id
,
499 if (input_index
== 0) {
501 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
502 ctx
->param_vs_blit_inputs
);
503 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
504 ctx
->param_vs_blit_inputs
+ 1);
506 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
507 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
508 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
509 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
511 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
513 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
516 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
517 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
518 out
[2] = LLVMGetParam(ctx
->main_fn
,
519 ctx
->param_vs_blit_inputs
+ 2);
520 out
[3] = ctx
->ac
.f32_1
;
524 /* Color or texture coordinates: */
525 assert(input_index
== 1);
527 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
528 for (int i
= 0; i
< 4; i
++) {
529 out
[i
] = LLVMGetParam(ctx
->main_fn
,
530 ctx
->param_vs_blit_inputs
+ 3 + i
);
533 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
534 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
535 ctx
->param_vs_blit_inputs
+ 3);
536 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
537 ctx
->param_vs_blit_inputs
+ 4);
538 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
539 ctx
->param_vs_blit_inputs
+ 5);
540 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
541 ctx
->param_vs_blit_inputs
+ 6);
543 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
545 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
547 out
[2] = LLVMGetParam(ctx
->main_fn
,
548 ctx
->param_vs_blit_inputs
+ 7);
549 out
[3] = LLVMGetParam(ctx
->main_fn
,
550 ctx
->param_vs_blit_inputs
+ 8);
557 unsigned num_fetches
;
558 unsigned fetch_stride
;
559 unsigned num_channels
;
561 LLVMValueRef t_list_ptr
;
562 LLVMValueRef t_offset
;
564 LLVMValueRef vertex_index
;
565 LLVMValueRef input
[3];
567 /* Load the T list */
568 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
570 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
572 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
574 vertex_index
= LLVMGetParam(ctx
->main_fn
,
575 ctx
->param_vertex_index0
+
578 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
580 /* Do multiple loads for special formats. */
582 case SI_FIX_FETCH_RGB_64_FLOAT
:
583 num_fetches
= 3; /* 3 2-dword loads */
587 case SI_FIX_FETCH_RGBA_64_FLOAT
:
588 num_fetches
= 2; /* 2 4-dword loads */
592 case SI_FIX_FETCH_RGB_8
:
593 case SI_FIX_FETCH_RGB_8_INT
:
598 case SI_FIX_FETCH_RGB_16
:
599 case SI_FIX_FETCH_RGB_16_INT
:
607 num_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
610 for (unsigned i
= 0; i
< num_fetches
; i
++) {
611 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
613 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
614 vertex_index
, voffset
,
615 num_channels
, false, true);
616 input
[i
] = ac_build_expand_to_vec4(&ctx
->ac
, input
[i
], num_channels
);
619 /* Break up the vec4 into individual components */
620 for (chan
= 0; chan
< 4; chan
++) {
621 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
622 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
623 input
[0], llvm_chan
, "");
627 case SI_FIX_FETCH_A2_SNORM
:
628 case SI_FIX_FETCH_A2_SSCALED
:
629 case SI_FIX_FETCH_A2_SINT
: {
630 /* The hardware returns an unsigned value; convert it to a
633 LLVMValueRef tmp
= out
[3];
634 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
636 /* First, recover the sign-extended signed integer value. */
637 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
638 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
640 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
642 /* For the integer-like cases, do a natural sign extension.
644 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
645 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
648 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
649 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
650 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
651 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
653 /* Convert back to the right type. */
654 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
656 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
657 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
658 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
659 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
660 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
661 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
667 case SI_FIX_FETCH_RGBA_32_UNORM
:
668 case SI_FIX_FETCH_RGBX_32_UNORM
:
669 for (chan
= 0; chan
< 4; chan
++) {
670 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
671 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
672 out
[chan
], ctx
->f32
, "");
673 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
674 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
676 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
677 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
678 out
[3] = LLVMConstReal(ctx
->f32
, 1);
680 case SI_FIX_FETCH_RGBA_32_SNORM
:
681 case SI_FIX_FETCH_RGBX_32_SNORM
:
682 case SI_FIX_FETCH_RGBA_32_FIXED
:
683 case SI_FIX_FETCH_RGBX_32_FIXED
: {
685 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
686 scale
= 1.0 / 0x10000;
688 scale
= 1.0 / INT_MAX
;
690 for (chan
= 0; chan
< 4; chan
++) {
691 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
692 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
693 out
[chan
], ctx
->f32
, "");
694 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
695 LLVMConstReal(ctx
->f32
, scale
), "");
697 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
698 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
699 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
700 out
[3] = LLVMConstReal(ctx
->f32
, 1);
703 case SI_FIX_FETCH_RGBA_32_USCALED
:
704 for (chan
= 0; chan
< 4; chan
++) {
705 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
706 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
707 out
[chan
], ctx
->f32
, "");
710 case SI_FIX_FETCH_RGBA_32_SSCALED
:
711 for (chan
= 0; chan
< 4; chan
++) {
712 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
713 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
714 out
[chan
], ctx
->f32
, "");
717 case SI_FIX_FETCH_RG_64_FLOAT
:
718 for (chan
= 0; chan
< 2; chan
++)
719 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
721 out
[2] = LLVMConstReal(ctx
->f32
, 0);
722 out
[3] = LLVMConstReal(ctx
->f32
, 1);
724 case SI_FIX_FETCH_RGB_64_FLOAT
:
725 for (chan
= 0; chan
< 3; chan
++)
726 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
728 out
[3] = LLVMConstReal(ctx
->f32
, 1);
730 case SI_FIX_FETCH_RGBA_64_FLOAT
:
731 for (chan
= 0; chan
< 4; chan
++) {
732 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
736 case SI_FIX_FETCH_RGB_8
:
737 case SI_FIX_FETCH_RGB_8_INT
:
738 case SI_FIX_FETCH_RGB_16
:
739 case SI_FIX_FETCH_RGB_16_INT
:
740 for (chan
= 0; chan
< 3; chan
++) {
741 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
745 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
746 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
747 out
[3] = LLVMConstReal(ctx
->f32
, 1);
749 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
755 static void declare_input_vs(
756 struct si_shader_context
*ctx
,
757 unsigned input_index
,
758 const struct tgsi_full_declaration
*decl
,
761 si_llvm_load_input_vs(ctx
, input_index
, out
);
764 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
771 case PIPE_SHADER_VERTEX
:
772 return LLVMGetParam(ctx
->main_fn
,
773 ctx
->param_vs_prim_id
);
774 case PIPE_SHADER_TESS_CTRL
:
775 return ctx
->abi
.tcs_patch_id
;
776 case PIPE_SHADER_TESS_EVAL
:
777 return ctx
->abi
.tes_patch_id
;
778 case PIPE_SHADER_GEOMETRY
:
779 return ctx
->abi
.gs_prim_id
;
787 * Return the value of tgsi_ind_register for indexing.
788 * This is the indirect index with the constant offset added to it.
790 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
791 const struct tgsi_ind_register
*ind
,
797 if (ind
->File
== TGSI_FILE_ADDRESS
) {
798 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
799 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
801 struct tgsi_full_src_register src
= {};
803 src
.Register
.File
= ind
->File
;
804 src
.Register
.Index
= ind
->Index
;
806 /* Set the second index to 0 for constants. */
807 if (ind
->File
== TGSI_FILE_CONSTANT
)
808 src
.Register
.Dimension
= 1;
810 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
813 result
= ac_to_integer(&ctx
->ac
, result
);
817 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
818 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
819 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
820 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
825 * Like si_get_indirect_index, but restricts the return value to a (possibly
826 * undefined) value inside [0..num).
828 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
829 const struct tgsi_ind_register
*ind
,
830 int rel_index
, unsigned num
)
832 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
834 return si_llvm_bound_index(ctx
, result
, num
);
837 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
838 LLVMValueRef vertex_dw_stride
,
839 LLVMValueRef base_addr
,
840 LLVMValueRef vertex_index
,
841 LLVMValueRef param_index
,
842 unsigned input_index
,
847 if (vertex_dw_stride
) {
848 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
849 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
850 vertex_dw_stride
, ""), "");
854 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
855 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
856 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
859 int param
= is_patch
?
860 si_shader_io_get_unique_index_patch(name
[input_index
],
861 index
[input_index
]) :
862 si_shader_io_get_unique_index(name
[input_index
],
865 /* Add the base address of the element. */
866 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
867 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
871 * Calculate a dword address given an input or output register and a stride.
873 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
874 const struct tgsi_full_dst_register
*dst
,
875 const struct tgsi_full_src_register
*src
,
876 LLVMValueRef vertex_dw_stride
,
877 LLVMValueRef base_addr
)
879 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
880 ubyte
*name
, *index
, *array_first
;
882 struct tgsi_full_dst_register reg
;
883 LLVMValueRef vertex_index
= NULL
;
884 LLVMValueRef ind_index
= NULL
;
886 /* Set the register description. The address computation is the same
887 * for sources and destinations. */
889 reg
.Register
.File
= src
->Register
.File
;
890 reg
.Register
.Index
= src
->Register
.Index
;
891 reg
.Register
.Indirect
= src
->Register
.Indirect
;
892 reg
.Register
.Dimension
= src
->Register
.Dimension
;
893 reg
.Indirect
= src
->Indirect
;
894 reg
.Dimension
= src
->Dimension
;
895 reg
.DimIndirect
= src
->DimIndirect
;
899 /* If the register is 2-dimensional (e.g. an array of vertices
900 * in a primitive), calculate the base address of the vertex. */
901 if (reg
.Register
.Dimension
) {
902 if (reg
.Dimension
.Indirect
)
903 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
904 1, reg
.Dimension
.Index
);
906 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
909 /* Get information about the register. */
910 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
911 name
= info
->input_semantic_name
;
912 index
= info
->input_semantic_index
;
913 array_first
= info
->input_array_first
;
914 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
915 name
= info
->output_semantic_name
;
916 index
= info
->output_semantic_index
;
917 array_first
= info
->output_array_first
;
923 if (reg
.Register
.Indirect
) {
924 /* Add the relative address of the element. */
925 if (reg
.Indirect
.ArrayID
)
926 input_index
= array_first
[reg
.Indirect
.ArrayID
];
928 input_index
= reg
.Register
.Index
;
930 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
931 1, reg
.Register
.Index
- input_index
);
933 input_index
= reg
.Register
.Index
;
936 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
937 base_addr
, vertex_index
,
938 ind_index
, input_index
,
940 !reg
.Register
.Dimension
);
943 /* The offchip buffer layout for TCS->TES is
945 * - attribute 0 of patch 0 vertex 0
946 * - attribute 0 of patch 0 vertex 1
947 * - attribute 0 of patch 0 vertex 2
949 * - attribute 0 of patch 1 vertex 0
950 * - attribute 0 of patch 1 vertex 1
952 * - attribute 1 of patch 0 vertex 0
953 * - attribute 1 of patch 0 vertex 1
955 * - per patch attribute 0 of patch 0
956 * - per patch attribute 0 of patch 1
959 * Note that every attribute has 4 components.
961 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
962 LLVMValueRef rel_patch_id
,
963 LLVMValueRef vertex_index
,
964 LLVMValueRef param_index
)
966 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
967 LLVMValueRef param_stride
, constant16
;
969 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
970 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
971 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
974 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
976 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
977 vertices_per_patch
, "");
979 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
982 param_stride
= total_vertices
;
984 base_addr
= rel_patch_id
;
985 param_stride
= num_patches
;
988 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
989 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
990 param_stride
, ""), "");
992 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
995 LLVMValueRef patch_data_offset
=
996 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
998 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
999 patch_data_offset
, "");
1004 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1005 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1006 struct si_shader_context
*ctx
,
1007 LLVMValueRef vertex_index
,
1008 LLVMValueRef param_index
,
1009 unsigned param_base
,
1014 unsigned param_index_base
;
1016 param_index_base
= is_patch
?
1017 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1018 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1021 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1022 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1025 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1028 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1029 vertex_index
, param_index
);
1032 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1033 struct si_shader_context
*ctx
,
1034 const struct tgsi_full_dst_register
*dst
,
1035 const struct tgsi_full_src_register
*src
)
1037 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1038 ubyte
*name
, *index
, *array_first
;
1039 struct tgsi_full_src_register reg
;
1040 LLVMValueRef vertex_index
= NULL
;
1041 LLVMValueRef param_index
= NULL
;
1042 unsigned param_base
;
1044 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1046 if (reg
.Register
.Dimension
) {
1048 if (reg
.Dimension
.Indirect
)
1049 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1050 1, reg
.Dimension
.Index
);
1052 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1055 /* Get information about the register. */
1056 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1057 name
= info
->input_semantic_name
;
1058 index
= info
->input_semantic_index
;
1059 array_first
= info
->input_array_first
;
1060 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1061 name
= info
->output_semantic_name
;
1062 index
= info
->output_semantic_index
;
1063 array_first
= info
->output_array_first
;
1069 if (reg
.Register
.Indirect
) {
1070 if (reg
.Indirect
.ArrayID
)
1071 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1073 param_base
= reg
.Register
.Index
;
1075 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1076 1, reg
.Register
.Index
- param_base
);
1079 param_base
= reg
.Register
.Index
;
1082 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1083 param_index
, param_base
,
1084 name
, index
, !reg
.Register
.Dimension
);
1087 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1088 LLVMTypeRef type
, unsigned swizzle
,
1089 LLVMValueRef buffer
, LLVMValueRef offset
,
1090 LLVMValueRef base
, bool can_speculate
)
1092 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1093 LLVMValueRef value
, value2
;
1094 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1096 if (swizzle
== ~0) {
1097 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1098 0, 1, 0, can_speculate
, false);
1100 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1103 if (!llvm_type_is_64bit(ctx
, type
)) {
1104 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1105 0, 1, 0, can_speculate
, false);
1107 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1108 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1109 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1112 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1113 swizzle
* 4, 1, 0, can_speculate
, false);
1115 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1116 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1118 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1124 * \param type output value type
1125 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1126 * \param dw_addr address in dwords
1128 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1129 LLVMTypeRef type
, unsigned swizzle
,
1130 LLVMValueRef dw_addr
)
1132 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1135 if (swizzle
== ~0) {
1136 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1138 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1139 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1141 return lp_build_gather_values(&ctx
->gallivm
, values
,
1145 /* Split 64-bit loads. */
1146 if (llvm_type_is_64bit(ctx
, type
)) {
1147 LLVMValueRef lo
, hi
;
1149 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1150 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1151 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1154 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1155 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1157 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1159 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1165 * \param swizzle offset (typically 0..3)
1166 * \param dw_addr address in dwords
1167 * \param value value to store
1169 static void lds_store(struct si_shader_context
*ctx
,
1170 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1173 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1174 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1176 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1181 TESS_OFFCHIP_RING_TCS
,
1182 TESS_OFFCHIP_RING_TES
,
1185 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1186 enum si_tess_ring ring
)
1188 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1189 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1190 ctx
->param_tcs_out_lds_layout
;
1191 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1193 /* TCS only receives high 13 bits of the address. */
1194 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1195 addr
= LLVMBuildAnd(builder
, addr
,
1196 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1199 if (ring
== TCS_FACTOR_RING
) {
1200 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1201 addr
= LLVMBuildAdd(builder
, addr
,
1202 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1205 LLVMValueRef desc
[4];
1207 desc
[1] = LLVMConstInt(ctx
->i32
,
1208 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1209 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1210 desc
[3] = LLVMConstInt(ctx
->i32
,
1211 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1212 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1213 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1214 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1215 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1216 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1218 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1221 static LLVMValueRef
fetch_input_tcs(
1222 struct lp_build_tgsi_context
*bld_base
,
1223 const struct tgsi_full_src_register
*reg
,
1224 enum tgsi_opcode_type type
, unsigned swizzle
)
1226 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1227 LLVMValueRef dw_addr
, stride
;
1229 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1230 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1231 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1233 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1236 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1238 LLVMValueRef vertex_index
,
1239 LLVMValueRef param_index
,
1240 unsigned const_index
,
1242 unsigned driver_location
,
1244 unsigned num_components
,
1249 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1250 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1251 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1252 LLVMValueRef dw_addr
, stride
;
1254 driver_location
= driver_location
/ 4;
1257 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1258 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1262 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1264 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1265 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1270 /* Add the constant index to the indirect index */
1271 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1272 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1274 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1280 names
= info
->input_semantic_name
;
1281 indices
= info
->input_semantic_index
;
1283 names
= info
->output_semantic_name
;
1284 indices
= info
->output_semantic_index
;
1287 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1288 vertex_index
, param_index
,
1293 LLVMValueRef value
[4];
1294 for (unsigned i
= 0; i
< num_components
; i
++) {
1295 unsigned offset
= i
;
1296 if (llvm_type_is_64bit(ctx
, type
))
1299 offset
+= component
;
1300 value
[i
+ component
] = lds_load(bld_base
, type
, offset
, dw_addr
);
1303 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1306 static LLVMValueRef
fetch_output_tcs(
1307 struct lp_build_tgsi_context
*bld_base
,
1308 const struct tgsi_full_src_register
*reg
,
1309 enum tgsi_opcode_type type
, unsigned swizzle
)
1311 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1312 LLVMValueRef dw_addr
, stride
;
1314 if (reg
->Register
.Dimension
) {
1315 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1316 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1317 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1319 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1320 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1323 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1326 static LLVMValueRef
fetch_input_tes(
1327 struct lp_build_tgsi_context
*bld_base
,
1328 const struct tgsi_full_src_register
*reg
,
1329 enum tgsi_opcode_type type
, unsigned swizzle
)
1331 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1332 LLVMValueRef base
, addr
;
1334 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1335 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1337 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1338 ctx
->tess_offchip_ring
, base
, addr
, true);
1341 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1343 LLVMValueRef vertex_index
,
1344 LLVMValueRef param_index
,
1345 unsigned const_index
,
1347 unsigned driver_location
,
1349 unsigned num_components
,
1354 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1355 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1356 LLVMValueRef base
, addr
;
1358 driver_location
= driver_location
/ 4;
1360 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1363 /* Add the constant index to the indirect index */
1364 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1365 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1367 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1370 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1371 param_index
, driver_location
,
1372 info
->input_semantic_name
,
1373 info
->input_semantic_index
,
1376 /* TODO: This will generate rather ordinary llvm code, although it
1377 * should be easy for the optimiser to fix up. In future we might want
1378 * to refactor buffer_load(), but for now this maximises code sharing
1379 * between the NIR and TGSI backends.
1381 LLVMValueRef value
[4];
1382 for (unsigned i
= 0; i
< num_components
; i
++) {
1383 unsigned offset
= i
;
1384 if (llvm_type_is_64bit(ctx
, type
))
1387 offset
+= component
;
1388 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1389 ctx
->tess_offchip_ring
, base
, addr
, true);
1392 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1395 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1396 const struct tgsi_full_instruction
*inst
,
1397 const struct tgsi_opcode_info
*info
,
1399 LLVMValueRef dst
[4])
1401 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1402 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1403 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1404 unsigned chan_index
;
1405 LLVMValueRef dw_addr
, stride
;
1406 LLVMValueRef buffer
, base
, buf_addr
;
1407 LLVMValueRef values
[4];
1408 bool skip_lds_store
;
1409 bool is_tess_factor
= false, is_tess_inner
= false;
1411 /* Only handle per-patch and per-vertex outputs here.
1412 * Vectors will be lowered to scalars and this function will be called again.
1414 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1415 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1416 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1420 if (reg
->Register
.Dimension
) {
1421 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1422 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1423 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1424 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1426 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1427 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1428 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1430 if (!reg
->Register
.Indirect
) {
1431 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1433 /* Always write tess factors into LDS for the TCS epilog. */
1434 if (name
== TGSI_SEMANTIC_TESSINNER
||
1435 name
== TGSI_SEMANTIC_TESSOUTER
) {
1436 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1437 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1438 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1439 is_tess_factor
= true;
1440 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1445 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1447 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1448 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1450 uint32_t writemask
= reg
->Register
.WriteMask
;
1452 chan_index
= u_bit_scan(&writemask
);
1453 LLVMValueRef value
= dst
[chan_index
];
1455 if (inst
->Instruction
.Saturate
)
1456 value
= ac_build_clamp(&ctx
->ac
, value
);
1458 /* Skip LDS stores if there is no LDS read of this output. */
1459 if (!skip_lds_store
)
1460 lds_store(ctx
, chan_index
, dw_addr
, value
);
1462 value
= ac_to_integer(&ctx
->ac
, value
);
1463 values
[chan_index
] = value
;
1465 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1466 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1468 4 * chan_index
, 1, 0, true, false);
1471 /* Write tess factors into VGPRs for the epilog. */
1472 if (is_tess_factor
&&
1473 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1474 if (!is_tess_inner
) {
1475 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1476 ctx
->invoc0_tess_factors
[chan_index
]);
1477 } else if (chan_index
< 2) {
1478 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1479 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1484 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1485 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1487 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1488 base
, 0, 1, 0, true, false);
1492 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1493 const struct nir_variable
*var
,
1494 LLVMValueRef vertex_index
,
1495 LLVMValueRef param_index
,
1496 unsigned const_index
,
1500 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1501 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1502 const unsigned component
= var
->data
.location_frac
;
1503 const bool is_patch
= var
->data
.patch
;
1504 unsigned driver_location
= var
->data
.driver_location
;
1505 LLVMValueRef dw_addr
, stride
;
1506 LLVMValueRef buffer
, base
, addr
;
1507 LLVMValueRef values
[4];
1508 bool skip_lds_store
;
1509 bool is_tess_factor
= false, is_tess_inner
= false;
1511 driver_location
= driver_location
/ 4;
1514 /* Add the constant index to the indirect index */
1515 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1516 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1518 if (const_index
!= 0)
1519 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1523 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1524 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1525 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1526 vertex_index
, param_index
,
1528 info
->output_semantic_name
,
1529 info
->output_semantic_index
,
1532 skip_lds_store
= !info
->reads_pervertex_outputs
;
1534 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1535 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1536 vertex_index
, param_index
,
1538 info
->output_semantic_name
,
1539 info
->output_semantic_index
,
1542 skip_lds_store
= !info
->reads_perpatch_outputs
;
1545 int name
= info
->output_semantic_name
[driver_location
];
1547 /* Always write tess factors into LDS for the TCS epilog. */
1548 if (name
== TGSI_SEMANTIC_TESSINNER
||
1549 name
== TGSI_SEMANTIC_TESSOUTER
) {
1550 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1551 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1552 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1553 is_tess_factor
= true;
1554 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1559 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1561 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1563 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1564 param_index
, driver_location
,
1565 info
->output_semantic_name
,
1566 info
->output_semantic_index
,
1569 for (unsigned chan
= 0; chan
< 4; chan
++) {
1570 if (!(writemask
& (1 << chan
)))
1572 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1574 /* Skip LDS stores if there is no LDS read of this output. */
1575 if (!skip_lds_store
)
1576 lds_store(ctx
, chan
, dw_addr
, value
);
1578 value
= ac_to_integer(&ctx
->ac
, value
);
1579 values
[chan
] = value
;
1581 if (writemask
!= 0xF && !is_tess_factor
) {
1582 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1584 4 * chan
, 1, 0, true, false);
1587 /* Write tess factors into VGPRs for the epilog. */
1588 if (is_tess_factor
&&
1589 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1590 if (!is_tess_inner
) {
1591 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1592 ctx
->invoc0_tess_factors
[chan
]);
1593 } else if (chan
< 2) {
1594 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1595 ctx
->invoc0_tess_factors
[4 + chan
]);
1600 if (writemask
== 0xF && !is_tess_factor
) {
1601 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1603 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1604 base
, 0, 1, 0, true, false);
1608 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1609 unsigned input_index
,
1610 unsigned vtx_offset_param
,
1614 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1615 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1616 struct si_shader
*shader
= ctx
->shader
;
1617 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1618 LLVMValueRef vtx_offset
, soffset
;
1619 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1620 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1621 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1625 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1627 /* GFX9 has the ESGS ring in LDS. */
1628 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1629 unsigned index
= vtx_offset_param
;
1631 switch (index
/ 2) {
1633 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1634 index
% 2 ? 16 : 0, 16);
1637 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1638 index
% 2 ? 16 : 0, 16);
1641 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1642 index
% 2 ? 16 : 0, 16);
1649 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1650 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1651 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1654 /* GFX6: input load from the ESGS ring in memory. */
1655 if (swizzle
== ~0) {
1656 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1658 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1659 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1662 return lp_build_gather_values(&ctx
->gallivm
, values
,
1666 /* Get the vertex offset parameter on GFX6. */
1667 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1669 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1671 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1673 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1674 vtx_offset
, soffset
, 0, 1, 0, true, false);
1675 if (llvm_type_is_64bit(ctx
, type
)) {
1676 LLVMValueRef value2
;
1677 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1679 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1680 ctx
->i32_0
, vtx_offset
, soffset
,
1681 0, 1, 0, true, false);
1682 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1684 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1687 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1689 unsigned driver_location
,
1691 unsigned num_components
,
1692 unsigned vertex_index
,
1693 unsigned const_index
,
1696 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1698 LLVMValueRef value
[4];
1699 for (unsigned i
= 0; i
< num_components
; i
++) {
1700 unsigned offset
= i
;
1701 if (llvm_type_is_64bit(ctx
, type
))
1704 offset
+= component
;
1705 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1706 vertex_index
, type
, offset
);
1709 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1712 static LLVMValueRef
fetch_input_gs(
1713 struct lp_build_tgsi_context
*bld_base
,
1714 const struct tgsi_full_src_register
*reg
,
1715 enum tgsi_opcode_type type
,
1718 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1719 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1721 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1722 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1723 return get_primitive_id(ctx
, swizzle
);
1725 if (!reg
->Register
.Dimension
)
1728 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1729 reg
->Dimension
.Index
,
1730 tgsi2llvmtype(bld_base
, type
),
1734 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1736 switch (interpolate
) {
1737 case TGSI_INTERPOLATE_CONSTANT
:
1740 case TGSI_INTERPOLATE_LINEAR
:
1741 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1742 return SI_PARAM_LINEAR_SAMPLE
;
1743 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1744 return SI_PARAM_LINEAR_CENTROID
;
1746 return SI_PARAM_LINEAR_CENTER
;
1748 case TGSI_INTERPOLATE_COLOR
:
1749 case TGSI_INTERPOLATE_PERSPECTIVE
:
1750 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1751 return SI_PARAM_PERSP_SAMPLE
;
1752 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1753 return SI_PARAM_PERSP_CENTROID
;
1755 return SI_PARAM_PERSP_CENTER
;
1758 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1763 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1764 unsigned attr_index
, unsigned chan
,
1765 LLVMValueRef prim_mask
,
1766 LLVMValueRef i
, LLVMValueRef j
)
1769 return ac_build_fs_interp(&ctx
->ac
,
1770 LLVMConstInt(ctx
->i32
, chan
, 0),
1771 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1774 return ac_build_fs_interp_mov(&ctx
->ac
,
1775 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1776 LLVMConstInt(ctx
->i32
, chan
, 0),
1777 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1782 * Interpolate a fragment shader input.
1784 * @param ctx context
1785 * @param input_index index of the input in hardware
1786 * @param semantic_name TGSI_SEMANTIC_*
1787 * @param semantic_index semantic index
1788 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1789 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1790 * @param interp_param interpolation weights (i,j)
1791 * @param prim_mask SI_PARAM_PRIM_MASK
1792 * @param face SI_PARAM_FRONT_FACE
1793 * @param result the return value (4 components)
1795 static void interp_fs_input(struct si_shader_context
*ctx
,
1796 unsigned input_index
,
1797 unsigned semantic_name
,
1798 unsigned semantic_index
,
1799 unsigned num_interp_inputs
,
1800 unsigned colors_read_mask
,
1801 LLVMValueRef interp_param
,
1802 LLVMValueRef prim_mask
,
1804 LLVMValueRef result
[4])
1806 LLVMValueRef i
= NULL
, j
= NULL
;
1809 /* fs.constant returns the param from the middle vertex, so it's not
1810 * really useful for flat shading. It's meant to be used for custom
1811 * interpolation (but the intrinsic can't fetch from the other two
1814 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1815 * to do the right thing. The only reason we use fs.constant is that
1816 * fs.interp cannot be used on integers, because they can be equal
1819 * When interp is false we will use fs.constant or for newer llvm,
1820 * amdgcn.interp.mov.
1822 bool interp
= interp_param
!= NULL
;
1825 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1826 LLVMVectorType(ctx
->f32
, 2), "");
1828 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1830 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1834 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1835 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1836 LLVMValueRef is_face_positive
;
1838 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1839 * otherwise it's at offset "num_inputs".
1841 unsigned back_attr_offset
= num_interp_inputs
;
1842 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1843 back_attr_offset
+= 1;
1845 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1846 face
, ctx
->i32_0
, "");
1848 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1849 LLVMValueRef front
, back
;
1851 front
= si_build_fs_interp(ctx
,
1854 back
= si_build_fs_interp(ctx
,
1855 back_attr_offset
, chan
,
1858 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1864 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1865 result
[0] = si_build_fs_interp(ctx
, input_index
,
1866 0, prim_mask
, i
, j
);
1868 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1869 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1871 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1872 result
[chan
] = si_build_fs_interp(ctx
,
1879 void si_llvm_load_input_fs(
1880 struct si_shader_context
*ctx
,
1881 unsigned input_index
,
1882 LLVMValueRef out
[4])
1884 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1885 struct si_shader
*shader
= ctx
->shader
;
1886 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1887 LLVMValueRef main_fn
= ctx
->main_fn
;
1888 LLVMValueRef interp_param
= NULL
;
1889 int interp_param_idx
;
1890 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1891 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1892 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1893 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1895 /* Get colors from input VGPRs (set by the prolog). */
1896 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1897 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1898 unsigned mask
= colors_read
>> (semantic_index
* 4);
1899 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1900 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1902 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1903 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1904 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1905 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1909 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1910 if (interp_param_idx
== -1)
1912 else if (interp_param_idx
) {
1913 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1916 interp_fs_input(ctx
, input_index
, semantic_name
,
1917 semantic_index
, 0, /* this param is unused */
1918 shader
->selector
->info
.colors_read
, interp_param
,
1920 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1924 static void declare_input_fs(
1925 struct si_shader_context
*ctx
,
1926 unsigned input_index
,
1927 const struct tgsi_full_declaration
*decl
,
1928 LLVMValueRef out
[4])
1930 si_llvm_load_input_fs(ctx
, input_index
, out
);
1933 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1935 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1938 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1940 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1942 /* For non-indexed draws, the base vertex set by the driver
1943 * (for direct draws) or the CP (for indirect draws) is the
1944 * first vertex ID, but GLSL expects 0 to be returned.
1946 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1947 ctx
->param_vs_state_bits
);
1948 LLVMValueRef indexed
;
1950 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1951 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1953 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1957 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1959 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1961 LLVMValueRef values
[3];
1962 LLVMValueRef result
;
1964 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1966 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1967 unsigned sizes
[3] = {
1968 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1969 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1970 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1973 for (i
= 0; i
< 3; ++i
)
1974 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1976 result
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1978 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1985 * Load a dword from a constant buffer.
1987 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1988 LLVMValueRef resource
,
1989 LLVMValueRef offset
)
1991 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1992 0, 0, 0, true, true);
1995 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1997 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1998 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1999 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2000 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
2001 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
2003 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2004 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
2005 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2007 LLVMValueRef pos
[4] = {
2008 buffer_load_const(ctx
, resource
, offset0
),
2009 buffer_load_const(ctx
, resource
, offset1
),
2010 LLVMConstReal(ctx
->f32
, 0),
2011 LLVMConstReal(ctx
->f32
, 0)
2014 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2017 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
2019 return abi
->sample_coverage
;
2022 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
2024 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2025 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
2027 LLVMValueRef coord
[4] = {
2028 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
2029 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
2034 /* For triangles, the vector should be (u, v, 1-u-v). */
2035 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
2036 PIPE_PRIM_TRIANGLES
)
2037 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
2038 lp_build_add(bld
, coord
[0], coord
[1]));
2040 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
2043 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
2044 unsigned semantic_name
)
2046 LLVMValueRef base
, addr
;
2048 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
2050 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2051 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
2052 LLVMConstInt(ctx
->i32
, param
, 0));
2054 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
2055 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
2059 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
2060 unsigned varying_id
)
2062 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2063 unsigned semantic_name
;
2065 switch (varying_id
) {
2066 case VARYING_SLOT_TESS_LEVEL_INNER
:
2067 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2069 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2070 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2073 unreachable("unknown tess level");
2076 return load_tess_level(ctx
, semantic_name
);
2080 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2082 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2083 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2084 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2085 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2086 return get_num_tcs_out_vertices(ctx
);
2088 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2091 void si_load_system_value(struct si_shader_context
*ctx
,
2093 const struct tgsi_full_declaration
*decl
)
2095 LLVMValueRef value
= 0;
2097 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2099 switch (decl
->Semantic
.Name
) {
2100 case TGSI_SEMANTIC_INSTANCEID
:
2101 value
= ctx
->abi
.instance_id
;
2104 case TGSI_SEMANTIC_VERTEXID
:
2105 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2107 ctx
->abi
.base_vertex
, "");
2110 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2111 /* Unused. Clarify the meaning in indexed vs. non-indexed
2112 * draws if this is ever used again. */
2116 case TGSI_SEMANTIC_BASEVERTEX
:
2117 value
= get_base_vertex(&ctx
->abi
);
2120 case TGSI_SEMANTIC_BASEINSTANCE
:
2121 value
= ctx
->abi
.start_instance
;
2124 case TGSI_SEMANTIC_DRAWID
:
2125 value
= ctx
->abi
.draw_id
;
2128 case TGSI_SEMANTIC_INVOCATIONID
:
2129 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2130 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2131 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2132 value
= ctx
->abi
.gs_invocation_id
;
2134 assert(!"INVOCATIONID not implemented");
2137 case TGSI_SEMANTIC_POSITION
:
2139 LLVMValueRef pos
[4] = {
2140 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2141 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2142 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2143 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2144 LLVMGetParam(ctx
->main_fn
,
2145 SI_PARAM_POS_W_FLOAT
)),
2147 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2151 case TGSI_SEMANTIC_FACE
:
2152 value
= ctx
->abi
.front_face
;
2155 case TGSI_SEMANTIC_SAMPLEID
:
2156 value
= si_get_sample_id(ctx
);
2159 case TGSI_SEMANTIC_SAMPLEPOS
: {
2160 LLVMValueRef pos
[4] = {
2161 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2162 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2163 LLVMConstReal(ctx
->f32
, 0),
2164 LLVMConstReal(ctx
->f32
, 0)
2166 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2167 TGSI_OPCODE_FRC
, pos
[0]);
2168 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2169 TGSI_OPCODE_FRC
, pos
[1]);
2170 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2174 case TGSI_SEMANTIC_SAMPLEMASK
:
2175 /* This can only occur with the OpenGL Core profile, which
2176 * doesn't support smoothing.
2178 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2181 case TGSI_SEMANTIC_TESSCOORD
:
2182 value
= si_load_tess_coord(&ctx
->abi
);
2185 case TGSI_SEMANTIC_VERTICESIN
:
2186 value
= si_load_patch_vertices_in(&ctx
->abi
);
2189 case TGSI_SEMANTIC_TESSINNER
:
2190 case TGSI_SEMANTIC_TESSOUTER
:
2191 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2194 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2195 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2197 LLVMValueRef buf
, slot
, val
[4];
2200 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2201 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2202 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2203 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2205 for (i
= 0; i
< 4; i
++)
2206 val
[i
] = buffer_load_const(ctx
, buf
,
2207 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2208 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2212 case TGSI_SEMANTIC_PRIMID
:
2213 value
= get_primitive_id(ctx
, 0);
2216 case TGSI_SEMANTIC_GRID_SIZE
:
2217 value
= ctx
->abi
.num_work_groups
;
2220 case TGSI_SEMANTIC_BLOCK_SIZE
:
2221 value
= get_block_size(&ctx
->abi
);
2224 case TGSI_SEMANTIC_BLOCK_ID
:
2226 LLVMValueRef values
[3];
2228 for (int i
= 0; i
< 3; i
++) {
2229 values
[i
] = ctx
->i32_0
;
2230 if (ctx
->abi
.workgroup_ids
[i
]) {
2231 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2234 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2238 case TGSI_SEMANTIC_THREAD_ID
:
2239 value
= ctx
->abi
.local_invocation_ids
;
2242 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2243 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2244 "llvm.amdgcn.ps.live",
2246 LP_FUNC_ATTR_READNONE
);
2247 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2248 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2251 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2252 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2255 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2256 value
= ac_get_thread_id(&ctx
->ac
);
2259 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2261 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2262 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2263 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2264 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2268 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2269 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2270 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2271 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2273 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2274 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2275 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2276 /* All bits set except LSB */
2277 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2280 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2282 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2283 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2284 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2285 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2286 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2287 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2292 assert(!"unknown system value");
2296 ctx
->system_values
[index
] = value
;
2299 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2301 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2303 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2306 assert(!ctx
->ac
.lds
);
2308 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2309 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2311 AC_LOCAL_ADDR_SPACE
);
2312 LLVMSetAlignment(var
, 4);
2314 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2317 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2318 const struct tgsi_full_declaration
*decl
)
2320 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2321 assert(decl
->Range
.First
== decl
->Range
.Last
);
2323 si_declare_compute_memory(ctx
);
2326 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2329 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2330 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2332 /* Do the bounds checking with a descriptor, because
2333 * doing computation and manual bounds checking of 64-bit
2334 * addresses generates horrible VALU code with very high
2335 * VGPR usage and very low SIMD occupancy.
2337 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2339 LLVMValueRef desc0
, desc1
;
2340 if (HAVE_32BIT_POINTERS
) {
2342 desc1
= LLVMConstInt(ctx
->i32
,
2343 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2345 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2346 desc0
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, "");
2347 desc1
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, "");
2348 /* Mask out all bits except BASE_ADDRESS_HI. */
2349 desc1
= LLVMBuildAnd(ctx
->ac
.builder
, desc1
,
2350 LLVMConstInt(ctx
->i32
, ~C_008F04_BASE_ADDRESS_HI
, 0), "");
2353 LLVMValueRef desc_elems
[] = {
2356 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2357 LLVMConstInt(ctx
->i32
,
2358 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2359 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2360 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2361 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2362 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2363 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2366 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2369 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2371 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2372 ctx
->param_const_and_shader_buffers
);
2374 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2375 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2378 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2380 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2381 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2383 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2385 if (sel
->info
.const_buffers_declared
== 1 &&
2386 sel
->info
.shader_buffers_declared
== 0) {
2387 return load_const_buffer_desc_fast_path(ctx
);
2390 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2391 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2392 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2394 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2398 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2400 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2401 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2402 ctx
->param_const_and_shader_buffers
);
2404 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2405 index
= LLVMBuildSub(ctx
->ac
.builder
,
2406 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2409 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2412 static LLVMValueRef
fetch_constant(
2413 struct lp_build_tgsi_context
*bld_base
,
2414 const struct tgsi_full_src_register
*reg
,
2415 enum tgsi_opcode_type type
,
2418 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2419 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2420 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2423 LLVMValueRef addr
, bufp
;
2425 if (swizzle
== LP_CHAN_ALL
) {
2427 LLVMValueRef values
[4];
2428 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2429 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2431 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2434 /* Split 64-bit loads. */
2435 if (tgsi_type_is_64bit(type
)) {
2436 LLVMValueRef lo
, hi
;
2438 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2439 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2440 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2444 idx
= reg
->Register
.Index
* 4 + swizzle
;
2445 if (reg
->Register
.Indirect
) {
2446 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2448 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2451 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2452 if (sel
->info
.const_buffers_declared
== 1 &&
2453 sel
->info
.shader_buffers_declared
== 0) {
2455 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2456 * loads, and up to x4 load opcode merging. However, it leads to horrible
2457 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2459 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2461 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2462 * a descriptor and s_buffer_load_dword using it, so we can't expand
2463 * the pointer into a full descriptor like below. We have to use
2464 * s_load_dword instead. The only case when LLVM 5.0 would select
2465 * s_buffer_load_dword (that we have to prevent) is when we use use
2466 * a literal offset where we don't need bounds checking.
2468 if (ctx
->screen
->info
.chip_class
== SI
&& HAVE_LLVM
< 0x0600 &&
2469 !reg
->Register
.Indirect
) {
2471 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2473 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2474 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2475 return bitcast(bld_base
, type
, result
);
2478 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2479 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2480 return bitcast(bld_base
, type
, result
);
2483 assert(reg
->Register
.Dimension
);
2484 buf
= reg
->Dimension
.Index
;
2486 if (reg
->Dimension
.Indirect
) {
2487 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2489 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2490 reg
->Dimension
.Index
,
2491 ctx
->num_const_buffers
);
2492 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2493 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2494 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2496 bufp
= load_const_buffer_desc(ctx
, buf
);
2498 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2501 /* Initialize arguments for the shader export intrinsic */
2502 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2503 LLVMValueRef
*values
,
2505 struct ac_export_args
*args
)
2507 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2508 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2510 bool is_int8
, is_int10
;
2512 /* Default is 0xf. Adjusted below depending on the format. */
2513 args
->enabled_channels
= 0xf; /* writemask */
2515 /* Specify whether the EXEC mask represents the valid mask */
2516 args
->valid_mask
= 0;
2518 /* Specify whether this is the last export */
2521 /* Specify the target we are exporting */
2522 args
->target
= target
;
2524 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2525 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2526 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2527 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2529 assert(cbuf
>= 0 && cbuf
< 8);
2530 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2531 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2532 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2535 args
->compr
= false;
2536 args
->out
[0] = f32undef
;
2537 args
->out
[1] = f32undef
;
2538 args
->out
[2] = f32undef
;
2539 args
->out
[3] = f32undef
;
2541 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2542 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2543 unsigned bits
, bool hi
) = NULL
;
2545 switch (spi_shader_col_format
) {
2546 case V_028714_SPI_SHADER_ZERO
:
2547 args
->enabled_channels
= 0; /* writemask */
2548 args
->target
= V_008DFC_SQ_EXP_NULL
;
2551 case V_028714_SPI_SHADER_32_R
:
2552 args
->enabled_channels
= 1; /* writemask */
2553 args
->out
[0] = values
[0];
2556 case V_028714_SPI_SHADER_32_GR
:
2557 args
->enabled_channels
= 0x3; /* writemask */
2558 args
->out
[0] = values
[0];
2559 args
->out
[1] = values
[1];
2562 case V_028714_SPI_SHADER_32_AR
:
2563 args
->enabled_channels
= 0x9; /* writemask */
2564 args
->out
[0] = values
[0];
2565 args
->out
[3] = values
[3];
2568 case V_028714_SPI_SHADER_FP16_ABGR
:
2569 packf
= ac_build_cvt_pkrtz_f16
;
2572 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2573 packf
= ac_build_cvt_pknorm_u16
;
2576 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2577 packf
= ac_build_cvt_pknorm_i16
;
2580 case V_028714_SPI_SHADER_UINT16_ABGR
:
2581 packi
= ac_build_cvt_pk_u16
;
2584 case V_028714_SPI_SHADER_SINT16_ABGR
:
2585 packi
= ac_build_cvt_pk_i16
;
2588 case V_028714_SPI_SHADER_32_ABGR
:
2589 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2593 /* Pack f16 or norm_i16/u16. */
2595 for (chan
= 0; chan
< 2; chan
++) {
2596 LLVMValueRef pack_args
[2] = {
2598 values
[2 * chan
+ 1]
2600 LLVMValueRef packed
;
2602 packed
= packf(&ctx
->ac
, pack_args
);
2603 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2605 args
->compr
= 1; /* COMPR flag */
2609 for (chan
= 0; chan
< 2; chan
++) {
2610 LLVMValueRef pack_args
[2] = {
2611 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2612 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2614 LLVMValueRef packed
;
2616 packed
= packi(&ctx
->ac
, pack_args
,
2617 is_int8
? 8 : is_int10
? 10 : 16,
2619 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2621 args
->compr
= 1; /* COMPR flag */
2625 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2628 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2630 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2631 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2632 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2633 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2634 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2635 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2636 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2637 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2639 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2642 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2643 SI_PARAM_ALPHA_REF
);
2644 LLVMValueRef alpha_pass
=
2645 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2646 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2648 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2652 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2654 unsigned samplemask_param
)
2656 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2657 LLVMValueRef coverage
;
2659 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2660 coverage
= LLVMGetParam(ctx
->main_fn
,
2662 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2664 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2666 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2668 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2671 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2672 LLVMConstReal(ctx
->f32
,
2673 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2675 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2678 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2679 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2683 unsigned const_chan
;
2684 LLVMValueRef base_elt
;
2685 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2686 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2687 SI_VS_CONST_CLIP_PLANES
, 0);
2688 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2690 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2691 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2696 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2698 /* Compute dot products of position and user clip plane vectors */
2699 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2700 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2702 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2703 const_chan
) * 4, 0);
2704 base_elt
= buffer_load_const(ctx
, const_resource
,
2707 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2708 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2709 out_elts
[const_chan
]));
2713 args
->enabled_channels
= 0xf;
2714 args
->valid_mask
= 0;
2716 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2721 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2725 if (so
->num_outputs
)
2726 fprintf(stderr
, "STREAMOUT\n");
2728 for (i
= 0; i
< so
->num_outputs
; i
++) {
2729 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2730 so
->output
[i
].start_component
;
2731 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2732 i
, so
->output
[i
].output_buffer
,
2733 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2734 so
->output
[i
].register_index
,
2735 mask
& 1 ? "x" : "",
2736 mask
& 2 ? "y" : "",
2737 mask
& 4 ? "z" : "",
2738 mask
& 8 ? "w" : "");
2742 static void emit_streamout_output(struct si_shader_context
*ctx
,
2743 LLVMValueRef
const *so_buffers
,
2744 LLVMValueRef
const *so_write_offsets
,
2745 struct pipe_stream_output
*stream_out
,
2746 struct si_shader_output_values
*shader_out
)
2748 unsigned buf_idx
= stream_out
->output_buffer
;
2749 unsigned start
= stream_out
->start_component
;
2750 unsigned num_comps
= stream_out
->num_components
;
2751 LLVMValueRef out
[4];
2753 assert(num_comps
&& num_comps
<= 4);
2754 if (!num_comps
|| num_comps
> 4)
2757 /* Load the output as int. */
2758 for (int j
= 0; j
< num_comps
; j
++) {
2759 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2761 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2764 /* Pack the output. */
2765 LLVMValueRef vdata
= NULL
;
2767 switch (num_comps
) {
2768 case 1: /* as i32 */
2771 case 2: /* as v2i32 */
2772 case 3: /* as v4i32 (aligned to 4) */
2773 case 4: /* as v4i32 */
2774 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2775 for (int j
= 0; j
< num_comps
; j
++) {
2776 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2777 LLVMConstInt(ctx
->i32
, j
, 0), "");
2782 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2784 so_write_offsets
[buf_idx
],
2786 stream_out
->dst_offset
* 4, 1, 1, true, false);
2790 * Write streamout data to buffers for vertex stream @p stream (different
2791 * vertex streams can occur for GS copy shaders).
2793 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2794 struct si_shader_output_values
*outputs
,
2795 unsigned noutput
, unsigned stream
)
2797 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2798 struct pipe_stream_output_info
*so
= &sel
->so
;
2799 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2801 struct lp_build_if_state if_ctx
;
2803 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2804 LLVMValueRef so_vtx_count
=
2805 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2807 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2809 /* can_emit = tid < so_vtx_count; */
2810 LLVMValueRef can_emit
=
2811 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2813 /* Emit the streamout code conditionally. This actually avoids
2814 * out-of-bounds buffer access. The hw tells us via the SGPR
2815 * (so_vtx_count) which threads are allowed to emit streamout data. */
2816 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2818 /* The buffer offset is computed as follows:
2819 * ByteOffset = streamout_offset[buffer_id]*4 +
2820 * (streamout_write_index + thread_id)*stride[buffer_id] +
2824 LLVMValueRef so_write_index
=
2825 LLVMGetParam(ctx
->main_fn
,
2826 ctx
->param_streamout_write_index
);
2828 /* Compute (streamout_write_index + thread_id). */
2829 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2831 /* Load the descriptor and compute the write offset for each
2832 * enabled buffer. */
2833 LLVMValueRef so_write_offset
[4] = {};
2834 LLVMValueRef so_buffers
[4];
2835 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2836 ctx
->param_rw_buffers
);
2838 for (i
= 0; i
< 4; i
++) {
2842 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2843 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2845 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2847 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2848 ctx
->param_streamout_offset
[i
]);
2849 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2851 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2852 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2853 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2856 /* Write streamout data. */
2857 for (i
= 0; i
< so
->num_outputs
; i
++) {
2858 unsigned reg
= so
->output
[i
].register_index
;
2863 if (stream
!= so
->output
[i
].stream
)
2866 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2867 &so
->output
[i
], &outputs
[reg
]);
2870 lp_build_endif(&if_ctx
);
2873 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2874 LLVMValueRef
*values
)
2876 struct ac_export_args args
;
2878 si_llvm_init_export_args(ctx
, values
,
2879 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2880 ac_build_export(&ctx
->ac
, &args
);
2883 static void si_build_param_exports(struct si_shader_context
*ctx
,
2884 struct si_shader_output_values
*outputs
,
2887 struct si_shader
*shader
= ctx
->shader
;
2888 unsigned param_count
= 0;
2890 for (unsigned i
= 0; i
< noutput
; i
++) {
2891 unsigned semantic_name
= outputs
[i
].semantic_name
;
2892 unsigned semantic_index
= outputs
[i
].semantic_index
;
2894 if (outputs
[i
].vertex_stream
[0] != 0 &&
2895 outputs
[i
].vertex_stream
[1] != 0 &&
2896 outputs
[i
].vertex_stream
[2] != 0 &&
2897 outputs
[i
].vertex_stream
[3] != 0)
2900 switch (semantic_name
) {
2901 case TGSI_SEMANTIC_LAYER
:
2902 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2903 case TGSI_SEMANTIC_CLIPDIST
:
2904 case TGSI_SEMANTIC_COLOR
:
2905 case TGSI_SEMANTIC_BCOLOR
:
2906 case TGSI_SEMANTIC_PRIMID
:
2907 case TGSI_SEMANTIC_FOG
:
2908 case TGSI_SEMANTIC_TEXCOORD
:
2909 case TGSI_SEMANTIC_GENERIC
:
2915 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2916 semantic_index
< SI_MAX_IO_GENERIC
) &&
2917 shader
->key
.opt
.kill_outputs
&
2918 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2921 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2923 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2924 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2927 shader
->info
.nr_param_exports
= param_count
;
2930 /* Generate export instructions for hardware VS shader stage */
2931 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2932 struct si_shader_output_values
*outputs
,
2935 struct si_shader
*shader
= ctx
->shader
;
2936 struct ac_export_args pos_args
[4] = {};
2937 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2941 /* Build position exports. */
2942 for (i
= 0; i
< noutput
; i
++) {
2943 switch (outputs
[i
].semantic_name
) {
2944 case TGSI_SEMANTIC_POSITION
:
2945 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2946 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2948 case TGSI_SEMANTIC_PSIZE
:
2949 psize_value
= outputs
[i
].values
[0];
2951 case TGSI_SEMANTIC_LAYER
:
2952 layer_value
= outputs
[i
].values
[0];
2954 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2955 viewport_index_value
= outputs
[i
].values
[0];
2957 case TGSI_SEMANTIC_EDGEFLAG
:
2958 edgeflag_value
= outputs
[i
].values
[0];
2960 case TGSI_SEMANTIC_CLIPDIST
:
2961 if (!shader
->key
.opt
.clip_disable
) {
2962 unsigned index
= 2 + outputs
[i
].semantic_index
;
2963 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2964 V_008DFC_SQ_EXP_POS
+ index
,
2968 case TGSI_SEMANTIC_CLIPVERTEX
:
2969 if (!shader
->key
.opt
.clip_disable
) {
2970 si_llvm_emit_clipvertex(ctx
, pos_args
,
2977 /* We need to add the position output manually if it's missing. */
2978 if (!pos_args
[0].out
[0]) {
2979 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2980 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2981 pos_args
[0].done
= 0; /* last export? */
2982 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2983 pos_args
[0].compr
= 0; /* COMPR flag */
2984 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2985 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2986 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2987 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2990 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2991 if (shader
->selector
->info
.writes_psize
||
2992 shader
->selector
->info
.writes_edgeflag
||
2993 shader
->selector
->info
.writes_viewport_index
||
2994 shader
->selector
->info
.writes_layer
) {
2995 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2996 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2997 (shader
->selector
->info
.writes_layer
<< 2);
2999 pos_args
[1].valid_mask
= 0; /* EXEC mask */
3000 pos_args
[1].done
= 0; /* last export? */
3001 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
3002 pos_args
[1].compr
= 0; /* COMPR flag */
3003 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
3004 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
3005 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
3006 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
3008 if (shader
->selector
->info
.writes_psize
)
3009 pos_args
[1].out
[0] = psize_value
;
3011 if (shader
->selector
->info
.writes_edgeflag
) {
3012 /* The output is a float, but the hw expects an integer
3013 * with the first bit containing the edge flag. */
3014 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
3017 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3021 /* The LLVM intrinsic expects a float. */
3022 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3025 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3026 /* GFX9 has the layer in out.z[10:0] and the viewport
3027 * index in out.z[19:16].
3029 if (shader
->selector
->info
.writes_layer
)
3030 pos_args
[1].out
[2] = layer_value
;
3032 if (shader
->selector
->info
.writes_viewport_index
) {
3033 LLVMValueRef v
= viewport_index_value
;
3035 v
= ac_to_integer(&ctx
->ac
, v
);
3036 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3037 LLVMConstInt(ctx
->i32
, 16, 0), "");
3038 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3039 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3040 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3041 pos_args
[1].enabled_channels
|= 1 << 2;
3044 if (shader
->selector
->info
.writes_layer
)
3045 pos_args
[1].out
[2] = layer_value
;
3047 if (shader
->selector
->info
.writes_viewport_index
) {
3048 pos_args
[1].out
[3] = viewport_index_value
;
3049 pos_args
[1].enabled_channels
|= 1 << 3;
3054 for (i
= 0; i
< 4; i
++)
3055 if (pos_args
[i
].out
[0])
3056 shader
->info
.nr_pos_exports
++;
3059 for (i
= 0; i
< 4; i
++) {
3060 if (!pos_args
[i
].out
[0])
3063 /* Specify the target we are exporting */
3064 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3066 if (pos_idx
== shader
->info
.nr_pos_exports
)
3067 /* Specify that this is the last export */
3068 pos_args
[i
].done
= 1;
3070 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3073 /* Build parameter exports. */
3074 si_build_param_exports(ctx
, outputs
, noutput
);
3078 * Forward all outputs from the vertex shader to the TES. This is only used
3079 * for the fixed function TCS.
3081 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3083 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3084 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3085 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3088 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3089 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3090 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3092 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3093 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3094 lds_vertex_stride
, "");
3095 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3096 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3098 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3100 unsigned i
= u_bit_scan64(&inputs
);
3102 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3103 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3106 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3107 get_rel_patch_id(ctx
),
3109 LLVMConstInt(ctx
->i32
, i
, 0));
3111 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3114 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3115 buffer_offset
, 0, 1, 0, true, false);
3119 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3120 LLVMValueRef rel_patch_id
,
3121 LLVMValueRef invocation_id
,
3122 LLVMValueRef tcs_out_current_patch_data_offset
,
3123 LLVMValueRef invoc0_tf_outer
[4],
3124 LLVMValueRef invoc0_tf_inner
[2])
3126 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3127 struct si_shader
*shader
= ctx
->shader
;
3128 unsigned tess_inner_index
, tess_outer_index
;
3129 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3130 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3131 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3132 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3134 /* Add a barrier before loading tess factors from LDS. */
3135 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3136 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3138 /* Do this only for invocation 0, because the tess levels are per-patch,
3141 * This can't jump, because invocation 0 executes this. It should
3142 * at least mask out the loads and stores for other invocations.
3144 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3145 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3146 invocation_id
, ctx
->i32_0
, ""));
3148 /* Determine the layout of one tess factor element in the buffer. */
3149 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3150 case PIPE_PRIM_LINES
:
3151 stride
= 2; /* 2 dwords, 1 vec2 store */
3155 case PIPE_PRIM_TRIANGLES
:
3156 stride
= 4; /* 4 dwords, 1 vec4 store */
3160 case PIPE_PRIM_QUADS
:
3161 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3170 for (i
= 0; i
< 4; i
++) {
3171 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3172 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3175 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3176 /* Tess factors are in VGPRs. */
3177 for (i
= 0; i
< outer_comps
; i
++)
3178 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3179 for (i
= 0; i
< inner_comps
; i
++)
3180 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3182 /* Load tess_inner and tess_outer from LDS.
3183 * Any invocation can write them, so we can't get them from a temporary.
3185 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3186 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3188 lds_base
= tcs_out_current_patch_data_offset
;
3189 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3190 LLVMConstInt(ctx
->i32
,
3191 tess_inner_index
* 4, 0), "");
3192 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3193 LLVMConstInt(ctx
->i32
,
3194 tess_outer_index
* 4, 0), "");
3196 for (i
= 0; i
< outer_comps
; i
++) {
3198 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3200 for (i
= 0; i
< inner_comps
; i
++) {
3201 inner
[i
] = out
[outer_comps
+i
] =
3202 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3206 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3207 /* For isolines, the hardware expects tess factors in the
3208 * reverse order from what GLSL / TGSI specify.
3210 LLVMValueRef tmp
= out
[0];
3215 /* Convert the outputs to vectors for stores. */
3216 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3220 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3222 /* Get the buffer. */
3223 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3225 /* Get the offset. */
3226 tf_base
= LLVMGetParam(ctx
->main_fn
,
3227 ctx
->param_tcs_factor_offset
);
3228 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3229 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3231 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3232 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3233 rel_patch_id
, ctx
->i32_0
, ""));
3235 /* Store the dynamic HS control word. */
3237 if (ctx
->screen
->info
.chip_class
<= VI
) {
3238 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3239 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3240 1, ctx
->i32_0
, tf_base
,
3241 offset
, 1, 0, true, false);
3245 lp_build_endif(&inner_if_ctx
);
3247 /* Store the tessellation factors. */
3248 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3249 MIN2(stride
, 4), byteoffset
, tf_base
,
3250 offset
, 1, 0, true, false);
3253 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3254 stride
- 4, byteoffset
, tf_base
,
3255 offset
, 1, 0, true, false);
3257 /* Store the tess factors into the offchip buffer if TES reads them. */
3258 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3259 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3260 LLVMValueRef tf_inner_offset
;
3261 unsigned param_outer
, param_inner
;
3263 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3264 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3266 param_outer
= si_shader_io_get_unique_index_patch(
3267 TGSI_SEMANTIC_TESSOUTER
, 0);
3268 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3269 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3271 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3272 util_next_power_of_two(outer_comps
));
3274 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3275 outer_comps
, tf_outer_offset
,
3276 base
, 0, 1, 0, true, false);
3278 param_inner
= si_shader_io_get_unique_index_patch(
3279 TGSI_SEMANTIC_TESSINNER
, 0);
3280 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3281 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3283 inner_vec
= inner_comps
== 1 ? inner
[0] :
3284 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3285 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3286 inner_comps
, tf_inner_offset
,
3287 base
, 0, 1, 0, true, false);
3291 lp_build_endif(&if_ctx
);
3295 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3296 unsigned param
, unsigned return_index
)
3298 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3299 LLVMGetParam(ctx
->main_fn
, param
),
3304 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3305 unsigned param
, unsigned return_index
)
3307 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3308 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3310 return LLVMBuildInsertValue(builder
, ret
,
3311 ac_to_float(&ctx
->ac
, p
),
3316 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3317 unsigned param
, unsigned return_index
)
3319 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3320 LLVMValueRef ptr
, lo
, hi
;
3322 if (HAVE_32BIT_POINTERS
) {
3323 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3324 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3325 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3328 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3329 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3330 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3331 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3332 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3333 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3334 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3337 /* This only writes the tessellation factor levels. */
3338 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3339 unsigned max_outputs
,
3340 LLVMValueRef
*addrs
)
3342 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3343 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3344 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3345 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3347 si_copy_tcs_inputs(bld_base
);
3349 rel_patch_id
= get_rel_patch_id(ctx
);
3350 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3351 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3353 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3354 LLVMBasicBlockRef blocks
[2] = {
3355 LLVMGetInsertBlock(builder
),
3356 ctx
->merged_wrap_if_state
.entry_block
3358 LLVMValueRef values
[2];
3360 lp_build_endif(&ctx
->merged_wrap_if_state
);
3362 values
[0] = rel_patch_id
;
3363 values
[1] = LLVMGetUndef(ctx
->i32
);
3364 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3366 values
[0] = tf_lds_offset
;
3367 values
[1] = LLVMGetUndef(ctx
->i32
);
3368 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3370 values
[0] = invocation_id
;
3371 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3372 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3375 /* Return epilog parameters from this function. */
3376 LLVMValueRef ret
= ctx
->return_value
;
3379 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3380 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3381 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3382 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3383 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3384 /* Tess offchip and tess factor offsets are at the beginning. */
3385 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3386 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3387 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3389 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3390 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3391 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3392 GFX6_SGPR_TCS_OUT_LAYOUT
);
3393 /* Tess offchip and tess factor offsets are after user SGPRs. */
3394 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3395 GFX6_TCS_NUM_USER_SGPR
);
3396 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3397 GFX6_TCS_NUM_USER_SGPR
+ 1);
3398 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3402 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3403 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3404 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3406 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3407 * the invocation_id output does not alias the tcs_rel_ids input,
3408 * which saves a V_MOV on gfx9.
3412 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3413 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3415 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3416 vgpr
++; /* skip the tess factor LDS offset */
3417 for (unsigned i
= 0; i
< 6; i
++) {
3418 LLVMValueRef value
=
3419 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3420 value
= ac_to_float(&ctx
->ac
, value
);
3421 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3424 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3426 ctx
->return_value
= ret
;
3429 /* Pass TCS inputs from LS to TCS on GFX9. */
3430 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3432 LLVMValueRef ret
= ctx
->return_value
;
3434 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3435 if (HAVE_32BIT_POINTERS
)
3436 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3437 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3438 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3439 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3440 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3442 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3443 8 + SI_SGPR_RW_BUFFERS
);
3444 ret
= si_insert_input_ptr(ctx
, ret
,
3445 ctx
->param_bindless_samplers_and_images
,
3446 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3448 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3449 8 + SI_SGPR_VS_STATE_BITS
);
3451 #if !HAVE_32BIT_POINTERS
3452 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3453 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3456 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3457 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3458 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3459 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3460 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3461 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3463 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3464 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3465 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3467 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3468 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3470 ctx
->return_value
= ret
;
3473 /* Pass GS inputs from ES to GS on GFX9. */
3474 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3476 LLVMValueRef ret
= ctx
->return_value
;
3478 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3479 if (HAVE_32BIT_POINTERS
)
3480 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3481 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3482 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3483 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3485 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3486 8 + SI_SGPR_RW_BUFFERS
);
3487 ret
= si_insert_input_ptr(ctx
, ret
,
3488 ctx
->param_bindless_samplers_and_images
,
3489 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3491 #if !HAVE_32BIT_POINTERS
3492 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3493 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3497 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3498 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3500 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3502 for (unsigned i
= 0; i
< 5; i
++) {
3503 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3504 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3506 ctx
->return_value
= ret
;
3509 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3510 unsigned max_outputs
,
3511 LLVMValueRef
*addrs
)
3513 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3514 struct si_shader
*shader
= ctx
->shader
;
3515 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3517 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3518 ctx
->param_rel_auto_id
);
3519 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3520 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3521 vertex_dw_stride
, "");
3523 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3524 * its inputs from it. */
3525 for (i
= 0; i
< info
->num_outputs
; i
++) {
3526 unsigned name
= info
->output_semantic_name
[i
];
3527 unsigned index
= info
->output_semantic_index
[i
];
3529 /* The ARB_shader_viewport_layer_array spec contains the
3532 * 2) What happens if gl_ViewportIndex or gl_Layer is
3533 * written in the vertex shader and a geometry shader is
3536 * RESOLVED: The value written by the last vertex processing
3537 * stage is used. If the last vertex processing stage
3538 * (vertex, tessellation evaluation or geometry) does not
3539 * statically assign to gl_ViewportIndex or gl_Layer, index
3540 * or layer zero is assumed.
3542 * So writes to those outputs in VS-as-LS are simply ignored.
3544 if (name
== TGSI_SEMANTIC_LAYER
||
3545 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3548 int param
= si_shader_io_get_unique_index(name
, index
);
3549 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3550 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3552 for (chan
= 0; chan
< 4; chan
++) {
3553 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3556 lds_store(ctx
, chan
, dw_addr
,
3557 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3561 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3562 si_set_ls_return_value_for_tcs(ctx
);
3565 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3566 unsigned max_outputs
,
3567 LLVMValueRef
*addrs
)
3569 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3570 struct si_shader
*es
= ctx
->shader
;
3571 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3572 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3573 ctx
->param_es2gs_offset
);
3574 LLVMValueRef lds_base
= NULL
;
3578 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3579 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3580 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3581 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3582 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3583 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3584 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3585 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3586 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3589 for (i
= 0; i
< info
->num_outputs
; i
++) {
3592 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3593 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3596 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3597 info
->output_semantic_index
[i
]);
3599 for (chan
= 0; chan
< 4; chan
++) {
3600 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3601 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3603 /* GFX9 has the ESGS ring in LDS. */
3604 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3605 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3609 ac_build_buffer_store_dword(&ctx
->ac
,
3611 out_val
, 1, NULL
, soffset
,
3612 (4 * param
+ chan
) * 4,
3617 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3618 si_set_es_return_value_for_gs(ctx
);
3621 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3623 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3624 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3626 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3629 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3631 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3632 si_get_gs_wave_id(ctx
));
3634 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3635 lp_build_endif(&ctx
->merged_wrap_if_state
);
3638 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3639 unsigned max_outputs
,
3640 LLVMValueRef
*addrs
)
3642 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3643 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3645 assert(info
->num_outputs
<= max_outputs
);
3647 emit_gs_epilogue(ctx
);
3650 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3652 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3653 emit_gs_epilogue(ctx
);
3656 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3657 unsigned max_outputs
,
3658 LLVMValueRef
*addrs
)
3660 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3661 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3662 struct si_shader_output_values
*outputs
= NULL
;
3665 assert(!ctx
->shader
->is_gs_copy_shader
);
3666 assert(info
->num_outputs
<= max_outputs
);
3668 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3670 /* Vertex color clamping.
3672 * This uses a state constant loaded in a user data SGPR and
3673 * an IF statement is added that clamps all colors if the constant
3676 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3677 struct lp_build_if_state if_ctx
;
3678 LLVMValueRef cond
= NULL
;
3679 LLVMValueRef addr
, val
;
3681 for (i
= 0; i
< info
->num_outputs
; i
++) {
3682 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3683 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3686 /* We've found a color. */
3688 /* The state is in the first bit of the user SGPR. */
3689 cond
= LLVMGetParam(ctx
->main_fn
,
3690 ctx
->param_vs_state_bits
);
3691 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3693 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3696 for (j
= 0; j
< 4; j
++) {
3697 addr
= addrs
[4 * i
+ j
];
3698 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3699 val
= ac_build_clamp(&ctx
->ac
, val
);
3700 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3705 lp_build_endif(&if_ctx
);
3708 for (i
= 0; i
< info
->num_outputs
; i
++) {
3709 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3710 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3712 for (j
= 0; j
< 4; j
++) {
3713 outputs
[i
].values
[j
] =
3714 LLVMBuildLoad(ctx
->ac
.builder
,
3717 outputs
[i
].vertex_stream
[j
] =
3718 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3722 if (ctx
->shader
->selector
->so
.num_outputs
)
3723 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3725 /* Export PrimitiveID. */
3726 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3727 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3728 outputs
[i
].semantic_index
= 0;
3729 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3730 for (j
= 1; j
< 4; j
++)
3731 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3733 memset(outputs
[i
].vertex_stream
, 0,
3734 sizeof(outputs
[i
].vertex_stream
));
3738 si_llvm_export_vs(ctx
, outputs
, i
);
3742 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3744 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3746 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3747 &ctx
->outputs
[0][0]);
3750 struct si_ps_exports
{
3752 struct ac_export_args args
[10];
3755 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3756 LLVMValueRef depth
, LLVMValueRef stencil
,
3757 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3759 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3760 struct ac_export_args args
;
3762 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3764 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3767 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3768 LLVMValueRef
*color
, unsigned index
,
3769 unsigned samplemask_param
,
3770 bool is_last
, struct si_ps_exports
*exp
)
3772 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3776 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3777 for (i
= 0; i
< 4; i
++)
3778 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3781 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3782 color
[3] = ctx
->ac
.f32_1
;
3786 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3787 si_alpha_test(bld_base
, color
[3]);
3789 /* Line & polygon smoothing */
3790 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3791 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3794 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3795 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3796 struct ac_export_args args
[8];
3799 /* Get the export arguments, also find out what the last one is. */
3800 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3801 si_llvm_init_export_args(ctx
, color
,
3802 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3803 if (args
[c
].enabled_channels
)
3807 /* Emit all exports. */
3808 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3809 if (is_last
&& last
== c
) {
3810 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3811 args
[c
].done
= 1; /* DONE bit */
3812 } else if (!args
[c
].enabled_channels
)
3813 continue; /* unnecessary NULL export */
3815 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3818 struct ac_export_args args
;
3821 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3824 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3825 args
.done
= 1; /* DONE bit */
3826 } else if (!args
.enabled_channels
)
3827 return; /* unnecessary NULL export */
3829 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3833 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3834 struct si_ps_exports
*exp
)
3836 for (unsigned i
= 0; i
< exp
->num
; i
++)
3837 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3841 * Return PS outputs in this order:
3843 * v[0:3] = color0.xyzw
3844 * v[4:7] = color1.xyzw
3849 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3851 * The alpha-ref SGPR is returned via its original location.
3853 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3854 unsigned max_outputs
,
3855 LLVMValueRef
*addrs
)
3857 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3858 struct si_shader
*shader
= ctx
->shader
;
3859 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3860 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3861 unsigned i
, j
, first_vgpr
, vgpr
;
3863 LLVMValueRef color
[8][4] = {};
3864 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3867 if (ctx
->postponed_kill
)
3868 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3870 /* Read the output values. */
3871 for (i
= 0; i
< info
->num_outputs
; i
++) {
3872 unsigned semantic_name
= info
->output_semantic_name
[i
];
3873 unsigned semantic_index
= info
->output_semantic_index
[i
];
3875 switch (semantic_name
) {
3876 case TGSI_SEMANTIC_COLOR
:
3877 assert(semantic_index
< 8);
3878 for (j
= 0; j
< 4; j
++) {
3879 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3880 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3881 color
[semantic_index
][j
] = result
;
3884 case TGSI_SEMANTIC_POSITION
:
3885 depth
= LLVMBuildLoad(builder
,
3886 addrs
[4 * i
+ 2], "");
3888 case TGSI_SEMANTIC_STENCIL
:
3889 stencil
= LLVMBuildLoad(builder
,
3890 addrs
[4 * i
+ 1], "");
3892 case TGSI_SEMANTIC_SAMPLEMASK
:
3893 samplemask
= LLVMBuildLoad(builder
,
3894 addrs
[4 * i
+ 0], "");
3897 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3902 /* Fill the return structure. */
3903 ret
= ctx
->return_value
;
3906 ret
= LLVMBuildInsertValue(builder
, ret
,
3907 ac_to_integer(&ctx
->ac
,
3908 LLVMGetParam(ctx
->main_fn
,
3909 SI_PARAM_ALPHA_REF
)),
3910 SI_SGPR_ALPHA_REF
, "");
3913 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3914 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3918 for (j
= 0; j
< 4; j
++)
3919 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3922 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3924 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3926 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3928 /* Add the input sample mask for smoothing at the end. */
3929 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3930 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3931 ret
= LLVMBuildInsertValue(builder
, ret
,
3932 LLVMGetParam(ctx
->main_fn
,
3933 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3935 ctx
->return_value
= ret
;
3938 static void membar_emit(
3939 const struct lp_build_tgsi_action
*action
,
3940 struct lp_build_tgsi_context
*bld_base
,
3941 struct lp_build_emit_data
*emit_data
)
3943 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3944 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3945 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3946 unsigned waitcnt
= NOOP_WAITCNT
;
3948 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3949 waitcnt
&= VM_CNT
& LGKM_CNT
;
3951 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3952 TGSI_MEMBAR_SHADER_BUFFER
|
3953 TGSI_MEMBAR_SHADER_IMAGE
))
3956 if (flags
& TGSI_MEMBAR_SHARED
)
3957 waitcnt
&= LGKM_CNT
;
3959 if (waitcnt
!= NOOP_WAITCNT
)
3960 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3963 static void clock_emit(
3964 const struct lp_build_tgsi_action
*action
,
3965 struct lp_build_tgsi_context
*bld_base
,
3966 struct lp_build_emit_data
*emit_data
)
3968 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3969 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3971 emit_data
->output
[0] =
3972 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3973 emit_data
->output
[1] =
3974 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3977 static void si_llvm_emit_ddxy(
3978 const struct lp_build_tgsi_action
*action
,
3979 struct lp_build_tgsi_context
*bld_base
,
3980 struct lp_build_emit_data
*emit_data
)
3982 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3983 unsigned opcode
= emit_data
->info
->opcode
;
3988 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3989 mask
= AC_TID_MASK_LEFT
;
3990 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3991 mask
= AC_TID_MASK_TOP
;
3993 mask
= AC_TID_MASK_TOP_LEFT
;
3995 /* for DDX we want to next X pixel, DDY next Y pixel. */
3996 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3998 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3999 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
4000 emit_data
->output
[emit_data
->chan
] = val
;
4004 * this takes an I,J coordinate pair,
4005 * and works out the X and Y derivatives.
4006 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
4008 static LLVMValueRef
si_llvm_emit_ddxy_interp(
4009 struct lp_build_tgsi_context
*bld_base
,
4010 LLVMValueRef interp_ij
)
4012 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4013 LLVMValueRef result
[4], a
;
4016 for (i
= 0; i
< 2; i
++) {
4017 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
4018 LLVMConstInt(ctx
->i32
, i
, 0), "");
4019 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
4020 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
4023 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
4026 static void interp_fetch_args(
4027 struct lp_build_tgsi_context
*bld_base
,
4028 struct lp_build_emit_data
*emit_data
)
4030 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4031 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4033 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4034 /* offset is in second src, first two channels */
4035 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4038 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4041 emit_data
->arg_count
= 2;
4042 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4043 LLVMValueRef sample_position
;
4044 LLVMValueRef sample_id
;
4045 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4047 /* fetch sample ID, then fetch its sample position,
4048 * and place into first two channels.
4050 sample_id
= lp_build_emit_fetch(bld_base
,
4051 emit_data
->inst
, 1, TGSI_CHAN_X
);
4052 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4054 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4055 * Language 4.50 spec says about interpolateAtSample:
4057 * "Returns the value of the input interpolant variable at
4058 * the location of sample number sample. If multisample
4059 * buffers are not available, the input variable will be
4060 * evaluated at the center of the pixel. If sample sample
4061 * does not exist, the position used to interpolate the
4062 * input variable is undefined."
4064 * This means that sample_id values outside of the valid are
4065 * in fact valid input, and the usual mechanism for loading the
4066 * sample position doesn't work.
4068 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4069 LLVMValueRef center
[4] = {
4070 LLVMConstReal(ctx
->f32
, 0.5),
4071 LLVMConstReal(ctx
->f32
, 0.5),
4076 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
4078 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4081 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4085 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4086 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4089 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4090 emit_data
->arg_count
= 2;
4094 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4095 struct lp_build_tgsi_context
*bld_base
,
4096 struct lp_build_emit_data
*emit_data
)
4098 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4099 struct si_shader
*shader
= ctx
->shader
;
4100 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4101 LLVMValueRef interp_param
;
4102 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4103 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4104 int input_base
, input_array_size
;
4107 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4108 LLVMValueRef array_idx
;
4109 int interp_param_idx
;
4113 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4115 if (input
->Register
.Indirect
) {
4116 unsigned array_id
= input
->Indirect
.ArrayID
;
4119 input_base
= info
->input_array_first
[array_id
];
4120 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4122 input_base
= inst
->Src
[0].Register
.Index
;
4123 input_array_size
= info
->num_inputs
- input_base
;
4126 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4127 1, input
->Register
.Index
- input_base
);
4129 input_base
= inst
->Src
[0].Register
.Index
;
4130 input_array_size
= 1;
4131 array_idx
= ctx
->i32_0
;
4134 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4136 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4137 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4138 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4140 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4142 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4143 if (interp_param_idx
== -1)
4145 else if (interp_param_idx
)
4146 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4148 interp_param
= NULL
;
4150 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4151 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4152 LLVMValueRef ij_out
[2];
4153 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4156 * take the I then J parameters, and the DDX/Y for it, and
4157 * calculate the IJ inputs for the interpolator.
4158 * temp1 = ddx * offset/sample.x + I;
4159 * interp_param.I = ddy * offset/sample.y + temp1;
4160 * temp1 = ddx * offset/sample.x + J;
4161 * interp_param.J = ddy * offset/sample.y + temp1;
4163 for (i
= 0; i
< 2; i
++) {
4164 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4165 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4166 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4167 ddxy_out
, ix_ll
, "");
4168 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4169 ddxy_out
, iy_ll
, "");
4170 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4171 interp_param
, ix_ll
, "");
4172 LLVMValueRef temp1
, temp2
;
4174 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4176 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4178 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4180 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4182 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4184 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4188 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4190 for (chan
= 0; chan
< 4; chan
++) {
4191 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4192 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4194 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4195 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4198 i
= LLVMBuildExtractElement(
4199 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4200 j
= LLVMBuildExtractElement(
4201 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4203 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4206 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4207 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4210 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4211 ctx
->ac
.builder
, gather
, array_idx
, "");
4215 static void vote_all_emit(
4216 const struct lp_build_tgsi_action
*action
,
4217 struct lp_build_tgsi_context
*bld_base
,
4218 struct lp_build_emit_data
*emit_data
)
4220 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4222 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4223 emit_data
->output
[emit_data
->chan
] =
4224 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4227 static void vote_any_emit(
4228 const struct lp_build_tgsi_action
*action
,
4229 struct lp_build_tgsi_context
*bld_base
,
4230 struct lp_build_emit_data
*emit_data
)
4232 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4234 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4235 emit_data
->output
[emit_data
->chan
] =
4236 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4239 static void vote_eq_emit(
4240 const struct lp_build_tgsi_action
*action
,
4241 struct lp_build_tgsi_context
*bld_base
,
4242 struct lp_build_emit_data
*emit_data
)
4244 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4246 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4247 emit_data
->output
[emit_data
->chan
] =
4248 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4251 static void ballot_emit(
4252 const struct lp_build_tgsi_action
*action
,
4253 struct lp_build_tgsi_context
*bld_base
,
4254 struct lp_build_emit_data
*emit_data
)
4256 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4257 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4260 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4261 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4262 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4264 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4265 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4268 static void read_invoc_fetch_args(
4269 struct lp_build_tgsi_context
*bld_base
,
4270 struct lp_build_emit_data
*emit_data
)
4272 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4273 0, emit_data
->src_chan
);
4275 /* Always read the source invocation (= lane) from the X channel. */
4276 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4278 emit_data
->arg_count
= 2;
4281 static void read_lane_emit(
4282 const struct lp_build_tgsi_action
*action
,
4283 struct lp_build_tgsi_context
*bld_base
,
4284 struct lp_build_emit_data
*emit_data
)
4286 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4288 /* We currently have no other way to prevent LLVM from lifting the icmp
4289 * calls to a dominating basic block.
4291 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4293 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4294 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4296 emit_data
->output
[emit_data
->chan
] =
4297 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4298 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4299 AC_FUNC_ATTR_READNONE
|
4300 AC_FUNC_ATTR_CONVERGENT
);
4303 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4304 struct lp_build_emit_data
*emit_data
)
4306 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4307 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4311 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4313 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4314 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4318 /* Emit one vertex from the geometry shader */
4319 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4321 LLVMValueRef
*addrs
)
4323 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4324 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4325 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4326 struct si_shader
*shader
= ctx
->shader
;
4327 struct lp_build_if_state if_state
;
4328 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4329 ctx
->param_gs2vs_offset
);
4330 LLVMValueRef gs_next_vertex
;
4331 LLVMValueRef can_emit
;
4332 unsigned chan
, offset
;
4335 /* Write vertex attribute values to GSVS ring */
4336 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4337 ctx
->gs_next_vertex
[stream
],
4340 /* If this thread has already emitted the declared maximum number of
4341 * vertices, skip the write: excessive vertex emissions are not
4342 * supposed to have any effect.
4344 * If the shader has no writes to memory, kill it instead. This skips
4345 * further memory loads and may allow LLVM to skip to the end
4348 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4349 LLVMConstInt(ctx
->i32
,
4350 shader
->selector
->gs_max_out_vertices
, 0), "");
4352 bool use_kill
= !info
->writes_memory
;
4354 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4356 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4360 for (i
= 0; i
< info
->num_outputs
; i
++) {
4361 for (chan
= 0; chan
< 4; chan
++) {
4362 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4363 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4366 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4367 LLVMValueRef voffset
=
4368 LLVMConstInt(ctx
->i32
, offset
*
4369 shader
->selector
->gs_max_out_vertices
, 0);
4372 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4373 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4375 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4377 ac_build_buffer_store_dword(&ctx
->ac
,
4378 ctx
->gsvs_ring
[stream
],
4380 voffset
, soffset
, 0,
4385 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4388 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4390 /* Signal vertex emission */
4391 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4392 si_get_gs_wave_id(ctx
));
4394 lp_build_endif(&if_state
);
4397 /* Emit one vertex from the geometry shader */
4398 static void si_tgsi_emit_vertex(
4399 const struct lp_build_tgsi_action
*action
,
4400 struct lp_build_tgsi_context
*bld_base
,
4401 struct lp_build_emit_data
*emit_data
)
4403 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4404 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4406 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4409 /* Cut one primitive from the geometry shader */
4410 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4413 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4415 /* Signal primitive cut */
4416 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4417 si_get_gs_wave_id(ctx
));
4420 /* Cut one primitive from the geometry shader */
4421 static void si_tgsi_emit_primitive(
4422 const struct lp_build_tgsi_action
*action
,
4423 struct lp_build_tgsi_context
*bld_base
,
4424 struct lp_build_emit_data
*emit_data
)
4426 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4428 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4431 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4432 struct lp_build_tgsi_context
*bld_base
,
4433 struct lp_build_emit_data
*emit_data
)
4435 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4437 /* SI only (thanks to a hw bug workaround):
4438 * The real barrier instruction isn’t needed, because an entire patch
4439 * always fits into a single wave.
4441 if (ctx
->screen
->info
.chip_class
== SI
&&
4442 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4443 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4447 lp_build_intrinsic(ctx
->ac
.builder
,
4448 "llvm.amdgcn.s.barrier",
4449 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4452 static const struct lp_build_tgsi_action interp_action
= {
4453 .fetch_args
= interp_fetch_args
,
4454 .emit
= build_interp_intrinsic
,
4457 static void si_create_function(struct si_shader_context
*ctx
,
4459 LLVMTypeRef
*returns
, unsigned num_returns
,
4460 struct si_function_info
*fninfo
,
4461 unsigned max_workgroup_size
)
4465 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4466 fninfo
->types
, fninfo
->num_params
);
4467 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4469 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4470 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4472 /* The combination of:
4476 * allows the optimization passes to move loads and reduces
4477 * SGPR spilling significantly.
4479 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4481 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4482 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4483 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4487 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4488 if (fninfo
->assign
[i
])
4489 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4492 if (ctx
->screen
->info
.address32_hi
) {
4493 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4494 "amdgpu-32bit-address-high-bits",
4495 ctx
->screen
->info
.address32_hi
);
4498 if (max_workgroup_size
) {
4499 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4500 "amdgpu-max-work-group-size",
4501 max_workgroup_size
);
4503 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4504 "no-signed-zeros-fp-math",
4507 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4508 /* These were copied from some LLVM test. */
4509 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4510 "less-precise-fpmad",
4512 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4515 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4518 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4524 static void declare_streamout_params(struct si_shader_context
*ctx
,
4525 struct pipe_stream_output_info
*so
,
4526 struct si_function_info
*fninfo
)
4530 /* Streamout SGPRs. */
4531 if (so
->num_outputs
) {
4532 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4533 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4535 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4537 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4539 /* A streamout buffer offset is loaded if the stride is non-zero. */
4540 for (i
= 0; i
< 4; i
++) {
4544 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4548 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4550 switch (shader
->selector
->type
) {
4551 case PIPE_SHADER_TESS_CTRL
:
4552 /* Return this so that LLVM doesn't remove s_barrier
4553 * instructions on chips where we use s_barrier. */
4554 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4556 case PIPE_SHADER_GEOMETRY
:
4557 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4559 case PIPE_SHADER_COMPUTE
:
4560 break; /* see below */
4566 const unsigned *properties
= shader
->selector
->info
.properties
;
4567 unsigned max_work_group_size
=
4568 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4569 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4570 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4572 if (!max_work_group_size
) {
4573 /* This is a variable group size compute shader,
4574 * compile it for the maximum possible group size.
4576 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4578 return max_work_group_size
;
4581 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4582 struct si_function_info
*fninfo
,
4585 LLVMTypeRef const_shader_buf_type
;
4587 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4588 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4589 const_shader_buf_type
= ctx
->f32
;
4591 const_shader_buf_type
= ctx
->v4i32
;
4593 unsigned const_and_shader_buffers
=
4594 add_arg(fninfo
, ARG_SGPR
,
4595 ac_array_in_const32_addr_space(const_shader_buf_type
));
4598 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4601 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4602 struct si_function_info
*fninfo
,
4605 unsigned samplers_and_images
=
4606 add_arg(fninfo
, ARG_SGPR
,
4607 ac_array_in_const32_addr_space(ctx
->v8i32
));
4610 ctx
->param_samplers_and_images
= samplers_and_images
;
4613 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4614 struct si_function_info
*fninfo
,
4617 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4618 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4621 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4622 struct si_function_info
*fninfo
)
4624 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4625 ac_array_in_const32_addr_space(ctx
->v4i32
));
4626 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4627 ac_array_in_const32_addr_space(ctx
->v8i32
));
4630 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4631 struct si_function_info
*fninfo
)
4633 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4634 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4635 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4636 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4639 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4640 struct si_function_info
*fninfo
,
4641 unsigned *num_prolog_vgprs
)
4643 struct si_shader
*shader
= ctx
->shader
;
4645 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4646 if (shader
->key
.as_ls
) {
4647 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4648 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4650 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4651 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4653 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4655 if (!shader
->is_gs_copy_shader
) {
4656 /* Vertex load indices. */
4657 ctx
->param_vertex_index0
= fninfo
->num_params
;
4658 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4659 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4660 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4664 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4665 struct si_function_info
*fninfo
)
4667 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4668 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4669 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4670 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4674 /* Convenient merged shader definitions. */
4675 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4676 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4679 static void create_function(struct si_shader_context
*ctx
)
4681 struct si_shader
*shader
= ctx
->shader
;
4682 struct si_function_info fninfo
;
4683 LLVMTypeRef returns
[16+32*4];
4684 unsigned i
, num_return_sgprs
;
4685 unsigned num_returns
= 0;
4686 unsigned num_prolog_vgprs
= 0;
4687 unsigned type
= ctx
->type
;
4688 unsigned vs_blit_property
=
4689 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4691 si_init_function_info(&fninfo
);
4693 /* Set MERGED shaders. */
4694 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4695 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4696 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4697 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4698 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4701 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4704 case PIPE_SHADER_VERTEX
:
4705 declare_global_desc_pointers(ctx
, &fninfo
);
4707 if (vs_blit_property
) {
4708 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4709 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4710 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4711 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4713 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4714 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4715 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4716 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4717 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4718 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4719 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4720 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4721 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4722 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4723 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4724 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4728 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4732 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4733 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4734 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4735 ac_array_in_const32_addr_space(ctx
->v4i32
));
4737 if (shader
->key
.as_es
) {
4738 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4739 } else if (shader
->key
.as_ls
) {
4740 /* no extra parameters */
4742 if (shader
->is_gs_copy_shader
) {
4743 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4744 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4747 /* The locations of the other parameters are assigned dynamically. */
4748 declare_streamout_params(ctx
, &shader
->selector
->so
,
4753 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4756 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4757 declare_global_desc_pointers(ctx
, &fninfo
);
4758 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4759 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4760 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4761 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4762 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4763 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4764 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4767 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4768 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4770 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4771 * placed after the user SGPRs.
4773 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4774 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4775 for (i
= 0; i
< 11; i
++)
4776 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4779 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4780 /* Merged stages have 8 system SGPRs at the beginning. */
4781 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4782 if (HAVE_32BIT_POINTERS
) {
4783 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4784 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4786 declare_const_and_shader_buffers(ctx
, &fninfo
,
4787 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4789 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4790 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4791 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4792 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4793 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4794 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4796 declare_global_desc_pointers(ctx
, &fninfo
);
4797 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4798 ctx
->type
== PIPE_SHADER_VERTEX
);
4799 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4801 if (!HAVE_32BIT_POINTERS
) {
4802 declare_samplers_and_images(ctx
, &fninfo
,
4803 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4805 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4806 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4807 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4808 if (!HAVE_32BIT_POINTERS
) /* Align to 2 dwords. */
4809 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4810 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4811 ac_array_in_const32_addr_space(ctx
->v4i32
));
4813 /* VGPRs (first TCS, then VS) */
4814 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4815 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4817 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4818 declare_vs_input_vgprs(ctx
, &fninfo
,
4821 /* LS return values are inputs to the TCS main shader part. */
4822 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4823 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4824 for (i
= 0; i
< 2; i
++)
4825 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4827 /* TCS return values are inputs to the TCS epilog.
4829 * param_tcs_offchip_offset, param_tcs_factor_offset,
4830 * param_tcs_offchip_layout, and param_rw_buffers
4831 * should be passed to the epilog.
4833 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4834 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4835 for (i
= 0; i
< 11; i
++)
4836 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4840 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4841 /* Merged stages have 8 system SGPRs at the beginning. */
4842 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4843 if (HAVE_32BIT_POINTERS
) {
4844 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4845 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4847 declare_const_and_shader_buffers(ctx
, &fninfo
,
4848 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4850 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4851 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4852 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4853 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4854 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4855 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4857 declare_global_desc_pointers(ctx
, &fninfo
);
4858 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4859 (ctx
->type
== PIPE_SHADER_VERTEX
||
4860 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4861 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4862 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4864 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4865 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4866 if (!HAVE_32BIT_POINTERS
) {
4867 /* Declare as many input SGPRs as the VS has. */
4868 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4869 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4873 if (!HAVE_32BIT_POINTERS
) {
4874 declare_samplers_and_images(ctx
, &fninfo
,
4875 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4877 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4878 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4879 ac_array_in_const32_addr_space(ctx
->v4i32
));
4882 /* VGPRs (first GS, then VS/TES) */
4883 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4884 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4885 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4886 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4887 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4889 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4890 declare_vs_input_vgprs(ctx
, &fninfo
,
4892 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4893 declare_tes_input_vgprs(ctx
, &fninfo
);
4896 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4897 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4898 unsigned num_user_sgprs
;
4900 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4901 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4903 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4905 /* ES return values are inputs to GS. */
4906 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4907 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4908 for (i
= 0; i
< 5; i
++)
4909 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4913 case PIPE_SHADER_TESS_EVAL
:
4914 declare_global_desc_pointers(ctx
, &fninfo
);
4915 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4916 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4917 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4919 if (shader
->key
.as_es
) {
4920 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4921 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4922 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4924 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4925 declare_streamout_params(ctx
, &shader
->selector
->so
,
4927 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4931 declare_tes_input_vgprs(ctx
, &fninfo
);
4934 case PIPE_SHADER_GEOMETRY
:
4935 declare_global_desc_pointers(ctx
, &fninfo
);
4936 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4937 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4938 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4941 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4942 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4943 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4944 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4945 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4946 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4947 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4948 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4951 case PIPE_SHADER_FRAGMENT
:
4952 declare_global_desc_pointers(ctx
, &fninfo
);
4953 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4954 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4955 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4956 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4958 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4959 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4960 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4961 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4962 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4963 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4964 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4965 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4966 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4967 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4968 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4969 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4970 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4971 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4972 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4973 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4974 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4975 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4976 shader
->info
.face_vgpr_index
= 20;
4977 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4978 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4979 shader
->info
.ancillary_vgpr_index
= 21;
4980 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4981 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4982 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4984 /* Color inputs from the prolog. */
4985 if (shader
->selector
->info
.colors_read
) {
4986 unsigned num_color_elements
=
4987 util_bitcount(shader
->selector
->info
.colors_read
);
4989 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4990 for (i
= 0; i
< num_color_elements
; i
++)
4991 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4993 num_prolog_vgprs
+= num_color_elements
;
4996 /* Outputs for the epilog. */
4997 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5000 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5001 shader
->selector
->info
.writes_z
+
5002 shader
->selector
->info
.writes_stencil
+
5003 shader
->selector
->info
.writes_samplemask
+
5004 1 /* SampleMaskIn */;
5006 num_returns
= MAX2(num_returns
,
5008 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5010 for (i
= 0; i
< num_return_sgprs
; i
++)
5011 returns
[i
] = ctx
->i32
;
5012 for (; i
< num_returns
; i
++)
5013 returns
[i
] = ctx
->f32
;
5016 case PIPE_SHADER_COMPUTE
:
5017 declare_global_desc_pointers(ctx
, &fninfo
);
5018 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
5019 if (shader
->selector
->info
.uses_grid_size
)
5020 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
5021 if (shader
->selector
->info
.uses_block_size
)
5022 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
5024 for (i
= 0; i
< 3; i
++) {
5025 ctx
->abi
.workgroup_ids
[i
] = NULL
;
5026 if (shader
->selector
->info
.uses_block_id
[i
])
5027 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
5030 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5033 assert(0 && "unimplemented shader");
5037 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5038 si_get_max_workgroup_size(shader
));
5040 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5041 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5042 ctx
->separate_prolog
) {
5043 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5044 "InitialPSInputAddr",
5045 S_0286D0_PERSP_SAMPLE_ENA(1) |
5046 S_0286D0_PERSP_CENTER_ENA(1) |
5047 S_0286D0_PERSP_CENTROID_ENA(1) |
5048 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5049 S_0286D0_LINEAR_CENTER_ENA(1) |
5050 S_0286D0_LINEAR_CENTROID_ENA(1) |
5051 S_0286D0_FRONT_FACE_ENA(1) |
5052 S_0286D0_ANCILLARY_ENA(1) |
5053 S_0286D0_POS_FIXED_PT_ENA(1));
5056 shader
->info
.num_input_sgprs
= 0;
5057 shader
->info
.num_input_vgprs
= 0;
5059 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5060 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5062 for (; i
< fninfo
.num_params
; ++i
)
5063 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5065 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5066 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5068 if (shader
->key
.as_ls
||
5069 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5070 /* GFX9 has the ESGS ring buffer in LDS. */
5071 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
5072 ac_declare_lds_as_pointer(&ctx
->ac
);
5076 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5079 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5081 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5083 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5084 ctx
->param_rw_buffers
);
5086 if (ctx
->screen
->info
.chip_class
<= VI
&&
5087 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
5089 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5091 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5094 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5097 if (ctx
->shader
->is_gs_copy_shader
) {
5098 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5101 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5102 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5103 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5104 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5105 LLVMValueRef base_ring
;
5107 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5109 /* The conceptual layout of the GSVS ring is
5110 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5111 * but the real memory layout is swizzled across
5113 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5115 * Override the buffer descriptor accordingly.
5117 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5118 uint64_t stream_offset
= 0;
5120 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5121 unsigned num_components
;
5123 unsigned num_records
;
5124 LLVMValueRef ring
, tmp
;
5126 num_components
= sel
->info
.num_stream_output_components
[stream
];
5127 if (!num_components
)
5130 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5132 /* Limit on the stride field for <= CIK. */
5133 assert(stride
< (1 << 14));
5137 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5138 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5139 tmp
= LLVMBuildAdd(builder
, tmp
,
5140 LLVMConstInt(ctx
->i64
,
5141 stream_offset
, 0), "");
5142 stream_offset
+= stride
* 64;
5144 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5145 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5146 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5147 tmp
= LLVMBuildOr(builder
, tmp
,
5148 LLVMConstInt(ctx
->i32
,
5149 S_008F04_STRIDE(stride
) |
5150 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5151 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5152 ring
= LLVMBuildInsertElement(builder
, ring
,
5153 LLVMConstInt(ctx
->i32
, num_records
, 0),
5154 LLVMConstInt(ctx
->i32
, 2, 0), "");
5155 ring
= LLVMBuildInsertElement(builder
, ring
,
5156 LLVMConstInt(ctx
->i32
,
5157 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5158 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5159 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5160 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5161 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5162 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5163 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5164 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5165 S_008F0C_ADD_TID_ENABLE(1),
5167 LLVMConstInt(ctx
->i32
, 3, 0), "");
5169 ctx
->gsvs_ring
[stream
] = ring
;
5171 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5172 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5176 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5177 LLVMValueRef param_rw_buffers
,
5178 unsigned param_pos_fixed_pt
)
5180 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5181 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5183 /* Use the fixed-point gl_FragCoord input.
5184 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5185 * per coordinate to get the repeating effect.
5187 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5188 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5190 /* Load the buffer descriptor. */
5191 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5192 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5194 /* The stipple pattern is 32x32, each row has 32 bits. */
5195 offset
= LLVMBuildMul(builder
, address
[1],
5196 LLVMConstInt(ctx
->i32
, 4, 0), "");
5197 row
= buffer_load_const(ctx
, desc
, offset
);
5198 row
= ac_to_integer(&ctx
->ac
, row
);
5199 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5200 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5201 ac_build_kill_if_false(&ctx
->ac
, bit
);
5204 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5205 struct si_shader_config
*conf
,
5206 unsigned symbol_offset
)
5209 const unsigned char *config
=
5210 ac_shader_binary_config_start(binary
, symbol_offset
);
5211 bool really_needs_scratch
= false;
5213 /* LLVM adds SGPR spills to the scratch size.
5214 * Find out if we really need the scratch buffer.
5216 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5217 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5219 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5220 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5221 really_needs_scratch
= true;
5226 /* XXX: We may be able to emit some of these values directly rather than
5227 * extracting fields to be emitted later.
5230 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5231 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5232 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5234 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5235 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5236 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5237 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5238 case R_00B848_COMPUTE_PGM_RSRC1
:
5239 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5240 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5241 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5242 conf
->rsrc1
= value
;
5244 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5245 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5247 case R_00B84C_COMPUTE_PGM_RSRC2
:
5248 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5249 conf
->rsrc2
= value
;
5251 case R_0286CC_SPI_PS_INPUT_ENA
:
5252 conf
->spi_ps_input_ena
= value
;
5254 case R_0286D0_SPI_PS_INPUT_ADDR
:
5255 conf
->spi_ps_input_addr
= value
;
5257 case R_0286E8_SPI_TMPRING_SIZE
:
5258 case R_00B860_COMPUTE_TMPRING_SIZE
:
5259 /* WAVESIZE is in units of 256 dwords. */
5260 if (really_needs_scratch
)
5261 conf
->scratch_bytes_per_wave
=
5262 G_00B860_WAVESIZE(value
) * 256 * 4;
5264 case 0x4: /* SPILLED_SGPRS */
5265 conf
->spilled_sgprs
= value
;
5267 case 0x8: /* SPILLED_VGPRS */
5268 conf
->spilled_vgprs
= value
;
5272 static bool printed
;
5275 fprintf(stderr
, "Warning: LLVM emitted unknown "
5276 "config register: 0x%x\n", reg
);
5284 if (!conf
->spi_ps_input_addr
)
5285 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5288 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5289 uint64_t scratch_va
)
5292 uint32_t scratch_rsrc_dword0
= scratch_va
;
5293 uint32_t scratch_rsrc_dword1
=
5294 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5296 /* Enable scratch coalescing. */
5297 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5299 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5300 const struct ac_shader_reloc
*reloc
=
5301 &shader
->binary
.relocs
[i
];
5302 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5303 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5304 &scratch_rsrc_dword0
, 4);
5305 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5306 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5307 &scratch_rsrc_dword1
, 4);
5312 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5314 unsigned size
= shader
->binary
.code_size
;
5317 size
+= shader
->prolog
->binary
.code_size
;
5318 if (shader
->previous_stage
)
5319 size
+= shader
->previous_stage
->binary
.code_size
;
5320 if (shader
->prolog2
)
5321 size
+= shader
->prolog2
->binary
.code_size
;
5323 size
+= shader
->epilog
->binary
.code_size
;
5327 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5329 const struct ac_shader_binary
*prolog
=
5330 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5331 const struct ac_shader_binary
*previous_stage
=
5332 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5333 const struct ac_shader_binary
*prolog2
=
5334 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5335 const struct ac_shader_binary
*epilog
=
5336 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5337 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5338 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5339 (!epilog
? mainb
->rodata_size
: 0);
5342 assert(!prolog
|| !prolog
->rodata_size
);
5343 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5344 assert(!prolog2
|| !prolog2
->rodata_size
);
5345 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5346 !mainb
->rodata_size
);
5347 assert(!epilog
|| !epilog
->rodata_size
);
5349 r600_resource_reference(&shader
->bo
, NULL
);
5350 shader
->bo
= (struct r600_resource
*)
5351 si_aligned_buffer_create(&sscreen
->b
,
5352 sscreen
->cpdma_prefetch_writes_memory
?
5353 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5354 PIPE_USAGE_IMMUTABLE
,
5355 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5361 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5362 PIPE_TRANSFER_READ_WRITE
|
5363 PIPE_TRANSFER_UNSYNCHRONIZED
);
5365 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5366 * endian-independent. */
5368 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5369 ptr
+= prolog
->code_size
;
5371 if (previous_stage
) {
5372 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5373 ptr
+= previous_stage
->code_size
;
5376 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5377 ptr
+= prolog2
->code_size
;
5380 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5381 ptr
+= mainb
->code_size
;
5384 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5385 else if (mainb
->rodata_size
> 0)
5386 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5388 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5392 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5393 struct pipe_debug_callback
*debug
,
5394 const char *name
, FILE *file
)
5399 if (binary
->disasm_string
) {
5400 fprintf(file
, "Shader %s disassembly:\n", name
);
5401 fprintf(file
, "%s", binary
->disasm_string
);
5403 if (debug
&& debug
->debug_message
) {
5404 /* Very long debug messages are cut off, so send the
5405 * disassembly one line at a time. This causes more
5406 * overhead, but on the plus side it simplifies
5407 * parsing of resulting logs.
5409 pipe_debug_message(debug
, SHADER_INFO
,
5410 "Shader Disassembly Begin");
5412 line
= binary
->disasm_string
;
5414 p
= util_strchrnul(line
, '\n');
5418 pipe_debug_message(debug
, SHADER_INFO
,
5419 "%.*s", count
, line
);
5427 pipe_debug_message(debug
, SHADER_INFO
,
5428 "Shader Disassembly End");
5431 fprintf(file
, "Shader %s binary:\n", name
);
5432 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5433 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5434 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5435 binary
->code
[i
+ 1], binary
->code
[i
]);
5440 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5442 struct si_screen
*sscreen
= shader
->selector
->screen
;
5443 struct si_shader_config
*conf
= &shader
->config
;
5444 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5445 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5446 unsigned lds_per_wave
= 0;
5447 unsigned max_simd_waves
;
5449 switch (sscreen
->info
.family
) {
5450 /* These always have 8 waves: */
5451 case CHIP_POLARIS10
:
5452 case CHIP_POLARIS11
:
5453 case CHIP_POLARIS12
:
5457 max_simd_waves
= 10;
5460 /* Compute LDS usage for PS. */
5461 switch (shader
->selector
->type
) {
5462 case PIPE_SHADER_FRAGMENT
:
5463 /* The minimum usage per wave is (num_inputs * 48). The maximum
5464 * usage is (num_inputs * 48 * 16).
5465 * We can get anything in between and it varies between waves.
5467 * The 48 bytes per input for a single primitive is equal to
5468 * 4 bytes/component * 4 components/input * 3 points.
5470 * Other stages don't know the size at compile time or don't
5471 * allocate LDS per wave, but instead they do it per thread group.
5473 lds_per_wave
= conf
->lds_size
* lds_increment
+
5474 align(num_inputs
* 48, lds_increment
);
5476 case PIPE_SHADER_COMPUTE
:
5477 if (shader
->selector
) {
5478 unsigned max_workgroup_size
=
5479 si_get_max_workgroup_size(shader
);
5480 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5481 DIV_ROUND_UP(max_workgroup_size
, 64);
5486 /* Compute the per-SIMD wave counts. */
5487 if (conf
->num_sgprs
) {
5488 if (sscreen
->info
.chip_class
>= VI
)
5489 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5491 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5494 if (conf
->num_vgprs
)
5495 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5497 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5498 * 16KB makes some SIMDs unoccupied). */
5500 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5502 conf
->max_simd_waves
= max_simd_waves
;
5505 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5506 struct pipe_debug_callback
*debug
)
5508 const struct si_shader_config
*conf
= &shader
->config
;
5510 pipe_debug_message(debug
, SHADER_INFO
,
5511 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5512 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5513 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5514 conf
->num_sgprs
, conf
->num_vgprs
,
5515 si_get_shader_binary_size(shader
),
5516 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5517 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5518 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5521 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5522 const struct si_shader
*shader
,
5525 bool check_debug_option
)
5527 const struct si_shader_config
*conf
= &shader
->config
;
5529 if (!check_debug_option
||
5530 si_can_dump_shader(sscreen
, processor
)) {
5531 if (processor
== PIPE_SHADER_FRAGMENT
) {
5532 fprintf(file
, "*** SHADER CONFIG ***\n"
5533 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5534 "SPI_PS_INPUT_ENA = 0x%04x\n",
5535 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5538 fprintf(file
, "*** SHADER STATS ***\n"
5541 "Spilled SGPRs: %d\n"
5542 "Spilled VGPRs: %d\n"
5543 "Private memory VGPRs: %d\n"
5544 "Code Size: %d bytes\n"
5546 "Scratch: %d bytes per wave\n"
5548 "********************\n\n\n",
5549 conf
->num_sgprs
, conf
->num_vgprs
,
5550 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5551 conf
->private_mem_vgprs
,
5552 si_get_shader_binary_size(shader
),
5553 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5554 conf
->max_simd_waves
);
5558 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5560 switch (processor
) {
5561 case PIPE_SHADER_VERTEX
:
5562 if (shader
->key
.as_es
)
5563 return "Vertex Shader as ES";
5564 else if (shader
->key
.as_ls
)
5565 return "Vertex Shader as LS";
5567 return "Vertex Shader as VS";
5568 case PIPE_SHADER_TESS_CTRL
:
5569 return "Tessellation Control Shader";
5570 case PIPE_SHADER_TESS_EVAL
:
5571 if (shader
->key
.as_es
)
5572 return "Tessellation Evaluation Shader as ES";
5574 return "Tessellation Evaluation Shader as VS";
5575 case PIPE_SHADER_GEOMETRY
:
5576 if (shader
->is_gs_copy_shader
)
5577 return "GS Copy Shader as VS";
5579 return "Geometry Shader";
5580 case PIPE_SHADER_FRAGMENT
:
5581 return "Pixel Shader";
5582 case PIPE_SHADER_COMPUTE
:
5583 return "Compute Shader";
5585 return "Unknown Shader";
5589 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5590 struct pipe_debug_callback
*debug
, unsigned processor
,
5591 FILE *file
, bool check_debug_option
)
5593 if (!check_debug_option
||
5594 si_can_dump_shader(sscreen
, processor
))
5595 si_dump_shader_key(processor
, shader
, file
);
5597 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5598 if (shader
->previous_stage
&&
5599 shader
->previous_stage
->binary
.llvm_ir_string
) {
5600 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5601 si_get_shader_name(shader
, processor
));
5602 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5605 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5606 si_get_shader_name(shader
, processor
));
5607 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5610 if (!check_debug_option
||
5611 (si_can_dump_shader(sscreen
, processor
) &&
5612 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5613 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5616 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5617 debug
, "prolog", file
);
5618 if (shader
->previous_stage
)
5619 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5620 debug
, "previous stage", file
);
5621 if (shader
->prolog2
)
5622 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5623 debug
, "prolog2", file
);
5625 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5628 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5629 debug
, "epilog", file
);
5630 fprintf(file
, "\n");
5633 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5634 check_debug_option
);
5637 static int si_compile_llvm(struct si_screen
*sscreen
,
5638 struct ac_shader_binary
*binary
,
5639 struct si_shader_config
*conf
,
5640 LLVMTargetMachineRef tm
,
5642 struct pipe_debug_callback
*debug
,
5647 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5649 if (si_can_dump_shader(sscreen
, processor
)) {
5650 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5652 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5653 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5654 ac_dump_module(mod
);
5655 fprintf(stderr
, "\n");
5659 if (sscreen
->record_llvm_ir
) {
5660 char *ir
= LLVMPrintModuleToString(mod
);
5661 binary
->llvm_ir_string
= strdup(ir
);
5662 LLVMDisposeMessage(ir
);
5665 if (!si_replace_shader(count
, binary
)) {
5666 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5671 si_shader_binary_read_config(binary
, conf
, 0);
5673 /* Enable 64-bit and 16-bit denormals, because there is no performance
5676 * If denormals are enabled, all floating-point output modifiers are
5679 * Don't enable denormals for 32-bit floats, because:
5680 * - Floating-point output modifiers would be ignored by the hw.
5681 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5682 * have to stop using those.
5683 * - SI & CI would be very slow.
5685 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5687 FREE(binary
->config
);
5688 FREE(binary
->global_symbol_offsets
);
5689 binary
->config
= NULL
;
5690 binary
->global_symbol_offsets
= NULL
;
5692 /* Some shaders can't have rodata because their binaries can be
5695 if (binary
->rodata_size
&&
5696 (processor
== PIPE_SHADER_VERTEX
||
5697 processor
== PIPE_SHADER_TESS_CTRL
||
5698 processor
== PIPE_SHADER_TESS_EVAL
||
5699 processor
== PIPE_SHADER_FRAGMENT
)) {
5700 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5707 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5709 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5710 LLVMBuildRetVoid(ctx
->ac
.builder
);
5712 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5715 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5717 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5718 LLVMTargetMachineRef tm
,
5719 struct si_shader_selector
*gs_selector
,
5720 struct pipe_debug_callback
*debug
)
5722 struct si_shader_context ctx
;
5723 struct si_shader
*shader
;
5724 LLVMBuilderRef builder
;
5725 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5726 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5727 struct si_shader_output_values
*outputs
;
5728 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5731 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5736 shader
= CALLOC_STRUCT(si_shader
);
5742 /* We can leave the fence as permanently signaled because the GS copy
5743 * shader only becomes visible globally after it has been compiled. */
5744 util_queue_fence_init(&shader
->ready
);
5746 shader
->selector
= gs_selector
;
5747 shader
->is_gs_copy_shader
= true;
5749 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5750 ctx
.shader
= shader
;
5751 ctx
.type
= PIPE_SHADER_VERTEX
;
5753 builder
= ctx
.ac
.builder
;
5755 create_function(&ctx
);
5756 preload_ring_buffers(&ctx
);
5758 LLVMValueRef voffset
=
5759 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5761 /* Fetch the vertex stream ID.*/
5762 LLVMValueRef stream_id
;
5764 if (gs_selector
->so
.num_outputs
)
5765 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5767 stream_id
= ctx
.i32_0
;
5769 /* Fill in output information. */
5770 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5771 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5772 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5774 for (int chan
= 0; chan
< 4; chan
++) {
5775 outputs
[i
].vertex_stream
[chan
] =
5776 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5780 LLVMBasicBlockRef end_bb
;
5781 LLVMValueRef switch_inst
;
5783 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5784 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5786 for (int stream
= 0; stream
< 4; stream
++) {
5787 LLVMBasicBlockRef bb
;
5790 if (!gsinfo
->num_stream_output_components
[stream
])
5793 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5796 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5797 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5798 LLVMPositionBuilderAtEnd(builder
, bb
);
5800 /* Fetch vertex data from GSVS ring */
5802 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5803 for (unsigned chan
= 0; chan
< 4; chan
++) {
5804 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5805 outputs
[i
].vertex_stream
[chan
] != stream
) {
5806 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5810 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5811 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5814 outputs
[i
].values
[chan
] =
5815 ac_build_buffer_load(&ctx
.ac
,
5816 ctx
.gsvs_ring
[0], 1,
5823 /* Streamout and exports. */
5824 if (gs_selector
->so
.num_outputs
) {
5825 si_llvm_emit_streamout(&ctx
, outputs
,
5826 gsinfo
->num_outputs
,
5831 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5833 LLVMBuildBr(builder
, end_bb
);
5836 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5838 LLVMBuildRetVoid(ctx
.ac
.builder
);
5840 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5841 si_llvm_optimize_module(&ctx
);
5843 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5844 &ctx
.shader
->config
, ctx
.tm
,
5846 debug
, PIPE_SHADER_GEOMETRY
,
5849 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5850 fprintf(stderr
, "GS Copy Shader:\n");
5851 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5852 PIPE_SHADER_GEOMETRY
, stderr
, true);
5853 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5856 si_llvm_dispose(&ctx
);
5867 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5868 const struct si_vs_prolog_bits
*prolog
,
5869 const char *prefix
, FILE *f
)
5871 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5872 prefix
, prolog
->instance_divisor_is_one
);
5873 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5874 prefix
, prolog
->instance_divisor_is_fetched
);
5875 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5876 prefix
, prolog
->ls_vgpr_fix
);
5878 fprintf(f
, " mono.vs.fix_fetch = {");
5879 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5880 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5884 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5887 const struct si_shader_key
*key
= &shader
->key
;
5889 fprintf(f
, "SHADER KEY\n");
5891 switch (processor
) {
5892 case PIPE_SHADER_VERTEX
:
5893 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5894 "part.vs.prolog", f
);
5895 fprintf(f
, " as_es = %u\n", key
->as_es
);
5896 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5897 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5898 key
->mono
.u
.vs_export_prim_id
);
5901 case PIPE_SHADER_TESS_CTRL
:
5902 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5903 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5904 "part.tcs.ls_prolog", f
);
5906 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5907 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5910 case PIPE_SHADER_TESS_EVAL
:
5911 fprintf(f
, " as_es = %u\n", key
->as_es
);
5912 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5913 key
->mono
.u
.vs_export_prim_id
);
5916 case PIPE_SHADER_GEOMETRY
:
5917 if (shader
->is_gs_copy_shader
)
5920 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5921 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5922 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5923 "part.gs.vs_prolog", f
);
5925 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5928 case PIPE_SHADER_COMPUTE
:
5931 case PIPE_SHADER_FRAGMENT
:
5932 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5933 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5934 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5935 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5936 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5937 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5938 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5939 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5940 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5941 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5942 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5943 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5944 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5945 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5946 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5947 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5948 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5955 if ((processor
== PIPE_SHADER_GEOMETRY
||
5956 processor
== PIPE_SHADER_TESS_EVAL
||
5957 processor
== PIPE_SHADER_VERTEX
) &&
5958 !key
->as_es
&& !key
->as_ls
) {
5959 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5960 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5964 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5965 struct si_screen
*sscreen
,
5966 LLVMTargetMachineRef tm
)
5968 struct lp_build_tgsi_context
*bld_base
;
5970 si_llvm_context_init(ctx
, sscreen
, tm
);
5972 bld_base
= &ctx
->bld_base
;
5973 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5975 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5976 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5977 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5979 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5981 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5983 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5984 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5985 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5986 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5988 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5989 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5990 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5991 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5992 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5993 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5994 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5995 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5996 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5998 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5999 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6000 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6003 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6005 struct si_shader
*shader
= ctx
->shader
;
6006 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6008 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6009 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6010 shader
->key
.as_ls
||
6014 ac_optimize_vs_outputs(&ctx
->ac
,
6016 shader
->info
.vs_output_param_offset
,
6018 &shader
->info
.nr_param_exports
);
6021 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6022 unsigned param
, unsigned bitoffset
)
6024 LLVMValueRef args
[] = {
6025 LLVMGetParam(ctx
->main_fn
, param
),
6026 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6028 lp_build_intrinsic(ctx
->ac
.builder
,
6029 "llvm.amdgcn.init.exec.from.input",
6030 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
6033 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6034 const struct si_vs_prolog_bits
*key
)
6036 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6038 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6041 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6044 struct si_shader
*shader
= ctx
->shader
;
6045 struct si_shader_selector
*sel
= shader
->selector
;
6046 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6048 // TODO clean all this up!
6049 switch (ctx
->type
) {
6050 case PIPE_SHADER_VERTEX
:
6051 ctx
->load_input
= declare_input_vs
;
6052 if (shader
->key
.as_ls
)
6053 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6054 else if (shader
->key
.as_es
)
6055 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6057 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6058 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6059 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6061 case PIPE_SHADER_TESS_CTRL
:
6062 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6063 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6064 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6065 bld_base
->emit_store
= store_output_tcs
;
6066 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6067 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6068 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6069 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6071 case PIPE_SHADER_TESS_EVAL
:
6072 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6073 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6074 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6075 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6076 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6077 if (shader
->key
.as_es
)
6078 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6080 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6081 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6083 case PIPE_SHADER_GEOMETRY
:
6084 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6085 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6086 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6087 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6088 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6089 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6091 case PIPE_SHADER_FRAGMENT
:
6092 ctx
->load_input
= declare_input_fs
;
6093 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6094 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6095 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6096 ctx
->abi
.load_sample_position
= load_sample_position
;
6097 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6098 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6100 case PIPE_SHADER_COMPUTE
:
6101 ctx
->abi
.load_local_group_size
= get_block_size
;
6104 assert(!"Unsupported shader type");
6108 ctx
->abi
.load_ubo
= load_ubo
;
6109 ctx
->abi
.load_ssbo
= load_ssbo
;
6111 create_function(ctx
);
6112 preload_ring_buffers(ctx
);
6114 /* For GFX9 merged shaders:
6115 * - Set EXEC for the first shader. If the prolog is present, set
6116 * EXEC there instead.
6117 * - Add a barrier before the second shader.
6118 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6119 * an if-statement. This is required for correctness in geometry
6120 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6123 * For monolithic merged shaders, the first shader is wrapped in an
6124 * if-block together with its prolog in si_build_wrapper_function.
6126 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6127 if (!is_monolithic
&&
6128 sel
->info
.num_instructions
> 1 && /* not empty shader */
6129 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6130 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6131 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6132 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6133 si_init_exec_from_input(ctx
,
6134 ctx
->param_merged_wave_info
, 0);
6135 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6136 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6138 ac_init_exec_full_mask(&ctx
->ac
);
6140 /* The barrier must execute for all shaders in a
6143 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6145 LLVMValueRef num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6147 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6148 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6149 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6153 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6154 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6155 for (unsigned i
= 0; i
< 6; i
++) {
6156 ctx
->invoc0_tess_factors
[i
] =
6157 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6161 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6163 for (i
= 0; i
< 4; i
++) {
6164 ctx
->gs_next_vertex
[i
] =
6165 lp_build_alloca(&ctx
->gallivm
,
6170 if (sel
->force_correct_derivs_after_kill
) {
6171 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6172 /* true = don't kill. */
6173 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6174 ctx
->postponed_kill
);
6178 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6179 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6183 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6184 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6189 si_llvm_build_ret(ctx
, ctx
->return_value
);
6194 * Compute the VS prolog key, which contains all the information needed to
6195 * build the VS prolog function, and set shader->info bits where needed.
6197 * \param info Shader info of the vertex shader.
6198 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6199 * \param prolog_key Key of the VS prolog
6200 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6201 * \param key Output shader part key.
6203 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6204 unsigned num_input_sgprs
,
6205 const struct si_vs_prolog_bits
*prolog_key
,
6206 struct si_shader
*shader_out
,
6207 union si_shader_part_key
*key
)
6209 memset(key
, 0, sizeof(*key
));
6210 key
->vs_prolog
.states
= *prolog_key
;
6211 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6212 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6213 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6214 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6216 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6217 key
->vs_prolog
.as_ls
= 1;
6218 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6219 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6220 key
->vs_prolog
.as_es
= 1;
6221 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6224 /* Enable loading the InstanceID VGPR. */
6225 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6227 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6228 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6229 shader_out
->info
.uses_instanceid
= true;
6233 * Compute the PS prolog key, which contains all the information needed to
6234 * build the PS prolog function, and set related bits in shader->config.
6236 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6237 union si_shader_part_key
*key
,
6238 bool separate_prolog
)
6240 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6242 memset(key
, 0, sizeof(*key
));
6243 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6244 key
->ps_prolog
.colors_read
= info
->colors_read
;
6245 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6246 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6247 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6248 (key
->ps_prolog
.colors_read
||
6249 key
->ps_prolog
.states
.force_persp_sample_interp
||
6250 key
->ps_prolog
.states
.force_linear_sample_interp
||
6251 key
->ps_prolog
.states
.force_persp_center_interp
||
6252 key
->ps_prolog
.states
.force_linear_center_interp
||
6253 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6254 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6255 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6257 if (info
->colors_read
) {
6258 unsigned *color
= shader
->selector
->color_attr_index
;
6260 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6261 /* BCOLORs are stored after the last input. */
6262 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6263 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6264 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6267 for (unsigned i
= 0; i
< 2; i
++) {
6268 unsigned interp
= info
->input_interpolate
[color
[i
]];
6269 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6271 if (!(info
->colors_read
& (0xf << i
*4)))
6274 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6276 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6277 interp
== TGSI_INTERPOLATE_COLOR
)
6278 interp
= TGSI_INTERPOLATE_CONSTANT
;
6281 case TGSI_INTERPOLATE_CONSTANT
:
6282 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6284 case TGSI_INTERPOLATE_PERSPECTIVE
:
6285 case TGSI_INTERPOLATE_COLOR
:
6286 /* Force the interpolation location for colors here. */
6287 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6288 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6289 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6290 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6293 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6294 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6295 shader
->config
.spi_ps_input_ena
|=
6296 S_0286CC_PERSP_SAMPLE_ENA(1);
6298 case TGSI_INTERPOLATE_LOC_CENTER
:
6299 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6300 shader
->config
.spi_ps_input_ena
|=
6301 S_0286CC_PERSP_CENTER_ENA(1);
6303 case TGSI_INTERPOLATE_LOC_CENTROID
:
6304 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6305 shader
->config
.spi_ps_input_ena
|=
6306 S_0286CC_PERSP_CENTROID_ENA(1);
6312 case TGSI_INTERPOLATE_LINEAR
:
6313 /* Force the interpolation location for colors here. */
6314 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6315 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6316 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6317 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6319 /* The VGPR assignment for non-monolithic shaders
6320 * works because InitialPSInputAddr is set on the
6321 * main shader and PERSP_PULL_MODEL is never used.
6324 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6325 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6326 separate_prolog
? 6 : 9;
6327 shader
->config
.spi_ps_input_ena
|=
6328 S_0286CC_LINEAR_SAMPLE_ENA(1);
6330 case TGSI_INTERPOLATE_LOC_CENTER
:
6331 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6332 separate_prolog
? 8 : 11;
6333 shader
->config
.spi_ps_input_ena
|=
6334 S_0286CC_LINEAR_CENTER_ENA(1);
6336 case TGSI_INTERPOLATE_LOC_CENTROID
:
6337 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6338 separate_prolog
? 10 : 13;
6339 shader
->config
.spi_ps_input_ena
|=
6340 S_0286CC_LINEAR_CENTROID_ENA(1);
6354 * Check whether a PS prolog is required based on the key.
6356 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6358 return key
->ps_prolog
.colors_read
||
6359 key
->ps_prolog
.states
.force_persp_sample_interp
||
6360 key
->ps_prolog
.states
.force_linear_sample_interp
||
6361 key
->ps_prolog
.states
.force_persp_center_interp
||
6362 key
->ps_prolog
.states
.force_linear_center_interp
||
6363 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6364 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6365 key
->ps_prolog
.states
.poly_stipple
||
6366 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6370 * Compute the PS epilog key, which contains all the information needed to
6371 * build the PS epilog function.
6373 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6374 union si_shader_part_key
*key
)
6376 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6377 memset(key
, 0, sizeof(*key
));
6378 key
->ps_epilog
.colors_written
= info
->colors_written
;
6379 key
->ps_epilog
.writes_z
= info
->writes_z
;
6380 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6381 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6382 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6386 * Build the GS prolog function. Rotate the input vertices for triangle strips
6389 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6390 union si_shader_part_key
*key
)
6392 unsigned num_sgprs
, num_vgprs
;
6393 struct si_function_info fninfo
;
6394 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6395 LLVMTypeRef returns
[48];
6396 LLVMValueRef func
, ret
;
6398 si_init_function_info(&fninfo
);
6400 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6401 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6402 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6404 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6405 num_vgprs
= 5; /* ES inputs are not needed by GS */
6407 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6411 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6412 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6413 returns
[i
] = ctx
->i32
;
6416 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6417 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6418 returns
[num_sgprs
+ i
] = ctx
->f32
;
6421 /* Create the function. */
6422 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6424 func
= ctx
->main_fn
;
6426 /* Set the full EXEC mask for the prolog, because we are only fiddling
6427 * with registers here. The main shader part will set the correct EXEC
6430 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6431 ac_init_exec_full_mask(&ctx
->ac
);
6433 /* Copy inputs to outputs. This should be no-op, as the registers match,
6434 * but it will prevent the compiler from overwriting them unintentionally.
6436 ret
= ctx
->return_value
;
6437 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6438 LLVMValueRef p
= LLVMGetParam(func
, i
);
6439 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6441 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6442 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6443 p
= ac_to_float(&ctx
->ac
, p
);
6444 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6447 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6448 /* Remap the input vertices for every other primitive. */
6449 const unsigned gfx6_vtx_params
[6] = {
6457 const unsigned gfx9_vtx_params
[3] = {
6462 LLVMValueRef vtx_in
[6], vtx_out
[6];
6463 LLVMValueRef prim_id
, rotate
;
6465 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6466 for (unsigned i
= 0; i
< 3; i
++) {
6467 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6468 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6471 for (unsigned i
= 0; i
< 6; i
++)
6472 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6475 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6476 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6478 for (unsigned i
= 0; i
< 6; ++i
) {
6479 LLVMValueRef base
, rotated
;
6481 rotated
= vtx_in
[(i
+ 4) % 6];
6482 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6485 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6486 for (unsigned i
= 0; i
< 3; i
++) {
6487 LLVMValueRef hi
, out
;
6489 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6490 LLVMConstInt(ctx
->i32
, 16, 0), "");
6491 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6492 out
= ac_to_float(&ctx
->ac
, out
);
6493 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6494 gfx9_vtx_params
[i
], "");
6497 for (unsigned i
= 0; i
< 6; i
++) {
6500 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6501 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6502 gfx6_vtx_params
[i
], "");
6507 LLVMBuildRet(builder
, ret
);
6511 * Given a list of shader part functions, build a wrapper function that
6512 * runs them in sequence to form a monolithic shader.
6514 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6515 LLVMValueRef
*parts
,
6518 unsigned next_shader_first_part
)
6520 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6521 /* PS epilog has one arg per color component; gfx9 merged shader
6522 * prologs need to forward 32 user SGPRs.
6524 struct si_function_info fninfo
;
6525 LLVMValueRef initial
[64], out
[64];
6526 LLVMTypeRef function_type
;
6527 unsigned num_first_params
;
6528 unsigned num_out
, initial_num_out
;
6529 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6530 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6531 unsigned num_sgprs
, num_vgprs
;
6533 struct lp_build_if_state if_state
;
6535 si_init_function_info(&fninfo
);
6537 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6538 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6539 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6542 /* The parameters of the wrapper function correspond to those of the
6543 * first part in terms of SGPRs and VGPRs, but we use the types of the
6544 * main part to get the right types. This is relevant for the
6545 * dereferenceable attribute on descriptor table pointers.
6550 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6551 num_first_params
= LLVMCountParamTypes(function_type
);
6553 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6554 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6556 if (ac_is_sgpr_param(param
)) {
6557 assert(num_vgprs
== 0);
6558 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6560 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6565 while (gprs
< num_sgprs
+ num_vgprs
) {
6566 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6567 LLVMTypeRef type
= LLVMTypeOf(param
);
6568 unsigned size
= ac_get_type_size(type
) / 4;
6570 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6572 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6573 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6574 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6579 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6580 si_get_max_workgroup_size(ctx
->shader
));
6582 if (is_merged_shader(ctx
->shader
))
6583 ac_init_exec_full_mask(&ctx
->ac
);
6585 /* Record the arguments of the function as if they were an output of
6591 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6592 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6593 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6594 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6595 unsigned size
= ac_get_type_size(param_type
) / 4;
6598 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6599 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6600 param_type
= ctx
->i32
;
6603 if (param_type
!= out_type
)
6604 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6605 out
[num_out
++] = param
;
6607 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6609 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6610 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6611 param_type
= ctx
->i64
;
6614 if (param_type
!= vector_type
)
6615 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6617 for (unsigned j
= 0; j
< size
; ++j
)
6618 out
[num_out
++] = LLVMBuildExtractElement(
6619 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6622 if (i
< fninfo
.num_sgpr_params
)
6623 num_out_sgpr
= num_out
;
6626 memcpy(initial
, out
, sizeof(out
));
6627 initial_num_out
= num_out
;
6628 initial_num_out_sgpr
= num_out_sgpr
;
6630 /* Now chain the parts. */
6631 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6632 LLVMValueRef in
[48];
6634 LLVMTypeRef ret_type
;
6635 unsigned out_idx
= 0;
6636 unsigned num_params
= LLVMCountParams(parts
[part
]);
6638 /* Merged shaders are executed conditionally depending
6639 * on the number of enabled threads passed in the input SGPRs. */
6640 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6641 LLVMValueRef ena
, count
= initial
[3];
6643 count
= LLVMBuildAnd(builder
, count
,
6644 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6645 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6646 ac_get_thread_id(&ctx
->ac
), count
, "");
6647 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6650 /* Derive arguments for the next part from outputs of the
6653 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6655 LLVMTypeRef param_type
;
6657 unsigned param_size
;
6658 LLVMValueRef arg
= NULL
;
6660 param
= LLVMGetParam(parts
[part
], param_idx
);
6661 param_type
= LLVMTypeOf(param
);
6662 param_size
= ac_get_type_size(param_type
) / 4;
6663 is_sgpr
= ac_is_sgpr_param(param
);
6666 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6667 else if (out_idx
< num_out_sgpr
) {
6668 /* Skip returned SGPRs the current part doesn't
6669 * declare on the input. */
6670 out_idx
= num_out_sgpr
;
6673 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6675 if (param_size
== 1)
6678 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6680 if (LLVMTypeOf(arg
) != param_type
) {
6681 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6682 if (LLVMGetPointerAddressSpace(param_type
) ==
6683 AC_CONST_32BIT_ADDR_SPACE
) {
6684 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6685 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6687 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6688 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6691 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6695 in
[param_idx
] = arg
;
6696 out_idx
+= param_size
;
6699 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6701 if (is_merged_shader(ctx
->shader
) &&
6702 part
+ 1 == next_shader_first_part
) {
6703 lp_build_endif(&if_state
);
6705 /* The second half of the merged shader should use
6706 * the inputs from the toplevel (wrapper) function,
6707 * not the return value from the last call.
6709 * That's because the last call was executed condi-
6710 * tionally, so we can't consume it in the main
6713 memcpy(out
, initial
, sizeof(initial
));
6714 num_out
= initial_num_out
;
6715 num_out_sgpr
= initial_num_out_sgpr
;
6719 /* Extract the returned GPRs. */
6720 ret_type
= LLVMTypeOf(ret
);
6724 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6725 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6727 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6729 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6731 LLVMBuildExtractValue(builder
, ret
, i
, "");
6733 assert(num_out
< ARRAY_SIZE(out
));
6734 out
[num_out
++] = val
;
6736 if (LLVMTypeOf(val
) == ctx
->i32
) {
6737 assert(num_out_sgpr
+ 1 == num_out
);
6738 num_out_sgpr
= num_out
;
6744 LLVMBuildRetVoid(builder
);
6747 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6748 LLVMTargetMachineRef tm
,
6749 struct si_shader
*shader
,
6751 struct pipe_debug_callback
*debug
)
6753 struct si_shader_selector
*sel
= shader
->selector
;
6754 struct si_shader_context ctx
;
6757 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6758 * conversion fails. */
6759 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6760 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6762 tgsi_dump(sel
->tokens
, 0);
6764 nir_print_shader(sel
->nir
, stderr
);
6765 si_dump_streamout(&sel
->so
);
6768 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6769 si_llvm_context_set_tgsi(&ctx
, shader
);
6770 ctx
.separate_prolog
= !is_monolithic
;
6772 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6773 sizeof(shader
->info
.vs_output_param_offset
));
6775 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6777 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6778 si_llvm_dispose(&ctx
);
6782 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6783 LLVMValueRef parts
[2];
6784 bool need_prolog
= sel
->vs_needs_prolog
;
6786 parts
[1] = ctx
.main_fn
;
6789 union si_shader_part_key prolog_key
;
6790 si_get_vs_prolog_key(&sel
->info
,
6791 shader
->info
.num_input_sgprs
,
6792 &shader
->key
.part
.vs
.prolog
,
6793 shader
, &prolog_key
);
6794 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6795 parts
[0] = ctx
.main_fn
;
6798 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6799 1 + need_prolog
, need_prolog
, 0);
6800 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6801 if (sscreen
->info
.chip_class
>= GFX9
) {
6802 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6803 LLVMValueRef parts
[4];
6804 bool vs_needs_prolog
=
6805 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6808 parts
[2] = ctx
.main_fn
;
6811 union si_shader_part_key tcs_epilog_key
;
6812 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6813 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6814 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6815 parts
[3] = ctx
.main_fn
;
6817 /* VS as LS main part */
6818 struct si_shader shader_ls
= {};
6819 shader_ls
.selector
= ls
;
6820 shader_ls
.key
.as_ls
= 1;
6821 shader_ls
.key
.mono
= shader
->key
.mono
;
6822 shader_ls
.key
.opt
= shader
->key
.opt
;
6823 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6825 if (!si_compile_tgsi_main(&ctx
, true)) {
6826 si_llvm_dispose(&ctx
);
6829 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6830 parts
[1] = ctx
.main_fn
;
6833 if (vs_needs_prolog
) {
6834 union si_shader_part_key vs_prolog_key
;
6835 si_get_vs_prolog_key(&ls
->info
,
6836 shader_ls
.info
.num_input_sgprs
,
6837 &shader
->key
.part
.tcs
.ls_prolog
,
6838 shader
, &vs_prolog_key
);
6839 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6840 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6841 parts
[0] = ctx
.main_fn
;
6844 /* Reset the shader context. */
6845 ctx
.shader
= shader
;
6846 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6848 si_build_wrapper_function(&ctx
,
6849 parts
+ !vs_needs_prolog
,
6850 4 - !vs_needs_prolog
, vs_needs_prolog
,
6851 vs_needs_prolog
? 2 : 1);
6853 LLVMValueRef parts
[2];
6854 union si_shader_part_key epilog_key
;
6856 parts
[0] = ctx
.main_fn
;
6858 memset(&epilog_key
, 0, sizeof(epilog_key
));
6859 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6860 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6861 parts
[1] = ctx
.main_fn
;
6863 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6865 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6866 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6867 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6868 LLVMValueRef es_prolog
= NULL
;
6869 LLVMValueRef es_main
= NULL
;
6870 LLVMValueRef gs_prolog
= NULL
;
6871 LLVMValueRef gs_main
= ctx
.main_fn
;
6874 union si_shader_part_key gs_prolog_key
;
6875 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6876 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6877 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6878 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6879 gs_prolog
= ctx
.main_fn
;
6882 struct si_shader shader_es
= {};
6883 shader_es
.selector
= es
;
6884 shader_es
.key
.as_es
= 1;
6885 shader_es
.key
.mono
= shader
->key
.mono
;
6886 shader_es
.key
.opt
= shader
->key
.opt
;
6887 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6889 if (!si_compile_tgsi_main(&ctx
, true)) {
6890 si_llvm_dispose(&ctx
);
6893 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6894 es_main
= ctx
.main_fn
;
6897 if (es
->vs_needs_prolog
) {
6898 union si_shader_part_key vs_prolog_key
;
6899 si_get_vs_prolog_key(&es
->info
,
6900 shader_es
.info
.num_input_sgprs
,
6901 &shader
->key
.part
.gs
.vs_prolog
,
6902 shader
, &vs_prolog_key
);
6903 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6904 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6905 es_prolog
= ctx
.main_fn
;
6908 /* Reset the shader context. */
6909 ctx
.shader
= shader
;
6910 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6912 /* Prepare the array of shader parts. */
6913 LLVMValueRef parts
[4];
6914 unsigned num_parts
= 0, main_part
, next_first_part
;
6917 parts
[num_parts
++] = es_prolog
;
6919 parts
[main_part
= num_parts
++] = es_main
;
6920 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6921 parts
[num_parts
++] = gs_main
;
6923 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6924 main_part
, next_first_part
);
6926 LLVMValueRef parts
[2];
6927 union si_shader_part_key prolog_key
;
6929 parts
[1] = ctx
.main_fn
;
6931 memset(&prolog_key
, 0, sizeof(prolog_key
));
6932 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6933 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6934 parts
[0] = ctx
.main_fn
;
6936 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6938 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6939 LLVMValueRef parts
[3];
6940 union si_shader_part_key prolog_key
;
6941 union si_shader_part_key epilog_key
;
6944 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6945 need_prolog
= si_need_ps_prolog(&prolog_key
);
6947 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6950 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6951 parts
[0] = ctx
.main_fn
;
6954 si_get_ps_epilog_key(shader
, &epilog_key
);
6955 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6956 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6958 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6959 need_prolog
? 1 : 0, 0);
6962 si_llvm_optimize_module(&ctx
);
6964 /* Post-optimization transformations and analysis. */
6965 si_optimize_vs_outputs(&ctx
);
6967 if ((debug
&& debug
->debug_message
) ||
6968 si_can_dump_shader(sscreen
, ctx
.type
)) {
6969 ctx
.shader
->config
.private_mem_vgprs
=
6970 ac_count_scratch_private_memory(ctx
.main_fn
);
6973 /* Make sure the input is a pointer and not integer followed by inttoptr. */
6974 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
6975 LLVMPointerTypeKind
);
6977 /* Compile to bytecode. */
6978 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6979 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6980 si_llvm_dispose(&ctx
);
6982 fprintf(stderr
, "LLVM failed to compile shader\n");
6986 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6987 * LLVM 3.9svn has this bug.
6989 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6990 unsigned wave_size
= 64;
6991 unsigned max_vgprs
= 256;
6992 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6993 unsigned max_sgprs_per_wave
= 128;
6994 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6995 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6996 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6998 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6999 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7001 if (shader
->config
.num_sgprs
> max_sgprs
||
7002 shader
->config
.num_vgprs
> max_vgprs
) {
7003 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7004 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7005 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7006 max_sgprs
, max_vgprs
);
7008 /* Just terminate the process, because dependent
7009 * shaders can hang due to bad input data, but use
7010 * the env var to allow shader-db to work.
7012 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7017 /* Add the scratch offset to input SGPRs. */
7018 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
7019 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7021 /* Calculate the number of fragment input VGPRs. */
7022 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7023 shader
->info
.num_input_vgprs
= 0;
7024 shader
->info
.face_vgpr_index
= -1;
7025 shader
->info
.ancillary_vgpr_index
= -1;
7027 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7028 shader
->info
.num_input_vgprs
+= 2;
7029 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7030 shader
->info
.num_input_vgprs
+= 2;
7031 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7032 shader
->info
.num_input_vgprs
+= 2;
7033 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7034 shader
->info
.num_input_vgprs
+= 3;
7035 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7036 shader
->info
.num_input_vgprs
+= 2;
7037 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7038 shader
->info
.num_input_vgprs
+= 2;
7039 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7040 shader
->info
.num_input_vgprs
+= 2;
7041 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7042 shader
->info
.num_input_vgprs
+= 1;
7043 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7044 shader
->info
.num_input_vgprs
+= 1;
7045 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7046 shader
->info
.num_input_vgprs
+= 1;
7047 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7048 shader
->info
.num_input_vgprs
+= 1;
7049 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7050 shader
->info
.num_input_vgprs
+= 1;
7051 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7052 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7053 shader
->info
.num_input_vgprs
+= 1;
7055 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7056 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7057 shader
->info
.num_input_vgprs
+= 1;
7059 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7060 shader
->info
.num_input_vgprs
+= 1;
7061 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7062 shader
->info
.num_input_vgprs
+= 1;
7065 si_calculate_max_simd_waves(shader
);
7066 si_shader_dump_stats_for_shader_db(shader
, debug
);
7071 * Create, compile and return a shader part (prolog or epilog).
7073 * \param sscreen screen
7074 * \param list list of shader parts of the same category
7075 * \param type shader type
7076 * \param key shader part key
7077 * \param prolog whether the part being requested is a prolog
7078 * \param tm LLVM target machine
7079 * \param debug debug callback
7080 * \param build the callback responsible for building the main function
7081 * \return non-NULL on success
7083 static struct si_shader_part
*
7084 si_get_shader_part(struct si_screen
*sscreen
,
7085 struct si_shader_part
**list
,
7086 enum pipe_shader_type type
,
7088 union si_shader_part_key
*key
,
7089 LLVMTargetMachineRef tm
,
7090 struct pipe_debug_callback
*debug
,
7091 void (*build
)(struct si_shader_context
*,
7092 union si_shader_part_key
*),
7095 struct si_shader_part
*result
;
7097 mtx_lock(&sscreen
->shader_parts_mutex
);
7099 /* Find existing. */
7100 for (result
= *list
; result
; result
= result
->next
) {
7101 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7102 mtx_unlock(&sscreen
->shader_parts_mutex
);
7107 /* Compile a new one. */
7108 result
= CALLOC_STRUCT(si_shader_part
);
7111 struct si_shader shader
= {};
7112 struct si_shader_context ctx
;
7114 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7115 ctx
.shader
= &shader
;
7119 case PIPE_SHADER_VERTEX
:
7120 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7121 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7123 case PIPE_SHADER_TESS_CTRL
:
7125 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7127 case PIPE_SHADER_GEOMETRY
:
7130 case PIPE_SHADER_FRAGMENT
:
7132 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7134 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7137 unreachable("bad shader part");
7143 si_llvm_optimize_module(&ctx
);
7145 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7146 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7152 result
->next
= *list
;
7156 si_llvm_dispose(&ctx
);
7157 mtx_unlock(&sscreen
->shader_parts_mutex
);
7161 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7163 LLVMValueRef ptr
[2], list
;
7164 bool is_merged_shader
=
7165 ctx
->screen
->info
.chip_class
>= GFX9
&&
7166 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7167 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7168 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7170 if (HAVE_32BIT_POINTERS
) {
7171 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7172 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7173 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7177 /* Get the pointer to rw buffers. */
7178 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7179 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
+ 1);
7180 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7181 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7182 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7183 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7188 * Build the vertex shader prolog function.
7190 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7191 * All inputs are returned unmodified. The vertex load indices are
7192 * stored after them, which will be used by the API VS for fetching inputs.
7194 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7199 * (VertexID + BaseVertex),
7200 * (InstanceID + StartInstance),
7201 * (InstanceID / 2 + StartInstance)
7203 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7204 union si_shader_part_key
*key
)
7206 struct si_function_info fninfo
;
7207 LLVMTypeRef
*returns
;
7208 LLVMValueRef ret
, func
;
7210 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7211 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7212 LLVMValueRef input_vgprs
[9];
7213 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7215 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7217 si_init_function_info(&fninfo
);
7219 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7220 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7221 sizeof(LLVMTypeRef
));
7224 /* Declare input and output SGPRs. */
7225 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7226 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7227 returns
[num_returns
++] = ctx
->i32
;
7230 /* Preloaded VGPRs (outputs must be floats) */
7231 for (i
= 0; i
< num_input_vgprs
; i
++) {
7232 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7233 returns
[num_returns
++] = ctx
->f32
;
7236 /* Vertex load indices. */
7237 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7238 returns
[num_returns
++] = ctx
->f32
;
7240 /* Create the function. */
7241 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7242 func
= ctx
->main_fn
;
7244 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7245 if (!key
->vs_prolog
.is_monolithic
)
7246 si_init_exec_from_input(ctx
, 3, 0);
7248 if (key
->vs_prolog
.as_ls
&&
7249 ctx
->screen
->has_ls_vgpr_init_bug
) {
7250 /* If there are no HS threads, SPI loads the LS VGPRs
7251 * starting at VGPR 0. Shift them back to where they
7254 LLVMValueRef has_hs_threads
=
7255 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7256 si_unpack_param(ctx
, 3, 8, 8),
7259 for (i
= 4; i
> 0; --i
) {
7260 input_vgprs
[i
+ 1] =
7261 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7263 input_vgprs
[i
- 1], "");
7268 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7269 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7271 /* Copy inputs to outputs. This should be no-op, as the registers match,
7272 * but it will prevent the compiler from overwriting them unintentionally.
7274 ret
= ctx
->return_value
;
7275 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7276 LLVMValueRef p
= LLVMGetParam(func
, i
);
7277 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7279 for (i
= 0; i
< num_input_vgprs
; i
++) {
7280 LLVMValueRef p
= input_vgprs
[i
];
7281 p
= ac_to_float(&ctx
->ac
, p
);
7282 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7283 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7286 /* Compute vertex load indices from instance divisors. */
7287 LLVMValueRef instance_divisor_constbuf
= NULL
;
7289 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7290 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7291 LLVMValueRef buf_index
=
7292 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7293 instance_divisor_constbuf
=
7294 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7297 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7298 bool divisor_is_one
=
7299 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7300 bool divisor_is_fetched
=
7301 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7304 if (divisor_is_one
|| divisor_is_fetched
) {
7305 LLVMValueRef divisor
= ctx
->i32_1
;
7307 if (divisor_is_fetched
) {
7308 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7309 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7310 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7313 /* InstanceID / Divisor + StartInstance */
7314 index
= get_instance_index_for_fetch(ctx
,
7316 SI_SGPR_START_INSTANCE
,
7319 /* VertexID + BaseVertex */
7320 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7322 LLVMGetParam(func
, user_sgpr_base
+
7323 SI_SGPR_BASE_VERTEX
), "");
7326 index
= ac_to_float(&ctx
->ac
, index
);
7327 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7328 fninfo
.num_params
+ i
, "");
7331 si_llvm_build_ret(ctx
, ret
);
7334 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7335 LLVMTargetMachineRef tm
,
7336 struct si_shader
*shader
,
7337 struct pipe_debug_callback
*debug
,
7338 struct si_shader
*main_part
,
7339 const struct si_vs_prolog_bits
*key
)
7341 struct si_shader_selector
*vs
= main_part
->selector
;
7343 if (!si_vs_needs_prolog(vs
, key
))
7346 /* Get the prolog. */
7347 union si_shader_part_key prolog_key
;
7348 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7349 key
, shader
, &prolog_key
);
7352 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7353 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7354 debug
, si_build_vs_prolog_function
,
7355 "Vertex Shader Prolog");
7356 return shader
->prolog
!= NULL
;
7360 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7362 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7363 LLVMTargetMachineRef tm
,
7364 struct si_shader
*shader
,
7365 struct pipe_debug_callback
*debug
)
7367 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7368 &shader
->key
.part
.vs
.prolog
);
7372 * Compile the TCS epilog function. This writes tesselation factors to memory
7373 * based on the output primitive type of the tesselator (determined by TES).
7375 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7376 union si_shader_part_key
*key
)
7378 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7379 struct si_function_info fninfo
;
7382 si_init_function_info(&fninfo
);
7384 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7385 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7386 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7387 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7388 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7389 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7390 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7391 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7392 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7393 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7394 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7395 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7396 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7397 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7398 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7399 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7400 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7401 if (!HAVE_32BIT_POINTERS
)
7402 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7403 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7404 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7405 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7407 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7408 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7409 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7410 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7411 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7412 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7413 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7414 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7415 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7416 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7419 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7420 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7421 unsigned tess_factors_idx
=
7422 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7423 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7424 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7426 for (unsigned i
= 0; i
< 6; i
++)
7427 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7429 /* Create the function. */
7430 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7431 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7432 ac_declare_lds_as_pointer(&ctx
->ac
);
7433 func
= ctx
->main_fn
;
7435 LLVMValueRef invoc0_tess_factors
[6];
7436 for (unsigned i
= 0; i
< 6; i
++)
7437 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7439 si_write_tess_factors(bld_base
,
7440 LLVMGetParam(func
, tess_factors_idx
),
7441 LLVMGetParam(func
, tess_factors_idx
+ 1),
7442 LLVMGetParam(func
, tess_factors_idx
+ 2),
7443 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7445 LLVMBuildRetVoid(ctx
->ac
.builder
);
7449 * Select and compile (or reuse) TCS parts (epilog).
7451 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7452 LLVMTargetMachineRef tm
,
7453 struct si_shader
*shader
,
7454 struct pipe_debug_callback
*debug
)
7456 if (sscreen
->info
.chip_class
>= GFX9
) {
7457 struct si_shader
*ls_main_part
=
7458 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7460 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7461 &shader
->key
.part
.tcs
.ls_prolog
))
7464 shader
->previous_stage
= ls_main_part
;
7467 /* Get the epilog. */
7468 union si_shader_part_key epilog_key
;
7469 memset(&epilog_key
, 0, sizeof(epilog_key
));
7470 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7472 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7473 PIPE_SHADER_TESS_CTRL
, false,
7474 &epilog_key
, tm
, debug
,
7475 si_build_tcs_epilog_function
,
7476 "Tessellation Control Shader Epilog");
7477 return shader
->epilog
!= NULL
;
7481 * Select and compile (or reuse) GS parts (prolog).
7483 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7484 LLVMTargetMachineRef tm
,
7485 struct si_shader
*shader
,
7486 struct pipe_debug_callback
*debug
)
7488 if (sscreen
->info
.chip_class
>= GFX9
) {
7489 struct si_shader
*es_main_part
=
7490 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7492 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7493 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7494 &shader
->key
.part
.gs
.vs_prolog
))
7497 shader
->previous_stage
= es_main_part
;
7500 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7503 union si_shader_part_key prolog_key
;
7504 memset(&prolog_key
, 0, sizeof(prolog_key
));
7505 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7507 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7508 PIPE_SHADER_GEOMETRY
, true,
7509 &prolog_key
, tm
, debug
,
7510 si_build_gs_prolog_function
,
7511 "Geometry Shader Prolog");
7512 return shader
->prolog2
!= NULL
;
7516 * Build the pixel shader prolog function. This handles:
7517 * - two-side color selection and interpolation
7518 * - overriding interpolation parameters for the API PS
7519 * - polygon stippling
7521 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7522 * overriden by other states. (e.g. per-sample interpolation)
7523 * Interpolated colors are stored after the preloaded VGPRs.
7525 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7526 union si_shader_part_key
*key
)
7528 struct si_function_info fninfo
;
7529 LLVMValueRef ret
, func
;
7530 int num_returns
, i
, num_color_channels
;
7532 assert(si_need_ps_prolog(key
));
7534 si_init_function_info(&fninfo
);
7536 /* Declare inputs. */
7537 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7538 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7540 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7541 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7543 /* Declare outputs (same as inputs + add colors if needed) */
7544 num_returns
= fninfo
.num_params
;
7545 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7546 for (i
= 0; i
< num_color_channels
; i
++)
7547 fninfo
.types
[num_returns
++] = ctx
->f32
;
7549 /* Create the function. */
7550 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7552 func
= ctx
->main_fn
;
7554 /* Copy inputs to outputs. This should be no-op, as the registers match,
7555 * but it will prevent the compiler from overwriting them unintentionally.
7557 ret
= ctx
->return_value
;
7558 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7559 LLVMValueRef p
= LLVMGetParam(func
, i
);
7560 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7563 /* Polygon stippling. */
7564 if (key
->ps_prolog
.states
.poly_stipple
) {
7565 /* POS_FIXED_PT is always last. */
7566 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7567 key
->ps_prolog
.num_input_vgprs
- 1;
7568 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7570 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7573 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7574 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7575 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7576 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7578 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7579 * The hw doesn't compute CENTROID if the whole wave only
7580 * contains fully-covered quads.
7582 * PRIM_MASK is after user SGPRs.
7584 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7585 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7586 LLVMConstInt(ctx
->i32
, 31, 0), "");
7587 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7590 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7591 /* Read PERSP_CENTER. */
7592 for (i
= 0; i
< 2; i
++)
7593 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7594 /* Read PERSP_CENTROID. */
7595 for (i
= 0; i
< 2; i
++)
7596 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7597 /* Select PERSP_CENTROID. */
7598 for (i
= 0; i
< 2; i
++) {
7599 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7600 center
[i
], centroid
[i
], "");
7601 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7602 tmp
, base
+ 4 + i
, "");
7605 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7606 /* Read LINEAR_CENTER. */
7607 for (i
= 0; i
< 2; i
++)
7608 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7609 /* Read LINEAR_CENTROID. */
7610 for (i
= 0; i
< 2; i
++)
7611 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7612 /* Select LINEAR_CENTROID. */
7613 for (i
= 0; i
< 2; i
++) {
7614 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7615 center
[i
], centroid
[i
], "");
7616 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7617 tmp
, base
+ 10 + i
, "");
7622 /* Force per-sample interpolation. */
7623 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7624 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7625 LLVMValueRef persp_sample
[2];
7627 /* Read PERSP_SAMPLE. */
7628 for (i
= 0; i
< 2; i
++)
7629 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7630 /* Overwrite PERSP_CENTER. */
7631 for (i
= 0; i
< 2; i
++)
7632 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7633 persp_sample
[i
], base
+ 2 + i
, "");
7634 /* Overwrite PERSP_CENTROID. */
7635 for (i
= 0; i
< 2; i
++)
7636 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7637 persp_sample
[i
], base
+ 4 + i
, "");
7639 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7640 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7641 LLVMValueRef linear_sample
[2];
7643 /* Read LINEAR_SAMPLE. */
7644 for (i
= 0; i
< 2; i
++)
7645 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7646 /* Overwrite LINEAR_CENTER. */
7647 for (i
= 0; i
< 2; i
++)
7648 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7649 linear_sample
[i
], base
+ 8 + i
, "");
7650 /* Overwrite LINEAR_CENTROID. */
7651 for (i
= 0; i
< 2; i
++)
7652 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7653 linear_sample
[i
], base
+ 10 + i
, "");
7656 /* Force center interpolation. */
7657 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7658 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7659 LLVMValueRef persp_center
[2];
7661 /* Read PERSP_CENTER. */
7662 for (i
= 0; i
< 2; i
++)
7663 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7664 /* Overwrite PERSP_SAMPLE. */
7665 for (i
= 0; i
< 2; i
++)
7666 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7667 persp_center
[i
], base
+ i
, "");
7668 /* Overwrite PERSP_CENTROID. */
7669 for (i
= 0; i
< 2; i
++)
7670 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7671 persp_center
[i
], base
+ 4 + i
, "");
7673 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7674 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7675 LLVMValueRef linear_center
[2];
7677 /* Read LINEAR_CENTER. */
7678 for (i
= 0; i
< 2; i
++)
7679 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7680 /* Overwrite LINEAR_SAMPLE. */
7681 for (i
= 0; i
< 2; i
++)
7682 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7683 linear_center
[i
], base
+ 6 + i
, "");
7684 /* Overwrite LINEAR_CENTROID. */
7685 for (i
= 0; i
< 2; i
++)
7686 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7687 linear_center
[i
], base
+ 10 + i
, "");
7690 /* Interpolate colors. */
7691 unsigned color_out_idx
= 0;
7692 for (i
= 0; i
< 2; i
++) {
7693 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7694 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7695 key
->ps_prolog
.face_vgpr_index
;
7696 LLVMValueRef interp
[2], color
[4];
7697 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7702 /* If the interpolation qualifier is not CONSTANT (-1). */
7703 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7704 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7705 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7707 /* Get the (i,j) updated by bc_optimize handling. */
7708 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7710 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7711 interp_vgpr
+ 1, "");
7712 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7715 /* Use the absolute location of the input. */
7716 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7718 if (key
->ps_prolog
.states
.color_two_side
) {
7719 face
= LLVMGetParam(func
, face_vgpr
);
7720 face
= ac_to_integer(&ctx
->ac
, face
);
7723 interp_fs_input(ctx
,
7724 key
->ps_prolog
.color_attr_index
[i
],
7725 TGSI_SEMANTIC_COLOR
, i
,
7726 key
->ps_prolog
.num_interp_inputs
,
7727 key
->ps_prolog
.colors_read
, interp_ij
,
7728 prim_mask
, face
, color
);
7731 unsigned chan
= u_bit_scan(&writemask
);
7732 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7733 fninfo
.num_params
+ color_out_idx
++, "");
7737 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7740 * "When per-sample shading is active due to the use of a fragment
7741 * input qualified by sample or due to the use of the gl_SampleID
7742 * or gl_SamplePosition variables, only the bit for the current
7743 * sample is set in gl_SampleMaskIn. When state specifies multiple
7744 * fragment shader invocations for a given fragment, the sample
7745 * mask for any single fragment shader invocation may specify a
7746 * subset of the covered samples for the fragment. In this case,
7747 * the bit corresponding to each covered sample will be set in
7748 * exactly one fragment shader invocation."
7750 * The samplemask loaded by hardware is always the coverage of the
7751 * entire pixel/fragment, so mask bits out based on the sample ID.
7753 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7754 /* The bit pattern matches that used by fixed function fragment
7756 static const uint16_t ps_iter_masks
[] = {
7757 0xffff, /* not used */
7763 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7765 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7766 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7767 key
->ps_prolog
.ancillary_vgpr_index
;
7768 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7769 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7771 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7772 samplemask
= LLVMBuildAnd(
7775 LLVMBuildShl(ctx
->ac
.builder
,
7776 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7779 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7781 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7782 ancillary_vgpr
+ 1, "");
7785 /* Tell LLVM to insert WQM instruction sequence when needed. */
7786 if (key
->ps_prolog
.wqm
) {
7787 LLVMAddTargetDependentFunctionAttr(func
,
7788 "amdgpu-ps-wqm-outputs", "");
7791 si_llvm_build_ret(ctx
, ret
);
7795 * Build the pixel shader epilog function. This handles everything that must be
7796 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7798 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7799 union si_shader_part_key
*key
)
7801 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7802 struct si_function_info fninfo
;
7803 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7805 struct si_ps_exports exp
= {};
7807 si_init_function_info(&fninfo
);
7809 /* Declare input SGPRs. */
7810 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7811 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7812 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7813 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7814 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7816 /* Declare input VGPRs. */
7817 unsigned required_num_params
=
7818 fninfo
.num_sgpr_params
+
7819 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7820 key
->ps_epilog
.writes_z
+
7821 key
->ps_epilog
.writes_stencil
+
7822 key
->ps_epilog
.writes_samplemask
;
7824 required_num_params
= MAX2(required_num_params
,
7825 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7827 while (fninfo
.num_params
< required_num_params
)
7828 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7830 /* Create the function. */
7831 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7832 /* Disable elimination of unused inputs. */
7833 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7834 "InitialPSInputAddr", 0xffffff);
7836 /* Process colors. */
7837 unsigned vgpr
= fninfo
.num_sgpr_params
;
7838 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7839 int last_color_export
= -1;
7841 /* Find the last color export. */
7842 if (!key
->ps_epilog
.writes_z
&&
7843 !key
->ps_epilog
.writes_stencil
&&
7844 !key
->ps_epilog
.writes_samplemask
) {
7845 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7847 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7848 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7849 /* Just set this if any of the colorbuffers are enabled. */
7851 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7852 last_color_export
= 0;
7854 for (i
= 0; i
< 8; i
++)
7855 if (colors_written
& (1 << i
) &&
7856 (spi_format
>> (i
* 4)) & 0xf)
7857 last_color_export
= i
;
7861 while (colors_written
) {
7862 LLVMValueRef color
[4];
7863 int mrt
= u_bit_scan(&colors_written
);
7865 for (i
= 0; i
< 4; i
++)
7866 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7868 si_export_mrt_color(bld_base
, color
, mrt
,
7869 fninfo
.num_params
- 1,
7870 mrt
== last_color_export
, &exp
);
7873 /* Process depth, stencil, samplemask. */
7874 if (key
->ps_epilog
.writes_z
)
7875 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7876 if (key
->ps_epilog
.writes_stencil
)
7877 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7878 if (key
->ps_epilog
.writes_samplemask
)
7879 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7881 if (depth
|| stencil
|| samplemask
)
7882 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7883 else if (last_color_export
== -1)
7884 ac_build_export_null(&ctx
->ac
);
7887 si_emit_ps_exports(ctx
, &exp
);
7890 LLVMBuildRetVoid(ctx
->ac
.builder
);
7894 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7896 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7897 LLVMTargetMachineRef tm
,
7898 struct si_shader
*shader
,
7899 struct pipe_debug_callback
*debug
)
7901 union si_shader_part_key prolog_key
;
7902 union si_shader_part_key epilog_key
;
7904 /* Get the prolog. */
7905 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7907 /* The prolog is a no-op if these aren't set. */
7908 if (si_need_ps_prolog(&prolog_key
)) {
7910 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7911 PIPE_SHADER_FRAGMENT
, true,
7912 &prolog_key
, tm
, debug
,
7913 si_build_ps_prolog_function
,
7914 "Fragment Shader Prolog");
7915 if (!shader
->prolog
)
7919 /* Get the epilog. */
7920 si_get_ps_epilog_key(shader
, &epilog_key
);
7923 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7924 PIPE_SHADER_FRAGMENT
, false,
7925 &epilog_key
, tm
, debug
,
7926 si_build_ps_epilog_function
,
7927 "Fragment Shader Epilog");
7928 if (!shader
->epilog
)
7931 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7932 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7933 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7934 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7937 /* Set up the enable bits for per-sample shading if needed. */
7938 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7939 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7940 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7941 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7942 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7943 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7945 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7946 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7947 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7948 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7949 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7950 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7952 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7953 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7954 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7955 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7956 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7957 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7959 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7960 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7961 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7962 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7963 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7964 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7967 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7968 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7969 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7970 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7971 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7974 /* At least one pair of interpolation weights must be enabled. */
7975 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7976 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7977 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7980 /* Samplemask fixup requires the sample ID. */
7981 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7982 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7983 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7986 /* The sample mask input is always enabled, because the API shader always
7987 * passes it through to the epilog. Disable it here if it's unused.
7989 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7990 !shader
->selector
->info
.reads_samplemask
)
7991 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7996 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7999 /* If tessellation is all offchip and on-chip GS isn't used, this
8000 * workaround is not needed.
8004 /* SPI barrier management bug:
8005 * Make sure we have at least 4k of LDS in use to avoid the bug.
8006 * It applies to workgroup sizes of more than one wavefront.
8008 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8009 sscreen
->info
.family
== CHIP_KABINI
||
8010 sscreen
->info
.family
== CHIP_MULLINS
)
8011 *lds_size
= MAX2(*lds_size
, 8);
8014 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8015 struct si_shader
*shader
)
8017 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8019 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8021 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8022 si_get_max_workgroup_size(shader
) > 64) {
8023 si_multiwave_lds_size_workaround(sscreen
,
8024 &shader
->config
.lds_size
);
8028 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8029 struct si_shader
*shader
,
8030 struct pipe_debug_callback
*debug
)
8032 struct si_shader_selector
*sel
= shader
->selector
;
8033 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8036 /* LS, ES, VS are compiled on demand if the main part hasn't been
8037 * compiled for that stage.
8039 * Vertex shaders are compiled on demand when a vertex fetch
8040 * workaround must be applied.
8042 if (shader
->is_monolithic
) {
8043 /* Monolithic shader (compiled as a whole, has many variants,
8044 * may take a long time to compile).
8046 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8050 /* The shader consists of several parts:
8052 * - the middle part is the user shader, it has 1 variant only
8053 * and it was compiled during the creation of the shader
8055 * - the prolog part is inserted at the beginning
8056 * - the epilog part is inserted at the end
8058 * The prolog and epilog have many (but simple) variants.
8060 * Starting with gfx9, geometry and tessellation control
8061 * shaders also contain the prolog and user shader parts of
8062 * the previous shader stage.
8068 /* Copy the compiled TGSI shader data over. */
8069 shader
->is_binary_shared
= true;
8070 shader
->binary
= mainp
->binary
;
8071 shader
->config
= mainp
->config
;
8072 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8073 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8074 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8075 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8076 memcpy(shader
->info
.vs_output_param_offset
,
8077 mainp
->info
.vs_output_param_offset
,
8078 sizeof(mainp
->info
.vs_output_param_offset
));
8079 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8080 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8081 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8083 /* Select prologs and/or epilogs. */
8084 switch (sel
->type
) {
8085 case PIPE_SHADER_VERTEX
:
8086 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8089 case PIPE_SHADER_TESS_CTRL
:
8090 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8093 case PIPE_SHADER_TESS_EVAL
:
8095 case PIPE_SHADER_GEOMETRY
:
8096 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8099 case PIPE_SHADER_FRAGMENT
:
8100 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8103 /* Make sure we have at least as many VGPRs as there
8104 * are allocated inputs.
8106 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8107 shader
->info
.num_input_vgprs
);
8111 /* Update SGPR and VGPR counts. */
8112 if (shader
->prolog
) {
8113 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8114 shader
->prolog
->config
.num_sgprs
);
8115 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8116 shader
->prolog
->config
.num_vgprs
);
8118 if (shader
->previous_stage
) {
8119 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8120 shader
->previous_stage
->config
.num_sgprs
);
8121 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8122 shader
->previous_stage
->config
.num_vgprs
);
8123 shader
->config
.spilled_sgprs
=
8124 MAX2(shader
->config
.spilled_sgprs
,
8125 shader
->previous_stage
->config
.spilled_sgprs
);
8126 shader
->config
.spilled_vgprs
=
8127 MAX2(shader
->config
.spilled_vgprs
,
8128 shader
->previous_stage
->config
.spilled_vgprs
);
8129 shader
->config
.private_mem_vgprs
=
8130 MAX2(shader
->config
.private_mem_vgprs
,
8131 shader
->previous_stage
->config
.private_mem_vgprs
);
8132 shader
->config
.scratch_bytes_per_wave
=
8133 MAX2(shader
->config
.scratch_bytes_per_wave
,
8134 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8135 shader
->info
.uses_instanceid
|=
8136 shader
->previous_stage
->info
.uses_instanceid
;
8138 if (shader
->prolog2
) {
8139 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8140 shader
->prolog2
->config
.num_sgprs
);
8141 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8142 shader
->prolog2
->config
.num_vgprs
);
8144 if (shader
->epilog
) {
8145 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8146 shader
->epilog
->config
.num_sgprs
);
8147 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8148 shader
->epilog
->config
.num_vgprs
);
8150 si_calculate_max_simd_waves(shader
);
8153 si_fix_resource_usage(sscreen
, shader
);
8154 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8158 r
= si_shader_binary_upload(sscreen
, shader
);
8160 fprintf(stderr
, "LLVM failed to upload shader\n");
8167 void si_shader_destroy(struct si_shader
*shader
)
8169 if (shader
->scratch_bo
)
8170 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8172 r600_resource_reference(&shader
->bo
, NULL
);
8174 if (!shader
->is_binary_shared
)
8175 ac_shader_binary_clean(&shader
->binary
);
8177 free(shader
->shader_log
);