2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "radeon/radeon_elf_util.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_build.h"
40 #include "tgsi/tgsi_util.h"
41 #include "tgsi/tgsi_dump.h"
43 #include "ac_llvm_util.h"
44 #include "si_shader_internal.h"
49 static const char *scratch_rsrc_dword0_symbol
=
50 "SCRATCH_RSRC_DWORD0";
52 static const char *scratch_rsrc_dword1_symbol
=
53 "SCRATCH_RSRC_DWORD1";
55 struct si_shader_output_values
57 LLVMValueRef values
[4];
58 unsigned semantic_name
;
59 unsigned semantic_index
;
60 ubyte vertex_stream
[4];
63 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
64 struct si_screen
*sscreen
,
65 struct si_shader
*shader
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
75 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
76 union si_shader_part_key
*key
);
77 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
86 /* Ideally pass the sample mask input to the PS epilog as v13, which
87 * is its usual location, so that the shader doesn't have to add v_mov.
89 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
91 /* The VS location of the PrimitiveID input is the same in the epilog,
92 * so that the main shader part doesn't have to move it.
94 #define VS_EPILOG_PRIMID_LOC 2
102 #define SENDMSG_GS_DONE 3
104 #define SENDMSG_GS_OP_NOP (0 << 4)
105 #define SENDMSG_GS_OP_CUT (1 << 4)
106 #define SENDMSG_GS_OP_EMIT (2 << 4)
107 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
110 * Returns a unique index for a semantic name and index. The index must be
111 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
114 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
116 switch (semantic_name
) {
117 case TGSI_SEMANTIC_POSITION
:
119 case TGSI_SEMANTIC_PSIZE
:
121 case TGSI_SEMANTIC_CLIPDIST
:
124 case TGSI_SEMANTIC_GENERIC
:
128 assert(!"invalid generic index");
131 /* patch indices are completely separate and thus start from 0 */
132 case TGSI_SEMANTIC_TESSOUTER
:
134 case TGSI_SEMANTIC_TESSINNER
:
136 case TGSI_SEMANTIC_PATCH
:
140 assert(!"invalid semantic name");
145 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
148 case TGSI_SEMANTIC_FOG
:
150 case TGSI_SEMANTIC_LAYER
:
152 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
154 case TGSI_SEMANTIC_PRIMID
:
156 case TGSI_SEMANTIC_COLOR
: /* these alias */
157 case TGSI_SEMANTIC_BCOLOR
:
159 case TGSI_SEMANTIC_TEXCOORD
:
162 assert(!"invalid semantic name");
168 * Get the value of a shader input parameter and extract a bitfield.
170 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
171 unsigned param
, unsigned rshift
,
174 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
175 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
178 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
179 value
= bitcast(&ctx
->soa
.bld_base
,
180 TGSI_TYPE_UNSIGNED
, value
);
183 value
= LLVMBuildLShr(gallivm
->builder
, value
,
184 lp_build_const_int32(gallivm
, rshift
), "");
186 if (rshift
+ bitwidth
< 32) {
187 unsigned mask
= (1 << bitwidth
) - 1;
188 value
= LLVMBuildAnd(gallivm
->builder
, value
,
189 lp_build_const_int32(gallivm
, mask
), "");
195 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
198 case PIPE_SHADER_TESS_CTRL
:
199 return unpack_param(ctx
, SI_PARAM_REL_IDS
, 0, 8);
201 case PIPE_SHADER_TESS_EVAL
:
202 return LLVMGetParam(ctx
->main_fn
,
203 ctx
->param_tes_rel_patch_id
);
211 /* Tessellation shaders pass outputs to the next shader using LDS.
213 * LS outputs = TCS inputs
214 * TCS outputs = TES inputs
217 * - TCS inputs for patch 0
218 * - TCS inputs for patch 1
219 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
221 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
222 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
223 * - TCS outputs for patch 1
224 * - Per-patch TCS outputs for patch 1
225 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
226 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
229 * All three shaders VS(LS), TCS, TES share the same LDS space.
233 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
235 if (ctx
->type
== PIPE_SHADER_VERTEX
)
236 return unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 0, 13);
237 else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
238 return unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 0, 13);
246 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
248 return unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 0, 13);
252 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
254 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
256 SI_PARAM_TCS_OUT_OFFSETS
,
262 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
264 return lp_build_mul_imm(&ctx
->soa
.bld_base
.uint_bld
,
266 SI_PARAM_TCS_OUT_OFFSETS
,
272 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
274 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
275 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
276 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
278 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
282 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
284 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
285 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
286 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
287 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
289 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
290 LLVMBuildMul(gallivm
->builder
, patch_stride
,
296 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
298 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
299 LLVMValueRef patch0_patch_data_offset
=
300 get_tcs_out_patch0_patch_data_offset(ctx
);
301 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
302 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
304 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
305 LLVMBuildMul(gallivm
->builder
, patch_stride
,
310 static LLVMValueRef
build_gep0(struct si_shader_context
*ctx
,
311 LLVMValueRef base_ptr
, LLVMValueRef index
)
313 LLVMValueRef indices
[2] = {
314 LLVMConstInt(ctx
->i32
, 0, 0),
317 return LLVMBuildGEP(ctx
->gallivm
.builder
, base_ptr
,
321 static void build_indexed_store(struct si_shader_context
*ctx
,
322 LLVMValueRef base_ptr
, LLVMValueRef index
,
325 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
326 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
328 LLVMBuildStore(gallivm
->builder
, value
,
329 build_gep0(ctx
, base_ptr
, index
));
333 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
334 * It's equivalent to doing a load from &base_ptr[index].
336 * \param base_ptr Where the array starts.
337 * \param index The element index into the array.
338 * \param uniform Whether the base_ptr and index can be assumed to be
339 * dynamically uniform
341 static LLVMValueRef
build_indexed_load(struct si_shader_context
*ctx
,
342 LLVMValueRef base_ptr
, LLVMValueRef index
,
345 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
346 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
347 LLVMValueRef pointer
;
349 pointer
= build_gep0(ctx
, base_ptr
, index
);
351 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
352 return LLVMBuildLoad(gallivm
->builder
, pointer
, "");
356 * Do a load from &base_ptr[index], but also add a flag that it's loading
357 * a constant from a dynamically uniform index.
359 static LLVMValueRef
build_indexed_load_const(
360 struct si_shader_context
*ctx
,
361 LLVMValueRef base_ptr
, LLVMValueRef index
)
363 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
364 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
368 static LLVMValueRef
get_instance_index_for_fetch(
369 struct si_shader_context
*radeon_bld
,
370 unsigned param_start_instance
, unsigned divisor
)
372 struct si_shader_context
*ctx
=
373 si_shader_context(&radeon_bld
->soa
.bld_base
);
374 struct gallivm_state
*gallivm
= radeon_bld
->soa
.bld_base
.base
.gallivm
;
376 LLVMValueRef result
= LLVMGetParam(radeon_bld
->main_fn
,
377 ctx
->param_instance_id
);
379 /* The division must be done before START_INSTANCE is added. */
381 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
382 lp_build_const_int32(gallivm
, divisor
), "");
384 return LLVMBuildAdd(gallivm
->builder
, result
,
385 LLVMGetParam(radeon_bld
->main_fn
, param_start_instance
), "");
388 static void declare_input_vs(
389 struct si_shader_context
*ctx
,
390 unsigned input_index
,
391 const struct tgsi_full_declaration
*decl
,
394 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
395 struct gallivm_state
*gallivm
= base
->gallivm
;
400 LLVMValueRef t_list_ptr
;
401 LLVMValueRef t_offset
;
403 LLVMValueRef attribute_offset
;
404 LLVMValueRef buffer_index
;
405 LLVMValueRef args
[3];
408 /* Load the T list */
409 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VERTEX_BUFFERS
);
411 t_offset
= lp_build_const_int32(gallivm
, input_index
);
413 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
415 /* Build the attribute offset */
416 attribute_offset
= lp_build_const_int32(gallivm
, 0);
418 buffer_index
= LLVMGetParam(ctx
->main_fn
,
419 ctx
->param_vertex_index0
+
423 args
[1] = attribute_offset
;
424 args
[2] = buffer_index
;
425 input
= lp_build_intrinsic(gallivm
->builder
,
426 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
427 LP_FUNC_ATTR_READNONE
);
429 /* Break up the vec4 into individual components */
430 for (chan
= 0; chan
< 4; chan
++) {
431 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
432 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
433 input
, llvm_chan
, "");
436 fix_fetch
= (ctx
->shader
->key
.mono
.vs
.fix_fetch
>> (2 * input_index
)) & 3;
438 /* The hardware returns an unsigned value; convert it to a
441 LLVMValueRef tmp
= out
[3];
442 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
444 /* First, recover the sign-extended signed integer value. */
445 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
446 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
448 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
450 /* For the integer-like cases, do a natural sign extension.
452 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
453 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
456 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
457 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
458 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
459 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
461 /* Convert back to the right type. */
462 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
464 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
465 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
466 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
467 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
468 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
469 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
476 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
479 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
482 return bld_base
->uint_bld
.zero
;
485 case PIPE_SHADER_VERTEX
:
486 return LLVMGetParam(ctx
->main_fn
,
487 ctx
->param_vs_prim_id
);
488 case PIPE_SHADER_TESS_CTRL
:
489 return LLVMGetParam(ctx
->main_fn
,
491 case PIPE_SHADER_TESS_EVAL
:
492 return LLVMGetParam(ctx
->main_fn
,
493 ctx
->param_tes_patch_id
);
494 case PIPE_SHADER_GEOMETRY
:
495 return LLVMGetParam(ctx
->main_fn
,
496 SI_PARAM_PRIMITIVE_ID
);
499 return bld_base
->uint_bld
.zero
;
504 * Return the value of tgsi_ind_register for indexing.
505 * This is the indirect index with the constant offset added to it.
507 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
508 const struct tgsi_ind_register
*ind
,
511 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
514 result
= ctx
->soa
.addr
[ind
->Index
][ind
->Swizzle
];
515 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
516 result
= LLVMBuildAdd(gallivm
->builder
, result
,
517 lp_build_const_int32(gallivm
, rel_index
), "");
522 * Like get_indirect_index, but restricts the return value to a (possibly
523 * undefined) value inside [0..num).
525 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
526 const struct tgsi_ind_register
*ind
,
527 int rel_index
, unsigned num
)
529 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
531 /* LLVM 3.8: If indirect resource indexing is used:
535 if (HAVE_LLVM
<= 0x0308)
536 return LLVMGetUndef(ctx
->i32
);
538 return si_llvm_bound_index(ctx
, result
, num
);
543 * Calculate a dword address given an input or output register and a stride.
545 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
546 const struct tgsi_full_dst_register
*dst
,
547 const struct tgsi_full_src_register
*src
,
548 LLVMValueRef vertex_dw_stride
,
549 LLVMValueRef base_addr
)
551 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
552 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
553 ubyte
*name
, *index
, *array_first
;
555 struct tgsi_full_dst_register reg
;
557 /* Set the register description. The address computation is the same
558 * for sources and destinations. */
560 reg
.Register
.File
= src
->Register
.File
;
561 reg
.Register
.Index
= src
->Register
.Index
;
562 reg
.Register
.Indirect
= src
->Register
.Indirect
;
563 reg
.Register
.Dimension
= src
->Register
.Dimension
;
564 reg
.Indirect
= src
->Indirect
;
565 reg
.Dimension
= src
->Dimension
;
566 reg
.DimIndirect
= src
->DimIndirect
;
570 /* If the register is 2-dimensional (e.g. an array of vertices
571 * in a primitive), calculate the base address of the vertex. */
572 if (reg
.Register
.Dimension
) {
575 if (reg
.Dimension
.Indirect
)
576 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
577 reg
.Dimension
.Index
);
579 index
= lp_build_const_int32(gallivm
, reg
.Dimension
.Index
);
581 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
582 LLVMBuildMul(gallivm
->builder
, index
,
583 vertex_dw_stride
, ""), "");
586 /* Get information about the register. */
587 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
588 name
= info
->input_semantic_name
;
589 index
= info
->input_semantic_index
;
590 array_first
= info
->input_array_first
;
591 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
592 name
= info
->output_semantic_name
;
593 index
= info
->output_semantic_index
;
594 array_first
= info
->output_array_first
;
600 if (reg
.Register
.Indirect
) {
601 /* Add the relative address of the element. */
602 LLVMValueRef ind_index
;
604 if (reg
.Indirect
.ArrayID
)
605 first
= array_first
[reg
.Indirect
.ArrayID
];
607 first
= reg
.Register
.Index
;
609 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
610 reg
.Register
.Index
- first
);
612 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
613 LLVMBuildMul(gallivm
->builder
, ind_index
,
614 lp_build_const_int32(gallivm
, 4), ""), "");
616 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
618 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
619 index
[reg
.Register
.Index
]);
622 /* Add the base address of the element. */
623 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
624 lp_build_const_int32(gallivm
, param
* 4), "");
627 /* The offchip buffer layout for TCS->TES is
629 * - attribute 0 of patch 0 vertex 0
630 * - attribute 0 of patch 0 vertex 1
631 * - attribute 0 of patch 0 vertex 2
633 * - attribute 0 of patch 1 vertex 0
634 * - attribute 0 of patch 1 vertex 1
636 * - attribute 1 of patch 0 vertex 0
637 * - attribute 1 of patch 0 vertex 1
639 * - per patch attribute 0 of patch 0
640 * - per patch attribute 0 of patch 1
643 * Note that every attribute has 4 components.
645 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
646 LLVMValueRef vertex_index
,
647 LLVMValueRef param_index
)
649 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
650 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
651 LLVMValueRef param_stride
, constant16
;
653 vertices_per_patch
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 6);
654 num_patches
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 0, 9);
655 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
658 constant16
= lp_build_const_int32(gallivm
, 16);
660 base_addr
= LLVMBuildMul(gallivm
->builder
, get_rel_patch_id(ctx
),
661 vertices_per_patch
, "");
663 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
666 param_stride
= total_vertices
;
668 base_addr
= get_rel_patch_id(ctx
);
669 param_stride
= num_patches
;
672 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
673 LLVMBuildMul(gallivm
->builder
, param_index
,
674 param_stride
, ""), "");
676 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
679 LLVMValueRef patch_data_offset
=
680 unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 16, 16);
682 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
683 patch_data_offset
, "");
688 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
689 struct si_shader_context
*ctx
,
690 const struct tgsi_full_dst_register
*dst
,
691 const struct tgsi_full_src_register
*src
)
693 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
694 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
695 ubyte
*name
, *index
, *array_first
;
696 struct tgsi_full_src_register reg
;
697 LLVMValueRef vertex_index
= NULL
;
698 LLVMValueRef param_index
= NULL
;
699 unsigned param_index_base
, param_base
;
701 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
703 if (reg
.Register
.Dimension
) {
705 if (reg
.Dimension
.Indirect
)
706 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
707 reg
.Dimension
.Index
);
709 vertex_index
= lp_build_const_int32(gallivm
,
710 reg
.Dimension
.Index
);
713 /* Get information about the register. */
714 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
715 name
= info
->input_semantic_name
;
716 index
= info
->input_semantic_index
;
717 array_first
= info
->input_array_first
;
718 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
719 name
= info
->output_semantic_name
;
720 index
= info
->output_semantic_index
;
721 array_first
= info
->output_array_first
;
727 if (reg
.Register
.Indirect
) {
728 if (reg
.Indirect
.ArrayID
)
729 param_base
= array_first
[reg
.Indirect
.ArrayID
];
731 param_base
= reg
.Register
.Index
;
733 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
734 reg
.Register
.Index
- param_base
);
737 param_base
= reg
.Register
.Index
;
738 param_index
= lp_build_const_int32(gallivm
, 0);
741 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
744 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
745 lp_build_const_int32(gallivm
, param_index_base
),
748 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
751 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
752 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
753 * or v4i32 (num_channels=3,4). */
754 static void build_tbuffer_store(struct si_shader_context
*ctx
,
757 unsigned num_channels
,
759 LLVMValueRef soffset
,
760 unsigned inst_offset
,
769 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
770 LLVMValueRef args
[] = {
773 LLVMConstInt(ctx
->i32
, num_channels
, 0),
776 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
777 LLVMConstInt(ctx
->i32
, dfmt
, 0),
778 LLVMConstInt(ctx
->i32
, nfmt
, 0),
779 LLVMConstInt(ctx
->i32
, offen
, 0),
780 LLVMConstInt(ctx
->i32
, idxen
, 0),
781 LLVMConstInt(ctx
->i32
, glc
, 0),
782 LLVMConstInt(ctx
->i32
, slc
, 0),
783 LLVMConstInt(ctx
->i32
, tfe
, 0)
786 /* The instruction offset field has 12 bits */
787 assert(offen
|| inst_offset
< (1 << 12));
789 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
790 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
791 const char *types
[] = {"i32", "v2i32", "v4i32"};
793 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
795 lp_build_intrinsic(gallivm
->builder
, name
, ctx
->voidt
,
796 args
, ARRAY_SIZE(args
), 0);
799 static void build_tbuffer_store_dwords(struct si_shader_context
*ctx
,
802 unsigned num_channels
,
804 LLVMValueRef soffset
,
805 unsigned inst_offset
)
807 static unsigned dfmt
[] = {
808 V_008F0C_BUF_DATA_FORMAT_32
,
809 V_008F0C_BUF_DATA_FORMAT_32_32
,
810 V_008F0C_BUF_DATA_FORMAT_32_32_32
,
811 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
813 assert(num_channels
>= 1 && num_channels
<= 4);
815 build_tbuffer_store(ctx
, rsrc
, vdata
, num_channels
, vaddr
, soffset
,
816 inst_offset
, dfmt
[num_channels
-1],
817 V_008F0C_BUF_NUM_FORMAT_UINT
, 1, 0, 1, 1, 0);
820 static LLVMValueRef
build_buffer_load(struct si_shader_context
*ctx
,
824 LLVMValueRef voffset
,
825 LLVMValueRef soffset
,
826 unsigned inst_offset
,
830 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
831 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
833 if (HAVE_LLVM
>= 0x309) {
834 LLVMValueRef args
[] = {
835 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v4i32
, ""),
836 vindex
? vindex
: LLVMConstInt(ctx
->i32
, 0, 0),
837 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
838 LLVMConstInt(ctx
->i1
, glc
, 0),
839 LLVMConstInt(ctx
->i1
, slc
, 0)
842 LLVMTypeRef types
[] = {ctx
->f32
, LLVMVectorType(ctx
->f32
, 2),
844 const char *type_names
[] = {"f32", "v2f32", "v4f32"};
848 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], voffset
,
853 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], soffset
,
857 snprintf(name
, sizeof(name
), "llvm.amdgcn.buffer.load.%s",
860 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
861 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
863 LLVMValueRef args
[] = {
864 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v16i8
, ""),
865 voffset
? voffset
: vindex
,
867 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
868 LLVMConstInt(ctx
->i32
, voffset
? 1 : 0, 0), // offen
869 LLVMConstInt(ctx
->i32
, vindex
? 1 : 0, 0), //idxen
870 LLVMConstInt(ctx
->i32
, glc
, 0),
871 LLVMConstInt(ctx
->i32
, slc
, 0),
872 LLVMConstInt(ctx
->i32
, 0, 0), // TFE
875 LLVMTypeRef types
[] = {ctx
->i32
, LLVMVectorType(ctx
->i32
, 2),
877 const char *type_names
[] = {"i32", "v2i32", "v4i32"};
878 const char *arg_type
= "i32";
881 if (voffset
&& vindex
) {
882 LLVMValueRef vaddr
[] = {vindex
, voffset
};
885 args
[1] = lp_build_gather_values(gallivm
, vaddr
, 2);
888 snprintf(name
, sizeof(name
), "llvm.SI.buffer.load.dword.%s.%s",
889 type_names
[func
], arg_type
);
891 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
892 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
896 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
897 enum tgsi_opcode_type type
, unsigned swizzle
,
898 LLVMValueRef buffer
, LLVMValueRef offset
,
901 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
902 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
903 LLVMValueRef value
, value2
;
904 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
905 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
908 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
911 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
914 if (!tgsi_type_is_64bit(type
)) {
915 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
918 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
919 return LLVMBuildExtractElement(gallivm
->builder
, value
,
920 lp_build_const_int32(gallivm
, swizzle
), "");
923 value
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
926 value2
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
927 swizzle
* 4 + 4, 1, 0);
929 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
935 * \param type output value type
936 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
937 * \param dw_addr address in dwords
939 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
940 enum tgsi_opcode_type type
, unsigned swizzle
,
941 LLVMValueRef dw_addr
)
943 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
944 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
948 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
950 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
951 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
953 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
957 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
958 lp_build_const_int32(gallivm
, swizzle
));
960 value
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
961 if (tgsi_type_is_64bit(type
)) {
963 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
964 lp_build_const_int32(gallivm
, 1));
965 value2
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
966 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
969 return LLVMBuildBitCast(gallivm
->builder
, value
,
970 tgsi2llvmtype(bld_base
, type
), "");
976 * \param swizzle offset (typically 0..3)
977 * \param dw_addr address in dwords
978 * \param value value to store
980 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
981 unsigned swizzle
, LLVMValueRef dw_addr
,
984 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
985 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
987 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
988 lp_build_const_int32(gallivm
, swizzle
));
990 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
991 build_indexed_store(ctx
, ctx
->lds
,
995 static LLVMValueRef
fetch_input_tcs(
996 struct lp_build_tgsi_context
*bld_base
,
997 const struct tgsi_full_src_register
*reg
,
998 enum tgsi_opcode_type type
, unsigned swizzle
)
1000 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1001 LLVMValueRef dw_addr
, stride
;
1003 stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
1004 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1005 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1007 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1010 static LLVMValueRef
fetch_output_tcs(
1011 struct lp_build_tgsi_context
*bld_base
,
1012 const struct tgsi_full_src_register
*reg
,
1013 enum tgsi_opcode_type type
, unsigned swizzle
)
1015 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1016 LLVMValueRef dw_addr
, stride
;
1018 if (reg
->Register
.Dimension
) {
1019 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1020 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1021 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1023 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1024 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1027 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1030 static LLVMValueRef
fetch_input_tes(
1031 struct lp_build_tgsi_context
*bld_base
,
1032 const struct tgsi_full_src_register
*reg
,
1033 enum tgsi_opcode_type type
, unsigned swizzle
)
1035 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1036 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1037 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1039 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1040 SI_PARAM_RW_BUFFERS
);
1041 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1042 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1044 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1045 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1047 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
);
1050 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1051 const struct tgsi_full_instruction
*inst
,
1052 const struct tgsi_opcode_info
*info
,
1053 LLVMValueRef dst
[4])
1055 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1056 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1057 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
1058 unsigned chan_index
;
1059 LLVMValueRef dw_addr
, stride
;
1060 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
1061 LLVMValueRef values
[4];
1063 /* Only handle per-patch and per-vertex outputs here.
1064 * Vectors will be lowered to scalars and this function will be called again.
1066 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1067 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1068 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
1072 if (reg
->Register
.Dimension
) {
1073 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1074 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1075 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1077 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1078 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1081 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1082 SI_PARAM_RW_BUFFERS
);
1083 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1084 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1086 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1087 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1090 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1091 LLVMValueRef value
= dst
[chan_index
];
1093 if (inst
->Instruction
.Saturate
)
1094 value
= si_llvm_saturate(bld_base
, value
);
1096 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1098 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1099 values
[chan_index
] = value
;
1101 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF) {
1102 build_tbuffer_store_dwords(ctx
, buffer
, value
, 1,
1108 if (inst
->Dst
[0].Register
.WriteMask
== 0xF) {
1109 LLVMValueRef value
= lp_build_gather_values(bld_base
->base
.gallivm
,
1111 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buf_addr
,
1116 static LLVMValueRef
fetch_input_gs(
1117 struct lp_build_tgsi_context
*bld_base
,
1118 const struct tgsi_full_src_register
*reg
,
1119 enum tgsi_opcode_type type
,
1122 struct lp_build_context
*base
= &bld_base
->base
;
1123 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1124 struct si_shader
*shader
= ctx
->shader
;
1125 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
1126 struct gallivm_state
*gallivm
= base
->gallivm
;
1127 LLVMValueRef vtx_offset
;
1128 LLVMValueRef args
[9];
1129 unsigned vtx_offset_param
;
1130 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1131 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1132 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1136 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1137 return get_primitive_id(bld_base
, swizzle
);
1139 if (!reg
->Register
.Dimension
)
1142 if (swizzle
== ~0) {
1143 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1145 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1146 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1148 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
1152 /* Get the vertex offset parameter */
1153 vtx_offset_param
= reg
->Dimension
.Index
;
1154 if (vtx_offset_param
< 2) {
1155 vtx_offset_param
+= SI_PARAM_VTX0_OFFSET
;
1157 assert(vtx_offset_param
< 6);
1158 vtx_offset_param
+= SI_PARAM_VTX2_OFFSET
- 2;
1160 vtx_offset
= lp_build_mul_imm(uint
,
1161 LLVMGetParam(ctx
->main_fn
,
1165 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1166 args
[0] = ctx
->esgs_ring
;
1167 args
[1] = vtx_offset
;
1168 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
) * 256);
1169 args
[3] = uint
->zero
;
1170 args
[4] = uint
->one
; /* OFFEN */
1171 args
[5] = uint
->zero
; /* IDXEN */
1172 args
[6] = uint
->one
; /* GLC */
1173 args
[7] = uint
->zero
; /* SLC */
1174 args
[8] = uint
->zero
; /* TFE */
1176 value
= lp_build_intrinsic(gallivm
->builder
,
1177 "llvm.SI.buffer.load.dword.i32.i32",
1179 LP_FUNC_ATTR_READONLY
);
1180 if (tgsi_type_is_64bit(type
)) {
1181 LLVMValueRef value2
;
1182 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
+ 1) * 256);
1183 value2
= lp_build_intrinsic(gallivm
->builder
,
1184 "llvm.SI.buffer.load.dword.i32.i32",
1186 LP_FUNC_ATTR_READONLY
);
1187 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1190 return LLVMBuildBitCast(gallivm
->builder
,
1192 tgsi2llvmtype(bld_base
, type
), "");
1195 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1197 switch (interpolate
) {
1198 case TGSI_INTERPOLATE_CONSTANT
:
1201 case TGSI_INTERPOLATE_LINEAR
:
1202 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1203 return SI_PARAM_LINEAR_SAMPLE
;
1204 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1205 return SI_PARAM_LINEAR_CENTROID
;
1207 return SI_PARAM_LINEAR_CENTER
;
1209 case TGSI_INTERPOLATE_COLOR
:
1210 case TGSI_INTERPOLATE_PERSPECTIVE
:
1211 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1212 return SI_PARAM_PERSP_SAMPLE
;
1213 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1214 return SI_PARAM_PERSP_CENTROID
;
1216 return SI_PARAM_PERSP_CENTER
;
1219 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1224 static LLVMValueRef
build_fs_interp(
1225 struct lp_build_tgsi_context
*bld_base
,
1226 LLVMValueRef llvm_chan
,
1227 LLVMValueRef attr_number
,
1228 LLVMValueRef params
,
1232 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1233 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1234 LLVMValueRef args
[5];
1236 if (HAVE_LLVM
< 0x0400) {
1238 ij
[0] = LLVMBuildBitCast(gallivm
->builder
, i
, ctx
->i32
, "");
1239 ij
[1] = LLVMBuildBitCast(gallivm
->builder
, j
, ctx
->i32
, "");
1241 args
[0] = llvm_chan
;
1242 args
[1] = attr_number
;
1244 args
[3] = lp_build_gather_values(gallivm
, ij
, 2);
1245 return lp_build_intrinsic(gallivm
->builder
, "llvm.SI.fs.interp",
1247 LP_FUNC_ATTR_READNONE
);
1251 args
[1] = llvm_chan
;
1252 args
[2] = attr_number
;
1255 p1
= lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p1",
1256 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1260 args
[2] = llvm_chan
;
1261 args
[3] = attr_number
;
1264 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p2",
1265 ctx
->f32
, args
, 5, LP_FUNC_ATTR_READNONE
);
1268 static LLVMValueRef
build_fs_interp_mov(
1269 struct lp_build_tgsi_context
*bld_base
,
1270 LLVMValueRef parameter
,
1271 LLVMValueRef llvm_chan
,
1272 LLVMValueRef attr_number
,
1273 LLVMValueRef params
) {
1275 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1276 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1277 LLVMValueRef args
[4];
1278 if (HAVE_LLVM
< 0x0400) {
1279 args
[0] = llvm_chan
;
1280 args
[1] = attr_number
;
1283 return lp_build_intrinsic(gallivm
->builder
,
1284 "llvm.SI.fs.constant",
1286 LP_FUNC_ATTR_READNONE
);
1289 args
[0] = parameter
;
1290 args
[1] = llvm_chan
;
1291 args
[2] = attr_number
;
1294 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.mov",
1295 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1299 * Interpolate a fragment shader input.
1301 * @param ctx context
1302 * @param input_index index of the input in hardware
1303 * @param semantic_name TGSI_SEMANTIC_*
1304 * @param semantic_index semantic index
1305 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1306 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1307 * @param interp_param interpolation weights (i,j)
1308 * @param prim_mask SI_PARAM_PRIM_MASK
1309 * @param face SI_PARAM_FRONT_FACE
1310 * @param result the return value (4 components)
1312 static void interp_fs_input(struct si_shader_context
*ctx
,
1313 unsigned input_index
,
1314 unsigned semantic_name
,
1315 unsigned semantic_index
,
1316 unsigned num_interp_inputs
,
1317 unsigned colors_read_mask
,
1318 LLVMValueRef interp_param
,
1319 LLVMValueRef prim_mask
,
1321 LLVMValueRef result
[4])
1323 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
1324 struct lp_build_context
*base
= &bld_base
->base
;
1325 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
1326 struct gallivm_state
*gallivm
= base
->gallivm
;
1327 LLVMValueRef attr_number
;
1332 /* fs.constant returns the param from the middle vertex, so it's not
1333 * really useful for flat shading. It's meant to be used for custom
1334 * interpolation (but the intrinsic can't fetch from the other two
1337 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1338 * to do the right thing. The only reason we use fs.constant is that
1339 * fs.interp cannot be used on integers, because they can be equal
1342 * When interp is false we will use fs.constant or for newer llvm,
1343 * amdgcn.interp.mov.
1345 bool interp
= interp_param
!= NULL
;
1347 attr_number
= lp_build_const_int32(gallivm
, input_index
);
1350 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1351 LLVMVectorType(ctx
->f32
, 2), "");
1353 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1355 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1359 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1360 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1361 LLVMValueRef is_face_positive
;
1362 LLVMValueRef back_attr_number
;
1364 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1365 * otherwise it's at offset "num_inputs".
1367 unsigned back_attr_offset
= num_interp_inputs
;
1368 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1369 back_attr_offset
+= 1;
1371 back_attr_number
= lp_build_const_int32(gallivm
, back_attr_offset
);
1373 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1374 face
, uint
->zero
, "");
1376 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1377 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1378 LLVMValueRef front
, back
;
1381 front
= build_fs_interp(bld_base
, llvm_chan
,
1382 attr_number
, prim_mask
,
1384 back
= build_fs_interp(bld_base
, llvm_chan
,
1385 back_attr_number
, prim_mask
,
1388 front
= build_fs_interp_mov(bld_base
,
1389 lp_build_const_int32(gallivm
, 2), /* P0 */
1390 llvm_chan
, attr_number
, prim_mask
);
1391 back
= build_fs_interp_mov(bld_base
,
1392 lp_build_const_int32(gallivm
, 2), /* P0 */
1393 llvm_chan
, back_attr_number
, prim_mask
);
1396 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1402 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1404 result
[0] = build_fs_interp(bld_base
, uint
->zero
,
1405 attr_number
, prim_mask
, i
, j
);
1407 result
[0] = build_fs_interp_mov(bld_base
, uint
->zero
,
1408 lp_build_const_int32(gallivm
, 2), /* P0 */
1409 attr_number
, prim_mask
);
1412 result
[2] = lp_build_const_float(gallivm
, 0.0f
);
1413 result
[3] = lp_build_const_float(gallivm
, 1.0f
);
1415 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1416 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1419 result
[chan
] = build_fs_interp(bld_base
,
1420 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1422 result
[chan
] = build_fs_interp_mov(bld_base
,
1423 lp_build_const_int32(gallivm
, 2), /* P0 */
1424 llvm_chan
, attr_number
, prim_mask
);
1430 static void declare_input_fs(
1431 struct si_shader_context
*radeon_bld
,
1432 unsigned input_index
,
1433 const struct tgsi_full_declaration
*decl
,
1434 LLVMValueRef out
[4])
1436 struct lp_build_context
*base
= &radeon_bld
->soa
.bld_base
.base
;
1437 struct si_shader_context
*ctx
=
1438 si_shader_context(&radeon_bld
->soa
.bld_base
);
1439 struct si_shader
*shader
= ctx
->shader
;
1440 LLVMValueRef main_fn
= radeon_bld
->main_fn
;
1441 LLVMValueRef interp_param
= NULL
;
1442 int interp_param_idx
;
1444 /* Get colors from input VGPRs (set by the prolog). */
1445 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1446 unsigned i
= decl
->Semantic
.Index
;
1447 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1448 unsigned mask
= colors_read
>> (i
* 4);
1449 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1450 (i
? util_bitcount(colors_read
& 0xf) : 0);
1452 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1453 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1454 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1455 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1459 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1460 decl
->Interp
.Location
);
1461 if (interp_param_idx
== -1)
1463 else if (interp_param_idx
) {
1464 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1467 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1468 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1469 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1470 interp_param
= NULL
; /* load the constant color */
1472 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1473 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1474 shader
->selector
->info
.colors_read
, interp_param
,
1475 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1476 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1480 static LLVMValueRef
get_sample_id(struct si_shader_context
*radeon_bld
)
1482 return unpack_param(si_shader_context(&radeon_bld
->soa
.bld_base
),
1483 SI_PARAM_ANCILLARY
, 8, 4);
1487 * Set range metadata on an instruction. This can only be used on load and
1488 * call instructions. If you know an instruction can only produce the values
1489 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1490 * \p lo is the minimum value inclusive.
1491 * \p hi is the maximum value exclusive.
1493 static void set_range_metadata(struct si_shader_context
*ctx
,
1494 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1496 LLVMValueRef range_md
, md_args
[2];
1497 LLVMTypeRef type
= LLVMTypeOf(value
);
1498 LLVMContextRef context
= LLVMGetTypeContext(type
);
1500 md_args
[0] = LLVMConstInt(type
, lo
, false);
1501 md_args
[1] = LLVMConstInt(type
, hi
, false);
1502 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1503 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1506 static LLVMValueRef
get_thread_id(struct si_shader_context
*ctx
)
1508 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1511 if (HAVE_LLVM
< 0x0308) {
1512 tid
= lp_build_intrinsic(gallivm
->builder
, "llvm.SI.tid",
1513 ctx
->i32
, NULL
, 0, LP_FUNC_ATTR_READNONE
);
1515 LLVMValueRef tid_args
[2];
1516 tid_args
[0] = lp_build_const_int32(gallivm
, 0xffffffff);
1517 tid_args
[1] = lp_build_const_int32(gallivm
, 0);
1518 tid_args
[1] = lp_build_intrinsic(gallivm
->builder
,
1519 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1520 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1522 tid
= lp_build_intrinsic(gallivm
->builder
,
1523 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1524 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1526 set_range_metadata(ctx
, tid
, 0, 64);
1531 * Load a dword from a constant buffer.
1533 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1534 LLVMValueRef resource
,
1535 LLVMValueRef offset
)
1537 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1538 LLVMValueRef args
[2] = {resource
, offset
};
1540 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1541 LP_FUNC_ATTR_READNONE
);
1544 static LLVMValueRef
load_sample_position(struct si_shader_context
*radeon_bld
, LLVMValueRef sample_id
)
1546 struct si_shader_context
*ctx
=
1547 si_shader_context(&radeon_bld
->soa
.bld_base
);
1548 struct lp_build_context
*uint_bld
= &radeon_bld
->soa
.bld_base
.uint_bld
;
1549 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1550 LLVMBuilderRef builder
= gallivm
->builder
;
1551 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1552 LLVMValueRef buf_index
= lp_build_const_int32(gallivm
, SI_PS_CONST_SAMPLE_POSITIONS
);
1553 LLVMValueRef resource
= build_indexed_load_const(ctx
, desc
, buf_index
);
1555 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1556 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1557 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, lp_build_const_int32(gallivm
, 4), "");
1559 LLVMValueRef pos
[4] = {
1560 buffer_load_const(ctx
, resource
, offset0
),
1561 buffer_load_const(ctx
, resource
, offset1
),
1562 lp_build_const_float(gallivm
, 0),
1563 lp_build_const_float(gallivm
, 0)
1566 return lp_build_gather_values(gallivm
, pos
, 4);
1569 static void declare_system_value(
1570 struct si_shader_context
*radeon_bld
,
1572 const struct tgsi_full_declaration
*decl
)
1574 struct si_shader_context
*ctx
=
1575 si_shader_context(&radeon_bld
->soa
.bld_base
);
1576 struct lp_build_context
*bld
= &radeon_bld
->soa
.bld_base
.base
;
1577 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1578 LLVMValueRef value
= 0;
1580 switch (decl
->Semantic
.Name
) {
1581 case TGSI_SEMANTIC_INSTANCEID
:
1582 value
= LLVMGetParam(radeon_bld
->main_fn
,
1583 ctx
->param_instance_id
);
1586 case TGSI_SEMANTIC_VERTEXID
:
1587 value
= LLVMBuildAdd(gallivm
->builder
,
1588 LLVMGetParam(radeon_bld
->main_fn
,
1589 ctx
->param_vertex_id
),
1590 LLVMGetParam(radeon_bld
->main_fn
,
1591 SI_PARAM_BASE_VERTEX
), "");
1594 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1595 value
= LLVMGetParam(radeon_bld
->main_fn
,
1596 ctx
->param_vertex_id
);
1599 case TGSI_SEMANTIC_BASEVERTEX
:
1600 value
= LLVMGetParam(radeon_bld
->main_fn
,
1601 SI_PARAM_BASE_VERTEX
);
1604 case TGSI_SEMANTIC_BASEINSTANCE
:
1605 value
= LLVMGetParam(radeon_bld
->main_fn
,
1606 SI_PARAM_START_INSTANCE
);
1609 case TGSI_SEMANTIC_DRAWID
:
1610 value
= LLVMGetParam(radeon_bld
->main_fn
,
1614 case TGSI_SEMANTIC_INVOCATIONID
:
1615 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1616 value
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
1617 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1618 value
= LLVMGetParam(radeon_bld
->main_fn
,
1619 SI_PARAM_GS_INSTANCE_ID
);
1621 assert(!"INVOCATIONID not implemented");
1624 case TGSI_SEMANTIC_POSITION
:
1626 LLVMValueRef pos
[4] = {
1627 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1628 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1629 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1630 lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
, TGSI_OPCODE_RCP
,
1631 LLVMGetParam(radeon_bld
->main_fn
,
1632 SI_PARAM_POS_W_FLOAT
)),
1634 value
= lp_build_gather_values(gallivm
, pos
, 4);
1638 case TGSI_SEMANTIC_FACE
:
1639 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_FRONT_FACE
);
1642 case TGSI_SEMANTIC_SAMPLEID
:
1643 value
= get_sample_id(radeon_bld
);
1646 case TGSI_SEMANTIC_SAMPLEPOS
: {
1647 LLVMValueRef pos
[4] = {
1648 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1649 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1650 lp_build_const_float(gallivm
, 0),
1651 lp_build_const_float(gallivm
, 0)
1653 pos
[0] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1654 TGSI_OPCODE_FRC
, pos
[0]);
1655 pos
[1] = lp_build_emit_llvm_unary(&radeon_bld
->soa
.bld_base
,
1656 TGSI_OPCODE_FRC
, pos
[1]);
1657 value
= lp_build_gather_values(gallivm
, pos
, 4);
1661 case TGSI_SEMANTIC_SAMPLEMASK
:
1662 /* This can only occur with the OpenGL Core profile, which
1663 * doesn't support smoothing.
1665 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1668 case TGSI_SEMANTIC_TESSCOORD
:
1670 LLVMValueRef coord
[4] = {
1671 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_u
),
1672 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_v
),
1677 /* For triangles, the vector should be (u, v, 1-u-v). */
1678 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1679 PIPE_PRIM_TRIANGLES
)
1680 coord
[2] = lp_build_sub(bld
, bld
->one
,
1681 lp_build_add(bld
, coord
[0], coord
[1]));
1683 value
= lp_build_gather_values(gallivm
, coord
, 4);
1687 case TGSI_SEMANTIC_VERTICESIN
:
1688 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1689 value
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 26, 6);
1690 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1691 value
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 7);
1693 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1696 case TGSI_SEMANTIC_TESSINNER
:
1697 case TGSI_SEMANTIC_TESSOUTER
:
1699 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1700 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1702 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1703 SI_PARAM_RW_BUFFERS
);
1704 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1705 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1707 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1708 addr
= get_tcs_tes_buffer_address(ctx
, NULL
,
1709 lp_build_const_int32(gallivm
, param
));
1711 value
= buffer_load(&radeon_bld
->soa
.bld_base
, TGSI_TYPE_FLOAT
,
1712 ~0, buffer
, base
, addr
);
1717 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1718 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1720 LLVMValueRef buf
, slot
, val
[4];
1723 slot
= lp_build_const_int32(gallivm
, SI_HS_CONST_DEFAULT_TESS_LEVELS
);
1724 buf
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1725 buf
= build_indexed_load_const(ctx
, buf
, slot
);
1726 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1728 for (i
= 0; i
< 4; i
++)
1729 val
[i
] = buffer_load_const(ctx
, buf
,
1730 lp_build_const_int32(gallivm
, (offset
+ i
) * 4));
1731 value
= lp_build_gather_values(gallivm
, val
, 4);
1735 case TGSI_SEMANTIC_PRIMID
:
1736 value
= get_primitive_id(&radeon_bld
->soa
.bld_base
, 0);
1739 case TGSI_SEMANTIC_GRID_SIZE
:
1740 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_GRID_SIZE
);
1743 case TGSI_SEMANTIC_BLOCK_SIZE
:
1745 LLVMValueRef values
[3];
1747 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1749 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1750 unsigned sizes
[3] = {
1751 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1752 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1753 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1756 for (i
= 0; i
< 3; ++i
)
1757 values
[i
] = lp_build_const_int32(gallivm
, sizes
[i
]);
1759 value
= lp_build_gather_values(gallivm
, values
, 3);
1761 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1766 case TGSI_SEMANTIC_BLOCK_ID
:
1767 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_ID
);
1770 case TGSI_SEMANTIC_THREAD_ID
:
1771 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_THREAD_ID
);
1774 #if HAVE_LLVM >= 0x0309
1775 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1776 value
= lp_build_intrinsic(gallivm
->builder
,
1777 "llvm.amdgcn.ps.live",
1779 LP_FUNC_ATTR_READNONE
);
1780 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1781 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1786 assert(!"unknown system value");
1790 radeon_bld
->system_values
[index
] = value
;
1793 static void declare_compute_memory(struct si_shader_context
*radeon_bld
,
1794 const struct tgsi_full_declaration
*decl
)
1796 struct si_shader_context
*ctx
=
1797 si_shader_context(&radeon_bld
->soa
.bld_base
);
1798 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1799 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1801 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1804 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1805 assert(decl
->Range
.First
== decl
->Range
.Last
);
1806 assert(!ctx
->shared_memory
);
1808 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1809 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1812 LLVMSetAlignment(var
, 4);
1814 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1817 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1819 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1820 SI_PARAM_CONST_BUFFERS
);
1822 return build_indexed_load_const(ctx
, list_ptr
,
1823 LLVMConstInt(ctx
->i32
, i
, 0));
1826 static LLVMValueRef
fetch_constant(
1827 struct lp_build_tgsi_context
*bld_base
,
1828 const struct tgsi_full_src_register
*reg
,
1829 enum tgsi_opcode_type type
,
1832 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1833 struct lp_build_context
*base
= &bld_base
->base
;
1834 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1837 LLVMValueRef addr
, bufp
;
1838 LLVMValueRef result
;
1840 if (swizzle
== LP_CHAN_ALL
) {
1842 LLVMValueRef values
[4];
1843 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1844 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1846 return lp_build_gather_values(bld_base
->base
.gallivm
, values
, 4);
1849 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1850 idx
= reg
->Register
.Index
* 4 + swizzle
;
1852 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1853 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_CONST_BUFFERS
);
1855 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1856 reg
->Dimension
.Index
,
1857 SI_NUM_CONST_BUFFERS
);
1858 bufp
= build_indexed_load_const(ctx
, ptr
, index
);
1860 bufp
= load_const_buffer_desc(ctx
, buf
);
1862 if (reg
->Register
.Indirect
) {
1863 addr
= ctx
->soa
.addr
[ireg
->Index
][ireg
->Swizzle
];
1864 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1865 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1866 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1867 lp_build_const_int32(base
->gallivm
, idx
* 4));
1869 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1872 result
= buffer_load_const(ctx
, bufp
, addr
);
1874 if (!tgsi_type_is_64bit(type
))
1875 result
= bitcast(bld_base
, type
, result
);
1877 LLVMValueRef addr2
, result2
;
1879 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1880 LLVMConstInt(ctx
->i32
, 4, 0));
1881 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1883 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1889 /* Upper 16 bits must be zero. */
1890 static LLVMValueRef
si_llvm_pack_two_int16(struct gallivm_state
*gallivm
,
1891 LLVMValueRef val
[2])
1893 return LLVMBuildOr(gallivm
->builder
, val
[0],
1894 LLVMBuildShl(gallivm
->builder
, val
[1],
1895 lp_build_const_int32(gallivm
, 16),
1899 /* Upper 16 bits are ignored and will be dropped. */
1900 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct gallivm_state
*gallivm
,
1901 LLVMValueRef val
[2])
1903 LLVMValueRef v
[2] = {
1904 LLVMBuildAnd(gallivm
->builder
, val
[0],
1905 lp_build_const_int32(gallivm
, 0xffff), ""),
1908 return si_llvm_pack_two_int16(gallivm
, v
);
1911 /* Initialize arguments for the shader export intrinsic */
1912 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1913 LLVMValueRef
*values
,
1917 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1918 struct lp_build_context
*uint
=
1919 &ctx
->soa
.bld_base
.uint_bld
;
1920 struct lp_build_context
*base
= &bld_base
->base
;
1921 struct gallivm_state
*gallivm
= base
->gallivm
;
1922 LLVMBuilderRef builder
= base
->gallivm
->builder
;
1923 LLVMValueRef val
[4];
1924 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1928 /* Default is 0xf. Adjusted below depending on the format. */
1929 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
1931 /* Specify whether the EXEC mask represents the valid mask */
1932 args
[1] = uint
->zero
;
1934 /* Specify whether this is the last export */
1935 args
[2] = uint
->zero
;
1937 /* Specify the target we are exporting */
1938 args
[3] = lp_build_const_int32(base
->gallivm
, target
);
1940 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1941 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1942 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1943 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1945 assert(cbuf
>= 0 && cbuf
< 8);
1946 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1947 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1950 args
[4] = uint
->zero
; /* COMPR flag */
1951 args
[5] = base
->undef
;
1952 args
[6] = base
->undef
;
1953 args
[7] = base
->undef
;
1954 args
[8] = base
->undef
;
1956 switch (spi_shader_col_format
) {
1957 case V_028714_SPI_SHADER_ZERO
:
1958 args
[0] = uint
->zero
; /* writemask */
1959 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
1962 case V_028714_SPI_SHADER_32_R
:
1963 args
[0] = uint
->one
; /* writemask */
1964 args
[5] = values
[0];
1967 case V_028714_SPI_SHADER_32_GR
:
1968 args
[0] = lp_build_const_int32(base
->gallivm
, 0x3); /* writemask */
1969 args
[5] = values
[0];
1970 args
[6] = values
[1];
1973 case V_028714_SPI_SHADER_32_AR
:
1974 args
[0] = lp_build_const_int32(base
->gallivm
, 0x9); /* writemask */
1975 args
[5] = values
[0];
1976 args
[8] = values
[3];
1979 case V_028714_SPI_SHADER_FP16_ABGR
:
1980 args
[4] = uint
->one
; /* COMPR flag */
1982 for (chan
= 0; chan
< 2; chan
++) {
1983 LLVMValueRef pack_args
[2] = {
1985 values
[2 * chan
+ 1]
1987 LLVMValueRef packed
;
1989 packed
= lp_build_intrinsic(base
->gallivm
->builder
,
1991 ctx
->i32
, pack_args
, 2,
1992 LP_FUNC_ATTR_READNONE
);
1994 LLVMBuildBitCast(base
->gallivm
->builder
,
1995 packed
, ctx
->f32
, "");
1999 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2000 for (chan
= 0; chan
< 4; chan
++) {
2001 val
[chan
] = si_llvm_saturate(bld_base
, values
[chan
]);
2002 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2003 lp_build_const_float(gallivm
, 65535), "");
2004 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2005 lp_build_const_float(gallivm
, 0.5), "");
2006 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2010 args
[4] = uint
->one
; /* COMPR flag */
2011 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2012 si_llvm_pack_two_int16(gallivm
, val
));
2013 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2014 si_llvm_pack_two_int16(gallivm
, val
+2));
2017 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2018 for (chan
= 0; chan
< 4; chan
++) {
2019 /* Clamp between [-1, 1]. */
2020 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
2022 lp_build_const_float(gallivm
, 1));
2023 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
2025 lp_build_const_float(gallivm
, -1));
2026 /* Convert to a signed integer in [-32767, 32767]. */
2027 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2028 lp_build_const_float(gallivm
, 32767), "");
2029 /* If positive, add 0.5, else add -0.5. */
2030 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2031 LLVMBuildSelect(builder
,
2032 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2033 val
[chan
], base
->zero
, ""),
2034 lp_build_const_float(gallivm
, 0.5),
2035 lp_build_const_float(gallivm
, -0.5), ""), "");
2036 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2039 args
[4] = uint
->one
; /* COMPR flag */
2040 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2041 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2042 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2043 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2046 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2047 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2050 for (chan
= 0; chan
< 4; chan
++) {
2051 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2052 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
2056 args
[4] = uint
->one
; /* COMPR flag */
2057 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2058 si_llvm_pack_two_int16(gallivm
, val
));
2059 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2060 si_llvm_pack_two_int16(gallivm
, val
+2));
2064 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2065 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2067 LLVMValueRef min
= lp_build_const_int32(gallivm
, is_int8
?
2070 for (chan
= 0; chan
< 4; chan
++) {
2071 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2072 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2075 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2080 args
[4] = uint
->one
; /* COMPR flag */
2081 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2082 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2083 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2084 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2088 case V_028714_SPI_SHADER_32_ABGR
:
2089 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
2094 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2097 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2098 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2100 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2101 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2102 SI_PARAM_ALPHA_REF
);
2104 LLVMValueRef alpha_pass
=
2105 lp_build_cmp(&bld_base
->base
,
2106 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2109 lp_build_select(&bld_base
->base
,
2111 lp_build_const_float(gallivm
, 1.0f
),
2112 lp_build_const_float(gallivm
, -1.0f
));
2114 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
2115 ctx
->voidt
, &arg
, 1, 0);
2117 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kilp",
2118 ctx
->voidt
, NULL
, 0, 0);
2122 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2124 unsigned samplemask_param
)
2126 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2127 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2128 LLVMValueRef coverage
;
2130 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2131 coverage
= LLVMGetParam(ctx
->main_fn
,
2133 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
2135 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
2137 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2139 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2142 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2143 lp_build_const_float(gallivm
,
2144 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2146 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2149 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2150 LLVMValueRef (*pos
)[9], LLVMValueRef
*out_elts
)
2152 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2153 struct lp_build_context
*base
= &bld_base
->base
;
2154 struct lp_build_context
*uint
= &ctx
->soa
.bld_base
.uint_bld
;
2157 unsigned const_chan
;
2158 LLVMValueRef base_elt
;
2159 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2160 LLVMValueRef constbuf_index
= lp_build_const_int32(base
->gallivm
,
2161 SI_VS_CONST_CLIP_PLANES
);
2162 LLVMValueRef const_resource
= build_indexed_load_const(ctx
, ptr
, constbuf_index
);
2164 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2165 LLVMValueRef
*args
= pos
[2 + reg_index
];
2170 args
[8] = lp_build_const_float(base
->gallivm
, 0.0f
);
2172 /* Compute dot products of position and user clip plane vectors */
2173 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2174 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2175 args
[1] = lp_build_const_int32(base
->gallivm
,
2176 ((reg_index
* 4 + chan
) * 4 +
2178 base_elt
= buffer_load_const(ctx
, const_resource
,
2181 lp_build_add(base
, args
[5 + chan
],
2182 lp_build_mul(base
, base_elt
,
2183 out_elts
[const_chan
]));
2187 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf);
2188 args
[1] = uint
->zero
;
2189 args
[2] = uint
->zero
;
2190 args
[3] = lp_build_const_int32(base
->gallivm
,
2191 V_008DFC_SQ_EXP_POS
+ 2 + reg_index
);
2192 args
[4] = uint
->zero
;
2196 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2200 if (so
->num_outputs
)
2201 fprintf(stderr
, "STREAMOUT\n");
2203 for (i
= 0; i
< so
->num_outputs
; i
++) {
2204 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2205 so
->output
[i
].start_component
;
2206 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2207 i
, so
->output
[i
].output_buffer
,
2208 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2209 so
->output
[i
].register_index
,
2210 mask
& 1 ? "x" : "",
2211 mask
& 2 ? "y" : "",
2212 mask
& 4 ? "z" : "",
2213 mask
& 8 ? "w" : "");
2217 /* On SI, the vertex shader is responsible for writing streamout data
2219 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2220 struct si_shader_output_values
*outputs
,
2223 struct pipe_stream_output_info
*so
= &ctx
->shader
->selector
->so
;
2224 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2225 LLVMBuilderRef builder
= gallivm
->builder
;
2227 struct lp_build_if_state if_ctx
;
2228 LLVMValueRef so_buffers
[4];
2229 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2230 SI_PARAM_RW_BUFFERS
);
2232 /* Load the descriptors. */
2233 for (i
= 0; i
< 4; ++i
) {
2234 if (ctx
->shader
->selector
->so
.stride
[i
]) {
2235 LLVMValueRef offset
= lp_build_const_int32(gallivm
,
2236 SI_VS_STREAMOUT_BUF0
+ i
);
2238 so_buffers
[i
] = build_indexed_load_const(ctx
, buf_ptr
, offset
);
2242 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2243 LLVMValueRef so_vtx_count
=
2244 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2246 LLVMValueRef tid
= get_thread_id(ctx
);
2248 /* can_emit = tid < so_vtx_count; */
2249 LLVMValueRef can_emit
=
2250 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2252 LLVMValueRef stream_id
=
2253 unpack_param(ctx
, ctx
->param_streamout_config
, 24, 2);
2255 /* Emit the streamout code conditionally. This actually avoids
2256 * out-of-bounds buffer access. The hw tells us via the SGPR
2257 * (so_vtx_count) which threads are allowed to emit streamout data. */
2258 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2260 /* The buffer offset is computed as follows:
2261 * ByteOffset = streamout_offset[buffer_id]*4 +
2262 * (streamout_write_index + thread_id)*stride[buffer_id] +
2266 LLVMValueRef so_write_index
=
2267 LLVMGetParam(ctx
->main_fn
,
2268 ctx
->param_streamout_write_index
);
2270 /* Compute (streamout_write_index + thread_id). */
2271 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2273 /* Compute the write offset for each enabled buffer. */
2274 LLVMValueRef so_write_offset
[4] = {};
2275 for (i
= 0; i
< 4; i
++) {
2279 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2280 ctx
->param_streamout_offset
[i
]);
2281 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2283 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2284 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2285 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2288 /* Write streamout data. */
2289 for (i
= 0; i
< so
->num_outputs
; i
++) {
2290 unsigned buf_idx
= so
->output
[i
].output_buffer
;
2291 unsigned reg
= so
->output
[i
].register_index
;
2292 unsigned start
= so
->output
[i
].start_component
;
2293 unsigned num_comps
= so
->output
[i
].num_components
;
2294 unsigned stream
= so
->output
[i
].stream
;
2295 LLVMValueRef out
[4];
2296 struct lp_build_if_state if_ctx_stream
;
2298 assert(num_comps
&& num_comps
<= 4);
2299 if (!num_comps
|| num_comps
> 4)
2305 /* Load the output as int. */
2306 for (j
= 0; j
< num_comps
; j
++) {
2307 out
[j
] = LLVMBuildBitCast(builder
,
2308 outputs
[reg
].values
[start
+j
],
2312 /* Pack the output. */
2313 LLVMValueRef vdata
= NULL
;
2315 switch (num_comps
) {
2316 case 1: /* as i32 */
2319 case 2: /* as v2i32 */
2320 case 3: /* as v4i32 (aligned to 4) */
2321 case 4: /* as v4i32 */
2322 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2323 for (j
= 0; j
< num_comps
; j
++) {
2324 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2325 LLVMConstInt(ctx
->i32
, j
, 0), "");
2330 LLVMValueRef can_emit_stream
=
2331 LLVMBuildICmp(builder
, LLVMIntEQ
,
2333 lp_build_const_int32(gallivm
, stream
), "");
2335 lp_build_if(&if_ctx_stream
, gallivm
, can_emit_stream
);
2336 build_tbuffer_store_dwords(ctx
, so_buffers
[buf_idx
],
2338 so_write_offset
[buf_idx
],
2339 LLVMConstInt(ctx
->i32
, 0, 0),
2340 so
->output
[i
].dst_offset
*4);
2341 lp_build_endif(&if_ctx_stream
);
2344 lp_build_endif(&if_ctx
);
2348 /* Generate export instructions for hardware VS shader stage */
2349 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2350 struct si_shader_output_values
*outputs
,
2353 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2354 struct si_shader
*shader
= ctx
->shader
;
2355 struct lp_build_context
*base
= &bld_base
->base
;
2356 struct lp_build_context
*uint
=
2357 &ctx
->soa
.bld_base
.uint_bld
;
2358 LLVMValueRef args
[9];
2359 LLVMValueRef pos_args
[4][9] = { { 0 } };
2360 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2361 unsigned semantic_name
, semantic_index
;
2363 unsigned param_count
= 0;
2367 for (i
= 0; i
< noutput
; i
++) {
2368 semantic_name
= outputs
[i
].semantic_name
;
2369 semantic_index
= outputs
[i
].semantic_index
;
2370 bool export_param
= true;
2372 switch (semantic_name
) {
2373 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2374 case TGSI_SEMANTIC_PSIZE
:
2375 case TGSI_SEMANTIC_CLIPVERTEX
:
2376 case TGSI_SEMANTIC_EDGEFLAG
:
2378 case TGSI_SEMANTIC_GENERIC
:
2379 case TGSI_SEMANTIC_CLIPDIST
:
2380 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2381 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2382 export_param
= false;
2385 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2386 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2387 export_param
= false;
2392 /* Select the correct target */
2393 switch(semantic_name
) {
2394 case TGSI_SEMANTIC_PSIZE
:
2395 psize_value
= outputs
[i
].values
[0];
2397 case TGSI_SEMANTIC_EDGEFLAG
:
2398 edgeflag_value
= outputs
[i
].values
[0];
2400 case TGSI_SEMANTIC_LAYER
:
2401 layer_value
= outputs
[i
].values
[0];
2402 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2403 goto handle_semantic
;
2404 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2405 viewport_index_value
= outputs
[i
].values
[0];
2406 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2407 goto handle_semantic
;
2408 case TGSI_SEMANTIC_POSITION
:
2409 target
= V_008DFC_SQ_EXP_POS
;
2411 case TGSI_SEMANTIC_COLOR
:
2412 case TGSI_SEMANTIC_BCOLOR
:
2415 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2416 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2417 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2420 case TGSI_SEMANTIC_CLIPDIST
:
2421 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2422 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2423 goto handle_semantic
;
2425 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2427 case TGSI_SEMANTIC_CLIPVERTEX
:
2428 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2430 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2432 case TGSI_SEMANTIC_PRIMID
:
2433 case TGSI_SEMANTIC_FOG
:
2434 case TGSI_SEMANTIC_TEXCOORD
:
2435 case TGSI_SEMANTIC_GENERIC
:
2438 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2439 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2440 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2446 "Warning: SI unhandled vs output type:%d\n",
2450 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, args
);
2452 if (target
>= V_008DFC_SQ_EXP_POS
&&
2453 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2454 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2455 args
, sizeof(args
));
2457 lp_build_intrinsic(base
->gallivm
->builder
,
2458 "llvm.SI.export", ctx
->voidt
,
2462 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2463 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2464 goto handle_semantic
;
2468 shader
->info
.nr_param_exports
= param_count
;
2470 /* We need to add the position output manually if it's missing. */
2471 if (!pos_args
[0][0]) {
2472 pos_args
[0][0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
2473 pos_args
[0][1] = uint
->zero
; /* EXEC mask */
2474 pos_args
[0][2] = uint
->zero
; /* last export? */
2475 pos_args
[0][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
);
2476 pos_args
[0][4] = uint
->zero
; /* COMPR flag */
2477 pos_args
[0][5] = base
->zero
; /* X */
2478 pos_args
[0][6] = base
->zero
; /* Y */
2479 pos_args
[0][7] = base
->zero
; /* Z */
2480 pos_args
[0][8] = base
->one
; /* W */
2483 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2484 if (shader
->selector
->info
.writes_psize
||
2485 shader
->selector
->info
.writes_edgeflag
||
2486 shader
->selector
->info
.writes_viewport_index
||
2487 shader
->selector
->info
.writes_layer
) {
2488 pos_args
[1][0] = lp_build_const_int32(base
->gallivm
, /* writemask */
2489 shader
->selector
->info
.writes_psize
|
2490 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2491 (shader
->selector
->info
.writes_layer
<< 2) |
2492 (shader
->selector
->info
.writes_viewport_index
<< 3));
2493 pos_args
[1][1] = uint
->zero
; /* EXEC mask */
2494 pos_args
[1][2] = uint
->zero
; /* last export? */
2495 pos_args
[1][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ 1);
2496 pos_args
[1][4] = uint
->zero
; /* COMPR flag */
2497 pos_args
[1][5] = base
->zero
; /* X */
2498 pos_args
[1][6] = base
->zero
; /* Y */
2499 pos_args
[1][7] = base
->zero
; /* Z */
2500 pos_args
[1][8] = base
->zero
; /* W */
2502 if (shader
->selector
->info
.writes_psize
)
2503 pos_args
[1][5] = psize_value
;
2505 if (shader
->selector
->info
.writes_edgeflag
) {
2506 /* The output is a float, but the hw expects an integer
2507 * with the first bit containing the edge flag. */
2508 edgeflag_value
= LLVMBuildFPToUI(base
->gallivm
->builder
,
2511 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2513 bld_base
->int_bld
.one
);
2515 /* The LLVM intrinsic expects a float. */
2516 pos_args
[1][6] = LLVMBuildBitCast(base
->gallivm
->builder
,
2521 if (shader
->selector
->info
.writes_layer
)
2522 pos_args
[1][7] = layer_value
;
2524 if (shader
->selector
->info
.writes_viewport_index
)
2525 pos_args
[1][8] = viewport_index_value
;
2528 for (i
= 0; i
< 4; i
++)
2530 shader
->info
.nr_pos_exports
++;
2533 for (i
= 0; i
< 4; i
++) {
2534 if (!pos_args
[i
][0])
2537 /* Specify the target we are exporting */
2538 pos_args
[i
][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ pos_idx
++);
2540 if (pos_idx
== shader
->info
.nr_pos_exports
)
2541 /* Specify that this is the last export */
2542 pos_args
[i
][2] = uint
->one
;
2544 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
2545 ctx
->voidt
, pos_args
[i
], 9, 0);
2550 * Forward all outputs from the vertex shader to the TES. This is only used
2551 * for the fixed function TCS.
2553 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2555 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2556 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2557 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2558 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2561 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2563 rw_buffers
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2564 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2565 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
2567 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2569 lds_vertex_stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
2570 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2571 lds_vertex_stride
, "");
2572 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2573 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2575 inputs
= ctx
->shader
->key
.mono
.tcs
.inputs_to_copy
;
2577 unsigned i
= u_bit_scan64(&inputs
);
2579 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2580 lp_build_const_int32(gallivm
, 4 * i
),
2583 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2585 lp_build_const_int32(gallivm
, i
));
2587 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2590 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buffer_addr
,
2595 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2596 LLVMValueRef rel_patch_id
,
2597 LLVMValueRef invocation_id
,
2598 LLVMValueRef tcs_out_current_patch_data_offset
)
2600 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2601 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2602 struct si_shader
*shader
= ctx
->shader
;
2603 unsigned tess_inner_index
, tess_outer_index
;
2604 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2605 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
;
2606 unsigned stride
, outer_comps
, inner_comps
, i
;
2607 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2609 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2611 /* Do this only for invocation 0, because the tess levels are per-patch,
2614 * This can't jump, because invocation 0 executes this. It should
2615 * at least mask out the loads and stores for other invocations.
2617 lp_build_if(&if_ctx
, gallivm
,
2618 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2619 invocation_id
, bld_base
->uint_bld
.zero
, ""));
2621 /* Determine the layout of one tess factor element in the buffer. */
2622 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2623 case PIPE_PRIM_LINES
:
2624 stride
= 2; /* 2 dwords, 1 vec2 store */
2628 case PIPE_PRIM_TRIANGLES
:
2629 stride
= 4; /* 4 dwords, 1 vec4 store */
2633 case PIPE_PRIM_QUADS
:
2634 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2643 /* Load tess_inner and tess_outer from LDS.
2644 * Any invocation can write them, so we can't get them from a temporary.
2646 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2647 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2649 lds_base
= tcs_out_current_patch_data_offset
;
2650 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2651 lp_build_const_int32(gallivm
,
2652 tess_inner_index
* 4), "");
2653 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2654 lp_build_const_int32(gallivm
,
2655 tess_outer_index
* 4), "");
2657 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2658 /* For isolines, the hardware expects tess factors in the
2659 * reverse order from what GLSL / TGSI specify.
2661 out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2662 out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2664 for (i
= 0; i
< outer_comps
; i
++)
2665 out
[i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2666 for (i
= 0; i
< inner_comps
; i
++)
2667 out
[outer_comps
+i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2670 /* Convert the outputs to vectors for stores. */
2671 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2675 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2677 /* Get the buffer. */
2678 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2679 SI_PARAM_RW_BUFFERS
);
2680 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2681 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_FACTOR
));
2683 /* Get the offset. */
2684 tf_base
= LLVMGetParam(ctx
->main_fn
,
2685 SI_PARAM_TESS_FACTOR_OFFSET
);
2686 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2687 lp_build_const_int32(gallivm
, 4 * stride
), "");
2689 lp_build_if(&inner_if_ctx
, gallivm
,
2690 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2691 rel_patch_id
, bld_base
->uint_bld
.zero
, ""));
2693 /* Store the dynamic HS control word. */
2694 build_tbuffer_store_dwords(ctx
, buffer
,
2695 lp_build_const_int32(gallivm
, 0x80000000),
2696 1, lp_build_const_int32(gallivm
, 0), tf_base
, 0);
2698 lp_build_endif(&inner_if_ctx
);
2700 /* Store the tessellation factors. */
2701 build_tbuffer_store_dwords(ctx
, buffer
, vec0
,
2702 MIN2(stride
, 4), byteoffset
, tf_base
, 4);
2704 build_tbuffer_store_dwords(ctx
, buffer
, vec1
,
2705 stride
- 4, byteoffset
, tf_base
, 20);
2706 lp_build_endif(&if_ctx
);
2709 /* This only writes the tessellation factor levels. */
2710 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2712 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2713 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2715 si_copy_tcs_inputs(bld_base
);
2717 rel_patch_id
= get_rel_patch_id(ctx
);
2718 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2719 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2721 /* Return epilog parameters from this function. */
2722 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
2723 LLVMValueRef ret
= ctx
->return_value
;
2724 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2727 /* RW_BUFFERS pointer */
2728 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2729 SI_PARAM_RW_BUFFERS
);
2730 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2731 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2732 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2733 bld_base
->uint_bld
.zero
, "");
2734 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2735 bld_base
->uint_bld
.one
, "");
2736 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2737 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2739 /* Tess factor buffer soffset is after user SGPRs. */
2740 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2741 SI_PARAM_TESS_FACTOR_OFFSET
);
2742 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2743 SI_TCS_NUM_USER_SGPR
+ 1, "");
2746 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2747 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2748 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2750 vgpr
= SI_TCS_NUM_USER_SGPR
+ 2;
2751 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2752 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2753 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2754 ctx
->return_value
= ret
;
2757 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2759 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2760 struct si_shader
*shader
= ctx
->shader
;
2761 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2762 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2764 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2765 ctx
->param_rel_auto_id
);
2766 LLVMValueRef vertex_dw_stride
=
2767 unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 13, 8);
2768 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2769 vertex_dw_stride
, "");
2771 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2772 * its inputs from it. */
2773 for (i
= 0; i
< info
->num_outputs
; i
++) {
2774 LLVMValueRef
*out_ptr
= ctx
->soa
.outputs
[i
];
2775 unsigned name
= info
->output_semantic_name
[i
];
2776 unsigned index
= info
->output_semantic_index
[i
];
2777 int param
= si_shader_io_get_unique_index(name
, index
);
2778 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2779 lp_build_const_int32(gallivm
, param
* 4), "");
2781 for (chan
= 0; chan
< 4; chan
++) {
2782 lds_store(bld_base
, chan
, dw_addr
,
2783 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2788 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2790 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2791 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2792 struct si_shader
*es
= ctx
->shader
;
2793 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2794 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2795 ctx
->param_es2gs_offset
);
2799 for (i
= 0; i
< info
->num_outputs
; i
++) {
2800 LLVMValueRef
*out_ptr
=
2801 ctx
->soa
.outputs
[i
];
2804 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2805 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2808 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2809 info
->output_semantic_index
[i
]);
2811 for (chan
= 0; chan
< 4; chan
++) {
2812 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2813 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2815 build_tbuffer_store(ctx
,
2818 LLVMGetUndef(ctx
->i32
), soffset
,
2819 (4 * param_index
+ chan
) * 4,
2820 V_008F0C_BUF_DATA_FORMAT_32
,
2821 V_008F0C_BUF_NUM_FORMAT_UINT
,
2827 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2829 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2830 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2831 LLVMValueRef args
[2];
2833 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
);
2834 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
2835 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
2836 ctx
->voidt
, args
, 2, 0);
2839 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2841 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2842 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2843 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2844 struct si_shader_output_values
*outputs
= NULL
;
2847 assert(!ctx
->shader
->is_gs_copy_shader
);
2849 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2851 /* Vertex color clamping.
2853 * This uses a state constant loaded in a user data SGPR and
2854 * an IF statement is added that clamps all colors if the constant
2857 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2858 struct lp_build_if_state if_ctx
;
2859 LLVMValueRef cond
= NULL
;
2860 LLVMValueRef addr
, val
;
2862 for (i
= 0; i
< info
->num_outputs
; i
++) {
2863 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2864 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2867 /* We've found a color. */
2869 /* The state is in the first bit of the user SGPR. */
2870 cond
= LLVMGetParam(ctx
->main_fn
,
2871 SI_PARAM_VS_STATE_BITS
);
2872 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2874 lp_build_if(&if_ctx
, gallivm
, cond
);
2877 for (j
= 0; j
< 4; j
++) {
2878 addr
= ctx
->soa
.outputs
[i
][j
];
2879 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2880 val
= si_llvm_saturate(bld_base
, val
);
2881 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2886 lp_build_endif(&if_ctx
);
2889 for (i
= 0; i
< info
->num_outputs
; i
++) {
2890 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
2891 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
2893 for (j
= 0; j
< 4; j
++) {
2894 outputs
[i
].values
[j
] =
2895 LLVMBuildLoad(gallivm
->builder
,
2896 ctx
->soa
.outputs
[i
][j
],
2898 outputs
[i
].vertex_stream
[j
] =
2899 (info
->output_streams
[i
] >> (2 * j
)) & 3;
2904 /* Return the primitive ID from the LLVM function. */
2906 LLVMBuildInsertValue(gallivm
->builder
,
2908 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2909 get_primitive_id(bld_base
, 0)),
2910 VS_EPILOG_PRIMID_LOC
, "");
2912 if (ctx
->shader
->selector
->so
.num_outputs
)
2913 si_llvm_emit_streamout(ctx
, outputs
, i
);
2914 si_llvm_export_vs(bld_base
, outputs
, i
);
2918 struct si_ps_exports
{
2920 LLVMValueRef args
[10][9];
2923 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2924 bool writes_samplemask
)
2927 /* Z needs 32 bits. */
2928 if (writes_samplemask
)
2929 return V_028710_SPI_SHADER_32_ABGR
;
2930 else if (writes_stencil
)
2931 return V_028710_SPI_SHADER_32_GR
;
2933 return V_028710_SPI_SHADER_32_R
;
2934 } else if (writes_stencil
|| writes_samplemask
) {
2935 /* Both stencil and sample mask need only 16 bits. */
2936 return V_028710_SPI_SHADER_UINT16_ABGR
;
2938 return V_028710_SPI_SHADER_ZERO
;
2942 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
2943 LLVMValueRef depth
, LLVMValueRef stencil
,
2944 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
2946 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2947 struct lp_build_context
*base
= &bld_base
->base
;
2948 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
2949 LLVMValueRef args
[9];
2951 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
2953 samplemask
!= NULL
);
2955 assert(depth
|| stencil
|| samplemask
);
2957 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
2958 args
[2] = uint
->one
; /* DONE bit */
2960 /* Specify the target we are exporting */
2961 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_MRTZ
);
2963 args
[4] = uint
->zero
; /* COMP flag */
2964 args
[5] = base
->undef
; /* R, depth */
2965 args
[6] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
2966 args
[7] = base
->undef
; /* B, sample mask */
2967 args
[8] = base
->undef
; /* A, alpha to mask */
2969 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
2971 args
[4] = uint
->one
; /* COMPR flag */
2974 /* Stencil should be in X[23:16]. */
2975 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
2976 stencil
= LLVMBuildShl(base
->gallivm
->builder
, stencil
,
2977 LLVMConstInt(ctx
->i32
, 16, 0), "");
2978 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
2982 /* SampleMask should be in Y[15:0]. */
2983 args
[6] = samplemask
;
2996 args
[7] = samplemask
;
3001 /* SI (except OLAND and HAINAN) has a bug that it only looks
3002 * at the X writemask component. */
3003 if (ctx
->screen
->b
.chip_class
== SI
&&
3004 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
3005 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
3008 /* Specify which components to enable */
3009 args
[0] = lp_build_const_int32(base
->gallivm
, mask
);
3011 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3014 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3015 LLVMValueRef
*color
, unsigned index
,
3016 unsigned samplemask_param
,
3017 bool is_last
, struct si_ps_exports
*exp
)
3019 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3020 struct lp_build_context
*base
= &bld_base
->base
;
3024 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3025 for (i
= 0; i
< 4; i
++)
3026 color
[i
] = si_llvm_saturate(bld_base
, color
[i
]);
3029 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3030 color
[3] = base
->one
;
3034 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3035 si_alpha_test(bld_base
, color
[3]);
3037 /* Line & polygon smoothing */
3038 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3039 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3042 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3043 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3044 LLVMValueRef args
[8][9];
3047 /* Get the export arguments, also find out what the last one is. */
3048 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3049 si_llvm_init_export_args(bld_base
, color
,
3050 V_008DFC_SQ_EXP_MRT
+ c
, args
[c
]);
3051 if (args
[c
][0] != bld_base
->uint_bld
.zero
)
3055 /* Emit all exports. */
3056 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3057 if (is_last
&& last
== c
) {
3058 args
[c
][1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3059 args
[c
][2] = bld_base
->uint_bld
.one
; /* DONE bit */
3060 } else if (args
[c
][0] == bld_base
->uint_bld
.zero
)
3061 continue; /* unnecessary NULL export */
3063 memcpy(exp
->args
[exp
->num
++], args
[c
], sizeof(args
[c
]));
3066 LLVMValueRef args
[9];
3069 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3072 args
[1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3073 args
[2] = bld_base
->uint_bld
.one
; /* DONE bit */
3074 } else if (args
[0] == bld_base
->uint_bld
.zero
)
3075 return; /* unnecessary NULL export */
3077 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3081 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3082 struct si_ps_exports
*exp
)
3084 for (unsigned i
= 0; i
< exp
->num
; i
++)
3085 lp_build_intrinsic(ctx
->gallivm
.builder
,
3086 "llvm.SI.export", ctx
->voidt
,
3087 exp
->args
[i
], 9, 0);
3090 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3092 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3093 struct lp_build_context
*base
= &bld_base
->base
;
3094 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3095 LLVMValueRef args
[9];
3097 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
3098 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
3099 args
[2] = uint
->one
; /* DONE bit */
3100 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
3101 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
3102 args
[5] = base
->undef
; /* R */
3103 args
[6] = base
->undef
; /* G */
3104 args
[7] = base
->undef
; /* B */
3105 args
[8] = base
->undef
; /* A */
3107 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
3108 ctx
->voidt
, args
, 9, 0);
3112 * Return PS outputs in this order:
3114 * v[0:3] = color0.xyzw
3115 * v[4:7] = color1.xyzw
3120 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3122 * The alpha-ref SGPR is returned via its original location.
3124 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3126 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3127 struct si_shader
*shader
= ctx
->shader
;
3128 struct lp_build_context
*base
= &bld_base
->base
;
3129 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3130 LLVMBuilderRef builder
= base
->gallivm
->builder
;
3131 unsigned i
, j
, first_vgpr
, vgpr
;
3133 LLVMValueRef color
[8][4] = {};
3134 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3137 /* Read the output values. */
3138 for (i
= 0; i
< info
->num_outputs
; i
++) {
3139 unsigned semantic_name
= info
->output_semantic_name
[i
];
3140 unsigned semantic_index
= info
->output_semantic_index
[i
];
3142 switch (semantic_name
) {
3143 case TGSI_SEMANTIC_COLOR
:
3144 assert(semantic_index
< 8);
3145 for (j
= 0; j
< 4; j
++) {
3146 LLVMValueRef ptr
= ctx
->soa
.outputs
[i
][j
];
3147 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3148 color
[semantic_index
][j
] = result
;
3151 case TGSI_SEMANTIC_POSITION
:
3152 depth
= LLVMBuildLoad(builder
,
3153 ctx
->soa
.outputs
[i
][2], "");
3155 case TGSI_SEMANTIC_STENCIL
:
3156 stencil
= LLVMBuildLoad(builder
,
3157 ctx
->soa
.outputs
[i
][1], "");
3159 case TGSI_SEMANTIC_SAMPLEMASK
:
3160 samplemask
= LLVMBuildLoad(builder
,
3161 ctx
->soa
.outputs
[i
][0], "");
3164 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3169 /* Fill the return structure. */
3170 ret
= ctx
->return_value
;
3173 ret
= LLVMBuildInsertValue(builder
, ret
,
3174 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3175 LLVMGetParam(ctx
->main_fn
,
3176 SI_PARAM_ALPHA_REF
)),
3177 SI_SGPR_ALPHA_REF
, "");
3180 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3181 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3185 for (j
= 0; j
< 4; j
++)
3186 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3189 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3191 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3193 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3195 /* Add the input sample mask for smoothing at the end. */
3196 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3197 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3198 ret
= LLVMBuildInsertValue(builder
, ret
,
3199 LLVMGetParam(ctx
->main_fn
,
3200 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3202 ctx
->return_value
= ret
;
3206 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3207 * buffer in number of elements and return it as an i32.
3209 static LLVMValueRef
get_buffer_size(
3210 struct lp_build_tgsi_context
*bld_base
,
3211 LLVMValueRef descriptor
)
3213 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3214 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3215 LLVMBuilderRef builder
= gallivm
->builder
;
3217 LLVMBuildExtractElement(builder
, descriptor
,
3218 lp_build_const_int32(gallivm
, 2), "");
3220 if (ctx
->screen
->b
.chip_class
>= VI
) {
3221 /* On VI, the descriptor contains the size in bytes,
3222 * but TXQ must return the size in elements.
3223 * The stride is always non-zero for resources using TXQ.
3225 LLVMValueRef stride
=
3226 LLVMBuildExtractElement(builder
, descriptor
,
3227 lp_build_const_int32(gallivm
, 1), "");
3228 stride
= LLVMBuildLShr(builder
, stride
,
3229 lp_build_const_int32(gallivm
, 16), "");
3230 stride
= LLVMBuildAnd(builder
, stride
,
3231 lp_build_const_int32(gallivm
, 0x3FFF), "");
3233 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3240 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
3243 static void build_type_name_for_intr(
3245 char *buf
, unsigned bufsize
)
3247 LLVMTypeRef elem_type
= type
;
3249 assert(bufsize
>= 8);
3251 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
3252 int ret
= snprintf(buf
, bufsize
, "v%u",
3253 LLVMGetVectorSize(type
));
3255 char *type_name
= LLVMPrintTypeToString(type
);
3256 fprintf(stderr
, "Error building type name for: %s\n",
3260 elem_type
= LLVMGetElementType(type
);
3264 switch (LLVMGetTypeKind(elem_type
)) {
3266 case LLVMIntegerTypeKind
:
3267 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
3269 case LLVMFloatTypeKind
:
3270 snprintf(buf
, bufsize
, "f32");
3272 case LLVMDoubleTypeKind
:
3273 snprintf(buf
, bufsize
, "f64");
3278 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3279 struct lp_build_tgsi_context
*bld_base
,
3280 struct lp_build_emit_data
*emit_data
);
3282 /* Prevent optimizations (at least of memory accesses) across the current
3283 * point in the program by emitting empty inline assembly that is marked as
3284 * having side effects.
3286 #if 0 /* unused currently */
3287 static void emit_optimization_barrier(struct si_shader_context
*ctx
)
3289 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3290 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3291 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, "", "", true, false);
3292 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3296 /* Combine these with & instead of |. */
3297 #define NOOP_WAITCNT 0xf7f
3298 #define LGKM_CNT 0x07f
3299 #define VM_CNT 0xf70
3301 static void emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3303 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3304 LLVMBuilderRef builder
= gallivm
->builder
;
3305 LLVMValueRef args
[1] = {
3306 lp_build_const_int32(gallivm
, simm16
)
3308 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3309 ctx
->voidt
, args
, 1, 0);
3312 static void membar_emit(
3313 const struct lp_build_tgsi_action
*action
,
3314 struct lp_build_tgsi_context
*bld_base
,
3315 struct lp_build_emit_data
*emit_data
)
3317 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3318 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3319 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3320 unsigned waitcnt
= NOOP_WAITCNT
;
3322 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3323 waitcnt
&= VM_CNT
& LGKM_CNT
;
3325 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3326 TGSI_MEMBAR_SHADER_BUFFER
|
3327 TGSI_MEMBAR_SHADER_IMAGE
))
3330 if (flags
& TGSI_MEMBAR_SHARED
)
3331 waitcnt
&= LGKM_CNT
;
3333 if (waitcnt
!= NOOP_WAITCNT
)
3334 emit_waitcnt(ctx
, waitcnt
);
3338 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3339 const struct tgsi_full_src_register
*reg
)
3342 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3343 SI_PARAM_SHADER_BUFFERS
);
3345 if (!reg
->Register
.Indirect
)
3346 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3348 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3349 reg
->Register
.Index
,
3350 SI_NUM_SHADER_BUFFERS
);
3352 return build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3355 static bool tgsi_is_array_sampler(unsigned target
)
3357 return target
== TGSI_TEXTURE_1D_ARRAY
||
3358 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3359 target
== TGSI_TEXTURE_2D_ARRAY
||
3360 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3361 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3362 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3363 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3366 static bool tgsi_is_array_image(unsigned target
)
3368 return target
== TGSI_TEXTURE_3D
||
3369 target
== TGSI_TEXTURE_CUBE
||
3370 target
== TGSI_TEXTURE_1D_ARRAY
||
3371 target
== TGSI_TEXTURE_2D_ARRAY
||
3372 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3373 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3377 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3379 * At least on Tonga, executing image stores on images with DCC enabled and
3380 * non-trivial can eventually lead to lockups. This can occur when an
3381 * application binds an image as read-only but then uses a shader that writes
3382 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3383 * program termination) in this case, but it doesn't cost much to be a bit
3384 * nicer: disabling DCC in the shader still leads to undefined results but
3385 * avoids the lockup.
3387 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3390 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3393 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3394 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3395 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3398 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3399 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3400 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3404 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
3406 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3411 * Load the resource descriptor for \p image.
3415 struct lp_build_tgsi_context
*bld_base
,
3416 const struct tgsi_full_src_register
*image
,
3417 bool is_store
, unsigned target
,
3420 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3421 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3423 LLVMValueRef index
, tmp
;
3424 bool dcc_off
= target
!= TGSI_TEXTURE_BUFFER
&& is_store
;
3426 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3428 if (!image
->Register
.Indirect
) {
3429 const struct tgsi_shader_info
*info
= bld_base
->info
;
3431 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3433 if (info
->images_writemask
& (1 << image
->Register
.Index
) &&
3434 target
!= TGSI_TEXTURE_BUFFER
)
3437 /* From the GL_ARB_shader_image_load_store extension spec:
3439 * If a shader performs an image load, store, or atomic
3440 * operation using an image variable declared as an array,
3441 * and if the index used to select an individual element is
3442 * negative or greater than or equal to the size of the
3443 * array, the results of the operation are undefined but may
3444 * not lead to termination.
3446 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3447 image
->Register
.Index
,
3451 if (target
== TGSI_TEXTURE_BUFFER
) {
3452 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3454 rsrc_ptr
= LLVMBuildPointerCast(builder
, rsrc_ptr
,
3455 const_array(ctx
->v4i32
, 0), "");
3456 index
= LLVMBuildMul(builder
, index
,
3457 LLVMConstInt(ctx
->i32
, 2, 0), "");
3458 index
= LLVMBuildAdd(builder
, index
,
3459 LLVMConstInt(ctx
->i32
, 1, 0), "");
3460 *rsrc
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3464 tmp
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3466 tmp
= force_dcc_off(ctx
, tmp
);
3470 static LLVMValueRef
image_fetch_coords(
3471 struct lp_build_tgsi_context
*bld_base
,
3472 const struct tgsi_full_instruction
*inst
,
3475 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3476 LLVMBuilderRef builder
= gallivm
->builder
;
3477 unsigned target
= inst
->Memory
.Texture
;
3478 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3479 LLVMValueRef coords
[4];
3483 for (chan
= 0; chan
< num_coords
; ++chan
) {
3484 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3485 tmp
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3489 if (num_coords
== 1)
3492 if (num_coords
== 3) {
3493 /* LLVM has difficulties lowering 3-element vectors. */
3494 coords
[3] = bld_base
->uint_bld
.undef
;
3498 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3502 * Append the extra mode bits that are used by image load and store.
3504 static void image_append_args(
3505 struct si_shader_context
*ctx
,
3506 struct lp_build_emit_data
* emit_data
,
3511 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3512 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3513 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3514 LLVMValueRef r128
= i1false
;
3515 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3518 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3520 LLVMValueRef slc
= i1false
;
3521 LLVMValueRef lwe
= i1false
;
3523 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3524 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3525 emit_data
->args
[emit_data
->arg_count
++] = da
;
3527 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3529 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3533 /* HAVE_LLVM >= 0x0400 */
3534 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3535 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3536 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3537 emit_data
->args
[emit_data
->arg_count
++] = da
;
3541 * Append the resource and indexing arguments for buffer intrinsics.
3543 * \param rsrc the v4i32 buffer resource
3544 * \param index index into the buffer (stride-based)
3545 * \param offset byte offset into the buffer
3547 static void buffer_append_args(
3548 struct si_shader_context
*ctx
,
3549 struct lp_build_emit_data
*emit_data
,
3552 LLVMValueRef offset
,
3556 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3557 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3558 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3560 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3561 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3562 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3564 emit_data
->args
[emit_data
->arg_count
++] =
3566 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3567 i1true
: i1false
; /* glc */
3569 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3572 static void load_fetch_args(
3573 struct lp_build_tgsi_context
* bld_base
,
3574 struct lp_build_emit_data
* emit_data
)
3576 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3577 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3578 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3579 unsigned target
= inst
->Memory
.Texture
;
3582 emit_data
->dst_type
= LLVMVectorType(bld_base
->base
.elem_type
, 4);
3584 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3585 LLVMBuilderRef builder
= gallivm
->builder
;
3586 LLVMValueRef offset
;
3589 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3591 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3592 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3594 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3595 offset
, false, false);
3596 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3597 LLVMValueRef coords
;
3599 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3600 coords
= image_fetch_coords(bld_base
, inst
, 1);
3602 if (target
== TGSI_TEXTURE_BUFFER
) {
3603 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3604 bld_base
->uint_bld
.zero
, false, false);
3606 emit_data
->args
[0] = coords
;
3607 emit_data
->args
[1] = rsrc
;
3608 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
3609 emit_data
->arg_count
= 3;
3611 image_append_args(ctx
, emit_data
, target
, false, false);
3616 static void load_emit_buffer(struct si_shader_context
*ctx
,
3617 struct lp_build_emit_data
*emit_data
)
3619 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3620 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3621 LLVMBuilderRef builder
= gallivm
->builder
;
3622 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3623 uint count
= util_last_bit(writemask
);
3624 const char *intrinsic_name
;
3625 LLVMTypeRef dst_type
;
3629 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3630 dst_type
= ctx
->f32
;
3633 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3634 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3637 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3638 dst_type
= ctx
->v4f32
;
3642 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3643 builder
, intrinsic_name
, dst_type
,
3644 emit_data
->args
, emit_data
->arg_count
,
3645 LP_FUNC_ATTR_READONLY
);
3648 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3649 const struct tgsi_full_instruction
*inst
,
3650 LLVMTypeRef type
, int arg
)
3652 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3653 LLVMBuilderRef builder
= gallivm
->builder
;
3654 LLVMValueRef offset
, ptr
;
3657 offset
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, arg
, 0);
3658 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3660 ptr
= ctx
->shared_memory
;
3661 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3662 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3663 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3668 static void load_emit_memory(
3669 struct si_shader_context
*ctx
,
3670 struct lp_build_emit_data
*emit_data
)
3672 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3673 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3674 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3675 LLVMBuilderRef builder
= gallivm
->builder
;
3676 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3677 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3680 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 1);
3682 for (chan
= 0; chan
< 4; ++chan
) {
3683 if (!(writemask
& (1 << chan
))) {
3684 channels
[chan
] = LLVMGetUndef(base
->elem_type
);
3688 index
= lp_build_const_int32(gallivm
, chan
);
3689 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3690 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3692 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3695 static void get_image_intr_name(const char *base_name
,
3696 LLVMTypeRef data_type
,
3697 LLVMTypeRef coords_type
,
3698 LLVMTypeRef rsrc_type
,
3699 char *out_name
, unsigned out_len
)
3701 char coords_type_name
[8];
3703 build_type_name_for_intr(coords_type
, coords_type_name
,
3704 sizeof(coords_type_name
));
3706 if (HAVE_LLVM
<= 0x0309) {
3707 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
3709 char data_type_name
[8];
3710 char rsrc_type_name
[8];
3712 build_type_name_for_intr(data_type
, data_type_name
,
3713 sizeof(data_type_name
));
3714 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
3715 sizeof(rsrc_type_name
));
3716 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
3717 data_type_name
, coords_type_name
, rsrc_type_name
);
3721 static void load_emit(
3722 const struct lp_build_tgsi_action
*action
,
3723 struct lp_build_tgsi_context
*bld_base
,
3724 struct lp_build_emit_data
*emit_data
)
3726 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3727 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3728 LLVMBuilderRef builder
= gallivm
->builder
;
3729 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3730 char intrinsic_name
[64];
3732 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3733 load_emit_memory(ctx
, emit_data
);
3737 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3738 emit_waitcnt(ctx
, VM_CNT
);
3740 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3741 load_emit_buffer(ctx
, emit_data
);
3745 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3746 emit_data
->output
[emit_data
->chan
] =
3748 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3749 emit_data
->args
, emit_data
->arg_count
,
3750 LP_FUNC_ATTR_READONLY
);
3752 get_image_intr_name("llvm.amdgcn.image.load",
3753 emit_data
->dst_type
, /* vdata */
3754 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3755 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3756 intrinsic_name
, sizeof(intrinsic_name
));
3758 emit_data
->output
[emit_data
->chan
] =
3760 builder
, intrinsic_name
, emit_data
->dst_type
,
3761 emit_data
->args
, emit_data
->arg_count
,
3762 LP_FUNC_ATTR_READONLY
);
3766 static void store_fetch_args(
3767 struct lp_build_tgsi_context
* bld_base
,
3768 struct lp_build_emit_data
* emit_data
)
3770 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3771 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3772 LLVMBuilderRef builder
= gallivm
->builder
;
3773 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3774 struct tgsi_full_src_register memory
;
3775 LLVMValueRef chans
[4];
3780 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3782 for (chan
= 0; chan
< 4; ++chan
) {
3783 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3785 data
= lp_build_gather_values(gallivm
, chans
, 4);
3787 emit_data
->args
[emit_data
->arg_count
++] = data
;
3789 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3791 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3792 LLVMValueRef offset
;
3795 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3797 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3798 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3800 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3801 offset
, false, false);
3802 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3803 unsigned target
= inst
->Memory
.Texture
;
3804 LLVMValueRef coords
;
3806 /* 8bit/16bit TC L1 write corruption bug on SI.
3807 * All store opcodes not aligned to a dword are affected.
3809 * The only way to get unaligned stores in radeonsi is through
3812 bool force_glc
= ctx
->screen
->b
.chip_class
== SI
;
3814 coords
= image_fetch_coords(bld_base
, inst
, 0);
3816 if (target
== TGSI_TEXTURE_BUFFER
) {
3817 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3818 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3819 bld_base
->uint_bld
.zero
, false, force_glc
);
3821 emit_data
->args
[1] = coords
;
3822 image_fetch_rsrc(bld_base
, &memory
, true, target
,
3823 &emit_data
->args
[2]);
3824 emit_data
->args
[3] = lp_build_const_int32(gallivm
, 15); /* dmask */
3825 emit_data
->arg_count
= 4;
3827 image_append_args(ctx
, emit_data
, target
, false, force_glc
);
3832 static void store_emit_buffer(
3833 struct si_shader_context
*ctx
,
3834 struct lp_build_emit_data
*emit_data
)
3836 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3837 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3838 LLVMBuilderRef builder
= gallivm
->builder
;
3839 struct lp_build_context
*uint_bld
= &ctx
->soa
.bld_base
.uint_bld
;
3840 LLVMValueRef base_data
= emit_data
->args
[0];
3841 LLVMValueRef base_offset
= emit_data
->args
[3];
3842 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3846 const char *intrinsic_name
;
3848 LLVMValueRef offset
;
3851 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3853 /* Due to an LLVM limitation, split 3-element writes
3854 * into a 2-element and a 1-element write. */
3856 writemask
|= 1 << (start
+ 2);
3862 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3863 } else if (count
== 2) {
3864 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3866 tmp
= LLVMBuildExtractElement(
3868 lp_build_const_int32(gallivm
, start
), "");
3869 data
= LLVMBuildInsertElement(
3870 builder
, LLVMGetUndef(v2f32
), tmp
,
3871 uint_bld
->zero
, "");
3873 tmp
= LLVMBuildExtractElement(
3875 lp_build_const_int32(gallivm
, start
+ 1), "");
3876 data
= LLVMBuildInsertElement(
3877 builder
, data
, tmp
, uint_bld
->one
, "");
3879 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3882 data
= LLVMBuildExtractElement(
3884 lp_build_const_int32(gallivm
, start
), "");
3885 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3888 offset
= base_offset
;
3890 offset
= LLVMBuildAdd(
3892 lp_build_const_int32(gallivm
, start
* 4), "");
3895 emit_data
->args
[0] = data
;
3896 emit_data
->args
[3] = offset
;
3899 builder
, intrinsic_name
, emit_data
->dst_type
,
3900 emit_data
->args
, emit_data
->arg_count
, 0);
3904 static void store_emit_memory(
3905 struct si_shader_context
*ctx
,
3906 struct lp_build_emit_data
*emit_data
)
3908 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3909 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3910 struct lp_build_context
*base
= &ctx
->soa
.bld_base
.base
;
3911 LLVMBuilderRef builder
= gallivm
->builder
;
3912 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3913 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3916 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 0);
3918 for (chan
= 0; chan
< 4; ++chan
) {
3919 if (!(writemask
& (1 << chan
))) {
3922 data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 1, chan
);
3923 index
= lp_build_const_int32(gallivm
, chan
);
3924 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3925 LLVMBuildStore(builder
, data
, derived_ptr
);
3929 static void store_emit(
3930 const struct lp_build_tgsi_action
*action
,
3931 struct lp_build_tgsi_context
*bld_base
,
3932 struct lp_build_emit_data
*emit_data
)
3934 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3935 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3936 LLVMBuilderRef builder
= gallivm
->builder
;
3937 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3938 unsigned target
= inst
->Memory
.Texture
;
3939 char intrinsic_name
[64];
3941 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3942 store_emit_memory(ctx
, emit_data
);
3946 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3947 emit_waitcnt(ctx
, VM_CNT
);
3949 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3950 store_emit_buffer(ctx
, emit_data
);
3954 if (target
== TGSI_TEXTURE_BUFFER
) {
3955 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3956 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
3957 emit_data
->dst_type
, emit_data
->args
,
3958 emit_data
->arg_count
, 0);
3960 get_image_intr_name("llvm.amdgcn.image.store",
3961 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
3962 LLVMTypeOf(emit_data
->args
[1]), /* coords */
3963 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
3964 intrinsic_name
, sizeof(intrinsic_name
));
3966 emit_data
->output
[emit_data
->chan
] =
3968 builder
, intrinsic_name
, emit_data
->dst_type
,
3969 emit_data
->args
, emit_data
->arg_count
, 0);
3973 static void atomic_fetch_args(
3974 struct lp_build_tgsi_context
* bld_base
,
3975 struct lp_build_emit_data
* emit_data
)
3977 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3978 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3979 LLVMBuilderRef builder
= gallivm
->builder
;
3980 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3981 LLVMValueRef data1
, data2
;
3985 emit_data
->dst_type
= bld_base
->base
.elem_type
;
3987 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
3988 data1
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3990 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
3991 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
3992 data2
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3995 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
3996 * of arguments, which is reversed relative to TGSI (and GLSL)
3998 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
3999 emit_data
->args
[emit_data
->arg_count
++] = data2
;
4000 emit_data
->args
[emit_data
->arg_count
++] = data1
;
4002 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4003 LLVMValueRef offset
;
4005 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
4007 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
4008 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4010 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
4011 offset
, true, false);
4012 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
4013 unsigned target
= inst
->Memory
.Texture
;
4014 LLVMValueRef coords
;
4016 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
4017 coords
= image_fetch_coords(bld_base
, inst
, 1);
4019 if (target
== TGSI_TEXTURE_BUFFER
) {
4020 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
4021 bld_base
->uint_bld
.zero
, true, false);
4023 emit_data
->args
[emit_data
->arg_count
++] = coords
;
4024 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
4026 image_append_args(ctx
, emit_data
, target
, true, false);
4031 static void atomic_emit_memory(struct si_shader_context
*ctx
,
4032 struct lp_build_emit_data
*emit_data
) {
4033 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4034 LLVMBuilderRef builder
= gallivm
->builder
;
4035 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4036 LLVMValueRef ptr
, result
, arg
;
4038 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
4040 arg
= lp_build_emit_fetch(&ctx
->soa
.bld_base
, inst
, 2, 0);
4041 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
4043 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4044 LLVMValueRef new_data
;
4045 new_data
= lp_build_emit_fetch(&ctx
->soa
.bld_base
,
4048 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
4050 #if HAVE_LLVM >= 0x309
4051 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
4052 LLVMAtomicOrderingSequentiallyConsistent
,
4053 LLVMAtomicOrderingSequentiallyConsistent
,
4057 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
4059 LLVMAtomicRMWBinOp op
;
4061 switch(inst
->Instruction
.Opcode
) {
4062 case TGSI_OPCODE_ATOMUADD
:
4063 op
= LLVMAtomicRMWBinOpAdd
;
4065 case TGSI_OPCODE_ATOMXCHG
:
4066 op
= LLVMAtomicRMWBinOpXchg
;
4068 case TGSI_OPCODE_ATOMAND
:
4069 op
= LLVMAtomicRMWBinOpAnd
;
4071 case TGSI_OPCODE_ATOMOR
:
4072 op
= LLVMAtomicRMWBinOpOr
;
4074 case TGSI_OPCODE_ATOMXOR
:
4075 op
= LLVMAtomicRMWBinOpXor
;
4077 case TGSI_OPCODE_ATOMUMIN
:
4078 op
= LLVMAtomicRMWBinOpUMin
;
4080 case TGSI_OPCODE_ATOMUMAX
:
4081 op
= LLVMAtomicRMWBinOpUMax
;
4083 case TGSI_OPCODE_ATOMIMIN
:
4084 op
= LLVMAtomicRMWBinOpMin
;
4086 case TGSI_OPCODE_ATOMIMAX
:
4087 op
= LLVMAtomicRMWBinOpMax
;
4090 unreachable("unknown atomic opcode");
4093 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
4094 LLVMAtomicOrderingSequentiallyConsistent
,
4097 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
4100 static void atomic_emit(
4101 const struct lp_build_tgsi_action
*action
,
4102 struct lp_build_tgsi_context
*bld_base
,
4103 struct lp_build_emit_data
*emit_data
)
4105 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4106 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4107 LLVMBuilderRef builder
= gallivm
->builder
;
4108 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4109 char intrinsic_name
[40];
4112 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4113 atomic_emit_memory(ctx
, emit_data
);
4117 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
4118 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4119 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4120 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
4122 LLVMValueRef coords
;
4123 char coords_type
[8];
4125 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4126 coords
= emit_data
->args
[2];
4128 coords
= emit_data
->args
[1];
4130 build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4131 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4132 "llvm.amdgcn.image.atomic.%s.%s",
4133 action
->intr_name
, coords_type
);
4136 tmp
= lp_build_intrinsic(
4137 builder
, intrinsic_name
, bld_base
->uint_bld
.elem_type
,
4138 emit_data
->args
, emit_data
->arg_count
, 0);
4139 emit_data
->output
[emit_data
->chan
] =
4140 LLVMBuildBitCast(builder
, tmp
, bld_base
->base
.elem_type
, "");
4143 static void resq_fetch_args(
4144 struct lp_build_tgsi_context
* bld_base
,
4145 struct lp_build_emit_data
* emit_data
)
4147 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4148 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4149 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4150 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4152 emit_data
->dst_type
= ctx
->v4i32
;
4154 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4155 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4156 emit_data
->arg_count
= 1;
4157 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4158 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4159 &emit_data
->args
[0]);
4160 emit_data
->arg_count
= 1;
4162 emit_data
->args
[0] = bld_base
->uint_bld
.zero
; /* mip level */
4163 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4164 &emit_data
->args
[1]);
4165 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
4166 emit_data
->args
[3] = bld_base
->uint_bld
.zero
; /* unorm */
4167 emit_data
->args
[4] = bld_base
->uint_bld
.zero
; /* r128 */
4168 emit_data
->args
[5] = tgsi_is_array_image(inst
->Memory
.Texture
) ?
4169 bld_base
->uint_bld
.one
: bld_base
->uint_bld
.zero
; /* da */
4170 emit_data
->args
[6] = bld_base
->uint_bld
.zero
; /* glc */
4171 emit_data
->args
[7] = bld_base
->uint_bld
.zero
; /* slc */
4172 emit_data
->args
[8] = bld_base
->uint_bld
.zero
; /* tfe */
4173 emit_data
->args
[9] = bld_base
->uint_bld
.zero
; /* lwe */
4174 emit_data
->arg_count
= 10;
4178 static void resq_emit(
4179 const struct lp_build_tgsi_action
*action
,
4180 struct lp_build_tgsi_context
*bld_base
,
4181 struct lp_build_emit_data
*emit_data
)
4183 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4184 LLVMBuilderRef builder
= gallivm
->builder
;
4185 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4188 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4189 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4190 lp_build_const_int32(gallivm
, 2), "");
4191 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4192 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4194 out
= lp_build_intrinsic(
4195 builder
, "llvm.SI.getresinfo.i32", emit_data
->dst_type
,
4196 emit_data
->args
, emit_data
->arg_count
,
4197 LP_FUNC_ATTR_READNONE
);
4199 /* Divide the number of layers by 6 to get the number of cubes. */
4200 if (inst
->Memory
.Texture
== TGSI_TEXTURE_CUBE_ARRAY
) {
4201 LLVMValueRef imm2
= lp_build_const_int32(gallivm
, 2);
4202 LLVMValueRef imm6
= lp_build_const_int32(gallivm
, 6);
4204 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4205 z
= LLVMBuildSDiv(builder
, z
, imm6
, "");
4206 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4210 emit_data
->output
[emit_data
->chan
] = out
;
4213 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4214 struct lp_build_emit_data
*emit_data
,
4215 unsigned opcode
, unsigned target
,
4216 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4217 LLVMValueRef
*param
, unsigned count
,
4220 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4222 unsigned is_rect
= target
== TGSI_TEXTURE_RECT
;
4224 /* Pad to power of two vector */
4225 while (count
< util_next_power_of_two(count
))
4226 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4228 /* Texture coordinates. */
4230 emit_data
->args
[0] = lp_build_gather_values(gallivm
, param
, count
);
4232 emit_data
->args
[0] = param
[0];
4235 emit_data
->args
[1] = res_ptr
;
4238 if (opcode
== TGSI_OPCODE_TXF
|| opcode
== TGSI_OPCODE_TXQ
)
4239 emit_data
->dst_type
= ctx
->v4i32
;
4241 emit_data
->dst_type
= ctx
->v4f32
;
4243 emit_data
->args
[num_args
++] = samp_ptr
;
4246 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, dmask
);
4247 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, is_rect
); /* unorm */
4248 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* r128 */
4249 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
,
4250 tgsi_is_array_sampler(target
)); /* da */
4251 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* glc */
4252 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* slc */
4253 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* tfe */
4254 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* lwe */
4256 emit_data
->arg_count
= num_args
;
4259 static const struct lp_build_tgsi_action tex_action
;
4269 * Load an image view, fmask view. or sampler state descriptor.
4271 static LLVMValueRef
load_sampler_desc_custom(struct si_shader_context
*ctx
,
4272 LLVMValueRef list
, LLVMValueRef index
,
4273 enum desc_type type
)
4275 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4276 LLVMBuilderRef builder
= gallivm
->builder
;
4280 /* The image is at [0:7]. */
4281 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4284 /* The buffer is in [4:7]. */
4285 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4286 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4287 list
= LLVMBuildPointerCast(builder
, list
,
4288 const_array(ctx
->v4i32
, 0), "");
4291 /* The FMASK is at [8:15]. */
4292 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4293 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4296 /* The sampler state is at [12:15]. */
4297 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4298 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4299 list
= LLVMBuildPointerCast(builder
, list
,
4300 const_array(ctx
->v4i32
, 0), "");
4304 return build_indexed_load_const(ctx
, list
, index
);
4307 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4308 LLVMValueRef index
, enum desc_type type
)
4310 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
,
4313 return load_sampler_desc_custom(ctx
, list
, index
, type
);
4316 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4319 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4320 * filtering manually. The driver sets img7 to a mask clearing
4321 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4322 * s_and_b32 samp0, samp0, img7
4325 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4327 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4328 LLVMValueRef res
, LLVMValueRef samp
)
4330 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4331 LLVMValueRef img7
, samp0
;
4333 if (ctx
->screen
->b
.chip_class
>= VI
)
4336 img7
= LLVMBuildExtractElement(builder
, res
,
4337 LLVMConstInt(ctx
->i32
, 7, 0), "");
4338 samp0
= LLVMBuildExtractElement(builder
, samp
,
4339 LLVMConstInt(ctx
->i32
, 0, 0), "");
4340 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4341 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4342 LLVMConstInt(ctx
->i32
, 0, 0), "");
4345 static void tex_fetch_ptrs(
4346 struct lp_build_tgsi_context
*bld_base
,
4347 struct lp_build_emit_data
*emit_data
,
4348 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4350 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4351 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4352 unsigned target
= inst
->Texture
.Texture
;
4353 unsigned sampler_src
;
4354 unsigned sampler_index
;
4357 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4358 sampler_index
= emit_data
->inst
->Src
[sampler_src
].Register
.Index
;
4360 if (emit_data
->inst
->Src
[sampler_src
].Register
.Indirect
) {
4361 const struct tgsi_full_src_register
*reg
= &emit_data
->inst
->Src
[sampler_src
];
4363 index
= get_bounded_indirect_index(ctx
,
4365 reg
->Register
.Index
,
4368 index
= LLVMConstInt(ctx
->i32
, sampler_index
, 0);
4371 if (target
== TGSI_TEXTURE_BUFFER
)
4372 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_BUFFER
);
4374 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_IMAGE
);
4381 if (target
== TGSI_TEXTURE_2D_MSAA
||
4382 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4384 *fmask_ptr
= load_sampler_desc(ctx
, index
, DESC_FMASK
);
4385 } else if (target
!= TGSI_TEXTURE_BUFFER
) {
4387 *samp_ptr
= load_sampler_desc(ctx
, index
, DESC_SAMPLER
);
4388 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4393 static void txq_fetch_args(
4394 struct lp_build_tgsi_context
*bld_base
,
4395 struct lp_build_emit_data
*emit_data
)
4397 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4398 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4399 unsigned target
= inst
->Texture
.Texture
;
4400 LLVMValueRef res_ptr
;
4401 LLVMValueRef address
;
4403 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4405 if (target
== TGSI_TEXTURE_BUFFER
) {
4406 /* Read the size from the buffer descriptor directly. */
4407 emit_data
->args
[0] = get_buffer_size(bld_base
, res_ptr
);
4411 /* Textures - set the mip level. */
4412 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4414 set_tex_fetch_args(ctx
, emit_data
, TGSI_OPCODE_TXQ
, target
, res_ptr
,
4415 NULL
, &address
, 1, 0xf);
4418 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4419 struct lp_build_tgsi_context
*bld_base
,
4420 struct lp_build_emit_data
*emit_data
)
4422 struct lp_build_context
*base
= &bld_base
->base
;
4423 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4425 if (target
== TGSI_TEXTURE_BUFFER
) {
4426 /* Just return the buffer size. */
4427 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4431 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4432 base
->gallivm
->builder
, "llvm.SI.getresinfo.i32",
4433 emit_data
->dst_type
, emit_data
->args
, emit_data
->arg_count
,
4434 LP_FUNC_ATTR_READNONE
);
4436 /* Divide the number of layers by 6 to get the number of cubes. */
4437 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4438 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4439 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
4440 LLVMValueRef two
= lp_build_const_int32(bld_base
->base
.gallivm
, 2);
4441 LLVMValueRef six
= lp_build_const_int32(bld_base
->base
.gallivm
, 6);
4443 LLVMValueRef v4
= emit_data
->output
[emit_data
->chan
];
4444 LLVMValueRef z
= LLVMBuildExtractElement(builder
, v4
, two
, "");
4445 z
= LLVMBuildSDiv(builder
, z
, six
, "");
4447 emit_data
->output
[emit_data
->chan
] =
4448 LLVMBuildInsertElement(builder
, v4
, z
, two
, "");
4452 static void tex_fetch_args(
4453 struct lp_build_tgsi_context
*bld_base
,
4454 struct lp_build_emit_data
*emit_data
)
4456 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4457 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4458 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4459 unsigned opcode
= inst
->Instruction
.Opcode
;
4460 unsigned target
= inst
->Texture
.Texture
;
4461 LLVMValueRef coords
[5], derivs
[6];
4462 LLVMValueRef address
[16];
4463 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4464 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4467 unsigned num_deriv_channels
= 0;
4468 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4469 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4470 unsigned dmask
= 0xf;
4472 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4474 if (target
== TGSI_TEXTURE_BUFFER
) {
4475 emit_data
->dst_type
= ctx
->v4f32
;
4476 emit_data
->args
[0] = LLVMBuildBitCast(gallivm
->builder
, res_ptr
,
4478 emit_data
->args
[1] = bld_base
->uint_bld
.zero
;
4479 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4480 emit_data
->arg_count
= 3;
4484 /* Fetch and project texture coordinates */
4485 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4486 for (chan
= 0; chan
< 3; chan
++ ) {
4487 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4490 if (opcode
== TGSI_OPCODE_TXP
)
4491 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4497 if (opcode
== TGSI_OPCODE_TXP
)
4498 coords
[3] = bld_base
->base
.one
;
4501 if (has_offset
&& opcode
!= TGSI_OPCODE_TXF
) {
4502 /* The offsets are six-bit signed integers packed like this:
4503 * X=[5:0], Y=[13:8], and Z=[21:16].
4505 LLVMValueRef offset
[3], pack
;
4507 assert(inst
->Texture
.NumOffsets
== 1);
4509 for (chan
= 0; chan
< 3; chan
++) {
4510 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4511 emit_data
->inst
, 0, chan
);
4512 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4513 lp_build_const_int32(gallivm
, 0x3f), "");
4515 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4516 lp_build_const_int32(gallivm
, chan
*8), "");
4519 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4520 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4521 address
[count
++] = pack
;
4524 /* Pack LOD bias value */
4525 if (opcode
== TGSI_OPCODE_TXB
)
4526 address
[count
++] = coords
[3];
4527 if (opcode
== TGSI_OPCODE_TXB2
)
4528 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4530 /* Pack depth comparison value */
4531 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4534 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4535 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4537 assert(ref_pos
>= 0);
4538 z
= coords
[ref_pos
];
4541 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4542 * so the depth comparison value isn't clamped for Z16 and
4543 * Z24 anymore. Do it manually here.
4545 * It's unnecessary if the original texture format was
4546 * Z32_FLOAT, but we don't know that here.
4548 if (ctx
->screen
->b
.chip_class
== VI
)
4549 z
= si_llvm_saturate(bld_base
, z
);
4551 address
[count
++] = z
;
4554 /* Pack user derivatives */
4555 if (opcode
== TGSI_OPCODE_TXD
) {
4556 int param
, num_src_deriv_channels
;
4559 case TGSI_TEXTURE_3D
:
4560 num_src_deriv_channels
= 3;
4561 num_deriv_channels
= 3;
4563 case TGSI_TEXTURE_2D
:
4564 case TGSI_TEXTURE_SHADOW2D
:
4565 case TGSI_TEXTURE_RECT
:
4566 case TGSI_TEXTURE_SHADOWRECT
:
4567 case TGSI_TEXTURE_2D_ARRAY
:
4568 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4569 num_src_deriv_channels
= 2;
4570 num_deriv_channels
= 2;
4572 case TGSI_TEXTURE_CUBE
:
4573 case TGSI_TEXTURE_SHADOWCUBE
:
4574 case TGSI_TEXTURE_CUBE_ARRAY
:
4575 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4576 /* Cube derivatives will be converted to 2D. */
4577 num_src_deriv_channels
= 3;
4578 num_deriv_channels
= 2;
4580 case TGSI_TEXTURE_1D
:
4581 case TGSI_TEXTURE_SHADOW1D
:
4582 case TGSI_TEXTURE_1D_ARRAY
:
4583 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4584 num_src_deriv_channels
= 1;
4585 num_deriv_channels
= 1;
4588 unreachable("invalid target");
4591 for (param
= 0; param
< 2; param
++)
4592 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4593 derivs
[param
* num_src_deriv_channels
+ chan
] =
4594 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4597 if (target
== TGSI_TEXTURE_CUBE
||
4598 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4599 target
== TGSI_TEXTURE_SHADOWCUBE
||
4600 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4601 si_prepare_cube_coords(bld_base
, emit_data
, coords
, derivs
);
4603 if (opcode
== TGSI_OPCODE_TXD
)
4604 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4605 address
[count
++] = derivs
[i
];
4607 /* Pack texture coordinates */
4608 address
[count
++] = coords
[0];
4610 address
[count
++] = coords
[1];
4612 address
[count
++] = coords
[2];
4614 /* Pack LOD or sample index */
4615 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4616 address
[count
++] = coords
[3];
4617 else if (opcode
== TGSI_OPCODE_TXL2
)
4618 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4621 assert(!"Cannot handle more than 16 texture address parameters");
4625 for (chan
= 0; chan
< count
; chan
++ ) {
4626 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4627 address
[chan
], ctx
->i32
, "");
4630 /* Adjust the sample index according to FMASK.
4632 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4633 * which is the identity mapping. Each nibble says which physical sample
4634 * should be fetched to get that sample.
4636 * For example, 0x11111100 means there are only 2 samples stored and
4637 * the second sample covers 3/4 of the pixel. When reading samples 0
4638 * and 1, return physical sample 0 (determined by the first two 0s
4639 * in FMASK), otherwise return physical sample 1.
4641 * The sample index should be adjusted as follows:
4642 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4644 if (target
== TGSI_TEXTURE_2D_MSAA
||
4645 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4646 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4647 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4648 LLVMValueRef txf_address
[4];
4649 unsigned txf_count
= count
;
4650 struct tgsi_full_instruction inst
= {};
4652 memcpy(txf_address
, address
, sizeof(txf_address
));
4654 if (target
== TGSI_TEXTURE_2D_MSAA
) {
4655 txf_address
[2] = bld_base
->uint_bld
.zero
;
4657 txf_address
[3] = bld_base
->uint_bld
.zero
;
4659 /* Read FMASK using TXF. */
4660 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF
;
4661 inst
.Texture
.Texture
= target
;
4662 txf_emit_data
.inst
= &inst
;
4663 txf_emit_data
.chan
= 0;
4664 set_tex_fetch_args(ctx
, &txf_emit_data
, TGSI_OPCODE_TXF
,
4665 target
, fmask_ptr
, NULL
,
4666 txf_address
, txf_count
, 0xf);
4667 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4669 /* Initialize some constants. */
4670 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4671 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4673 /* Apply the formula. */
4674 LLVMValueRef fmask
=
4675 LLVMBuildExtractElement(gallivm
->builder
,
4676 txf_emit_data
.output
[0],
4677 uint_bld
->zero
, "");
4679 unsigned sample_chan
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4681 LLVMValueRef sample_index4
=
4682 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4684 LLVMValueRef shifted_fmask
=
4685 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4687 LLVMValueRef final_sample
=
4688 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4690 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4691 * resource descriptor is 0 (invalid),
4693 LLVMValueRef fmask_desc
=
4694 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4697 LLVMValueRef fmask_word1
=
4698 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4701 LLVMValueRef word1_is_nonzero
=
4702 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4703 fmask_word1
, uint_bld
->zero
, "");
4705 /* Replace the MSAA sample index. */
4706 address
[sample_chan
] =
4707 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4708 final_sample
, address
[sample_chan
], "");
4711 if (opcode
== TGSI_OPCODE_TXF
) {
4712 /* add tex offsets */
4713 if (inst
->Texture
.NumOffsets
) {
4714 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4715 struct lp_build_tgsi_soa_context
*bld
= lp_soa_context(bld_base
);
4716 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4718 assert(inst
->Texture
.NumOffsets
== 1);
4721 case TGSI_TEXTURE_3D
:
4722 address
[2] = lp_build_add(uint_bld
, address
[2],
4723 bld
->immediates
[off
->Index
][off
->SwizzleZ
]);
4725 case TGSI_TEXTURE_2D
:
4726 case TGSI_TEXTURE_SHADOW2D
:
4727 case TGSI_TEXTURE_RECT
:
4728 case TGSI_TEXTURE_SHADOWRECT
:
4729 case TGSI_TEXTURE_2D_ARRAY
:
4730 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4732 lp_build_add(uint_bld
, address
[1],
4733 bld
->immediates
[off
->Index
][off
->SwizzleY
]);
4735 case TGSI_TEXTURE_1D
:
4736 case TGSI_TEXTURE_SHADOW1D
:
4737 case TGSI_TEXTURE_1D_ARRAY
:
4738 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4740 lp_build_add(uint_bld
, address
[0],
4741 bld
->immediates
[off
->Index
][off
->SwizzleX
]);
4743 /* texture offsets do not apply to other texture targets */
4748 if (opcode
== TGSI_OPCODE_TG4
) {
4749 unsigned gather_comp
= 0;
4751 /* DMASK was repurposed for GATHER4. 4 components are always
4752 * returned and DMASK works like a swizzle - it selects
4753 * the component to fetch. The only valid DMASK values are
4754 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4755 * (red,red,red,red) etc.) The ISA document doesn't mention
4759 /* Get the component index from src1.x for Gather4. */
4760 if (!tgsi_is_shadow_target(target
)) {
4761 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
4762 LLVMValueRef comp_imm
;
4763 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4765 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4767 comp_imm
= imms
[src1
.Index
][src1
.SwizzleX
];
4768 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4769 gather_comp
= CLAMP(gather_comp
, 0, 3);
4772 dmask
= 1 << gather_comp
;
4775 set_tex_fetch_args(ctx
, emit_data
, opcode
, target
, res_ptr
,
4776 samp_ptr
, address
, count
, dmask
);
4779 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4780 * incorrectly forces nearest filtering if the texture format is integer.
4781 * The only effect it has on Gather4, which always returns 4 texels for
4782 * bilinear filtering, is that the final coordinates are off by 0.5 of
4785 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4786 * or (0.5 / size) from the normalized coordinates.
4788 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4789 struct lp_build_emit_data
*emit_data
,
4790 const char *intr_name
,
4791 unsigned coord_vgpr_index
)
4793 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4794 LLVMValueRef coord
= emit_data
->args
[0];
4795 LLVMValueRef half_texel
[2];
4798 if (emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
||
4799 emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWRECT
) {
4800 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4802 struct tgsi_full_instruction txq_inst
= {};
4803 struct lp_build_emit_data txq_emit_data
= {};
4805 /* Query the texture size. */
4806 txq_inst
.Texture
.Texture
= emit_data
->inst
->Texture
.Texture
;
4807 txq_emit_data
.inst
= &txq_inst
;
4808 txq_emit_data
.dst_type
= ctx
->v4i32
;
4809 set_tex_fetch_args(ctx
, &txq_emit_data
, TGSI_OPCODE_TXQ
,
4810 txq_inst
.Texture
.Texture
,
4811 emit_data
->args
[1], NULL
,
4812 &ctx
->soa
.bld_base
.uint_bld
.zero
,
4814 txq_emit(NULL
, &ctx
->soa
.bld_base
, &txq_emit_data
);
4816 /* Compute -0.5 / size. */
4817 for (c
= 0; c
< 2; c
++) {
4819 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4820 LLVMConstInt(ctx
->i32
, c
, 0), "");
4821 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4823 lp_build_emit_llvm_unary(&ctx
->soa
.bld_base
,
4824 TGSI_OPCODE_RCP
, half_texel
[c
]);
4825 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4826 LLVMConstReal(ctx
->f32
, -0.5), "");
4830 for (c
= 0; c
< 2; c
++) {
4832 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4834 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4835 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4836 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4837 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4838 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4841 emit_data
->args
[0] = coord
;
4842 emit_data
->output
[emit_data
->chan
] =
4843 lp_build_intrinsic(builder
, intr_name
, emit_data
->dst_type
,
4844 emit_data
->args
, emit_data
->arg_count
,
4845 LP_FUNC_ATTR_READNONE
);
4848 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4849 struct lp_build_tgsi_context
*bld_base
,
4850 struct lp_build_emit_data
*emit_data
)
4852 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4853 struct lp_build_context
*base
= &bld_base
->base
;
4854 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4855 unsigned opcode
= inst
->Instruction
.Opcode
;
4856 unsigned target
= inst
->Texture
.Texture
;
4857 char intr_name
[127];
4858 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4859 bool is_shadow
= tgsi_is_shadow_target(target
);
4861 const char *name
= "llvm.SI.image.sample";
4862 const char *infix
= "";
4864 if (target
== TGSI_TEXTURE_BUFFER
) {
4865 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4866 base
->gallivm
->builder
,
4867 "llvm.SI.vs.load.input", emit_data
->dst_type
,
4868 emit_data
->args
, emit_data
->arg_count
,
4869 LP_FUNC_ATTR_READNONE
);
4874 case TGSI_OPCODE_TXF
:
4875 name
= target
== TGSI_TEXTURE_2D_MSAA
||
4876 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4877 "llvm.SI.image.load" :
4878 "llvm.SI.image.load.mip";
4882 case TGSI_OPCODE_LODQ
:
4883 name
= "llvm.SI.getlod";
4887 case TGSI_OPCODE_TEX
:
4888 case TGSI_OPCODE_TEX2
:
4889 case TGSI_OPCODE_TXP
:
4890 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4893 case TGSI_OPCODE_TXB
:
4894 case TGSI_OPCODE_TXB2
:
4895 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4898 case TGSI_OPCODE_TXL
:
4899 case TGSI_OPCODE_TXL2
:
4902 case TGSI_OPCODE_TXD
:
4905 case TGSI_OPCODE_TG4
:
4906 name
= "llvm.SI.gather4";
4914 /* Add the type and suffixes .c, .o if needed. */
4915 build_type_name_for_intr(LLVMTypeOf(emit_data
->args
[0]), type
, sizeof(type
));
4916 sprintf(intr_name
, "%s%s%s%s.%s",
4917 name
, is_shadow
? ".c" : "", infix
,
4918 has_offset
? ".o" : "", type
);
4920 /* The hardware needs special lowering for Gather4 with integer formats. */
4921 if (opcode
== TGSI_OPCODE_TG4
) {
4922 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4923 /* This will also work with non-constant indexing because of how
4924 * glsl_to_tgsi works and we intent to preserve that behavior.
4926 const unsigned src_idx
= 2;
4927 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4929 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4931 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4932 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
) {
4933 /* Texture coordinates start after:
4934 * {offset, bias, z-compare, derivatives}
4935 * Only the offset and z-compare can occur here.
4937 si_lower_gather4_integer(ctx
, emit_data
, intr_name
,
4938 (int)has_offset
+ (int)is_shadow
);
4943 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4944 base
->gallivm
->builder
, intr_name
, emit_data
->dst_type
,
4945 emit_data
->args
, emit_data
->arg_count
,
4946 LP_FUNC_ATTR_READNONE
);
4949 static void si_llvm_emit_txqs(
4950 const struct lp_build_tgsi_action
*action
,
4951 struct lp_build_tgsi_context
*bld_base
,
4952 struct lp_build_emit_data
*emit_data
)
4954 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4955 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4956 LLVMBuilderRef builder
= gallivm
->builder
;
4957 LLVMValueRef res
, samples
;
4958 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4960 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4963 /* Read the samples from the descriptor directly. */
4964 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
4965 samples
= LLVMBuildExtractElement(
4967 lp_build_const_int32(gallivm
, 3), "");
4968 samples
= LLVMBuildLShr(builder
, samples
,
4969 lp_build_const_int32(gallivm
, 16), "");
4970 samples
= LLVMBuildAnd(builder
, samples
,
4971 lp_build_const_int32(gallivm
, 0xf), "");
4972 samples
= LLVMBuildShl(builder
, lp_build_const_int32(gallivm
, 1),
4975 emit_data
->output
[emit_data
->chan
] = samples
;
4979 * SI implements derivatives using the local data store (LDS)
4980 * All writes to the LDS happen in all executing threads at
4981 * the same time. TID is the Thread ID for the current
4982 * thread and is a value between 0 and 63, representing
4983 * the thread's position in the wavefront.
4985 * For the pixel shader threads are grouped into quads of four pixels.
4986 * The TIDs of the pixels of a quad are:
4994 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
4995 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
4996 * the current pixel's column, and masking with 0xfffffffe yields the TID
4997 * of the left pixel of the current pixel's row.
4999 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
5000 * adding 2 yields the TID of the pixel below the top pixel.
5002 /* masks for thread ID. */
5003 #define TID_MASK_TOP_LEFT 0xfffffffc
5004 #define TID_MASK_TOP 0xfffffffd
5005 #define TID_MASK_LEFT 0xfffffffe
5007 static void si_llvm_emit_ddxy(
5008 const struct lp_build_tgsi_action
*action
,
5009 struct lp_build_tgsi_context
*bld_base
,
5010 struct lp_build_emit_data
*emit_data
)
5012 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5013 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5014 unsigned opcode
= emit_data
->info
->opcode
;
5015 LLVMValueRef thread_id
, tl
, trbl
, tl_tid
, trbl_tid
, val
, args
[2];
5019 thread_id
= get_thread_id(ctx
);
5021 if (opcode
== TGSI_OPCODE_DDX_FINE
)
5022 mask
= TID_MASK_LEFT
;
5023 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
5024 mask
= TID_MASK_TOP
;
5026 mask
= TID_MASK_TOP_LEFT
;
5028 tl_tid
= LLVMBuildAnd(gallivm
->builder
, thread_id
,
5029 lp_build_const_int32(gallivm
, mask
), "");
5031 /* for DDX we want to next X pixel, DDY next Y pixel. */
5032 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
5033 trbl_tid
= LLVMBuildAdd(gallivm
->builder
, tl_tid
,
5034 lp_build_const_int32(gallivm
, idx
), "");
5036 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
5038 if (ctx
->screen
->has_ds_bpermute
) {
5039 args
[0] = LLVMBuildMul(gallivm
->builder
, tl_tid
,
5040 lp_build_const_int32(gallivm
, 4), "");
5042 tl
= lp_build_intrinsic(gallivm
->builder
,
5043 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5044 args
, 2, LP_FUNC_ATTR_READNONE
);
5046 args
[0] = LLVMBuildMul(gallivm
->builder
, trbl_tid
,
5047 lp_build_const_int32(gallivm
, 4), "");
5048 trbl
= lp_build_intrinsic(gallivm
->builder
,
5049 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5050 args
, 2, LP_FUNC_ATTR_READNONE
);
5052 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
5054 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
5055 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
5056 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
5058 LLVMBuildStore(gallivm
->builder
, val
, store_ptr
);
5059 tl
= LLVMBuildLoad(gallivm
->builder
, load_ptr0
, "");
5060 trbl
= LLVMBuildLoad(gallivm
->builder
, load_ptr1
, "");
5063 tl
= LLVMBuildBitCast(gallivm
->builder
, tl
, ctx
->f32
, "");
5064 trbl
= LLVMBuildBitCast(gallivm
->builder
, trbl
, ctx
->f32
, "");
5066 emit_data
->output
[emit_data
->chan
] =
5067 LLVMBuildFSub(gallivm
->builder
, trbl
, tl
, "");
5071 * this takes an I,J coordinate pair,
5072 * and works out the X and Y derivatives.
5073 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
5075 static LLVMValueRef
si_llvm_emit_ddxy_interp(
5076 struct lp_build_tgsi_context
*bld_base
,
5077 LLVMValueRef interp_ij
)
5079 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5080 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5081 LLVMValueRef result
[4], a
;
5084 for (i
= 0; i
< 2; i
++) {
5085 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
5086 LLVMConstInt(ctx
->i32
, i
, 0), "");
5087 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
5088 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
5091 return lp_build_gather_values(gallivm
, result
, 4);
5094 static void interp_fetch_args(
5095 struct lp_build_tgsi_context
*bld_base
,
5096 struct lp_build_emit_data
*emit_data
)
5098 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5099 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5100 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5102 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
5103 /* offset is in second src, first two channels */
5104 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
5107 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
5110 emit_data
->arg_count
= 2;
5111 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5112 LLVMValueRef sample_position
;
5113 LLVMValueRef sample_id
;
5114 LLVMValueRef halfval
= lp_build_const_float(gallivm
, 0.5f
);
5116 /* fetch sample ID, then fetch its sample position,
5117 * and place into first two channels.
5119 sample_id
= lp_build_emit_fetch(bld_base
,
5120 emit_data
->inst
, 1, TGSI_CHAN_X
);
5121 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
5123 sample_position
= load_sample_position(ctx
, sample_id
);
5125 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5127 lp_build_const_int32(gallivm
, 0), "");
5129 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5130 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5132 lp_build_const_int32(gallivm
, 1), "");
5133 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5134 emit_data
->arg_count
= 2;
5138 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5139 struct lp_build_tgsi_context
*bld_base
,
5140 struct lp_build_emit_data
*emit_data
)
5142 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5143 struct si_shader
*shader
= ctx
->shader
;
5144 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5145 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5146 LLVMValueRef interp_param
;
5147 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5148 int input_index
= inst
->Src
[0].Register
.Index
;
5151 LLVMValueRef attr_number
;
5152 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5153 int interp_param_idx
;
5154 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5157 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5159 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5160 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5161 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5163 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5165 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5166 if (interp_param_idx
== -1)
5168 else if (interp_param_idx
)
5169 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5171 interp_param
= NULL
;
5173 attr_number
= lp_build_const_int32(gallivm
, input_index
);
5175 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5176 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5177 LLVMValueRef ij_out
[2];
5178 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5181 * take the I then J parameters, and the DDX/Y for it, and
5182 * calculate the IJ inputs for the interpolator.
5183 * temp1 = ddx * offset/sample.x + I;
5184 * interp_param.I = ddy * offset/sample.y + temp1;
5185 * temp1 = ddx * offset/sample.x + J;
5186 * interp_param.J = ddy * offset/sample.y + temp1;
5188 for (i
= 0; i
< 2; i
++) {
5189 LLVMValueRef ix_ll
= lp_build_const_int32(gallivm
, i
);
5190 LLVMValueRef iy_ll
= lp_build_const_int32(gallivm
, i
+ 2);
5191 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5192 ddxy_out
, ix_ll
, "");
5193 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5194 ddxy_out
, iy_ll
, "");
5195 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5196 interp_param
, ix_ll
, "");
5197 LLVMValueRef temp1
, temp2
;
5199 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5202 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5204 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5206 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5208 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5210 interp_param
= lp_build_gather_values(bld_base
->base
.gallivm
, ij_out
, 2);
5213 for (chan
= 0; chan
< 4; chan
++) {
5214 LLVMValueRef llvm_chan
;
5217 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5218 llvm_chan
= lp_build_const_int32(gallivm
, schan
);
5221 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
5222 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
5223 LLVMValueRef i
= LLVMBuildExtractElement(
5224 gallivm
->builder
, interp_param
, uint
->zero
, "");
5225 LLVMValueRef j
= LLVMBuildExtractElement(
5226 gallivm
->builder
, interp_param
, uint
->one
, "");
5227 emit_data
->output
[chan
] = build_fs_interp(bld_base
,
5228 llvm_chan
, attr_number
, params
,
5231 emit_data
->output
[chan
] = build_fs_interp_mov(bld_base
,
5232 lp_build_const_int32(gallivm
, 2), /* P0 */
5233 llvm_chan
, attr_number
, params
);
5238 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5239 struct lp_build_emit_data
*emit_data
)
5241 LLVMValueRef (*imms
)[4] = lp_soa_context(bld_base
)->immediates
;
5242 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5245 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5247 stream
= LLVMConstIntGetZExtValue(imms
[src0
.Index
][src0
.SwizzleX
]) & 0x3;
5251 /* Emit one vertex from the geometry shader */
5252 static void si_llvm_emit_vertex(
5253 const struct lp_build_tgsi_action
*action
,
5254 struct lp_build_tgsi_context
*bld_base
,
5255 struct lp_build_emit_data
*emit_data
)
5257 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5258 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5259 struct si_shader
*shader
= ctx
->shader
;
5260 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5261 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5262 struct lp_build_if_state if_state
;
5263 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5264 SI_PARAM_GS2VS_OFFSET
);
5265 LLVMValueRef gs_next_vertex
;
5266 LLVMValueRef can_emit
, kill
;
5267 LLVMValueRef args
[2];
5272 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5274 /* Write vertex attribute values to GSVS ring */
5275 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5276 ctx
->gs_next_vertex
[stream
],
5279 /* If this thread has already emitted the declared maximum number of
5280 * vertices, skip the write: excessive vertex emissions are not
5281 * supposed to have any effect.
5283 * If the shader has no writes to memory, kill it instead. This skips
5284 * further memory loads and may allow LLVM to skip to the end
5287 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
5288 lp_build_const_int32(gallivm
,
5289 shader
->selector
->gs_max_out_vertices
), "");
5291 bool use_kill
= !info
->writes_memory
;
5293 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5294 lp_build_const_float(gallivm
, 1.0f
),
5295 lp_build_const_float(gallivm
, -1.0f
));
5297 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
5298 ctx
->voidt
, &kill
, 1, 0);
5300 lp_build_if(&if_state
, gallivm
, can_emit
);
5303 for (i
= 0; i
< info
->num_outputs
; i
++) {
5304 LLVMValueRef
*out_ptr
=
5305 ctx
->soa
.outputs
[i
];
5307 for (chan
= 0; chan
< 4; chan
++) {
5308 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5309 LLVMValueRef voffset
=
5310 lp_build_const_int32(gallivm
, (i
* 4 + chan
) *
5311 shader
->selector
->gs_max_out_vertices
);
5313 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5314 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5316 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5318 build_tbuffer_store(ctx
,
5319 ctx
->gsvs_ring
[stream
],
5321 voffset
, soffset
, 0,
5322 V_008F0C_BUF_DATA_FORMAT_32
,
5323 V_008F0C_BUF_NUM_FORMAT_UINT
,
5328 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5329 lp_build_const_int32(gallivm
, 1));
5331 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5333 /* Signal vertex emission */
5334 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (stream
<< 8));
5335 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5336 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5337 ctx
->voidt
, args
, 2, 0);
5340 lp_build_endif(&if_state
);
5343 /* Cut one primitive from the geometry shader */
5344 static void si_llvm_emit_primitive(
5345 const struct lp_build_tgsi_action
*action
,
5346 struct lp_build_tgsi_context
*bld_base
,
5347 struct lp_build_emit_data
*emit_data
)
5349 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5350 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5351 LLVMValueRef args
[2];
5354 /* Signal primitive cut */
5355 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5356 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (stream
<< 8));
5357 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5358 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5359 ctx
->voidt
, args
, 2, 0);
5362 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5363 struct lp_build_tgsi_context
*bld_base
,
5364 struct lp_build_emit_data
*emit_data
)
5366 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5367 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5369 /* The real barrier instruction isn’t needed, because an entire patch
5370 * always fits into a single wave.
5372 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5373 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
5377 lp_build_intrinsic(gallivm
->builder
,
5378 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5379 : "llvm.AMDGPU.barrier.local",
5380 ctx
->voidt
, NULL
, 0, 0);
5383 static const struct lp_build_tgsi_action tex_action
= {
5384 .fetch_args
= tex_fetch_args
,
5385 .emit
= build_tex_intrinsic
,
5388 static const struct lp_build_tgsi_action interp_action
= {
5389 .fetch_args
= interp_fetch_args
,
5390 .emit
= build_interp_intrinsic
,
5393 static void si_create_function(struct si_shader_context
*ctx
,
5395 LLVMTypeRef
*returns
, unsigned num_returns
,
5396 LLVMTypeRef
*params
, unsigned num_params
,
5401 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5402 params
, num_params
);
5403 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5404 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5406 for (i
= 0; i
<= last_sgpr
; ++i
) {
5407 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5409 /* The combination of:
5413 * allows the optimization passes to move loads and reduces
5414 * SGPR spilling significantly.
5416 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5417 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5418 lp_add_attr_dereferenceable(P
, UINT64_MAX
);
5420 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5423 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5424 /* These were copied from some LLVM test. */
5425 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5426 "less-precise-fpmad",
5428 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5431 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5434 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5440 static void create_meta_data(struct si_shader_context
*ctx
)
5442 struct gallivm_state
*gallivm
= ctx
->soa
.bld_base
.base
.gallivm
;
5444 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5445 "invariant.load", 14);
5446 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5448 ctx
->uniform_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5449 "amdgpu.uniform", 14);
5451 ctx
->empty_md
= LLVMMDNodeInContext(gallivm
->context
, NULL
, 0);
5454 static void declare_streamout_params(struct si_shader_context
*ctx
,
5455 struct pipe_stream_output_info
*so
,
5456 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5457 unsigned *num_params
)
5461 /* Streamout SGPRs. */
5462 if (so
->num_outputs
) {
5463 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5464 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5466 ctx
->param_streamout_config
= ctx
->param_tess_offchip
;
5468 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5470 /* A streamout buffer offset is loaded if the stride is non-zero. */
5471 for (i
= 0; i
< 4; i
++) {
5475 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5479 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5481 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5484 case LLVMIntegerTypeKind
:
5485 return LLVMGetIntTypeWidth(type
) / 8;
5486 case LLVMFloatTypeKind
:
5488 case LLVMPointerTypeKind
:
5490 case LLVMVectorTypeKind
:
5491 return LLVMGetVectorSize(type
) *
5492 llvm_get_type_size(LLVMGetElementType(type
));
5493 case LLVMArrayTypeKind
:
5494 return LLVMGetArrayLength(type
) *
5495 llvm_get_type_size(LLVMGetElementType(type
));
5502 static void declare_tess_lds(struct si_shader_context
*ctx
)
5504 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5505 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5506 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5508 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5509 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, uint
->zero
,
5510 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5514 static unsigned si_get_max_workgroup_size(struct si_shader
*shader
)
5516 const unsigned *properties
= shader
->selector
->info
.properties
;
5517 unsigned max_work_group_size
=
5518 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5519 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5520 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5522 if (!max_work_group_size
) {
5523 /* This is a variable group size compute shader,
5524 * compile it for the maximum possible group size.
5526 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5528 return max_work_group_size
;
5531 static void create_function(struct si_shader_context
*ctx
)
5533 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
5534 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5535 struct si_shader
*shader
= ctx
->shader
;
5536 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_NUM_VERTEX_BUFFERS
], v3i32
;
5537 LLVMTypeRef returns
[16+32*4];
5538 unsigned i
, last_sgpr
, num_params
, num_return_sgprs
;
5539 unsigned num_returns
= 0;
5540 unsigned num_prolog_vgprs
= 0;
5542 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5544 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5545 params
[SI_PARAM_CONST_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5546 params
[SI_PARAM_SAMPLERS
] = const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5547 params
[SI_PARAM_IMAGES
] = const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5548 params
[SI_PARAM_SHADER_BUFFERS
] = const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5550 switch (ctx
->type
) {
5551 case PIPE_SHADER_VERTEX
:
5552 params
[SI_PARAM_VERTEX_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_VERTEX_BUFFERS
);
5553 params
[SI_PARAM_BASE_VERTEX
] = ctx
->i32
;
5554 params
[SI_PARAM_START_INSTANCE
] = ctx
->i32
;
5555 params
[SI_PARAM_DRAWID
] = ctx
->i32
;
5556 num_params
= SI_PARAM_DRAWID
+1;
5558 if (shader
->key
.as_es
) {
5559 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5560 } else if (shader
->key
.as_ls
) {
5561 params
[SI_PARAM_LS_OUT_LAYOUT
] = ctx
->i32
;
5562 num_params
= SI_PARAM_LS_OUT_LAYOUT
+1;
5564 if (shader
->is_gs_copy_shader
) {
5565 num_params
= SI_PARAM_RW_BUFFERS
+1;
5567 params
[SI_PARAM_VS_STATE_BITS
] = ctx
->i32
;
5568 num_params
= SI_PARAM_VS_STATE_BITS
+1;
5571 /* The locations of the other parameters are assigned dynamically. */
5572 declare_streamout_params(ctx
, &shader
->selector
->so
,
5573 params
, ctx
->i32
, &num_params
);
5576 last_sgpr
= num_params
-1;
5579 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5580 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5581 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5582 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5584 if (!shader
->is_gs_copy_shader
) {
5585 /* Vertex load indices. */
5586 ctx
->param_vertex_index0
= num_params
;
5588 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5589 params
[num_params
++] = ctx
->i32
;
5591 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5593 /* PrimitiveID output. */
5594 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5595 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5596 returns
[num_returns
++] = ctx
->f32
;
5600 case PIPE_SHADER_TESS_CTRL
:
5601 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5602 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
5603 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
5604 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
5605 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
5606 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
5607 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
5610 params
[SI_PARAM_PATCH_ID
] = ctx
->i32
;
5611 params
[SI_PARAM_REL_IDS
] = ctx
->i32
;
5612 num_params
= SI_PARAM_REL_IDS
+1;
5614 /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are
5615 * placed after the user SGPRs.
5617 for (i
= 0; i
< SI_TCS_NUM_USER_SGPR
+ 2; i
++)
5618 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5620 for (i
= 0; i
< 3; i
++)
5621 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5624 case PIPE_SHADER_TESS_EVAL
:
5625 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5626 num_params
= SI_PARAM_TCS_OFFCHIP_LAYOUT
+1;
5628 if (shader
->key
.as_es
) {
5629 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5630 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5631 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5633 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5634 declare_streamout_params(ctx
, &shader
->selector
->so
,
5635 params
, ctx
->i32
, &num_params
);
5636 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5638 last_sgpr
= num_params
- 1;
5641 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5642 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5643 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5644 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5646 /* PrimitiveID output. */
5647 if (!shader
->key
.as_es
)
5648 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5649 returns
[num_returns
++] = ctx
->f32
;
5652 case PIPE_SHADER_GEOMETRY
:
5653 params
[SI_PARAM_GS2VS_OFFSET
] = ctx
->i32
;
5654 params
[SI_PARAM_GS_WAVE_ID
] = ctx
->i32
;
5655 last_sgpr
= SI_PARAM_GS_WAVE_ID
;
5658 params
[SI_PARAM_VTX0_OFFSET
] = ctx
->i32
;
5659 params
[SI_PARAM_VTX1_OFFSET
] = ctx
->i32
;
5660 params
[SI_PARAM_PRIMITIVE_ID
] = ctx
->i32
;
5661 params
[SI_PARAM_VTX2_OFFSET
] = ctx
->i32
;
5662 params
[SI_PARAM_VTX3_OFFSET
] = ctx
->i32
;
5663 params
[SI_PARAM_VTX4_OFFSET
] = ctx
->i32
;
5664 params
[SI_PARAM_VTX5_OFFSET
] = ctx
->i32
;
5665 params
[SI_PARAM_GS_INSTANCE_ID
] = ctx
->i32
;
5666 num_params
= SI_PARAM_GS_INSTANCE_ID
+1;
5669 case PIPE_SHADER_FRAGMENT
:
5670 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5671 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5672 last_sgpr
= SI_PARAM_PRIM_MASK
;
5673 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5674 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5675 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5676 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5677 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5678 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5679 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5680 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5681 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5682 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5683 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5684 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5685 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5686 shader
->info
.face_vgpr_index
= 20;
5687 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5688 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5689 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5690 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5692 /* Color inputs from the prolog. */
5693 if (shader
->selector
->info
.colors_read
) {
5694 unsigned num_color_elements
=
5695 util_bitcount(shader
->selector
->info
.colors_read
);
5697 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5698 for (i
= 0; i
< num_color_elements
; i
++)
5699 params
[num_params
++] = ctx
->f32
;
5701 num_prolog_vgprs
+= num_color_elements
;
5704 /* Outputs for the epilog. */
5705 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5708 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5709 shader
->selector
->info
.writes_z
+
5710 shader
->selector
->info
.writes_stencil
+
5711 shader
->selector
->info
.writes_samplemask
+
5712 1 /* SampleMaskIn */;
5714 num_returns
= MAX2(num_returns
,
5716 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5718 for (i
= 0; i
< num_return_sgprs
; i
++)
5719 returns
[i
] = ctx
->i32
;
5720 for (; i
< num_returns
; i
++)
5721 returns
[i
] = ctx
->f32
;
5724 case PIPE_SHADER_COMPUTE
:
5725 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5726 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5727 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5728 last_sgpr
= SI_PARAM_BLOCK_ID
;
5730 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5731 num_params
= SI_PARAM_THREAD_ID
+ 1;
5734 assert(0 && "unimplemented shader");
5738 assert(num_params
<= ARRAY_SIZE(params
));
5740 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5741 num_params
, last_sgpr
);
5743 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5744 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5745 ctx
->separate_prolog
) {
5746 si_llvm_add_attribute(ctx
->main_fn
,
5747 "InitialPSInputAddr",
5748 S_0286D0_PERSP_SAMPLE_ENA(1) |
5749 S_0286D0_PERSP_CENTER_ENA(1) |
5750 S_0286D0_PERSP_CENTROID_ENA(1) |
5751 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5752 S_0286D0_LINEAR_CENTER_ENA(1) |
5753 S_0286D0_LINEAR_CENTROID_ENA(1) |
5754 S_0286D0_FRONT_FACE_ENA(1) |
5755 S_0286D0_POS_FIXED_PT_ENA(1));
5756 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5757 si_llvm_add_attribute(ctx
->main_fn
,
5758 "amdgpu-max-work-group-size",
5759 si_get_max_workgroup_size(shader
));
5762 shader
->info
.num_input_sgprs
= 0;
5763 shader
->info
.num_input_vgprs
= 0;
5765 for (i
= 0; i
<= last_sgpr
; ++i
)
5766 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5768 for (; i
< num_params
; ++i
)
5769 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5771 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5772 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5774 if (!ctx
->screen
->has_ds_bpermute
&&
5776 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5777 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5778 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5779 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5780 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5781 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5783 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5784 LLVMArrayType(ctx
->i32
, 64),
5788 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5789 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5790 ctx
->type
== PIPE_SHADER_TESS_EVAL
)
5791 declare_tess_lds(ctx
);
5795 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5798 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5800 struct gallivm_state
*gallivm
=
5801 ctx
->soa
.bld_base
.base
.gallivm
;
5803 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5804 SI_PARAM_RW_BUFFERS
);
5806 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5807 ctx
->shader
->key
.as_es
) ||
5808 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5809 ctx
->shader
->key
.as_es
) ||
5810 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5812 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5814 LLVMValueRef offset
= lp_build_const_int32(gallivm
, ring
);
5817 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5820 if (ctx
->shader
->is_gs_copy_shader
) {
5821 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_VS_RING_GSVS
);
5824 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5826 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5828 for (i
= 0; i
< 4; i
++) {
5829 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_GS_RING_GSVS0
+ i
);
5832 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5837 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5838 LLVMValueRef param_rw_buffers
,
5839 unsigned param_pos_fixed_pt
)
5841 struct lp_build_tgsi_context
*bld_base
=
5843 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5844 LLVMBuilderRef builder
= gallivm
->builder
;
5845 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5847 /* Use the fixed-point gl_FragCoord input.
5848 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5849 * per coordinate to get the repeating effect.
5851 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5852 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5854 /* Load the buffer descriptor. */
5855 slot
= lp_build_const_int32(gallivm
, SI_PS_CONST_POLY_STIPPLE
);
5856 desc
= build_indexed_load_const(ctx
, param_rw_buffers
, slot
);
5858 /* The stipple pattern is 32x32, each row has 32 bits. */
5859 offset
= LLVMBuildMul(builder
, address
[1],
5860 LLVMConstInt(ctx
->i32
, 4, 0), "");
5861 row
= buffer_load_const(ctx
, desc
, offset
);
5862 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
5863 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5864 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5866 /* The intrinsic kills the thread if arg < 0. */
5867 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
5868 LLVMConstReal(ctx
->f32
, -1), "");
5869 lp_build_intrinsic(builder
, "llvm.AMDGPU.kill", ctx
->voidt
, &bit
, 1, 0);
5872 void si_shader_binary_read_config(struct radeon_shader_binary
*binary
,
5873 struct si_shader_config
*conf
,
5874 unsigned symbol_offset
)
5877 const unsigned char *config
=
5878 radeon_shader_binary_config_start(binary
, symbol_offset
);
5879 bool really_needs_scratch
= false;
5881 /* LLVM adds SGPR spills to the scratch size.
5882 * Find out if we really need the scratch buffer.
5884 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5885 const struct radeon_shader_reloc
*reloc
= &binary
->relocs
[i
];
5887 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5888 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5889 really_needs_scratch
= true;
5894 /* XXX: We may be able to emit some of these values directly rather than
5895 * extracting fields to be emitted later.
5898 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5899 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5900 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5902 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5903 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5904 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5905 case R_00B848_COMPUTE_PGM_RSRC1
:
5906 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5907 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5908 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5909 conf
->rsrc1
= value
;
5911 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5912 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5914 case R_00B84C_COMPUTE_PGM_RSRC2
:
5915 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5916 conf
->rsrc2
= value
;
5918 case R_0286CC_SPI_PS_INPUT_ENA
:
5919 conf
->spi_ps_input_ena
= value
;
5921 case R_0286D0_SPI_PS_INPUT_ADDR
:
5922 conf
->spi_ps_input_addr
= value
;
5924 case R_0286E8_SPI_TMPRING_SIZE
:
5925 case R_00B860_COMPUTE_TMPRING_SIZE
:
5926 /* WAVESIZE is in units of 256 dwords. */
5927 if (really_needs_scratch
)
5928 conf
->scratch_bytes_per_wave
=
5929 G_00B860_WAVESIZE(value
) * 256 * 4;
5931 case 0x4: /* SPILLED_SGPRS */
5932 conf
->spilled_sgprs
= value
;
5934 case 0x8: /* SPILLED_VGPRS */
5935 conf
->spilled_vgprs
= value
;
5939 static bool printed
;
5942 fprintf(stderr
, "Warning: LLVM emitted unknown "
5943 "config register: 0x%x\n", reg
);
5951 if (!conf
->spi_ps_input_addr
)
5952 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5955 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
5956 struct si_shader
*shader
,
5957 struct si_shader_config
*config
,
5958 uint64_t scratch_va
)
5961 uint32_t scratch_rsrc_dword0
= scratch_va
;
5962 uint32_t scratch_rsrc_dword1
=
5963 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5965 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
5968 if (HAVE_LLVM
>= 0x0309)
5969 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5971 scratch_rsrc_dword1
|=
5972 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
5974 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5975 const struct radeon_shader_reloc
*reloc
=
5976 &shader
->binary
.relocs
[i
];
5977 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5978 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5979 &scratch_rsrc_dword0
, 4);
5980 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5981 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5982 &scratch_rsrc_dword1
, 4);
5987 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
5989 unsigned size
= shader
->binary
.code_size
;
5992 size
+= shader
->prolog
->binary
.code_size
;
5994 size
+= shader
->epilog
->binary
.code_size
;
5998 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
6000 const struct radeon_shader_binary
*prolog
=
6001 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
6002 const struct radeon_shader_binary
*epilog
=
6003 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
6004 const struct radeon_shader_binary
*mainb
= &shader
->binary
;
6005 unsigned bo_size
= si_get_shader_binary_size(shader
) +
6006 (!epilog
? mainb
->rodata_size
: 0);
6009 assert(!prolog
|| !prolog
->rodata_size
);
6010 assert((!prolog
&& !epilog
) || !mainb
->rodata_size
);
6011 assert(!epilog
|| !epilog
->rodata_size
);
6013 r600_resource_reference(&shader
->bo
, NULL
);
6014 shader
->bo
= (struct r600_resource
*)
6015 pipe_buffer_create(&sscreen
->b
.b
, 0,
6016 PIPE_USAGE_IMMUTABLE
, bo_size
);
6021 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
6022 PIPE_TRANSFER_READ_WRITE
);
6025 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
6026 ptr
+= prolog
->code_size
;
6029 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
6030 ptr
+= mainb
->code_size
;
6033 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
6034 else if (mainb
->rodata_size
> 0)
6035 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
6037 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
6041 static void si_shader_dump_disassembly(const struct radeon_shader_binary
*binary
,
6042 struct pipe_debug_callback
*debug
,
6043 const char *name
, FILE *file
)
6048 if (binary
->disasm_string
) {
6049 fprintf(file
, "Shader %s disassembly:\n", name
);
6050 fprintf(file
, "%s", binary
->disasm_string
);
6052 if (debug
&& debug
->debug_message
) {
6053 /* Very long debug messages are cut off, so send the
6054 * disassembly one line at a time. This causes more
6055 * overhead, but on the plus side it simplifies
6056 * parsing of resulting logs.
6058 pipe_debug_message(debug
, SHADER_INFO
,
6059 "Shader Disassembly Begin");
6061 line
= binary
->disasm_string
;
6063 p
= util_strchrnul(line
, '\n');
6067 pipe_debug_message(debug
, SHADER_INFO
,
6068 "%.*s", count
, line
);
6076 pipe_debug_message(debug
, SHADER_INFO
,
6077 "Shader Disassembly End");
6080 fprintf(file
, "Shader %s binary:\n", name
);
6081 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
6082 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
6083 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
6084 binary
->code
[i
+ 1], binary
->code
[i
]);
6089 static void si_shader_dump_stats(struct si_screen
*sscreen
,
6090 struct si_shader
*shader
,
6091 struct pipe_debug_callback
*debug
,
6095 struct si_shader_config
*conf
= &shader
->config
;
6096 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
6097 unsigned code_size
= si_get_shader_binary_size(shader
);
6098 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
6099 unsigned lds_per_wave
= 0;
6100 unsigned max_simd_waves
= 10;
6102 /* Compute LDS usage for PS. */
6103 switch (processor
) {
6104 case PIPE_SHADER_FRAGMENT
:
6105 /* The minimum usage per wave is (num_inputs * 48). The maximum
6106 * usage is (num_inputs * 48 * 16).
6107 * We can get anything in between and it varies between waves.
6109 * The 48 bytes per input for a single primitive is equal to
6110 * 4 bytes/component * 4 components/input * 3 points.
6112 * Other stages don't know the size at compile time or don't
6113 * allocate LDS per wave, but instead they do it per thread group.
6115 lds_per_wave
= conf
->lds_size
* lds_increment
+
6116 align(num_inputs
* 48, lds_increment
);
6118 case PIPE_SHADER_COMPUTE
:
6119 if (shader
->selector
) {
6120 unsigned max_workgroup_size
=
6121 si_get_max_workgroup_size(shader
);
6122 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
6123 DIV_ROUND_UP(max_workgroup_size
, 64);
6128 /* Compute the per-SIMD wave counts. */
6129 if (conf
->num_sgprs
) {
6130 if (sscreen
->b
.chip_class
>= VI
)
6131 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
6133 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
6136 if (conf
->num_vgprs
)
6137 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
6139 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
6140 * 16KB makes some SIMDs unoccupied). */
6142 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
6144 if (file
!= stderr
||
6145 r600_can_dump_shader(&sscreen
->b
, processor
)) {
6146 if (processor
== PIPE_SHADER_FRAGMENT
) {
6147 fprintf(file
, "*** SHADER CONFIG ***\n"
6148 "SPI_PS_INPUT_ADDR = 0x%04x\n"
6149 "SPI_PS_INPUT_ENA = 0x%04x\n",
6150 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
6153 fprintf(file
, "*** SHADER STATS ***\n"
6156 "Spilled SGPRs: %d\n"
6157 "Spilled VGPRs: %d\n"
6158 "Private memory VGPRs: %d\n"
6159 "Code Size: %d bytes\n"
6161 "Scratch: %d bytes per wave\n"
6163 "********************\n\n\n",
6164 conf
->num_sgprs
, conf
->num_vgprs
,
6165 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
6166 conf
->private_mem_vgprs
, code_size
,
6167 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6171 pipe_debug_message(debug
, SHADER_INFO
,
6172 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6173 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6174 "Spilled VGPRs: %d PrivMem VGPRs: %d",
6175 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6176 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6177 max_simd_waves
, conf
->spilled_sgprs
,
6178 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
6181 static const char *si_get_shader_name(struct si_shader
*shader
,
6184 switch (processor
) {
6185 case PIPE_SHADER_VERTEX
:
6186 if (shader
->key
.as_es
)
6187 return "Vertex Shader as ES";
6188 else if (shader
->key
.as_ls
)
6189 return "Vertex Shader as LS";
6191 return "Vertex Shader as VS";
6192 case PIPE_SHADER_TESS_CTRL
:
6193 return "Tessellation Control Shader";
6194 case PIPE_SHADER_TESS_EVAL
:
6195 if (shader
->key
.as_es
)
6196 return "Tessellation Evaluation Shader as ES";
6198 return "Tessellation Evaluation Shader as VS";
6199 case PIPE_SHADER_GEOMETRY
:
6200 if (shader
->is_gs_copy_shader
)
6201 return "GS Copy Shader as VS";
6203 return "Geometry Shader";
6204 case PIPE_SHADER_FRAGMENT
:
6205 return "Pixel Shader";
6206 case PIPE_SHADER_COMPUTE
:
6207 return "Compute Shader";
6209 return "Unknown Shader";
6213 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6214 struct pipe_debug_callback
*debug
, unsigned processor
,
6217 if (file
!= stderr
||
6218 r600_can_dump_shader(&sscreen
->b
, processor
))
6219 si_dump_shader_key(processor
, &shader
->key
, file
);
6221 if (file
!= stderr
&& shader
->binary
.llvm_ir_string
) {
6222 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6223 si_get_shader_name(shader
, processor
));
6224 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6227 if (file
!= stderr
||
6228 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6229 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6230 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6233 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6234 debug
, "prolog", file
);
6236 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6239 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6240 debug
, "epilog", file
);
6241 fprintf(file
, "\n");
6244 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
);
6247 int si_compile_llvm(struct si_screen
*sscreen
,
6248 struct radeon_shader_binary
*binary
,
6249 struct si_shader_config
*conf
,
6250 LLVMTargetMachineRef tm
,
6252 struct pipe_debug_callback
*debug
,
6257 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6259 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6260 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6262 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6263 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6264 LLVMDumpModule(mod
);
6265 fprintf(stderr
, "\n");
6269 if (sscreen
->record_llvm_ir
) {
6270 char *ir
= LLVMPrintModuleToString(mod
);
6271 binary
->llvm_ir_string
= strdup(ir
);
6272 LLVMDisposeMessage(ir
);
6275 if (!si_replace_shader(count
, binary
)) {
6276 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6281 si_shader_binary_read_config(binary
, conf
, 0);
6283 /* Enable 64-bit and 16-bit denormals, because there is no performance
6286 * If denormals are enabled, all floating-point output modifiers are
6289 * Don't enable denormals for 32-bit floats, because:
6290 * - Floating-point output modifiers would be ignored by the hw.
6291 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6292 * have to stop using those.
6293 * - SI & CI would be very slow.
6295 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6297 FREE(binary
->config
);
6298 FREE(binary
->global_symbol_offsets
);
6299 binary
->config
= NULL
;
6300 binary
->global_symbol_offsets
= NULL
;
6302 /* Some shaders can't have rodata because their binaries can be
6305 if (binary
->rodata_size
&&
6306 (processor
== PIPE_SHADER_VERTEX
||
6307 processor
== PIPE_SHADER_TESS_CTRL
||
6308 processor
== PIPE_SHADER_TESS_EVAL
||
6309 processor
== PIPE_SHADER_FRAGMENT
)) {
6310 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6317 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6319 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6320 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6322 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6325 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6327 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6328 LLVMTargetMachineRef tm
,
6329 struct si_shader_selector
*gs_selector
,
6330 struct pipe_debug_callback
*debug
)
6332 struct si_shader_context ctx
;
6333 struct si_shader
*shader
;
6334 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6335 struct lp_build_tgsi_context
*bld_base
= &ctx
.soa
.bld_base
;
6336 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6337 struct si_shader_output_values
*outputs
;
6338 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6339 LLVMValueRef args
[9];
6342 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6347 shader
= CALLOC_STRUCT(si_shader
);
6354 shader
->selector
= gs_selector
;
6355 shader
->is_gs_copy_shader
= true;
6357 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
6358 ctx
.type
= PIPE_SHADER_VERTEX
;
6360 create_meta_data(&ctx
);
6361 create_function(&ctx
);
6362 preload_ring_buffers(&ctx
);
6364 args
[0] = ctx
.gsvs_ring
[0];
6365 args
[1] = lp_build_mul_imm(uint
,
6366 LLVMGetParam(ctx
.main_fn
,
6367 ctx
.param_vertex_id
),
6369 args
[3] = uint
->zero
;
6370 args
[4] = uint
->one
; /* OFFEN */
6371 args
[5] = uint
->zero
; /* IDXEN */
6372 args
[6] = uint
->one
; /* GLC */
6373 args
[7] = uint
->one
; /* SLC */
6374 args
[8] = uint
->zero
; /* TFE */
6376 /* Fetch vertex data from GSVS ring */
6377 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6380 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
6381 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
6383 for (chan
= 0; chan
< 4; chan
++) {
6384 outputs
[i
].vertex_stream
[chan
] =
6385 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
6387 args
[2] = lp_build_const_int32(gallivm
,
6389 gs_selector
->gs_max_out_vertices
* 16 * 4);
6391 outputs
[i
].values
[chan
] =
6392 LLVMBuildBitCast(gallivm
->builder
,
6393 lp_build_intrinsic(gallivm
->builder
,
6394 "llvm.SI.buffer.load.dword.i32.i32",
6396 LP_FUNC_ATTR_READONLY
),
6401 if (gs_selector
->so
.num_outputs
)
6402 si_llvm_emit_streamout(&ctx
, outputs
, gsinfo
->num_outputs
);
6403 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6405 LLVMBuildRetVoid(gallivm
->builder
);
6407 /* Dump LLVM IR before any optimization passes */
6408 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6409 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6410 LLVMDumpModule(bld_base
->base
.gallivm
->module
);
6412 si_llvm_finalize_module(&ctx
,
6413 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6415 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6416 &ctx
.shader
->config
, ctx
.tm
,
6417 bld_base
->base
.gallivm
->module
,
6418 debug
, PIPE_SHADER_GEOMETRY
,
6421 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6422 fprintf(stderr
, "GS Copy Shader:\n");
6423 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6424 PIPE_SHADER_GEOMETRY
, stderr
);
6425 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6428 si_llvm_dispose(&ctx
);
6439 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
6444 fprintf(f
, "SHADER KEY\n");
6447 case PIPE_SHADER_VERTEX
:
6448 fprintf(f
, " part.vs.prolog.instance_divisors = {");
6449 for (i
= 0; i
< ARRAY_SIZE(key
->part
.vs
.prolog
.instance_divisors
); i
++)
6450 fprintf(f
, !i
? "%u" : ", %u",
6451 key
->part
.vs
.prolog
.instance_divisors
[i
]);
6453 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n", key
->part
.vs
.epilog
.export_prim_id
);
6454 fprintf(f
, " as_es = %u\n", key
->as_es
);
6455 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6456 fprintf(f
, " mono.vs.fix_fetch = 0x%x\n", key
->mono
.vs
.fix_fetch
);
6459 case PIPE_SHADER_TESS_CTRL
:
6460 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6461 fprintf(f
, " mono.tcs.inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.tcs
.inputs_to_copy
);
6464 case PIPE_SHADER_TESS_EVAL
:
6465 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6466 fprintf(f
, " as_es = %u\n", key
->as_es
);
6469 case PIPE_SHADER_GEOMETRY
:
6470 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6473 case PIPE_SHADER_COMPUTE
:
6476 case PIPE_SHADER_FRAGMENT
:
6477 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6478 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6479 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6480 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6481 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6482 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6483 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6484 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6485 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6486 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6487 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6488 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6489 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6490 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6491 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6492 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6499 if ((shader
== PIPE_SHADER_GEOMETRY
||
6500 shader
== PIPE_SHADER_TESS_EVAL
||
6501 shader
== PIPE_SHADER_VERTEX
) &&
6502 !key
->as_es
&& !key
->as_ls
) {
6503 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6504 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6505 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6509 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6510 struct si_screen
*sscreen
,
6511 struct si_shader
*shader
,
6512 LLVMTargetMachineRef tm
)
6514 struct lp_build_tgsi_context
*bld_base
;
6515 struct lp_build_tgsi_action tmpl
= {};
6517 si_llvm_context_init(ctx
, sscreen
, shader
, tm
,
6518 (shader
&& shader
->selector
) ? &shader
->selector
->info
: NULL
,
6519 (shader
&& shader
->selector
) ? shader
->selector
->tokens
: NULL
);
6521 bld_base
= &ctx
->soa
.bld_base
;
6522 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6524 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6525 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6526 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6528 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6529 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6530 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6531 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6532 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6533 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6534 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6535 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6536 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6537 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6538 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6539 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6540 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6541 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6543 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6544 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6545 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6546 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6547 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6548 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6550 tmpl
.fetch_args
= atomic_fetch_args
;
6551 tmpl
.emit
= atomic_emit
;
6552 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6553 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6554 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6555 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6556 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6557 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6558 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6559 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6560 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6561 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6562 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6563 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6564 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6565 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6566 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6567 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6568 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6569 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6570 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6571 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6573 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6575 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6576 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6577 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6578 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6580 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6581 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6582 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6585 /* Return true if the PARAM export has been eliminated. */
6586 static bool si_eliminate_const_output(struct si_shader_context
*ctx
,
6587 LLVMValueRef inst
, unsigned offset
)
6589 struct si_shader
*shader
= ctx
->shader
;
6590 unsigned num_outputs
= shader
->selector
->info
.num_outputs
;
6591 unsigned i
, default_val
; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
6592 bool is_zero
[4] = {}, is_one
[4] = {};
6594 for (i
= 0; i
< 4; i
++) {
6595 LLVMBool loses_info
;
6596 LLVMValueRef p
= LLVMGetOperand(inst
, 5 + i
);
6598 /* It's a constant expression. Undef outputs are eliminated too. */
6599 if (LLVMIsUndef(p
)) {
6602 } else if (LLVMIsAConstantFP(p
)) {
6603 double a
= LLVMConstRealGetDouble(p
, &loses_info
);
6610 return false; /* other constant */
6615 /* Only certain combinations of 0 and 1 can be eliminated. */
6616 if (is_zero
[0] && is_zero
[1] && is_zero
[2])
6617 default_val
= is_zero
[3] ? 0 : 1;
6618 else if (is_one
[0] && is_one
[1] && is_one
[2])
6619 default_val
= is_zero
[3] ? 2 : 3;
6623 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
6624 LLVMInstructionEraseFromParent(inst
);
6626 /* Change OFFSET to DEFAULT_VAL. */
6627 for (i
= 0; i
< num_outputs
; i
++) {
6628 if (shader
->info
.vs_output_param_offset
[i
] == offset
) {
6629 shader
->info
.vs_output_param_offset
[i
] =
6630 EXP_PARAM_DEFAULT_VAL_0000
+ default_val
;
6637 struct si_vs_exports
{
6639 unsigned offset
[SI_MAX_VS_OUTPUTS
];
6640 LLVMValueRef inst
[SI_MAX_VS_OUTPUTS
];
6643 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6645 struct si_shader
*shader
= ctx
->shader
;
6646 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6647 LLVMBasicBlockRef bb
;
6648 struct si_vs_exports exports
;
6649 bool removed_any
= false;
6653 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6654 ctx
->type
== PIPE_SHADER_COMPUTE
||
6655 shader
->key
.as_es
||
6659 /* Process all LLVM instructions. */
6660 bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6662 LLVMValueRef inst
= LLVMGetFirstInstruction(bb
);
6665 LLVMValueRef cur
= inst
;
6666 inst
= LLVMGetNextInstruction(inst
);
6668 if (LLVMGetInstructionOpcode(cur
) != LLVMCall
)
6671 LLVMValueRef callee
= lp_get_called_value(cur
);
6673 if (!lp_is_function(callee
))
6676 const char *name
= LLVMGetValueName(callee
);
6677 unsigned num_args
= LLVMCountParams(callee
);
6679 /* Check if this is an export instruction. */
6680 if (num_args
!= 9 || strcmp(name
, "llvm.SI.export"))
6683 LLVMValueRef arg
= LLVMGetOperand(cur
, 3);
6684 unsigned target
= LLVMConstIntGetZExtValue(arg
);
6686 if (target
< V_008DFC_SQ_EXP_PARAM
)
6689 target
-= V_008DFC_SQ_EXP_PARAM
;
6691 /* Eliminate constant value PARAM exports. */
6692 if (si_eliminate_const_output(ctx
, cur
, target
)) {
6695 exports
.offset
[exports
.num
] = target
;
6696 exports
.inst
[exports
.num
] = cur
;
6700 bb
= LLVMGetNextBasicBlock(bb
);
6703 /* Remove holes in export memory due to removed PARAM exports.
6704 * This is done by renumbering all PARAM exports.
6707 ubyte current_offset
[SI_MAX_VS_OUTPUTS
];
6708 unsigned new_count
= 0;
6711 /* Make a copy of the offsets. We need the old version while
6712 * we are modifying some of them. */
6713 assert(sizeof(current_offset
) ==
6714 sizeof(shader
->info
.vs_output_param_offset
));
6715 memcpy(current_offset
, shader
->info
.vs_output_param_offset
,
6716 sizeof(current_offset
));
6718 for (i
= 0; i
< exports
.num
; i
++) {
6719 unsigned offset
= exports
.offset
[i
];
6721 for (out
= 0; out
< info
->num_outputs
; out
++) {
6722 if (current_offset
[out
] != offset
)
6725 LLVMSetOperand(exports
.inst
[i
], 3,
6726 LLVMConstInt(ctx
->i32
,
6727 V_008DFC_SQ_EXP_PARAM
+ new_count
, 0));
6728 shader
->info
.vs_output_param_offset
[out
] = new_count
;
6733 shader
->info
.nr_param_exports
= new_count
;
6737 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
6739 ctx
->shader
->config
.private_mem_vgprs
= 0;
6741 /* Process all LLVM instructions. */
6742 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6744 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
6747 LLVMValueRef inst
= next
;
6748 next
= LLVMGetNextInstruction(next
);
6750 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
6753 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
6754 /* No idea why LLVM aligns allocas to 4 elements. */
6755 unsigned alignment
= LLVMGetAlignment(inst
);
6756 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
6757 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
6759 bb
= LLVMGetNextBasicBlock(bb
);
6763 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6764 struct si_shader
*shader
)
6766 struct si_shader_selector
*sel
= shader
->selector
;
6767 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
6769 switch (ctx
->type
) {
6770 case PIPE_SHADER_VERTEX
:
6771 ctx
->load_input
= declare_input_vs
;
6772 if (shader
->key
.as_ls
)
6773 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6774 else if (shader
->key
.as_es
)
6775 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6777 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6779 case PIPE_SHADER_TESS_CTRL
:
6780 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6781 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6782 bld_base
->emit_store
= store_output_tcs
;
6783 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
6785 case PIPE_SHADER_TESS_EVAL
:
6786 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6787 if (shader
->key
.as_es
)
6788 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6790 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6792 case PIPE_SHADER_GEOMETRY
:
6793 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6794 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
6796 case PIPE_SHADER_FRAGMENT
:
6797 ctx
->load_input
= declare_input_fs
;
6798 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
6800 case PIPE_SHADER_COMPUTE
:
6801 ctx
->declare_memory_region
= declare_compute_memory
;
6804 assert(!"Unsupported shader type");
6808 create_meta_data(ctx
);
6809 create_function(ctx
);
6810 preload_ring_buffers(ctx
);
6812 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6814 for (i
= 0; i
< 4; i
++) {
6815 ctx
->gs_next_vertex
[i
] =
6816 lp_build_alloca(bld_base
->base
.gallivm
,
6821 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6822 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6826 si_llvm_build_ret(ctx
, ctx
->return_value
);
6831 * Compute the VS prolog key, which contains all the information needed to
6832 * build the VS prolog function, and set shader->info bits where needed.
6834 static void si_get_vs_prolog_key(struct si_shader
*shader
,
6835 union si_shader_part_key
*key
)
6837 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6839 memset(key
, 0, sizeof(*key
));
6840 key
->vs_prolog
.states
= shader
->key
.part
.vs
.prolog
;
6841 key
->vs_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6842 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6844 /* Set the instanceID flag. */
6845 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
6846 if (key
->vs_prolog
.states
.instance_divisors
[i
])
6847 shader
->info
.uses_instanceid
= true;
6851 * Compute the VS epilog key, which contains all the information needed to
6852 * build the VS epilog function, and set the PrimitiveID output offset.
6854 static void si_get_vs_epilog_key(struct si_shader
*shader
,
6855 struct si_vs_epilog_bits
*states
,
6856 union si_shader_part_key
*key
)
6858 memset(key
, 0, sizeof(*key
));
6859 key
->vs_epilog
.states
= *states
;
6861 /* Set up the PrimitiveID output. */
6862 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
6863 unsigned index
= shader
->selector
->info
.num_outputs
;
6864 unsigned offset
= shader
->info
.nr_param_exports
++;
6866 key
->vs_epilog
.prim_id_param_offset
= offset
;
6867 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
6868 shader
->info
.vs_output_param_offset
[index
] = offset
;
6873 * Compute the PS prolog key, which contains all the information needed to
6874 * build the PS prolog function, and set related bits in shader->config.
6876 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6877 union si_shader_part_key
*key
,
6878 bool separate_prolog
)
6880 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6882 memset(key
, 0, sizeof(*key
));
6883 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6884 key
->ps_prolog
.colors_read
= info
->colors_read
;
6885 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6886 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6887 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6888 (key
->ps_prolog
.colors_read
||
6889 key
->ps_prolog
.states
.force_persp_sample_interp
||
6890 key
->ps_prolog
.states
.force_linear_sample_interp
||
6891 key
->ps_prolog
.states
.force_persp_center_interp
||
6892 key
->ps_prolog
.states
.force_linear_center_interp
||
6893 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6894 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6896 if (info
->colors_read
) {
6897 unsigned *color
= shader
->selector
->color_attr_index
;
6899 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6900 /* BCOLORs are stored after the last input. */
6901 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6902 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6903 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6906 for (unsigned i
= 0; i
< 2; i
++) {
6907 unsigned interp
= info
->input_interpolate
[color
[i
]];
6908 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6910 if (!(info
->colors_read
& (0xf << i
*4)))
6913 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6915 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6916 interp
== TGSI_INTERPOLATE_COLOR
)
6917 interp
= TGSI_INTERPOLATE_CONSTANT
;
6920 case TGSI_INTERPOLATE_CONSTANT
:
6921 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6923 case TGSI_INTERPOLATE_PERSPECTIVE
:
6924 case TGSI_INTERPOLATE_COLOR
:
6925 /* Force the interpolation location for colors here. */
6926 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6927 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6928 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6929 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6932 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6933 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6934 shader
->config
.spi_ps_input_ena
|=
6935 S_0286CC_PERSP_SAMPLE_ENA(1);
6937 case TGSI_INTERPOLATE_LOC_CENTER
:
6938 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6939 shader
->config
.spi_ps_input_ena
|=
6940 S_0286CC_PERSP_CENTER_ENA(1);
6942 case TGSI_INTERPOLATE_LOC_CENTROID
:
6943 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6944 shader
->config
.spi_ps_input_ena
|=
6945 S_0286CC_PERSP_CENTROID_ENA(1);
6951 case TGSI_INTERPOLATE_LINEAR
:
6952 /* Force the interpolation location for colors here. */
6953 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6954 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6955 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6956 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6958 /* The VGPR assignment for non-monolithic shaders
6959 * works because InitialPSInputAddr is set on the
6960 * main shader and PERSP_PULL_MODEL is never used.
6963 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6964 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6965 separate_prolog
? 6 : 9;
6966 shader
->config
.spi_ps_input_ena
|=
6967 S_0286CC_LINEAR_SAMPLE_ENA(1);
6969 case TGSI_INTERPOLATE_LOC_CENTER
:
6970 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6971 separate_prolog
? 8 : 11;
6972 shader
->config
.spi_ps_input_ena
|=
6973 S_0286CC_LINEAR_CENTER_ENA(1);
6975 case TGSI_INTERPOLATE_LOC_CENTROID
:
6976 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6977 separate_prolog
? 10 : 13;
6978 shader
->config
.spi_ps_input_ena
|=
6979 S_0286CC_LINEAR_CENTROID_ENA(1);
6993 * Check whether a PS prolog is required based on the key.
6995 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6997 return key
->ps_prolog
.colors_read
||
6998 key
->ps_prolog
.states
.force_persp_sample_interp
||
6999 key
->ps_prolog
.states
.force_linear_sample_interp
||
7000 key
->ps_prolog
.states
.force_persp_center_interp
||
7001 key
->ps_prolog
.states
.force_linear_center_interp
||
7002 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7003 key
->ps_prolog
.states
.bc_optimize_for_linear
||
7004 key
->ps_prolog
.states
.poly_stipple
;
7008 * Compute the PS epilog key, which contains all the information needed to
7009 * build the PS epilog function.
7011 static void si_get_ps_epilog_key(struct si_shader
*shader
,
7012 union si_shader_part_key
*key
)
7014 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7015 memset(key
, 0, sizeof(*key
));
7016 key
->ps_epilog
.colors_written
= info
->colors_written
;
7017 key
->ps_epilog
.writes_z
= info
->writes_z
;
7018 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
7019 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
7020 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
7024 * Build the GS prolog function. Rotate the input vertices for triangle strips
7027 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
7028 union si_shader_part_key
*key
)
7030 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
7031 const unsigned num_vgprs
= 8;
7032 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7033 LLVMBuilderRef builder
= gallivm
->builder
;
7034 LLVMTypeRef params
[32];
7035 LLVMTypeRef returns
[32];
7036 LLVMValueRef func
, ret
;
7038 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
7039 params
[i
] = ctx
->i32
;
7040 returns
[i
] = ctx
->i32
;
7043 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
7044 params
[num_sgprs
+ i
] = ctx
->i32
;
7045 returns
[num_sgprs
+ i
] = ctx
->f32
;
7048 /* Create the function. */
7049 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
7050 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
7051 func
= ctx
->main_fn
;
7053 /* Copy inputs to outputs. This should be no-op, as the registers match,
7054 * but it will prevent the compiler from overwriting them unintentionally.
7056 ret
= ctx
->return_value
;
7057 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
7058 LLVMValueRef p
= LLVMGetParam(func
, i
);
7059 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
7061 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
7062 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
7063 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
7064 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
7067 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
7068 /* Remap the input vertices for every other primitive. */
7069 const unsigned vtx_params
[6] = {
7077 LLVMValueRef prim_id
, rotate
;
7079 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
7080 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
7082 for (unsigned i
= 0; i
< 6; ++i
) {
7083 LLVMValueRef base
, rotated
, actual
;
7084 base
= LLVMGetParam(func
, vtx_params
[i
]);
7085 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
7086 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
7087 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
7088 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
7092 LLVMBuildRet(builder
, ret
);
7096 * Given a list of shader part functions, build a wrapper function that
7097 * runs them in sequence to form a monolithic shader.
7099 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
7100 LLVMValueRef
*parts
,
7104 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7105 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
7106 /* PS epilog has one arg per color component */
7107 LLVMTypeRef param_types
[48];
7108 LLVMValueRef out
[48];
7109 LLVMTypeRef function_type
;
7110 unsigned num_params
;
7112 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
7113 unsigned num_sgprs
, num_vgprs
;
7114 unsigned last_sgpr_param
;
7117 for (unsigned i
= 0; i
< num_parts
; ++i
) {
7118 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
7119 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
7122 /* The parameters of the wrapper function correspond to those of the
7123 * first part in terms of SGPRs and VGPRs, but we use the types of the
7124 * main part to get the right types. This is relevant for the
7125 * dereferenceable attribute on descriptor table pointers.
7130 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
7131 num_params
= LLVMCountParamTypes(function_type
);
7133 for (unsigned i
= 0; i
< num_params
; ++i
) {
7134 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
7136 if (ac_is_sgpr_param(param
)) {
7137 assert(num_vgprs
== 0);
7138 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7140 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7143 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
7146 last_sgpr_param
= 0;
7148 while (gprs
< num_sgprs
+ num_vgprs
) {
7149 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
7152 param_types
[num_params
] = LLVMTypeOf(param
);
7153 if (gprs
< num_sgprs
)
7154 last_sgpr_param
= num_params
;
7155 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
7158 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
7159 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
7160 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
7165 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
7167 /* Record the arguments of the function as if they were an output of
7173 for (unsigned i
= 0; i
< num_params
; ++i
) {
7174 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
7175 LLVMTypeRef param_type
= LLVMTypeOf(param
);
7176 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
7177 unsigned size
= llvm_get_type_size(param_type
) / 4;
7180 if (param_type
!= out_type
)
7181 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
7182 out
[num_out
++] = param
;
7184 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
7186 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7187 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
7188 param_type
= ctx
->i64
;
7191 if (param_type
!= vector_type
)
7192 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7194 for (unsigned j
= 0; j
< size
; ++j
)
7195 out
[num_out
++] = LLVMBuildExtractElement(
7196 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7199 if (i
<= last_sgpr_param
)
7200 num_out_sgpr
= num_out
;
7203 /* Now chain the parts. */
7204 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7205 LLVMValueRef in
[48];
7207 LLVMTypeRef ret_type
;
7208 unsigned out_idx
= 0;
7210 num_params
= LLVMCountParams(parts
[part
]);
7211 assert(num_params
<= ARRAY_SIZE(param_types
));
7213 /* Derive arguments for the next part from outputs of the
7216 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7218 LLVMTypeRef param_type
;
7220 unsigned param_size
;
7221 LLVMValueRef arg
= NULL
;
7223 param
= LLVMGetParam(parts
[part
], param_idx
);
7224 param_type
= LLVMTypeOf(param
);
7225 param_size
= llvm_get_type_size(param_type
) / 4;
7226 is_sgpr
= ac_is_sgpr_param(param
);
7229 #if HAVE_LLVM < 0x0400
7230 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7232 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7233 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7235 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7238 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7239 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7241 if (param_size
== 1)
7244 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7246 if (LLVMTypeOf(arg
) != param_type
) {
7247 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7248 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7249 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7251 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7255 in
[param_idx
] = arg
;
7256 out_idx
+= param_size
;
7259 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7260 ret_type
= LLVMTypeOf(ret
);
7262 /* Extract the returned GPRs. */
7266 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7267 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7269 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7271 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7273 LLVMBuildExtractValue(builder
, ret
, i
, "");
7275 out
[num_out
++] = val
;
7277 if (LLVMTypeOf(val
) == ctx
->i32
) {
7278 assert(num_out_sgpr
+ 1 == num_out
);
7279 num_out_sgpr
= num_out
;
7285 LLVMBuildRetVoid(builder
);
7288 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7289 LLVMTargetMachineRef tm
,
7290 struct si_shader
*shader
,
7292 struct pipe_debug_callback
*debug
)
7294 struct si_shader_selector
*sel
= shader
->selector
;
7295 struct si_shader_context ctx
;
7296 struct lp_build_tgsi_context
*bld_base
;
7300 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7301 * conversion fails. */
7302 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7303 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7304 tgsi_dump(sel
->tokens
, 0);
7305 si_dump_streamout(&sel
->so
);
7308 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
7309 ctx
.separate_prolog
= !is_monolithic
;
7311 memset(shader
->info
.vs_output_param_offset
, EXP_PARAM_UNDEFINED
,
7312 sizeof(shader
->info
.vs_output_param_offset
));
7314 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7316 bld_base
= &ctx
.soa
.bld_base
;
7317 ctx
.load_system_value
= declare_system_value
;
7319 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7320 si_llvm_dispose(&ctx
);
7324 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7325 LLVMValueRef parts
[3];
7329 need_prolog
= sel
->info
.num_inputs
;
7330 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7332 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7335 union si_shader_part_key prolog_key
;
7336 si_get_vs_prolog_key(shader
, &prolog_key
);
7337 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7338 parts
[0] = ctx
.main_fn
;
7342 union si_shader_part_key epilog_key
;
7343 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7344 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7345 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7348 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7349 need_prolog
? 1 : 0);
7350 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7351 LLVMValueRef parts
[2];
7352 union si_shader_part_key epilog_key
;
7354 parts
[0] = ctx
.main_fn
;
7356 memset(&epilog_key
, 0, sizeof(epilog_key
));
7357 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7358 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7359 parts
[1] = ctx
.main_fn
;
7361 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7362 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7363 !shader
->key
.as_es
) {
7364 LLVMValueRef parts
[2];
7365 union si_shader_part_key epilog_key
;
7367 parts
[0] = ctx
.main_fn
;
7369 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7370 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7371 parts
[1] = ctx
.main_fn
;
7373 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7374 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7375 LLVMValueRef parts
[2];
7376 union si_shader_part_key prolog_key
;
7378 parts
[1] = ctx
.main_fn
;
7380 memset(&prolog_key
, 0, sizeof(prolog_key
));
7381 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7382 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7383 parts
[0] = ctx
.main_fn
;
7385 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7386 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7387 LLVMValueRef parts
[3];
7388 union si_shader_part_key prolog_key
;
7389 union si_shader_part_key epilog_key
;
7392 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7393 need_prolog
= si_need_ps_prolog(&prolog_key
);
7395 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7398 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7399 parts
[0] = ctx
.main_fn
;
7402 si_get_ps_epilog_key(shader
, &epilog_key
);
7403 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7404 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7406 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7409 mod
= bld_base
->base
.gallivm
->module
;
7411 /* Dump LLVM IR before any optimization passes */
7412 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7413 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7414 LLVMDumpModule(mod
);
7416 si_llvm_finalize_module(&ctx
,
7417 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7419 /* Post-optimization transformations and analysis. */
7420 si_eliminate_const_vs_outputs(&ctx
);
7422 if ((debug
&& debug
->debug_message
) ||
7423 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7424 si_count_scratch_private_memory(&ctx
);
7426 /* Compile to bytecode. */
7427 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7428 mod
, debug
, ctx
.type
, "TGSI shader");
7429 si_llvm_dispose(&ctx
);
7431 fprintf(stderr
, "LLVM failed to compile shader\n");
7435 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7436 * LLVM 3.9svn has this bug.
7438 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7439 unsigned wave_size
= 64;
7440 unsigned max_vgprs
= 256;
7441 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7442 unsigned max_sgprs_per_wave
= 128;
7443 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7444 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7445 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7447 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7448 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7450 if (shader
->config
.num_sgprs
> max_sgprs
||
7451 shader
->config
.num_vgprs
> max_vgprs
) {
7452 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7453 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7454 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7455 max_sgprs
, max_vgprs
);
7457 /* Just terminate the process, because dependent
7458 * shaders can hang due to bad input data, but use
7459 * the env var to allow shader-db to work.
7461 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7466 /* Add the scratch offset to input SGPRs. */
7467 if (shader
->config
.scratch_bytes_per_wave
)
7468 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7470 /* Calculate the number of fragment input VGPRs. */
7471 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7472 shader
->info
.num_input_vgprs
= 0;
7473 shader
->info
.face_vgpr_index
= -1;
7475 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7476 shader
->info
.num_input_vgprs
+= 2;
7477 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7478 shader
->info
.num_input_vgprs
+= 2;
7479 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7480 shader
->info
.num_input_vgprs
+= 2;
7481 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7482 shader
->info
.num_input_vgprs
+= 3;
7483 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7484 shader
->info
.num_input_vgprs
+= 2;
7485 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7486 shader
->info
.num_input_vgprs
+= 2;
7487 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7488 shader
->info
.num_input_vgprs
+= 2;
7489 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7490 shader
->info
.num_input_vgprs
+= 1;
7491 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7492 shader
->info
.num_input_vgprs
+= 1;
7493 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7494 shader
->info
.num_input_vgprs
+= 1;
7495 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7496 shader
->info
.num_input_vgprs
+= 1;
7497 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7498 shader
->info
.num_input_vgprs
+= 1;
7499 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7500 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7501 shader
->info
.num_input_vgprs
+= 1;
7503 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7504 shader
->info
.num_input_vgprs
+= 1;
7505 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7506 shader
->info
.num_input_vgprs
+= 1;
7507 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7508 shader
->info
.num_input_vgprs
+= 1;
7515 * Create, compile and return a shader part (prolog or epilog).
7517 * \param sscreen screen
7518 * \param list list of shader parts of the same category
7519 * \param type shader type
7520 * \param key shader part key
7521 * \param prolog whether the part being requested is a prolog
7522 * \param tm LLVM target machine
7523 * \param debug debug callback
7524 * \param build the callback responsible for building the main function
7525 * \return non-NULL on success
7527 static struct si_shader_part
*
7528 si_get_shader_part(struct si_screen
*sscreen
,
7529 struct si_shader_part
**list
,
7530 enum pipe_shader_type type
,
7532 union si_shader_part_key
*key
,
7533 LLVMTargetMachineRef tm
,
7534 struct pipe_debug_callback
*debug
,
7535 void (*build
)(struct si_shader_context
*,
7536 union si_shader_part_key
*),
7539 struct si_shader_part
*result
;
7541 pipe_mutex_lock(sscreen
->shader_parts_mutex
);
7543 /* Find existing. */
7544 for (result
= *list
; result
; result
= result
->next
) {
7545 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7546 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7551 /* Compile a new one. */
7552 result
= CALLOC_STRUCT(si_shader_part
);
7555 struct si_shader shader
= {};
7556 struct si_shader_context ctx
;
7557 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7559 si_init_shader_ctx(&ctx
, sscreen
, &shader
, tm
);
7563 case PIPE_SHADER_VERTEX
:
7565 case PIPE_SHADER_TESS_CTRL
:
7567 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7569 case PIPE_SHADER_GEOMETRY
:
7572 case PIPE_SHADER_FRAGMENT
:
7574 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7576 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7579 unreachable("bad shader part");
7585 si_llvm_finalize_module(&ctx
,
7586 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7588 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7589 gallivm
->module
, debug
, ctx
.type
, name
)) {
7595 result
->next
= *list
;
7599 si_llvm_dispose(&ctx
);
7600 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7605 * Build the vertex shader prolog function.
7607 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7608 * All inputs are returned unmodified. The vertex load indices are
7609 * stored after them, which will be used by the API VS for fetching inputs.
7611 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7616 * (VertexID + BaseVertex),
7617 * (InstanceID + StartInstance),
7618 * (InstanceID / 2 + StartInstance)
7620 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7621 union si_shader_part_key
*key
)
7623 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7624 LLVMTypeRef
*params
, *returns
;
7625 LLVMValueRef ret
, func
;
7626 int last_sgpr
, num_params
, num_returns
, i
;
7628 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7629 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7631 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7632 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7633 sizeof(LLVMTypeRef
));
7634 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7635 key
->vs_prolog
.last_input
+ 1) *
7636 sizeof(LLVMTypeRef
));
7640 /* Declare input and output SGPRs. */
7642 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7643 params
[num_params
++] = ctx
->i32
;
7644 returns
[num_returns
++] = ctx
->i32
;
7646 last_sgpr
= num_params
- 1;
7648 /* 4 preloaded VGPRs (outputs must be floats) */
7649 for (i
= 0; i
< 4; i
++) {
7650 params
[num_params
++] = ctx
->i32
;
7651 returns
[num_returns
++] = ctx
->f32
;
7654 /* Vertex load indices. */
7655 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7656 returns
[num_returns
++] = ctx
->f32
;
7658 /* Create the function. */
7659 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7660 num_params
, last_sgpr
);
7661 func
= ctx
->main_fn
;
7663 /* Copy inputs to outputs. This should be no-op, as the registers match,
7664 * but it will prevent the compiler from overwriting them unintentionally.
7666 ret
= ctx
->return_value
;
7667 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7668 LLVMValueRef p
= LLVMGetParam(func
, i
);
7669 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7671 for (i
= num_params
- 4; i
< num_params
; i
++) {
7672 LLVMValueRef p
= LLVMGetParam(func
, i
);
7673 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7674 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7677 /* Compute vertex load indices from instance divisors. */
7678 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7679 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7683 /* InstanceID / Divisor + StartInstance */
7684 index
= get_instance_index_for_fetch(ctx
,
7685 SI_SGPR_START_INSTANCE
,
7688 /* VertexID + BaseVertex */
7689 index
= LLVMBuildAdd(gallivm
->builder
,
7690 LLVMGetParam(func
, ctx
->param_vertex_id
),
7691 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7694 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7695 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7699 si_llvm_build_ret(ctx
, ret
);
7703 * Build the vertex shader epilog function. This is also used by the tessellation
7704 * evaluation shader compiled as VS.
7706 * The input is PrimitiveID.
7708 * If PrimitiveID is required by the pixel shader, export it.
7709 * Otherwise, do nothing.
7711 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7712 union si_shader_part_key
*key
)
7714 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7715 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7716 LLVMTypeRef params
[5];
7719 /* Declare input VGPRs. */
7720 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7721 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7722 assert(num_params
<= ARRAY_SIZE(params
));
7724 for (i
= 0; i
< num_params
; i
++)
7725 params
[i
] = ctx
->f32
;
7727 /* Create the function. */
7728 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7731 if (key
->vs_epilog
.states
.export_prim_id
) {
7732 struct lp_build_context
*base
= &bld_base
->base
;
7733 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
7734 LLVMValueRef args
[9];
7736 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
7737 args
[1] = uint
->zero
; /* whether the EXEC mask is valid */
7738 args
[2] = uint
->zero
; /* DONE bit */
7739 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_PARAM
+
7740 key
->vs_epilog
.prim_id_param_offset
);
7741 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
7742 args
[5] = LLVMGetParam(ctx
->main_fn
,
7743 VS_EPILOG_PRIMID_LOC
); /* X */
7744 args
[6] = base
->undef
; /* Y */
7745 args
[7] = base
->undef
; /* Z */
7746 args
[8] = base
->undef
; /* W */
7748 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
7749 LLVMVoidTypeInContext(base
->gallivm
->context
),
7753 LLVMBuildRetVoid(gallivm
->builder
);
7757 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7759 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7760 LLVMTargetMachineRef tm
,
7761 struct si_shader
*shader
,
7762 struct pipe_debug_callback
*debug
,
7763 struct si_vs_epilog_bits
*states
)
7765 union si_shader_part_key epilog_key
;
7767 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7769 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7770 PIPE_SHADER_VERTEX
, true,
7771 &epilog_key
, tm
, debug
,
7772 si_build_vs_epilog_function
,
7773 "Vertex Shader Epilog");
7774 return shader
->epilog
!= NULL
;
7778 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7780 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7781 LLVMTargetMachineRef tm
,
7782 struct si_shader
*shader
,
7783 struct pipe_debug_callback
*debug
)
7785 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7786 union si_shader_part_key prolog_key
;
7788 /* Get the prolog. */
7789 si_get_vs_prolog_key(shader
, &prolog_key
);
7791 /* The prolog is a no-op if there are no inputs. */
7792 if (info
->num_inputs
) {
7794 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7795 PIPE_SHADER_VERTEX
, true,
7796 &prolog_key
, tm
, debug
,
7797 si_build_vs_prolog_function
,
7798 "Vertex Shader Prolog");
7799 if (!shader
->prolog
)
7803 /* Get the epilog. */
7804 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
7805 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7806 &shader
->key
.part
.vs
.epilog
))
7813 * Select and compile (or reuse) TES parts (epilog).
7815 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
7816 LLVMTargetMachineRef tm
,
7817 struct si_shader
*shader
,
7818 struct pipe_debug_callback
*debug
)
7820 if (shader
->key
.as_es
)
7823 /* TES compiled as VS. */
7824 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7825 &shader
->key
.part
.tes
.epilog
);
7829 * Compile the TCS epilog function. This writes tesselation factors to memory
7830 * based on the output primitive type of the tesselator (determined by TES).
7832 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7833 union si_shader_part_key
*key
)
7835 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7836 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
7837 LLVMTypeRef params
[16];
7839 int last_sgpr
, num_params
;
7841 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
7842 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
7843 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
7844 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
7845 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
7846 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
7847 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
7848 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
7849 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
7850 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
7851 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
7852 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
7853 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
7854 num_params
= last_sgpr
+ 1;
7856 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
7857 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
7858 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
7860 /* Create the function. */
7861 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
7862 declare_tess_lds(ctx
);
7863 func
= ctx
->main_fn
;
7865 si_write_tess_factors(bld_base
,
7866 LLVMGetParam(func
, last_sgpr
+ 1),
7867 LLVMGetParam(func
, last_sgpr
+ 2),
7868 LLVMGetParam(func
, last_sgpr
+ 3));
7870 LLVMBuildRetVoid(gallivm
->builder
);
7874 * Select and compile (or reuse) TCS parts (epilog).
7876 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7877 LLVMTargetMachineRef tm
,
7878 struct si_shader
*shader
,
7879 struct pipe_debug_callback
*debug
)
7881 union si_shader_part_key epilog_key
;
7883 /* Get the epilog. */
7884 memset(&epilog_key
, 0, sizeof(epilog_key
));
7885 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7887 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7888 PIPE_SHADER_TESS_CTRL
, false,
7889 &epilog_key
, tm
, debug
,
7890 si_build_tcs_epilog_function
,
7891 "Tessellation Control Shader Epilog");
7892 return shader
->epilog
!= NULL
;
7896 * Select and compile (or reuse) GS parts (prolog).
7898 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7899 LLVMTargetMachineRef tm
,
7900 struct si_shader
*shader
,
7901 struct pipe_debug_callback
*debug
)
7903 union si_shader_part_key prolog_key
;
7905 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7908 memset(&prolog_key
, 0, sizeof(prolog_key
));
7909 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7911 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7912 PIPE_SHADER_GEOMETRY
, true,
7913 &prolog_key
, tm
, debug
,
7914 si_build_gs_prolog_function
,
7915 "Geometry Shader Prolog");
7916 return shader
->prolog
!= NULL
;
7920 * Build the pixel shader prolog function. This handles:
7921 * - two-side color selection and interpolation
7922 * - overriding interpolation parameters for the API PS
7923 * - polygon stippling
7925 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7926 * overriden by other states. (e.g. per-sample interpolation)
7927 * Interpolated colors are stored after the preloaded VGPRs.
7929 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7930 union si_shader_part_key
*key
)
7932 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7933 LLVMTypeRef
*params
;
7934 LLVMValueRef ret
, func
;
7935 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
7937 assert(si_need_ps_prolog(key
));
7939 /* Number of inputs + 8 color elements. */
7940 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
7941 key
->ps_prolog
.num_input_vgprs
+ 8) *
7942 sizeof(LLVMTypeRef
));
7944 /* Declare inputs. */
7946 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7947 params
[num_params
++] = ctx
->i32
;
7948 last_sgpr
= num_params
- 1;
7950 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7951 params
[num_params
++] = ctx
->f32
;
7953 /* Declare outputs (same as inputs + add colors if needed) */
7954 num_returns
= num_params
;
7955 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7956 for (i
= 0; i
< num_color_channels
; i
++)
7957 params
[num_returns
++] = ctx
->f32
;
7959 /* Create the function. */
7960 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
7961 num_params
, last_sgpr
);
7962 func
= ctx
->main_fn
;
7964 /* Copy inputs to outputs. This should be no-op, as the registers match,
7965 * but it will prevent the compiler from overwriting them unintentionally.
7967 ret
= ctx
->return_value
;
7968 for (i
= 0; i
< num_params
; i
++) {
7969 LLVMValueRef p
= LLVMGetParam(func
, i
);
7970 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7973 /* Polygon stippling. */
7974 if (key
->ps_prolog
.states
.poly_stipple
) {
7975 /* POS_FIXED_PT is always last. */
7976 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7977 key
->ps_prolog
.num_input_vgprs
- 1;
7978 LLVMValueRef ptr
[2], list
;
7980 /* Get the pointer to rw buffers. */
7981 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
7982 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
7983 list
= lp_build_gather_values(gallivm
, ptr
, 2);
7984 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
7985 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
7986 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
7988 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7991 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7992 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7993 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7994 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7996 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7997 * The hw doesn't compute CENTROID if the whole wave only
7998 * contains fully-covered quads.
8000 * PRIM_MASK is after user SGPRs.
8002 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8003 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
8004 LLVMConstInt(ctx
->i32
, 31, 0), "");
8005 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
8008 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
8009 /* Read PERSP_CENTER. */
8010 for (i
= 0; i
< 2; i
++)
8011 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8012 /* Read PERSP_CENTROID. */
8013 for (i
= 0; i
< 2; i
++)
8014 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
8015 /* Select PERSP_CENTROID. */
8016 for (i
= 0; i
< 2; i
++) {
8017 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8018 center
[i
], centroid
[i
], "");
8019 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8020 tmp
, base
+ 4 + i
, "");
8023 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8024 /* Read LINEAR_CENTER. */
8025 for (i
= 0; i
< 2; i
++)
8026 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8027 /* Read LINEAR_CENTROID. */
8028 for (i
= 0; i
< 2; i
++)
8029 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
8030 /* Select LINEAR_CENTROID. */
8031 for (i
= 0; i
< 2; i
++) {
8032 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8033 center
[i
], centroid
[i
], "");
8034 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8035 tmp
, base
+ 10 + i
, "");
8040 /* Force per-sample interpolation. */
8041 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
8042 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8043 LLVMValueRef persp_sample
[2];
8045 /* Read PERSP_SAMPLE. */
8046 for (i
= 0; i
< 2; i
++)
8047 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
8048 /* Overwrite PERSP_CENTER. */
8049 for (i
= 0; i
< 2; i
++)
8050 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8051 persp_sample
[i
], base
+ 2 + i
, "");
8052 /* Overwrite PERSP_CENTROID. */
8053 for (i
= 0; i
< 2; i
++)
8054 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8055 persp_sample
[i
], base
+ 4 + i
, "");
8057 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
8058 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8059 LLVMValueRef linear_sample
[2];
8061 /* Read LINEAR_SAMPLE. */
8062 for (i
= 0; i
< 2; i
++)
8063 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
8064 /* Overwrite LINEAR_CENTER. */
8065 for (i
= 0; i
< 2; i
++)
8066 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8067 linear_sample
[i
], base
+ 8 + i
, "");
8068 /* Overwrite LINEAR_CENTROID. */
8069 for (i
= 0; i
< 2; i
++)
8070 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8071 linear_sample
[i
], base
+ 10 + i
, "");
8074 /* Force center interpolation. */
8075 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
8076 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8077 LLVMValueRef persp_center
[2];
8079 /* Read PERSP_CENTER. */
8080 for (i
= 0; i
< 2; i
++)
8081 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8082 /* Overwrite PERSP_SAMPLE. */
8083 for (i
= 0; i
< 2; i
++)
8084 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8085 persp_center
[i
], base
+ i
, "");
8086 /* Overwrite PERSP_CENTROID. */
8087 for (i
= 0; i
< 2; i
++)
8088 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8089 persp_center
[i
], base
+ 4 + i
, "");
8091 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
8092 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8093 LLVMValueRef linear_center
[2];
8095 /* Read LINEAR_CENTER. */
8096 for (i
= 0; i
< 2; i
++)
8097 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8098 /* Overwrite LINEAR_SAMPLE. */
8099 for (i
= 0; i
< 2; i
++)
8100 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8101 linear_center
[i
], base
+ 6 + i
, "");
8102 /* Overwrite LINEAR_CENTROID. */
8103 for (i
= 0; i
< 2; i
++)
8104 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8105 linear_center
[i
], base
+ 10 + i
, "");
8108 /* Interpolate colors. */
8109 for (i
= 0; i
< 2; i
++) {
8110 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
8111 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8112 key
->ps_prolog
.face_vgpr_index
;
8113 LLVMValueRef interp
[2], color
[4];
8114 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
8119 /* If the interpolation qualifier is not CONSTANT (-1). */
8120 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
8121 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8122 key
->ps_prolog
.color_interp_vgpr_index
[i
];
8124 /* Get the (i,j) updated by bc_optimize handling. */
8125 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8127 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8128 interp_vgpr
+ 1, "");
8129 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
8132 /* Use the absolute location of the input. */
8133 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8135 if (key
->ps_prolog
.states
.color_two_side
) {
8136 face
= LLVMGetParam(func
, face_vgpr
);
8137 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
8140 interp_fs_input(ctx
,
8141 key
->ps_prolog
.color_attr_index
[i
],
8142 TGSI_SEMANTIC_COLOR
, i
,
8143 key
->ps_prolog
.num_interp_inputs
,
8144 key
->ps_prolog
.colors_read
, interp_ij
,
8145 prim_mask
, face
, color
);
8148 unsigned chan
= u_bit_scan(&writemask
);
8149 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
8154 /* Tell LLVM to insert WQM instruction sequence when needed. */
8155 if (key
->ps_prolog
.wqm
) {
8156 LLVMAddTargetDependentFunctionAttr(func
,
8157 "amdgpu-ps-wqm-outputs", "");
8160 si_llvm_build_ret(ctx
, ret
);
8164 * Build the pixel shader epilog function. This handles everything that must be
8165 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8167 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8168 union si_shader_part_key
*key
)
8170 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8171 struct lp_build_tgsi_context
*bld_base
= &ctx
->soa
.bld_base
;
8172 LLVMTypeRef params
[16+8*4+3];
8173 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8174 int last_sgpr
, num_params
, i
;
8175 struct si_ps_exports exp
= {};
8177 /* Declare input SGPRs. */
8178 params
[SI_PARAM_RW_BUFFERS
] = ctx
->i64
;
8179 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8180 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8181 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8182 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8183 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8184 last_sgpr
= SI_PARAM_ALPHA_REF
;
8186 /* Declare input VGPRs. */
8187 num_params
= (last_sgpr
+ 1) +
8188 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8189 key
->ps_epilog
.writes_z
+
8190 key
->ps_epilog
.writes_stencil
+
8191 key
->ps_epilog
.writes_samplemask
;
8193 num_params
= MAX2(num_params
,
8194 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8196 assert(num_params
<= ARRAY_SIZE(params
));
8198 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8199 params
[i
] = ctx
->f32
;
8201 /* Create the function. */
8202 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8203 /* Disable elimination of unused inputs. */
8204 si_llvm_add_attribute(ctx
->main_fn
,
8205 "InitialPSInputAddr", 0xffffff);
8207 /* Process colors. */
8208 unsigned vgpr
= last_sgpr
+ 1;
8209 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8210 int last_color_export
= -1;
8212 /* Find the last color export. */
8213 if (!key
->ps_epilog
.writes_z
&&
8214 !key
->ps_epilog
.writes_stencil
&&
8215 !key
->ps_epilog
.writes_samplemask
) {
8216 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8218 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8219 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8220 /* Just set this if any of the colorbuffers are enabled. */
8222 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8223 last_color_export
= 0;
8225 for (i
= 0; i
< 8; i
++)
8226 if (colors_written
& (1 << i
) &&
8227 (spi_format
>> (i
* 4)) & 0xf)
8228 last_color_export
= i
;
8232 while (colors_written
) {
8233 LLVMValueRef color
[4];
8234 int mrt
= u_bit_scan(&colors_written
);
8236 for (i
= 0; i
< 4; i
++)
8237 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8239 si_export_mrt_color(bld_base
, color
, mrt
,
8241 mrt
== last_color_export
, &exp
);
8244 /* Process depth, stencil, samplemask. */
8245 if (key
->ps_epilog
.writes_z
)
8246 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8247 if (key
->ps_epilog
.writes_stencil
)
8248 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8249 if (key
->ps_epilog
.writes_samplemask
)
8250 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8252 if (depth
|| stencil
|| samplemask
)
8253 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8254 else if (last_color_export
== -1)
8255 si_export_null(bld_base
);
8258 si_emit_ps_exports(ctx
, &exp
);
8261 LLVMBuildRetVoid(gallivm
->builder
);
8265 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8267 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8268 LLVMTargetMachineRef tm
,
8269 struct si_shader
*shader
,
8270 struct pipe_debug_callback
*debug
)
8272 union si_shader_part_key prolog_key
;
8273 union si_shader_part_key epilog_key
;
8275 /* Get the prolog. */
8276 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8278 /* The prolog is a no-op if these aren't set. */
8279 if (si_need_ps_prolog(&prolog_key
)) {
8281 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8282 PIPE_SHADER_FRAGMENT
, true,
8283 &prolog_key
, tm
, debug
,
8284 si_build_ps_prolog_function
,
8285 "Fragment Shader Prolog");
8286 if (!shader
->prolog
)
8290 /* Get the epilog. */
8291 si_get_ps_epilog_key(shader
, &epilog_key
);
8294 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8295 PIPE_SHADER_FRAGMENT
, false,
8296 &epilog_key
, tm
, debug
,
8297 si_build_ps_epilog_function
,
8298 "Fragment Shader Epilog");
8299 if (!shader
->epilog
)
8302 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8303 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8304 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8305 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8308 /* Set up the enable bits for per-sample shading if needed. */
8309 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8310 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8311 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8312 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8313 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8314 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8316 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8317 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8318 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8319 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8320 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8321 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8323 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8324 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8325 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8326 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8327 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8328 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8330 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8331 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8332 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8333 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8334 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8335 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8338 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8339 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8340 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8341 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8342 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8345 /* At least one pair of interpolation weights must be enabled. */
8346 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8347 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8348 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8351 /* The sample mask input is always enabled, because the API shader always
8352 * passes it through to the epilog. Disable it here if it's unused.
8354 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8355 !shader
->selector
->info
.reads_samplemask
)
8356 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8361 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8364 /* SPI barrier management bug:
8365 * Make sure we have at least 4k of LDS in use to avoid the bug.
8366 * It applies to workgroup sizes of more than one wavefront.
8368 if (sscreen
->b
.family
== CHIP_BONAIRE
||
8369 sscreen
->b
.family
== CHIP_KABINI
||
8370 sscreen
->b
.family
== CHIP_MULLINS
)
8371 *lds_size
= MAX2(*lds_size
, 8);
8374 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8375 struct si_shader
*shader
)
8377 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8379 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8381 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8382 si_get_max_workgroup_size(shader
) > 64) {
8383 si_multiwave_lds_size_workaround(sscreen
,
8384 &shader
->config
.lds_size
);
8388 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8389 struct si_shader
*shader
,
8390 struct pipe_debug_callback
*debug
)
8392 struct si_shader_selector
*sel
= shader
->selector
;
8393 struct si_shader
*mainp
= sel
->main_shader_part
;
8396 /* LS, ES, VS are compiled on demand if the main part hasn't been
8397 * compiled for that stage.
8399 * Vertex shaders are compiled on demand when a vertex fetch
8400 * workaround must be applied.
8402 if (shader
->is_monolithic
) {
8403 /* Monolithic shader (compiled as a whole, has many variants,
8404 * may take a long time to compile).
8406 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8410 /* The shader consists of 2-3 parts:
8412 * - the middle part is the user shader, it has 1 variant only
8413 * and it was compiled during the creation of the shader
8415 * - the prolog part is inserted at the beginning
8416 * - the epilog part is inserted at the end
8418 * The prolog and epilog have many (but simple) variants.
8421 /* Copy the compiled TGSI shader data over. */
8422 shader
->is_binary_shared
= true;
8423 shader
->binary
= mainp
->binary
;
8424 shader
->config
= mainp
->config
;
8425 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8426 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8427 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8428 memcpy(shader
->info
.vs_output_param_offset
,
8429 mainp
->info
.vs_output_param_offset
,
8430 sizeof(mainp
->info
.vs_output_param_offset
));
8431 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8432 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8433 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8435 /* Select prologs and/or epilogs. */
8436 switch (sel
->type
) {
8437 case PIPE_SHADER_VERTEX
:
8438 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8441 case PIPE_SHADER_TESS_CTRL
:
8442 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8445 case PIPE_SHADER_TESS_EVAL
:
8446 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8449 case PIPE_SHADER_GEOMETRY
:
8450 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8453 case PIPE_SHADER_FRAGMENT
:
8454 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8457 /* Make sure we have at least as many VGPRs as there
8458 * are allocated inputs.
8460 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8461 shader
->info
.num_input_vgprs
);
8465 /* Update SGPR and VGPR counts. */
8466 if (shader
->prolog
) {
8467 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8468 shader
->prolog
->config
.num_sgprs
);
8469 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8470 shader
->prolog
->config
.num_vgprs
);
8472 if (shader
->epilog
) {
8473 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8474 shader
->epilog
->config
.num_sgprs
);
8475 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8476 shader
->epilog
->config
.num_vgprs
);
8480 si_fix_resource_usage(sscreen
, shader
);
8481 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8485 r
= si_shader_binary_upload(sscreen
, shader
);
8487 fprintf(stderr
, "LLVM failed to upload shader\n");
8494 void si_shader_destroy(struct si_shader
*shader
)
8496 if (shader
->scratch_bo
)
8497 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8499 r600_resource_reference(&shader
->bo
, NULL
);
8501 if (!shader
->is_binary_shared
)
8502 radeon_shader_binary_clean(&shader
->binary
);
8504 free(shader
->shader_log
);