2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "ac_shader_util.h"
41 #include "si_shader_internal.h"
45 #include "compiler/nir/nir.h"
47 static const char *scratch_rsrc_dword0_symbol
=
48 "SCRATCH_RSRC_DWORD0";
50 static const char *scratch_rsrc_dword1_symbol
=
51 "SCRATCH_RSRC_DWORD1";
53 struct si_shader_output_values
55 LLVMValueRef values
[4];
56 unsigned semantic_name
;
57 unsigned semantic_index
;
58 ubyte vertex_stream
[4];
62 * Used to collect types and other info about arguments of the LLVM function
63 * before the function is created.
65 struct si_function_info
{
66 LLVMTypeRef types
[100];
67 LLVMValueRef
*assign
[100];
68 unsigned num_sgpr_params
;
77 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
78 struct si_screen
*sscreen
,
79 LLVMTargetMachineRef tm
);
81 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
82 struct lp_build_tgsi_context
*bld_base
,
83 struct lp_build_emit_data
*emit_data
);
85 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
88 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
89 union si_shader_part_key
*key
);
90 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
91 union si_shader_part_key
*key
);
92 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
97 /* Ideally pass the sample mask input to the PS epilog as v14, which
98 * is its usual location, so that the shader doesn't have to add v_mov.
100 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
102 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
105 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
111 static bool is_merged_shader(struct si_shader
*shader
)
113 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
116 return shader
->key
.as_ls
||
118 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
119 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
122 static void si_init_function_info(struct si_function_info
*fninfo
)
124 fninfo
->num_params
= 0;
125 fninfo
->num_sgpr_params
= 0;
128 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
,
130 LLVMValueRef
*assign
)
132 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
134 unsigned idx
= fninfo
->num_params
++;
135 assert(idx
< ARRAY_SIZE(fninfo
->types
));
137 if (regfile
== ARG_SGPR
)
138 fninfo
->num_sgpr_params
= fninfo
->num_params
;
140 fninfo
->types
[idx
] = type
;
141 fninfo
->assign
[idx
] = assign
;
145 static unsigned add_arg(struct si_function_info
*fninfo
,
146 enum si_arg_regfile regfile
, LLVMTypeRef type
)
148 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
151 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
152 enum si_arg_regfile regfile
, LLVMTypeRef type
,
153 LLVMValueRef
*assign
, unsigned idx
)
155 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
156 assert(actual
== idx
);
159 static void add_arg_checked(struct si_function_info
*fninfo
,
160 enum si_arg_regfile regfile
, LLVMTypeRef type
,
163 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
167 * Returns a unique index for a per-patch semantic name and index. The index
168 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
171 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
173 switch (semantic_name
) {
174 case TGSI_SEMANTIC_TESSOUTER
:
176 case TGSI_SEMANTIC_TESSINNER
:
178 case TGSI_SEMANTIC_PATCH
:
183 assert(!"invalid semantic name");
189 * Returns a unique index for a semantic name and index. The index must be
190 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
193 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
195 switch (semantic_name
) {
196 case TGSI_SEMANTIC_POSITION
:
198 case TGSI_SEMANTIC_GENERIC
:
199 /* Since some shader stages use the the highest used IO index
200 * to determine the size to allocate for inputs/outputs
201 * (in LDS, tess and GS rings). GENERIC should be placed right
202 * after POSITION to make that size as small as possible.
204 if (index
< SI_MAX_IO_GENERIC
)
207 assert(!"invalid generic index");
209 case TGSI_SEMANTIC_PSIZE
:
210 return SI_MAX_IO_GENERIC
+ 1;
211 case TGSI_SEMANTIC_CLIPDIST
:
213 return SI_MAX_IO_GENERIC
+ 2 + index
;
214 case TGSI_SEMANTIC_FOG
:
215 return SI_MAX_IO_GENERIC
+ 4;
216 case TGSI_SEMANTIC_LAYER
:
217 return SI_MAX_IO_GENERIC
+ 5;
218 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
219 return SI_MAX_IO_GENERIC
+ 6;
220 case TGSI_SEMANTIC_PRIMID
:
221 return SI_MAX_IO_GENERIC
+ 7;
222 case TGSI_SEMANTIC_COLOR
: /* these alias */
223 case TGSI_SEMANTIC_BCOLOR
:
225 return SI_MAX_IO_GENERIC
+ 8 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
229 return SI_MAX_IO_GENERIC
+ 10 + index
;
231 assert(!"invalid semantic name");
237 * Get the value of a shader input parameter and extract a bitfield.
239 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
240 LLVMValueRef value
, unsigned rshift
,
243 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
244 value
= ac_to_integer(&ctx
->ac
, value
);
247 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
248 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
250 if (rshift
+ bitwidth
< 32) {
251 unsigned mask
= (1 << bitwidth
) - 1;
252 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
253 LLVMConstInt(ctx
->i32
, mask
, 0), "");
259 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
260 unsigned param
, unsigned rshift
,
263 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
265 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
268 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
271 case PIPE_SHADER_TESS_CTRL
:
272 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
274 case PIPE_SHADER_TESS_EVAL
:
275 return LLVMGetParam(ctx
->main_fn
,
276 ctx
->param_tes_rel_patch_id
);
284 /* Tessellation shaders pass outputs to the next shader using LDS.
286 * LS outputs = TCS inputs
287 * TCS outputs = TES inputs
290 * - TCS inputs for patch 0
291 * - TCS inputs for patch 1
292 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
294 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
295 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
296 * - TCS outputs for patch 1
297 * - Per-patch TCS outputs for patch 1
298 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
299 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
302 * All three shaders VS(LS), TCS, TES share the same LDS space.
306 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
308 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
311 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
313 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
315 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
316 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
318 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
321 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
323 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
325 return LLVMConstInt(ctx
->i32
, stride
, 0);
328 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
330 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
331 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
333 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
334 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
335 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
336 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
337 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
338 num_patch_outputs
* 4;
339 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
343 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
345 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
347 ctx
->param_tcs_out_lds_offsets
,
353 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
355 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
357 ctx
->param_tcs_out_lds_offsets
,
363 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
365 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
366 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
368 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
372 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
374 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
375 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
376 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
378 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
379 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
385 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
387 LLVMValueRef patch0_patch_data_offset
=
388 get_tcs_out_patch0_patch_data_offset(ctx
);
389 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
390 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
392 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
393 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
398 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
400 unsigned tcs_out_vertices
=
401 ctx
->shader
->selector
?
402 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
404 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
405 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
406 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
408 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
411 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
416 case PIPE_SHADER_VERTEX
:
417 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
418 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
420 case PIPE_SHADER_TESS_CTRL
:
421 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
422 ctx
->shader
->is_monolithic
) {
423 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
424 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
426 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
434 static LLVMValueRef
get_instance_index_for_fetch(
435 struct si_shader_context
*ctx
,
436 unsigned param_start_instance
, LLVMValueRef divisor
)
438 LLVMValueRef result
= ctx
->abi
.instance_id
;
440 /* The division must be done before START_INSTANCE is added. */
441 if (divisor
!= ctx
->i32_1
)
442 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
444 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
445 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
448 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
450 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
452 unsigned double_index
)
454 LLVMBuilderRef builder
= ctx
->ac
.builder
;
455 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
456 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
457 LLVMVectorType(f64
, 2), "");
458 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
459 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
460 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
463 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
464 LLVMValueRef i32
, unsigned index
)
469 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
470 LLVMConstInt(ctx
->i32
, 16, 0), "");
472 return LLVMBuildSExt(ctx
->ac
.builder
,
473 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
478 void si_llvm_load_input_vs(
479 struct si_shader_context
*ctx
,
480 unsigned input_index
,
483 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
484 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
486 if (vs_blit_property
) {
487 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
488 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
489 LLVMIntULE
, vertex_id
,
491 /* Use LLVMIntNE, because we have 3 vertices and only
492 * the middle one should use y2.
494 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
495 LLVMIntNE
, vertex_id
,
498 if (input_index
== 0) {
500 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
);
502 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
503 ctx
->param_vs_blit_inputs
+ 1);
505 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
506 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
507 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
508 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
510 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
512 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
515 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
516 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
517 out
[2] = LLVMGetParam(ctx
->main_fn
,
518 ctx
->param_vs_blit_inputs
+ 2);
519 out
[3] = ctx
->ac
.f32_1
;
523 /* Color or texture coordinates: */
524 assert(input_index
== 1);
526 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
527 for (int i
= 0; i
< 4; i
++) {
528 out
[i
] = LLVMGetParam(ctx
->main_fn
,
529 ctx
->param_vs_blit_inputs
+ 3 + i
);
532 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
533 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 3);
535 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
536 ctx
->param_vs_blit_inputs
+ 4);
537 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
538 ctx
->param_vs_blit_inputs
+ 5);
539 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
540 ctx
->param_vs_blit_inputs
+ 6);
542 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
544 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
546 out
[2] = LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_blit_inputs
+ 7);
548 out
[3] = LLVMGetParam(ctx
->main_fn
,
549 ctx
->param_vs_blit_inputs
+ 8);
556 unsigned num_fetches
;
557 unsigned fetch_stride
;
558 unsigned num_channels
;
560 LLVMValueRef t_list_ptr
;
561 LLVMValueRef t_offset
;
563 LLVMValueRef vertex_index
;
564 LLVMValueRef input
[3];
566 /* Load the T list */
567 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
569 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
571 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
573 vertex_index
= LLVMGetParam(ctx
->main_fn
,
574 ctx
->param_vertex_index0
+
577 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
579 /* Do multiple loads for special formats. */
581 case SI_FIX_FETCH_RGB_64_FLOAT
:
582 num_fetches
= 3; /* 3 2-dword loads */
586 case SI_FIX_FETCH_RGBA_64_FLOAT
:
587 num_fetches
= 2; /* 2 4-dword loads */
591 case SI_FIX_FETCH_RGB_8
:
592 case SI_FIX_FETCH_RGB_8_INT
:
597 case SI_FIX_FETCH_RGB_16
:
598 case SI_FIX_FETCH_RGB_16_INT
:
606 num_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
609 for (unsigned i
= 0; i
< num_fetches
; i
++) {
610 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
612 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
613 vertex_index
, voffset
,
614 num_channels
, false, true);
615 input
[i
] = ac_build_expand_to_vec4(&ctx
->ac
, input
[i
], num_channels
);
618 /* Break up the vec4 into individual components */
619 for (chan
= 0; chan
< 4; chan
++) {
620 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
621 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
622 input
[0], llvm_chan
, "");
626 case SI_FIX_FETCH_A2_SNORM
:
627 case SI_FIX_FETCH_A2_SSCALED
:
628 case SI_FIX_FETCH_A2_SINT
: {
629 /* The hardware returns an unsigned value; convert it to a
632 LLVMValueRef tmp
= out
[3];
633 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
635 /* First, recover the sign-extended signed integer value. */
636 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
637 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
639 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
641 /* For the integer-like cases, do a natural sign extension.
643 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
644 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
647 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
648 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
649 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
650 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
652 /* Convert back to the right type. */
653 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
655 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
656 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
657 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
658 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
659 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
660 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
666 case SI_FIX_FETCH_RGBA_32_UNORM
:
667 case SI_FIX_FETCH_RGBX_32_UNORM
:
668 for (chan
= 0; chan
< 4; chan
++) {
669 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
670 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
671 out
[chan
], ctx
->f32
, "");
672 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
673 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
675 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
676 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
677 out
[3] = LLVMConstReal(ctx
->f32
, 1);
679 case SI_FIX_FETCH_RGBA_32_SNORM
:
680 case SI_FIX_FETCH_RGBX_32_SNORM
:
681 case SI_FIX_FETCH_RGBA_32_FIXED
:
682 case SI_FIX_FETCH_RGBX_32_FIXED
: {
684 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
685 scale
= 1.0 / 0x10000;
687 scale
= 1.0 / INT_MAX
;
689 for (chan
= 0; chan
< 4; chan
++) {
690 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
691 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
692 out
[chan
], ctx
->f32
, "");
693 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
694 LLVMConstReal(ctx
->f32
, scale
), "");
696 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
697 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
698 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
699 out
[3] = LLVMConstReal(ctx
->f32
, 1);
702 case SI_FIX_FETCH_RGBA_32_USCALED
:
703 for (chan
= 0; chan
< 4; chan
++) {
704 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
705 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
706 out
[chan
], ctx
->f32
, "");
709 case SI_FIX_FETCH_RGBA_32_SSCALED
:
710 for (chan
= 0; chan
< 4; chan
++) {
711 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
712 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
713 out
[chan
], ctx
->f32
, "");
716 case SI_FIX_FETCH_RG_64_FLOAT
:
717 for (chan
= 0; chan
< 2; chan
++)
718 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
720 out
[2] = LLVMConstReal(ctx
->f32
, 0);
721 out
[3] = LLVMConstReal(ctx
->f32
, 1);
723 case SI_FIX_FETCH_RGB_64_FLOAT
:
724 for (chan
= 0; chan
< 3; chan
++)
725 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
727 out
[3] = LLVMConstReal(ctx
->f32
, 1);
729 case SI_FIX_FETCH_RGBA_64_FLOAT
:
730 for (chan
= 0; chan
< 4; chan
++) {
731 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
735 case SI_FIX_FETCH_RGB_8
:
736 case SI_FIX_FETCH_RGB_8_INT
:
737 case SI_FIX_FETCH_RGB_16
:
738 case SI_FIX_FETCH_RGB_16_INT
:
739 for (chan
= 0; chan
< 3; chan
++) {
740 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
744 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
745 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
746 out
[3] = LLVMConstReal(ctx
->f32
, 1);
748 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
754 static void declare_input_vs(
755 struct si_shader_context
*ctx
,
756 unsigned input_index
,
757 const struct tgsi_full_declaration
*decl
,
760 si_llvm_load_input_vs(ctx
, input_index
, out
);
763 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
770 case PIPE_SHADER_VERTEX
:
771 return LLVMGetParam(ctx
->main_fn
,
772 ctx
->param_vs_prim_id
);
773 case PIPE_SHADER_TESS_CTRL
:
774 return ctx
->abi
.tcs_patch_id
;
775 case PIPE_SHADER_TESS_EVAL
:
776 return ctx
->abi
.tes_patch_id
;
777 case PIPE_SHADER_GEOMETRY
:
778 return ctx
->abi
.gs_prim_id
;
786 * Return the value of tgsi_ind_register for indexing.
787 * This is the indirect index with the constant offset added to it.
789 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
790 const struct tgsi_ind_register
*ind
,
796 if (ind
->File
== TGSI_FILE_ADDRESS
) {
797 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
798 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
800 struct tgsi_full_src_register src
= {};
802 src
.Register
.File
= ind
->File
;
803 src
.Register
.Index
= ind
->Index
;
805 /* Set the second index to 0 for constants. */
806 if (ind
->File
== TGSI_FILE_CONSTANT
)
807 src
.Register
.Dimension
= 1;
809 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
812 result
= ac_to_integer(&ctx
->ac
, result
);
816 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
817 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
818 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
819 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
824 * Like si_get_indirect_index, but restricts the return value to a (possibly
825 * undefined) value inside [0..num).
827 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
828 const struct tgsi_ind_register
*ind
,
829 int rel_index
, unsigned num
)
831 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
833 return si_llvm_bound_index(ctx
, result
, num
);
836 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
837 LLVMValueRef vertex_dw_stride
,
838 LLVMValueRef base_addr
,
839 LLVMValueRef vertex_index
,
840 LLVMValueRef param_index
,
841 unsigned input_index
,
846 if (vertex_dw_stride
) {
847 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
848 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
849 vertex_dw_stride
, ""), "");
853 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
854 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
855 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
858 int param
= is_patch
?
859 si_shader_io_get_unique_index_patch(name
[input_index
],
860 index
[input_index
]) :
861 si_shader_io_get_unique_index(name
[input_index
],
864 /* Add the base address of the element. */
865 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
866 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
870 * Calculate a dword address given an input or output register and a stride.
872 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
873 const struct tgsi_full_dst_register
*dst
,
874 const struct tgsi_full_src_register
*src
,
875 LLVMValueRef vertex_dw_stride
,
876 LLVMValueRef base_addr
)
878 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
879 ubyte
*name
, *index
, *array_first
;
881 struct tgsi_full_dst_register reg
;
882 LLVMValueRef vertex_index
= NULL
;
883 LLVMValueRef ind_index
= NULL
;
885 /* Set the register description. The address computation is the same
886 * for sources and destinations. */
888 reg
.Register
.File
= src
->Register
.File
;
889 reg
.Register
.Index
= src
->Register
.Index
;
890 reg
.Register
.Indirect
= src
->Register
.Indirect
;
891 reg
.Register
.Dimension
= src
->Register
.Dimension
;
892 reg
.Indirect
= src
->Indirect
;
893 reg
.Dimension
= src
->Dimension
;
894 reg
.DimIndirect
= src
->DimIndirect
;
898 /* If the register is 2-dimensional (e.g. an array of vertices
899 * in a primitive), calculate the base address of the vertex. */
900 if (reg
.Register
.Dimension
) {
901 if (reg
.Dimension
.Indirect
)
902 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
903 1, reg
.Dimension
.Index
);
905 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
908 /* Get information about the register. */
909 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
910 name
= info
->input_semantic_name
;
911 index
= info
->input_semantic_index
;
912 array_first
= info
->input_array_first
;
913 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
914 name
= info
->output_semantic_name
;
915 index
= info
->output_semantic_index
;
916 array_first
= info
->output_array_first
;
922 if (reg
.Register
.Indirect
) {
923 /* Add the relative address of the element. */
924 if (reg
.Indirect
.ArrayID
)
925 input_index
= array_first
[reg
.Indirect
.ArrayID
];
927 input_index
= reg
.Register
.Index
;
929 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
930 1, reg
.Register
.Index
- input_index
);
932 input_index
= reg
.Register
.Index
;
935 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
936 base_addr
, vertex_index
,
937 ind_index
, input_index
,
939 !reg
.Register
.Dimension
);
942 /* The offchip buffer layout for TCS->TES is
944 * - attribute 0 of patch 0 vertex 0
945 * - attribute 0 of patch 0 vertex 1
946 * - attribute 0 of patch 0 vertex 2
948 * - attribute 0 of patch 1 vertex 0
949 * - attribute 0 of patch 1 vertex 1
951 * - attribute 1 of patch 0 vertex 0
952 * - attribute 1 of patch 0 vertex 1
954 * - per patch attribute 0 of patch 0
955 * - per patch attribute 0 of patch 1
958 * Note that every attribute has 4 components.
960 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
961 LLVMValueRef rel_patch_id
,
962 LLVMValueRef vertex_index
,
963 LLVMValueRef param_index
)
965 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
966 LLVMValueRef param_stride
, constant16
;
968 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
969 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
970 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
973 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
975 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
976 vertices_per_patch
, "");
978 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
981 param_stride
= total_vertices
;
983 base_addr
= rel_patch_id
;
984 param_stride
= num_patches
;
987 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
988 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
989 param_stride
, ""), "");
991 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
994 LLVMValueRef patch_data_offset
=
995 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
997 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
998 patch_data_offset
, "");
1003 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1004 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1005 struct si_shader_context
*ctx
,
1006 LLVMValueRef vertex_index
,
1007 LLVMValueRef param_index
,
1008 unsigned param_base
,
1013 unsigned param_index_base
;
1015 param_index_base
= is_patch
?
1016 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1017 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1020 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1021 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1024 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1027 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1028 vertex_index
, param_index
);
1031 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1032 struct si_shader_context
*ctx
,
1033 const struct tgsi_full_dst_register
*dst
,
1034 const struct tgsi_full_src_register
*src
)
1036 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1037 ubyte
*name
, *index
, *array_first
;
1038 struct tgsi_full_src_register reg
;
1039 LLVMValueRef vertex_index
= NULL
;
1040 LLVMValueRef param_index
= NULL
;
1041 unsigned param_base
;
1043 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1045 if (reg
.Register
.Dimension
) {
1047 if (reg
.Dimension
.Indirect
)
1048 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1049 1, reg
.Dimension
.Index
);
1051 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1054 /* Get information about the register. */
1055 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1056 name
= info
->input_semantic_name
;
1057 index
= info
->input_semantic_index
;
1058 array_first
= info
->input_array_first
;
1059 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1060 name
= info
->output_semantic_name
;
1061 index
= info
->output_semantic_index
;
1062 array_first
= info
->output_array_first
;
1068 if (reg
.Register
.Indirect
) {
1069 if (reg
.Indirect
.ArrayID
)
1070 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1072 param_base
= reg
.Register
.Index
;
1074 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1075 1, reg
.Register
.Index
- param_base
);
1078 param_base
= reg
.Register
.Index
;
1081 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1082 param_index
, param_base
,
1083 name
, index
, !reg
.Register
.Dimension
);
1086 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1087 LLVMTypeRef type
, unsigned swizzle
,
1088 LLVMValueRef buffer
, LLVMValueRef offset
,
1089 LLVMValueRef base
, bool can_speculate
)
1091 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1092 LLVMValueRef value
, value2
;
1093 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1095 if (swizzle
== ~0) {
1096 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1097 0, 1, 0, can_speculate
, false);
1099 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1102 if (!llvm_type_is_64bit(ctx
, type
)) {
1103 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1104 0, 1, 0, can_speculate
, false);
1106 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1107 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1108 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1111 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1112 swizzle
* 4, 1, 0, can_speculate
, false);
1114 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1115 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1117 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1123 * \param type output value type
1124 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1125 * \param dw_addr address in dwords
1127 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1128 LLVMTypeRef type
, unsigned swizzle
,
1129 LLVMValueRef dw_addr
)
1131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1134 if (swizzle
== ~0) {
1135 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1137 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1138 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1140 return lp_build_gather_values(&ctx
->gallivm
, values
,
1144 /* Split 64-bit loads. */
1145 if (llvm_type_is_64bit(ctx
, type
)) {
1146 LLVMValueRef lo
, hi
;
1148 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1149 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1150 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1153 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1154 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1156 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1158 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1164 * \param swizzle offset (typically 0..3)
1165 * \param dw_addr address in dwords
1166 * \param value value to store
1168 static void lds_store(struct si_shader_context
*ctx
,
1169 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1172 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1173 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1175 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1178 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
1181 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1183 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1184 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
1185 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
1187 uint64_t desc2
= 0xffffffff;
1188 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1189 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1190 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1191 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1192 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1193 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1194 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
1196 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
1197 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
1198 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
1199 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
1202 static LLVMValueRef
fetch_input_tcs(
1203 struct lp_build_tgsi_context
*bld_base
,
1204 const struct tgsi_full_src_register
*reg
,
1205 enum tgsi_opcode_type type
, unsigned swizzle
)
1207 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1208 LLVMValueRef dw_addr
, stride
;
1210 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1211 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1212 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1214 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1217 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1219 LLVMValueRef vertex_index
,
1220 LLVMValueRef param_index
,
1221 unsigned const_index
,
1223 unsigned driver_location
,
1225 unsigned num_components
,
1230 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1231 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1232 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1233 LLVMValueRef dw_addr
, stride
;
1235 driver_location
= driver_location
/ 4;
1238 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1239 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1243 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1245 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1246 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1251 /* Add the constant index to the indirect index */
1252 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1253 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1255 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1261 names
= info
->input_semantic_name
;
1262 indices
= info
->input_semantic_index
;
1264 names
= info
->output_semantic_name
;
1265 indices
= info
->output_semantic_index
;
1268 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1269 vertex_index
, param_index
,
1274 LLVMValueRef value
[4];
1275 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
1276 value
[i
] = lds_load(bld_base
, type
, i
, dw_addr
);
1279 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1282 static LLVMValueRef
fetch_output_tcs(
1283 struct lp_build_tgsi_context
*bld_base
,
1284 const struct tgsi_full_src_register
*reg
,
1285 enum tgsi_opcode_type type
, unsigned swizzle
)
1287 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1288 LLVMValueRef dw_addr
, stride
;
1290 if (reg
->Register
.Dimension
) {
1291 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1292 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1293 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1295 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1296 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1299 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1302 static LLVMValueRef
fetch_input_tes(
1303 struct lp_build_tgsi_context
*bld_base
,
1304 const struct tgsi_full_src_register
*reg
,
1305 enum tgsi_opcode_type type
, unsigned swizzle
)
1307 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1308 LLVMValueRef buffer
, base
, addr
;
1310 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1312 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1313 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1315 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1316 buffer
, base
, addr
, true);
1319 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1321 LLVMValueRef vertex_index
,
1322 LLVMValueRef param_index
,
1323 unsigned const_index
,
1325 unsigned driver_location
,
1327 unsigned num_components
,
1332 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1333 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1334 LLVMValueRef buffer
, base
, addr
;
1336 driver_location
= driver_location
/ 4;
1338 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1340 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1343 /* Add the constant index to the indirect index */
1344 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1345 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1347 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1350 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1351 param_index
, driver_location
,
1352 info
->input_semantic_name
,
1353 info
->input_semantic_index
,
1356 /* TODO: This will generate rather ordinary llvm code, although it
1357 * should be easy for the optimiser to fix up. In future we might want
1358 * to refactor buffer_load(), but for now this maximises code sharing
1359 * between the NIR and TGSI backends.
1361 LLVMValueRef value
[4];
1362 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1363 value
[i
] = buffer_load(&ctx
->bld_base
, type
, i
, buffer
, base
, addr
, true);
1366 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1369 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1370 const struct tgsi_full_instruction
*inst
,
1371 const struct tgsi_opcode_info
*info
,
1373 LLVMValueRef dst
[4])
1375 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1376 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1377 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1378 unsigned chan_index
;
1379 LLVMValueRef dw_addr
, stride
;
1380 LLVMValueRef buffer
, base
, buf_addr
;
1381 LLVMValueRef values
[4];
1382 bool skip_lds_store
;
1383 bool is_tess_factor
= false, is_tess_inner
= false;
1385 /* Only handle per-patch and per-vertex outputs here.
1386 * Vectors will be lowered to scalars and this function will be called again.
1388 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1389 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1390 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1394 if (reg
->Register
.Dimension
) {
1395 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1396 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1397 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1398 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1400 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1401 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1402 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1404 if (!reg
->Register
.Indirect
) {
1405 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1407 /* Always write tess factors into LDS for the TCS epilog. */
1408 if (name
== TGSI_SEMANTIC_TESSINNER
||
1409 name
== TGSI_SEMANTIC_TESSOUTER
) {
1410 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1411 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1412 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1413 is_tess_factor
= true;
1414 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1419 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1421 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1422 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1424 uint32_t writemask
= reg
->Register
.WriteMask
;
1426 chan_index
= u_bit_scan(&writemask
);
1427 LLVMValueRef value
= dst
[chan_index
];
1429 if (inst
->Instruction
.Saturate
)
1430 value
= ac_build_clamp(&ctx
->ac
, value
);
1432 /* Skip LDS stores if there is no LDS read of this output. */
1433 if (!skip_lds_store
)
1434 lds_store(ctx
, chan_index
, dw_addr
, value
);
1436 value
= ac_to_integer(&ctx
->ac
, value
);
1437 values
[chan_index
] = value
;
1439 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1440 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1442 4 * chan_index
, 1, 0, true, false);
1445 /* Write tess factors into VGPRs for the epilog. */
1446 if (is_tess_factor
&&
1447 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1448 if (!is_tess_inner
) {
1449 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1450 ctx
->invoc0_tess_factors
[chan_index
]);
1451 } else if (chan_index
< 2) {
1452 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1453 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1458 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1459 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1461 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1462 base
, 0, 1, 0, true, false);
1466 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1467 LLVMValueRef vertex_index
,
1468 LLVMValueRef param_index
,
1469 unsigned const_index
,
1471 unsigned driver_location
,
1478 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1479 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1480 LLVMValueRef dw_addr
, stride
;
1481 LLVMValueRef buffer
, base
, addr
;
1482 LLVMValueRef values
[4];
1483 bool skip_lds_store
;
1484 bool is_tess_factor
= false, is_tess_inner
= false;
1486 driver_location
= driver_location
/ 4;
1489 /* Add the constant index to the indirect index */
1490 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1491 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1493 if (const_index
!= 0)
1494 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1498 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1499 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1500 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1501 vertex_index
, param_index
,
1503 info
->output_semantic_name
,
1504 info
->output_semantic_index
,
1507 skip_lds_store
= !info
->reads_pervertex_outputs
;
1509 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1510 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1511 vertex_index
, param_index
,
1513 info
->output_semantic_name
,
1514 info
->output_semantic_index
,
1517 skip_lds_store
= !info
->reads_perpatch_outputs
;
1520 int name
= info
->output_semantic_name
[driver_location
];
1522 /* Always write tess factors into LDS for the TCS epilog. */
1523 if (name
== TGSI_SEMANTIC_TESSINNER
||
1524 name
== TGSI_SEMANTIC_TESSOUTER
) {
1525 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1526 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1527 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1528 is_tess_factor
= true;
1529 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1534 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1536 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1538 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1539 param_index
, driver_location
,
1540 info
->output_semantic_name
,
1541 info
->output_semantic_index
,
1544 for (unsigned chan
= 0; chan
< 4; chan
++) {
1545 if (!(writemask
& (1 << chan
)))
1547 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1549 /* Skip LDS stores if there is no LDS read of this output. */
1550 if (!skip_lds_store
)
1551 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1553 value
= ac_to_integer(&ctx
->ac
, value
);
1554 values
[chan
] = value
;
1556 if (writemask
!= 0xF && !is_tess_factor
) {
1557 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1559 4 * chan
, 1, 0, true, false);
1562 /* Write tess factors into VGPRs for the epilog. */
1563 if (is_tess_factor
&&
1564 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1565 if (!is_tess_inner
) {
1566 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1567 ctx
->invoc0_tess_factors
[chan
]);
1568 } else if (chan
< 2) {
1569 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1570 ctx
->invoc0_tess_factors
[4 + chan
]);
1575 if (writemask
== 0xF && !is_tess_factor
) {
1576 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1578 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1579 base
, 0, 1, 0, true, false);
1583 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1584 unsigned input_index
,
1585 unsigned vtx_offset_param
,
1589 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1590 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1591 struct si_shader
*shader
= ctx
->shader
;
1592 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1593 LLVMValueRef vtx_offset
, soffset
;
1594 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1595 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1596 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1600 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1602 /* GFX9 has the ESGS ring in LDS. */
1603 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1604 unsigned index
= vtx_offset_param
;
1606 switch (index
/ 2) {
1608 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1609 index
% 2 ? 16 : 0, 16);
1612 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1613 index
% 2 ? 16 : 0, 16);
1616 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1617 index
% 2 ? 16 : 0, 16);
1624 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1625 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1626 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1629 /* GFX6: input load from the ESGS ring in memory. */
1630 if (swizzle
== ~0) {
1631 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1633 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1634 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1637 return lp_build_gather_values(&ctx
->gallivm
, values
,
1641 /* Get the vertex offset parameter on GFX6. */
1642 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1644 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1646 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1648 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1649 vtx_offset
, soffset
, 0, 1, 0, true, false);
1650 if (llvm_type_is_64bit(ctx
, type
)) {
1651 LLVMValueRef value2
;
1652 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1654 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1655 ctx
->i32_0
, vtx_offset
, soffset
,
1656 0, 1, 0, true, false);
1657 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1659 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1662 static LLVMValueRef
fetch_input_gs(
1663 struct lp_build_tgsi_context
*bld_base
,
1664 const struct tgsi_full_src_register
*reg
,
1665 enum tgsi_opcode_type type
,
1668 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1669 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1671 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1672 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1673 return get_primitive_id(ctx
, swizzle
);
1675 if (!reg
->Register
.Dimension
)
1678 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1679 reg
->Dimension
.Index
,
1680 tgsi2llvmtype(bld_base
, type
),
1684 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1686 switch (interpolate
) {
1687 case TGSI_INTERPOLATE_CONSTANT
:
1690 case TGSI_INTERPOLATE_LINEAR
:
1691 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1692 return SI_PARAM_LINEAR_SAMPLE
;
1693 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1694 return SI_PARAM_LINEAR_CENTROID
;
1696 return SI_PARAM_LINEAR_CENTER
;
1698 case TGSI_INTERPOLATE_COLOR
:
1699 case TGSI_INTERPOLATE_PERSPECTIVE
:
1700 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1701 return SI_PARAM_PERSP_SAMPLE
;
1702 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1703 return SI_PARAM_PERSP_CENTROID
;
1705 return SI_PARAM_PERSP_CENTER
;
1708 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1713 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1714 unsigned attr_index
, unsigned chan
,
1715 LLVMValueRef prim_mask
,
1716 LLVMValueRef i
, LLVMValueRef j
)
1719 return ac_build_fs_interp(&ctx
->ac
,
1720 LLVMConstInt(ctx
->i32
, chan
, 0),
1721 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1724 return ac_build_fs_interp_mov(&ctx
->ac
,
1725 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1726 LLVMConstInt(ctx
->i32
, chan
, 0),
1727 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1732 * Interpolate a fragment shader input.
1734 * @param ctx context
1735 * @param input_index index of the input in hardware
1736 * @param semantic_name TGSI_SEMANTIC_*
1737 * @param semantic_index semantic index
1738 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1739 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1740 * @param interp_param interpolation weights (i,j)
1741 * @param prim_mask SI_PARAM_PRIM_MASK
1742 * @param face SI_PARAM_FRONT_FACE
1743 * @param result the return value (4 components)
1745 static void interp_fs_input(struct si_shader_context
*ctx
,
1746 unsigned input_index
,
1747 unsigned semantic_name
,
1748 unsigned semantic_index
,
1749 unsigned num_interp_inputs
,
1750 unsigned colors_read_mask
,
1751 LLVMValueRef interp_param
,
1752 LLVMValueRef prim_mask
,
1754 LLVMValueRef result
[4])
1756 LLVMValueRef i
= NULL
, j
= NULL
;
1759 /* fs.constant returns the param from the middle vertex, so it's not
1760 * really useful for flat shading. It's meant to be used for custom
1761 * interpolation (but the intrinsic can't fetch from the other two
1764 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1765 * to do the right thing. The only reason we use fs.constant is that
1766 * fs.interp cannot be used on integers, because they can be equal
1769 * When interp is false we will use fs.constant or for newer llvm,
1770 * amdgcn.interp.mov.
1772 bool interp
= interp_param
!= NULL
;
1775 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1776 LLVMVectorType(ctx
->f32
, 2), "");
1778 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1780 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1784 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1785 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1786 LLVMValueRef is_face_positive
;
1788 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1789 * otherwise it's at offset "num_inputs".
1791 unsigned back_attr_offset
= num_interp_inputs
;
1792 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1793 back_attr_offset
+= 1;
1795 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1796 face
, ctx
->i32_0
, "");
1798 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1799 LLVMValueRef front
, back
;
1801 front
= si_build_fs_interp(ctx
,
1804 back
= si_build_fs_interp(ctx
,
1805 back_attr_offset
, chan
,
1808 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1814 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1815 result
[0] = si_build_fs_interp(ctx
, input_index
,
1816 0, prim_mask
, i
, j
);
1818 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1819 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1821 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1822 result
[chan
] = si_build_fs_interp(ctx
,
1829 void si_llvm_load_input_fs(
1830 struct si_shader_context
*ctx
,
1831 unsigned input_index
,
1832 LLVMValueRef out
[4])
1834 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1835 struct si_shader
*shader
= ctx
->shader
;
1836 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1837 LLVMValueRef main_fn
= ctx
->main_fn
;
1838 LLVMValueRef interp_param
= NULL
;
1839 int interp_param_idx
;
1840 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1841 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1842 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1843 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1845 /* Get colors from input VGPRs (set by the prolog). */
1846 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1847 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1848 unsigned mask
= colors_read
>> (semantic_index
* 4);
1849 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1850 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1852 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1853 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1854 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1855 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1859 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1860 if (interp_param_idx
== -1)
1862 else if (interp_param_idx
) {
1863 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1866 interp_fs_input(ctx
, input_index
, semantic_name
,
1867 semantic_index
, 0, /* this param is unused */
1868 shader
->selector
->info
.colors_read
, interp_param
,
1870 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1874 static void declare_input_fs(
1875 struct si_shader_context
*ctx
,
1876 unsigned input_index
,
1877 const struct tgsi_full_declaration
*decl
,
1878 LLVMValueRef out
[4])
1880 si_llvm_load_input_fs(ctx
, input_index
, out
);
1883 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1885 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1888 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1890 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1892 LLVMValueRef values
[3];
1893 LLVMValueRef result
;
1895 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1897 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1898 unsigned sizes
[3] = {
1899 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1900 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1901 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1904 for (i
= 0; i
< 3; ++i
)
1905 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1907 result
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1909 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1916 * Load a dword from a constant buffer.
1918 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1919 LLVMValueRef resource
,
1920 LLVMValueRef offset
)
1922 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1923 0, 0, 0, true, true);
1926 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1928 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1929 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1930 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1931 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1932 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1934 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1935 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1936 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1938 LLVMValueRef pos
[4] = {
1939 buffer_load_const(ctx
, resource
, offset0
),
1940 buffer_load_const(ctx
, resource
, offset1
),
1941 LLVMConstReal(ctx
->f32
, 0),
1942 LLVMConstReal(ctx
->f32
, 0)
1945 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1948 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1950 return abi
->sample_coverage
;
1953 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1955 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1956 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1958 LLVMValueRef coord
[4] = {
1959 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1960 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1965 /* For triangles, the vector should be (u, v, 1-u-v). */
1966 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1967 PIPE_PRIM_TRIANGLES
)
1968 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
1969 lp_build_add(bld
, coord
[0], coord
[1]));
1971 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
1974 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1975 unsigned semantic_name
)
1977 LLVMValueRef buffer
, base
, addr
;
1979 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1981 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1983 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1984 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1985 LLVMConstInt(ctx
->i32
, param
, 0));
1987 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1988 ~0, buffer
, base
, addr
, true);
1992 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1993 unsigned varying_id
)
1995 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1996 unsigned semantic_name
;
1998 switch (varying_id
) {
1999 case VARYING_SLOT_TESS_LEVEL_INNER
:
2000 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2002 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2003 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2006 unreachable("unknown tess level");
2009 return load_tess_level(ctx
, semantic_name
);
2013 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2015 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2016 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2017 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2018 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2019 return get_num_tcs_out_vertices(ctx
);
2021 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2024 void si_load_system_value(struct si_shader_context
*ctx
,
2026 const struct tgsi_full_declaration
*decl
)
2028 LLVMValueRef value
= 0;
2030 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2032 switch (decl
->Semantic
.Name
) {
2033 case TGSI_SEMANTIC_INSTANCEID
:
2034 value
= ctx
->abi
.instance_id
;
2037 case TGSI_SEMANTIC_VERTEXID
:
2038 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2040 ctx
->abi
.base_vertex
, "");
2043 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2044 /* Unused. Clarify the meaning in indexed vs. non-indexed
2045 * draws if this is ever used again. */
2049 case TGSI_SEMANTIC_BASEVERTEX
:
2051 /* For non-indexed draws, the base vertex set by the driver
2052 * (for direct draws) or the CP (for indirect draws) is the
2053 * first vertex ID, but GLSL expects 0 to be returned.
2055 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2056 LLVMValueRef indexed
;
2058 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
2059 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
2061 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
2062 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
2066 case TGSI_SEMANTIC_BASEINSTANCE
:
2067 value
= ctx
->abi
.start_instance
;
2070 case TGSI_SEMANTIC_DRAWID
:
2071 value
= ctx
->abi
.draw_id
;
2074 case TGSI_SEMANTIC_INVOCATIONID
:
2075 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2076 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2077 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2078 value
= ctx
->abi
.gs_invocation_id
;
2080 assert(!"INVOCATIONID not implemented");
2083 case TGSI_SEMANTIC_POSITION
:
2085 LLVMValueRef pos
[4] = {
2086 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2087 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2088 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2089 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2090 LLVMGetParam(ctx
->main_fn
,
2091 SI_PARAM_POS_W_FLOAT
)),
2093 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2097 case TGSI_SEMANTIC_FACE
:
2098 value
= ctx
->abi
.front_face
;
2101 case TGSI_SEMANTIC_SAMPLEID
:
2102 value
= get_sample_id(ctx
);
2105 case TGSI_SEMANTIC_SAMPLEPOS
: {
2106 LLVMValueRef pos
[4] = {
2107 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2108 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2109 LLVMConstReal(ctx
->f32
, 0),
2110 LLVMConstReal(ctx
->f32
, 0)
2112 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2113 TGSI_OPCODE_FRC
, pos
[0]);
2114 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2115 TGSI_OPCODE_FRC
, pos
[1]);
2116 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2120 case TGSI_SEMANTIC_SAMPLEMASK
:
2121 /* This can only occur with the OpenGL Core profile, which
2122 * doesn't support smoothing.
2124 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2127 case TGSI_SEMANTIC_TESSCOORD
:
2128 value
= si_load_tess_coord(&ctx
->abi
);
2131 case TGSI_SEMANTIC_VERTICESIN
:
2132 value
= si_load_patch_vertices_in(&ctx
->abi
);
2135 case TGSI_SEMANTIC_TESSINNER
:
2136 case TGSI_SEMANTIC_TESSOUTER
:
2137 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2140 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2141 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2143 LLVMValueRef buf
, slot
, val
[4];
2146 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2147 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2148 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2149 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2151 for (i
= 0; i
< 4; i
++)
2152 val
[i
] = buffer_load_const(ctx
, buf
,
2153 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2154 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2158 case TGSI_SEMANTIC_PRIMID
:
2159 value
= get_primitive_id(ctx
, 0);
2162 case TGSI_SEMANTIC_GRID_SIZE
:
2163 value
= ctx
->abi
.num_work_groups
;
2166 case TGSI_SEMANTIC_BLOCK_SIZE
:
2167 value
= get_block_size(&ctx
->abi
);
2170 case TGSI_SEMANTIC_BLOCK_ID
:
2172 LLVMValueRef values
[3];
2174 for (int i
= 0; i
< 3; i
++) {
2175 values
[i
] = ctx
->i32_0
;
2176 if (ctx
->abi
.workgroup_ids
[i
]) {
2177 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2180 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2184 case TGSI_SEMANTIC_THREAD_ID
:
2185 value
= ctx
->abi
.local_invocation_ids
;
2188 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2189 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2190 "llvm.amdgcn.ps.live",
2192 LP_FUNC_ATTR_READNONE
);
2193 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2194 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2197 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2198 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2201 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2202 value
= ac_get_thread_id(&ctx
->ac
);
2205 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2207 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2208 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2209 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2210 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2214 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2215 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2216 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2217 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2219 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2220 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2221 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2222 /* All bits set except LSB */
2223 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2226 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2228 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2229 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2230 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2231 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2232 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2233 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2238 assert(!"unknown system value");
2242 ctx
->system_values
[index
] = value
;
2245 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2247 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2249 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2252 assert(!ctx
->ac
.lds
);
2254 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2255 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2257 AC_LOCAL_ADDR_SPACE
);
2258 LLVMSetAlignment(var
, 4);
2260 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2263 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2264 const struct tgsi_full_declaration
*decl
)
2266 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2267 assert(decl
->Range
.First
== decl
->Range
.Last
);
2269 si_declare_compute_memory(ctx
);
2272 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2274 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2275 ctx
->param_const_and_shader_buffers
);
2277 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2278 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2281 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2283 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2284 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2286 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2287 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2288 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2290 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2294 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2296 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2297 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2298 ctx
->param_const_and_shader_buffers
);
2300 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2301 index
= LLVMBuildSub(ctx
->ac
.builder
,
2302 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2305 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2308 static LLVMValueRef
fetch_constant(
2309 struct lp_build_tgsi_context
*bld_base
,
2310 const struct tgsi_full_src_register
*reg
,
2311 enum tgsi_opcode_type type
,
2314 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2315 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2316 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2319 LLVMValueRef addr
, bufp
;
2321 if (swizzle
== LP_CHAN_ALL
) {
2323 LLVMValueRef values
[4];
2324 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2325 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2327 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2330 /* Split 64-bit loads. */
2331 if (tgsi_type_is_64bit(type
)) {
2332 LLVMValueRef lo
, hi
;
2334 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2335 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2336 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2340 idx
= reg
->Register
.Index
* 4 + swizzle
;
2341 if (reg
->Register
.Indirect
) {
2342 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2344 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2347 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2348 if (sel
->info
.const_buffers_declared
== 1 &&
2349 sel
->info
.shader_buffers_declared
== 0) {
2351 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2353 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2354 * loads, and up to x4 load opcode merging. However, it leads to horrible
2355 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2357 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2359 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2360 * a descriptor and s_buffer_load_dword using it, so we can't expand
2361 * the pointer into a full descriptor like below. We have to use
2362 * s_load_dword instead. The only case when LLVM 5.0 would select
2363 * s_buffer_load_dword (that we have to prevent) is when we use use
2364 * a literal offset where we don't need bounds checking.
2366 if (ctx
->screen
->info
.chip_class
== SI
&&
2367 HAVE_LLVM
< 0x0600 &&
2368 !reg
->Register
.Indirect
) {
2369 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2370 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2371 return bitcast(bld_base
, type
, result
);
2374 /* Do the bounds checking with a descriptor, because
2375 * doing computation and manual bounds checking of 64-bit
2376 * addresses generates horrible VALU code with very high
2377 * VGPR usage and very low SIMD occupancy.
2379 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->i64
, "");
2380 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2382 LLVMValueRef desc_elems
[] = {
2383 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, ""),
2384 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, ""),
2385 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2386 LLVMConstInt(ctx
->i32
,
2387 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2388 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2389 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2390 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2391 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2392 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2394 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2395 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2396 return bitcast(bld_base
, type
, result
);
2399 assert(reg
->Register
.Dimension
);
2400 buf
= reg
->Dimension
.Index
;
2402 if (reg
->Dimension
.Indirect
) {
2403 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2405 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2406 reg
->Dimension
.Index
,
2407 ctx
->num_const_buffers
);
2408 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2409 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2410 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2412 bufp
= load_const_buffer_desc(ctx
, buf
);
2414 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2417 /* Initialize arguments for the shader export intrinsic */
2418 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2419 LLVMValueRef
*values
,
2421 struct ac_export_args
*args
)
2423 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2424 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2426 bool is_int8
, is_int10
;
2428 /* Default is 0xf. Adjusted below depending on the format. */
2429 args
->enabled_channels
= 0xf; /* writemask */
2431 /* Specify whether the EXEC mask represents the valid mask */
2432 args
->valid_mask
= 0;
2434 /* Specify whether this is the last export */
2437 /* Specify the target we are exporting */
2438 args
->target
= target
;
2440 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2441 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2442 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2443 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2445 assert(cbuf
>= 0 && cbuf
< 8);
2446 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2447 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2448 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2451 args
->compr
= false;
2452 args
->out
[0] = f32undef
;
2453 args
->out
[1] = f32undef
;
2454 args
->out
[2] = f32undef
;
2455 args
->out
[3] = f32undef
;
2457 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2458 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2459 unsigned bits
, bool hi
) = NULL
;
2461 switch (spi_shader_col_format
) {
2462 case V_028714_SPI_SHADER_ZERO
:
2463 args
->enabled_channels
= 0; /* writemask */
2464 args
->target
= V_008DFC_SQ_EXP_NULL
;
2467 case V_028714_SPI_SHADER_32_R
:
2468 args
->enabled_channels
= 1; /* writemask */
2469 args
->out
[0] = values
[0];
2472 case V_028714_SPI_SHADER_32_GR
:
2473 args
->enabled_channels
= 0x3; /* writemask */
2474 args
->out
[0] = values
[0];
2475 args
->out
[1] = values
[1];
2478 case V_028714_SPI_SHADER_32_AR
:
2479 args
->enabled_channels
= 0x9; /* writemask */
2480 args
->out
[0] = values
[0];
2481 args
->out
[3] = values
[3];
2484 case V_028714_SPI_SHADER_FP16_ABGR
:
2485 packf
= ac_build_cvt_pkrtz_f16
;
2488 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2489 packf
= ac_build_cvt_pknorm_u16
;
2492 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2493 packf
= ac_build_cvt_pknorm_i16
;
2496 case V_028714_SPI_SHADER_UINT16_ABGR
:
2497 packi
= ac_build_cvt_pk_u16
;
2500 case V_028714_SPI_SHADER_SINT16_ABGR
:
2501 packi
= ac_build_cvt_pk_i16
;
2504 case V_028714_SPI_SHADER_32_ABGR
:
2505 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2509 /* Pack f16 or norm_i16/u16. */
2511 for (chan
= 0; chan
< 2; chan
++) {
2512 LLVMValueRef pack_args
[2] = {
2514 values
[2 * chan
+ 1]
2516 LLVMValueRef packed
;
2518 packed
= packf(&ctx
->ac
, pack_args
);
2519 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2521 args
->compr
= 1; /* COMPR flag */
2525 for (chan
= 0; chan
< 2; chan
++) {
2526 LLVMValueRef pack_args
[2] = {
2527 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2528 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2530 LLVMValueRef packed
;
2532 packed
= packi(&ctx
->ac
, pack_args
,
2533 is_int8
? 8 : is_int10
? 10 : 16,
2535 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2537 args
->compr
= 1; /* COMPR flag */
2541 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2544 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2546 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2547 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2548 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2549 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2550 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2551 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2552 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2553 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2555 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2558 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2559 SI_PARAM_ALPHA_REF
);
2560 LLVMValueRef alpha_pass
=
2561 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2562 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2564 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2568 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2570 unsigned samplemask_param
)
2572 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2573 LLVMValueRef coverage
;
2575 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2576 coverage
= LLVMGetParam(ctx
->main_fn
,
2578 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2580 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2582 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2584 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2587 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2588 LLVMConstReal(ctx
->f32
,
2589 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2591 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2594 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2595 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2599 unsigned const_chan
;
2600 LLVMValueRef base_elt
;
2601 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2602 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2603 SI_VS_CONST_CLIP_PLANES
, 0);
2604 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2606 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2607 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2612 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2614 /* Compute dot products of position and user clip plane vectors */
2615 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2616 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2618 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2619 const_chan
) * 4, 0);
2620 base_elt
= buffer_load_const(ctx
, const_resource
,
2623 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2624 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2625 out_elts
[const_chan
]));
2629 args
->enabled_channels
= 0xf;
2630 args
->valid_mask
= 0;
2632 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2637 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2641 if (so
->num_outputs
)
2642 fprintf(stderr
, "STREAMOUT\n");
2644 for (i
= 0; i
< so
->num_outputs
; i
++) {
2645 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2646 so
->output
[i
].start_component
;
2647 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2648 i
, so
->output
[i
].output_buffer
,
2649 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2650 so
->output
[i
].register_index
,
2651 mask
& 1 ? "x" : "",
2652 mask
& 2 ? "y" : "",
2653 mask
& 4 ? "z" : "",
2654 mask
& 8 ? "w" : "");
2658 static void emit_streamout_output(struct si_shader_context
*ctx
,
2659 LLVMValueRef
const *so_buffers
,
2660 LLVMValueRef
const *so_write_offsets
,
2661 struct pipe_stream_output
*stream_out
,
2662 struct si_shader_output_values
*shader_out
)
2664 unsigned buf_idx
= stream_out
->output_buffer
;
2665 unsigned start
= stream_out
->start_component
;
2666 unsigned num_comps
= stream_out
->num_components
;
2667 LLVMValueRef out
[4];
2669 assert(num_comps
&& num_comps
<= 4);
2670 if (!num_comps
|| num_comps
> 4)
2673 /* Load the output as int. */
2674 for (int j
= 0; j
< num_comps
; j
++) {
2675 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2677 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2680 /* Pack the output. */
2681 LLVMValueRef vdata
= NULL
;
2683 switch (num_comps
) {
2684 case 1: /* as i32 */
2687 case 2: /* as v2i32 */
2688 case 3: /* as v4i32 (aligned to 4) */
2689 case 4: /* as v4i32 */
2690 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2691 for (int j
= 0; j
< num_comps
; j
++) {
2692 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2693 LLVMConstInt(ctx
->i32
, j
, 0), "");
2698 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2700 so_write_offsets
[buf_idx
],
2702 stream_out
->dst_offset
* 4, 1, 1, true, false);
2706 * Write streamout data to buffers for vertex stream @p stream (different
2707 * vertex streams can occur for GS copy shaders).
2709 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2710 struct si_shader_output_values
*outputs
,
2711 unsigned noutput
, unsigned stream
)
2713 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2714 struct pipe_stream_output_info
*so
= &sel
->so
;
2715 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2717 struct lp_build_if_state if_ctx
;
2719 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2720 LLVMValueRef so_vtx_count
=
2721 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2723 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2725 /* can_emit = tid < so_vtx_count; */
2726 LLVMValueRef can_emit
=
2727 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2729 /* Emit the streamout code conditionally. This actually avoids
2730 * out-of-bounds buffer access. The hw tells us via the SGPR
2731 * (so_vtx_count) which threads are allowed to emit streamout data. */
2732 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2734 /* The buffer offset is computed as follows:
2735 * ByteOffset = streamout_offset[buffer_id]*4 +
2736 * (streamout_write_index + thread_id)*stride[buffer_id] +
2740 LLVMValueRef so_write_index
=
2741 LLVMGetParam(ctx
->main_fn
,
2742 ctx
->param_streamout_write_index
);
2744 /* Compute (streamout_write_index + thread_id). */
2745 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2747 /* Load the descriptor and compute the write offset for each
2748 * enabled buffer. */
2749 LLVMValueRef so_write_offset
[4] = {};
2750 LLVMValueRef so_buffers
[4];
2751 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2752 ctx
->param_rw_buffers
);
2754 for (i
= 0; i
< 4; i
++) {
2758 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2759 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2761 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2763 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2764 ctx
->param_streamout_offset
[i
]);
2765 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2767 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2768 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2769 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2772 /* Write streamout data. */
2773 for (i
= 0; i
< so
->num_outputs
; i
++) {
2774 unsigned reg
= so
->output
[i
].register_index
;
2779 if (stream
!= so
->output
[i
].stream
)
2782 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2783 &so
->output
[i
], &outputs
[reg
]);
2786 lp_build_endif(&if_ctx
);
2789 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2790 LLVMValueRef
*values
)
2792 struct ac_export_args args
;
2794 si_llvm_init_export_args(ctx
, values
,
2795 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2796 ac_build_export(&ctx
->ac
, &args
);
2799 static void si_build_param_exports(struct si_shader_context
*ctx
,
2800 struct si_shader_output_values
*outputs
,
2803 struct si_shader
*shader
= ctx
->shader
;
2804 unsigned param_count
= 0;
2806 for (unsigned i
= 0; i
< noutput
; i
++) {
2807 unsigned semantic_name
= outputs
[i
].semantic_name
;
2808 unsigned semantic_index
= outputs
[i
].semantic_index
;
2810 if (outputs
[i
].vertex_stream
[0] != 0 &&
2811 outputs
[i
].vertex_stream
[1] != 0 &&
2812 outputs
[i
].vertex_stream
[2] != 0 &&
2813 outputs
[i
].vertex_stream
[3] != 0)
2816 switch (semantic_name
) {
2817 case TGSI_SEMANTIC_LAYER
:
2818 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2819 case TGSI_SEMANTIC_CLIPDIST
:
2820 case TGSI_SEMANTIC_COLOR
:
2821 case TGSI_SEMANTIC_BCOLOR
:
2822 case TGSI_SEMANTIC_PRIMID
:
2823 case TGSI_SEMANTIC_FOG
:
2824 case TGSI_SEMANTIC_TEXCOORD
:
2825 case TGSI_SEMANTIC_GENERIC
:
2831 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2832 semantic_index
< SI_MAX_IO_GENERIC
) &&
2833 shader
->key
.opt
.kill_outputs
&
2834 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2837 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2839 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2840 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2843 shader
->info
.nr_param_exports
= param_count
;
2846 /* Generate export instructions for hardware VS shader stage */
2847 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2848 struct si_shader_output_values
*outputs
,
2851 struct si_shader
*shader
= ctx
->shader
;
2852 struct ac_export_args pos_args
[4] = {};
2853 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2857 /* Build position exports. */
2858 for (i
= 0; i
< noutput
; i
++) {
2859 switch (outputs
[i
].semantic_name
) {
2860 case TGSI_SEMANTIC_POSITION
:
2861 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2862 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2864 case TGSI_SEMANTIC_PSIZE
:
2865 psize_value
= outputs
[i
].values
[0];
2867 case TGSI_SEMANTIC_LAYER
:
2868 layer_value
= outputs
[i
].values
[0];
2870 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2871 viewport_index_value
= outputs
[i
].values
[0];
2873 case TGSI_SEMANTIC_EDGEFLAG
:
2874 edgeflag_value
= outputs
[i
].values
[0];
2876 case TGSI_SEMANTIC_CLIPDIST
:
2877 if (!shader
->key
.opt
.clip_disable
) {
2878 unsigned index
= 2 + outputs
[i
].semantic_index
;
2879 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2880 V_008DFC_SQ_EXP_POS
+ index
,
2884 case TGSI_SEMANTIC_CLIPVERTEX
:
2885 if (!shader
->key
.opt
.clip_disable
) {
2886 si_llvm_emit_clipvertex(ctx
, pos_args
,
2893 /* We need to add the position output manually if it's missing. */
2894 if (!pos_args
[0].out
[0]) {
2895 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2896 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2897 pos_args
[0].done
= 0; /* last export? */
2898 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2899 pos_args
[0].compr
= 0; /* COMPR flag */
2900 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2901 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2902 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2903 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2906 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2907 if (shader
->selector
->info
.writes_psize
||
2908 shader
->selector
->info
.writes_edgeflag
||
2909 shader
->selector
->info
.writes_viewport_index
||
2910 shader
->selector
->info
.writes_layer
) {
2911 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2912 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2913 (shader
->selector
->info
.writes_layer
<< 2);
2915 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2916 pos_args
[1].done
= 0; /* last export? */
2917 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2918 pos_args
[1].compr
= 0; /* COMPR flag */
2919 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2920 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2921 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2922 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2924 if (shader
->selector
->info
.writes_psize
)
2925 pos_args
[1].out
[0] = psize_value
;
2927 if (shader
->selector
->info
.writes_edgeflag
) {
2928 /* The output is a float, but the hw expects an integer
2929 * with the first bit containing the edge flag. */
2930 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2933 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2937 /* The LLVM intrinsic expects a float. */
2938 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2941 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2942 /* GFX9 has the layer in out.z[10:0] and the viewport
2943 * index in out.z[19:16].
2945 if (shader
->selector
->info
.writes_layer
)
2946 pos_args
[1].out
[2] = layer_value
;
2948 if (shader
->selector
->info
.writes_viewport_index
) {
2949 LLVMValueRef v
= viewport_index_value
;
2951 v
= ac_to_integer(&ctx
->ac
, v
);
2952 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2953 LLVMConstInt(ctx
->i32
, 16, 0), "");
2954 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2955 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2956 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2957 pos_args
[1].enabled_channels
|= 1 << 2;
2960 if (shader
->selector
->info
.writes_layer
)
2961 pos_args
[1].out
[2] = layer_value
;
2963 if (shader
->selector
->info
.writes_viewport_index
) {
2964 pos_args
[1].out
[3] = viewport_index_value
;
2965 pos_args
[1].enabled_channels
|= 1 << 3;
2970 for (i
= 0; i
< 4; i
++)
2971 if (pos_args
[i
].out
[0])
2972 shader
->info
.nr_pos_exports
++;
2975 for (i
= 0; i
< 4; i
++) {
2976 if (!pos_args
[i
].out
[0])
2979 /* Specify the target we are exporting */
2980 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2982 if (pos_idx
== shader
->info
.nr_pos_exports
)
2983 /* Specify that this is the last export */
2984 pos_args
[i
].done
= 1;
2986 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2989 /* Build parameter exports. */
2990 si_build_param_exports(ctx
, outputs
, noutput
);
2994 * Forward all outputs from the vertex shader to the TES. This is only used
2995 * for the fixed function TCS.
2997 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2999 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3000 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3001 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3004 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3005 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3006 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3008 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3009 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3010 lds_vertex_stride
, "");
3011 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3012 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3014 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3016 unsigned i
= u_bit_scan64(&inputs
);
3018 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3019 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3022 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3023 get_rel_patch_id(ctx
),
3025 LLVMConstInt(ctx
->i32
, i
, 0));
3027 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3030 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3031 buffer_offset
, 0, 1, 0, true, false);
3035 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3036 LLVMValueRef rel_patch_id
,
3037 LLVMValueRef invocation_id
,
3038 LLVMValueRef tcs_out_current_patch_data_offset
,
3039 LLVMValueRef invoc0_tf_outer
[4],
3040 LLVMValueRef invoc0_tf_inner
[2])
3042 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3043 struct si_shader
*shader
= ctx
->shader
;
3044 unsigned tess_inner_index
, tess_outer_index
;
3045 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3046 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3047 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3048 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3050 /* Add a barrier before loading tess factors from LDS. */
3051 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3052 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3054 /* Do this only for invocation 0, because the tess levels are per-patch,
3057 * This can't jump, because invocation 0 executes this. It should
3058 * at least mask out the loads and stores for other invocations.
3060 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3061 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3062 invocation_id
, ctx
->i32_0
, ""));
3064 /* Determine the layout of one tess factor element in the buffer. */
3065 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3066 case PIPE_PRIM_LINES
:
3067 stride
= 2; /* 2 dwords, 1 vec2 store */
3071 case PIPE_PRIM_TRIANGLES
:
3072 stride
= 4; /* 4 dwords, 1 vec4 store */
3076 case PIPE_PRIM_QUADS
:
3077 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3086 for (i
= 0; i
< 4; i
++) {
3087 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3088 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3091 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3092 /* Tess factors are in VGPRs. */
3093 for (i
= 0; i
< outer_comps
; i
++)
3094 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3095 for (i
= 0; i
< inner_comps
; i
++)
3096 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3098 /* Load tess_inner and tess_outer from LDS.
3099 * Any invocation can write them, so we can't get them from a temporary.
3101 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3102 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3104 lds_base
= tcs_out_current_patch_data_offset
;
3105 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3106 LLVMConstInt(ctx
->i32
,
3107 tess_inner_index
* 4, 0), "");
3108 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3109 LLVMConstInt(ctx
->i32
,
3110 tess_outer_index
* 4, 0), "");
3112 for (i
= 0; i
< outer_comps
; i
++) {
3114 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3116 for (i
= 0; i
< inner_comps
; i
++) {
3117 inner
[i
] = out
[outer_comps
+i
] =
3118 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3122 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3123 /* For isolines, the hardware expects tess factors in the
3124 * reverse order from what GLSL / TGSI specify.
3126 LLVMValueRef tmp
= out
[0];
3131 /* Convert the outputs to vectors for stores. */
3132 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3136 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3138 /* Get the buffer. */
3139 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
3141 /* Get the offset. */
3142 tf_base
= LLVMGetParam(ctx
->main_fn
,
3143 ctx
->param_tcs_factor_offset
);
3144 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3145 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3147 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3148 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3149 rel_patch_id
, ctx
->i32_0
, ""));
3151 /* Store the dynamic HS control word. */
3153 if (ctx
->screen
->info
.chip_class
<= VI
) {
3154 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3155 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3156 1, ctx
->i32_0
, tf_base
,
3157 offset
, 1, 0, true, false);
3161 lp_build_endif(&inner_if_ctx
);
3163 /* Store the tessellation factors. */
3164 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3165 MIN2(stride
, 4), byteoffset
, tf_base
,
3166 offset
, 1, 0, true, false);
3169 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3170 stride
- 4, byteoffset
, tf_base
,
3171 offset
, 1, 0, true, false);
3173 /* Store the tess factors into the offchip buffer if TES reads them. */
3174 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3175 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3176 LLVMValueRef tf_inner_offset
;
3177 unsigned param_outer
, param_inner
;
3179 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3180 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3182 param_outer
= si_shader_io_get_unique_index_patch(
3183 TGSI_SEMANTIC_TESSOUTER
, 0);
3184 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3185 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3187 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3188 util_next_power_of_two(outer_comps
));
3190 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3191 outer_comps
, tf_outer_offset
,
3192 base
, 0, 1, 0, true, false);
3194 param_inner
= si_shader_io_get_unique_index_patch(
3195 TGSI_SEMANTIC_TESSINNER
, 0);
3196 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3197 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3199 inner_vec
= inner_comps
== 1 ? inner
[0] :
3200 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3201 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3202 inner_comps
, tf_inner_offset
,
3203 base
, 0, 1, 0, true, false);
3207 lp_build_endif(&if_ctx
);
3211 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3212 unsigned param
, unsigned return_index
)
3214 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3215 LLVMGetParam(ctx
->main_fn
, param
),
3220 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3221 unsigned param
, unsigned return_index
)
3223 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3224 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3226 return LLVMBuildInsertValue(builder
, ret
,
3227 ac_to_float(&ctx
->ac
, p
),
3232 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3233 unsigned param
, unsigned return_index
)
3235 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3236 LLVMValueRef ptr
, lo
, hi
;
3238 if (HAVE_32BIT_POINTERS
) {
3239 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3240 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3241 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3244 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3245 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3246 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3247 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3248 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3249 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3250 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3253 /* This only writes the tessellation factor levels. */
3254 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3255 unsigned max_outputs
,
3256 LLVMValueRef
*addrs
)
3258 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3259 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3260 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3261 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3263 si_copy_tcs_inputs(bld_base
);
3265 rel_patch_id
= get_rel_patch_id(ctx
);
3266 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3267 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3269 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3270 LLVMBasicBlockRef blocks
[2] = {
3271 LLVMGetInsertBlock(builder
),
3272 ctx
->merged_wrap_if_state
.entry_block
3274 LLVMValueRef values
[2];
3276 lp_build_endif(&ctx
->merged_wrap_if_state
);
3278 values
[0] = rel_patch_id
;
3279 values
[1] = LLVMGetUndef(ctx
->i32
);
3280 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3282 values
[0] = tf_lds_offset
;
3283 values
[1] = LLVMGetUndef(ctx
->i32
);
3284 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3286 values
[0] = invocation_id
;
3287 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3288 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3291 /* Return epilog parameters from this function. */
3292 LLVMValueRef ret
= ctx
->return_value
;
3295 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3296 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3297 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3298 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3299 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3300 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3301 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3302 /* Tess offchip and tess factor offsets are at the beginning. */
3303 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3304 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3305 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
3307 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3308 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3309 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3310 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3311 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3312 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3313 /* Tess offchip and tess factor offsets are after user SGPRs. */
3314 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3315 GFX6_TCS_NUM_USER_SGPR
);
3316 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3317 GFX6_TCS_NUM_USER_SGPR
+ 1);
3318 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3322 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3323 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3324 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3326 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3327 * the invocation_id output does not alias the tcs_rel_ids input,
3328 * which saves a V_MOV on gfx9.
3332 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3333 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3335 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3336 vgpr
++; /* skip the tess factor LDS offset */
3337 for (unsigned i
= 0; i
< 6; i
++) {
3338 LLVMValueRef value
=
3339 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3340 value
= ac_to_float(&ctx
->ac
, value
);
3341 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3344 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3346 ctx
->return_value
= ret
;
3349 /* Pass TCS inputs from LS to TCS on GFX9. */
3350 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3352 LLVMValueRef ret
= ctx
->return_value
;
3354 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3355 if (HAVE_32BIT_POINTERS
)
3356 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3357 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3358 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3359 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3360 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3362 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3363 8 + SI_SGPR_RW_BUFFERS
);
3364 ret
= si_insert_input_ptr(ctx
, ret
,
3365 ctx
->param_bindless_samplers_and_images
,
3366 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3368 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3369 8 + SI_SGPR_VS_STATE_BITS
);
3371 #if !HAVE_32BIT_POINTERS
3372 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3373 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3376 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3377 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3378 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3379 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3380 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3381 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3382 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3383 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3384 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3385 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3387 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3388 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3389 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3391 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3392 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3394 ctx
->return_value
= ret
;
3397 /* Pass GS inputs from ES to GS on GFX9. */
3398 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3400 LLVMValueRef ret
= ctx
->return_value
;
3402 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3403 if (HAVE_32BIT_POINTERS
)
3404 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3405 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3406 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3407 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3409 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3410 8 + SI_SGPR_RW_BUFFERS
);
3411 ret
= si_insert_input_ptr(ctx
, ret
,
3412 ctx
->param_bindless_samplers_and_images
,
3413 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3415 #if !HAVE_32BIT_POINTERS
3416 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3417 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3420 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3421 for (unsigned i
= 0; i
< 5; i
++) {
3422 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3423 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3425 ctx
->return_value
= ret
;
3428 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3429 unsigned max_outputs
,
3430 LLVMValueRef
*addrs
)
3432 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3433 struct si_shader
*shader
= ctx
->shader
;
3434 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3436 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3437 ctx
->param_rel_auto_id
);
3438 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3439 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3440 vertex_dw_stride
, "");
3442 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3443 * its inputs from it. */
3444 for (i
= 0; i
< info
->num_outputs
; i
++) {
3445 unsigned name
= info
->output_semantic_name
[i
];
3446 unsigned index
= info
->output_semantic_index
[i
];
3448 /* The ARB_shader_viewport_layer_array spec contains the
3451 * 2) What happens if gl_ViewportIndex or gl_Layer is
3452 * written in the vertex shader and a geometry shader is
3455 * RESOLVED: The value written by the last vertex processing
3456 * stage is used. If the last vertex processing stage
3457 * (vertex, tessellation evaluation or geometry) does not
3458 * statically assign to gl_ViewportIndex or gl_Layer, index
3459 * or layer zero is assumed.
3461 * So writes to those outputs in VS-as-LS are simply ignored.
3463 if (name
== TGSI_SEMANTIC_LAYER
||
3464 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3467 int param
= si_shader_io_get_unique_index(name
, index
);
3468 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3469 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3471 for (chan
= 0; chan
< 4; chan
++) {
3472 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3475 lds_store(ctx
, chan
, dw_addr
,
3476 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3480 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3481 si_set_ls_return_value_for_tcs(ctx
);
3484 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3485 unsigned max_outputs
,
3486 LLVMValueRef
*addrs
)
3488 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3489 struct si_shader
*es
= ctx
->shader
;
3490 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3491 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3492 ctx
->param_es2gs_offset
);
3493 LLVMValueRef lds_base
= NULL
;
3497 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3498 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3499 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3500 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3501 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3502 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3503 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3504 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3505 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3508 for (i
= 0; i
< info
->num_outputs
; i
++) {
3511 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3512 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3515 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3516 info
->output_semantic_index
[i
]);
3518 for (chan
= 0; chan
< 4; chan
++) {
3519 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3520 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3522 /* GFX9 has the ESGS ring in LDS. */
3523 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3524 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3528 ac_build_buffer_store_dword(&ctx
->ac
,
3530 out_val
, 1, NULL
, soffset
,
3531 (4 * param
+ chan
) * 4,
3536 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3537 si_set_es_return_value_for_gs(ctx
);
3540 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3542 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3543 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3545 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3548 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3550 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3551 si_get_gs_wave_id(ctx
));
3553 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3554 lp_build_endif(&ctx
->merged_wrap_if_state
);
3557 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3558 unsigned max_outputs
,
3559 LLVMValueRef
*addrs
)
3561 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3562 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3564 assert(info
->num_outputs
<= max_outputs
);
3566 emit_gs_epilogue(ctx
);
3569 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3571 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3572 emit_gs_epilogue(ctx
);
3575 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3576 unsigned max_outputs
,
3577 LLVMValueRef
*addrs
)
3579 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3580 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3581 struct si_shader_output_values
*outputs
= NULL
;
3584 assert(!ctx
->shader
->is_gs_copy_shader
);
3585 assert(info
->num_outputs
<= max_outputs
);
3587 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3589 /* Vertex color clamping.
3591 * This uses a state constant loaded in a user data SGPR and
3592 * an IF statement is added that clamps all colors if the constant
3595 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3596 struct lp_build_if_state if_ctx
;
3597 LLVMValueRef cond
= NULL
;
3598 LLVMValueRef addr
, val
;
3600 for (i
= 0; i
< info
->num_outputs
; i
++) {
3601 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3602 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3605 /* We've found a color. */
3607 /* The state is in the first bit of the user SGPR. */
3608 cond
= LLVMGetParam(ctx
->main_fn
,
3609 ctx
->param_vs_state_bits
);
3610 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3612 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3615 for (j
= 0; j
< 4; j
++) {
3616 addr
= addrs
[4 * i
+ j
];
3617 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3618 val
= ac_build_clamp(&ctx
->ac
, val
);
3619 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3624 lp_build_endif(&if_ctx
);
3627 for (i
= 0; i
< info
->num_outputs
; i
++) {
3628 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3629 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3631 for (j
= 0; j
< 4; j
++) {
3632 outputs
[i
].values
[j
] =
3633 LLVMBuildLoad(ctx
->ac
.builder
,
3636 outputs
[i
].vertex_stream
[j
] =
3637 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3641 if (ctx
->shader
->selector
->so
.num_outputs
)
3642 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3644 /* Export PrimitiveID. */
3645 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3646 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3647 outputs
[i
].semantic_index
= 0;
3648 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3649 for (j
= 1; j
< 4; j
++)
3650 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3652 memset(outputs
[i
].vertex_stream
, 0,
3653 sizeof(outputs
[i
].vertex_stream
));
3657 si_llvm_export_vs(ctx
, outputs
, i
);
3661 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3663 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3665 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3666 &ctx
->outputs
[0][0]);
3669 struct si_ps_exports
{
3671 struct ac_export_args args
[10];
3674 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3675 LLVMValueRef depth
, LLVMValueRef stencil
,
3676 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3678 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3679 struct ac_export_args args
;
3681 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3683 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3686 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3687 LLVMValueRef
*color
, unsigned index
,
3688 unsigned samplemask_param
,
3689 bool is_last
, struct si_ps_exports
*exp
)
3691 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3695 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3696 for (i
= 0; i
< 4; i
++)
3697 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3700 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3701 color
[3] = ctx
->ac
.f32_1
;
3705 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3706 si_alpha_test(bld_base
, color
[3]);
3708 /* Line & polygon smoothing */
3709 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3710 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3713 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3714 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3715 struct ac_export_args args
[8];
3718 /* Get the export arguments, also find out what the last one is. */
3719 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3720 si_llvm_init_export_args(ctx
, color
,
3721 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3722 if (args
[c
].enabled_channels
)
3726 /* Emit all exports. */
3727 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3728 if (is_last
&& last
== c
) {
3729 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3730 args
[c
].done
= 1; /* DONE bit */
3731 } else if (!args
[c
].enabled_channels
)
3732 continue; /* unnecessary NULL export */
3734 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3737 struct ac_export_args args
;
3740 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3743 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3744 args
.done
= 1; /* DONE bit */
3745 } else if (!args
.enabled_channels
)
3746 return; /* unnecessary NULL export */
3748 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3752 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3753 struct si_ps_exports
*exp
)
3755 for (unsigned i
= 0; i
< exp
->num
; i
++)
3756 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3760 * Return PS outputs in this order:
3762 * v[0:3] = color0.xyzw
3763 * v[4:7] = color1.xyzw
3768 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3770 * The alpha-ref SGPR is returned via its original location.
3772 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3773 unsigned max_outputs
,
3774 LLVMValueRef
*addrs
)
3776 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3777 struct si_shader
*shader
= ctx
->shader
;
3778 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3779 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3780 unsigned i
, j
, first_vgpr
, vgpr
;
3782 LLVMValueRef color
[8][4] = {};
3783 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3786 if (ctx
->postponed_kill
)
3787 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3789 /* Read the output values. */
3790 for (i
= 0; i
< info
->num_outputs
; i
++) {
3791 unsigned semantic_name
= info
->output_semantic_name
[i
];
3792 unsigned semantic_index
= info
->output_semantic_index
[i
];
3794 switch (semantic_name
) {
3795 case TGSI_SEMANTIC_COLOR
:
3796 assert(semantic_index
< 8);
3797 for (j
= 0; j
< 4; j
++) {
3798 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3799 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3800 color
[semantic_index
][j
] = result
;
3803 case TGSI_SEMANTIC_POSITION
:
3804 depth
= LLVMBuildLoad(builder
,
3805 addrs
[4 * i
+ 2], "");
3807 case TGSI_SEMANTIC_STENCIL
:
3808 stencil
= LLVMBuildLoad(builder
,
3809 addrs
[4 * i
+ 1], "");
3811 case TGSI_SEMANTIC_SAMPLEMASK
:
3812 samplemask
= LLVMBuildLoad(builder
,
3813 addrs
[4 * i
+ 0], "");
3816 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3821 /* Fill the return structure. */
3822 ret
= ctx
->return_value
;
3825 ret
= LLVMBuildInsertValue(builder
, ret
,
3826 ac_to_integer(&ctx
->ac
,
3827 LLVMGetParam(ctx
->main_fn
,
3828 SI_PARAM_ALPHA_REF
)),
3829 SI_SGPR_ALPHA_REF
, "");
3832 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3833 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3837 for (j
= 0; j
< 4; j
++)
3838 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3841 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3843 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3845 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3847 /* Add the input sample mask for smoothing at the end. */
3848 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3849 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3850 ret
= LLVMBuildInsertValue(builder
, ret
,
3851 LLVMGetParam(ctx
->main_fn
,
3852 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3854 ctx
->return_value
= ret
;
3857 static void membar_emit(
3858 const struct lp_build_tgsi_action
*action
,
3859 struct lp_build_tgsi_context
*bld_base
,
3860 struct lp_build_emit_data
*emit_data
)
3862 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3863 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3864 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3865 unsigned waitcnt
= NOOP_WAITCNT
;
3867 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3868 waitcnt
&= VM_CNT
& LGKM_CNT
;
3870 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3871 TGSI_MEMBAR_SHADER_BUFFER
|
3872 TGSI_MEMBAR_SHADER_IMAGE
))
3875 if (flags
& TGSI_MEMBAR_SHARED
)
3876 waitcnt
&= LGKM_CNT
;
3878 if (waitcnt
!= NOOP_WAITCNT
)
3879 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3882 static void clock_emit(
3883 const struct lp_build_tgsi_action
*action
,
3884 struct lp_build_tgsi_context
*bld_base
,
3885 struct lp_build_emit_data
*emit_data
)
3887 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3888 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3890 emit_data
->output
[0] =
3891 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3892 emit_data
->output
[1] =
3893 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3896 static void si_llvm_emit_ddxy(
3897 const struct lp_build_tgsi_action
*action
,
3898 struct lp_build_tgsi_context
*bld_base
,
3899 struct lp_build_emit_data
*emit_data
)
3901 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3902 unsigned opcode
= emit_data
->info
->opcode
;
3907 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3908 mask
= AC_TID_MASK_LEFT
;
3909 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3910 mask
= AC_TID_MASK_TOP
;
3912 mask
= AC_TID_MASK_TOP_LEFT
;
3914 /* for DDX we want to next X pixel, DDY next Y pixel. */
3915 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3917 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3918 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3919 emit_data
->output
[emit_data
->chan
] = val
;
3923 * this takes an I,J coordinate pair,
3924 * and works out the X and Y derivatives.
3925 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3927 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3928 struct lp_build_tgsi_context
*bld_base
,
3929 LLVMValueRef interp_ij
)
3931 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3932 LLVMValueRef result
[4], a
;
3935 for (i
= 0; i
< 2; i
++) {
3936 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3937 LLVMConstInt(ctx
->i32
, i
, 0), "");
3938 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3939 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3942 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
3945 static void interp_fetch_args(
3946 struct lp_build_tgsi_context
*bld_base
,
3947 struct lp_build_emit_data
*emit_data
)
3949 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3950 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3952 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3953 /* offset is in second src, first two channels */
3954 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
3957 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
3960 emit_data
->arg_count
= 2;
3961 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3962 LLVMValueRef sample_position
;
3963 LLVMValueRef sample_id
;
3964 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3966 /* fetch sample ID, then fetch its sample position,
3967 * and place into first two channels.
3969 sample_id
= lp_build_emit_fetch(bld_base
,
3970 emit_data
->inst
, 1, TGSI_CHAN_X
);
3971 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3973 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3974 * Language 4.50 spec says about interpolateAtSample:
3976 * "Returns the value of the input interpolant variable at
3977 * the location of sample number sample. If multisample
3978 * buffers are not available, the input variable will be
3979 * evaluated at the center of the pixel. If sample sample
3980 * does not exist, the position used to interpolate the
3981 * input variable is undefined."
3983 * This means that sample_id values outside of the valid are
3984 * in fact valid input, and the usual mechanism for loading the
3985 * sample position doesn't work.
3987 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3988 LLVMValueRef center
[4] = {
3989 LLVMConstReal(ctx
->f32
, 0.5),
3990 LLVMConstReal(ctx
->f32
, 0.5),
3995 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
3997 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4000 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4004 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4005 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4008 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4009 emit_data
->arg_count
= 2;
4013 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4014 struct lp_build_tgsi_context
*bld_base
,
4015 struct lp_build_emit_data
*emit_data
)
4017 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4018 struct si_shader
*shader
= ctx
->shader
;
4019 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4020 LLVMValueRef interp_param
;
4021 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4022 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4023 int input_base
, input_array_size
;
4026 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4027 LLVMValueRef array_idx
;
4028 int interp_param_idx
;
4032 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4034 if (input
->Register
.Indirect
) {
4035 unsigned array_id
= input
->Indirect
.ArrayID
;
4038 input_base
= info
->input_array_first
[array_id
];
4039 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4041 input_base
= inst
->Src
[0].Register
.Index
;
4042 input_array_size
= info
->num_inputs
- input_base
;
4045 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4046 1, input
->Register
.Index
- input_base
);
4048 input_base
= inst
->Src
[0].Register
.Index
;
4049 input_array_size
= 1;
4050 array_idx
= ctx
->i32_0
;
4053 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4055 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4056 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4057 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4059 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4061 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4062 if (interp_param_idx
== -1)
4064 else if (interp_param_idx
)
4065 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4067 interp_param
= NULL
;
4069 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4070 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4071 LLVMValueRef ij_out
[2];
4072 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4075 * take the I then J parameters, and the DDX/Y for it, and
4076 * calculate the IJ inputs for the interpolator.
4077 * temp1 = ddx * offset/sample.x + I;
4078 * interp_param.I = ddy * offset/sample.y + temp1;
4079 * temp1 = ddx * offset/sample.x + J;
4080 * interp_param.J = ddy * offset/sample.y + temp1;
4082 for (i
= 0; i
< 2; i
++) {
4083 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4084 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4085 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4086 ddxy_out
, ix_ll
, "");
4087 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4088 ddxy_out
, iy_ll
, "");
4089 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4090 interp_param
, ix_ll
, "");
4091 LLVMValueRef temp1
, temp2
;
4093 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4095 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4097 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4099 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4101 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4103 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4107 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4109 for (chan
= 0; chan
< 4; chan
++) {
4110 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4111 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4113 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4114 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4117 i
= LLVMBuildExtractElement(
4118 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4119 j
= LLVMBuildExtractElement(
4120 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4122 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4125 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4126 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4129 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4130 ctx
->ac
.builder
, gather
, array_idx
, "");
4134 static void vote_all_emit(
4135 const struct lp_build_tgsi_action
*action
,
4136 struct lp_build_tgsi_context
*bld_base
,
4137 struct lp_build_emit_data
*emit_data
)
4139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4141 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4142 emit_data
->output
[emit_data
->chan
] =
4143 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4146 static void vote_any_emit(
4147 const struct lp_build_tgsi_action
*action
,
4148 struct lp_build_tgsi_context
*bld_base
,
4149 struct lp_build_emit_data
*emit_data
)
4151 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4153 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4154 emit_data
->output
[emit_data
->chan
] =
4155 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4158 static void vote_eq_emit(
4159 const struct lp_build_tgsi_action
*action
,
4160 struct lp_build_tgsi_context
*bld_base
,
4161 struct lp_build_emit_data
*emit_data
)
4163 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4165 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4166 emit_data
->output
[emit_data
->chan
] =
4167 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4170 static void ballot_emit(
4171 const struct lp_build_tgsi_action
*action
,
4172 struct lp_build_tgsi_context
*bld_base
,
4173 struct lp_build_emit_data
*emit_data
)
4175 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4176 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4179 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4180 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4181 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4183 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4184 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4187 static void read_invoc_fetch_args(
4188 struct lp_build_tgsi_context
*bld_base
,
4189 struct lp_build_emit_data
*emit_data
)
4191 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4192 0, emit_data
->src_chan
);
4194 /* Always read the source invocation (= lane) from the X channel. */
4195 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4197 emit_data
->arg_count
= 2;
4200 static void read_lane_emit(
4201 const struct lp_build_tgsi_action
*action
,
4202 struct lp_build_tgsi_context
*bld_base
,
4203 struct lp_build_emit_data
*emit_data
)
4205 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4207 /* We currently have no other way to prevent LLVM from lifting the icmp
4208 * calls to a dominating basic block.
4210 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4212 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4213 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4215 emit_data
->output
[emit_data
->chan
] =
4216 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4217 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4218 AC_FUNC_ATTR_READNONE
|
4219 AC_FUNC_ATTR_CONVERGENT
);
4222 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4223 struct lp_build_emit_data
*emit_data
)
4225 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4226 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4230 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4232 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4233 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4237 /* Emit one vertex from the geometry shader */
4238 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4240 LLVMValueRef
*addrs
)
4242 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4243 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4244 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4245 struct si_shader
*shader
= ctx
->shader
;
4246 struct lp_build_if_state if_state
;
4247 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4248 ctx
->param_gs2vs_offset
);
4249 LLVMValueRef gs_next_vertex
;
4250 LLVMValueRef can_emit
;
4251 unsigned chan
, offset
;
4254 /* Write vertex attribute values to GSVS ring */
4255 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4256 ctx
->gs_next_vertex
[stream
],
4259 /* If this thread has already emitted the declared maximum number of
4260 * vertices, skip the write: excessive vertex emissions are not
4261 * supposed to have any effect.
4263 * If the shader has no writes to memory, kill it instead. This skips
4264 * further memory loads and may allow LLVM to skip to the end
4267 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4268 LLVMConstInt(ctx
->i32
,
4269 shader
->selector
->gs_max_out_vertices
, 0), "");
4271 bool use_kill
= !info
->writes_memory
;
4273 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4275 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4279 for (i
= 0; i
< info
->num_outputs
; i
++) {
4280 for (chan
= 0; chan
< 4; chan
++) {
4281 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4282 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4285 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4286 LLVMValueRef voffset
=
4287 LLVMConstInt(ctx
->i32
, offset
*
4288 shader
->selector
->gs_max_out_vertices
, 0);
4291 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4292 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4294 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4296 ac_build_buffer_store_dword(&ctx
->ac
,
4297 ctx
->gsvs_ring
[stream
],
4299 voffset
, soffset
, 0,
4304 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4307 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4309 /* Signal vertex emission */
4310 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4311 si_get_gs_wave_id(ctx
));
4313 lp_build_endif(&if_state
);
4316 /* Emit one vertex from the geometry shader */
4317 static void si_tgsi_emit_vertex(
4318 const struct lp_build_tgsi_action
*action
,
4319 struct lp_build_tgsi_context
*bld_base
,
4320 struct lp_build_emit_data
*emit_data
)
4322 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4323 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4325 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4328 /* Cut one primitive from the geometry shader */
4329 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4332 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4334 /* Signal primitive cut */
4335 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4336 si_get_gs_wave_id(ctx
));
4339 /* Cut one primitive from the geometry shader */
4340 static void si_tgsi_emit_primitive(
4341 const struct lp_build_tgsi_action
*action
,
4342 struct lp_build_tgsi_context
*bld_base
,
4343 struct lp_build_emit_data
*emit_data
)
4345 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4347 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4350 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4351 struct lp_build_tgsi_context
*bld_base
,
4352 struct lp_build_emit_data
*emit_data
)
4354 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4356 /* SI only (thanks to a hw bug workaround):
4357 * The real barrier instruction isn’t needed, because an entire patch
4358 * always fits into a single wave.
4360 if (ctx
->screen
->info
.chip_class
== SI
&&
4361 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4362 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4366 lp_build_intrinsic(ctx
->ac
.builder
,
4367 "llvm.amdgcn.s.barrier",
4368 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4371 static const struct lp_build_tgsi_action interp_action
= {
4372 .fetch_args
= interp_fetch_args
,
4373 .emit
= build_interp_intrinsic
,
4376 static void si_create_function(struct si_shader_context
*ctx
,
4378 LLVMTypeRef
*returns
, unsigned num_returns
,
4379 struct si_function_info
*fninfo
,
4380 unsigned max_workgroup_size
)
4384 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4385 fninfo
->types
, fninfo
->num_params
);
4386 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4388 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4389 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4391 /* The combination of:
4395 * allows the optimization passes to move loads and reduces
4396 * SGPR spilling significantly.
4398 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4400 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4401 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4402 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4406 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4407 if (fninfo
->assign
[i
])
4408 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4411 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-32bit-address-high-bits",
4412 ctx
->screen
->info
.address32_hi
);
4414 if (max_workgroup_size
) {
4415 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4416 max_workgroup_size
);
4418 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4419 "no-signed-zeros-fp-math",
4422 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4423 /* These were copied from some LLVM test. */
4424 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4425 "less-precise-fpmad",
4427 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4430 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4433 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4439 static void declare_streamout_params(struct si_shader_context
*ctx
,
4440 struct pipe_stream_output_info
*so
,
4441 struct si_function_info
*fninfo
)
4445 /* Streamout SGPRs. */
4446 if (so
->num_outputs
) {
4447 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4448 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4450 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4452 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4454 /* A streamout buffer offset is loaded if the stride is non-zero. */
4455 for (i
= 0; i
< 4; i
++) {
4459 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4463 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4465 switch (shader
->selector
->type
) {
4466 case PIPE_SHADER_TESS_CTRL
:
4467 /* Return this so that LLVM doesn't remove s_barrier
4468 * instructions on chips where we use s_barrier. */
4469 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4471 case PIPE_SHADER_GEOMETRY
:
4472 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4474 case PIPE_SHADER_COMPUTE
:
4475 break; /* see below */
4481 const unsigned *properties
= shader
->selector
->info
.properties
;
4482 unsigned max_work_group_size
=
4483 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4484 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4485 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4487 if (!max_work_group_size
) {
4488 /* This is a variable group size compute shader,
4489 * compile it for the maximum possible group size.
4491 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4493 return max_work_group_size
;
4496 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4497 struct si_function_info
*fninfo
,
4500 LLVMTypeRef const_shader_buf_type
;
4502 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4503 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4504 const_shader_buf_type
= ctx
->f32
;
4506 const_shader_buf_type
= ctx
->v4i32
;
4508 unsigned const_and_shader_buffers
=
4509 add_arg(fninfo
, ARG_SGPR
,
4510 ac_array_in_const32_addr_space(const_shader_buf_type
));
4513 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4516 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4517 struct si_function_info
*fninfo
,
4520 unsigned samplers_and_images
=
4521 add_arg(fninfo
, ARG_SGPR
,
4522 ac_array_in_const32_addr_space(ctx
->v8i32
));
4525 ctx
->param_samplers_and_images
= samplers_and_images
;
4528 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4529 struct si_function_info
*fninfo
,
4532 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4533 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4536 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4537 struct si_function_info
*fninfo
)
4539 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4540 ac_array_in_const32_addr_space(ctx
->v4i32
));
4541 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4542 ac_array_in_const32_addr_space(ctx
->v8i32
));
4545 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4546 struct si_function_info
*fninfo
)
4548 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4549 ac_array_in_const32_addr_space(ctx
->v4i32
));
4550 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4551 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4552 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4553 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4556 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4557 struct si_function_info
*fninfo
,
4558 unsigned *num_prolog_vgprs
)
4560 struct si_shader
*shader
= ctx
->shader
;
4562 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4563 if (shader
->key
.as_ls
) {
4564 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4565 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4567 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4568 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4570 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4572 if (!shader
->is_gs_copy_shader
) {
4573 /* Vertex load indices. */
4574 ctx
->param_vertex_index0
= fninfo
->num_params
;
4575 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4576 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4577 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4581 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4582 struct si_function_info
*fninfo
)
4584 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4585 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4586 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4587 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4591 /* Convenient merged shader definitions. */
4592 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4593 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4596 static void create_function(struct si_shader_context
*ctx
)
4598 struct si_shader
*shader
= ctx
->shader
;
4599 struct si_function_info fninfo
;
4600 LLVMTypeRef returns
[16+32*4];
4601 unsigned i
, num_return_sgprs
;
4602 unsigned num_returns
= 0;
4603 unsigned num_prolog_vgprs
= 0;
4604 unsigned type
= ctx
->type
;
4605 unsigned vs_blit_property
=
4606 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4608 si_init_function_info(&fninfo
);
4610 /* Set MERGED shaders. */
4611 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4612 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4613 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4614 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4615 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4618 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4621 case PIPE_SHADER_VERTEX
:
4622 declare_global_desc_pointers(ctx
, &fninfo
);
4624 if (vs_blit_property
) {
4625 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4626 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4627 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4628 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4630 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4631 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4632 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4633 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4634 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4635 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4636 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4637 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4638 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4639 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4640 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4641 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4645 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4649 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4650 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4652 if (shader
->key
.as_es
) {
4653 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4654 } else if (shader
->key
.as_ls
) {
4655 /* no extra parameters */
4657 if (shader
->is_gs_copy_shader
) {
4658 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4659 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4662 /* The locations of the other parameters are assigned dynamically. */
4663 declare_streamout_params(ctx
, &shader
->selector
->so
,
4668 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4671 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4672 declare_global_desc_pointers(ctx
, &fninfo
);
4673 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4674 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4675 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4676 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4677 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4678 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4679 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4680 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4681 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4684 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4685 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4687 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4688 * placed after the user SGPRs.
4690 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4691 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4692 for (i
= 0; i
< 11; i
++)
4693 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4696 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4697 /* Merged stages have 8 system SGPRs at the beginning. */
4698 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4699 if (HAVE_32BIT_POINTERS
) {
4700 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4701 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4703 declare_const_and_shader_buffers(ctx
, &fninfo
,
4704 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4706 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4707 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4708 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4709 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4710 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4711 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4713 declare_global_desc_pointers(ctx
, &fninfo
);
4714 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4715 ctx
->type
== PIPE_SHADER_VERTEX
);
4716 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4718 if (!HAVE_32BIT_POINTERS
) {
4719 declare_samplers_and_images(ctx
, &fninfo
,
4720 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4722 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4723 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4724 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4725 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4726 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4728 /* VGPRs (first TCS, then VS) */
4729 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4730 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4732 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4733 declare_vs_input_vgprs(ctx
, &fninfo
,
4736 /* LS return values are inputs to the TCS main shader part. */
4737 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4738 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4739 for (i
= 0; i
< 2; i
++)
4740 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4742 /* TCS return values are inputs to the TCS epilog.
4744 * param_tcs_offchip_offset, param_tcs_factor_offset,
4745 * param_tcs_offchip_layout, and param_rw_buffers
4746 * should be passed to the epilog.
4748 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4749 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4750 for (i
= 0; i
< 11; i
++)
4751 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4755 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4756 /* Merged stages have 8 system SGPRs at the beginning. */
4757 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4758 if (HAVE_32BIT_POINTERS
) {
4759 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4760 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4762 declare_const_and_shader_buffers(ctx
, &fninfo
,
4763 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4765 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4766 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4767 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4768 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4769 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4770 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4772 declare_global_desc_pointers(ctx
, &fninfo
);
4773 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4774 (ctx
->type
== PIPE_SHADER_VERTEX
||
4775 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4776 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4777 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4779 /* TESS_EVAL (and also GEOMETRY):
4780 * Declare as many input SGPRs as the VS has. */
4781 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4782 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4783 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4784 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4785 if (!HAVE_32BIT_POINTERS
)
4786 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4787 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4790 if (!HAVE_32BIT_POINTERS
) {
4791 declare_samplers_and_images(ctx
, &fninfo
,
4792 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4795 /* VGPRs (first GS, then VS/TES) */
4796 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4797 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4798 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4799 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4800 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4802 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4803 declare_vs_input_vgprs(ctx
, &fninfo
,
4805 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4806 declare_tes_input_vgprs(ctx
, &fninfo
);
4809 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4810 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4811 /* ES return values are inputs to GS. */
4812 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4813 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4814 for (i
= 0; i
< 5; i
++)
4815 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4819 case PIPE_SHADER_TESS_EVAL
:
4820 declare_global_desc_pointers(ctx
, &fninfo
);
4821 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4822 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4823 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4825 if (shader
->key
.as_es
) {
4826 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4827 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4828 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4830 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 declare_streamout_params(ctx
, &shader
->selector
->so
,
4833 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4837 declare_tes_input_vgprs(ctx
, &fninfo
);
4840 case PIPE_SHADER_GEOMETRY
:
4841 declare_global_desc_pointers(ctx
, &fninfo
);
4842 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4843 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4844 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4847 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4848 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4849 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4850 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4851 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4852 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4853 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4854 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4857 case PIPE_SHADER_FRAGMENT
:
4858 declare_global_desc_pointers(ctx
, &fninfo
);
4859 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4860 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4861 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4862 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4864 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4865 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4866 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4867 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4868 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4869 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4870 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4871 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4872 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4873 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4874 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4875 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4876 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4877 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4878 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4879 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4880 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4881 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4882 shader
->info
.face_vgpr_index
= 20;
4883 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4884 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4885 shader
->info
.ancillary_vgpr_index
= 21;
4886 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4887 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4888 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4890 /* Color inputs from the prolog. */
4891 if (shader
->selector
->info
.colors_read
) {
4892 unsigned num_color_elements
=
4893 util_bitcount(shader
->selector
->info
.colors_read
);
4895 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4896 for (i
= 0; i
< num_color_elements
; i
++)
4897 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4899 num_prolog_vgprs
+= num_color_elements
;
4902 /* Outputs for the epilog. */
4903 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4906 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4907 shader
->selector
->info
.writes_z
+
4908 shader
->selector
->info
.writes_stencil
+
4909 shader
->selector
->info
.writes_samplemask
+
4910 1 /* SampleMaskIn */;
4912 num_returns
= MAX2(num_returns
,
4914 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4916 for (i
= 0; i
< num_return_sgprs
; i
++)
4917 returns
[i
] = ctx
->i32
;
4918 for (; i
< num_returns
; i
++)
4919 returns
[i
] = ctx
->f32
;
4922 case PIPE_SHADER_COMPUTE
:
4923 declare_global_desc_pointers(ctx
, &fninfo
);
4924 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4925 if (shader
->selector
->info
.uses_grid_size
)
4926 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4927 if (shader
->selector
->info
.uses_block_size
)
4928 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4930 for (i
= 0; i
< 3; i
++) {
4931 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4932 if (shader
->selector
->info
.uses_block_id
[i
])
4933 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4936 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4939 assert(0 && "unimplemented shader");
4943 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4944 si_get_max_workgroup_size(shader
));
4946 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4947 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4948 ctx
->separate_prolog
) {
4949 si_llvm_add_attribute(ctx
->main_fn
,
4950 "InitialPSInputAddr",
4951 S_0286D0_PERSP_SAMPLE_ENA(1) |
4952 S_0286D0_PERSP_CENTER_ENA(1) |
4953 S_0286D0_PERSP_CENTROID_ENA(1) |
4954 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4955 S_0286D0_LINEAR_CENTER_ENA(1) |
4956 S_0286D0_LINEAR_CENTROID_ENA(1) |
4957 S_0286D0_FRONT_FACE_ENA(1) |
4958 S_0286D0_ANCILLARY_ENA(1) |
4959 S_0286D0_POS_FIXED_PT_ENA(1));
4962 shader
->info
.num_input_sgprs
= 0;
4963 shader
->info
.num_input_vgprs
= 0;
4965 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4966 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4968 for (; i
< fninfo
.num_params
; ++i
)
4969 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4971 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4972 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4974 if (shader
->key
.as_ls
||
4975 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4976 /* GFX9 has the ESGS ring buffer in LDS. */
4977 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4978 ac_declare_lds_as_pointer(&ctx
->ac
);
4982 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4985 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4987 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4989 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4990 ctx
->param_rw_buffers
);
4992 if (ctx
->screen
->info
.chip_class
<= VI
&&
4993 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4995 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4997 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5000 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5003 if (ctx
->shader
->is_gs_copy_shader
) {
5004 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5007 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5008 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5009 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5010 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5011 LLVMValueRef base_ring
;
5013 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5015 /* The conceptual layout of the GSVS ring is
5016 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5017 * but the real memory layout is swizzled across
5019 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5021 * Override the buffer descriptor accordingly.
5023 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5024 uint64_t stream_offset
= 0;
5026 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5027 unsigned num_components
;
5029 unsigned num_records
;
5030 LLVMValueRef ring
, tmp
;
5032 num_components
= sel
->info
.num_stream_output_components
[stream
];
5033 if (!num_components
)
5036 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5038 /* Limit on the stride field for <= CIK. */
5039 assert(stride
< (1 << 14));
5043 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5044 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5045 tmp
= LLVMBuildAdd(builder
, tmp
,
5046 LLVMConstInt(ctx
->i64
,
5047 stream_offset
, 0), "");
5048 stream_offset
+= stride
* 64;
5050 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5051 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5052 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5053 tmp
= LLVMBuildOr(builder
, tmp
,
5054 LLVMConstInt(ctx
->i32
,
5055 S_008F04_STRIDE(stride
) |
5056 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5057 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5058 ring
= LLVMBuildInsertElement(builder
, ring
,
5059 LLVMConstInt(ctx
->i32
, num_records
, 0),
5060 LLVMConstInt(ctx
->i32
, 2, 0), "");
5061 ring
= LLVMBuildInsertElement(builder
, ring
,
5062 LLVMConstInt(ctx
->i32
,
5063 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5064 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5065 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5066 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5067 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5068 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5069 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5070 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5071 S_008F0C_ADD_TID_ENABLE(1),
5073 LLVMConstInt(ctx
->i32
, 3, 0), "");
5075 ctx
->gsvs_ring
[stream
] = ring
;
5080 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5081 LLVMValueRef param_rw_buffers
,
5082 unsigned param_pos_fixed_pt
)
5084 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5085 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5087 /* Use the fixed-point gl_FragCoord input.
5088 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5089 * per coordinate to get the repeating effect.
5091 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5092 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5094 /* Load the buffer descriptor. */
5095 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5096 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5098 /* The stipple pattern is 32x32, each row has 32 bits. */
5099 offset
= LLVMBuildMul(builder
, address
[1],
5100 LLVMConstInt(ctx
->i32
, 4, 0), "");
5101 row
= buffer_load_const(ctx
, desc
, offset
);
5102 row
= ac_to_integer(&ctx
->ac
, row
);
5103 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5104 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5105 ac_build_kill_if_false(&ctx
->ac
, bit
);
5108 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5109 struct si_shader_config
*conf
,
5110 unsigned symbol_offset
)
5113 const unsigned char *config
=
5114 ac_shader_binary_config_start(binary
, symbol_offset
);
5115 bool really_needs_scratch
= false;
5117 /* LLVM adds SGPR spills to the scratch size.
5118 * Find out if we really need the scratch buffer.
5120 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5121 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5123 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5124 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5125 really_needs_scratch
= true;
5130 /* XXX: We may be able to emit some of these values directly rather than
5131 * extracting fields to be emitted later.
5134 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5135 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5136 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5138 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5139 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5140 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5141 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5142 case R_00B848_COMPUTE_PGM_RSRC1
:
5143 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5144 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5145 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5146 conf
->rsrc1
= value
;
5148 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5149 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5151 case R_00B84C_COMPUTE_PGM_RSRC2
:
5152 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5153 conf
->rsrc2
= value
;
5155 case R_0286CC_SPI_PS_INPUT_ENA
:
5156 conf
->spi_ps_input_ena
= value
;
5158 case R_0286D0_SPI_PS_INPUT_ADDR
:
5159 conf
->spi_ps_input_addr
= value
;
5161 case R_0286E8_SPI_TMPRING_SIZE
:
5162 case R_00B860_COMPUTE_TMPRING_SIZE
:
5163 /* WAVESIZE is in units of 256 dwords. */
5164 if (really_needs_scratch
)
5165 conf
->scratch_bytes_per_wave
=
5166 G_00B860_WAVESIZE(value
) * 256 * 4;
5168 case 0x4: /* SPILLED_SGPRS */
5169 conf
->spilled_sgprs
= value
;
5171 case 0x8: /* SPILLED_VGPRS */
5172 conf
->spilled_vgprs
= value
;
5176 static bool printed
;
5179 fprintf(stderr
, "Warning: LLVM emitted unknown "
5180 "config register: 0x%x\n", reg
);
5188 if (!conf
->spi_ps_input_addr
)
5189 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5192 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5193 uint64_t scratch_va
)
5196 uint32_t scratch_rsrc_dword0
= scratch_va
;
5197 uint32_t scratch_rsrc_dword1
=
5198 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5200 /* Enable scratch coalescing. */
5201 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5203 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5204 const struct ac_shader_reloc
*reloc
=
5205 &shader
->binary
.relocs
[i
];
5206 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5207 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5208 &scratch_rsrc_dword0
, 4);
5209 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5210 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5211 &scratch_rsrc_dword1
, 4);
5216 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5218 unsigned size
= shader
->binary
.code_size
;
5221 size
+= shader
->prolog
->binary
.code_size
;
5222 if (shader
->previous_stage
)
5223 size
+= shader
->previous_stage
->binary
.code_size
;
5224 if (shader
->prolog2
)
5225 size
+= shader
->prolog2
->binary
.code_size
;
5227 size
+= shader
->epilog
->binary
.code_size
;
5231 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5233 const struct ac_shader_binary
*prolog
=
5234 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5235 const struct ac_shader_binary
*previous_stage
=
5236 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5237 const struct ac_shader_binary
*prolog2
=
5238 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5239 const struct ac_shader_binary
*epilog
=
5240 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5241 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5242 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5243 (!epilog
? mainb
->rodata_size
: 0);
5246 assert(!prolog
|| !prolog
->rodata_size
);
5247 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5248 assert(!prolog2
|| !prolog2
->rodata_size
);
5249 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5250 !mainb
->rodata_size
);
5251 assert(!epilog
|| !epilog
->rodata_size
);
5253 r600_resource_reference(&shader
->bo
, NULL
);
5254 shader
->bo
= (struct r600_resource
*)
5255 si_aligned_buffer_create(&sscreen
->b
,
5256 sscreen
->cpdma_prefetch_writes_memory
?
5257 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5258 PIPE_USAGE_IMMUTABLE
,
5259 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5265 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5266 PIPE_TRANSFER_READ_WRITE
|
5267 PIPE_TRANSFER_UNSYNCHRONIZED
);
5269 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5270 * endian-independent. */
5272 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5273 ptr
+= prolog
->code_size
;
5275 if (previous_stage
) {
5276 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5277 ptr
+= previous_stage
->code_size
;
5280 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5281 ptr
+= prolog2
->code_size
;
5284 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5285 ptr
+= mainb
->code_size
;
5288 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5289 else if (mainb
->rodata_size
> 0)
5290 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5292 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5296 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5297 struct pipe_debug_callback
*debug
,
5298 const char *name
, FILE *file
)
5303 if (binary
->disasm_string
) {
5304 fprintf(file
, "Shader %s disassembly:\n", name
);
5305 fprintf(file
, "%s", binary
->disasm_string
);
5307 if (debug
&& debug
->debug_message
) {
5308 /* Very long debug messages are cut off, so send the
5309 * disassembly one line at a time. This causes more
5310 * overhead, but on the plus side it simplifies
5311 * parsing of resulting logs.
5313 pipe_debug_message(debug
, SHADER_INFO
,
5314 "Shader Disassembly Begin");
5316 line
= binary
->disasm_string
;
5318 p
= util_strchrnul(line
, '\n');
5322 pipe_debug_message(debug
, SHADER_INFO
,
5323 "%.*s", count
, line
);
5331 pipe_debug_message(debug
, SHADER_INFO
,
5332 "Shader Disassembly End");
5335 fprintf(file
, "Shader %s binary:\n", name
);
5336 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5337 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5338 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5339 binary
->code
[i
+ 1], binary
->code
[i
]);
5344 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5346 struct si_screen
*sscreen
= shader
->selector
->screen
;
5347 struct si_shader_config
*conf
= &shader
->config
;
5348 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5349 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5350 unsigned lds_per_wave
= 0;
5351 unsigned max_simd_waves
;
5353 switch (sscreen
->info
.family
) {
5354 /* These always have 8 waves: */
5355 case CHIP_POLARIS10
:
5356 case CHIP_POLARIS11
:
5357 case CHIP_POLARIS12
:
5361 max_simd_waves
= 10;
5364 /* Compute LDS usage for PS. */
5365 switch (shader
->selector
->type
) {
5366 case PIPE_SHADER_FRAGMENT
:
5367 /* The minimum usage per wave is (num_inputs * 48). The maximum
5368 * usage is (num_inputs * 48 * 16).
5369 * We can get anything in between and it varies between waves.
5371 * The 48 bytes per input for a single primitive is equal to
5372 * 4 bytes/component * 4 components/input * 3 points.
5374 * Other stages don't know the size at compile time or don't
5375 * allocate LDS per wave, but instead they do it per thread group.
5377 lds_per_wave
= conf
->lds_size
* lds_increment
+
5378 align(num_inputs
* 48, lds_increment
);
5380 case PIPE_SHADER_COMPUTE
:
5381 if (shader
->selector
) {
5382 unsigned max_workgroup_size
=
5383 si_get_max_workgroup_size(shader
);
5384 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5385 DIV_ROUND_UP(max_workgroup_size
, 64);
5390 /* Compute the per-SIMD wave counts. */
5391 if (conf
->num_sgprs
) {
5392 if (sscreen
->info
.chip_class
>= VI
)
5393 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5395 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5398 if (conf
->num_vgprs
)
5399 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5401 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5402 * 16KB makes some SIMDs unoccupied). */
5404 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5406 conf
->max_simd_waves
= max_simd_waves
;
5409 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5410 struct pipe_debug_callback
*debug
)
5412 const struct si_shader_config
*conf
= &shader
->config
;
5414 pipe_debug_message(debug
, SHADER_INFO
,
5415 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5416 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5417 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5418 conf
->num_sgprs
, conf
->num_vgprs
,
5419 si_get_shader_binary_size(shader
),
5420 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5421 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5422 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5425 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5426 const struct si_shader
*shader
,
5429 bool check_debug_option
)
5431 const struct si_shader_config
*conf
= &shader
->config
;
5433 if (!check_debug_option
||
5434 si_can_dump_shader(sscreen
, processor
)) {
5435 if (processor
== PIPE_SHADER_FRAGMENT
) {
5436 fprintf(file
, "*** SHADER CONFIG ***\n"
5437 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5438 "SPI_PS_INPUT_ENA = 0x%04x\n",
5439 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5442 fprintf(file
, "*** SHADER STATS ***\n"
5445 "Spilled SGPRs: %d\n"
5446 "Spilled VGPRs: %d\n"
5447 "Private memory VGPRs: %d\n"
5448 "Code Size: %d bytes\n"
5450 "Scratch: %d bytes per wave\n"
5452 "********************\n\n\n",
5453 conf
->num_sgprs
, conf
->num_vgprs
,
5454 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5455 conf
->private_mem_vgprs
,
5456 si_get_shader_binary_size(shader
),
5457 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5458 conf
->max_simd_waves
);
5462 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5464 switch (processor
) {
5465 case PIPE_SHADER_VERTEX
:
5466 if (shader
->key
.as_es
)
5467 return "Vertex Shader as ES";
5468 else if (shader
->key
.as_ls
)
5469 return "Vertex Shader as LS";
5471 return "Vertex Shader as VS";
5472 case PIPE_SHADER_TESS_CTRL
:
5473 return "Tessellation Control Shader";
5474 case PIPE_SHADER_TESS_EVAL
:
5475 if (shader
->key
.as_es
)
5476 return "Tessellation Evaluation Shader as ES";
5478 return "Tessellation Evaluation Shader as VS";
5479 case PIPE_SHADER_GEOMETRY
:
5480 if (shader
->is_gs_copy_shader
)
5481 return "GS Copy Shader as VS";
5483 return "Geometry Shader";
5484 case PIPE_SHADER_FRAGMENT
:
5485 return "Pixel Shader";
5486 case PIPE_SHADER_COMPUTE
:
5487 return "Compute Shader";
5489 return "Unknown Shader";
5493 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5494 struct pipe_debug_callback
*debug
, unsigned processor
,
5495 FILE *file
, bool check_debug_option
)
5497 if (!check_debug_option
||
5498 si_can_dump_shader(sscreen
, processor
))
5499 si_dump_shader_key(processor
, shader
, file
);
5501 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5502 if (shader
->previous_stage
&&
5503 shader
->previous_stage
->binary
.llvm_ir_string
) {
5504 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5505 si_get_shader_name(shader
, processor
));
5506 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5509 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5510 si_get_shader_name(shader
, processor
));
5511 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5514 if (!check_debug_option
||
5515 (si_can_dump_shader(sscreen
, processor
) &&
5516 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5517 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5520 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5521 debug
, "prolog", file
);
5522 if (shader
->previous_stage
)
5523 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5524 debug
, "previous stage", file
);
5525 if (shader
->prolog2
)
5526 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5527 debug
, "prolog2", file
);
5529 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5532 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5533 debug
, "epilog", file
);
5534 fprintf(file
, "\n");
5537 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5538 check_debug_option
);
5541 static int si_compile_llvm(struct si_screen
*sscreen
,
5542 struct ac_shader_binary
*binary
,
5543 struct si_shader_config
*conf
,
5544 LLVMTargetMachineRef tm
,
5546 struct pipe_debug_callback
*debug
,
5551 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5553 if (si_can_dump_shader(sscreen
, processor
)) {
5554 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5556 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5557 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5558 ac_dump_module(mod
);
5559 fprintf(stderr
, "\n");
5563 if (sscreen
->record_llvm_ir
) {
5564 char *ir
= LLVMPrintModuleToString(mod
);
5565 binary
->llvm_ir_string
= strdup(ir
);
5566 LLVMDisposeMessage(ir
);
5569 if (!si_replace_shader(count
, binary
)) {
5570 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5575 si_shader_binary_read_config(binary
, conf
, 0);
5577 /* Enable 64-bit and 16-bit denormals, because there is no performance
5580 * If denormals are enabled, all floating-point output modifiers are
5583 * Don't enable denormals for 32-bit floats, because:
5584 * - Floating-point output modifiers would be ignored by the hw.
5585 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5586 * have to stop using those.
5587 * - SI & CI would be very slow.
5589 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5591 FREE(binary
->config
);
5592 FREE(binary
->global_symbol_offsets
);
5593 binary
->config
= NULL
;
5594 binary
->global_symbol_offsets
= NULL
;
5596 /* Some shaders can't have rodata because their binaries can be
5599 if (binary
->rodata_size
&&
5600 (processor
== PIPE_SHADER_VERTEX
||
5601 processor
== PIPE_SHADER_TESS_CTRL
||
5602 processor
== PIPE_SHADER_TESS_EVAL
||
5603 processor
== PIPE_SHADER_FRAGMENT
)) {
5604 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5611 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5613 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5614 LLVMBuildRetVoid(ctx
->ac
.builder
);
5616 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5619 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5621 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5622 LLVMTargetMachineRef tm
,
5623 struct si_shader_selector
*gs_selector
,
5624 struct pipe_debug_callback
*debug
)
5626 struct si_shader_context ctx
;
5627 struct si_shader
*shader
;
5628 LLVMBuilderRef builder
;
5629 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5630 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5631 struct si_shader_output_values
*outputs
;
5632 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5635 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5640 shader
= CALLOC_STRUCT(si_shader
);
5646 /* We can leave the fence as permanently signaled because the GS copy
5647 * shader only becomes visible globally after it has been compiled. */
5648 util_queue_fence_init(&shader
->ready
);
5650 shader
->selector
= gs_selector
;
5651 shader
->is_gs_copy_shader
= true;
5653 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5654 ctx
.shader
= shader
;
5655 ctx
.type
= PIPE_SHADER_VERTEX
;
5657 builder
= ctx
.ac
.builder
;
5659 create_function(&ctx
);
5660 preload_ring_buffers(&ctx
);
5662 LLVMValueRef voffset
=
5663 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5665 /* Fetch the vertex stream ID.*/
5666 LLVMValueRef stream_id
;
5668 if (gs_selector
->so
.num_outputs
)
5669 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5671 stream_id
= ctx
.i32_0
;
5673 /* Fill in output information. */
5674 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5675 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5676 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5678 for (int chan
= 0; chan
< 4; chan
++) {
5679 outputs
[i
].vertex_stream
[chan
] =
5680 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5684 LLVMBasicBlockRef end_bb
;
5685 LLVMValueRef switch_inst
;
5687 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5688 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5690 for (int stream
= 0; stream
< 4; stream
++) {
5691 LLVMBasicBlockRef bb
;
5694 if (!gsinfo
->num_stream_output_components
[stream
])
5697 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5700 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5701 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5702 LLVMPositionBuilderAtEnd(builder
, bb
);
5704 /* Fetch vertex data from GSVS ring */
5706 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5707 for (unsigned chan
= 0; chan
< 4; chan
++) {
5708 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5709 outputs
[i
].vertex_stream
[chan
] != stream
) {
5710 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5714 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5715 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5718 outputs
[i
].values
[chan
] =
5719 ac_build_buffer_load(&ctx
.ac
,
5720 ctx
.gsvs_ring
[0], 1,
5727 /* Streamout and exports. */
5728 if (gs_selector
->so
.num_outputs
) {
5729 si_llvm_emit_streamout(&ctx
, outputs
,
5730 gsinfo
->num_outputs
,
5735 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5737 LLVMBuildBr(builder
, end_bb
);
5740 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5742 LLVMBuildRetVoid(ctx
.ac
.builder
);
5744 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5745 si_llvm_optimize_module(&ctx
);
5747 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5748 &ctx
.shader
->config
, ctx
.tm
,
5750 debug
, PIPE_SHADER_GEOMETRY
,
5753 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5754 fprintf(stderr
, "GS Copy Shader:\n");
5755 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5756 PIPE_SHADER_GEOMETRY
, stderr
, true);
5757 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5760 si_llvm_dispose(&ctx
);
5771 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5772 const struct si_vs_prolog_bits
*prolog
,
5773 const char *prefix
, FILE *f
)
5775 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5776 prefix
, prolog
->instance_divisor_is_one
);
5777 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5778 prefix
, prolog
->instance_divisor_is_fetched
);
5779 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5780 prefix
, prolog
->ls_vgpr_fix
);
5782 fprintf(f
, " mono.vs.fix_fetch = {");
5783 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5784 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5788 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5791 const struct si_shader_key
*key
= &shader
->key
;
5793 fprintf(f
, "SHADER KEY\n");
5795 switch (processor
) {
5796 case PIPE_SHADER_VERTEX
:
5797 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5798 "part.vs.prolog", f
);
5799 fprintf(f
, " as_es = %u\n", key
->as_es
);
5800 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5801 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5802 key
->mono
.u
.vs_export_prim_id
);
5805 case PIPE_SHADER_TESS_CTRL
:
5806 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5807 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5808 "part.tcs.ls_prolog", f
);
5810 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5811 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5814 case PIPE_SHADER_TESS_EVAL
:
5815 fprintf(f
, " as_es = %u\n", key
->as_es
);
5816 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5817 key
->mono
.u
.vs_export_prim_id
);
5820 case PIPE_SHADER_GEOMETRY
:
5821 if (shader
->is_gs_copy_shader
)
5824 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5825 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5826 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5827 "part.gs.vs_prolog", f
);
5829 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5832 case PIPE_SHADER_COMPUTE
:
5835 case PIPE_SHADER_FRAGMENT
:
5836 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5837 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5838 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5839 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5840 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5841 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5842 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5843 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5844 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5845 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5846 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5847 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5848 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5849 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5850 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5851 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5852 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5859 if ((processor
== PIPE_SHADER_GEOMETRY
||
5860 processor
== PIPE_SHADER_TESS_EVAL
||
5861 processor
== PIPE_SHADER_VERTEX
) &&
5862 !key
->as_es
&& !key
->as_ls
) {
5863 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5864 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5868 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5869 struct si_screen
*sscreen
,
5870 LLVMTargetMachineRef tm
)
5872 struct lp_build_tgsi_context
*bld_base
;
5874 si_llvm_context_init(ctx
, sscreen
, tm
);
5876 bld_base
= &ctx
->bld_base
;
5877 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5879 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5880 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5881 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5883 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5885 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5887 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5888 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5889 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5890 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5892 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5893 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5894 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5895 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5896 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5897 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5898 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5899 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5900 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5902 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5903 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5904 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5907 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5909 struct si_shader
*shader
= ctx
->shader
;
5910 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5912 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5913 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5914 shader
->key
.as_ls
||
5918 ac_optimize_vs_outputs(&ctx
->ac
,
5920 shader
->info
.vs_output_param_offset
,
5922 &shader
->info
.nr_param_exports
);
5925 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5927 ctx
->shader
->config
.private_mem_vgprs
= 0;
5929 /* Process all LLVM instructions. */
5930 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5932 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5935 LLVMValueRef inst
= next
;
5936 next
= LLVMGetNextInstruction(next
);
5938 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5941 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5942 /* No idea why LLVM aligns allocas to 4 elements. */
5943 unsigned alignment
= LLVMGetAlignment(inst
);
5944 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5945 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5947 bb
= LLVMGetNextBasicBlock(bb
);
5951 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5952 unsigned param
, unsigned bitoffset
)
5954 LLVMValueRef args
[] = {
5955 LLVMGetParam(ctx
->main_fn
, param
),
5956 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5958 lp_build_intrinsic(ctx
->ac
.builder
,
5959 "llvm.amdgcn.init.exec.from.input",
5960 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5963 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5964 const struct si_vs_prolog_bits
*key
)
5966 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5968 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5971 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5974 struct si_shader
*shader
= ctx
->shader
;
5975 struct si_shader_selector
*sel
= shader
->selector
;
5976 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5978 // TODO clean all this up!
5979 switch (ctx
->type
) {
5980 case PIPE_SHADER_VERTEX
:
5981 ctx
->load_input
= declare_input_vs
;
5982 if (shader
->key
.as_ls
)
5983 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5984 else if (shader
->key
.as_es
)
5985 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5987 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5988 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5990 case PIPE_SHADER_TESS_CTRL
:
5991 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5992 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5993 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5994 bld_base
->emit_store
= store_output_tcs
;
5995 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
5996 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
5997 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5998 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6000 case PIPE_SHADER_TESS_EVAL
:
6001 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6002 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6003 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6004 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6005 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6006 if (shader
->key
.as_es
)
6007 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6009 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6010 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6012 case PIPE_SHADER_GEOMETRY
:
6013 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6014 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6015 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6016 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6017 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6018 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6020 case PIPE_SHADER_FRAGMENT
:
6021 ctx
->load_input
= declare_input_fs
;
6022 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6023 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6024 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6025 ctx
->abi
.load_sample_position
= load_sample_position
;
6026 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6028 case PIPE_SHADER_COMPUTE
:
6029 ctx
->abi
.load_local_group_size
= get_block_size
;
6032 assert(!"Unsupported shader type");
6036 ctx
->abi
.load_ubo
= load_ubo
;
6037 ctx
->abi
.load_ssbo
= load_ssbo
;
6039 create_function(ctx
);
6040 preload_ring_buffers(ctx
);
6042 /* For GFX9 merged shaders:
6043 * - Set EXEC for the first shader. If the prolog is present, set
6044 * EXEC there instead.
6045 * - Add a barrier before the second shader.
6046 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6047 * an if-statement. This is required for correctness in geometry
6048 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6051 * For monolithic merged shaders, the first shader is wrapped in an
6052 * if-block together with its prolog in si_build_wrapper_function.
6054 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6055 if (!is_monolithic
&&
6056 sel
->info
.num_instructions
> 1 && /* not empty shader */
6057 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6058 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6059 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6060 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6061 si_init_exec_from_input(ctx
,
6062 ctx
->param_merged_wave_info
, 0);
6063 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6064 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6066 ac_init_exec_full_mask(&ctx
->ac
);
6068 /* The barrier must execute for all shaders in a
6071 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6073 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6075 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6076 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6077 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6081 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6082 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6083 for (unsigned i
= 0; i
< 6; i
++) {
6084 ctx
->invoc0_tess_factors
[i
] =
6085 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6089 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6091 for (i
= 0; i
< 4; i
++) {
6092 ctx
->gs_next_vertex
[i
] =
6093 lp_build_alloca(&ctx
->gallivm
,
6098 if (sel
->force_correct_derivs_after_kill
) {
6099 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6100 /* true = don't kill. */
6101 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6102 ctx
->postponed_kill
);
6106 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6107 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6111 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6112 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6117 si_llvm_build_ret(ctx
, ctx
->return_value
);
6122 * Compute the VS prolog key, which contains all the information needed to
6123 * build the VS prolog function, and set shader->info bits where needed.
6125 * \param info Shader info of the vertex shader.
6126 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6127 * \param prolog_key Key of the VS prolog
6128 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6129 * \param key Output shader part key.
6131 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6132 unsigned num_input_sgprs
,
6133 const struct si_vs_prolog_bits
*prolog_key
,
6134 struct si_shader
*shader_out
,
6135 union si_shader_part_key
*key
)
6137 memset(key
, 0, sizeof(*key
));
6138 key
->vs_prolog
.states
= *prolog_key
;
6139 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6140 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6141 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6142 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6144 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6145 key
->vs_prolog
.as_ls
= 1;
6146 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6147 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6148 key
->vs_prolog
.as_es
= 1;
6149 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6152 /* Enable loading the InstanceID VGPR. */
6153 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6155 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6156 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6157 shader_out
->info
.uses_instanceid
= true;
6161 * Compute the PS prolog key, which contains all the information needed to
6162 * build the PS prolog function, and set related bits in shader->config.
6164 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6165 union si_shader_part_key
*key
,
6166 bool separate_prolog
)
6168 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6170 memset(key
, 0, sizeof(*key
));
6171 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6172 key
->ps_prolog
.colors_read
= info
->colors_read
;
6173 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6174 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6175 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6176 (key
->ps_prolog
.colors_read
||
6177 key
->ps_prolog
.states
.force_persp_sample_interp
||
6178 key
->ps_prolog
.states
.force_linear_sample_interp
||
6179 key
->ps_prolog
.states
.force_persp_center_interp
||
6180 key
->ps_prolog
.states
.force_linear_center_interp
||
6181 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6182 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6183 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6185 if (info
->colors_read
) {
6186 unsigned *color
= shader
->selector
->color_attr_index
;
6188 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6189 /* BCOLORs are stored after the last input. */
6190 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6191 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6192 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6195 for (unsigned i
= 0; i
< 2; i
++) {
6196 unsigned interp
= info
->input_interpolate
[color
[i
]];
6197 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6199 if (!(info
->colors_read
& (0xf << i
*4)))
6202 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6204 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6205 interp
== TGSI_INTERPOLATE_COLOR
)
6206 interp
= TGSI_INTERPOLATE_CONSTANT
;
6209 case TGSI_INTERPOLATE_CONSTANT
:
6210 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6212 case TGSI_INTERPOLATE_PERSPECTIVE
:
6213 case TGSI_INTERPOLATE_COLOR
:
6214 /* Force the interpolation location for colors here. */
6215 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6216 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6217 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6218 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6221 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6222 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6223 shader
->config
.spi_ps_input_ena
|=
6224 S_0286CC_PERSP_SAMPLE_ENA(1);
6226 case TGSI_INTERPOLATE_LOC_CENTER
:
6227 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6228 shader
->config
.spi_ps_input_ena
|=
6229 S_0286CC_PERSP_CENTER_ENA(1);
6231 case TGSI_INTERPOLATE_LOC_CENTROID
:
6232 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6233 shader
->config
.spi_ps_input_ena
|=
6234 S_0286CC_PERSP_CENTROID_ENA(1);
6240 case TGSI_INTERPOLATE_LINEAR
:
6241 /* Force the interpolation location for colors here. */
6242 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6243 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6244 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6245 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6247 /* The VGPR assignment for non-monolithic shaders
6248 * works because InitialPSInputAddr is set on the
6249 * main shader and PERSP_PULL_MODEL is never used.
6252 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6253 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6254 separate_prolog
? 6 : 9;
6255 shader
->config
.spi_ps_input_ena
|=
6256 S_0286CC_LINEAR_SAMPLE_ENA(1);
6258 case TGSI_INTERPOLATE_LOC_CENTER
:
6259 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6260 separate_prolog
? 8 : 11;
6261 shader
->config
.spi_ps_input_ena
|=
6262 S_0286CC_LINEAR_CENTER_ENA(1);
6264 case TGSI_INTERPOLATE_LOC_CENTROID
:
6265 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6266 separate_prolog
? 10 : 13;
6267 shader
->config
.spi_ps_input_ena
|=
6268 S_0286CC_LINEAR_CENTROID_ENA(1);
6282 * Check whether a PS prolog is required based on the key.
6284 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6286 return key
->ps_prolog
.colors_read
||
6287 key
->ps_prolog
.states
.force_persp_sample_interp
||
6288 key
->ps_prolog
.states
.force_linear_sample_interp
||
6289 key
->ps_prolog
.states
.force_persp_center_interp
||
6290 key
->ps_prolog
.states
.force_linear_center_interp
||
6291 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6292 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6293 key
->ps_prolog
.states
.poly_stipple
||
6294 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6298 * Compute the PS epilog key, which contains all the information needed to
6299 * build the PS epilog function.
6301 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6302 union si_shader_part_key
*key
)
6304 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6305 memset(key
, 0, sizeof(*key
));
6306 key
->ps_epilog
.colors_written
= info
->colors_written
;
6307 key
->ps_epilog
.writes_z
= info
->writes_z
;
6308 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6309 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6310 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6314 * Build the GS prolog function. Rotate the input vertices for triangle strips
6317 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6318 union si_shader_part_key
*key
)
6320 unsigned num_sgprs
, num_vgprs
;
6321 struct si_function_info fninfo
;
6322 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6323 LLVMTypeRef returns
[48];
6324 LLVMValueRef func
, ret
;
6326 si_init_function_info(&fninfo
);
6328 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6329 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
6330 num_vgprs
= 5; /* ES inputs are not needed by GS */
6332 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6336 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6337 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6338 returns
[i
] = ctx
->i32
;
6341 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6342 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6343 returns
[num_sgprs
+ i
] = ctx
->f32
;
6346 /* Create the function. */
6347 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6349 func
= ctx
->main_fn
;
6351 /* Set the full EXEC mask for the prolog, because we are only fiddling
6352 * with registers here. The main shader part will set the correct EXEC
6355 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6356 ac_init_exec_full_mask(&ctx
->ac
);
6358 /* Copy inputs to outputs. This should be no-op, as the registers match,
6359 * but it will prevent the compiler from overwriting them unintentionally.
6361 ret
= ctx
->return_value
;
6362 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6363 LLVMValueRef p
= LLVMGetParam(func
, i
);
6364 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6366 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6367 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6368 p
= ac_to_float(&ctx
->ac
, p
);
6369 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6372 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6373 /* Remap the input vertices for every other primitive. */
6374 const unsigned gfx6_vtx_params
[6] = {
6382 const unsigned gfx9_vtx_params
[3] = {
6387 LLVMValueRef vtx_in
[6], vtx_out
[6];
6388 LLVMValueRef prim_id
, rotate
;
6390 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6391 for (unsigned i
= 0; i
< 3; i
++) {
6392 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6393 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6396 for (unsigned i
= 0; i
< 6; i
++)
6397 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6400 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6401 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6403 for (unsigned i
= 0; i
< 6; ++i
) {
6404 LLVMValueRef base
, rotated
;
6406 rotated
= vtx_in
[(i
+ 4) % 6];
6407 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6410 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6411 for (unsigned i
= 0; i
< 3; i
++) {
6412 LLVMValueRef hi
, out
;
6414 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6415 LLVMConstInt(ctx
->i32
, 16, 0), "");
6416 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6417 out
= ac_to_float(&ctx
->ac
, out
);
6418 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6419 gfx9_vtx_params
[i
], "");
6422 for (unsigned i
= 0; i
< 6; i
++) {
6425 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6426 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6427 gfx6_vtx_params
[i
], "");
6432 LLVMBuildRet(builder
, ret
);
6436 * Given a list of shader part functions, build a wrapper function that
6437 * runs them in sequence to form a monolithic shader.
6439 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6440 LLVMValueRef
*parts
,
6443 unsigned next_shader_first_part
)
6445 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6446 /* PS epilog has one arg per color component; gfx9 merged shader
6447 * prologs need to forward 32 user SGPRs.
6449 struct si_function_info fninfo
;
6450 LLVMValueRef initial
[64], out
[64];
6451 LLVMTypeRef function_type
;
6452 unsigned num_first_params
;
6453 unsigned num_out
, initial_num_out
;
6454 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6455 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6456 unsigned num_sgprs
, num_vgprs
;
6458 struct lp_build_if_state if_state
;
6460 si_init_function_info(&fninfo
);
6462 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6463 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6464 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6467 /* The parameters of the wrapper function correspond to those of the
6468 * first part in terms of SGPRs and VGPRs, but we use the types of the
6469 * main part to get the right types. This is relevant for the
6470 * dereferenceable attribute on descriptor table pointers.
6475 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6476 num_first_params
= LLVMCountParamTypes(function_type
);
6478 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6479 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6481 if (ac_is_sgpr_param(param
)) {
6482 assert(num_vgprs
== 0);
6483 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6485 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6490 while (gprs
< num_sgprs
+ num_vgprs
) {
6491 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6492 LLVMTypeRef type
= LLVMTypeOf(param
);
6493 unsigned size
= ac_get_type_size(type
) / 4;
6495 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6497 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6498 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6499 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6504 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6505 si_get_max_workgroup_size(ctx
->shader
));
6507 if (is_merged_shader(ctx
->shader
))
6508 ac_init_exec_full_mask(&ctx
->ac
);
6510 /* Record the arguments of the function as if they were an output of
6516 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6517 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6518 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6519 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6520 unsigned size
= ac_get_type_size(param_type
) / 4;
6523 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6524 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6525 param_type
= ctx
->i32
;
6528 if (param_type
!= out_type
)
6529 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6530 out
[num_out
++] = param
;
6532 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6534 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6535 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6536 param_type
= ctx
->i64
;
6539 if (param_type
!= vector_type
)
6540 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6542 for (unsigned j
= 0; j
< size
; ++j
)
6543 out
[num_out
++] = LLVMBuildExtractElement(
6544 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6547 if (i
< fninfo
.num_sgpr_params
)
6548 num_out_sgpr
= num_out
;
6551 memcpy(initial
, out
, sizeof(out
));
6552 initial_num_out
= num_out
;
6553 initial_num_out_sgpr
= num_out_sgpr
;
6555 /* Now chain the parts. */
6556 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6557 LLVMValueRef in
[48];
6559 LLVMTypeRef ret_type
;
6560 unsigned out_idx
= 0;
6561 unsigned num_params
= LLVMCountParams(parts
[part
]);
6563 /* Merged shaders are executed conditionally depending
6564 * on the number of enabled threads passed in the input SGPRs. */
6565 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6566 LLVMValueRef ena
, count
= initial
[3];
6568 count
= LLVMBuildAnd(builder
, count
,
6569 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6570 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6571 ac_get_thread_id(&ctx
->ac
), count
, "");
6572 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6575 /* Derive arguments for the next part from outputs of the
6578 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6580 LLVMTypeRef param_type
;
6582 unsigned param_size
;
6583 LLVMValueRef arg
= NULL
;
6585 param
= LLVMGetParam(parts
[part
], param_idx
);
6586 param_type
= LLVMTypeOf(param
);
6587 param_size
= ac_get_type_size(param_type
) / 4;
6588 is_sgpr
= ac_is_sgpr_param(param
);
6591 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6593 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6594 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6596 if (param_size
== 1)
6599 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6601 if (LLVMTypeOf(arg
) != param_type
) {
6602 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6603 if (LLVMGetPointerAddressSpace(param_type
) ==
6604 AC_CONST_32BIT_ADDR_SPACE
) {
6605 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6606 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6608 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6609 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6612 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6616 in
[param_idx
] = arg
;
6617 out_idx
+= param_size
;
6620 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6622 if (is_merged_shader(ctx
->shader
) &&
6623 part
+ 1 == next_shader_first_part
) {
6624 lp_build_endif(&if_state
);
6626 /* The second half of the merged shader should use
6627 * the inputs from the toplevel (wrapper) function,
6628 * not the return value from the last call.
6630 * That's because the last call was executed condi-
6631 * tionally, so we can't consume it in the main
6634 memcpy(out
, initial
, sizeof(initial
));
6635 num_out
= initial_num_out
;
6636 num_out_sgpr
= initial_num_out_sgpr
;
6640 /* Extract the returned GPRs. */
6641 ret_type
= LLVMTypeOf(ret
);
6645 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6646 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6648 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6650 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6652 LLVMBuildExtractValue(builder
, ret
, i
, "");
6654 assert(num_out
< ARRAY_SIZE(out
));
6655 out
[num_out
++] = val
;
6657 if (LLVMTypeOf(val
) == ctx
->i32
) {
6658 assert(num_out_sgpr
+ 1 == num_out
);
6659 num_out_sgpr
= num_out
;
6665 LLVMBuildRetVoid(builder
);
6668 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6669 LLVMTargetMachineRef tm
,
6670 struct si_shader
*shader
,
6672 struct pipe_debug_callback
*debug
)
6674 struct si_shader_selector
*sel
= shader
->selector
;
6675 struct si_shader_context ctx
;
6678 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6679 * conversion fails. */
6680 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6681 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6683 tgsi_dump(sel
->tokens
, 0);
6685 nir_print_shader(sel
->nir
, stderr
);
6686 si_dump_streamout(&sel
->so
);
6689 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6690 si_llvm_context_set_tgsi(&ctx
, shader
);
6691 ctx
.separate_prolog
= !is_monolithic
;
6693 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6694 sizeof(shader
->info
.vs_output_param_offset
));
6696 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6698 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6699 si_llvm_dispose(&ctx
);
6703 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6704 LLVMValueRef parts
[2];
6705 bool need_prolog
= sel
->vs_needs_prolog
;
6707 parts
[1] = ctx
.main_fn
;
6710 union si_shader_part_key prolog_key
;
6711 si_get_vs_prolog_key(&sel
->info
,
6712 shader
->info
.num_input_sgprs
,
6713 &shader
->key
.part
.vs
.prolog
,
6714 shader
, &prolog_key
);
6715 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6716 parts
[0] = ctx
.main_fn
;
6719 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6720 1 + need_prolog
, need_prolog
, 0);
6721 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6722 if (sscreen
->info
.chip_class
>= GFX9
) {
6723 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6724 LLVMValueRef parts
[4];
6725 bool vs_needs_prolog
=
6726 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6729 parts
[2] = ctx
.main_fn
;
6732 union si_shader_part_key tcs_epilog_key
;
6733 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6734 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6735 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6736 parts
[3] = ctx
.main_fn
;
6739 if (vs_needs_prolog
) {
6740 union si_shader_part_key vs_prolog_key
;
6741 si_get_vs_prolog_key(&ls
->info
,
6742 shader
->info
.num_input_sgprs
,
6743 &shader
->key
.part
.tcs
.ls_prolog
,
6744 shader
, &vs_prolog_key
);
6745 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6746 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6747 parts
[0] = ctx
.main_fn
;
6750 /* VS as LS main part */
6751 struct si_shader shader_ls
= {};
6752 shader_ls
.selector
= ls
;
6753 shader_ls
.key
.as_ls
= 1;
6754 shader_ls
.key
.mono
= shader
->key
.mono
;
6755 shader_ls
.key
.opt
= shader
->key
.opt
;
6756 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6758 if (!si_compile_tgsi_main(&ctx
, true)) {
6759 si_llvm_dispose(&ctx
);
6762 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6763 parts
[1] = ctx
.main_fn
;
6765 /* Reset the shader context. */
6766 ctx
.shader
= shader
;
6767 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6769 si_build_wrapper_function(&ctx
,
6770 parts
+ !vs_needs_prolog
,
6771 4 - !vs_needs_prolog
, 0,
6772 vs_needs_prolog
? 2 : 1);
6774 LLVMValueRef parts
[2];
6775 union si_shader_part_key epilog_key
;
6777 parts
[0] = ctx
.main_fn
;
6779 memset(&epilog_key
, 0, sizeof(epilog_key
));
6780 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6781 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6782 parts
[1] = ctx
.main_fn
;
6784 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6786 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6787 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6788 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6789 LLVMValueRef es_prolog
= NULL
;
6790 LLVMValueRef es_main
= NULL
;
6791 LLVMValueRef gs_prolog
= NULL
;
6792 LLVMValueRef gs_main
= ctx
.main_fn
;
6795 union si_shader_part_key gs_prolog_key
;
6796 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6797 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6798 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6799 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6800 gs_prolog
= ctx
.main_fn
;
6803 if (es
->vs_needs_prolog
) {
6804 union si_shader_part_key vs_prolog_key
;
6805 si_get_vs_prolog_key(&es
->info
,
6806 shader
->info
.num_input_sgprs
,
6807 &shader
->key
.part
.gs
.vs_prolog
,
6808 shader
, &vs_prolog_key
);
6809 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6810 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6811 es_prolog
= ctx
.main_fn
;
6815 struct si_shader shader_es
= {};
6816 shader_es
.selector
= es
;
6817 shader_es
.key
.as_es
= 1;
6818 shader_es
.key
.mono
= shader
->key
.mono
;
6819 shader_es
.key
.opt
= shader
->key
.opt
;
6820 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6822 if (!si_compile_tgsi_main(&ctx
, true)) {
6823 si_llvm_dispose(&ctx
);
6826 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6827 es_main
= ctx
.main_fn
;
6829 /* Reset the shader context. */
6830 ctx
.shader
= shader
;
6831 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6833 /* Prepare the array of shader parts. */
6834 LLVMValueRef parts
[4];
6835 unsigned num_parts
= 0, main_part
, next_first_part
;
6838 parts
[num_parts
++] = es_prolog
;
6840 parts
[main_part
= num_parts
++] = es_main
;
6841 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6842 parts
[num_parts
++] = gs_main
;
6844 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6845 main_part
, next_first_part
);
6847 LLVMValueRef parts
[2];
6848 union si_shader_part_key prolog_key
;
6850 parts
[1] = ctx
.main_fn
;
6852 memset(&prolog_key
, 0, sizeof(prolog_key
));
6853 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6854 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6855 parts
[0] = ctx
.main_fn
;
6857 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6859 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6860 LLVMValueRef parts
[3];
6861 union si_shader_part_key prolog_key
;
6862 union si_shader_part_key epilog_key
;
6865 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6866 need_prolog
= si_need_ps_prolog(&prolog_key
);
6868 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6871 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6872 parts
[0] = ctx
.main_fn
;
6875 si_get_ps_epilog_key(shader
, &epilog_key
);
6876 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6877 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6879 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6880 need_prolog
? 1 : 0, 0);
6883 si_llvm_optimize_module(&ctx
);
6885 /* Post-optimization transformations and analysis. */
6886 si_optimize_vs_outputs(&ctx
);
6888 if ((debug
&& debug
->debug_message
) ||
6889 si_can_dump_shader(sscreen
, ctx
.type
))
6890 si_count_scratch_private_memory(&ctx
);
6892 /* Compile to bytecode. */
6893 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6894 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6895 si_llvm_dispose(&ctx
);
6897 fprintf(stderr
, "LLVM failed to compile shader\n");
6901 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6902 * LLVM 3.9svn has this bug.
6904 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6905 unsigned wave_size
= 64;
6906 unsigned max_vgprs
= 256;
6907 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6908 unsigned max_sgprs_per_wave
= 128;
6909 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6910 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6911 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6913 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6914 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6916 if (shader
->config
.num_sgprs
> max_sgprs
||
6917 shader
->config
.num_vgprs
> max_vgprs
) {
6918 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6919 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6920 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6921 max_sgprs
, max_vgprs
);
6923 /* Just terminate the process, because dependent
6924 * shaders can hang due to bad input data, but use
6925 * the env var to allow shader-db to work.
6927 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6932 /* Add the scratch offset to input SGPRs. */
6933 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6934 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6936 /* Calculate the number of fragment input VGPRs. */
6937 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6938 shader
->info
.num_input_vgprs
= 0;
6939 shader
->info
.face_vgpr_index
= -1;
6940 shader
->info
.ancillary_vgpr_index
= -1;
6942 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6943 shader
->info
.num_input_vgprs
+= 2;
6944 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6945 shader
->info
.num_input_vgprs
+= 2;
6946 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6947 shader
->info
.num_input_vgprs
+= 2;
6948 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6949 shader
->info
.num_input_vgprs
+= 3;
6950 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6951 shader
->info
.num_input_vgprs
+= 2;
6952 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6953 shader
->info
.num_input_vgprs
+= 2;
6954 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6955 shader
->info
.num_input_vgprs
+= 2;
6956 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6957 shader
->info
.num_input_vgprs
+= 1;
6958 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6959 shader
->info
.num_input_vgprs
+= 1;
6960 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6961 shader
->info
.num_input_vgprs
+= 1;
6962 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6963 shader
->info
.num_input_vgprs
+= 1;
6964 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6965 shader
->info
.num_input_vgprs
+= 1;
6966 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6967 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6968 shader
->info
.num_input_vgprs
+= 1;
6970 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6971 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6972 shader
->info
.num_input_vgprs
+= 1;
6974 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6975 shader
->info
.num_input_vgprs
+= 1;
6976 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6977 shader
->info
.num_input_vgprs
+= 1;
6980 si_calculate_max_simd_waves(shader
);
6981 si_shader_dump_stats_for_shader_db(shader
, debug
);
6986 * Create, compile and return a shader part (prolog or epilog).
6988 * \param sscreen screen
6989 * \param list list of shader parts of the same category
6990 * \param type shader type
6991 * \param key shader part key
6992 * \param prolog whether the part being requested is a prolog
6993 * \param tm LLVM target machine
6994 * \param debug debug callback
6995 * \param build the callback responsible for building the main function
6996 * \return non-NULL on success
6998 static struct si_shader_part
*
6999 si_get_shader_part(struct si_screen
*sscreen
,
7000 struct si_shader_part
**list
,
7001 enum pipe_shader_type type
,
7003 union si_shader_part_key
*key
,
7004 LLVMTargetMachineRef tm
,
7005 struct pipe_debug_callback
*debug
,
7006 void (*build
)(struct si_shader_context
*,
7007 union si_shader_part_key
*),
7010 struct si_shader_part
*result
;
7012 mtx_lock(&sscreen
->shader_parts_mutex
);
7014 /* Find existing. */
7015 for (result
= *list
; result
; result
= result
->next
) {
7016 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7017 mtx_unlock(&sscreen
->shader_parts_mutex
);
7022 /* Compile a new one. */
7023 result
= CALLOC_STRUCT(si_shader_part
);
7026 struct si_shader shader
= {};
7027 struct si_shader_context ctx
;
7029 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7030 ctx
.shader
= &shader
;
7034 case PIPE_SHADER_VERTEX
:
7035 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7036 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7038 case PIPE_SHADER_TESS_CTRL
:
7040 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7042 case PIPE_SHADER_GEOMETRY
:
7045 case PIPE_SHADER_FRAGMENT
:
7047 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7049 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7052 unreachable("bad shader part");
7058 si_llvm_optimize_module(&ctx
);
7060 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7061 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7067 result
->next
= *list
;
7071 si_llvm_dispose(&ctx
);
7072 mtx_unlock(&sscreen
->shader_parts_mutex
);
7076 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7078 LLVMValueRef ptr
[2], list
;
7079 bool is_merged_shader
=
7080 ctx
->screen
->info
.chip_class
>= GFX9
&&
7081 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7082 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7083 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7085 if (HAVE_32BIT_POINTERS
) {
7086 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7087 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7088 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7092 /* Get the pointer to rw buffers. */
7093 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7094 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
+ 1);
7095 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7096 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7097 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7098 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7103 * Build the vertex shader prolog function.
7105 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7106 * All inputs are returned unmodified. The vertex load indices are
7107 * stored after them, which will be used by the API VS for fetching inputs.
7109 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7114 * (VertexID + BaseVertex),
7115 * (InstanceID + StartInstance),
7116 * (InstanceID / 2 + StartInstance)
7118 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7119 union si_shader_part_key
*key
)
7121 struct si_function_info fninfo
;
7122 LLVMTypeRef
*returns
;
7123 LLVMValueRef ret
, func
;
7125 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7126 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7127 LLVMValueRef input_vgprs
[9];
7128 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7130 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7132 si_init_function_info(&fninfo
);
7134 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7135 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7136 sizeof(LLVMTypeRef
));
7139 /* Declare input and output SGPRs. */
7140 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7141 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7142 returns
[num_returns
++] = ctx
->i32
;
7145 /* Preloaded VGPRs (outputs must be floats) */
7146 for (i
= 0; i
< num_input_vgprs
; i
++) {
7147 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7148 returns
[num_returns
++] = ctx
->f32
;
7151 /* Vertex load indices. */
7152 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7153 returns
[num_returns
++] = ctx
->f32
;
7155 /* Create the function. */
7156 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7157 func
= ctx
->main_fn
;
7159 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7160 if (!key
->vs_prolog
.is_monolithic
)
7161 si_init_exec_from_input(ctx
, 3, 0);
7163 if (key
->vs_prolog
.as_ls
&&
7164 ctx
->screen
->has_ls_vgpr_init_bug
) {
7165 /* If there are no HS threads, SPI loads the LS VGPRs
7166 * starting at VGPR 0. Shift them back to where they
7169 LLVMValueRef has_hs_threads
=
7170 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7171 unpack_param(ctx
, 3, 8, 8),
7174 for (i
= 4; i
> 0; --i
) {
7175 input_vgprs
[i
+ 1] =
7176 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7178 input_vgprs
[i
- 1], "");
7183 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7184 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7186 /* Copy inputs to outputs. This should be no-op, as the registers match,
7187 * but it will prevent the compiler from overwriting them unintentionally.
7189 ret
= ctx
->return_value
;
7190 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7191 LLVMValueRef p
= LLVMGetParam(func
, i
);
7192 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7194 for (i
= 0; i
< num_input_vgprs
; i
++) {
7195 LLVMValueRef p
= input_vgprs
[i
];
7196 p
= ac_to_float(&ctx
->ac
, p
);
7197 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7198 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7201 /* Compute vertex load indices from instance divisors. */
7202 LLVMValueRef instance_divisor_constbuf
= NULL
;
7204 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7205 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7206 LLVMValueRef buf_index
=
7207 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7208 instance_divisor_constbuf
=
7209 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7212 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7213 bool divisor_is_one
=
7214 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7215 bool divisor_is_fetched
=
7216 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7219 if (divisor_is_one
|| divisor_is_fetched
) {
7220 LLVMValueRef divisor
= ctx
->i32_1
;
7222 if (divisor_is_fetched
) {
7223 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7224 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7225 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7228 /* InstanceID / Divisor + StartInstance */
7229 index
= get_instance_index_for_fetch(ctx
,
7231 SI_SGPR_START_INSTANCE
,
7234 /* VertexID + BaseVertex */
7235 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7237 LLVMGetParam(func
, user_sgpr_base
+
7238 SI_SGPR_BASE_VERTEX
), "");
7241 index
= ac_to_float(&ctx
->ac
, index
);
7242 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7243 fninfo
.num_params
+ i
, "");
7246 si_llvm_build_ret(ctx
, ret
);
7249 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7250 LLVMTargetMachineRef tm
,
7251 struct si_shader
*shader
,
7252 struct pipe_debug_callback
*debug
,
7253 struct si_shader
*main_part
,
7254 const struct si_vs_prolog_bits
*key
)
7256 struct si_shader_selector
*vs
= main_part
->selector
;
7258 if (!si_vs_needs_prolog(vs
, key
))
7261 /* Get the prolog. */
7262 union si_shader_part_key prolog_key
;
7263 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7264 key
, shader
, &prolog_key
);
7267 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7268 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7269 debug
, si_build_vs_prolog_function
,
7270 "Vertex Shader Prolog");
7271 return shader
->prolog
!= NULL
;
7275 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7277 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7278 LLVMTargetMachineRef tm
,
7279 struct si_shader
*shader
,
7280 struct pipe_debug_callback
*debug
)
7282 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7283 &shader
->key
.part
.vs
.prolog
);
7287 * Compile the TCS epilog function. This writes tesselation factors to memory
7288 * based on the output primitive type of the tesselator (determined by TES).
7290 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7291 union si_shader_part_key
*key
)
7293 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7294 struct si_function_info fninfo
;
7297 si_init_function_info(&fninfo
);
7299 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7300 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7301 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7302 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7303 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7304 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7305 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7306 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7307 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7308 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7309 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7310 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7311 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7312 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7313 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7314 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7315 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7316 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7317 if (!HAVE_32BIT_POINTERS
)
7318 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7319 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7320 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7321 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7322 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7323 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7325 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7326 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7327 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7328 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7329 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7330 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7331 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7332 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7333 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7334 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7335 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7336 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7339 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7340 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7341 unsigned tess_factors_idx
=
7342 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7343 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7344 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7346 for (unsigned i
= 0; i
< 6; i
++)
7347 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7349 /* Create the function. */
7350 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7351 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7352 ac_declare_lds_as_pointer(&ctx
->ac
);
7353 func
= ctx
->main_fn
;
7355 LLVMValueRef invoc0_tess_factors
[6];
7356 for (unsigned i
= 0; i
< 6; i
++)
7357 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7359 si_write_tess_factors(bld_base
,
7360 LLVMGetParam(func
, tess_factors_idx
),
7361 LLVMGetParam(func
, tess_factors_idx
+ 1),
7362 LLVMGetParam(func
, tess_factors_idx
+ 2),
7363 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7365 LLVMBuildRetVoid(ctx
->ac
.builder
);
7369 * Select and compile (or reuse) TCS parts (epilog).
7371 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7372 LLVMTargetMachineRef tm
,
7373 struct si_shader
*shader
,
7374 struct pipe_debug_callback
*debug
)
7376 if (sscreen
->info
.chip_class
>= GFX9
) {
7377 struct si_shader
*ls_main_part
=
7378 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7380 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7381 &shader
->key
.part
.tcs
.ls_prolog
))
7384 shader
->previous_stage
= ls_main_part
;
7387 /* Get the epilog. */
7388 union si_shader_part_key epilog_key
;
7389 memset(&epilog_key
, 0, sizeof(epilog_key
));
7390 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7392 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7393 PIPE_SHADER_TESS_CTRL
, false,
7394 &epilog_key
, tm
, debug
,
7395 si_build_tcs_epilog_function
,
7396 "Tessellation Control Shader Epilog");
7397 return shader
->epilog
!= NULL
;
7401 * Select and compile (or reuse) GS parts (prolog).
7403 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7404 LLVMTargetMachineRef tm
,
7405 struct si_shader
*shader
,
7406 struct pipe_debug_callback
*debug
)
7408 if (sscreen
->info
.chip_class
>= GFX9
) {
7409 struct si_shader
*es_main_part
=
7410 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7412 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7413 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7414 &shader
->key
.part
.gs
.vs_prolog
))
7417 shader
->previous_stage
= es_main_part
;
7420 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7423 union si_shader_part_key prolog_key
;
7424 memset(&prolog_key
, 0, sizeof(prolog_key
));
7425 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7427 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7428 PIPE_SHADER_GEOMETRY
, true,
7429 &prolog_key
, tm
, debug
,
7430 si_build_gs_prolog_function
,
7431 "Geometry Shader Prolog");
7432 return shader
->prolog2
!= NULL
;
7436 * Build the pixel shader prolog function. This handles:
7437 * - two-side color selection and interpolation
7438 * - overriding interpolation parameters for the API PS
7439 * - polygon stippling
7441 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7442 * overriden by other states. (e.g. per-sample interpolation)
7443 * Interpolated colors are stored after the preloaded VGPRs.
7445 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7446 union si_shader_part_key
*key
)
7448 struct si_function_info fninfo
;
7449 LLVMValueRef ret
, func
;
7450 int num_returns
, i
, num_color_channels
;
7452 assert(si_need_ps_prolog(key
));
7454 si_init_function_info(&fninfo
);
7456 /* Declare inputs. */
7457 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7458 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7460 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7461 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7463 /* Declare outputs (same as inputs + add colors if needed) */
7464 num_returns
= fninfo
.num_params
;
7465 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7466 for (i
= 0; i
< num_color_channels
; i
++)
7467 fninfo
.types
[num_returns
++] = ctx
->f32
;
7469 /* Create the function. */
7470 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7472 func
= ctx
->main_fn
;
7474 /* Copy inputs to outputs. This should be no-op, as the registers match,
7475 * but it will prevent the compiler from overwriting them unintentionally.
7477 ret
= ctx
->return_value
;
7478 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7479 LLVMValueRef p
= LLVMGetParam(func
, i
);
7480 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7483 /* Polygon stippling. */
7484 if (key
->ps_prolog
.states
.poly_stipple
) {
7485 /* POS_FIXED_PT is always last. */
7486 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7487 key
->ps_prolog
.num_input_vgprs
- 1;
7488 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7490 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7493 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7494 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7495 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7496 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7498 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7499 * The hw doesn't compute CENTROID if the whole wave only
7500 * contains fully-covered quads.
7502 * PRIM_MASK is after user SGPRs.
7504 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7505 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7506 LLVMConstInt(ctx
->i32
, 31, 0), "");
7507 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7510 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7511 /* Read PERSP_CENTER. */
7512 for (i
= 0; i
< 2; i
++)
7513 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7514 /* Read PERSP_CENTROID. */
7515 for (i
= 0; i
< 2; i
++)
7516 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7517 /* Select PERSP_CENTROID. */
7518 for (i
= 0; i
< 2; i
++) {
7519 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7520 center
[i
], centroid
[i
], "");
7521 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7522 tmp
, base
+ 4 + i
, "");
7525 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7526 /* Read LINEAR_CENTER. */
7527 for (i
= 0; i
< 2; i
++)
7528 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7529 /* Read LINEAR_CENTROID. */
7530 for (i
= 0; i
< 2; i
++)
7531 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7532 /* Select LINEAR_CENTROID. */
7533 for (i
= 0; i
< 2; i
++) {
7534 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7535 center
[i
], centroid
[i
], "");
7536 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7537 tmp
, base
+ 10 + i
, "");
7542 /* Force per-sample interpolation. */
7543 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7544 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7545 LLVMValueRef persp_sample
[2];
7547 /* Read PERSP_SAMPLE. */
7548 for (i
= 0; i
< 2; i
++)
7549 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7550 /* Overwrite PERSP_CENTER. */
7551 for (i
= 0; i
< 2; i
++)
7552 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7553 persp_sample
[i
], base
+ 2 + i
, "");
7554 /* Overwrite PERSP_CENTROID. */
7555 for (i
= 0; i
< 2; i
++)
7556 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7557 persp_sample
[i
], base
+ 4 + i
, "");
7559 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7560 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7561 LLVMValueRef linear_sample
[2];
7563 /* Read LINEAR_SAMPLE. */
7564 for (i
= 0; i
< 2; i
++)
7565 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7566 /* Overwrite LINEAR_CENTER. */
7567 for (i
= 0; i
< 2; i
++)
7568 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7569 linear_sample
[i
], base
+ 8 + i
, "");
7570 /* Overwrite LINEAR_CENTROID. */
7571 for (i
= 0; i
< 2; i
++)
7572 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7573 linear_sample
[i
], base
+ 10 + i
, "");
7576 /* Force center interpolation. */
7577 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7578 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7579 LLVMValueRef persp_center
[2];
7581 /* Read PERSP_CENTER. */
7582 for (i
= 0; i
< 2; i
++)
7583 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7584 /* Overwrite PERSP_SAMPLE. */
7585 for (i
= 0; i
< 2; i
++)
7586 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7587 persp_center
[i
], base
+ i
, "");
7588 /* Overwrite PERSP_CENTROID. */
7589 for (i
= 0; i
< 2; i
++)
7590 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7591 persp_center
[i
], base
+ 4 + i
, "");
7593 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7594 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7595 LLVMValueRef linear_center
[2];
7597 /* Read LINEAR_CENTER. */
7598 for (i
= 0; i
< 2; i
++)
7599 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7600 /* Overwrite LINEAR_SAMPLE. */
7601 for (i
= 0; i
< 2; i
++)
7602 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7603 linear_center
[i
], base
+ 6 + i
, "");
7604 /* Overwrite LINEAR_CENTROID. */
7605 for (i
= 0; i
< 2; i
++)
7606 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7607 linear_center
[i
], base
+ 10 + i
, "");
7610 /* Interpolate colors. */
7611 unsigned color_out_idx
= 0;
7612 for (i
= 0; i
< 2; i
++) {
7613 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7614 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7615 key
->ps_prolog
.face_vgpr_index
;
7616 LLVMValueRef interp
[2], color
[4];
7617 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7622 /* If the interpolation qualifier is not CONSTANT (-1). */
7623 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7624 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7625 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7627 /* Get the (i,j) updated by bc_optimize handling. */
7628 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7630 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7631 interp_vgpr
+ 1, "");
7632 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7635 /* Use the absolute location of the input. */
7636 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7638 if (key
->ps_prolog
.states
.color_two_side
) {
7639 face
= LLVMGetParam(func
, face_vgpr
);
7640 face
= ac_to_integer(&ctx
->ac
, face
);
7643 interp_fs_input(ctx
,
7644 key
->ps_prolog
.color_attr_index
[i
],
7645 TGSI_SEMANTIC_COLOR
, i
,
7646 key
->ps_prolog
.num_interp_inputs
,
7647 key
->ps_prolog
.colors_read
, interp_ij
,
7648 prim_mask
, face
, color
);
7651 unsigned chan
= u_bit_scan(&writemask
);
7652 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7653 fninfo
.num_params
+ color_out_idx
++, "");
7657 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7660 * "When per-sample shading is active due to the use of a fragment
7661 * input qualified by sample or due to the use of the gl_SampleID
7662 * or gl_SamplePosition variables, only the bit for the current
7663 * sample is set in gl_SampleMaskIn. When state specifies multiple
7664 * fragment shader invocations for a given fragment, the sample
7665 * mask for any single fragment shader invocation may specify a
7666 * subset of the covered samples for the fragment. In this case,
7667 * the bit corresponding to each covered sample will be set in
7668 * exactly one fragment shader invocation."
7670 * The samplemask loaded by hardware is always the coverage of the
7671 * entire pixel/fragment, so mask bits out based on the sample ID.
7673 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7674 /* The bit pattern matches that used by fixed function fragment
7676 static const uint16_t ps_iter_masks
[] = {
7677 0xffff, /* not used */
7683 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7685 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7686 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7687 key
->ps_prolog
.ancillary_vgpr_index
;
7688 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7689 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7691 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7692 samplemask
= LLVMBuildAnd(
7695 LLVMBuildShl(ctx
->ac
.builder
,
7696 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7699 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7701 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7702 ancillary_vgpr
+ 1, "");
7705 /* Tell LLVM to insert WQM instruction sequence when needed. */
7706 if (key
->ps_prolog
.wqm
) {
7707 LLVMAddTargetDependentFunctionAttr(func
,
7708 "amdgpu-ps-wqm-outputs", "");
7711 si_llvm_build_ret(ctx
, ret
);
7715 * Build the pixel shader epilog function. This handles everything that must be
7716 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7718 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7719 union si_shader_part_key
*key
)
7721 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7722 struct si_function_info fninfo
;
7723 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7725 struct si_ps_exports exp
= {};
7727 si_init_function_info(&fninfo
);
7729 /* Declare input SGPRs. */
7730 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7731 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7732 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7733 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7734 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7736 /* Declare input VGPRs. */
7737 unsigned required_num_params
=
7738 fninfo
.num_sgpr_params
+
7739 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7740 key
->ps_epilog
.writes_z
+
7741 key
->ps_epilog
.writes_stencil
+
7742 key
->ps_epilog
.writes_samplemask
;
7744 required_num_params
= MAX2(required_num_params
,
7745 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7747 while (fninfo
.num_params
< required_num_params
)
7748 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7750 /* Create the function. */
7751 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7752 /* Disable elimination of unused inputs. */
7753 si_llvm_add_attribute(ctx
->main_fn
,
7754 "InitialPSInputAddr", 0xffffff);
7756 /* Process colors. */
7757 unsigned vgpr
= fninfo
.num_sgpr_params
;
7758 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7759 int last_color_export
= -1;
7761 /* Find the last color export. */
7762 if (!key
->ps_epilog
.writes_z
&&
7763 !key
->ps_epilog
.writes_stencil
&&
7764 !key
->ps_epilog
.writes_samplemask
) {
7765 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7767 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7768 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7769 /* Just set this if any of the colorbuffers are enabled. */
7771 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7772 last_color_export
= 0;
7774 for (i
= 0; i
< 8; i
++)
7775 if (colors_written
& (1 << i
) &&
7776 (spi_format
>> (i
* 4)) & 0xf)
7777 last_color_export
= i
;
7781 while (colors_written
) {
7782 LLVMValueRef color
[4];
7783 int mrt
= u_bit_scan(&colors_written
);
7785 for (i
= 0; i
< 4; i
++)
7786 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7788 si_export_mrt_color(bld_base
, color
, mrt
,
7789 fninfo
.num_params
- 1,
7790 mrt
== last_color_export
, &exp
);
7793 /* Process depth, stencil, samplemask. */
7794 if (key
->ps_epilog
.writes_z
)
7795 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7796 if (key
->ps_epilog
.writes_stencil
)
7797 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7798 if (key
->ps_epilog
.writes_samplemask
)
7799 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7801 if (depth
|| stencil
|| samplemask
)
7802 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7803 else if (last_color_export
== -1)
7804 ac_build_export_null(&ctx
->ac
);
7807 si_emit_ps_exports(ctx
, &exp
);
7810 LLVMBuildRetVoid(ctx
->ac
.builder
);
7814 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7816 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7817 LLVMTargetMachineRef tm
,
7818 struct si_shader
*shader
,
7819 struct pipe_debug_callback
*debug
)
7821 union si_shader_part_key prolog_key
;
7822 union si_shader_part_key epilog_key
;
7824 /* Get the prolog. */
7825 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7827 /* The prolog is a no-op if these aren't set. */
7828 if (si_need_ps_prolog(&prolog_key
)) {
7830 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7831 PIPE_SHADER_FRAGMENT
, true,
7832 &prolog_key
, tm
, debug
,
7833 si_build_ps_prolog_function
,
7834 "Fragment Shader Prolog");
7835 if (!shader
->prolog
)
7839 /* Get the epilog. */
7840 si_get_ps_epilog_key(shader
, &epilog_key
);
7843 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7844 PIPE_SHADER_FRAGMENT
, false,
7845 &epilog_key
, tm
, debug
,
7846 si_build_ps_epilog_function
,
7847 "Fragment Shader Epilog");
7848 if (!shader
->epilog
)
7851 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7852 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7853 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7854 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7857 /* Set up the enable bits for per-sample shading if needed. */
7858 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7859 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7860 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7861 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7862 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7863 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7865 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7866 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7867 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7868 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7869 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7870 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7872 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7873 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7874 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7875 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7876 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7877 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7879 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7880 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7881 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7882 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7883 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7884 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7887 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7888 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7889 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7890 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7891 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7894 /* At least one pair of interpolation weights must be enabled. */
7895 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7896 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7897 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7900 /* Samplemask fixup requires the sample ID. */
7901 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7902 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7903 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7906 /* The sample mask input is always enabled, because the API shader always
7907 * passes it through to the epilog. Disable it here if it's unused.
7909 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7910 !shader
->selector
->info
.reads_samplemask
)
7911 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7916 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7919 /* SPI barrier management bug:
7920 * Make sure we have at least 4k of LDS in use to avoid the bug.
7921 * It applies to workgroup sizes of more than one wavefront.
7923 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7924 sscreen
->info
.family
== CHIP_KABINI
||
7925 sscreen
->info
.family
== CHIP_MULLINS
)
7926 *lds_size
= MAX2(*lds_size
, 8);
7929 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7930 struct si_shader
*shader
)
7932 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7934 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7936 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7937 si_get_max_workgroup_size(shader
) > 64) {
7938 si_multiwave_lds_size_workaround(sscreen
,
7939 &shader
->config
.lds_size
);
7943 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7944 struct si_shader
*shader
,
7945 struct pipe_debug_callback
*debug
)
7947 struct si_shader_selector
*sel
= shader
->selector
;
7948 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7951 /* LS, ES, VS are compiled on demand if the main part hasn't been
7952 * compiled for that stage.
7954 * Vertex shaders are compiled on demand when a vertex fetch
7955 * workaround must be applied.
7957 if (shader
->is_monolithic
) {
7958 /* Monolithic shader (compiled as a whole, has many variants,
7959 * may take a long time to compile).
7961 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7965 /* The shader consists of several parts:
7967 * - the middle part is the user shader, it has 1 variant only
7968 * and it was compiled during the creation of the shader
7970 * - the prolog part is inserted at the beginning
7971 * - the epilog part is inserted at the end
7973 * The prolog and epilog have many (but simple) variants.
7975 * Starting with gfx9, geometry and tessellation control
7976 * shaders also contain the prolog and user shader parts of
7977 * the previous shader stage.
7983 /* Copy the compiled TGSI shader data over. */
7984 shader
->is_binary_shared
= true;
7985 shader
->binary
= mainp
->binary
;
7986 shader
->config
= mainp
->config
;
7987 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7988 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7989 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7990 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7991 memcpy(shader
->info
.vs_output_param_offset
,
7992 mainp
->info
.vs_output_param_offset
,
7993 sizeof(mainp
->info
.vs_output_param_offset
));
7994 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7995 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7996 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7998 /* Select prologs and/or epilogs. */
7999 switch (sel
->type
) {
8000 case PIPE_SHADER_VERTEX
:
8001 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8004 case PIPE_SHADER_TESS_CTRL
:
8005 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8008 case PIPE_SHADER_TESS_EVAL
:
8010 case PIPE_SHADER_GEOMETRY
:
8011 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8014 case PIPE_SHADER_FRAGMENT
:
8015 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8018 /* Make sure we have at least as many VGPRs as there
8019 * are allocated inputs.
8021 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8022 shader
->info
.num_input_vgprs
);
8026 /* Update SGPR and VGPR counts. */
8027 if (shader
->prolog
) {
8028 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8029 shader
->prolog
->config
.num_sgprs
);
8030 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8031 shader
->prolog
->config
.num_vgprs
);
8033 if (shader
->previous_stage
) {
8034 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8035 shader
->previous_stage
->config
.num_sgprs
);
8036 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8037 shader
->previous_stage
->config
.num_vgprs
);
8038 shader
->config
.spilled_sgprs
=
8039 MAX2(shader
->config
.spilled_sgprs
,
8040 shader
->previous_stage
->config
.spilled_sgprs
);
8041 shader
->config
.spilled_vgprs
=
8042 MAX2(shader
->config
.spilled_vgprs
,
8043 shader
->previous_stage
->config
.spilled_vgprs
);
8044 shader
->config
.private_mem_vgprs
=
8045 MAX2(shader
->config
.private_mem_vgprs
,
8046 shader
->previous_stage
->config
.private_mem_vgprs
);
8047 shader
->config
.scratch_bytes_per_wave
=
8048 MAX2(shader
->config
.scratch_bytes_per_wave
,
8049 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8050 shader
->info
.uses_instanceid
|=
8051 shader
->previous_stage
->info
.uses_instanceid
;
8053 if (shader
->prolog2
) {
8054 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8055 shader
->prolog2
->config
.num_sgprs
);
8056 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8057 shader
->prolog2
->config
.num_vgprs
);
8059 if (shader
->epilog
) {
8060 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8061 shader
->epilog
->config
.num_sgprs
);
8062 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8063 shader
->epilog
->config
.num_vgprs
);
8065 si_calculate_max_simd_waves(shader
);
8068 si_fix_resource_usage(sscreen
, shader
);
8069 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8073 r
= si_shader_binary_upload(sscreen
, shader
);
8075 fprintf(stderr
, "LLVM failed to upload shader\n");
8082 void si_shader_destroy(struct si_shader
*shader
)
8084 if (shader
->scratch_bo
)
8085 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8087 r600_resource_reference(&shader
->bo
, NULL
);
8089 if (!shader
->is_binary_shared
)
8090 ac_shader_binary_clean(&shader
->binary
);
8092 free(shader
->shader_log
);