2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_util.h"
29 #include "tgsi/tgsi_dump.h"
31 #include "ac_exp_param.h"
32 #include "ac_shader_util.h"
33 #include "ac_llvm_util.h"
34 #include "si_shader_internal.h"
38 #include "compiler/nir/nir.h"
40 static const char *scratch_rsrc_dword0_symbol
=
41 "SCRATCH_RSRC_DWORD0";
43 static const char *scratch_rsrc_dword1_symbol
=
44 "SCRATCH_RSRC_DWORD1";
46 struct si_shader_output_values
48 LLVMValueRef values
[4];
49 unsigned semantic_name
;
50 unsigned semantic_index
;
51 ubyte vertex_stream
[4];
54 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
55 struct si_screen
*sscreen
,
56 struct ac_llvm_compiler
*compiler
);
58 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
59 struct lp_build_tgsi_context
*bld_base
,
60 struct lp_build_emit_data
*emit_data
);
62 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 static bool is_merged_shader(struct si_shader_context
*ctx
)
92 if (ctx
->screen
->info
.chip_class
<= GFX8
)
95 return ctx
->shader
->key
.as_ls
||
96 ctx
->shader
->key
.as_es
||
97 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
98 ctx
->type
== PIPE_SHADER_GEOMETRY
;
101 void si_init_function_info(struct si_function_info
*fninfo
)
103 fninfo
->num_params
= 0;
104 fninfo
->num_sgpr_params
= 0;
107 unsigned add_arg_assign(struct si_function_info
*fninfo
,
108 enum si_arg_regfile regfile
, LLVMTypeRef type
,
109 LLVMValueRef
*assign
)
111 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
113 unsigned idx
= fninfo
->num_params
++;
114 assert(idx
< ARRAY_SIZE(fninfo
->types
));
116 if (regfile
== ARG_SGPR
)
117 fninfo
->num_sgpr_params
= fninfo
->num_params
;
119 fninfo
->types
[idx
] = type
;
120 fninfo
->assign
[idx
] = assign
;
124 static unsigned add_arg(struct si_function_info
*fninfo
,
125 enum si_arg_regfile regfile
, LLVMTypeRef type
)
127 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
130 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
131 enum si_arg_regfile regfile
, LLVMTypeRef type
,
132 LLVMValueRef
*assign
, unsigned idx
)
134 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
135 assert(actual
== idx
);
138 static void add_arg_checked(struct si_function_info
*fninfo
,
139 enum si_arg_regfile regfile
, LLVMTypeRef type
,
142 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
146 * Returns a unique index for a per-patch semantic name and index. The index
147 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
150 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
152 switch (semantic_name
) {
153 case TGSI_SEMANTIC_TESSOUTER
:
155 case TGSI_SEMANTIC_TESSINNER
:
157 case TGSI_SEMANTIC_PATCH
:
162 assert(!"invalid semantic name");
168 * Returns a unique index for a semantic name and index. The index must be
169 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
172 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
175 switch (semantic_name
) {
176 case TGSI_SEMANTIC_POSITION
:
178 case TGSI_SEMANTIC_GENERIC
:
179 /* Since some shader stages use the the highest used IO index
180 * to determine the size to allocate for inputs/outputs
181 * (in LDS, tess and GS rings). GENERIC should be placed right
182 * after POSITION to make that size as small as possible.
184 if (index
< SI_MAX_IO_GENERIC
)
187 assert(!"invalid generic index");
189 case TGSI_SEMANTIC_PSIZE
:
190 return SI_MAX_IO_GENERIC
+ 1;
191 case TGSI_SEMANTIC_CLIPDIST
:
193 return SI_MAX_IO_GENERIC
+ 2 + index
;
194 case TGSI_SEMANTIC_FOG
:
195 return SI_MAX_IO_GENERIC
+ 4;
196 case TGSI_SEMANTIC_LAYER
:
197 return SI_MAX_IO_GENERIC
+ 5;
198 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
199 return SI_MAX_IO_GENERIC
+ 6;
200 case TGSI_SEMANTIC_PRIMID
:
201 return SI_MAX_IO_GENERIC
+ 7;
202 case TGSI_SEMANTIC_COLOR
:
204 return SI_MAX_IO_GENERIC
+ 8 + index
;
205 case TGSI_SEMANTIC_BCOLOR
:
207 /* If it's a varying, COLOR and BCOLOR alias. */
209 return SI_MAX_IO_GENERIC
+ 8 + index
;
211 return SI_MAX_IO_GENERIC
+ 10 + index
;
212 case TGSI_SEMANTIC_TEXCOORD
:
214 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 12 + 8 <= 63);
215 return SI_MAX_IO_GENERIC
+ 12 + index
;
216 case TGSI_SEMANTIC_CLIPVERTEX
:
219 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
220 assert(!"invalid semantic name");
226 * Get the value of a shader input parameter and extract a bitfield.
228 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
229 LLVMValueRef value
, unsigned rshift
,
232 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
233 value
= ac_to_integer(&ctx
->ac
, value
);
236 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
237 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
239 if (rshift
+ bitwidth
< 32) {
240 unsigned mask
= (1 << bitwidth
) - 1;
241 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
242 LLVMConstInt(ctx
->i32
, mask
, 0), "");
248 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
249 unsigned param
, unsigned rshift
,
252 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
254 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
257 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
260 case PIPE_SHADER_TESS_CTRL
:
261 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
263 case PIPE_SHADER_TESS_EVAL
:
264 return LLVMGetParam(ctx
->main_fn
,
265 ctx
->param_tes_rel_patch_id
);
273 /* Tessellation shaders pass outputs to the next shader using LDS.
275 * LS outputs = TCS inputs
276 * TCS outputs = TES inputs
279 * - TCS inputs for patch 0
280 * - TCS inputs for patch 1
281 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
283 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
284 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
285 * - TCS outputs for patch 1
286 * - Per-patch TCS outputs for patch 1
287 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
288 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
291 * All three shaders VS(LS), TCS, TES share the same LDS space.
295 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
297 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
300 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
302 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
304 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
305 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
307 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
310 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
312 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
314 return LLVMConstInt(ctx
->i32
, stride
, 0);
317 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
319 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
320 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
322 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
323 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
324 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
325 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
326 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
327 num_patch_outputs
* 4;
328 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
332 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
334 return LLVMBuildMul(ctx
->ac
.builder
,
336 ctx
->param_tcs_out_lds_offsets
,
338 LLVMConstInt(ctx
->i32
, 4, 0), "");
342 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
344 return LLVMBuildMul(ctx
->ac
.builder
,
346 ctx
->param_tcs_out_lds_offsets
,
348 LLVMConstInt(ctx
->i32
, 4, 0), "");
352 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
354 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
355 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
357 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
361 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
363 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
364 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
365 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
367 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
371 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
373 LLVMValueRef patch0_patch_data_offset
=
374 get_tcs_out_patch0_patch_data_offset(ctx
);
375 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
376 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
378 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
381 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
383 unsigned tcs_out_vertices
=
384 ctx
->shader
->selector
?
385 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
387 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
388 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
389 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
391 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
394 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
399 case PIPE_SHADER_VERTEX
:
400 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
401 return LLVMConstInt(ctx
->i32
, stride
, 0);
403 case PIPE_SHADER_TESS_CTRL
:
404 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
405 ctx
->shader
->is_monolithic
) {
406 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
407 return LLVMConstInt(ctx
->i32
, stride
, 0);
409 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
417 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
418 LLVMValueRef i32
, unsigned index
)
423 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
424 LLVMConstInt(ctx
->i32
, 16, 0), "");
426 return LLVMBuildSExt(ctx
->ac
.builder
,
427 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
432 void si_llvm_load_input_vs(
433 struct si_shader_context
*ctx
,
434 unsigned input_index
,
437 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
438 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
440 if (vs_blit_property
) {
441 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
442 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
443 LLVMIntULE
, vertex_id
,
445 /* Use LLVMIntNE, because we have 3 vertices and only
446 * the middle one should use y2.
448 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
449 LLVMIntNE
, vertex_id
,
452 if (input_index
== 0) {
454 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
455 ctx
->param_vs_blit_inputs
);
456 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
457 ctx
->param_vs_blit_inputs
+ 1);
459 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
460 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
461 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
462 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
464 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
466 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
469 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
470 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
471 out
[2] = LLVMGetParam(ctx
->main_fn
,
472 ctx
->param_vs_blit_inputs
+ 2);
473 out
[3] = ctx
->ac
.f32_1
;
477 /* Color or texture coordinates: */
478 assert(input_index
== 1);
480 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
481 for (int i
= 0; i
< 4; i
++) {
482 out
[i
] = LLVMGetParam(ctx
->main_fn
,
483 ctx
->param_vs_blit_inputs
+ 3 + i
);
486 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
487 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
488 ctx
->param_vs_blit_inputs
+ 3);
489 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
490 ctx
->param_vs_blit_inputs
+ 4);
491 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
492 ctx
->param_vs_blit_inputs
+ 5);
493 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
494 ctx
->param_vs_blit_inputs
+ 6);
496 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
498 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
500 out
[2] = LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
+ 7);
502 out
[3] = LLVMGetParam(ctx
->main_fn
,
503 ctx
->param_vs_blit_inputs
+ 8);
508 union si_vs_fix_fetch fix_fetch
;
509 LLVMValueRef t_list_ptr
;
510 LLVMValueRef t_offset
;
512 LLVMValueRef vertex_index
;
515 /* Load the T list */
516 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
518 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
520 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
522 vertex_index
= LLVMGetParam(ctx
->main_fn
,
523 ctx
->param_vertex_index0
+
526 /* Use the open-coded implementation for all loads of doubles and
527 * of dword-sized data that needs fixups. We need to insert conversion
528 * code anyway, and the amd/common code does it for us.
530 * Note: On LLVM <= 8, we can only open-code formats with
531 * channel size >= 4 bytes.
533 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
534 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
536 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
537 (fix_fetch
.u
.log_size
== 2)) {
538 tmp
= ac_build_opencoded_load_format(
539 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
540 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
541 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
,
543 for (unsigned i
= 0; i
< 4; ++i
)
544 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
548 /* Do multiple loads for special formats. */
549 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
550 LLVMValueRef fetches
[4];
551 unsigned num_fetches
;
552 unsigned fetch_stride
;
553 unsigned channels_per_fetch
;
555 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
556 num_fetches
= MIN2(required_channels
, 3);
557 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
558 channels_per_fetch
= 1;
562 channels_per_fetch
= required_channels
;
565 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
566 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
567 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
568 channels_per_fetch
, false, true);
571 if (num_fetches
== 1 && channels_per_fetch
> 1) {
572 LLVMValueRef fetch
= fetches
[0];
573 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
574 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
575 fetches
[i
] = LLVMBuildExtractElement(
576 ctx
->ac
.builder
, fetch
, tmp
, "");
578 num_fetches
= channels_per_fetch
;
579 channels_per_fetch
= 1;
582 for (unsigned i
= num_fetches
; i
< 4; ++i
)
583 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
585 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
586 required_channels
== 4) {
587 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
588 fetches
[3] = ctx
->ac
.i32_1
;
590 fetches
[3] = ctx
->ac
.f32_1
;
591 } else if (fix_fetch
.u
.log_size
== 3 &&
592 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
593 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
594 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
595 required_channels
== 4) {
596 /* For 2_10_10_10, the hardware returns an unsigned value;
597 * convert it to a signed one.
599 LLVMValueRef tmp
= fetches
[3];
600 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
602 /* First, recover the sign-extended signed integer value. */
603 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
604 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
606 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
608 /* For the integer-like cases, do a natural sign extension.
610 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
611 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
614 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
615 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
616 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
617 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
619 /* Convert back to the right type. */
620 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
622 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
623 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
624 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
625 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
626 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
627 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
633 for (unsigned i
= 0; i
< 4; ++i
)
634 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
637 static void declare_input_vs(
638 struct si_shader_context
*ctx
,
639 unsigned input_index
,
640 const struct tgsi_full_declaration
*decl
,
643 si_llvm_load_input_vs(ctx
, input_index
, out
);
646 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
653 case PIPE_SHADER_VERTEX
:
654 return LLVMGetParam(ctx
->main_fn
,
655 ctx
->param_vs_prim_id
);
656 case PIPE_SHADER_TESS_CTRL
:
657 return ctx
->abi
.tcs_patch_id
;
658 case PIPE_SHADER_TESS_EVAL
:
659 return ctx
->abi
.tes_patch_id
;
660 case PIPE_SHADER_GEOMETRY
:
661 return ctx
->abi
.gs_prim_id
;
669 * Return the value of tgsi_ind_register for indexing.
670 * This is the indirect index with the constant offset added to it.
672 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
673 const struct tgsi_ind_register
*ind
,
679 if (ind
->File
== TGSI_FILE_ADDRESS
) {
680 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
681 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
683 struct tgsi_full_src_register src
= {};
685 src
.Register
.File
= ind
->File
;
686 src
.Register
.Index
= ind
->Index
;
688 /* Set the second index to 0 for constants. */
689 if (ind
->File
== TGSI_FILE_CONSTANT
)
690 src
.Register
.Dimension
= 1;
692 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
695 result
= ac_to_integer(&ctx
->ac
, result
);
698 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
699 LLVMConstInt(ctx
->i32
, rel_index
, 0));
703 * Like si_get_indirect_index, but restricts the return value to a (possibly
704 * undefined) value inside [0..num).
706 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
707 const struct tgsi_ind_register
*ind
,
708 int rel_index
, unsigned num
)
710 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
712 return si_llvm_bound_index(ctx
, result
, num
);
715 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
716 LLVMValueRef vertex_dw_stride
,
717 LLVMValueRef base_addr
,
718 LLVMValueRef vertex_index
,
719 LLVMValueRef param_index
,
720 unsigned input_index
,
725 if (vertex_dw_stride
) {
726 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
727 vertex_dw_stride
, base_addr
);
731 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
732 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
735 int param
= is_patch
?
736 si_shader_io_get_unique_index_patch(name
[input_index
],
737 index
[input_index
]) :
738 si_shader_io_get_unique_index(name
[input_index
],
739 index
[input_index
], false);
741 /* Add the base address of the element. */
742 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
743 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
747 * Calculate a dword address given an input or output register and a stride.
749 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
750 const struct tgsi_full_dst_register
*dst
,
751 const struct tgsi_full_src_register
*src
,
752 LLVMValueRef vertex_dw_stride
,
753 LLVMValueRef base_addr
)
755 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
756 ubyte
*name
, *index
, *array_first
;
758 struct tgsi_full_dst_register reg
;
759 LLVMValueRef vertex_index
= NULL
;
760 LLVMValueRef ind_index
= NULL
;
762 /* Set the register description. The address computation is the same
763 * for sources and destinations. */
765 reg
.Register
.File
= src
->Register
.File
;
766 reg
.Register
.Index
= src
->Register
.Index
;
767 reg
.Register
.Indirect
= src
->Register
.Indirect
;
768 reg
.Register
.Dimension
= src
->Register
.Dimension
;
769 reg
.Indirect
= src
->Indirect
;
770 reg
.Dimension
= src
->Dimension
;
771 reg
.DimIndirect
= src
->DimIndirect
;
775 /* If the register is 2-dimensional (e.g. an array of vertices
776 * in a primitive), calculate the base address of the vertex. */
777 if (reg
.Register
.Dimension
) {
778 if (reg
.Dimension
.Indirect
)
779 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
780 1, reg
.Dimension
.Index
);
782 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
785 /* Get information about the register. */
786 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
787 name
= info
->input_semantic_name
;
788 index
= info
->input_semantic_index
;
789 array_first
= info
->input_array_first
;
790 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
791 name
= info
->output_semantic_name
;
792 index
= info
->output_semantic_index
;
793 array_first
= info
->output_array_first
;
799 if (reg
.Register
.Indirect
) {
800 /* Add the relative address of the element. */
801 if (reg
.Indirect
.ArrayID
)
802 input_index
= array_first
[reg
.Indirect
.ArrayID
];
804 input_index
= reg
.Register
.Index
;
806 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
807 1, reg
.Register
.Index
- input_index
);
809 input_index
= reg
.Register
.Index
;
812 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
813 base_addr
, vertex_index
,
814 ind_index
, input_index
,
816 !reg
.Register
.Dimension
);
819 /* The offchip buffer layout for TCS->TES is
821 * - attribute 0 of patch 0 vertex 0
822 * - attribute 0 of patch 0 vertex 1
823 * - attribute 0 of patch 0 vertex 2
825 * - attribute 0 of patch 1 vertex 0
826 * - attribute 0 of patch 1 vertex 1
828 * - attribute 1 of patch 0 vertex 0
829 * - attribute 1 of patch 0 vertex 1
831 * - per patch attribute 0 of patch 0
832 * - per patch attribute 0 of patch 1
835 * Note that every attribute has 4 components.
837 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
838 LLVMValueRef rel_patch_id
,
839 LLVMValueRef vertex_index
,
840 LLVMValueRef param_index
)
842 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
843 LLVMValueRef param_stride
, constant16
;
845 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
846 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
847 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
850 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
852 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
853 vertices_per_patch
, vertex_index
);
854 param_stride
= total_vertices
;
856 base_addr
= rel_patch_id
;
857 param_stride
= num_patches
;
860 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
861 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
864 LLVMValueRef patch_data_offset
=
865 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
867 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
868 patch_data_offset
, "");
873 /* This is a generic helper that can be shared by the NIR and TGSI backends */
874 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
875 struct si_shader_context
*ctx
,
876 LLVMValueRef vertex_index
,
877 LLVMValueRef param_index
,
883 unsigned param_index_base
;
885 param_index_base
= is_patch
?
886 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
887 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
890 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
891 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
894 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
897 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
898 vertex_index
, param_index
);
901 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
902 struct si_shader_context
*ctx
,
903 const struct tgsi_full_dst_register
*dst
,
904 const struct tgsi_full_src_register
*src
)
906 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
907 ubyte
*name
, *index
, *array_first
;
908 struct tgsi_full_src_register reg
;
909 LLVMValueRef vertex_index
= NULL
;
910 LLVMValueRef param_index
= NULL
;
913 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
915 if (reg
.Register
.Dimension
) {
917 if (reg
.Dimension
.Indirect
)
918 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
919 1, reg
.Dimension
.Index
);
921 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
924 /* Get information about the register. */
925 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
926 name
= info
->input_semantic_name
;
927 index
= info
->input_semantic_index
;
928 array_first
= info
->input_array_first
;
929 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
930 name
= info
->output_semantic_name
;
931 index
= info
->output_semantic_index
;
932 array_first
= info
->output_array_first
;
938 if (reg
.Register
.Indirect
) {
939 if (reg
.Indirect
.ArrayID
)
940 param_base
= array_first
[reg
.Indirect
.ArrayID
];
942 param_base
= reg
.Register
.Index
;
944 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
945 1, reg
.Register
.Index
- param_base
);
948 param_base
= reg
.Register
.Index
;
951 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
952 param_index
, param_base
,
953 name
, index
, !reg
.Register
.Dimension
);
956 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
957 LLVMTypeRef type
, unsigned swizzle
,
958 LLVMValueRef buffer
, LLVMValueRef offset
,
959 LLVMValueRef base
, bool can_speculate
)
961 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
962 LLVMValueRef value
, value2
;
963 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
966 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
967 0, 1, 0, can_speculate
, false);
969 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
972 if (!llvm_type_is_64bit(ctx
, type
)) {
973 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
974 0, 1, 0, can_speculate
, false);
976 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
977 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
978 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
981 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
982 swizzle
* 4, 1, 0, can_speculate
, false);
984 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
985 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
987 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
993 * \param type output value type
994 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
995 * \param dw_addr address in dwords
997 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
998 LLVMTypeRef type
, unsigned swizzle
,
999 LLVMValueRef dw_addr
)
1001 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1004 if (swizzle
== ~0) {
1005 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1007 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1008 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1010 return ac_build_gather_values(&ctx
->ac
, values
,
1014 /* Split 64-bit loads. */
1015 if (llvm_type_is_64bit(ctx
, type
)) {
1016 LLVMValueRef lo
, hi
;
1018 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1019 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1020 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1023 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1024 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1026 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1028 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1034 * \param swizzle offset (typically 0..3)
1035 * \param dw_addr address in dwords
1036 * \param value value to store
1038 static void lds_store(struct si_shader_context
*ctx
,
1039 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1042 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1043 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1045 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1050 TESS_OFFCHIP_RING_TCS
,
1051 TESS_OFFCHIP_RING_TES
,
1054 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1055 enum si_tess_ring ring
)
1057 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1058 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1059 ctx
->param_tcs_out_lds_layout
;
1060 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1062 /* TCS only receives high 13 bits of the address. */
1063 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1064 addr
= LLVMBuildAnd(builder
, addr
,
1065 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1068 if (ring
== TCS_FACTOR_RING
) {
1069 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1070 addr
= LLVMBuildAdd(builder
, addr
,
1071 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1074 LLVMValueRef desc
[4];
1076 desc
[1] = LLVMConstInt(ctx
->i32
,
1077 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1078 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1079 desc
[3] = LLVMConstInt(ctx
->i32
,
1080 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1081 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1082 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1083 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1084 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1085 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1087 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1090 static LLVMValueRef
fetch_input_tcs(
1091 struct lp_build_tgsi_context
*bld_base
,
1092 const struct tgsi_full_src_register
*reg
,
1093 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1095 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1096 LLVMValueRef dw_addr
, stride
;
1097 unsigned swizzle
= swizzle_in
& 0xffff;
1098 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1099 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1100 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1102 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1105 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1107 LLVMValueRef vertex_index
,
1108 LLVMValueRef param_index
,
1109 unsigned const_index
,
1111 unsigned driver_location
,
1113 unsigned num_components
,
1118 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1119 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1120 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1121 LLVMValueRef dw_addr
, stride
;
1123 driver_location
= driver_location
/ 4;
1126 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1127 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1131 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1133 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1134 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1139 /* Add the constant index to the indirect index */
1140 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1141 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1143 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1149 names
= info
->input_semantic_name
;
1150 indices
= info
->input_semantic_index
;
1152 names
= info
->output_semantic_name
;
1153 indices
= info
->output_semantic_index
;
1156 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1157 vertex_index
, param_index
,
1162 LLVMValueRef value
[4];
1163 for (unsigned i
= 0; i
< num_components
; i
++) {
1164 unsigned offset
= i
;
1165 if (llvm_type_is_64bit(ctx
, type
))
1168 offset
+= component
;
1169 value
[i
+ component
] = lds_load(bld_base
, type
, offset
, dw_addr
);
1172 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1175 static LLVMValueRef
fetch_output_tcs(
1176 struct lp_build_tgsi_context
*bld_base
,
1177 const struct tgsi_full_src_register
*reg
,
1178 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1180 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1181 LLVMValueRef dw_addr
, stride
;
1182 unsigned swizzle
= (swizzle_in
& 0xffff);
1184 if (reg
->Register
.Dimension
) {
1185 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1186 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1187 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1189 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1190 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1193 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1196 static LLVMValueRef
fetch_input_tes(
1197 struct lp_build_tgsi_context
*bld_base
,
1198 const struct tgsi_full_src_register
*reg
,
1199 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1201 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1202 LLVMValueRef base
, addr
;
1203 unsigned swizzle
= (swizzle_in
& 0xffff);
1205 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1206 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1208 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1209 ctx
->tess_offchip_ring
, base
, addr
, true);
1212 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1214 LLVMValueRef vertex_index
,
1215 LLVMValueRef param_index
,
1216 unsigned const_index
,
1218 unsigned driver_location
,
1220 unsigned num_components
,
1225 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1226 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1227 LLVMValueRef base
, addr
;
1229 driver_location
= driver_location
/ 4;
1231 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1234 /* Add the constant index to the indirect index */
1235 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1236 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1238 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1241 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1242 param_index
, driver_location
,
1243 info
->input_semantic_name
,
1244 info
->input_semantic_index
,
1247 /* TODO: This will generate rather ordinary llvm code, although it
1248 * should be easy for the optimiser to fix up. In future we might want
1249 * to refactor buffer_load(), but for now this maximises code sharing
1250 * between the NIR and TGSI backends.
1252 LLVMValueRef value
[4];
1253 for (unsigned i
= 0; i
< num_components
; i
++) {
1254 unsigned offset
= i
;
1255 if (llvm_type_is_64bit(ctx
, type
))
1258 offset
+= component
;
1259 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1260 ctx
->tess_offchip_ring
, base
, addr
, true);
1263 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1266 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1267 const struct tgsi_full_instruction
*inst
,
1268 const struct tgsi_opcode_info
*info
,
1270 LLVMValueRef dst
[4])
1272 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1273 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1274 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1275 unsigned chan_index
;
1276 LLVMValueRef dw_addr
, stride
;
1277 LLVMValueRef buffer
, base
, buf_addr
;
1278 LLVMValueRef values
[4];
1279 bool skip_lds_store
;
1280 bool is_tess_factor
= false, is_tess_inner
= false;
1282 /* Only handle per-patch and per-vertex outputs here.
1283 * Vectors will be lowered to scalars and this function will be called again.
1285 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1286 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1287 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1291 if (reg
->Register
.Dimension
) {
1292 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1293 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1294 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1295 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1297 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1298 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1299 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1301 if (!reg
->Register
.Indirect
) {
1302 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1304 /* Always write tess factors into LDS for the TCS epilog. */
1305 if (name
== TGSI_SEMANTIC_TESSINNER
||
1306 name
== TGSI_SEMANTIC_TESSOUTER
) {
1307 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1308 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1309 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1310 is_tess_factor
= true;
1311 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1316 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1318 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1319 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1321 uint32_t writemask
= reg
->Register
.WriteMask
;
1323 chan_index
= u_bit_scan(&writemask
);
1324 LLVMValueRef value
= dst
[chan_index
];
1326 if (inst
->Instruction
.Saturate
)
1327 value
= ac_build_clamp(&ctx
->ac
, value
);
1329 /* Skip LDS stores if there is no LDS read of this output. */
1330 if (!skip_lds_store
)
1331 lds_store(ctx
, chan_index
, dw_addr
, value
);
1333 value
= ac_to_integer(&ctx
->ac
, value
);
1334 values
[chan_index
] = value
;
1336 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1337 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1339 4 * chan_index
, 1, 0, true, false);
1342 /* Write tess factors into VGPRs for the epilog. */
1343 if (is_tess_factor
&&
1344 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1345 if (!is_tess_inner
) {
1346 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1347 ctx
->invoc0_tess_factors
[chan_index
]);
1348 } else if (chan_index
< 2) {
1349 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1350 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1355 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1356 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1358 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1359 base
, 0, 1, 0, true, false);
1363 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1364 const struct nir_variable
*var
,
1365 LLVMValueRef vertex_index
,
1366 LLVMValueRef param_index
,
1367 unsigned const_index
,
1371 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1372 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1373 const unsigned component
= var
->data
.location_frac
;
1374 const bool is_patch
= var
->data
.patch
;
1375 unsigned driver_location
= var
->data
.driver_location
;
1376 LLVMValueRef dw_addr
, stride
;
1377 LLVMValueRef buffer
, base
, addr
;
1378 LLVMValueRef values
[4];
1379 bool skip_lds_store
;
1380 bool is_tess_factor
= false, is_tess_inner
= false;
1382 driver_location
= driver_location
/ 4;
1385 /* Add the constant index to the indirect index */
1386 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1387 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1389 if (const_index
!= 0)
1390 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1394 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1395 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1396 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1397 vertex_index
, param_index
,
1399 info
->output_semantic_name
,
1400 info
->output_semantic_index
,
1403 skip_lds_store
= !info
->reads_pervertex_outputs
;
1405 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1406 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1407 vertex_index
, param_index
,
1409 info
->output_semantic_name
,
1410 info
->output_semantic_index
,
1413 skip_lds_store
= !info
->reads_perpatch_outputs
;
1416 int name
= info
->output_semantic_name
[driver_location
];
1418 /* Always write tess factors into LDS for the TCS epilog. */
1419 if (name
== TGSI_SEMANTIC_TESSINNER
||
1420 name
== TGSI_SEMANTIC_TESSOUTER
) {
1421 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1422 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1423 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1424 is_tess_factor
= true;
1425 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1430 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1432 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1434 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1435 param_index
, driver_location
,
1436 info
->output_semantic_name
,
1437 info
->output_semantic_index
,
1440 for (unsigned chan
= 0; chan
< 4; chan
++) {
1441 if (!(writemask
& (1 << chan
)))
1443 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1445 /* Skip LDS stores if there is no LDS read of this output. */
1446 if (!skip_lds_store
)
1447 lds_store(ctx
, chan
, dw_addr
, value
);
1449 value
= ac_to_integer(&ctx
->ac
, value
);
1450 values
[chan
] = value
;
1452 if (writemask
!= 0xF && !is_tess_factor
) {
1453 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1455 4 * chan
, 1, 0, true, false);
1458 /* Write tess factors into VGPRs for the epilog. */
1459 if (is_tess_factor
&&
1460 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1461 if (!is_tess_inner
) {
1462 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1463 ctx
->invoc0_tess_factors
[chan
]);
1464 } else if (chan
< 2) {
1465 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1466 ctx
->invoc0_tess_factors
[4 + chan
]);
1471 if (writemask
== 0xF && !is_tess_factor
) {
1472 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1474 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1475 base
, 0, 1, 0, true, false);
1479 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1480 unsigned input_index
,
1481 unsigned vtx_offset_param
,
1485 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1486 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1487 struct si_shader
*shader
= ctx
->shader
;
1488 LLVMValueRef vtx_offset
, soffset
;
1489 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1490 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1491 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1495 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1497 /* GFX9 has the ESGS ring in LDS. */
1498 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1499 unsigned index
= vtx_offset_param
;
1501 switch (index
/ 2) {
1503 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1504 index
% 2 ? 16 : 0, 16);
1507 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1508 index
% 2 ? 16 : 0, 16);
1511 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1512 index
% 2 ? 16 : 0, 16);
1519 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1520 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1521 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1524 /* GFX6: input load from the ESGS ring in memory. */
1525 if (swizzle
== ~0) {
1526 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1528 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1529 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1532 return ac_build_gather_values(&ctx
->ac
, values
,
1536 /* Get the vertex offset parameter on GFX6. */
1537 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1539 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1540 LLVMConstInt(ctx
->i32
, 4, 0), "");
1542 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1544 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1545 vtx_offset
, soffset
, 0, 1, 0, true, false);
1546 if (llvm_type_is_64bit(ctx
, type
)) {
1547 LLVMValueRef value2
;
1548 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1550 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1551 ctx
->i32_0
, vtx_offset
, soffset
,
1552 0, 1, 0, true, false);
1553 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1555 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1558 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1560 unsigned driver_location
,
1562 unsigned num_components
,
1563 unsigned vertex_index
,
1564 unsigned const_index
,
1567 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1569 LLVMValueRef value
[4];
1570 for (unsigned i
= 0; i
< num_components
; i
++) {
1571 unsigned offset
= i
;
1572 if (llvm_type_is_64bit(ctx
, type
))
1575 offset
+= component
;
1576 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1577 vertex_index
, type
, offset
);
1580 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1583 static LLVMValueRef
fetch_input_gs(
1584 struct lp_build_tgsi_context
*bld_base
,
1585 const struct tgsi_full_src_register
*reg
,
1586 enum tgsi_opcode_type type
,
1587 unsigned swizzle_in
)
1589 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1590 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1591 unsigned swizzle
= swizzle_in
& 0xffff;
1593 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1594 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1595 return get_primitive_id(ctx
, swizzle
);
1597 if (!reg
->Register
.Dimension
)
1600 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1601 reg
->Dimension
.Index
,
1602 tgsi2llvmtype(bld_base
, type
),
1606 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1608 switch (interpolate
) {
1609 case TGSI_INTERPOLATE_CONSTANT
:
1612 case TGSI_INTERPOLATE_LINEAR
:
1613 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1614 return SI_PARAM_LINEAR_SAMPLE
;
1615 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1616 return SI_PARAM_LINEAR_CENTROID
;
1618 return SI_PARAM_LINEAR_CENTER
;
1620 case TGSI_INTERPOLATE_COLOR
:
1621 case TGSI_INTERPOLATE_PERSPECTIVE
:
1622 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1623 return SI_PARAM_PERSP_SAMPLE
;
1624 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1625 return SI_PARAM_PERSP_CENTROID
;
1627 return SI_PARAM_PERSP_CENTER
;
1630 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1635 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1636 unsigned attr_index
, unsigned chan
,
1637 LLVMValueRef prim_mask
,
1638 LLVMValueRef i
, LLVMValueRef j
)
1641 return ac_build_fs_interp(&ctx
->ac
,
1642 LLVMConstInt(ctx
->i32
, chan
, 0),
1643 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1646 return ac_build_fs_interp_mov(&ctx
->ac
,
1647 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1648 LLVMConstInt(ctx
->i32
, chan
, 0),
1649 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1654 * Interpolate a fragment shader input.
1656 * @param ctx context
1657 * @param input_index index of the input in hardware
1658 * @param semantic_name TGSI_SEMANTIC_*
1659 * @param semantic_index semantic index
1660 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1661 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1662 * @param interp_param interpolation weights (i,j)
1663 * @param prim_mask SI_PARAM_PRIM_MASK
1664 * @param face SI_PARAM_FRONT_FACE
1665 * @param result the return value (4 components)
1667 static void interp_fs_input(struct si_shader_context
*ctx
,
1668 unsigned input_index
,
1669 unsigned semantic_name
,
1670 unsigned semantic_index
,
1671 unsigned num_interp_inputs
,
1672 unsigned colors_read_mask
,
1673 LLVMValueRef interp_param
,
1674 LLVMValueRef prim_mask
,
1676 LLVMValueRef result
[4])
1678 LLVMValueRef i
= NULL
, j
= NULL
;
1681 /* fs.constant returns the param from the middle vertex, so it's not
1682 * really useful for flat shading. It's meant to be used for custom
1683 * interpolation (but the intrinsic can't fetch from the other two
1686 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1687 * to do the right thing. The only reason we use fs.constant is that
1688 * fs.interp cannot be used on integers, because they can be equal
1691 * When interp is false we will use fs.constant or for newer llvm,
1692 * amdgcn.interp.mov.
1694 bool interp
= interp_param
!= NULL
;
1697 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1698 LLVMVectorType(ctx
->f32
, 2), "");
1700 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1702 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1706 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1707 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1708 LLVMValueRef is_face_positive
;
1710 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1711 * otherwise it's at offset "num_inputs".
1713 unsigned back_attr_offset
= num_interp_inputs
;
1714 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1715 back_attr_offset
+= 1;
1717 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1718 face
, ctx
->i32_0
, "");
1720 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1721 LLVMValueRef front
, back
;
1723 front
= si_build_fs_interp(ctx
,
1726 back
= si_build_fs_interp(ctx
,
1727 back_attr_offset
, chan
,
1730 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1736 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1737 result
[0] = si_build_fs_interp(ctx
, input_index
,
1738 0, prim_mask
, i
, j
);
1740 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1741 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1743 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1744 result
[chan
] = si_build_fs_interp(ctx
,
1751 void si_llvm_load_input_fs(
1752 struct si_shader_context
*ctx
,
1753 unsigned input_index
,
1754 LLVMValueRef out
[4])
1756 struct si_shader
*shader
= ctx
->shader
;
1757 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1758 LLVMValueRef main_fn
= ctx
->main_fn
;
1759 LLVMValueRef interp_param
= NULL
;
1760 int interp_param_idx
;
1761 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1762 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1763 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1764 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1766 /* Get colors from input VGPRs (set by the prolog). */
1767 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1768 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1769 unsigned mask
= colors_read
>> (semantic_index
* 4);
1770 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1771 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1772 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1774 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1775 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1776 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1777 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1781 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1782 if (interp_param_idx
== -1)
1784 else if (interp_param_idx
) {
1785 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1788 interp_fs_input(ctx
, input_index
, semantic_name
,
1789 semantic_index
, 0, /* this param is unused */
1790 shader
->selector
->info
.colors_read
, interp_param
,
1792 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1796 static void declare_input_fs(
1797 struct si_shader_context
*ctx
,
1798 unsigned input_index
,
1799 const struct tgsi_full_declaration
*decl
,
1800 LLVMValueRef out
[4])
1802 si_llvm_load_input_fs(ctx
, input_index
, out
);
1805 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1807 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1810 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1812 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1814 /* For non-indexed draws, the base vertex set by the driver
1815 * (for direct draws) or the CP (for indirect draws) is the
1816 * first vertex ID, but GLSL expects 0 to be returned.
1818 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1819 ctx
->param_vs_state_bits
);
1820 LLVMValueRef indexed
;
1822 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1823 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1825 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1829 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1831 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1833 LLVMValueRef values
[3];
1834 LLVMValueRef result
;
1836 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1838 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1839 unsigned sizes
[3] = {
1840 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1841 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1842 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1845 for (i
= 0; i
< 3; ++i
)
1846 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1848 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1850 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1857 * Load a dword from a constant buffer.
1859 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1860 LLVMValueRef resource
,
1861 LLVMValueRef offset
)
1863 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1864 0, 0, 0, true, true);
1867 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1869 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1870 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1871 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1872 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1874 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1875 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1876 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1878 LLVMValueRef pos
[4] = {
1879 buffer_load_const(ctx
, resource
, offset0
),
1880 buffer_load_const(ctx
, resource
, offset1
),
1881 LLVMConstReal(ctx
->f32
, 0),
1882 LLVMConstReal(ctx
->f32
, 0)
1885 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1888 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1890 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1891 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1894 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1896 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1897 LLVMValueRef coord
[4] = {
1898 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1899 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1904 /* For triangles, the vector should be (u, v, 1-u-v). */
1905 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1906 PIPE_PRIM_TRIANGLES
) {
1907 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1908 LLVMBuildFAdd(ctx
->ac
.builder
,
1909 coord
[0], coord
[1], ""), "");
1911 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1914 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1915 unsigned semantic_name
)
1917 LLVMValueRef base
, addr
;
1919 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1921 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1922 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1923 LLVMConstInt(ctx
->i32
, param
, 0));
1925 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1926 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1930 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1931 unsigned varying_id
)
1933 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1934 unsigned semantic_name
;
1936 switch (varying_id
) {
1937 case VARYING_SLOT_TESS_LEVEL_INNER
:
1938 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1940 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1941 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1944 unreachable("unknown tess level");
1947 return load_tess_level(ctx
, semantic_name
);
1951 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1953 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1954 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1955 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
1956 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1957 return get_num_tcs_out_vertices(ctx
);
1959 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1962 void si_load_system_value(struct si_shader_context
*ctx
,
1964 const struct tgsi_full_declaration
*decl
)
1966 LLVMValueRef value
= 0;
1968 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1970 switch (decl
->Semantic
.Name
) {
1971 case TGSI_SEMANTIC_INSTANCEID
:
1972 value
= ctx
->abi
.instance_id
;
1975 case TGSI_SEMANTIC_VERTEXID
:
1976 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1978 ctx
->abi
.base_vertex
, "");
1981 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1982 /* Unused. Clarify the meaning in indexed vs. non-indexed
1983 * draws if this is ever used again. */
1987 case TGSI_SEMANTIC_BASEVERTEX
:
1988 value
= get_base_vertex(&ctx
->abi
);
1991 case TGSI_SEMANTIC_BASEINSTANCE
:
1992 value
= ctx
->abi
.start_instance
;
1995 case TGSI_SEMANTIC_DRAWID
:
1996 value
= ctx
->abi
.draw_id
;
1999 case TGSI_SEMANTIC_INVOCATIONID
:
2000 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2001 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2002 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2003 value
= ctx
->abi
.gs_invocation_id
;
2005 assert(!"INVOCATIONID not implemented");
2008 case TGSI_SEMANTIC_POSITION
:
2010 LLVMValueRef pos
[4] = {
2011 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2012 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2013 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2014 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2015 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2017 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2021 case TGSI_SEMANTIC_FACE
:
2022 value
= ctx
->abi
.front_face
;
2025 case TGSI_SEMANTIC_SAMPLEID
:
2026 value
= si_get_sample_id(ctx
);
2029 case TGSI_SEMANTIC_SAMPLEPOS
: {
2030 LLVMValueRef pos
[4] = {
2031 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2032 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2033 LLVMConstReal(ctx
->f32
, 0),
2034 LLVMConstReal(ctx
->f32
, 0)
2036 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2037 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2038 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2042 case TGSI_SEMANTIC_SAMPLEMASK
:
2043 /* This can only occur with the OpenGL Core profile, which
2044 * doesn't support smoothing.
2046 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2049 case TGSI_SEMANTIC_TESSCOORD
:
2050 value
= si_load_tess_coord(&ctx
->abi
);
2053 case TGSI_SEMANTIC_VERTICESIN
:
2054 value
= si_load_patch_vertices_in(&ctx
->abi
);
2057 case TGSI_SEMANTIC_TESSINNER
:
2058 case TGSI_SEMANTIC_TESSOUTER
:
2059 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2062 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2063 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2065 LLVMValueRef buf
, slot
, val
[4];
2068 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2069 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2070 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2071 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2073 for (i
= 0; i
< 4; i
++)
2074 val
[i
] = buffer_load_const(ctx
, buf
,
2075 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2076 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2080 case TGSI_SEMANTIC_PRIMID
:
2081 value
= get_primitive_id(ctx
, 0);
2084 case TGSI_SEMANTIC_GRID_SIZE
:
2085 value
= ctx
->abi
.num_work_groups
;
2088 case TGSI_SEMANTIC_BLOCK_SIZE
:
2089 value
= get_block_size(&ctx
->abi
);
2092 case TGSI_SEMANTIC_BLOCK_ID
:
2094 LLVMValueRef values
[3];
2096 for (int i
= 0; i
< 3; i
++) {
2097 values
[i
] = ctx
->i32_0
;
2098 if (ctx
->abi
.workgroup_ids
[i
]) {
2099 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2102 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2106 case TGSI_SEMANTIC_THREAD_ID
:
2107 value
= ctx
->abi
.local_invocation_ids
;
2110 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2111 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2114 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2115 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2118 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2119 value
= ac_get_thread_id(&ctx
->ac
);
2122 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2124 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2125 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2126 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2127 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2131 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2132 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2133 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2134 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2136 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2137 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2138 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2139 /* All bits set except LSB */
2140 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2143 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2145 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2146 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2147 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2148 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2149 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2150 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2154 case TGSI_SEMANTIC_CS_USER_DATA
:
2155 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2159 assert(!"unknown system value");
2163 ctx
->system_values
[index
] = value
;
2166 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2168 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2169 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2171 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2174 assert(!ctx
->ac
.lds
);
2176 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2177 LLVMArrayType(ctx
->i8
, lds_size
),
2180 LLVMSetAlignment(var
, 4);
2182 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2185 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2186 const struct tgsi_full_declaration
*decl
)
2188 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2189 assert(decl
->Range
.First
== decl
->Range
.Last
);
2191 si_declare_compute_memory(ctx
);
2194 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2197 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2198 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2200 /* Do the bounds checking with a descriptor, because
2201 * doing computation and manual bounds checking of 64-bit
2202 * addresses generates horrible VALU code with very high
2203 * VGPR usage and very low SIMD occupancy.
2205 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2207 LLVMValueRef desc0
, desc1
;
2209 desc1
= LLVMConstInt(ctx
->i32
,
2210 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2212 LLVMValueRef desc_elems
[] = {
2215 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2216 LLVMConstInt(ctx
->i32
,
2217 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2218 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2219 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2220 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2221 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2222 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2225 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2228 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2230 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2231 ctx
->param_const_and_shader_buffers
);
2233 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2234 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2237 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2239 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2240 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2242 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2244 if (sel
->info
.const_buffers_declared
== 1 &&
2245 sel
->info
.shader_buffers_declared
== 0) {
2246 return load_const_buffer_desc_fast_path(ctx
);
2249 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2250 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2251 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2253 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2257 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2259 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2260 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2261 ctx
->param_const_and_shader_buffers
);
2263 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2264 index
= LLVMBuildSub(ctx
->ac
.builder
,
2265 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2268 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2271 static LLVMValueRef
fetch_constant(
2272 struct lp_build_tgsi_context
*bld_base
,
2273 const struct tgsi_full_src_register
*reg
,
2274 enum tgsi_opcode_type type
,
2275 unsigned swizzle_in
)
2277 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2278 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2279 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2281 unsigned swizzle
= swizzle_in
& 0xffff;
2283 LLVMValueRef addr
, bufp
;
2285 if (swizzle_in
== LP_CHAN_ALL
) {
2287 LLVMValueRef values
[4];
2288 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2289 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2291 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2294 /* Split 64-bit loads. */
2295 if (tgsi_type_is_64bit(type
)) {
2296 LLVMValueRef lo
, hi
;
2298 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2299 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2300 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2304 idx
= reg
->Register
.Index
* 4 + swizzle
;
2305 if (reg
->Register
.Indirect
) {
2306 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2308 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2311 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2312 if (sel
->info
.const_buffers_declared
== 1 &&
2313 sel
->info
.shader_buffers_declared
== 0) {
2314 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2315 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2316 return bitcast(bld_base
, type
, result
);
2319 assert(reg
->Register
.Dimension
);
2320 buf
= reg
->Dimension
.Index
;
2322 if (reg
->Dimension
.Indirect
) {
2323 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2325 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2326 reg
->Dimension
.Index
,
2327 ctx
->num_const_buffers
);
2328 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2329 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2330 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2332 bufp
= load_const_buffer_desc(ctx
, buf
);
2334 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2337 /* Initialize arguments for the shader export intrinsic */
2338 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2339 LLVMValueRef
*values
,
2341 struct ac_export_args
*args
)
2343 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2344 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2346 bool is_int8
, is_int10
;
2348 /* Default is 0xf. Adjusted below depending on the format. */
2349 args
->enabled_channels
= 0xf; /* writemask */
2351 /* Specify whether the EXEC mask represents the valid mask */
2352 args
->valid_mask
= 0;
2354 /* Specify whether this is the last export */
2357 /* Specify the target we are exporting */
2358 args
->target
= target
;
2360 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2361 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2362 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2363 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2365 assert(cbuf
>= 0 && cbuf
< 8);
2366 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2367 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2368 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2371 args
->compr
= false;
2372 args
->out
[0] = f32undef
;
2373 args
->out
[1] = f32undef
;
2374 args
->out
[2] = f32undef
;
2375 args
->out
[3] = f32undef
;
2377 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2378 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2379 unsigned bits
, bool hi
) = NULL
;
2381 switch (spi_shader_col_format
) {
2382 case V_028714_SPI_SHADER_ZERO
:
2383 args
->enabled_channels
= 0; /* writemask */
2384 args
->target
= V_008DFC_SQ_EXP_NULL
;
2387 case V_028714_SPI_SHADER_32_R
:
2388 args
->enabled_channels
= 1; /* writemask */
2389 args
->out
[0] = values
[0];
2392 case V_028714_SPI_SHADER_32_GR
:
2393 args
->enabled_channels
= 0x3; /* writemask */
2394 args
->out
[0] = values
[0];
2395 args
->out
[1] = values
[1];
2398 case V_028714_SPI_SHADER_32_AR
:
2399 args
->enabled_channels
= 0x9; /* writemask */
2400 args
->out
[0] = values
[0];
2401 args
->out
[3] = values
[3];
2404 case V_028714_SPI_SHADER_FP16_ABGR
:
2405 packf
= ac_build_cvt_pkrtz_f16
;
2408 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2409 packf
= ac_build_cvt_pknorm_u16
;
2412 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2413 packf
= ac_build_cvt_pknorm_i16
;
2416 case V_028714_SPI_SHADER_UINT16_ABGR
:
2417 packi
= ac_build_cvt_pk_u16
;
2420 case V_028714_SPI_SHADER_SINT16_ABGR
:
2421 packi
= ac_build_cvt_pk_i16
;
2424 case V_028714_SPI_SHADER_32_ABGR
:
2425 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2429 /* Pack f16 or norm_i16/u16. */
2431 for (chan
= 0; chan
< 2; chan
++) {
2432 LLVMValueRef pack_args
[2] = {
2434 values
[2 * chan
+ 1]
2436 LLVMValueRef packed
;
2438 packed
= packf(&ctx
->ac
, pack_args
);
2439 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2441 args
->compr
= 1; /* COMPR flag */
2445 for (chan
= 0; chan
< 2; chan
++) {
2446 LLVMValueRef pack_args
[2] = {
2447 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2448 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2450 LLVMValueRef packed
;
2452 packed
= packi(&ctx
->ac
, pack_args
,
2453 is_int8
? 8 : is_int10
? 10 : 16,
2455 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2457 args
->compr
= 1; /* COMPR flag */
2461 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2464 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2466 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2467 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2468 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2469 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2470 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2471 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2472 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2473 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2475 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2478 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2479 SI_PARAM_ALPHA_REF
);
2480 LLVMValueRef alpha_pass
=
2481 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2482 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2484 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2488 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2490 unsigned samplemask_param
)
2492 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2493 LLVMValueRef coverage
;
2495 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2496 coverage
= LLVMGetParam(ctx
->main_fn
,
2498 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2500 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2502 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2504 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2507 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2508 LLVMConstReal(ctx
->f32
,
2509 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2511 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2514 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2515 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2519 unsigned const_chan
;
2520 LLVMValueRef base_elt
;
2521 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2522 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2523 SI_VS_CONST_CLIP_PLANES
, 0);
2524 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2526 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2527 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2532 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2534 /* Compute dot products of position and user clip plane vectors */
2535 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2536 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2538 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2539 const_chan
) * 4, 0);
2540 base_elt
= buffer_load_const(ctx
, const_resource
,
2542 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2543 out_elts
[const_chan
], args
->out
[chan
]);
2547 args
->enabled_channels
= 0xf;
2548 args
->valid_mask
= 0;
2550 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2555 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2559 if (so
->num_outputs
)
2560 fprintf(stderr
, "STREAMOUT\n");
2562 for (i
= 0; i
< so
->num_outputs
; i
++) {
2563 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2564 so
->output
[i
].start_component
;
2565 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2566 i
, so
->output
[i
].output_buffer
,
2567 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2568 so
->output
[i
].register_index
,
2569 mask
& 1 ? "x" : "",
2570 mask
& 2 ? "y" : "",
2571 mask
& 4 ? "z" : "",
2572 mask
& 8 ? "w" : "");
2576 static void emit_streamout_output(struct si_shader_context
*ctx
,
2577 LLVMValueRef
const *so_buffers
,
2578 LLVMValueRef
const *so_write_offsets
,
2579 struct pipe_stream_output
*stream_out
,
2580 struct si_shader_output_values
*shader_out
)
2582 unsigned buf_idx
= stream_out
->output_buffer
;
2583 unsigned start
= stream_out
->start_component
;
2584 unsigned num_comps
= stream_out
->num_components
;
2585 LLVMValueRef out
[4];
2587 assert(num_comps
&& num_comps
<= 4);
2588 if (!num_comps
|| num_comps
> 4)
2591 /* Load the output as int. */
2592 for (int j
= 0; j
< num_comps
; j
++) {
2593 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2595 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2598 /* Pack the output. */
2599 LLVMValueRef vdata
= NULL
;
2601 switch (num_comps
) {
2602 case 1: /* as i32 */
2605 case 2: /* as v2i32 */
2606 case 3: /* as v4i32 (aligned to 4) */
2607 out
[3] = LLVMGetUndef(ctx
->i32
);
2609 case 4: /* as v4i32 */
2610 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2614 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2616 so_write_offsets
[buf_idx
],
2618 stream_out
->dst_offset
* 4, 1, 1, true, false);
2622 * Write streamout data to buffers for vertex stream @p stream (different
2623 * vertex streams can occur for GS copy shaders).
2625 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2626 struct si_shader_output_values
*outputs
,
2627 unsigned noutput
, unsigned stream
)
2629 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2630 struct pipe_stream_output_info
*so
= &sel
->so
;
2631 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2633 struct lp_build_if_state if_ctx
;
2635 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2636 LLVMValueRef so_vtx_count
=
2637 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2639 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2641 /* can_emit = tid < so_vtx_count; */
2642 LLVMValueRef can_emit
=
2643 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2645 /* Emit the streamout code conditionally. This actually avoids
2646 * out-of-bounds buffer access. The hw tells us via the SGPR
2647 * (so_vtx_count) which threads are allowed to emit streamout data. */
2648 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2650 /* The buffer offset is computed as follows:
2651 * ByteOffset = streamout_offset[buffer_id]*4 +
2652 * (streamout_write_index + thread_id)*stride[buffer_id] +
2656 LLVMValueRef so_write_index
=
2657 LLVMGetParam(ctx
->main_fn
,
2658 ctx
->param_streamout_write_index
);
2660 /* Compute (streamout_write_index + thread_id). */
2661 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2663 /* Load the descriptor and compute the write offset for each
2664 * enabled buffer. */
2665 LLVMValueRef so_write_offset
[4] = {};
2666 LLVMValueRef so_buffers
[4];
2667 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2668 ctx
->param_rw_buffers
);
2670 for (i
= 0; i
< 4; i
++) {
2674 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2675 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2677 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2679 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2680 ctx
->param_streamout_offset
[i
]);
2681 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2683 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2684 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2688 /* Write streamout data. */
2689 for (i
= 0; i
< so
->num_outputs
; i
++) {
2690 unsigned reg
= so
->output
[i
].register_index
;
2695 if (stream
!= so
->output
[i
].stream
)
2698 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2699 &so
->output
[i
], &outputs
[reg
]);
2702 lp_build_endif(&if_ctx
);
2705 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2706 LLVMValueRef
*values
)
2708 struct ac_export_args args
;
2710 si_llvm_init_export_args(ctx
, values
,
2711 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2712 ac_build_export(&ctx
->ac
, &args
);
2715 static void si_build_param_exports(struct si_shader_context
*ctx
,
2716 struct si_shader_output_values
*outputs
,
2719 struct si_shader
*shader
= ctx
->shader
;
2720 unsigned param_count
= 0;
2722 for (unsigned i
= 0; i
< noutput
; i
++) {
2723 unsigned semantic_name
= outputs
[i
].semantic_name
;
2724 unsigned semantic_index
= outputs
[i
].semantic_index
;
2726 if (outputs
[i
].vertex_stream
[0] != 0 &&
2727 outputs
[i
].vertex_stream
[1] != 0 &&
2728 outputs
[i
].vertex_stream
[2] != 0 &&
2729 outputs
[i
].vertex_stream
[3] != 0)
2732 switch (semantic_name
) {
2733 case TGSI_SEMANTIC_LAYER
:
2734 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2735 case TGSI_SEMANTIC_CLIPDIST
:
2736 case TGSI_SEMANTIC_COLOR
:
2737 case TGSI_SEMANTIC_BCOLOR
:
2738 case TGSI_SEMANTIC_PRIMID
:
2739 case TGSI_SEMANTIC_FOG
:
2740 case TGSI_SEMANTIC_TEXCOORD
:
2741 case TGSI_SEMANTIC_GENERIC
:
2747 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2748 semantic_index
< SI_MAX_IO_GENERIC
) &&
2749 shader
->key
.opt
.kill_outputs
&
2750 (1ull << si_shader_io_get_unique_index(semantic_name
,
2751 semantic_index
, true)))
2754 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2756 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2757 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2760 shader
->info
.nr_param_exports
= param_count
;
2763 /* Generate export instructions for hardware VS shader stage */
2764 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2765 struct si_shader_output_values
*outputs
,
2768 struct si_shader
*shader
= ctx
->shader
;
2769 struct ac_export_args pos_args
[4] = {};
2770 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2774 /* Build position exports. */
2775 for (i
= 0; i
< noutput
; i
++) {
2776 switch (outputs
[i
].semantic_name
) {
2777 case TGSI_SEMANTIC_POSITION
:
2778 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2779 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2781 case TGSI_SEMANTIC_PSIZE
:
2782 psize_value
= outputs
[i
].values
[0];
2784 case TGSI_SEMANTIC_LAYER
:
2785 layer_value
= outputs
[i
].values
[0];
2787 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2788 viewport_index_value
= outputs
[i
].values
[0];
2790 case TGSI_SEMANTIC_EDGEFLAG
:
2791 edgeflag_value
= outputs
[i
].values
[0];
2793 case TGSI_SEMANTIC_CLIPDIST
:
2794 if (!shader
->key
.opt
.clip_disable
) {
2795 unsigned index
= 2 + outputs
[i
].semantic_index
;
2796 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2797 V_008DFC_SQ_EXP_POS
+ index
,
2801 case TGSI_SEMANTIC_CLIPVERTEX
:
2802 if (!shader
->key
.opt
.clip_disable
) {
2803 si_llvm_emit_clipvertex(ctx
, pos_args
,
2810 /* We need to add the position output manually if it's missing. */
2811 if (!pos_args
[0].out
[0]) {
2812 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2813 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2814 pos_args
[0].done
= 0; /* last export? */
2815 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2816 pos_args
[0].compr
= 0; /* COMPR flag */
2817 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2818 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2819 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2820 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2823 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2824 if (shader
->selector
->info
.writes_psize
||
2825 shader
->selector
->info
.writes_edgeflag
||
2826 shader
->selector
->info
.writes_viewport_index
||
2827 shader
->selector
->info
.writes_layer
) {
2828 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2829 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2830 (shader
->selector
->info
.writes_layer
<< 2);
2832 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2833 pos_args
[1].done
= 0; /* last export? */
2834 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2835 pos_args
[1].compr
= 0; /* COMPR flag */
2836 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2837 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2838 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2839 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2841 if (shader
->selector
->info
.writes_psize
)
2842 pos_args
[1].out
[0] = psize_value
;
2844 if (shader
->selector
->info
.writes_edgeflag
) {
2845 /* The output is a float, but the hw expects an integer
2846 * with the first bit containing the edge flag. */
2847 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2850 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2854 /* The LLVM intrinsic expects a float. */
2855 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2858 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2859 /* GFX9 has the layer in out.z[10:0] and the viewport
2860 * index in out.z[19:16].
2862 if (shader
->selector
->info
.writes_layer
)
2863 pos_args
[1].out
[2] = layer_value
;
2865 if (shader
->selector
->info
.writes_viewport_index
) {
2866 LLVMValueRef v
= viewport_index_value
;
2868 v
= ac_to_integer(&ctx
->ac
, v
);
2869 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2870 LLVMConstInt(ctx
->i32
, 16, 0), "");
2871 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2872 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2873 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2874 pos_args
[1].enabled_channels
|= 1 << 2;
2877 if (shader
->selector
->info
.writes_layer
)
2878 pos_args
[1].out
[2] = layer_value
;
2880 if (shader
->selector
->info
.writes_viewport_index
) {
2881 pos_args
[1].out
[3] = viewport_index_value
;
2882 pos_args
[1].enabled_channels
|= 1 << 3;
2887 for (i
= 0; i
< 4; i
++)
2888 if (pos_args
[i
].out
[0])
2889 shader
->info
.nr_pos_exports
++;
2892 for (i
= 0; i
< 4; i
++) {
2893 if (!pos_args
[i
].out
[0])
2896 /* Specify the target we are exporting */
2897 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2899 if (pos_idx
== shader
->info
.nr_pos_exports
)
2900 /* Specify that this is the last export */
2901 pos_args
[i
].done
= 1;
2903 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2906 /* Build parameter exports. */
2907 si_build_param_exports(ctx
, outputs
, noutput
);
2911 * Forward all outputs from the vertex shader to the TES. This is only used
2912 * for the fixed function TCS.
2914 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2916 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2917 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
2918 LLVMValueRef lds_vertex_stride
, lds_base
;
2921 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2922 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
2923 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2925 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
2926 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2927 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
2930 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
2932 unsigned i
= u_bit_scan64(&inputs
);
2934 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2935 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2938 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2939 get_rel_patch_id(ctx
),
2941 LLVMConstInt(ctx
->i32
, i
, 0));
2943 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
2946 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2947 buffer_offset
, 0, 1, 0, true, false);
2951 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2952 LLVMValueRef rel_patch_id
,
2953 LLVMValueRef invocation_id
,
2954 LLVMValueRef tcs_out_current_patch_data_offset
,
2955 LLVMValueRef invoc0_tf_outer
[4],
2956 LLVMValueRef invoc0_tf_inner
[2])
2958 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2959 struct si_shader
*shader
= ctx
->shader
;
2960 unsigned tess_inner_index
, tess_outer_index
;
2961 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2962 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
2963 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
2964 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2966 /* Add a barrier before loading tess factors from LDS. */
2967 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
2968 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2970 /* Do this only for invocation 0, because the tess levels are per-patch,
2973 * This can't jump, because invocation 0 executes this. It should
2974 * at least mask out the loads and stores for other invocations.
2976 lp_build_if(&if_ctx
, &ctx
->gallivm
,
2977 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
2978 invocation_id
, ctx
->i32_0
, ""));
2980 /* Determine the layout of one tess factor element in the buffer. */
2981 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2982 case PIPE_PRIM_LINES
:
2983 stride
= 2; /* 2 dwords, 1 vec2 store */
2987 case PIPE_PRIM_TRIANGLES
:
2988 stride
= 4; /* 4 dwords, 1 vec4 store */
2992 case PIPE_PRIM_QUADS
:
2993 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3002 for (i
= 0; i
< 4; i
++) {
3003 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3004 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3007 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3008 /* Tess factors are in VGPRs. */
3009 for (i
= 0; i
< outer_comps
; i
++)
3010 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3011 for (i
= 0; i
< inner_comps
; i
++)
3012 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3014 /* Load tess_inner and tess_outer from LDS.
3015 * Any invocation can write them, so we can't get them from a temporary.
3017 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3018 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3020 lds_base
= tcs_out_current_patch_data_offset
;
3021 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3022 LLVMConstInt(ctx
->i32
,
3023 tess_inner_index
* 4, 0), "");
3024 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3025 LLVMConstInt(ctx
->i32
,
3026 tess_outer_index
* 4, 0), "");
3028 for (i
= 0; i
< outer_comps
; i
++) {
3030 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3032 for (i
= 0; i
< inner_comps
; i
++) {
3033 inner
[i
] = out
[outer_comps
+i
] =
3034 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3038 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3039 /* For isolines, the hardware expects tess factors in the
3040 * reverse order from what GLSL / TGSI specify.
3042 LLVMValueRef tmp
= out
[0];
3047 /* Convert the outputs to vectors for stores. */
3048 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3052 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3054 /* Get the buffer. */
3055 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3057 /* Get the offset. */
3058 tf_base
= LLVMGetParam(ctx
->main_fn
,
3059 ctx
->param_tcs_factor_offset
);
3060 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3061 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3063 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3064 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3065 rel_patch_id
, ctx
->i32_0
, ""));
3067 /* Store the dynamic HS control word. */
3069 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3070 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3071 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3072 1, ctx
->i32_0
, tf_base
,
3073 offset
, 1, 0, true, false);
3077 lp_build_endif(&inner_if_ctx
);
3079 /* Store the tessellation factors. */
3080 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3081 MIN2(stride
, 4), byteoffset
, tf_base
,
3082 offset
, 1, 0, true, false);
3085 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3086 stride
- 4, byteoffset
, tf_base
,
3087 offset
, 1, 0, true, false);
3089 /* Store the tess factors into the offchip buffer if TES reads them. */
3090 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3091 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3092 LLVMValueRef tf_inner_offset
;
3093 unsigned param_outer
, param_inner
;
3095 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3096 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3098 param_outer
= si_shader_io_get_unique_index_patch(
3099 TGSI_SEMANTIC_TESSOUTER
, 0);
3100 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3101 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3103 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
3104 util_next_power_of_two(outer_comps
));
3106 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3107 outer_comps
, tf_outer_offset
,
3108 base
, 0, 1, 0, true, false);
3110 param_inner
= si_shader_io_get_unique_index_patch(
3111 TGSI_SEMANTIC_TESSINNER
, 0);
3112 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3113 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3115 inner_vec
= inner_comps
== 1 ? inner
[0] :
3116 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3117 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3118 inner_comps
, tf_inner_offset
,
3119 base
, 0, 1, 0, true, false);
3123 lp_build_endif(&if_ctx
);
3127 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3128 unsigned param
, unsigned return_index
)
3130 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3131 LLVMGetParam(ctx
->main_fn
, param
),
3136 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3137 unsigned param
, unsigned return_index
)
3139 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3140 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3142 return LLVMBuildInsertValue(builder
, ret
,
3143 ac_to_float(&ctx
->ac
, p
),
3148 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3149 unsigned param
, unsigned return_index
)
3151 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3152 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3153 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3154 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3157 /* This only writes the tessellation factor levels. */
3158 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3159 unsigned max_outputs
,
3160 LLVMValueRef
*addrs
)
3162 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3163 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3164 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3165 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3167 si_copy_tcs_inputs(bld_base
);
3169 rel_patch_id
= get_rel_patch_id(ctx
);
3170 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3171 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3173 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3174 LLVMBasicBlockRef blocks
[2] = {
3175 LLVMGetInsertBlock(builder
),
3176 ctx
->merged_wrap_if_state
.entry_block
3178 LLVMValueRef values
[2];
3180 lp_build_endif(&ctx
->merged_wrap_if_state
);
3182 values
[0] = rel_patch_id
;
3183 values
[1] = LLVMGetUndef(ctx
->i32
);
3184 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3186 values
[0] = tf_lds_offset
;
3187 values
[1] = LLVMGetUndef(ctx
->i32
);
3188 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3190 values
[0] = invocation_id
;
3191 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3192 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3195 /* Return epilog parameters from this function. */
3196 LLVMValueRef ret
= ctx
->return_value
;
3199 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3200 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3201 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3202 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3203 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3204 /* Tess offchip and tess factor offsets are at the beginning. */
3205 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3206 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3207 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3209 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3210 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3211 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3212 GFX6_SGPR_TCS_OUT_LAYOUT
);
3213 /* Tess offchip and tess factor offsets are after user SGPRs. */
3214 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3215 GFX6_TCS_NUM_USER_SGPR
);
3216 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3217 GFX6_TCS_NUM_USER_SGPR
+ 1);
3218 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3222 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3223 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3224 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3226 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3227 * the invocation_id output does not alias the tcs_rel_ids input,
3228 * which saves a V_MOV on gfx9.
3232 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3233 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3235 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3236 vgpr
++; /* skip the tess factor LDS offset */
3237 for (unsigned i
= 0; i
< 6; i
++) {
3238 LLVMValueRef value
=
3239 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3240 value
= ac_to_float(&ctx
->ac
, value
);
3241 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3244 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3246 ctx
->return_value
= ret
;
3249 /* Pass TCS inputs from LS to TCS on GFX9. */
3250 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3252 LLVMValueRef ret
= ctx
->return_value
;
3254 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3255 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3256 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3257 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3258 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3259 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3261 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3262 8 + SI_SGPR_RW_BUFFERS
);
3263 ret
= si_insert_input_ptr(ctx
, ret
,
3264 ctx
->param_bindless_samplers_and_images
,
3265 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3267 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3268 8 + SI_SGPR_VS_STATE_BITS
);
3270 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3271 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3272 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3273 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3274 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3275 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3277 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3278 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3279 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3281 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3282 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3284 ctx
->return_value
= ret
;
3287 /* Pass GS inputs from ES to GS on GFX9. */
3288 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3290 LLVMValueRef ret
= ctx
->return_value
;
3292 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3293 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3294 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3295 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3296 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3298 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3299 8 + SI_SGPR_RW_BUFFERS
);
3300 ret
= si_insert_input_ptr(ctx
, ret
,
3301 ctx
->param_bindless_samplers_and_images
,
3302 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3305 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3306 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3308 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3310 for (unsigned i
= 0; i
< 5; i
++) {
3311 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3312 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3314 ctx
->return_value
= ret
;
3317 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3318 unsigned max_outputs
,
3319 LLVMValueRef
*addrs
)
3321 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3322 struct si_shader
*shader
= ctx
->shader
;
3323 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3325 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3326 ctx
->param_rel_auto_id
);
3327 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3328 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3329 vertex_dw_stride
, "");
3331 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3332 * its inputs from it. */
3333 for (i
= 0; i
< info
->num_outputs
; i
++) {
3334 unsigned name
= info
->output_semantic_name
[i
];
3335 unsigned index
= info
->output_semantic_index
[i
];
3337 /* The ARB_shader_viewport_layer_array spec contains the
3340 * 2) What happens if gl_ViewportIndex or gl_Layer is
3341 * written in the vertex shader and a geometry shader is
3344 * RESOLVED: The value written by the last vertex processing
3345 * stage is used. If the last vertex processing stage
3346 * (vertex, tessellation evaluation or geometry) does not
3347 * statically assign to gl_ViewportIndex or gl_Layer, index
3348 * or layer zero is assumed.
3350 * So writes to those outputs in VS-as-LS are simply ignored.
3352 if (name
== TGSI_SEMANTIC_LAYER
||
3353 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3356 int param
= si_shader_io_get_unique_index(name
, index
, false);
3357 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3358 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3360 for (chan
= 0; chan
< 4; chan
++) {
3361 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3364 lds_store(ctx
, chan
, dw_addr
,
3365 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3369 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3370 si_set_ls_return_value_for_tcs(ctx
);
3373 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3374 unsigned max_outputs
,
3375 LLVMValueRef
*addrs
)
3377 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3378 struct si_shader
*es
= ctx
->shader
;
3379 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3380 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3381 ctx
->param_es2gs_offset
);
3382 LLVMValueRef lds_base
= NULL
;
3386 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3387 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3388 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3389 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3390 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3391 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3392 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3393 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3394 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3397 for (i
= 0; i
< info
->num_outputs
; i
++) {
3400 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3401 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3404 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3405 info
->output_semantic_index
[i
], false);
3407 for (chan
= 0; chan
< 4; chan
++) {
3408 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3411 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3412 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3414 /* GFX9 has the ESGS ring in LDS. */
3415 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3416 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3420 ac_build_buffer_store_dword(&ctx
->ac
,
3422 out_val
, 1, NULL
, soffset
,
3423 (4 * param
+ chan
) * 4,
3428 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3429 si_set_es_return_value_for_gs(ctx
);
3432 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3434 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3435 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3437 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3440 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3442 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3443 si_get_gs_wave_id(ctx
));
3445 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3446 lp_build_endif(&ctx
->merged_wrap_if_state
);
3449 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3450 unsigned max_outputs
,
3451 LLVMValueRef
*addrs
)
3453 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3454 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3456 assert(info
->num_outputs
<= max_outputs
);
3458 emit_gs_epilogue(ctx
);
3461 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3463 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3464 emit_gs_epilogue(ctx
);
3467 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3468 unsigned max_outputs
,
3469 LLVMValueRef
*addrs
)
3471 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3472 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3473 struct si_shader_output_values
*outputs
= NULL
;
3476 assert(!ctx
->shader
->is_gs_copy_shader
);
3477 assert(info
->num_outputs
<= max_outputs
);
3479 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3481 /* Vertex color clamping.
3483 * This uses a state constant loaded in a user data SGPR and
3484 * an IF statement is added that clamps all colors if the constant
3487 struct lp_build_if_state if_ctx
;
3488 LLVMValueRef cond
= NULL
;
3489 LLVMValueRef addr
, val
;
3491 for (i
= 0; i
< info
->num_outputs
; i
++) {
3492 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3493 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3496 /* We've found a color. */
3498 /* The state is in the first bit of the user SGPR. */
3499 cond
= LLVMGetParam(ctx
->main_fn
,
3500 ctx
->param_vs_state_bits
);
3501 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3503 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3506 for (j
= 0; j
< 4; j
++) {
3507 addr
= addrs
[4 * i
+ j
];
3508 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3509 val
= ac_build_clamp(&ctx
->ac
, val
);
3510 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3515 lp_build_endif(&if_ctx
);
3517 for (i
= 0; i
< info
->num_outputs
; i
++) {
3518 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3519 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3521 for (j
= 0; j
< 4; j
++) {
3522 outputs
[i
].values
[j
] =
3523 LLVMBuildLoad(ctx
->ac
.builder
,
3526 outputs
[i
].vertex_stream
[j
] =
3527 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3531 if (ctx
->shader
->selector
->so
.num_outputs
)
3532 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3534 /* Export PrimitiveID. */
3535 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3536 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3537 outputs
[i
].semantic_index
= 0;
3538 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3539 for (j
= 1; j
< 4; j
++)
3540 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3542 memset(outputs
[i
].vertex_stream
, 0,
3543 sizeof(outputs
[i
].vertex_stream
));
3547 si_llvm_export_vs(ctx
, outputs
, i
);
3551 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3553 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3555 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3556 &ctx
->outputs
[0][0]);
3559 struct si_ps_exports
{
3561 struct ac_export_args args
[10];
3564 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3565 LLVMValueRef depth
, LLVMValueRef stencil
,
3566 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3568 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3569 struct ac_export_args args
;
3571 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3573 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3576 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3577 LLVMValueRef
*color
, unsigned index
,
3578 unsigned samplemask_param
,
3579 bool is_last
, struct si_ps_exports
*exp
)
3581 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3585 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3586 for (i
= 0; i
< 4; i
++)
3587 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3590 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3591 color
[3] = ctx
->ac
.f32_1
;
3595 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3596 si_alpha_test(bld_base
, color
[3]);
3598 /* Line & polygon smoothing */
3599 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3600 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3603 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3604 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3605 struct ac_export_args args
[8];
3608 /* Get the export arguments, also find out what the last one is. */
3609 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3610 si_llvm_init_export_args(ctx
, color
,
3611 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3612 if (args
[c
].enabled_channels
)
3616 /* Emit all exports. */
3617 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3618 if (is_last
&& last
== c
) {
3619 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3620 args
[c
].done
= 1; /* DONE bit */
3621 } else if (!args
[c
].enabled_channels
)
3622 continue; /* unnecessary NULL export */
3624 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3627 struct ac_export_args args
;
3630 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3633 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3634 args
.done
= 1; /* DONE bit */
3635 } else if (!args
.enabled_channels
)
3636 return; /* unnecessary NULL export */
3638 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3642 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3643 struct si_ps_exports
*exp
)
3645 for (unsigned i
= 0; i
< exp
->num
; i
++)
3646 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3650 * Return PS outputs in this order:
3652 * v[0:3] = color0.xyzw
3653 * v[4:7] = color1.xyzw
3658 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3660 * The alpha-ref SGPR is returned via its original location.
3662 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3663 unsigned max_outputs
,
3664 LLVMValueRef
*addrs
)
3666 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3667 struct si_shader
*shader
= ctx
->shader
;
3668 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3669 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3670 unsigned i
, j
, first_vgpr
, vgpr
;
3672 LLVMValueRef color
[8][4] = {};
3673 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3676 if (ctx
->postponed_kill
)
3677 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3679 /* Read the output values. */
3680 for (i
= 0; i
< info
->num_outputs
; i
++) {
3681 unsigned semantic_name
= info
->output_semantic_name
[i
];
3682 unsigned semantic_index
= info
->output_semantic_index
[i
];
3684 switch (semantic_name
) {
3685 case TGSI_SEMANTIC_COLOR
:
3686 assert(semantic_index
< 8);
3687 for (j
= 0; j
< 4; j
++) {
3688 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3689 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3690 color
[semantic_index
][j
] = result
;
3693 case TGSI_SEMANTIC_POSITION
:
3694 depth
= LLVMBuildLoad(builder
,
3695 addrs
[4 * i
+ 2], "");
3697 case TGSI_SEMANTIC_STENCIL
:
3698 stencil
= LLVMBuildLoad(builder
,
3699 addrs
[4 * i
+ 1], "");
3701 case TGSI_SEMANTIC_SAMPLEMASK
:
3702 samplemask
= LLVMBuildLoad(builder
,
3703 addrs
[4 * i
+ 0], "");
3706 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3711 /* Fill the return structure. */
3712 ret
= ctx
->return_value
;
3715 ret
= LLVMBuildInsertValue(builder
, ret
,
3716 ac_to_integer(&ctx
->ac
,
3717 LLVMGetParam(ctx
->main_fn
,
3718 SI_PARAM_ALPHA_REF
)),
3719 SI_SGPR_ALPHA_REF
, "");
3722 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3723 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3727 for (j
= 0; j
< 4; j
++)
3728 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3731 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3733 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3735 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3737 /* Add the input sample mask for smoothing at the end. */
3738 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3739 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3740 ret
= LLVMBuildInsertValue(builder
, ret
,
3741 LLVMGetParam(ctx
->main_fn
,
3742 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3744 ctx
->return_value
= ret
;
3747 static void membar_emit(
3748 const struct lp_build_tgsi_action
*action
,
3749 struct lp_build_tgsi_context
*bld_base
,
3750 struct lp_build_emit_data
*emit_data
)
3752 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3753 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3754 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3755 unsigned waitcnt
= NOOP_WAITCNT
;
3757 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3758 waitcnt
&= VM_CNT
& LGKM_CNT
;
3760 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3761 TGSI_MEMBAR_SHADER_BUFFER
|
3762 TGSI_MEMBAR_SHADER_IMAGE
))
3765 if (flags
& TGSI_MEMBAR_SHARED
)
3766 waitcnt
&= LGKM_CNT
;
3768 if (waitcnt
!= NOOP_WAITCNT
)
3769 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3772 static void clock_emit(
3773 const struct lp_build_tgsi_action
*action
,
3774 struct lp_build_tgsi_context
*bld_base
,
3775 struct lp_build_emit_data
*emit_data
)
3777 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3778 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3780 emit_data
->output
[0] =
3781 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3782 emit_data
->output
[1] =
3783 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3786 static void si_llvm_emit_ddxy(
3787 const struct lp_build_tgsi_action
*action
,
3788 struct lp_build_tgsi_context
*bld_base
,
3789 struct lp_build_emit_data
*emit_data
)
3791 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3792 unsigned opcode
= emit_data
->info
->opcode
;
3797 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3798 mask
= AC_TID_MASK_LEFT
;
3799 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3800 mask
= AC_TID_MASK_TOP
;
3802 mask
= AC_TID_MASK_TOP_LEFT
;
3804 /* for DDX we want to next X pixel, DDY next Y pixel. */
3805 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3807 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3808 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3809 emit_data
->output
[emit_data
->chan
] = val
;
3812 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3813 struct lp_build_tgsi_context
*bld_base
,
3814 struct lp_build_emit_data
*emit_data
)
3816 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3817 struct si_shader
*shader
= ctx
->shader
;
3818 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3819 LLVMValueRef interp_param
;
3820 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3821 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3822 int input_base
, input_array_size
;
3825 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3826 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3827 int interp_param_idx
;
3831 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3832 /* offset is in second src, first two channels */
3833 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3835 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3837 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3838 LLVMValueRef sample_position
;
3839 LLVMValueRef sample_id
;
3840 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3842 /* fetch sample ID, then fetch its sample position,
3843 * and place into first two channels.
3845 sample_id
= lp_build_emit_fetch(bld_base
,
3846 emit_data
->inst
, 1, TGSI_CHAN_X
);
3847 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3849 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3850 * Language 4.50 spec says about interpolateAtSample:
3852 * "Returns the value of the input interpolant variable at
3853 * the location of sample number sample. If multisample
3854 * buffers are not available, the input variable will be
3855 * evaluated at the center of the pixel. If sample sample
3856 * does not exist, the position used to interpolate the
3857 * input variable is undefined."
3859 * This means that sample_id values outside of the valid are
3860 * in fact valid input, and the usual mechanism for loading the
3861 * sample position doesn't work.
3863 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3864 LLVMValueRef center
[4] = {
3865 LLVMConstReal(ctx
->f32
, 0.5),
3866 LLVMConstReal(ctx
->f32
, 0.5),
3871 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3873 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
3876 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3879 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
3880 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3882 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
3885 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
3887 if (input
->Register
.Indirect
) {
3888 unsigned array_id
= input
->Indirect
.ArrayID
;
3891 input_base
= info
->input_array_first
[array_id
];
3892 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
3894 input_base
= inst
->Src
[0].Register
.Index
;
3895 input_array_size
= info
->num_inputs
- input_base
;
3898 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
3899 1, input
->Register
.Index
- input_base
);
3901 input_base
= inst
->Src
[0].Register
.Index
;
3902 input_array_size
= 1;
3903 array_idx
= ctx
->i32_0
;
3906 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
3908 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3909 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
3910 location
= TGSI_INTERPOLATE_LOC_CENTER
;
3912 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
3914 interp_param_idx
= lookup_interp_param_index(interp
, location
);
3915 if (interp_param_idx
== -1)
3917 else if (interp_param_idx
)
3918 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
3920 interp_param
= NULL
;
3922 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3923 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3924 LLVMValueRef ij_out
[2];
3925 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
3928 * take the I then J parameters, and the DDX/Y for it, and
3929 * calculate the IJ inputs for the interpolator.
3930 * temp1 = ddx * offset/sample.x + I;
3931 * interp_param.I = ddy * offset/sample.y + temp1;
3932 * temp1 = ddx * offset/sample.x + J;
3933 * interp_param.J = ddy * offset/sample.y + temp1;
3935 for (i
= 0; i
< 2; i
++) {
3936 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
3937 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
3938 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3939 ddxy_out
, ix_ll
, "");
3940 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3941 ddxy_out
, iy_ll
, "");
3942 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3943 interp_param
, ix_ll
, "");
3946 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
3948 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
3949 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
3951 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3955 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
3957 for (chan
= 0; chan
< 4; chan
++) {
3958 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
3959 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
3961 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
3962 LLVMValueRef v
, i
= NULL
, j
= NULL
;
3965 i
= LLVMBuildExtractElement(
3966 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
3967 j
= LLVMBuildExtractElement(
3968 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
3970 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
3973 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
3974 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
3977 emit_data
->output
[chan
] = LLVMBuildExtractElement(
3978 ctx
->ac
.builder
, gather
, array_idx
, "");
3982 static void vote_all_emit(
3983 const struct lp_build_tgsi_action
*action
,
3984 struct lp_build_tgsi_context
*bld_base
,
3985 struct lp_build_emit_data
*emit_data
)
3987 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3989 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
3990 emit_data
->output
[emit_data
->chan
] =
3991 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
3994 static void vote_any_emit(
3995 const struct lp_build_tgsi_action
*action
,
3996 struct lp_build_tgsi_context
*bld_base
,
3997 struct lp_build_emit_data
*emit_data
)
3999 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4001 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4002 emit_data
->output
[emit_data
->chan
] =
4003 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4006 static void vote_eq_emit(
4007 const struct lp_build_tgsi_action
*action
,
4008 struct lp_build_tgsi_context
*bld_base
,
4009 struct lp_build_emit_data
*emit_data
)
4011 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4013 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4014 emit_data
->output
[emit_data
->chan
] =
4015 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4018 static void ballot_emit(
4019 const struct lp_build_tgsi_action
*action
,
4020 struct lp_build_tgsi_context
*bld_base
,
4021 struct lp_build_emit_data
*emit_data
)
4023 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4024 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4027 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4028 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4029 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4031 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4032 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4035 static void read_lane_emit(
4036 const struct lp_build_tgsi_action
*action
,
4037 struct lp_build_tgsi_context
*bld_base
,
4038 struct lp_build_emit_data
*emit_data
)
4040 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4042 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4043 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4044 0, emit_data
->src_chan
);
4046 /* Always read the source invocation (= lane) from the X channel. */
4047 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4049 emit_data
->arg_count
= 2;
4052 /* We currently have no other way to prevent LLVM from lifting the icmp
4053 * calls to a dominating basic block.
4055 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4057 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4058 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4060 emit_data
->output
[emit_data
->chan
] =
4061 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4062 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4063 AC_FUNC_ATTR_READNONE
|
4064 AC_FUNC_ATTR_CONVERGENT
);
4067 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4068 struct lp_build_emit_data
*emit_data
)
4070 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4071 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4075 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4077 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4078 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4082 /* Emit one vertex from the geometry shader */
4083 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4085 LLVMValueRef
*addrs
)
4087 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4088 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4089 struct si_shader
*shader
= ctx
->shader
;
4090 struct lp_build_if_state if_state
;
4091 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4092 ctx
->param_gs2vs_offset
);
4093 LLVMValueRef gs_next_vertex
;
4094 LLVMValueRef can_emit
;
4095 unsigned chan
, offset
;
4098 /* Write vertex attribute values to GSVS ring */
4099 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4100 ctx
->gs_next_vertex
[stream
],
4103 /* If this thread has already emitted the declared maximum number of
4104 * vertices, skip the write: excessive vertex emissions are not
4105 * supposed to have any effect.
4107 * If the shader has no writes to memory, kill it instead. This skips
4108 * further memory loads and may allow LLVM to skip to the end
4111 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4112 LLVMConstInt(ctx
->i32
,
4113 shader
->selector
->gs_max_out_vertices
, 0), "");
4115 bool use_kill
= !info
->writes_memory
;
4117 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4119 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4123 for (i
= 0; i
< info
->num_outputs
; i
++) {
4124 for (chan
= 0; chan
< 4; chan
++) {
4125 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4126 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4129 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4130 LLVMValueRef voffset
=
4131 LLVMConstInt(ctx
->i32
, offset
*
4132 shader
->selector
->gs_max_out_vertices
, 0);
4135 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4136 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4137 LLVMConstInt(ctx
->i32
, 4, 0), "");
4139 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4141 ac_build_buffer_store_dword(&ctx
->ac
,
4142 ctx
->gsvs_ring
[stream
],
4144 voffset
, soffset
, 0,
4149 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4150 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4152 /* Signal vertex emission if vertex data was written. */
4154 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4155 si_get_gs_wave_id(ctx
));
4159 lp_build_endif(&if_state
);
4162 /* Emit one vertex from the geometry shader */
4163 static void si_tgsi_emit_vertex(
4164 const struct lp_build_tgsi_action
*action
,
4165 struct lp_build_tgsi_context
*bld_base
,
4166 struct lp_build_emit_data
*emit_data
)
4168 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4169 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4171 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4174 /* Cut one primitive from the geometry shader */
4175 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4178 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4180 /* Signal primitive cut */
4181 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4182 si_get_gs_wave_id(ctx
));
4185 /* Cut one primitive from the geometry shader */
4186 static void si_tgsi_emit_primitive(
4187 const struct lp_build_tgsi_action
*action
,
4188 struct lp_build_tgsi_context
*bld_base
,
4189 struct lp_build_emit_data
*emit_data
)
4191 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4193 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4196 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4197 struct lp_build_tgsi_context
*bld_base
,
4198 struct lp_build_emit_data
*emit_data
)
4200 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4202 /* GFX6 only (thanks to a hw bug workaround):
4203 * The real barrier instruction isn’t needed, because an entire patch
4204 * always fits into a single wave.
4206 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4207 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4208 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4212 ac_build_s_barrier(&ctx
->ac
);
4215 void si_create_function(struct si_shader_context
*ctx
,
4217 LLVMTypeRef
*returns
, unsigned num_returns
,
4218 struct si_function_info
*fninfo
,
4219 unsigned max_workgroup_size
)
4223 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4224 fninfo
->types
, fninfo
->num_params
);
4225 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4227 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4228 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4230 /* The combination of:
4234 * allows the optimization passes to move loads and reduces
4235 * SGPR spilling significantly.
4237 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4238 AC_FUNC_ATTR_INREG
);
4240 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4241 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4242 AC_FUNC_ATTR_NOALIAS
);
4243 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4247 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4248 if (fninfo
->assign
[i
])
4249 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4252 if (ctx
->screen
->info
.address32_hi
) {
4253 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4254 "amdgpu-32bit-address-high-bits",
4255 ctx
->screen
->info
.address32_hi
);
4258 if (max_workgroup_size
) {
4259 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4260 "amdgpu-max-work-group-size",
4261 max_workgroup_size
);
4263 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4264 "no-signed-zeros-fp-math",
4267 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4268 /* These were copied from some LLVM test. */
4269 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4270 "less-precise-fpmad",
4272 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4275 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4278 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4284 static void declare_streamout_params(struct si_shader_context
*ctx
,
4285 struct pipe_stream_output_info
*so
,
4286 struct si_function_info
*fninfo
)
4290 /* Streamout SGPRs. */
4291 if (so
->num_outputs
) {
4292 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4293 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4295 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4297 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4299 /* A streamout buffer offset is loaded if the stride is non-zero. */
4300 for (i
= 0; i
< 4; i
++) {
4304 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4308 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4310 switch (shader
->selector
->type
) {
4311 case PIPE_SHADER_TESS_CTRL
:
4312 /* Return this so that LLVM doesn't remove s_barrier
4313 * instructions on chips where we use s_barrier. */
4314 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 64;
4316 case PIPE_SHADER_GEOMETRY
:
4317 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4319 case PIPE_SHADER_COMPUTE
:
4320 break; /* see below */
4326 const unsigned *properties
= shader
->selector
->info
.properties
;
4327 unsigned max_work_group_size
=
4328 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4329 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4330 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4332 if (!max_work_group_size
) {
4333 /* This is a variable group size compute shader,
4334 * compile it for the maximum possible group size.
4336 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4338 return max_work_group_size
;
4341 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4342 struct si_function_info
*fninfo
,
4345 LLVMTypeRef const_shader_buf_type
;
4347 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4348 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4349 const_shader_buf_type
= ctx
->f32
;
4351 const_shader_buf_type
= ctx
->v4i32
;
4353 unsigned const_and_shader_buffers
=
4354 add_arg(fninfo
, ARG_SGPR
,
4355 ac_array_in_const32_addr_space(const_shader_buf_type
));
4358 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4361 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4362 struct si_function_info
*fninfo
,
4365 unsigned samplers_and_images
=
4366 add_arg(fninfo
, ARG_SGPR
,
4367 ac_array_in_const32_addr_space(ctx
->v8i32
));
4370 ctx
->param_samplers_and_images
= samplers_and_images
;
4373 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4374 struct si_function_info
*fninfo
,
4377 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4378 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4381 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4382 struct si_function_info
*fninfo
)
4384 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4385 ac_array_in_const32_addr_space(ctx
->v4i32
));
4386 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4387 ac_array_in_const32_addr_space(ctx
->v8i32
));
4390 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4391 struct si_function_info
*fninfo
)
4393 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4394 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4395 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4396 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4399 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4400 struct si_function_info
*fninfo
,
4401 unsigned *num_prolog_vgprs
)
4403 struct si_shader
*shader
= ctx
->shader
;
4405 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4406 if (shader
->key
.as_ls
) {
4407 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4408 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4410 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4411 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4413 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4415 if (!shader
->is_gs_copy_shader
) {
4416 /* Vertex load indices. */
4417 ctx
->param_vertex_index0
= fninfo
->num_params
;
4418 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4419 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4420 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4424 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4425 struct si_function_info
*fninfo
,
4426 unsigned vs_blit_property
)
4428 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4429 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4430 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4431 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4433 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4434 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4435 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4436 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4437 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4438 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4439 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4440 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4441 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4442 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4443 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4444 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4448 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4449 struct si_function_info
*fninfo
)
4451 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4452 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4453 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4454 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4458 /* Convenient merged shader definitions. */
4459 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4460 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4463 static void create_function(struct si_shader_context
*ctx
)
4465 struct si_shader
*shader
= ctx
->shader
;
4466 struct si_function_info fninfo
;
4467 LLVMTypeRef returns
[16+32*4];
4468 unsigned i
, num_return_sgprs
;
4469 unsigned num_returns
= 0;
4470 unsigned num_prolog_vgprs
= 0;
4471 unsigned type
= ctx
->type
;
4472 unsigned vs_blit_property
=
4473 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4475 si_init_function_info(&fninfo
);
4477 /* Set MERGED shaders. */
4478 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4479 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4480 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4481 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4482 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4485 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4488 case PIPE_SHADER_VERTEX
:
4489 declare_global_desc_pointers(ctx
, &fninfo
);
4491 if (vs_blit_property
) {
4492 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4495 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4499 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4500 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4501 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4502 ac_array_in_const32_addr_space(ctx
->v4i32
));
4504 if (shader
->key
.as_es
) {
4505 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4506 } else if (shader
->key
.as_ls
) {
4507 /* no extra parameters */
4509 if (shader
->is_gs_copy_shader
) {
4510 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4511 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4514 /* The locations of the other parameters are assigned dynamically. */
4515 declare_streamout_params(ctx
, &shader
->selector
->so
,
4520 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4523 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4524 declare_global_desc_pointers(ctx
, &fninfo
);
4525 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4526 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4527 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4528 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4529 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4530 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4531 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4534 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4535 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4537 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4538 * placed after the user SGPRs.
4540 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4541 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4542 for (i
= 0; i
< 11; i
++)
4543 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4546 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4547 /* Merged stages have 8 system SGPRs at the beginning. */
4548 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4549 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4550 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4551 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4552 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4553 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4554 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4555 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4556 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4558 declare_global_desc_pointers(ctx
, &fninfo
);
4559 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4560 ctx
->type
== PIPE_SHADER_VERTEX
);
4561 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4563 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4564 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4565 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4566 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4567 ac_array_in_const32_addr_space(ctx
->v4i32
));
4569 /* VGPRs (first TCS, then VS) */
4570 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4571 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4573 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4574 declare_vs_input_vgprs(ctx
, &fninfo
,
4577 /* LS return values are inputs to the TCS main shader part. */
4578 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4579 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4580 for (i
= 0; i
< 2; i
++)
4581 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4583 /* TCS return values are inputs to the TCS epilog.
4585 * param_tcs_offchip_offset, param_tcs_factor_offset,
4586 * param_tcs_offchip_layout, and param_rw_buffers
4587 * should be passed to the epilog.
4589 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4590 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4591 for (i
= 0; i
< 11; i
++)
4592 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4596 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4597 /* Merged stages have 8 system SGPRs at the beginning. */
4598 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4599 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4600 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4601 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4602 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4603 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4604 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4605 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4606 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4608 declare_global_desc_pointers(ctx
, &fninfo
);
4609 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4610 (ctx
->type
== PIPE_SHADER_VERTEX
||
4611 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4612 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4613 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4615 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4616 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4617 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4618 /* Declare as many input SGPRs as the VS has. */
4621 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4622 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4623 ac_array_in_const32_addr_space(ctx
->v4i32
));
4626 /* VGPRs (first GS, then VS/TES) */
4627 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4628 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4629 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4630 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4631 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4633 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4634 declare_vs_input_vgprs(ctx
, &fninfo
,
4636 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4637 declare_tes_input_vgprs(ctx
, &fninfo
);
4640 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4641 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4642 unsigned num_user_sgprs
;
4644 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4645 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4647 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4649 /* ES return values are inputs to GS. */
4650 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4651 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4652 for (i
= 0; i
< 5; i
++)
4653 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4657 case PIPE_SHADER_TESS_EVAL
:
4658 declare_global_desc_pointers(ctx
, &fninfo
);
4659 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4660 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4661 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4662 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4664 if (shader
->key
.as_es
) {
4665 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4666 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4667 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4669 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4670 declare_streamout_params(ctx
, &shader
->selector
->so
,
4672 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4676 declare_tes_input_vgprs(ctx
, &fninfo
);
4679 case PIPE_SHADER_GEOMETRY
:
4680 declare_global_desc_pointers(ctx
, &fninfo
);
4681 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4682 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4683 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4686 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4687 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4688 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4689 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4690 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4691 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4692 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4693 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4696 case PIPE_SHADER_FRAGMENT
:
4697 declare_global_desc_pointers(ctx
, &fninfo
);
4698 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4699 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4700 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4701 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4703 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4704 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4705 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4706 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4707 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4708 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4709 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4710 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4711 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4712 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4713 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4714 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4715 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4716 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4717 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4718 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4719 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4720 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4721 shader
->info
.face_vgpr_index
= 20;
4722 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4723 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4724 shader
->info
.ancillary_vgpr_index
= 21;
4725 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4726 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4727 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4729 /* Color inputs from the prolog. */
4730 if (shader
->selector
->info
.colors_read
) {
4731 unsigned num_color_elements
=
4732 util_bitcount(shader
->selector
->info
.colors_read
);
4734 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4735 for (i
= 0; i
< num_color_elements
; i
++)
4736 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4738 num_prolog_vgprs
+= num_color_elements
;
4741 /* Outputs for the epilog. */
4742 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4745 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4746 shader
->selector
->info
.writes_z
+
4747 shader
->selector
->info
.writes_stencil
+
4748 shader
->selector
->info
.writes_samplemask
+
4749 1 /* SampleMaskIn */;
4751 num_returns
= MAX2(num_returns
,
4753 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4755 for (i
= 0; i
< num_return_sgprs
; i
++)
4756 returns
[i
] = ctx
->i32
;
4757 for (; i
< num_returns
; i
++)
4758 returns
[i
] = ctx
->f32
;
4761 case PIPE_SHADER_COMPUTE
:
4762 declare_global_desc_pointers(ctx
, &fninfo
);
4763 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4764 if (shader
->selector
->info
.uses_grid_size
)
4765 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4766 if (shader
->selector
->info
.uses_block_size
&&
4767 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4768 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4770 unsigned cs_user_data_dwords
=
4771 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_DWORDS
];
4772 if (cs_user_data_dwords
) {
4773 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4774 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4777 for (i
= 0; i
< 3; i
++) {
4778 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4779 if (shader
->selector
->info
.uses_block_id
[i
])
4780 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4783 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4786 assert(0 && "unimplemented shader");
4790 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4791 si_get_max_workgroup_size(shader
));
4793 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4794 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4795 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4796 "InitialPSInputAddr",
4797 S_0286D0_PERSP_SAMPLE_ENA(1) |
4798 S_0286D0_PERSP_CENTER_ENA(1) |
4799 S_0286D0_PERSP_CENTROID_ENA(1) |
4800 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4801 S_0286D0_LINEAR_CENTER_ENA(1) |
4802 S_0286D0_LINEAR_CENTROID_ENA(1) |
4803 S_0286D0_FRONT_FACE_ENA(1) |
4804 S_0286D0_ANCILLARY_ENA(1) |
4805 S_0286D0_POS_FIXED_PT_ENA(1));
4808 shader
->info
.num_input_sgprs
= 0;
4809 shader
->info
.num_input_vgprs
= 0;
4811 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4812 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4814 for (; i
< fninfo
.num_params
; ++i
)
4815 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4817 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4818 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4820 if (shader
->key
.as_ls
||
4821 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4822 /* GFX9 has the ESGS ring buffer in LDS. */
4823 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4824 ac_declare_lds_as_pointer(&ctx
->ac
);
4828 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4831 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4833 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4835 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4836 ctx
->param_rw_buffers
);
4838 if (ctx
->screen
->info
.chip_class
<= GFX8
&&
4839 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4841 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4843 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4846 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4849 if (ctx
->shader
->is_gs_copy_shader
) {
4850 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4853 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4854 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4855 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4856 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4857 LLVMValueRef base_ring
;
4859 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4861 /* The conceptual layout of the GSVS ring is
4862 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4863 * but the real memory layout is swizzled across
4865 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
4867 * Override the buffer descriptor accordingly.
4869 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
4870 uint64_t stream_offset
= 0;
4872 for (unsigned stream
= 0; stream
< 4; ++stream
) {
4873 unsigned num_components
;
4875 unsigned num_records
;
4876 LLVMValueRef ring
, tmp
;
4878 num_components
= sel
->info
.num_stream_output_components
[stream
];
4879 if (!num_components
)
4882 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
4884 /* Limit on the stride field for <= GFX7. */
4885 assert(stride
< (1 << 14));
4889 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
4890 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
4891 tmp
= LLVMBuildAdd(builder
, tmp
,
4892 LLVMConstInt(ctx
->i64
,
4893 stream_offset
, 0), "");
4894 stream_offset
+= stride
* 64;
4896 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
4897 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
4898 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
4899 tmp
= LLVMBuildOr(builder
, tmp
,
4900 LLVMConstInt(ctx
->i32
,
4901 S_008F04_STRIDE(stride
) |
4902 S_008F04_SWIZZLE_ENABLE(1), 0), "");
4903 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
4904 ring
= LLVMBuildInsertElement(builder
, ring
,
4905 LLVMConstInt(ctx
->i32
, num_records
, 0),
4906 LLVMConstInt(ctx
->i32
, 2, 0), "");
4907 ring
= LLVMBuildInsertElement(builder
, ring
,
4908 LLVMConstInt(ctx
->i32
,
4909 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
4910 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
4911 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
4912 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
4913 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
4914 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
4915 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
4916 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
4917 S_008F0C_ADD_TID_ENABLE(1),
4919 LLVMConstInt(ctx
->i32
, 3, 0), "");
4921 ctx
->gsvs_ring
[stream
] = ring
;
4923 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4924 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
4928 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
4929 LLVMValueRef param_rw_buffers
,
4930 unsigned param_pos_fixed_pt
)
4932 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4933 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
4935 /* Use the fixed-point gl_FragCoord input.
4936 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
4937 * per coordinate to get the repeating effect.
4939 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
4940 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
4942 /* Load the buffer descriptor. */
4943 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
4944 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
4946 /* The stipple pattern is 32x32, each row has 32 bits. */
4947 offset
= LLVMBuildMul(builder
, address
[1],
4948 LLVMConstInt(ctx
->i32
, 4, 0), "");
4949 row
= buffer_load_const(ctx
, desc
, offset
);
4950 row
= ac_to_integer(&ctx
->ac
, row
);
4951 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
4952 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
4953 ac_build_kill_if_false(&ctx
->ac
, bit
);
4956 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
4957 struct si_shader_config
*conf
,
4958 unsigned symbol_offset
)
4961 const unsigned char *config
=
4962 ac_shader_binary_config_start(binary
, symbol_offset
);
4963 bool really_needs_scratch
= false;
4965 /* LLVM adds SGPR spills to the scratch size.
4966 * Find out if we really need the scratch buffer.
4968 for (i
= 0; i
< binary
->reloc_count
; i
++) {
4969 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
4971 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
4972 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4973 really_needs_scratch
= true;
4978 /* XXX: We may be able to emit some of these values directly rather than
4979 * extracting fields to be emitted later.
4982 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
4983 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
4984 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
4986 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
4987 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
4988 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
4989 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
4990 case R_00B848_COMPUTE_PGM_RSRC1
:
4991 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
4992 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
4993 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
4994 conf
->rsrc1
= value
;
4996 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
4997 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
4999 case R_00B84C_COMPUTE_PGM_RSRC2
:
5000 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5001 conf
->rsrc2
= value
;
5003 case R_0286CC_SPI_PS_INPUT_ENA
:
5004 conf
->spi_ps_input_ena
= value
;
5006 case R_0286D0_SPI_PS_INPUT_ADDR
:
5007 conf
->spi_ps_input_addr
= value
;
5009 case R_0286E8_SPI_TMPRING_SIZE
:
5010 case R_00B860_COMPUTE_TMPRING_SIZE
:
5011 /* WAVESIZE is in units of 256 dwords. */
5012 if (really_needs_scratch
)
5013 conf
->scratch_bytes_per_wave
=
5014 G_00B860_WAVESIZE(value
) * 256 * 4;
5016 case 0x4: /* SPILLED_SGPRS */
5017 conf
->spilled_sgprs
= value
;
5019 case 0x8: /* SPILLED_VGPRS */
5020 conf
->spilled_vgprs
= value
;
5024 static bool printed
;
5027 fprintf(stderr
, "Warning: LLVM emitted unknown "
5028 "config register: 0x%x\n", reg
);
5036 if (!conf
->spi_ps_input_addr
)
5037 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5040 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5041 uint64_t scratch_va
)
5044 uint32_t scratch_rsrc_dword0
= scratch_va
;
5045 uint32_t scratch_rsrc_dword1
=
5046 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5048 /* Enable scratch coalescing. */
5049 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5051 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5052 const struct ac_shader_reloc
*reloc
=
5053 &shader
->binary
.relocs
[i
];
5054 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5055 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5056 &scratch_rsrc_dword0
, 4);
5057 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5058 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5059 &scratch_rsrc_dword1
, 4);
5064 /* For the UMR disassembler. */
5065 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5066 #define DEBUGGER_NUM_MARKERS 5
5068 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5070 unsigned size
= shader
->binary
.code_size
;
5073 size
+= shader
->prolog
->binary
.code_size
;
5074 if (shader
->previous_stage
)
5075 size
+= shader
->previous_stage
->binary
.code_size
;
5076 if (shader
->prolog2
)
5077 size
+= shader
->prolog2
->binary
.code_size
;
5079 size
+= shader
->epilog
->binary
.code_size
;
5080 return size
+ DEBUGGER_NUM_MARKERS
* 4;
5083 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5085 const struct ac_shader_binary
*prolog
=
5086 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5087 const struct ac_shader_binary
*previous_stage
=
5088 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5089 const struct ac_shader_binary
*prolog2
=
5090 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5091 const struct ac_shader_binary
*epilog
=
5092 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5093 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5094 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5095 (!epilog
? mainb
->rodata_size
: 0);
5098 assert(!prolog
|| !prolog
->rodata_size
);
5099 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5100 assert(!prolog2
|| !prolog2
->rodata_size
);
5101 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5102 !mainb
->rodata_size
);
5103 assert(!epilog
|| !epilog
->rodata_size
);
5105 si_resource_reference(&shader
->bo
, NULL
);
5106 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5107 sscreen
->cpdma_prefetch_writes_memory
?
5108 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5109 PIPE_USAGE_IMMUTABLE
,
5110 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5116 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5117 PIPE_TRANSFER_READ_WRITE
|
5118 PIPE_TRANSFER_UNSYNCHRONIZED
|
5119 RADEON_TRANSFER_TEMPORARY
);
5121 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5122 * endian-independent. */
5124 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5125 ptr
+= prolog
->code_size
;
5127 if (previous_stage
) {
5128 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5129 ptr
+= previous_stage
->code_size
;
5132 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5133 ptr
+= prolog2
->code_size
;
5136 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5137 ptr
+= mainb
->code_size
;
5140 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5141 ptr
+= epilog
->code_size
;
5142 } else if (mainb
->rodata_size
> 0) {
5143 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5144 ptr
+= mainb
->rodata_size
;
5147 /* Add end-of-code markers for the UMR disassembler. */
5148 uint32_t *ptr32
= (uint32_t*)ptr
;
5149 for (unsigned i
= 0; i
< DEBUGGER_NUM_MARKERS
; i
++)
5150 ptr32
[i
] = DEBUGGER_END_OF_CODE_MARKER
;
5152 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5156 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5157 struct pipe_debug_callback
*debug
,
5158 const char *name
, FILE *file
)
5163 if (binary
->disasm_string
) {
5164 fprintf(file
, "Shader %s disassembly:\n", name
);
5165 fprintf(file
, "%s", binary
->disasm_string
);
5167 if (debug
&& debug
->debug_message
) {
5168 /* Very long debug messages are cut off, so send the
5169 * disassembly one line at a time. This causes more
5170 * overhead, but on the plus side it simplifies
5171 * parsing of resulting logs.
5173 pipe_debug_message(debug
, SHADER_INFO
,
5174 "Shader Disassembly Begin");
5176 line
= binary
->disasm_string
;
5178 p
= util_strchrnul(line
, '\n');
5182 pipe_debug_message(debug
, SHADER_INFO
,
5183 "%.*s", count
, line
);
5191 pipe_debug_message(debug
, SHADER_INFO
,
5192 "Shader Disassembly End");
5195 fprintf(file
, "Shader %s binary:\n", name
);
5196 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5197 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5198 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5199 binary
->code
[i
+ 1], binary
->code
[i
]);
5204 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5206 struct si_screen
*sscreen
= shader
->selector
->screen
;
5207 struct si_shader_config
*conf
= &shader
->config
;
5208 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5209 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5210 unsigned lds_per_wave
= 0;
5211 unsigned max_simd_waves
;
5213 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5215 /* Compute LDS usage for PS. */
5216 switch (shader
->selector
->type
) {
5217 case PIPE_SHADER_FRAGMENT
:
5218 /* The minimum usage per wave is (num_inputs * 48). The maximum
5219 * usage is (num_inputs * 48 * 16).
5220 * We can get anything in between and it varies between waves.
5222 * The 48 bytes per input for a single primitive is equal to
5223 * 4 bytes/component * 4 components/input * 3 points.
5225 * Other stages don't know the size at compile time or don't
5226 * allocate LDS per wave, but instead they do it per thread group.
5228 lds_per_wave
= conf
->lds_size
* lds_increment
+
5229 align(num_inputs
* 48, lds_increment
);
5231 case PIPE_SHADER_COMPUTE
:
5232 if (shader
->selector
) {
5233 unsigned max_workgroup_size
=
5234 si_get_max_workgroup_size(shader
);
5235 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5236 DIV_ROUND_UP(max_workgroup_size
, 64);
5241 /* Compute the per-SIMD wave counts. */
5242 if (conf
->num_sgprs
) {
5244 MIN2(max_simd_waves
,
5245 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5248 if (conf
->num_vgprs
)
5249 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5251 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5252 * 16KB makes some SIMDs unoccupied). */
5254 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5256 conf
->max_simd_waves
= max_simd_waves
;
5259 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5260 struct pipe_debug_callback
*debug
)
5262 const struct si_shader_config
*conf
= &shader
->config
;
5264 pipe_debug_message(debug
, SHADER_INFO
,
5265 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5266 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5267 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5268 conf
->num_sgprs
, conf
->num_vgprs
,
5269 si_get_shader_binary_size(shader
),
5270 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5271 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5272 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5275 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5276 const struct si_shader
*shader
,
5279 bool check_debug_option
)
5281 const struct si_shader_config
*conf
= &shader
->config
;
5283 if (!check_debug_option
||
5284 si_can_dump_shader(sscreen
, processor
)) {
5285 if (processor
== PIPE_SHADER_FRAGMENT
) {
5286 fprintf(file
, "*** SHADER CONFIG ***\n"
5287 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5288 "SPI_PS_INPUT_ENA = 0x%04x\n",
5289 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5292 fprintf(file
, "*** SHADER STATS ***\n"
5295 "Spilled SGPRs: %d\n"
5296 "Spilled VGPRs: %d\n"
5297 "Private memory VGPRs: %d\n"
5298 "Code Size: %d bytes\n"
5300 "Scratch: %d bytes per wave\n"
5302 "********************\n\n\n",
5303 conf
->num_sgprs
, conf
->num_vgprs
,
5304 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5305 conf
->private_mem_vgprs
,
5306 si_get_shader_binary_size(shader
),
5307 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5308 conf
->max_simd_waves
);
5312 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5314 switch (processor
) {
5315 case PIPE_SHADER_VERTEX
:
5316 if (shader
->key
.as_es
)
5317 return "Vertex Shader as ES";
5318 else if (shader
->key
.as_ls
)
5319 return "Vertex Shader as LS";
5321 return "Vertex Shader as VS";
5322 case PIPE_SHADER_TESS_CTRL
:
5323 return "Tessellation Control Shader";
5324 case PIPE_SHADER_TESS_EVAL
:
5325 if (shader
->key
.as_es
)
5326 return "Tessellation Evaluation Shader as ES";
5328 return "Tessellation Evaluation Shader as VS";
5329 case PIPE_SHADER_GEOMETRY
:
5330 if (shader
->is_gs_copy_shader
)
5331 return "GS Copy Shader as VS";
5333 return "Geometry Shader";
5334 case PIPE_SHADER_FRAGMENT
:
5335 return "Pixel Shader";
5336 case PIPE_SHADER_COMPUTE
:
5337 return "Compute Shader";
5339 return "Unknown Shader";
5343 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5344 struct pipe_debug_callback
*debug
, unsigned processor
,
5345 FILE *file
, bool check_debug_option
)
5347 if (!check_debug_option
||
5348 si_can_dump_shader(sscreen
, processor
))
5349 si_dump_shader_key(processor
, shader
, file
);
5351 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5352 if (shader
->previous_stage
&&
5353 shader
->previous_stage
->binary
.llvm_ir_string
) {
5354 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5355 si_get_shader_name(shader
, processor
));
5356 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5359 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5360 si_get_shader_name(shader
, processor
));
5361 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5364 if (!check_debug_option
||
5365 (si_can_dump_shader(sscreen
, processor
) &&
5366 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5367 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5370 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5371 debug
, "prolog", file
);
5372 if (shader
->previous_stage
)
5373 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5374 debug
, "previous stage", file
);
5375 if (shader
->prolog2
)
5376 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5377 debug
, "prolog2", file
);
5379 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5382 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5383 debug
, "epilog", file
);
5384 fprintf(file
, "\n");
5387 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5388 check_debug_option
);
5391 static int si_compile_llvm(struct si_screen
*sscreen
,
5392 struct ac_shader_binary
*binary
,
5393 struct si_shader_config
*conf
,
5394 struct ac_llvm_compiler
*compiler
,
5396 struct pipe_debug_callback
*debug
,
5399 bool less_optimized
)
5402 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5404 if (si_can_dump_shader(sscreen
, processor
)) {
5405 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5407 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5408 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5409 ac_dump_module(mod
);
5410 fprintf(stderr
, "\n");
5414 if (sscreen
->record_llvm_ir
) {
5415 char *ir
= LLVMPrintModuleToString(mod
);
5416 binary
->llvm_ir_string
= strdup(ir
);
5417 LLVMDisposeMessage(ir
);
5420 if (!si_replace_shader(count
, binary
)) {
5421 r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5427 si_shader_binary_read_config(binary
, conf
, 0);
5429 /* Enable 64-bit and 16-bit denormals, because there is no performance
5432 * If denormals are enabled, all floating-point output modifiers are
5435 * Don't enable denormals for 32-bit floats, because:
5436 * - Floating-point output modifiers would be ignored by the hw.
5437 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5438 * have to stop using those.
5439 * - GFX6 & GFX7 would be very slow.
5441 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5443 FREE(binary
->config
);
5444 FREE(binary
->global_symbol_offsets
);
5445 binary
->config
= NULL
;
5446 binary
->global_symbol_offsets
= NULL
;
5448 /* Some shaders can't have rodata because their binaries can be
5451 if (binary
->rodata_size
&&
5452 (processor
== PIPE_SHADER_VERTEX
||
5453 processor
== PIPE_SHADER_TESS_CTRL
||
5454 processor
== PIPE_SHADER_TESS_EVAL
||
5455 processor
== PIPE_SHADER_FRAGMENT
)) {
5456 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5463 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5465 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5466 LLVMBuildRetVoid(ctx
->ac
.builder
);
5468 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5471 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5473 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5474 struct ac_llvm_compiler
*compiler
,
5475 struct si_shader_selector
*gs_selector
,
5476 struct pipe_debug_callback
*debug
)
5478 struct si_shader_context ctx
;
5479 struct si_shader
*shader
;
5480 LLVMBuilderRef builder
;
5481 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5482 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5486 shader
= CALLOC_STRUCT(si_shader
);
5490 /* We can leave the fence as permanently signaled because the GS copy
5491 * shader only becomes visible globally after it has been compiled. */
5492 util_queue_fence_init(&shader
->ready
);
5494 shader
->selector
= gs_selector
;
5495 shader
->is_gs_copy_shader
= true;
5497 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5498 ctx
.shader
= shader
;
5499 ctx
.type
= PIPE_SHADER_VERTEX
;
5501 builder
= ctx
.ac
.builder
;
5503 create_function(&ctx
);
5504 preload_ring_buffers(&ctx
);
5506 LLVMValueRef voffset
=
5507 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5508 LLVMConstInt(ctx
.i32
, 4, 0), "");
5510 /* Fetch the vertex stream ID.*/
5511 LLVMValueRef stream_id
;
5513 if (gs_selector
->so
.num_outputs
)
5514 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5516 stream_id
= ctx
.i32_0
;
5518 /* Fill in output information. */
5519 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5520 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5521 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5523 for (int chan
= 0; chan
< 4; chan
++) {
5524 outputs
[i
].vertex_stream
[chan
] =
5525 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5529 LLVMBasicBlockRef end_bb
;
5530 LLVMValueRef switch_inst
;
5532 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5533 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5535 for (int stream
= 0; stream
< 4; stream
++) {
5536 LLVMBasicBlockRef bb
;
5539 if (!gsinfo
->num_stream_output_components
[stream
])
5542 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5545 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5546 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5547 LLVMPositionBuilderAtEnd(builder
, bb
);
5549 /* Fetch vertex data from GSVS ring */
5551 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5552 for (unsigned chan
= 0; chan
< 4; chan
++) {
5553 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5554 outputs
[i
].vertex_stream
[chan
] != stream
) {
5555 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5559 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5560 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5563 outputs
[i
].values
[chan
] =
5564 ac_build_buffer_load(&ctx
.ac
,
5565 ctx
.gsvs_ring
[0], 1,
5572 /* Streamout and exports. */
5573 if (gs_selector
->so
.num_outputs
) {
5574 si_llvm_emit_streamout(&ctx
, outputs
,
5575 gsinfo
->num_outputs
,
5580 /* Vertex color clamping.
5582 * This uses a state constant loaded in a user data SGPR and
5583 * an IF statement is added that clamps all colors if the constant
5586 struct lp_build_if_state if_ctx
;
5587 LLVMValueRef v
[2], cond
= NULL
;
5588 LLVMBasicBlockRef blocks
[2];
5590 for (unsigned i
= 0; i
< gsinfo
->num_outputs
; i
++) {
5591 if (gsinfo
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
5592 gsinfo
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
5595 /* We've found a color. */
5597 /* The state is in the first bit of the user SGPR. */
5598 cond
= LLVMGetParam(ctx
.main_fn
,
5599 ctx
.param_vs_state_bits
);
5600 cond
= LLVMBuildTrunc(ctx
.ac
.builder
, cond
,
5602 lp_build_if(&if_ctx
, &ctx
.gallivm
, cond
);
5603 /* Remember blocks for Phi. */
5604 blocks
[0] = if_ctx
.true_block
;
5605 blocks
[1] = if_ctx
.entry_block
;
5608 for (unsigned j
= 0; j
< 4; j
++) {
5609 /* Insert clamp into the true block. */
5610 v
[0] = ac_build_clamp(&ctx
.ac
, outputs
[i
].values
[j
]);
5611 v
[1] = outputs
[i
].values
[j
];
5613 /* Insert Phi into the endif block. */
5614 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, if_ctx
.merge_block
);
5615 outputs
[i
].values
[j
] = ac_build_phi(&ctx
.ac
, ctx
.f32
, 2, v
, blocks
);
5616 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, if_ctx
.true_block
);
5620 lp_build_endif(&if_ctx
);
5622 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5625 LLVMBuildBr(builder
, end_bb
);
5628 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5630 LLVMBuildRetVoid(ctx
.ac
.builder
);
5632 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5633 si_llvm_optimize_module(&ctx
);
5635 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5636 &ctx
.shader
->config
, ctx
.compiler
,
5638 debug
, PIPE_SHADER_GEOMETRY
,
5639 "GS Copy Shader", false);
5641 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5642 fprintf(stderr
, "GS Copy Shader:\n");
5643 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5644 PIPE_SHADER_GEOMETRY
, stderr
, true);
5645 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5648 si_llvm_dispose(&ctx
);
5654 si_fix_resource_usage(sscreen
, shader
);
5659 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5660 const struct si_vs_prolog_bits
*prolog
,
5661 const char *prefix
, FILE *f
)
5663 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5664 prefix
, prolog
->instance_divisor_is_one
);
5665 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5666 prefix
, prolog
->instance_divisor_is_fetched
);
5667 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5668 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5669 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5670 prefix
, prolog
->ls_vgpr_fix
);
5672 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5673 fprintf(f
, " mono.vs.fix_fetch = {");
5674 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5675 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5681 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5682 fix
.u
.num_channels_m1
, fix
.u
.format
);
5687 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5690 const struct si_shader_key
*key
= &shader
->key
;
5692 fprintf(f
, "SHADER KEY\n");
5694 switch (processor
) {
5695 case PIPE_SHADER_VERTEX
:
5696 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5697 "part.vs.prolog", f
);
5698 fprintf(f
, " as_es = %u\n", key
->as_es
);
5699 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5700 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5701 key
->mono
.u
.vs_export_prim_id
);
5704 case PIPE_SHADER_TESS_CTRL
:
5705 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5706 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5707 "part.tcs.ls_prolog", f
);
5709 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5710 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5713 case PIPE_SHADER_TESS_EVAL
:
5714 fprintf(f
, " as_es = %u\n", key
->as_es
);
5715 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5716 key
->mono
.u
.vs_export_prim_id
);
5719 case PIPE_SHADER_GEOMETRY
:
5720 if (shader
->is_gs_copy_shader
)
5723 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5724 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5725 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5726 "part.gs.vs_prolog", f
);
5728 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5731 case PIPE_SHADER_COMPUTE
:
5734 case PIPE_SHADER_FRAGMENT
:
5735 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5736 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5737 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5738 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5739 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5740 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5741 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5742 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5743 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5744 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5745 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5746 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5747 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5748 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5749 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5750 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5751 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5758 if ((processor
== PIPE_SHADER_GEOMETRY
||
5759 processor
== PIPE_SHADER_TESS_EVAL
||
5760 processor
== PIPE_SHADER_VERTEX
) &&
5761 !key
->as_es
&& !key
->as_ls
) {
5762 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5763 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5767 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5768 struct si_screen
*sscreen
,
5769 struct ac_llvm_compiler
*compiler
)
5771 struct lp_build_tgsi_context
*bld_base
;
5773 si_llvm_context_init(ctx
, sscreen
, compiler
);
5775 bld_base
= &ctx
->bld_base
;
5776 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5778 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5779 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5780 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5782 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5784 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5786 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5787 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5788 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5789 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5791 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5792 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5793 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5794 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5795 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5796 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5797 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5798 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5800 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5801 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5802 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5805 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5807 struct si_shader
*shader
= ctx
->shader
;
5808 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5810 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5811 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5812 shader
->key
.as_ls
||
5816 ac_optimize_vs_outputs(&ctx
->ac
,
5818 shader
->info
.vs_output_param_offset
,
5820 &shader
->info
.nr_param_exports
);
5823 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5824 unsigned param
, unsigned bitoffset
)
5826 LLVMValueRef args
[] = {
5827 LLVMGetParam(ctx
->main_fn
, param
),
5828 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5830 ac_build_intrinsic(&ctx
->ac
,
5831 "llvm.amdgcn.init.exec.from.input",
5832 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5835 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5836 const struct si_vs_prolog_bits
*key
)
5838 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5840 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5843 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
5845 struct si_shader
*shader
= ctx
->shader
;
5846 struct si_shader_selector
*sel
= shader
->selector
;
5847 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5849 // TODO clean all this up!
5850 switch (ctx
->type
) {
5851 case PIPE_SHADER_VERTEX
:
5852 ctx
->load_input
= declare_input_vs
;
5853 if (shader
->key
.as_ls
)
5854 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5855 else if (shader
->key
.as_es
)
5856 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5858 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5859 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5860 ctx
->abi
.load_base_vertex
= get_base_vertex
;
5862 case PIPE_SHADER_TESS_CTRL
:
5863 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5864 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5865 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5866 bld_base
->emit_store
= store_output_tcs
;
5867 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
5868 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
5869 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5870 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5872 case PIPE_SHADER_TESS_EVAL
:
5873 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5874 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
5875 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
5876 ctx
->abi
.load_tess_level
= si_load_tess_level
;
5877 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5878 if (shader
->key
.as_es
)
5879 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5881 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5882 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5884 case PIPE_SHADER_GEOMETRY
:
5885 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5886 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
5887 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
5888 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
5889 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
5890 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
5892 case PIPE_SHADER_FRAGMENT
:
5893 ctx
->load_input
= declare_input_fs
;
5894 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
5895 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5896 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
5897 ctx
->abi
.load_sample_position
= load_sample_position
;
5898 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
5899 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
5901 case PIPE_SHADER_COMPUTE
:
5902 ctx
->abi
.load_local_group_size
= get_block_size
;
5905 assert(!"Unsupported shader type");
5909 ctx
->abi
.load_ubo
= load_ubo
;
5910 ctx
->abi
.load_ssbo
= load_ssbo
;
5912 create_function(ctx
);
5913 preload_ring_buffers(ctx
);
5915 /* For GFX9 merged shaders:
5916 * - Set EXEC for the first shader. If the prolog is present, set
5917 * EXEC there instead.
5918 * - Add a barrier before the second shader.
5919 * - In the second shader, reset EXEC to ~0 and wrap the main part in
5920 * an if-statement. This is required for correctness in geometry
5921 * shaders, to ensure that empty GS waves do not send GS_EMIT and
5924 * For monolithic merged shaders, the first shader is wrapped in an
5925 * if-block together with its prolog in si_build_wrapper_function.
5927 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
5928 if (!shader
->is_monolithic
&&
5929 sel
->info
.num_instructions
> 1 && /* not empty shader */
5930 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5931 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5932 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5933 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
5934 si_init_exec_from_input(ctx
,
5935 ctx
->param_merged_wave_info
, 0);
5936 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5937 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5938 if (!shader
->is_monolithic
)
5939 ac_init_exec_full_mask(&ctx
->ac
);
5941 LLVMValueRef num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
5943 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
5944 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
5945 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
5947 /* The barrier must execute for all shaders in a
5950 * Execute the barrier inside the conditional block,
5951 * so that empty waves can jump directly to s_endpgm,
5952 * which will also signal the barrier.
5954 * If the shader is TCS and the TCS epilog is present
5955 * and contains a barrier, it will wait there and then
5958 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
5962 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
5963 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
5964 for (unsigned i
= 0; i
< 6; i
++) {
5965 ctx
->invoc0_tess_factors
[i
] =
5966 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
5970 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5972 for (i
= 0; i
< 4; i
++) {
5973 ctx
->gs_next_vertex
[i
] =
5974 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
5978 if (sel
->force_correct_derivs_after_kill
) {
5979 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
5980 /* true = don't kill. */
5981 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
5982 ctx
->postponed_kill
);
5986 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
5987 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
5991 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
5992 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
5997 si_llvm_build_ret(ctx
, ctx
->return_value
);
6002 * Compute the VS prolog key, which contains all the information needed to
6003 * build the VS prolog function, and set shader->info bits where needed.
6005 * \param info Shader info of the vertex shader.
6006 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6007 * \param prolog_key Key of the VS prolog
6008 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6009 * \param key Output shader part key.
6011 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6012 unsigned num_input_sgprs
,
6013 const struct si_vs_prolog_bits
*prolog_key
,
6014 struct si_shader
*shader_out
,
6015 union si_shader_part_key
*key
)
6017 memset(key
, 0, sizeof(*key
));
6018 key
->vs_prolog
.states
= *prolog_key
;
6019 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6020 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6021 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6022 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6024 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6025 key
->vs_prolog
.as_ls
= 1;
6026 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6027 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6028 key
->vs_prolog
.as_es
= 1;
6029 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6032 /* Enable loading the InstanceID VGPR. */
6033 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6035 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6036 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6037 shader_out
->info
.uses_instanceid
= true;
6041 * Compute the PS prolog key, which contains all the information needed to
6042 * build the PS prolog function, and set related bits in shader->config.
6044 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6045 union si_shader_part_key
*key
,
6046 bool separate_prolog
)
6048 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6050 memset(key
, 0, sizeof(*key
));
6051 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6052 key
->ps_prolog
.colors_read
= info
->colors_read
;
6053 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6054 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6055 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6056 (key
->ps_prolog
.colors_read
||
6057 key
->ps_prolog
.states
.force_persp_sample_interp
||
6058 key
->ps_prolog
.states
.force_linear_sample_interp
||
6059 key
->ps_prolog
.states
.force_persp_center_interp
||
6060 key
->ps_prolog
.states
.force_linear_center_interp
||
6061 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6062 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6063 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6065 if (info
->colors_read
) {
6066 unsigned *color
= shader
->selector
->color_attr_index
;
6068 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6069 /* BCOLORs are stored after the last input. */
6070 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6071 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6072 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6075 for (unsigned i
= 0; i
< 2; i
++) {
6076 unsigned interp
= info
->input_interpolate
[color
[i
]];
6077 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6079 if (!(info
->colors_read
& (0xf << i
*4)))
6082 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6084 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6085 interp
== TGSI_INTERPOLATE_COLOR
)
6086 interp
= TGSI_INTERPOLATE_CONSTANT
;
6089 case TGSI_INTERPOLATE_CONSTANT
:
6090 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6092 case TGSI_INTERPOLATE_PERSPECTIVE
:
6093 case TGSI_INTERPOLATE_COLOR
:
6094 /* Force the interpolation location for colors here. */
6095 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6096 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6097 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6098 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6101 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6102 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6103 shader
->config
.spi_ps_input_ena
|=
6104 S_0286CC_PERSP_SAMPLE_ENA(1);
6106 case TGSI_INTERPOLATE_LOC_CENTER
:
6107 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6108 shader
->config
.spi_ps_input_ena
|=
6109 S_0286CC_PERSP_CENTER_ENA(1);
6111 case TGSI_INTERPOLATE_LOC_CENTROID
:
6112 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6113 shader
->config
.spi_ps_input_ena
|=
6114 S_0286CC_PERSP_CENTROID_ENA(1);
6120 case TGSI_INTERPOLATE_LINEAR
:
6121 /* Force the interpolation location for colors here. */
6122 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6123 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6124 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6125 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6127 /* The VGPR assignment for non-monolithic shaders
6128 * works because InitialPSInputAddr is set on the
6129 * main shader and PERSP_PULL_MODEL is never used.
6132 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6133 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6134 separate_prolog
? 6 : 9;
6135 shader
->config
.spi_ps_input_ena
|=
6136 S_0286CC_LINEAR_SAMPLE_ENA(1);
6138 case TGSI_INTERPOLATE_LOC_CENTER
:
6139 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6140 separate_prolog
? 8 : 11;
6141 shader
->config
.spi_ps_input_ena
|=
6142 S_0286CC_LINEAR_CENTER_ENA(1);
6144 case TGSI_INTERPOLATE_LOC_CENTROID
:
6145 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6146 separate_prolog
? 10 : 13;
6147 shader
->config
.spi_ps_input_ena
|=
6148 S_0286CC_LINEAR_CENTROID_ENA(1);
6162 * Check whether a PS prolog is required based on the key.
6164 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6166 return key
->ps_prolog
.colors_read
||
6167 key
->ps_prolog
.states
.force_persp_sample_interp
||
6168 key
->ps_prolog
.states
.force_linear_sample_interp
||
6169 key
->ps_prolog
.states
.force_persp_center_interp
||
6170 key
->ps_prolog
.states
.force_linear_center_interp
||
6171 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6172 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6173 key
->ps_prolog
.states
.poly_stipple
||
6174 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6178 * Compute the PS epilog key, which contains all the information needed to
6179 * build the PS epilog function.
6181 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6182 union si_shader_part_key
*key
)
6184 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6185 memset(key
, 0, sizeof(*key
));
6186 key
->ps_epilog
.colors_written
= info
->colors_written
;
6187 key
->ps_epilog
.writes_z
= info
->writes_z
;
6188 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6189 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6190 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6194 * Build the GS prolog function. Rotate the input vertices for triangle strips
6197 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6198 union si_shader_part_key
*key
)
6200 unsigned num_sgprs
, num_vgprs
;
6201 struct si_function_info fninfo
;
6202 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6203 LLVMTypeRef returns
[48];
6204 LLVMValueRef func
, ret
;
6206 si_init_function_info(&fninfo
);
6208 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6209 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6210 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6212 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6213 num_vgprs
= 5; /* ES inputs are not needed by GS */
6215 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6219 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6220 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6221 returns
[i
] = ctx
->i32
;
6224 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6225 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6226 returns
[num_sgprs
+ i
] = ctx
->f32
;
6229 /* Create the function. */
6230 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6232 func
= ctx
->main_fn
;
6234 /* Set the full EXEC mask for the prolog, because we are only fiddling
6235 * with registers here. The main shader part will set the correct EXEC
6238 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6239 ac_init_exec_full_mask(&ctx
->ac
);
6241 /* Copy inputs to outputs. This should be no-op, as the registers match,
6242 * but it will prevent the compiler from overwriting them unintentionally.
6244 ret
= ctx
->return_value
;
6245 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6246 LLVMValueRef p
= LLVMGetParam(func
, i
);
6247 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6249 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6250 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6251 p
= ac_to_float(&ctx
->ac
, p
);
6252 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6255 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6256 /* Remap the input vertices for every other primitive. */
6257 const unsigned gfx6_vtx_params
[6] = {
6265 const unsigned gfx9_vtx_params
[3] = {
6270 LLVMValueRef vtx_in
[6], vtx_out
[6];
6271 LLVMValueRef prim_id
, rotate
;
6273 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6274 for (unsigned i
= 0; i
< 3; i
++) {
6275 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6276 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6279 for (unsigned i
= 0; i
< 6; i
++)
6280 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6283 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6284 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6286 for (unsigned i
= 0; i
< 6; ++i
) {
6287 LLVMValueRef base
, rotated
;
6289 rotated
= vtx_in
[(i
+ 4) % 6];
6290 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6293 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6294 for (unsigned i
= 0; i
< 3; i
++) {
6295 LLVMValueRef hi
, out
;
6297 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6298 LLVMConstInt(ctx
->i32
, 16, 0), "");
6299 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6300 out
= ac_to_float(&ctx
->ac
, out
);
6301 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6302 gfx9_vtx_params
[i
], "");
6305 for (unsigned i
= 0; i
< 6; i
++) {
6308 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6309 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6310 gfx6_vtx_params
[i
], "");
6315 LLVMBuildRet(builder
, ret
);
6319 * Given a list of shader part functions, build a wrapper function that
6320 * runs them in sequence to form a monolithic shader.
6322 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6323 LLVMValueRef
*parts
,
6326 unsigned next_shader_first_part
)
6328 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6329 /* PS epilog has one arg per color component; gfx9 merged shader
6330 * prologs need to forward 32 user SGPRs.
6332 struct si_function_info fninfo
;
6333 LLVMValueRef initial
[64], out
[64];
6334 LLVMTypeRef function_type
;
6335 unsigned num_first_params
;
6336 unsigned num_out
, initial_num_out
;
6337 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6338 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6339 unsigned num_sgprs
, num_vgprs
;
6341 struct lp_build_if_state if_state
;
6343 si_init_function_info(&fninfo
);
6345 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6346 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6347 AC_FUNC_ATTR_ALWAYSINLINE
);
6348 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6351 /* The parameters of the wrapper function correspond to those of the
6352 * first part in terms of SGPRs and VGPRs, but we use the types of the
6353 * main part to get the right types. This is relevant for the
6354 * dereferenceable attribute on descriptor table pointers.
6359 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6360 num_first_params
= LLVMCountParamTypes(function_type
);
6362 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6363 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6365 if (ac_is_sgpr_param(param
)) {
6366 assert(num_vgprs
== 0);
6367 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6369 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6374 while (gprs
< num_sgprs
+ num_vgprs
) {
6375 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6376 LLVMTypeRef type
= LLVMTypeOf(param
);
6377 unsigned size
= ac_get_type_size(type
) / 4;
6379 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6381 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6382 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6383 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6388 /* Prepare the return type. */
6389 unsigned num_returns
= 0;
6390 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6392 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6393 return_type
= LLVMGetReturnType(last_func_type
);
6395 switch (LLVMGetTypeKind(return_type
)) {
6396 case LLVMStructTypeKind
:
6397 num_returns
= LLVMCountStructElementTypes(return_type
);
6398 assert(num_returns
<= ARRAY_SIZE(returns
));
6399 LLVMGetStructElementTypes(return_type
, returns
);
6401 case LLVMVoidTypeKind
:
6404 unreachable("unexpected type");
6407 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6408 si_get_max_workgroup_size(ctx
->shader
));
6410 if (is_merged_shader(ctx
))
6411 ac_init_exec_full_mask(&ctx
->ac
);
6413 /* Record the arguments of the function as if they were an output of
6419 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6420 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6421 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6422 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6423 unsigned size
= ac_get_type_size(param_type
) / 4;
6426 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6427 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6428 param_type
= ctx
->i32
;
6431 if (param_type
!= out_type
)
6432 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6433 out
[num_out
++] = param
;
6435 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6437 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6438 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6439 param_type
= ctx
->i64
;
6442 if (param_type
!= vector_type
)
6443 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6445 for (unsigned j
= 0; j
< size
; ++j
)
6446 out
[num_out
++] = LLVMBuildExtractElement(
6447 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6450 if (i
< fninfo
.num_sgpr_params
)
6451 num_out_sgpr
= num_out
;
6454 memcpy(initial
, out
, sizeof(out
));
6455 initial_num_out
= num_out
;
6456 initial_num_out_sgpr
= num_out_sgpr
;
6458 /* Now chain the parts. */
6460 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6461 LLVMValueRef in
[48];
6462 LLVMTypeRef ret_type
;
6463 unsigned out_idx
= 0;
6464 unsigned num_params
= LLVMCountParams(parts
[part
]);
6466 /* Merged shaders are executed conditionally depending
6467 * on the number of enabled threads passed in the input SGPRs. */
6468 if (is_merged_shader(ctx
) && part
== 0) {
6469 LLVMValueRef ena
, count
= initial
[3];
6471 count
= LLVMBuildAnd(builder
, count
,
6472 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6473 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6474 ac_get_thread_id(&ctx
->ac
), count
, "");
6475 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6478 /* Derive arguments for the next part from outputs of the
6481 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6483 LLVMTypeRef param_type
;
6485 unsigned param_size
;
6486 LLVMValueRef arg
= NULL
;
6488 param
= LLVMGetParam(parts
[part
], param_idx
);
6489 param_type
= LLVMTypeOf(param
);
6490 param_size
= ac_get_type_size(param_type
) / 4;
6491 is_sgpr
= ac_is_sgpr_param(param
);
6494 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6495 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6496 } else if (out_idx
< num_out_sgpr
) {
6497 /* Skip returned SGPRs the current part doesn't
6498 * declare on the input. */
6499 out_idx
= num_out_sgpr
;
6502 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6504 if (param_size
== 1)
6507 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6509 if (LLVMTypeOf(arg
) != param_type
) {
6510 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6511 if (LLVMGetPointerAddressSpace(param_type
) ==
6512 AC_ADDR_SPACE_CONST_32BIT
) {
6513 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6514 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6516 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6517 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6520 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6524 in
[param_idx
] = arg
;
6525 out_idx
+= param_size
;
6528 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6530 if (is_merged_shader(ctx
) &&
6531 part
+ 1 == next_shader_first_part
) {
6532 lp_build_endif(&if_state
);
6534 /* The second half of the merged shader should use
6535 * the inputs from the toplevel (wrapper) function,
6536 * not the return value from the last call.
6538 * That's because the last call was executed condi-
6539 * tionally, so we can't consume it in the main
6542 memcpy(out
, initial
, sizeof(initial
));
6543 num_out
= initial_num_out
;
6544 num_out_sgpr
= initial_num_out_sgpr
;
6548 /* Extract the returned GPRs. */
6549 ret_type
= LLVMTypeOf(ret
);
6553 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6554 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6556 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6558 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6560 LLVMBuildExtractValue(builder
, ret
, i
, "");
6562 assert(num_out
< ARRAY_SIZE(out
));
6563 out
[num_out
++] = val
;
6565 if (LLVMTypeOf(val
) == ctx
->i32
) {
6566 assert(num_out_sgpr
+ 1 == num_out
);
6567 num_out_sgpr
= num_out
;
6573 /* Return the value from the last part. */
6574 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6575 LLVMBuildRetVoid(builder
);
6577 LLVMBuildRet(builder
, ret
);
6580 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6581 struct si_shader_selector
*sel
)
6583 if (!compiler
->low_opt_passes
)
6586 /* Assume a slow CPU. */
6587 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6588 sel
->screen
->info
.chip_class
<= GFX8
);
6590 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6592 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6593 sel
->info
.num_memory_instructions
> 1000;
6596 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6597 struct ac_llvm_compiler
*compiler
,
6598 struct si_shader
*shader
,
6599 struct pipe_debug_callback
*debug
)
6601 struct si_shader_selector
*sel
= shader
->selector
;
6602 struct si_shader_context ctx
;
6605 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6606 * conversion fails. */
6607 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6608 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6610 tgsi_dump(sel
->tokens
, 0);
6612 nir_print_shader(sel
->nir
, stderr
);
6613 si_dump_streamout(&sel
->so
);
6616 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6617 si_llvm_context_set_tgsi(&ctx
, shader
);
6619 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6620 sizeof(shader
->info
.vs_output_param_offset
));
6622 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6624 if (!si_compile_tgsi_main(&ctx
)) {
6625 si_llvm_dispose(&ctx
);
6629 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6630 LLVMValueRef parts
[2];
6631 bool need_prolog
= sel
->vs_needs_prolog
;
6633 parts
[1] = ctx
.main_fn
;
6636 union si_shader_part_key prolog_key
;
6637 si_get_vs_prolog_key(&sel
->info
,
6638 shader
->info
.num_input_sgprs
,
6639 &shader
->key
.part
.vs
.prolog
,
6640 shader
, &prolog_key
);
6641 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6642 parts
[0] = ctx
.main_fn
;
6645 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6646 1 + need_prolog
, need_prolog
, 0);
6647 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6648 if (sscreen
->info
.chip_class
>= GFX9
) {
6649 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6650 LLVMValueRef parts
[4];
6651 bool vs_needs_prolog
=
6652 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6655 parts
[2] = ctx
.main_fn
;
6658 union si_shader_part_key tcs_epilog_key
;
6659 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6660 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6661 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6662 parts
[3] = ctx
.main_fn
;
6664 /* VS as LS main part */
6665 struct si_shader shader_ls
= {};
6666 shader_ls
.selector
= ls
;
6667 shader_ls
.key
.as_ls
= 1;
6668 shader_ls
.key
.mono
= shader
->key
.mono
;
6669 shader_ls
.key
.opt
= shader
->key
.opt
;
6670 shader_ls
.is_monolithic
= true;
6671 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6673 if (!si_compile_tgsi_main(&ctx
)) {
6674 si_llvm_dispose(&ctx
);
6677 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6678 parts
[1] = ctx
.main_fn
;
6681 if (vs_needs_prolog
) {
6682 union si_shader_part_key vs_prolog_key
;
6683 si_get_vs_prolog_key(&ls
->info
,
6684 shader_ls
.info
.num_input_sgprs
,
6685 &shader
->key
.part
.tcs
.ls_prolog
,
6686 shader
, &vs_prolog_key
);
6687 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6688 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6689 parts
[0] = ctx
.main_fn
;
6692 /* Reset the shader context. */
6693 ctx
.shader
= shader
;
6694 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6696 si_build_wrapper_function(&ctx
,
6697 parts
+ !vs_needs_prolog
,
6698 4 - !vs_needs_prolog
, vs_needs_prolog
,
6699 vs_needs_prolog
? 2 : 1);
6701 LLVMValueRef parts
[2];
6702 union si_shader_part_key epilog_key
;
6704 parts
[0] = ctx
.main_fn
;
6706 memset(&epilog_key
, 0, sizeof(epilog_key
));
6707 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6708 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6709 parts
[1] = ctx
.main_fn
;
6711 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6713 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6714 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6715 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6716 LLVMValueRef es_prolog
= NULL
;
6717 LLVMValueRef es_main
= NULL
;
6718 LLVMValueRef gs_prolog
= NULL
;
6719 LLVMValueRef gs_main
= ctx
.main_fn
;
6722 union si_shader_part_key gs_prolog_key
;
6723 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6724 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6725 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6726 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6727 gs_prolog
= ctx
.main_fn
;
6730 struct si_shader shader_es
= {};
6731 shader_es
.selector
= es
;
6732 shader_es
.key
.as_es
= 1;
6733 shader_es
.key
.mono
= shader
->key
.mono
;
6734 shader_es
.key
.opt
= shader
->key
.opt
;
6735 shader_es
.is_monolithic
= true;
6736 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6738 if (!si_compile_tgsi_main(&ctx
)) {
6739 si_llvm_dispose(&ctx
);
6742 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6743 es_main
= ctx
.main_fn
;
6746 if (es
->vs_needs_prolog
) {
6747 union si_shader_part_key vs_prolog_key
;
6748 si_get_vs_prolog_key(&es
->info
,
6749 shader_es
.info
.num_input_sgprs
,
6750 &shader
->key
.part
.gs
.vs_prolog
,
6751 shader
, &vs_prolog_key
);
6752 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6753 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6754 es_prolog
= ctx
.main_fn
;
6757 /* Reset the shader context. */
6758 ctx
.shader
= shader
;
6759 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6761 /* Prepare the array of shader parts. */
6762 LLVMValueRef parts
[4];
6763 unsigned num_parts
= 0, main_part
, next_first_part
;
6766 parts
[num_parts
++] = es_prolog
;
6768 parts
[main_part
= num_parts
++] = es_main
;
6769 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6770 parts
[num_parts
++] = gs_main
;
6772 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6773 main_part
, next_first_part
);
6775 LLVMValueRef parts
[2];
6776 union si_shader_part_key prolog_key
;
6778 parts
[1] = ctx
.main_fn
;
6780 memset(&prolog_key
, 0, sizeof(prolog_key
));
6781 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6782 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6783 parts
[0] = ctx
.main_fn
;
6785 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6787 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6788 LLVMValueRef parts
[3];
6789 union si_shader_part_key prolog_key
;
6790 union si_shader_part_key epilog_key
;
6793 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6794 need_prolog
= si_need_ps_prolog(&prolog_key
);
6796 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6799 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6800 parts
[0] = ctx
.main_fn
;
6803 si_get_ps_epilog_key(shader
, &epilog_key
);
6804 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6805 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6807 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6808 need_prolog
? 1 : 0, 0);
6811 si_llvm_optimize_module(&ctx
);
6813 /* Post-optimization transformations and analysis. */
6814 si_optimize_vs_outputs(&ctx
);
6816 if ((debug
&& debug
->debug_message
) ||
6817 si_can_dump_shader(sscreen
, ctx
.type
)) {
6818 ctx
.shader
->config
.private_mem_vgprs
=
6819 ac_count_scratch_private_memory(ctx
.main_fn
);
6822 /* Make sure the input is a pointer and not integer followed by inttoptr. */
6823 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
6824 LLVMPointerTypeKind
);
6826 /* Compile to bytecode. */
6827 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
6828 ctx
.ac
.module
, debug
, ctx
.type
,
6829 si_get_shader_name(shader
, ctx
.type
),
6830 si_should_optimize_less(compiler
, shader
->selector
));
6831 si_llvm_dispose(&ctx
);
6833 fprintf(stderr
, "LLVM failed to compile shader\n");
6837 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6838 * LLVM 3.9svn has this bug.
6840 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6841 unsigned wave_size
= 64;
6842 unsigned max_vgprs
= 256;
6843 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
6844 unsigned max_sgprs_per_wave
= 128;
6845 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6846 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6847 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6849 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6850 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6852 if (shader
->config
.num_sgprs
> max_sgprs
||
6853 shader
->config
.num_vgprs
> max_vgprs
) {
6854 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6855 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6856 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6857 max_sgprs
, max_vgprs
);
6859 /* Just terminate the process, because dependent
6860 * shaders can hang due to bad input data, but use
6861 * the env var to allow shader-db to work.
6863 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6868 /* Add the scratch offset to input SGPRs. */
6869 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
6870 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6872 /* Calculate the number of fragment input VGPRs. */
6873 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6874 shader
->info
.num_input_vgprs
= 0;
6875 shader
->info
.face_vgpr_index
= -1;
6876 shader
->info
.ancillary_vgpr_index
= -1;
6878 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6879 shader
->info
.num_input_vgprs
+= 2;
6880 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6881 shader
->info
.num_input_vgprs
+= 2;
6882 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6883 shader
->info
.num_input_vgprs
+= 2;
6884 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6885 shader
->info
.num_input_vgprs
+= 3;
6886 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6887 shader
->info
.num_input_vgprs
+= 2;
6888 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6889 shader
->info
.num_input_vgprs
+= 2;
6890 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6891 shader
->info
.num_input_vgprs
+= 2;
6892 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6893 shader
->info
.num_input_vgprs
+= 1;
6894 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6895 shader
->info
.num_input_vgprs
+= 1;
6896 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6897 shader
->info
.num_input_vgprs
+= 1;
6898 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6899 shader
->info
.num_input_vgprs
+= 1;
6900 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6901 shader
->info
.num_input_vgprs
+= 1;
6902 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6903 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6904 shader
->info
.num_input_vgprs
+= 1;
6906 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6907 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6908 shader
->info
.num_input_vgprs
+= 1;
6910 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6911 shader
->info
.num_input_vgprs
+= 1;
6912 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6913 shader
->info
.num_input_vgprs
+= 1;
6916 si_calculate_max_simd_waves(shader
);
6917 si_shader_dump_stats_for_shader_db(shader
, debug
);
6922 * Create, compile and return a shader part (prolog or epilog).
6924 * \param sscreen screen
6925 * \param list list of shader parts of the same category
6926 * \param type shader type
6927 * \param key shader part key
6928 * \param prolog whether the part being requested is a prolog
6929 * \param tm LLVM target machine
6930 * \param debug debug callback
6931 * \param build the callback responsible for building the main function
6932 * \return non-NULL on success
6934 static struct si_shader_part
*
6935 si_get_shader_part(struct si_screen
*sscreen
,
6936 struct si_shader_part
**list
,
6937 enum pipe_shader_type type
,
6939 union si_shader_part_key
*key
,
6940 struct ac_llvm_compiler
*compiler
,
6941 struct pipe_debug_callback
*debug
,
6942 void (*build
)(struct si_shader_context
*,
6943 union si_shader_part_key
*),
6946 struct si_shader_part
*result
;
6948 mtx_lock(&sscreen
->shader_parts_mutex
);
6950 /* Find existing. */
6951 for (result
= *list
; result
; result
= result
->next
) {
6952 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
6953 mtx_unlock(&sscreen
->shader_parts_mutex
);
6958 /* Compile a new one. */
6959 result
= CALLOC_STRUCT(si_shader_part
);
6962 struct si_shader shader
= {};
6963 struct si_shader_context ctx
;
6965 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6966 ctx
.shader
= &shader
;
6970 case PIPE_SHADER_VERTEX
:
6971 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
6972 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
6974 case PIPE_SHADER_TESS_CTRL
:
6976 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
6978 case PIPE_SHADER_GEOMETRY
:
6981 case PIPE_SHADER_FRAGMENT
:
6983 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
6985 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
6988 unreachable("bad shader part");
6994 si_llvm_optimize_module(&ctx
);
6996 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
6997 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
7003 result
->next
= *list
;
7007 si_llvm_dispose(&ctx
);
7008 mtx_unlock(&sscreen
->shader_parts_mutex
);
7012 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7014 LLVMValueRef ptr
[2], list
;
7015 bool merged_shader
= is_merged_shader(ctx
);
7017 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7018 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7019 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7024 * Build the vertex shader prolog function.
7026 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7027 * All inputs are returned unmodified. The vertex load indices are
7028 * stored after them, which will be used by the API VS for fetching inputs.
7030 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7035 * (VertexID + BaseVertex),
7036 * (InstanceID + StartInstance),
7037 * (InstanceID / 2 + StartInstance)
7039 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7040 union si_shader_part_key
*key
)
7042 struct si_function_info fninfo
;
7043 LLVMTypeRef
*returns
;
7044 LLVMValueRef ret
, func
;
7046 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7047 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7048 LLVMValueRef input_vgprs
[9];
7049 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7051 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7053 si_init_function_info(&fninfo
);
7055 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7056 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7057 sizeof(LLVMTypeRef
));
7060 /* Declare input and output SGPRs. */
7061 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7062 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7063 returns
[num_returns
++] = ctx
->i32
;
7066 /* Preloaded VGPRs (outputs must be floats) */
7067 for (i
= 0; i
< num_input_vgprs
; i
++) {
7068 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7069 returns
[num_returns
++] = ctx
->f32
;
7072 /* Vertex load indices. */
7073 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7074 returns
[num_returns
++] = ctx
->f32
;
7076 /* Create the function. */
7077 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7078 func
= ctx
->main_fn
;
7080 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7081 if (!key
->vs_prolog
.is_monolithic
)
7082 si_init_exec_from_input(ctx
, 3, 0);
7084 if (key
->vs_prolog
.as_ls
&&
7085 ctx
->screen
->has_ls_vgpr_init_bug
) {
7086 /* If there are no HS threads, SPI loads the LS VGPRs
7087 * starting at VGPR 0. Shift them back to where they
7090 LLVMValueRef has_hs_threads
=
7091 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7092 si_unpack_param(ctx
, 3, 8, 8),
7095 for (i
= 4; i
> 0; --i
) {
7096 input_vgprs
[i
+ 1] =
7097 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7099 input_vgprs
[i
- 1], "");
7104 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7105 unsigned instance_id_vgpr
= first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7107 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7108 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7110 /* InstanceID = VertexID >> 16;
7111 * VertexID = VertexID & 0xffff;
7113 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7114 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7115 LLVMConstInt(ctx
->i32
, 16, 0), "");
7116 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7117 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7120 /* Copy inputs to outputs. This should be no-op, as the registers match,
7121 * but it will prevent the compiler from overwriting them unintentionally.
7123 ret
= ctx
->return_value
;
7124 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7125 LLVMValueRef p
= LLVMGetParam(func
, i
);
7126 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7128 for (i
= 0; i
< num_input_vgprs
; i
++) {
7129 LLVMValueRef p
= input_vgprs
[i
];
7131 if (i
== vertex_id_vgpr
)
7132 p
= ctx
->abi
.vertex_id
;
7133 else if (i
== instance_id_vgpr
)
7134 p
= ctx
->abi
.instance_id
;
7136 p
= ac_to_float(&ctx
->ac
, p
);
7137 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7138 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7141 /* Compute vertex load indices from instance divisors. */
7142 LLVMValueRef instance_divisor_constbuf
= NULL
;
7144 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7145 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7146 LLVMValueRef buf_index
=
7147 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7148 instance_divisor_constbuf
=
7149 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7152 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7153 bool divisor_is_one
=
7154 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7155 bool divisor_is_fetched
=
7156 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7157 LLVMValueRef index
= NULL
;
7159 if (divisor_is_one
) {
7160 index
= ctx
->abi
.instance_id
;
7161 } else if (divisor_is_fetched
) {
7162 LLVMValueRef udiv_factors
[4];
7164 for (unsigned j
= 0; j
< 4; j
++) {
7166 buffer_load_const(ctx
, instance_divisor_constbuf
,
7167 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7168 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7170 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7171 * Such InstanceID might not be achievable in a reasonable time though.
7173 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7174 udiv_factors
[0], udiv_factors
[1],
7175 udiv_factors
[2], udiv_factors
[3]);
7178 if (divisor_is_one
|| divisor_is_fetched
) {
7179 /* Add StartInstance. */
7180 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7181 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7182 SI_SGPR_START_INSTANCE
), "");
7184 /* VertexID + BaseVertex */
7185 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7187 LLVMGetParam(func
, user_sgpr_base
+
7188 SI_SGPR_BASE_VERTEX
), "");
7191 index
= ac_to_float(&ctx
->ac
, index
);
7192 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7193 fninfo
.num_params
+ i
, "");
7196 si_llvm_build_ret(ctx
, ret
);
7199 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7200 struct ac_llvm_compiler
*compiler
,
7201 struct si_shader
*shader
,
7202 struct pipe_debug_callback
*debug
,
7203 struct si_shader
*main_part
,
7204 const struct si_vs_prolog_bits
*key
)
7206 struct si_shader_selector
*vs
= main_part
->selector
;
7208 if (!si_vs_needs_prolog(vs
, key
))
7211 /* Get the prolog. */
7212 union si_shader_part_key prolog_key
;
7213 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7214 key
, shader
, &prolog_key
);
7217 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7218 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7219 debug
, si_build_vs_prolog_function
,
7220 "Vertex Shader Prolog");
7221 return shader
->prolog
!= NULL
;
7225 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7227 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7228 struct ac_llvm_compiler
*compiler
,
7229 struct si_shader
*shader
,
7230 struct pipe_debug_callback
*debug
)
7232 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7233 &shader
->key
.part
.vs
.prolog
);
7237 * Compile the TCS epilog function. This writes tesselation factors to memory
7238 * based on the output primitive type of the tesselator (determined by TES).
7240 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7241 union si_shader_part_key
*key
)
7243 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7244 struct si_function_info fninfo
;
7247 si_init_function_info(&fninfo
);
7249 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7250 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7251 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7252 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7253 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7254 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7255 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7256 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7257 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7258 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7259 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7260 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7261 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7262 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7263 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7264 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7265 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7266 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7267 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7268 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7270 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7271 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7272 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7273 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7274 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7275 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7276 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7277 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7278 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7279 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7282 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7283 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7284 unsigned tess_factors_idx
=
7285 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7286 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7287 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7289 for (unsigned i
= 0; i
< 6; i
++)
7290 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7292 /* Create the function. */
7293 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7294 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 64);
7295 ac_declare_lds_as_pointer(&ctx
->ac
);
7296 func
= ctx
->main_fn
;
7298 LLVMValueRef invoc0_tess_factors
[6];
7299 for (unsigned i
= 0; i
< 6; i
++)
7300 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7302 si_write_tess_factors(bld_base
,
7303 LLVMGetParam(func
, tess_factors_idx
),
7304 LLVMGetParam(func
, tess_factors_idx
+ 1),
7305 LLVMGetParam(func
, tess_factors_idx
+ 2),
7306 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7308 LLVMBuildRetVoid(ctx
->ac
.builder
);
7312 * Select and compile (or reuse) TCS parts (epilog).
7314 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7315 struct ac_llvm_compiler
*compiler
,
7316 struct si_shader
*shader
,
7317 struct pipe_debug_callback
*debug
)
7319 if (sscreen
->info
.chip_class
>= GFX9
) {
7320 struct si_shader
*ls_main_part
=
7321 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7323 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7324 &shader
->key
.part
.tcs
.ls_prolog
))
7327 shader
->previous_stage
= ls_main_part
;
7330 /* Get the epilog. */
7331 union si_shader_part_key epilog_key
;
7332 memset(&epilog_key
, 0, sizeof(epilog_key
));
7333 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7335 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7336 PIPE_SHADER_TESS_CTRL
, false,
7337 &epilog_key
, compiler
, debug
,
7338 si_build_tcs_epilog_function
,
7339 "Tessellation Control Shader Epilog");
7340 return shader
->epilog
!= NULL
;
7344 * Select and compile (or reuse) GS parts (prolog).
7346 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7347 struct ac_llvm_compiler
*compiler
,
7348 struct si_shader
*shader
,
7349 struct pipe_debug_callback
*debug
)
7351 if (sscreen
->info
.chip_class
>= GFX9
) {
7352 struct si_shader
*es_main_part
=
7353 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7355 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7356 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7357 &shader
->key
.part
.gs
.vs_prolog
))
7360 shader
->previous_stage
= es_main_part
;
7363 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7366 union si_shader_part_key prolog_key
;
7367 memset(&prolog_key
, 0, sizeof(prolog_key
));
7368 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7370 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7371 PIPE_SHADER_GEOMETRY
, true,
7372 &prolog_key
, compiler
, debug
,
7373 si_build_gs_prolog_function
,
7374 "Geometry Shader Prolog");
7375 return shader
->prolog2
!= NULL
;
7379 * Build the pixel shader prolog function. This handles:
7380 * - two-side color selection and interpolation
7381 * - overriding interpolation parameters for the API PS
7382 * - polygon stippling
7384 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7385 * overriden by other states. (e.g. per-sample interpolation)
7386 * Interpolated colors are stored after the preloaded VGPRs.
7388 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7389 union si_shader_part_key
*key
)
7391 struct si_function_info fninfo
;
7392 LLVMValueRef ret
, func
;
7393 int num_returns
, i
, num_color_channels
;
7395 assert(si_need_ps_prolog(key
));
7397 si_init_function_info(&fninfo
);
7399 /* Declare inputs. */
7400 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7401 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7403 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7404 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7406 /* Declare outputs (same as inputs + add colors if needed) */
7407 num_returns
= fninfo
.num_params
;
7408 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7409 for (i
= 0; i
< num_color_channels
; i
++)
7410 fninfo
.types
[num_returns
++] = ctx
->f32
;
7412 /* Create the function. */
7413 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7415 func
= ctx
->main_fn
;
7417 /* Copy inputs to outputs. This should be no-op, as the registers match,
7418 * but it will prevent the compiler from overwriting them unintentionally.
7420 ret
= ctx
->return_value
;
7421 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7422 LLVMValueRef p
= LLVMGetParam(func
, i
);
7423 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7426 /* Polygon stippling. */
7427 if (key
->ps_prolog
.states
.poly_stipple
) {
7428 /* POS_FIXED_PT is always last. */
7429 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7430 key
->ps_prolog
.num_input_vgprs
- 1;
7431 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7433 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7436 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7437 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7438 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7439 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7441 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7442 * The hw doesn't compute CENTROID if the whole wave only
7443 * contains fully-covered quads.
7445 * PRIM_MASK is after user SGPRs.
7447 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7448 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7449 LLVMConstInt(ctx
->i32
, 31, 0), "");
7450 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7453 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7454 /* Read PERSP_CENTER. */
7455 for (i
= 0; i
< 2; i
++)
7456 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7457 /* Read PERSP_CENTROID. */
7458 for (i
= 0; i
< 2; i
++)
7459 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7460 /* Select PERSP_CENTROID. */
7461 for (i
= 0; i
< 2; i
++) {
7462 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7463 center
[i
], centroid
[i
], "");
7464 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7465 tmp
, base
+ 4 + i
, "");
7468 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7469 /* Read LINEAR_CENTER. */
7470 for (i
= 0; i
< 2; i
++)
7471 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7472 /* Read LINEAR_CENTROID. */
7473 for (i
= 0; i
< 2; i
++)
7474 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7475 /* Select LINEAR_CENTROID. */
7476 for (i
= 0; i
< 2; i
++) {
7477 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7478 center
[i
], centroid
[i
], "");
7479 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7480 tmp
, base
+ 10 + i
, "");
7485 /* Force per-sample interpolation. */
7486 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7487 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7488 LLVMValueRef persp_sample
[2];
7490 /* Read PERSP_SAMPLE. */
7491 for (i
= 0; i
< 2; i
++)
7492 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7493 /* Overwrite PERSP_CENTER. */
7494 for (i
= 0; i
< 2; i
++)
7495 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7496 persp_sample
[i
], base
+ 2 + i
, "");
7497 /* Overwrite PERSP_CENTROID. */
7498 for (i
= 0; i
< 2; i
++)
7499 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7500 persp_sample
[i
], base
+ 4 + i
, "");
7502 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7503 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7504 LLVMValueRef linear_sample
[2];
7506 /* Read LINEAR_SAMPLE. */
7507 for (i
= 0; i
< 2; i
++)
7508 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7509 /* Overwrite LINEAR_CENTER. */
7510 for (i
= 0; i
< 2; i
++)
7511 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7512 linear_sample
[i
], base
+ 8 + i
, "");
7513 /* Overwrite LINEAR_CENTROID. */
7514 for (i
= 0; i
< 2; i
++)
7515 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7516 linear_sample
[i
], base
+ 10 + i
, "");
7519 /* Force center interpolation. */
7520 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7521 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7522 LLVMValueRef persp_center
[2];
7524 /* Read PERSP_CENTER. */
7525 for (i
= 0; i
< 2; i
++)
7526 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7527 /* Overwrite PERSP_SAMPLE. */
7528 for (i
= 0; i
< 2; i
++)
7529 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7530 persp_center
[i
], base
+ i
, "");
7531 /* Overwrite PERSP_CENTROID. */
7532 for (i
= 0; i
< 2; i
++)
7533 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7534 persp_center
[i
], base
+ 4 + i
, "");
7536 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7537 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7538 LLVMValueRef linear_center
[2];
7540 /* Read LINEAR_CENTER. */
7541 for (i
= 0; i
< 2; i
++)
7542 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7543 /* Overwrite LINEAR_SAMPLE. */
7544 for (i
= 0; i
< 2; i
++)
7545 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7546 linear_center
[i
], base
+ 6 + i
, "");
7547 /* Overwrite LINEAR_CENTROID. */
7548 for (i
= 0; i
< 2; i
++)
7549 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7550 linear_center
[i
], base
+ 10 + i
, "");
7553 /* Interpolate colors. */
7554 unsigned color_out_idx
= 0;
7555 for (i
= 0; i
< 2; i
++) {
7556 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7557 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7558 key
->ps_prolog
.face_vgpr_index
;
7559 LLVMValueRef interp
[2], color
[4];
7560 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7565 /* If the interpolation qualifier is not CONSTANT (-1). */
7566 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7567 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7568 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7570 /* Get the (i,j) updated by bc_optimize handling. */
7571 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7573 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7574 interp_vgpr
+ 1, "");
7575 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7578 /* Use the absolute location of the input. */
7579 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7581 if (key
->ps_prolog
.states
.color_two_side
) {
7582 face
= LLVMGetParam(func
, face_vgpr
);
7583 face
= ac_to_integer(&ctx
->ac
, face
);
7586 interp_fs_input(ctx
,
7587 key
->ps_prolog
.color_attr_index
[i
],
7588 TGSI_SEMANTIC_COLOR
, i
,
7589 key
->ps_prolog
.num_interp_inputs
,
7590 key
->ps_prolog
.colors_read
, interp_ij
,
7591 prim_mask
, face
, color
);
7594 unsigned chan
= u_bit_scan(&writemask
);
7595 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7596 fninfo
.num_params
+ color_out_idx
++, "");
7600 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7603 * "When per-sample shading is active due to the use of a fragment
7604 * input qualified by sample or due to the use of the gl_SampleID
7605 * or gl_SamplePosition variables, only the bit for the current
7606 * sample is set in gl_SampleMaskIn. When state specifies multiple
7607 * fragment shader invocations for a given fragment, the sample
7608 * mask for any single fragment shader invocation may specify a
7609 * subset of the covered samples for the fragment. In this case,
7610 * the bit corresponding to each covered sample will be set in
7611 * exactly one fragment shader invocation."
7613 * The samplemask loaded by hardware is always the coverage of the
7614 * entire pixel/fragment, so mask bits out based on the sample ID.
7616 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7617 /* The bit pattern matches that used by fixed function fragment
7619 static const uint16_t ps_iter_masks
[] = {
7620 0xffff, /* not used */
7626 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7628 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7629 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7630 key
->ps_prolog
.ancillary_vgpr_index
;
7631 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7632 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7634 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7635 samplemask
= LLVMBuildAnd(
7638 LLVMBuildShl(ctx
->ac
.builder
,
7639 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7642 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7644 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7645 ancillary_vgpr
+ 1, "");
7648 /* Tell LLVM to insert WQM instruction sequence when needed. */
7649 if (key
->ps_prolog
.wqm
) {
7650 LLVMAddTargetDependentFunctionAttr(func
,
7651 "amdgpu-ps-wqm-outputs", "");
7654 si_llvm_build_ret(ctx
, ret
);
7658 * Build the pixel shader epilog function. This handles everything that must be
7659 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7661 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7662 union si_shader_part_key
*key
)
7664 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7665 struct si_function_info fninfo
;
7666 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7668 struct si_ps_exports exp
= {};
7670 si_init_function_info(&fninfo
);
7672 /* Declare input SGPRs. */
7673 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7674 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7675 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7676 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7677 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7679 /* Declare input VGPRs. */
7680 unsigned required_num_params
=
7681 fninfo
.num_sgpr_params
+
7682 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7683 key
->ps_epilog
.writes_z
+
7684 key
->ps_epilog
.writes_stencil
+
7685 key
->ps_epilog
.writes_samplemask
;
7687 required_num_params
= MAX2(required_num_params
,
7688 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7690 while (fninfo
.num_params
< required_num_params
)
7691 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7693 /* Create the function. */
7694 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7695 /* Disable elimination of unused inputs. */
7696 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7697 "InitialPSInputAddr", 0xffffff);
7699 /* Process colors. */
7700 unsigned vgpr
= fninfo
.num_sgpr_params
;
7701 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7702 int last_color_export
= -1;
7704 /* Find the last color export. */
7705 if (!key
->ps_epilog
.writes_z
&&
7706 !key
->ps_epilog
.writes_stencil
&&
7707 !key
->ps_epilog
.writes_samplemask
) {
7708 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7710 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7711 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7712 /* Just set this if any of the colorbuffers are enabled. */
7714 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7715 last_color_export
= 0;
7717 for (i
= 0; i
< 8; i
++)
7718 if (colors_written
& (1 << i
) &&
7719 (spi_format
>> (i
* 4)) & 0xf)
7720 last_color_export
= i
;
7724 while (colors_written
) {
7725 LLVMValueRef color
[4];
7726 int mrt
= u_bit_scan(&colors_written
);
7728 for (i
= 0; i
< 4; i
++)
7729 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7731 si_export_mrt_color(bld_base
, color
, mrt
,
7732 fninfo
.num_params
- 1,
7733 mrt
== last_color_export
, &exp
);
7736 /* Process depth, stencil, samplemask. */
7737 if (key
->ps_epilog
.writes_z
)
7738 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7739 if (key
->ps_epilog
.writes_stencil
)
7740 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7741 if (key
->ps_epilog
.writes_samplemask
)
7742 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7744 if (depth
|| stencil
|| samplemask
)
7745 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7746 else if (last_color_export
== -1)
7747 ac_build_export_null(&ctx
->ac
);
7750 si_emit_ps_exports(ctx
, &exp
);
7753 LLVMBuildRetVoid(ctx
->ac
.builder
);
7757 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7759 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7760 struct ac_llvm_compiler
*compiler
,
7761 struct si_shader
*shader
,
7762 struct pipe_debug_callback
*debug
)
7764 union si_shader_part_key prolog_key
;
7765 union si_shader_part_key epilog_key
;
7767 /* Get the prolog. */
7768 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7770 /* The prolog is a no-op if these aren't set. */
7771 if (si_need_ps_prolog(&prolog_key
)) {
7773 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7774 PIPE_SHADER_FRAGMENT
, true,
7775 &prolog_key
, compiler
, debug
,
7776 si_build_ps_prolog_function
,
7777 "Fragment Shader Prolog");
7778 if (!shader
->prolog
)
7782 /* Get the epilog. */
7783 si_get_ps_epilog_key(shader
, &epilog_key
);
7786 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7787 PIPE_SHADER_FRAGMENT
, false,
7788 &epilog_key
, compiler
, debug
,
7789 si_build_ps_epilog_function
,
7790 "Fragment Shader Epilog");
7791 if (!shader
->epilog
)
7794 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7795 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7796 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7797 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7800 /* Set up the enable bits for per-sample shading if needed. */
7801 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7802 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7803 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7804 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7805 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7806 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7808 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7809 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7810 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7811 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7812 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7813 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7815 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7816 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7817 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7818 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7819 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7820 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7822 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7823 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7824 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7825 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7826 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7827 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7830 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7831 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7832 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7833 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7834 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7837 /* At least one pair of interpolation weights must be enabled. */
7838 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7839 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7840 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7843 /* Samplemask fixup requires the sample ID. */
7844 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7845 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7846 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7849 /* The sample mask input is always enabled, because the API shader always
7850 * passes it through to the epilog. Disable it here if it's unused.
7852 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7853 !shader
->selector
->info
.reads_samplemask
)
7854 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7859 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7862 /* If tessellation is all offchip and on-chip GS isn't used, this
7863 * workaround is not needed.
7867 /* SPI barrier management bug:
7868 * Make sure we have at least 4k of LDS in use to avoid the bug.
7869 * It applies to workgroup sizes of more than one wavefront.
7871 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7872 sscreen
->info
.family
== CHIP_KABINI
||
7873 sscreen
->info
.family
== CHIP_MULLINS
)
7874 *lds_size
= MAX2(*lds_size
, 8);
7877 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7878 struct si_shader
*shader
)
7880 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7882 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7884 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7885 si_get_max_workgroup_size(shader
) > 64) {
7886 si_multiwave_lds_size_workaround(sscreen
,
7887 &shader
->config
.lds_size
);
7891 int si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
7892 struct si_shader
*shader
,
7893 struct pipe_debug_callback
*debug
)
7895 struct si_shader_selector
*sel
= shader
->selector
;
7896 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7899 /* LS, ES, VS are compiled on demand if the main part hasn't been
7900 * compiled for that stage.
7902 * Vertex shaders are compiled on demand when a vertex fetch
7903 * workaround must be applied.
7905 if (shader
->is_monolithic
) {
7906 /* Monolithic shader (compiled as a whole, has many variants,
7907 * may take a long time to compile).
7909 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
7913 /* The shader consists of several parts:
7915 * - the middle part is the user shader, it has 1 variant only
7916 * and it was compiled during the creation of the shader
7918 * - the prolog part is inserted at the beginning
7919 * - the epilog part is inserted at the end
7921 * The prolog and epilog have many (but simple) variants.
7923 * Starting with gfx9, geometry and tessellation control
7924 * shaders also contain the prolog and user shader parts of
7925 * the previous shader stage.
7931 /* Copy the compiled TGSI shader data over. */
7932 shader
->is_binary_shared
= true;
7933 shader
->binary
= mainp
->binary
;
7934 shader
->config
= mainp
->config
;
7935 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7936 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7937 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7938 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7939 memcpy(shader
->info
.vs_output_param_offset
,
7940 mainp
->info
.vs_output_param_offset
,
7941 sizeof(mainp
->info
.vs_output_param_offset
));
7942 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7943 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7944 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7946 /* Select prologs and/or epilogs. */
7947 switch (sel
->type
) {
7948 case PIPE_SHADER_VERTEX
:
7949 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
7952 case PIPE_SHADER_TESS_CTRL
:
7953 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
7956 case PIPE_SHADER_TESS_EVAL
:
7958 case PIPE_SHADER_GEOMETRY
:
7959 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
7962 case PIPE_SHADER_FRAGMENT
:
7963 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
7966 /* Make sure we have at least as many VGPRs as there
7967 * are allocated inputs.
7969 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7970 shader
->info
.num_input_vgprs
);
7974 /* Update SGPR and VGPR counts. */
7975 if (shader
->prolog
) {
7976 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7977 shader
->prolog
->config
.num_sgprs
);
7978 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7979 shader
->prolog
->config
.num_vgprs
);
7981 if (shader
->previous_stage
) {
7982 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7983 shader
->previous_stage
->config
.num_sgprs
);
7984 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7985 shader
->previous_stage
->config
.num_vgprs
);
7986 shader
->config
.spilled_sgprs
=
7987 MAX2(shader
->config
.spilled_sgprs
,
7988 shader
->previous_stage
->config
.spilled_sgprs
);
7989 shader
->config
.spilled_vgprs
=
7990 MAX2(shader
->config
.spilled_vgprs
,
7991 shader
->previous_stage
->config
.spilled_vgprs
);
7992 shader
->config
.private_mem_vgprs
=
7993 MAX2(shader
->config
.private_mem_vgprs
,
7994 shader
->previous_stage
->config
.private_mem_vgprs
);
7995 shader
->config
.scratch_bytes_per_wave
=
7996 MAX2(shader
->config
.scratch_bytes_per_wave
,
7997 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
7998 shader
->info
.uses_instanceid
|=
7999 shader
->previous_stage
->info
.uses_instanceid
;
8001 if (shader
->prolog2
) {
8002 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8003 shader
->prolog2
->config
.num_sgprs
);
8004 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8005 shader
->prolog2
->config
.num_vgprs
);
8007 if (shader
->epilog
) {
8008 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8009 shader
->epilog
->config
.num_sgprs
);
8010 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8011 shader
->epilog
->config
.num_vgprs
);
8013 si_calculate_max_simd_waves(shader
);
8016 si_fix_resource_usage(sscreen
, shader
);
8017 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8021 r
= si_shader_binary_upload(sscreen
, shader
);
8023 fprintf(stderr
, "LLVM failed to upload shader\n");
8030 void si_shader_destroy(struct si_shader
*shader
)
8032 if (shader
->scratch_bo
)
8033 si_resource_reference(&shader
->scratch_bo
, NULL
);
8035 si_resource_reference(&shader
->bo
, NULL
);
8037 if (!shader
->is_binary_shared
)
8038 ac_shader_binary_clean(&shader
->binary
);
8040 free(shader
->shader_log
);