2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "util/u_memory.h"
37 #include "util/u_string.h"
38 #include "tgsi/tgsi_build.h"
39 #include "tgsi/tgsi_util.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "ac_binary.h"
43 #include "ac_llvm_util.h"
44 #include "ac_exp_param.h"
45 #include "si_shader_internal.h"
50 static const char *scratch_rsrc_dword0_symbol
=
51 "SCRATCH_RSRC_DWORD0";
53 static const char *scratch_rsrc_dword1_symbol
=
54 "SCRATCH_RSRC_DWORD1";
56 struct si_shader_output_values
58 LLVMValueRef values
[4];
59 unsigned semantic_name
;
60 unsigned semantic_index
;
61 ubyte vertex_stream
[4];
64 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
65 struct si_screen
*sscreen
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned processor
, struct si_shader
*shader
,
75 static unsigned llvm_get_type_size(LLVMTypeRef type
);
77 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
85 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
86 union si_shader_part_key
*key
);
88 /* Ideally pass the sample mask input to the PS epilog as v13, which
89 * is its usual location, so that the shader doesn't have to add v_mov.
91 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
93 /* The VS location of the PrimitiveID input is the same in the epilog,
94 * so that the main shader part doesn't have to move it.
96 #define VS_EPILOG_PRIMID_LOC 2
100 LOCAL_ADDR_SPACE
= 3,
104 * Returns a unique index for a semantic name and index. The index must be
105 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
108 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
110 switch (semantic_name
) {
111 case TGSI_SEMANTIC_POSITION
:
113 case TGSI_SEMANTIC_PSIZE
:
115 case TGSI_SEMANTIC_CLIPDIST
:
118 case TGSI_SEMANTIC_GENERIC
:
122 assert(!"invalid generic index");
125 /* patch indices are completely separate and thus start from 0 */
126 case TGSI_SEMANTIC_TESSOUTER
:
128 case TGSI_SEMANTIC_TESSINNER
:
130 case TGSI_SEMANTIC_PATCH
:
134 assert(!"invalid semantic name");
139 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
142 case TGSI_SEMANTIC_FOG
:
144 case TGSI_SEMANTIC_LAYER
:
146 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
148 case TGSI_SEMANTIC_PRIMID
:
150 case TGSI_SEMANTIC_COLOR
: /* these alias */
151 case TGSI_SEMANTIC_BCOLOR
:
153 case TGSI_SEMANTIC_TEXCOORD
:
156 assert(!"invalid semantic name");
162 * Get the value of a shader input parameter and extract a bitfield.
164 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
165 unsigned param
, unsigned rshift
,
168 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
169 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
172 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
173 value
= bitcast(&ctx
->bld_base
,
174 TGSI_TYPE_UNSIGNED
, value
);
177 value
= LLVMBuildLShr(gallivm
->builder
, value
,
178 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
180 if (rshift
+ bitwidth
< 32) {
181 unsigned mask
= (1 << bitwidth
) - 1;
182 value
= LLVMBuildAnd(gallivm
->builder
, value
,
183 LLVMConstInt(ctx
->i32
, mask
, 0), "");
189 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
192 case PIPE_SHADER_TESS_CTRL
:
193 return unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 0, 8);
195 case PIPE_SHADER_TESS_EVAL
:
196 return LLVMGetParam(ctx
->main_fn
,
197 ctx
->param_tes_rel_patch_id
);
205 /* Tessellation shaders pass outputs to the next shader using LDS.
207 * LS outputs = TCS inputs
208 * TCS outputs = TES inputs
211 * - TCS inputs for patch 0
212 * - TCS inputs for patch 1
213 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
215 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
216 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
217 * - TCS outputs for patch 1
218 * - Per-patch TCS outputs for patch 1
219 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
220 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
223 * All three shaders VS(LS), TCS, TES share the same LDS space.
227 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
229 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
233 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
235 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
239 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
241 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
243 ctx
->param_tcs_out_lds_offsets
,
249 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
251 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
253 ctx
->param_tcs_out_lds_offsets
,
259 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
261 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
262 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
263 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
265 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
269 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
271 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
272 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
273 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
274 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
276 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
277 LLVMBuildMul(gallivm
->builder
, patch_stride
,
283 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
285 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
286 LLVMValueRef patch0_patch_data_offset
=
287 get_tcs_out_patch0_patch_data_offset(ctx
);
288 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
289 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
291 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
292 LLVMBuildMul(gallivm
->builder
, patch_stride
,
297 static LLVMValueRef
get_instance_index_for_fetch(
298 struct si_shader_context
*ctx
,
299 unsigned param_start_instance
, unsigned divisor
)
301 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
303 LLVMValueRef result
= LLVMGetParam(ctx
->main_fn
,
304 ctx
->param_instance_id
);
306 /* The division must be done before START_INSTANCE is added. */
308 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
309 LLVMConstInt(ctx
->i32
, divisor
, 0), "");
311 return LLVMBuildAdd(gallivm
->builder
, result
,
312 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
315 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
317 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
319 unsigned double_index
)
321 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
322 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->gallivm
.context
);
323 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
324 LLVMVectorType(f64
, 2), "");
325 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
326 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
327 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
330 static void declare_input_vs(
331 struct si_shader_context
*ctx
,
332 unsigned input_index
,
333 const struct tgsi_full_declaration
*decl
,
336 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
340 unsigned num_fetches
;
341 unsigned fetch_stride
;
343 LLVMValueRef t_list_ptr
;
344 LLVMValueRef t_offset
;
346 LLVMValueRef vertex_index
;
347 LLVMValueRef input
[3];
349 /* Load the T list */
350 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
352 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
354 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
356 vertex_index
= LLVMGetParam(ctx
->main_fn
,
357 ctx
->param_vertex_index0
+
360 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
362 /* Do multiple loads for special formats. */
364 case SI_FIX_FETCH_RGB_64_FLOAT
:
365 num_fetches
= 3; /* 3 2-dword loads */
368 case SI_FIX_FETCH_RGBA_64_FLOAT
:
369 num_fetches
= 2; /* 2 4-dword loads */
372 case SI_FIX_FETCH_RGB_8
:
373 case SI_FIX_FETCH_RGB_8_INT
:
377 case SI_FIX_FETCH_RGB_16
:
378 case SI_FIX_FETCH_RGB_16_INT
:
387 for (unsigned i
= 0; i
< num_fetches
; i
++) {
388 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
390 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
391 vertex_index
, voffset
,
395 /* Break up the vec4 into individual components */
396 for (chan
= 0; chan
< 4; chan
++) {
397 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
398 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
399 input
[0], llvm_chan
, "");
403 case SI_FIX_FETCH_A2_SNORM
:
404 case SI_FIX_FETCH_A2_SSCALED
:
405 case SI_FIX_FETCH_A2_SINT
: {
406 /* The hardware returns an unsigned value; convert it to a
409 LLVMValueRef tmp
= out
[3];
410 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
412 /* First, recover the sign-extended signed integer value. */
413 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
414 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
416 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
418 /* For the integer-like cases, do a natural sign extension.
420 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
421 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
424 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
425 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
426 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
427 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
429 /* Convert back to the right type. */
430 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
432 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
433 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
434 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
435 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
436 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
437 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
443 case SI_FIX_FETCH_RGBA_32_UNORM
:
444 case SI_FIX_FETCH_RGBX_32_UNORM
:
445 for (chan
= 0; chan
< 4; chan
++) {
446 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
448 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
449 out
[chan
], ctx
->f32
, "");
450 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
451 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
453 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
454 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
455 out
[3] = LLVMConstReal(ctx
->f32
, 1);
457 case SI_FIX_FETCH_RGBA_32_SNORM
:
458 case SI_FIX_FETCH_RGBX_32_SNORM
:
459 case SI_FIX_FETCH_RGBA_32_FIXED
:
460 case SI_FIX_FETCH_RGBX_32_FIXED
: {
462 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
463 scale
= 1.0 / 0x10000;
465 scale
= 1.0 / INT_MAX
;
467 for (chan
= 0; chan
< 4; chan
++) {
468 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
470 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
471 out
[chan
], ctx
->f32
, "");
472 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
473 LLVMConstReal(ctx
->f32
, scale
), "");
475 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
476 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
477 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
478 out
[3] = LLVMConstReal(ctx
->f32
, 1);
481 case SI_FIX_FETCH_RGBA_32_USCALED
:
482 for (chan
= 0; chan
< 4; chan
++) {
483 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
485 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
486 out
[chan
], ctx
->f32
, "");
489 case SI_FIX_FETCH_RGBA_32_SSCALED
:
490 for (chan
= 0; chan
< 4; chan
++) {
491 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
493 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
494 out
[chan
], ctx
->f32
, "");
497 case SI_FIX_FETCH_RG_64_FLOAT
:
498 for (chan
= 0; chan
< 2; chan
++)
499 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
501 out
[2] = LLVMConstReal(ctx
->f32
, 0);
502 out
[3] = LLVMConstReal(ctx
->f32
, 1);
504 case SI_FIX_FETCH_RGB_64_FLOAT
:
505 for (chan
= 0; chan
< 3; chan
++)
506 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
508 out
[3] = LLVMConstReal(ctx
->f32
, 1);
510 case SI_FIX_FETCH_RGBA_64_FLOAT
:
511 for (chan
= 0; chan
< 4; chan
++) {
512 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
516 case SI_FIX_FETCH_RGB_8
:
517 case SI_FIX_FETCH_RGB_8_INT
:
518 case SI_FIX_FETCH_RGB_16
:
519 case SI_FIX_FETCH_RGB_16_INT
:
520 for (chan
= 0; chan
< 3; chan
++) {
521 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
525 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
526 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
527 out
[3] = LLVMConstReal(ctx
->f32
, 1);
529 out
[3] = LLVMBuildBitCast(gallivm
->builder
, ctx
->i32_1
,
536 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
539 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
545 case PIPE_SHADER_VERTEX
:
546 return LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_prim_id
);
548 case PIPE_SHADER_TESS_CTRL
:
549 return LLVMGetParam(ctx
->main_fn
,
550 ctx
->param_tcs_patch_id
);
551 case PIPE_SHADER_TESS_EVAL
:
552 return LLVMGetParam(ctx
->main_fn
,
553 ctx
->param_tes_patch_id
);
554 case PIPE_SHADER_GEOMETRY
:
555 return LLVMGetParam(ctx
->main_fn
,
556 ctx
->param_gs_prim_id
);
564 * Return the value of tgsi_ind_register for indexing.
565 * This is the indirect index with the constant offset added to it.
567 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
568 const struct tgsi_ind_register
*ind
,
571 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
574 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
575 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
576 result
= LLVMBuildAdd(gallivm
->builder
, result
,
577 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
582 * Like get_indirect_index, but restricts the return value to a (possibly
583 * undefined) value inside [0..num).
585 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
586 const struct tgsi_ind_register
*ind
,
587 int rel_index
, unsigned num
)
589 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
591 /* LLVM 3.8: If indirect resource indexing is used:
595 if (HAVE_LLVM
== 0x0308)
596 return LLVMGetUndef(ctx
->i32
);
598 return si_llvm_bound_index(ctx
, result
, num
);
603 * Calculate a dword address given an input or output register and a stride.
605 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
606 const struct tgsi_full_dst_register
*dst
,
607 const struct tgsi_full_src_register
*src
,
608 LLVMValueRef vertex_dw_stride
,
609 LLVMValueRef base_addr
)
611 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
612 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
613 ubyte
*name
, *index
, *array_first
;
615 struct tgsi_full_dst_register reg
;
617 /* Set the register description. The address computation is the same
618 * for sources and destinations. */
620 reg
.Register
.File
= src
->Register
.File
;
621 reg
.Register
.Index
= src
->Register
.Index
;
622 reg
.Register
.Indirect
= src
->Register
.Indirect
;
623 reg
.Register
.Dimension
= src
->Register
.Dimension
;
624 reg
.Indirect
= src
->Indirect
;
625 reg
.Dimension
= src
->Dimension
;
626 reg
.DimIndirect
= src
->DimIndirect
;
630 /* If the register is 2-dimensional (e.g. an array of vertices
631 * in a primitive), calculate the base address of the vertex. */
632 if (reg
.Register
.Dimension
) {
635 if (reg
.Dimension
.Indirect
)
636 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
637 reg
.Dimension
.Index
);
639 index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
641 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
642 LLVMBuildMul(gallivm
->builder
, index
,
643 vertex_dw_stride
, ""), "");
646 /* Get information about the register. */
647 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
648 name
= info
->input_semantic_name
;
649 index
= info
->input_semantic_index
;
650 array_first
= info
->input_array_first
;
651 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
652 name
= info
->output_semantic_name
;
653 index
= info
->output_semantic_index
;
654 array_first
= info
->output_array_first
;
660 if (reg
.Register
.Indirect
) {
661 /* Add the relative address of the element. */
662 LLVMValueRef ind_index
;
664 if (reg
.Indirect
.ArrayID
)
665 first
= array_first
[reg
.Indirect
.ArrayID
];
667 first
= reg
.Register
.Index
;
669 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
670 reg
.Register
.Index
- first
);
672 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
673 LLVMBuildMul(gallivm
->builder
, ind_index
,
674 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
676 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
678 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
679 index
[reg
.Register
.Index
]);
682 /* Add the base address of the element. */
683 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
684 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
687 /* The offchip buffer layout for TCS->TES is
689 * - attribute 0 of patch 0 vertex 0
690 * - attribute 0 of patch 0 vertex 1
691 * - attribute 0 of patch 0 vertex 2
693 * - attribute 0 of patch 1 vertex 0
694 * - attribute 0 of patch 1 vertex 1
696 * - attribute 1 of patch 0 vertex 0
697 * - attribute 1 of patch 0 vertex 1
699 * - per patch attribute 0 of patch 0
700 * - per patch attribute 0 of patch 1
703 * Note that every attribute has 4 components.
705 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
706 LLVMValueRef rel_patch_id
,
707 LLVMValueRef vertex_index
,
708 LLVMValueRef param_index
)
710 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
711 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
712 LLVMValueRef param_stride
, constant16
;
714 vertices_per_patch
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 9, 6);
715 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 9);
716 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
719 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
721 base_addr
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
722 vertices_per_patch
, "");
724 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
727 param_stride
= total_vertices
;
729 base_addr
= rel_patch_id
;
730 param_stride
= num_patches
;
733 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
734 LLVMBuildMul(gallivm
->builder
, param_index
,
735 param_stride
, ""), "");
737 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
740 LLVMValueRef patch_data_offset
=
741 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 16, 16);
743 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
744 patch_data_offset
, "");
749 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
750 struct si_shader_context
*ctx
,
751 const struct tgsi_full_dst_register
*dst
,
752 const struct tgsi_full_src_register
*src
)
754 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
755 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
756 ubyte
*name
, *index
, *array_first
;
757 struct tgsi_full_src_register reg
;
758 LLVMValueRef vertex_index
= NULL
;
759 LLVMValueRef param_index
= NULL
;
760 unsigned param_index_base
, param_base
;
762 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
764 if (reg
.Register
.Dimension
) {
766 if (reg
.Dimension
.Indirect
)
767 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
768 reg
.Dimension
.Index
);
770 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
773 /* Get information about the register. */
774 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
775 name
= info
->input_semantic_name
;
776 index
= info
->input_semantic_index
;
777 array_first
= info
->input_array_first
;
778 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
779 name
= info
->output_semantic_name
;
780 index
= info
->output_semantic_index
;
781 array_first
= info
->output_array_first
;
787 if (reg
.Register
.Indirect
) {
788 if (reg
.Indirect
.ArrayID
)
789 param_base
= array_first
[reg
.Indirect
.ArrayID
];
791 param_base
= reg
.Register
.Index
;
793 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
794 reg
.Register
.Index
- param_base
);
797 param_base
= reg
.Register
.Index
;
798 param_index
= ctx
->i32_0
;
801 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
804 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
805 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
808 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
809 vertex_index
, param_index
);
812 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
813 enum tgsi_opcode_type type
, unsigned swizzle
,
814 LLVMValueRef buffer
, LLVMValueRef offset
,
815 LLVMValueRef base
, bool readonly_memory
)
817 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
818 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
819 LLVMValueRef value
, value2
;
820 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
821 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
824 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
825 0, 1, 0, readonly_memory
);
827 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
830 if (!tgsi_type_is_64bit(type
)) {
831 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
832 0, 1, 0, readonly_memory
);
834 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
835 return LLVMBuildExtractElement(gallivm
->builder
, value
,
836 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
839 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
840 swizzle
* 4, 1, 0, readonly_memory
);
842 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
843 swizzle
* 4 + 4, 1, 0, readonly_memory
);
845 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
851 * \param type output value type
852 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
853 * \param dw_addr address in dwords
855 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
856 enum tgsi_opcode_type type
, unsigned swizzle
,
857 LLVMValueRef dw_addr
)
859 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
860 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
864 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
866 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
867 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
869 return lp_build_gather_values(gallivm
, values
,
873 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
874 LLVMConstInt(ctx
->i32
, swizzle
, 0));
876 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
877 if (tgsi_type_is_64bit(type
)) {
879 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
881 value2
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
882 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
885 return LLVMBuildBitCast(gallivm
->builder
, value
,
886 tgsi2llvmtype(bld_base
, type
), "");
892 * \param swizzle offset (typically 0..3)
893 * \param dw_addr address in dwords
894 * \param value value to store
896 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
897 unsigned swizzle
, LLVMValueRef dw_addr
,
900 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
901 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
903 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
904 LLVMConstInt(ctx
->i32
, swizzle
, 0));
906 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
907 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
911 static LLVMValueRef
fetch_input_tcs(
912 struct lp_build_tgsi_context
*bld_base
,
913 const struct tgsi_full_src_register
*reg
,
914 enum tgsi_opcode_type type
, unsigned swizzle
)
916 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
917 LLVMValueRef dw_addr
, stride
;
919 stride
= unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
920 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
921 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
923 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
926 static LLVMValueRef
fetch_output_tcs(
927 struct lp_build_tgsi_context
*bld_base
,
928 const struct tgsi_full_src_register
*reg
,
929 enum tgsi_opcode_type type
, unsigned swizzle
)
931 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
932 LLVMValueRef dw_addr
, stride
;
934 if (reg
->Register
.Dimension
) {
935 stride
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 8);
936 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
937 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
939 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
940 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
943 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
946 static LLVMValueRef
fetch_input_tes(
947 struct lp_build_tgsi_context
*bld_base
,
948 const struct tgsi_full_src_register
*reg
,
949 enum tgsi_opcode_type type
, unsigned swizzle
)
951 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
952 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
954 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
955 ctx
->param_rw_buffers
);
956 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
957 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
959 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
960 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
962 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
, true);
965 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
966 const struct tgsi_full_instruction
*inst
,
967 const struct tgsi_opcode_info
*info
,
970 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
971 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
972 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
973 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
975 LLVMValueRef dw_addr
, stride
;
976 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
977 LLVMValueRef values
[4];
979 bool is_tess_factor
= false;
981 /* Only handle per-patch and per-vertex outputs here.
982 * Vectors will be lowered to scalars and this function will be called again.
984 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
985 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
986 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
990 if (reg
->Register
.Dimension
) {
991 stride
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 8);
992 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
993 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
994 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
996 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
997 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
998 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1000 if (!reg
->Register
.Indirect
) {
1001 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1003 /* Always write tess factors into LDS for the TCS epilog. */
1004 if (name
== TGSI_SEMANTIC_TESSINNER
||
1005 name
== TGSI_SEMANTIC_TESSOUTER
) {
1006 skip_lds_store
= false;
1007 is_tess_factor
= true;
1012 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1013 ctx
->param_rw_buffers
);
1014 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
1015 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
1017 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1018 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1021 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1022 LLVMValueRef value
= dst
[chan_index
];
1024 if (inst
->Instruction
.Saturate
)
1025 value
= ac_build_clamp(&ctx
->ac
, value
);
1027 /* Skip LDS stores if there is no LDS read of this output. */
1028 if (!skip_lds_store
)
1029 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1031 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1032 values
[chan_index
] = value
;
1034 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1035 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1037 4 * chan_index
, 1, 0, true, false);
1041 if (inst
->Dst
[0].Register
.WriteMask
== 0xF && !is_tess_factor
) {
1042 LLVMValueRef value
= lp_build_gather_values(gallivm
,
1044 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1045 base
, 0, 1, 0, true, false);
1049 static LLVMValueRef
fetch_input_gs(
1050 struct lp_build_tgsi_context
*bld_base
,
1051 const struct tgsi_full_src_register
*reg
,
1052 enum tgsi_opcode_type type
,
1055 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1056 struct si_shader
*shader
= ctx
->shader
;
1057 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1058 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1059 LLVMValueRef vtx_offset
, soffset
;
1060 unsigned vtx_offset_param
;
1061 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1062 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1063 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1067 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1068 return get_primitive_id(bld_base
, swizzle
);
1070 if (!reg
->Register
.Dimension
)
1073 if (swizzle
== ~0) {
1074 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1076 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1077 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1079 return lp_build_gather_values(gallivm
, values
,
1083 /* Get the vertex offset parameter */
1084 vtx_offset_param
= reg
->Dimension
.Index
;
1085 if (vtx_offset_param
< 2) {
1086 vtx_offset_param
+= ctx
->param_gs_vtx0_offset
;
1088 assert(vtx_offset_param
< 6);
1089 vtx_offset_param
+= ctx
->param_gs_vtx2_offset
- 2;
1091 vtx_offset
= lp_build_mul_imm(uint
,
1092 LLVMGetParam(ctx
->main_fn
,
1096 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1097 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1099 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1100 vtx_offset
, soffset
, 0, 1, 0, true);
1101 if (tgsi_type_is_64bit(type
)) {
1102 LLVMValueRef value2
;
1103 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1105 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1106 ctx
->i32_0
, vtx_offset
, soffset
,
1108 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1111 return LLVMBuildBitCast(gallivm
->builder
,
1113 tgsi2llvmtype(bld_base
, type
), "");
1116 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1118 switch (interpolate
) {
1119 case TGSI_INTERPOLATE_CONSTANT
:
1122 case TGSI_INTERPOLATE_LINEAR
:
1123 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1124 return SI_PARAM_LINEAR_SAMPLE
;
1125 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1126 return SI_PARAM_LINEAR_CENTROID
;
1128 return SI_PARAM_LINEAR_CENTER
;
1130 case TGSI_INTERPOLATE_COLOR
:
1131 case TGSI_INTERPOLATE_PERSPECTIVE
:
1132 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1133 return SI_PARAM_PERSP_SAMPLE
;
1134 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1135 return SI_PARAM_PERSP_CENTROID
;
1137 return SI_PARAM_PERSP_CENTER
;
1140 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1146 * Interpolate a fragment shader input.
1148 * @param ctx context
1149 * @param input_index index of the input in hardware
1150 * @param semantic_name TGSI_SEMANTIC_*
1151 * @param semantic_index semantic index
1152 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1153 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1154 * @param interp_param interpolation weights (i,j)
1155 * @param prim_mask SI_PARAM_PRIM_MASK
1156 * @param face SI_PARAM_FRONT_FACE
1157 * @param result the return value (4 components)
1159 static void interp_fs_input(struct si_shader_context
*ctx
,
1160 unsigned input_index
,
1161 unsigned semantic_name
,
1162 unsigned semantic_index
,
1163 unsigned num_interp_inputs
,
1164 unsigned colors_read_mask
,
1165 LLVMValueRef interp_param
,
1166 LLVMValueRef prim_mask
,
1168 LLVMValueRef result
[4])
1170 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1171 LLVMValueRef attr_number
;
1176 /* fs.constant returns the param from the middle vertex, so it's not
1177 * really useful for flat shading. It's meant to be used for custom
1178 * interpolation (but the intrinsic can't fetch from the other two
1181 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1182 * to do the right thing. The only reason we use fs.constant is that
1183 * fs.interp cannot be used on integers, because they can be equal
1186 * When interp is false we will use fs.constant or for newer llvm,
1187 * amdgcn.interp.mov.
1189 bool interp
= interp_param
!= NULL
;
1191 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
1194 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1195 LLVMVectorType(ctx
->f32
, 2), "");
1197 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1199 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1203 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1204 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1205 LLVMValueRef is_face_positive
;
1206 LLVMValueRef back_attr_number
;
1208 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1209 * otherwise it's at offset "num_inputs".
1211 unsigned back_attr_offset
= num_interp_inputs
;
1212 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1213 back_attr_offset
+= 1;
1215 back_attr_number
= LLVMConstInt(ctx
->i32
, back_attr_offset
, 0);
1217 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1218 face
, ctx
->i32_0
, "");
1220 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1221 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1222 LLVMValueRef front
, back
;
1225 front
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1226 attr_number
, prim_mask
,
1228 back
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1229 back_attr_number
, prim_mask
,
1232 front
= ac_build_fs_interp_mov(&ctx
->ac
,
1233 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1234 llvm_chan
, attr_number
, prim_mask
);
1235 back
= ac_build_fs_interp_mov(&ctx
->ac
,
1236 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1237 llvm_chan
, back_attr_number
, prim_mask
);
1240 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1246 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1248 result
[0] = ac_build_fs_interp(&ctx
->ac
, ctx
->i32_0
,
1249 attr_number
, prim_mask
, i
, j
);
1251 result
[0] = ac_build_fs_interp_mov(&ctx
->ac
, ctx
->i32_0
,
1252 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1253 attr_number
, prim_mask
);
1256 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1257 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1259 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1260 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1263 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
1264 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1266 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
1267 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1268 llvm_chan
, attr_number
, prim_mask
);
1274 static void declare_input_fs(
1275 struct si_shader_context
*ctx
,
1276 unsigned input_index
,
1277 const struct tgsi_full_declaration
*decl
,
1278 LLVMValueRef out
[4])
1280 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1281 struct si_shader
*shader
= ctx
->shader
;
1282 LLVMValueRef main_fn
= ctx
->main_fn
;
1283 LLVMValueRef interp_param
= NULL
;
1284 int interp_param_idx
;
1286 /* Get colors from input VGPRs (set by the prolog). */
1287 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1288 unsigned i
= decl
->Semantic
.Index
;
1289 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1290 unsigned mask
= colors_read
>> (i
* 4);
1291 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1292 (i
? util_bitcount(colors_read
& 0xf) : 0);
1294 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1295 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1296 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1297 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1301 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1302 decl
->Interp
.Location
);
1303 if (interp_param_idx
== -1)
1305 else if (interp_param_idx
) {
1306 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1309 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1310 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1311 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1312 interp_param
= NULL
; /* load the constant color */
1314 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1315 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1316 shader
->selector
->info
.colors_read
, interp_param
,
1317 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1318 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1322 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1324 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1329 * Load a dword from a constant buffer.
1331 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1332 LLVMValueRef resource
,
1333 LLVMValueRef offset
)
1335 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1336 LLVMValueRef args
[2] = {resource
, offset
};
1338 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1339 LP_FUNC_ATTR_READNONE
|
1340 LP_FUNC_ATTR_LEGACY
);
1343 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1345 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1346 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1347 LLVMBuilderRef builder
= gallivm
->builder
;
1348 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1349 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1350 LLVMValueRef resource
= ac_build_indexed_load_const(&ctx
->ac
, desc
, buf_index
);
1352 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1353 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1354 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1356 LLVMValueRef pos
[4] = {
1357 buffer_load_const(ctx
, resource
, offset0
),
1358 buffer_load_const(ctx
, resource
, offset1
),
1359 LLVMConstReal(ctx
->f32
, 0),
1360 LLVMConstReal(ctx
->f32
, 0)
1363 return lp_build_gather_values(gallivm
, pos
, 4);
1366 static void declare_system_value(struct si_shader_context
*ctx
,
1368 const struct tgsi_full_declaration
*decl
)
1370 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1371 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1372 LLVMValueRef value
= 0;
1374 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1376 switch (decl
->Semantic
.Name
) {
1377 case TGSI_SEMANTIC_INSTANCEID
:
1378 value
= LLVMGetParam(ctx
->main_fn
,
1379 ctx
->param_instance_id
);
1382 case TGSI_SEMANTIC_VERTEXID
:
1383 value
= LLVMBuildAdd(gallivm
->builder
,
1384 LLVMGetParam(ctx
->main_fn
,
1385 ctx
->param_vertex_id
),
1386 LLVMGetParam(ctx
->main_fn
,
1387 ctx
->param_base_vertex
), "");
1390 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1391 /* Unused. Clarify the meaning in indexed vs. non-indexed
1392 * draws if this is ever used again. */
1396 case TGSI_SEMANTIC_BASEVERTEX
:
1398 /* For non-indexed draws, the base vertex set by the driver
1399 * (for direct draws) or the CP (for indirect draws) is the
1400 * first vertex ID, but GLSL expects 0 to be returned.
1402 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
1403 LLVMValueRef indexed
;
1405 indexed
= LLVMBuildLShr(gallivm
->builder
, vs_state
, ctx
->i32_1
, "");
1406 indexed
= LLVMBuildTrunc(gallivm
->builder
, indexed
, ctx
->i1
, "");
1408 value
= LLVMBuildSelect(gallivm
->builder
, indexed
,
1409 LLVMGetParam(ctx
->main_fn
, ctx
->param_base_vertex
),
1414 case TGSI_SEMANTIC_BASEINSTANCE
:
1415 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_start_instance
);
1418 case TGSI_SEMANTIC_DRAWID
:
1419 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_draw_id
);
1422 case TGSI_SEMANTIC_INVOCATIONID
:
1423 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1424 value
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
1425 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1426 value
= LLVMGetParam(ctx
->main_fn
,
1427 ctx
->param_gs_instance_id
);
1429 assert(!"INVOCATIONID not implemented");
1432 case TGSI_SEMANTIC_POSITION
:
1434 LLVMValueRef pos
[4] = {
1435 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1436 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1437 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1438 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
1439 LLVMGetParam(ctx
->main_fn
,
1440 SI_PARAM_POS_W_FLOAT
)),
1442 value
= lp_build_gather_values(gallivm
, pos
, 4);
1446 case TGSI_SEMANTIC_FACE
:
1447 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_FRONT_FACE
);
1450 case TGSI_SEMANTIC_SAMPLEID
:
1451 value
= get_sample_id(ctx
);
1454 case TGSI_SEMANTIC_SAMPLEPOS
: {
1455 LLVMValueRef pos
[4] = {
1456 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1457 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1458 LLVMConstReal(ctx
->f32
, 0),
1459 LLVMConstReal(ctx
->f32
, 0)
1461 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1462 TGSI_OPCODE_FRC
, pos
[0]);
1463 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1464 TGSI_OPCODE_FRC
, pos
[1]);
1465 value
= lp_build_gather_values(gallivm
, pos
, 4);
1469 case TGSI_SEMANTIC_SAMPLEMASK
:
1470 /* This can only occur with the OpenGL Core profile, which
1471 * doesn't support smoothing.
1473 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1476 case TGSI_SEMANTIC_TESSCOORD
:
1478 LLVMValueRef coord
[4] = {
1479 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1480 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1485 /* For triangles, the vector should be (u, v, 1-u-v). */
1486 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1487 PIPE_PRIM_TRIANGLES
)
1488 coord
[2] = lp_build_sub(bld
, bld
->one
,
1489 lp_build_add(bld
, coord
[0], coord
[1]));
1491 value
= lp_build_gather_values(gallivm
, coord
, 4);
1495 case TGSI_SEMANTIC_VERTICESIN
:
1496 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1497 value
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1498 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1499 value
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 9, 7);
1501 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1504 case TGSI_SEMANTIC_TESSINNER
:
1505 case TGSI_SEMANTIC_TESSOUTER
:
1507 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1508 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1510 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1511 ctx
->param_rw_buffers
);
1512 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
1513 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
1515 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1516 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1517 LLVMConstInt(ctx
->i32
, param
, 0));
1519 value
= buffer_load(&ctx
->bld_base
, TGSI_TYPE_FLOAT
,
1520 ~0, buffer
, base
, addr
, true);
1525 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1526 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1528 LLVMValueRef buf
, slot
, val
[4];
1531 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1532 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1533 buf
= ac_build_indexed_load_const(&ctx
->ac
, buf
, slot
);
1534 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1536 for (i
= 0; i
< 4; i
++)
1537 val
[i
] = buffer_load_const(ctx
, buf
,
1538 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1539 value
= lp_build_gather_values(gallivm
, val
, 4);
1543 case TGSI_SEMANTIC_PRIMID
:
1544 value
= get_primitive_id(&ctx
->bld_base
, 0);
1547 case TGSI_SEMANTIC_GRID_SIZE
:
1548 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_GRID_SIZE
);
1551 case TGSI_SEMANTIC_BLOCK_SIZE
:
1553 LLVMValueRef values
[3];
1555 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1557 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1558 unsigned sizes
[3] = {
1559 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1560 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1561 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1564 for (i
= 0; i
< 3; ++i
)
1565 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1567 value
= lp_build_gather_values(gallivm
, values
, 3);
1569 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1574 case TGSI_SEMANTIC_BLOCK_ID
:
1575 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_BLOCK_ID
);
1578 case TGSI_SEMANTIC_THREAD_ID
:
1579 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_THREAD_ID
);
1582 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1583 if (HAVE_LLVM
>= 0x0309) {
1584 value
= lp_build_intrinsic(gallivm
->builder
,
1585 "llvm.amdgcn.ps.live",
1587 LP_FUNC_ATTR_READNONE
);
1588 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1589 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1591 assert(!"TGSI_SEMANTIC_HELPER_INVOCATION unsupported");
1596 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
1597 value
= LLVMConstInt(ctx
->i32
, 64, 0);
1600 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
1601 value
= ac_get_thread_id(&ctx
->ac
);
1604 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
1606 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1607 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1608 value
= LLVMBuildShl(gallivm
->builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
1609 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1613 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
1614 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
1615 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
1616 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
1618 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1619 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
1620 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
1621 /* All bits set except LSB */
1622 value
= LLVMConstInt(ctx
->i64
, -2, 0);
1625 value
= LLVMConstInt(ctx
->i64
, -1, 0);
1627 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1628 value
= LLVMBuildShl(gallivm
->builder
, value
, id
, "");
1629 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
1630 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
1631 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1632 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1637 assert(!"unknown system value");
1641 ctx
->system_values
[index
] = value
;
1644 static void declare_compute_memory(struct si_shader_context
*ctx
,
1645 const struct tgsi_full_declaration
*decl
)
1647 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1648 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1650 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1653 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1654 assert(decl
->Range
.First
== decl
->Range
.Last
);
1655 assert(!ctx
->shared_memory
);
1657 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1658 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1661 LLVMSetAlignment(var
, 4);
1663 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1666 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1668 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1669 ctx
->param_const_buffers
);
1671 return ac_build_indexed_load_const(&ctx
->ac
, list_ptr
,
1672 LLVMConstInt(ctx
->i32
, i
, 0));
1675 static LLVMValueRef
fetch_constant(
1676 struct lp_build_tgsi_context
*bld_base
,
1677 const struct tgsi_full_src_register
*reg
,
1678 enum tgsi_opcode_type type
,
1681 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1682 struct lp_build_context
*base
= &bld_base
->base
;
1683 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1686 LLVMValueRef addr
, bufp
;
1687 LLVMValueRef result
;
1689 if (swizzle
== LP_CHAN_ALL
) {
1691 LLVMValueRef values
[4];
1692 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1693 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1695 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
1698 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1699 idx
= reg
->Register
.Index
* 4 + swizzle
;
1701 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1702 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_buffers
);
1704 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1705 reg
->Dimension
.Index
,
1706 SI_NUM_CONST_BUFFERS
);
1707 bufp
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, index
);
1709 bufp
= load_const_buffer_desc(ctx
, buf
);
1711 if (reg
->Register
.Indirect
) {
1712 addr
= ctx
->addrs
[ireg
->Index
][ireg
->Swizzle
];
1713 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1714 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1715 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1716 LLVMConstInt(ctx
->i32
, idx
* 4, 0));
1718 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1721 result
= buffer_load_const(ctx
, bufp
, addr
);
1723 if (!tgsi_type_is_64bit(type
))
1724 result
= bitcast(bld_base
, type
, result
);
1726 LLVMValueRef addr2
, result2
;
1728 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1729 LLVMConstInt(ctx
->i32
, 4, 0));
1730 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1732 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1738 /* Upper 16 bits must be zero. */
1739 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
1740 LLVMValueRef val
[2])
1742 return LLVMBuildOr(ctx
->gallivm
.builder
, val
[0],
1743 LLVMBuildShl(ctx
->gallivm
.builder
, val
[1],
1744 LLVMConstInt(ctx
->i32
, 16, 0),
1748 /* Upper 16 bits are ignored and will be dropped. */
1749 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
1750 LLVMValueRef val
[2])
1752 LLVMValueRef v
[2] = {
1753 LLVMBuildAnd(ctx
->gallivm
.builder
, val
[0],
1754 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
1757 return si_llvm_pack_two_int16(ctx
, v
);
1760 /* Initialize arguments for the shader export intrinsic */
1761 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1762 LLVMValueRef
*values
,
1764 struct ac_export_args
*args
)
1766 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1767 struct lp_build_context
*base
= &bld_base
->base
;
1768 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1769 LLVMValueRef val
[4];
1770 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1772 bool is_int8
, is_int10
;
1774 /* Default is 0xf. Adjusted below depending on the format. */
1775 args
->enabled_channels
= 0xf; /* writemask */
1777 /* Specify whether the EXEC mask represents the valid mask */
1778 args
->valid_mask
= 0;
1780 /* Specify whether this is the last export */
1783 /* Specify the target we are exporting */
1784 args
->target
= target
;
1786 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1787 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1788 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1789 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1791 assert(cbuf
>= 0 && cbuf
< 8);
1792 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1793 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1794 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
1797 args
->compr
= false;
1798 args
->out
[0] = base
->undef
;
1799 args
->out
[1] = base
->undef
;
1800 args
->out
[2] = base
->undef
;
1801 args
->out
[3] = base
->undef
;
1803 switch (spi_shader_col_format
) {
1804 case V_028714_SPI_SHADER_ZERO
:
1805 args
->enabled_channels
= 0; /* writemask */
1806 args
->target
= V_008DFC_SQ_EXP_NULL
;
1809 case V_028714_SPI_SHADER_32_R
:
1810 args
->enabled_channels
= 1; /* writemask */
1811 args
->out
[0] = values
[0];
1814 case V_028714_SPI_SHADER_32_GR
:
1815 args
->enabled_channels
= 0x3; /* writemask */
1816 args
->out
[0] = values
[0];
1817 args
->out
[1] = values
[1];
1820 case V_028714_SPI_SHADER_32_AR
:
1821 args
->enabled_channels
= 0x9; /* writemask */
1822 args
->out
[0] = values
[0];
1823 args
->out
[3] = values
[3];
1826 case V_028714_SPI_SHADER_FP16_ABGR
:
1827 args
->compr
= 1; /* COMPR flag */
1829 for (chan
= 0; chan
< 2; chan
++) {
1830 LLVMValueRef pack_args
[2] = {
1832 values
[2 * chan
+ 1]
1834 LLVMValueRef packed
;
1836 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
1838 LLVMBuildBitCast(ctx
->gallivm
.builder
,
1839 packed
, ctx
->f32
, "");
1843 case V_028714_SPI_SHADER_UNORM16_ABGR
:
1844 for (chan
= 0; chan
< 4; chan
++) {
1845 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
1846 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1847 LLVMConstReal(ctx
->f32
, 65535), "");
1848 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1849 LLVMConstReal(ctx
->f32
, 0.5), "");
1850 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
1854 args
->compr
= 1; /* COMPR flag */
1855 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1856 si_llvm_pack_two_int16(ctx
, val
));
1857 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1858 si_llvm_pack_two_int16(ctx
, val
+2));
1861 case V_028714_SPI_SHADER_SNORM16_ABGR
:
1862 for (chan
= 0; chan
< 4; chan
++) {
1863 /* Clamp between [-1, 1]. */
1864 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
1866 LLVMConstReal(ctx
->f32
, 1));
1867 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
1869 LLVMConstReal(ctx
->f32
, -1));
1870 /* Convert to a signed integer in [-32767, 32767]. */
1871 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1872 LLVMConstReal(ctx
->f32
, 32767), "");
1873 /* If positive, add 0.5, else add -0.5. */
1874 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1875 LLVMBuildSelect(builder
,
1876 LLVMBuildFCmp(builder
, LLVMRealOGE
,
1877 val
[chan
], base
->zero
, ""),
1878 LLVMConstReal(ctx
->f32
, 0.5),
1879 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
1880 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
1883 args
->compr
= 1; /* COMPR flag */
1884 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1885 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1886 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1887 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1890 case V_028714_SPI_SHADER_UINT16_ABGR
: {
1891 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1892 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
1893 LLVMValueRef max_alpha
=
1894 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
1897 for (chan
= 0; chan
< 4; chan
++) {
1898 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1899 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
1901 chan
== 3 ? max_alpha
: max_rgb
);
1904 args
->compr
= 1; /* COMPR flag */
1905 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1906 si_llvm_pack_two_int16(ctx
, val
));
1907 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1908 si_llvm_pack_two_int16(ctx
, val
+2));
1912 case V_028714_SPI_SHADER_SINT16_ABGR
: {
1913 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1914 is_int8
? 127 : is_int10
? 511 : 32767, 0);
1915 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
1916 is_int8
? -128 : is_int10
? -512 : -32768, 0);
1917 LLVMValueRef max_alpha
=
1918 !is_int10
? max_rgb
: ctx
->i32_1
;
1919 LLVMValueRef min_alpha
=
1920 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
1923 for (chan
= 0; chan
< 4; chan
++) {
1924 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1925 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1927 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
1928 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1930 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
1933 args
->compr
= 1; /* COMPR flag */
1934 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1935 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1936 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1937 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1941 case V_028714_SPI_SHADER_32_ABGR
:
1942 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
1947 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
1950 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1952 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
1953 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
1954 SI_PARAM_ALPHA_REF
);
1956 LLVMValueRef alpha_pass
=
1957 lp_build_cmp(&bld_base
->base
,
1958 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
1961 lp_build_select(&bld_base
->base
,
1963 LLVMConstReal(ctx
->f32
, 1.0f
),
1964 LLVMConstReal(ctx
->f32
, -1.0f
));
1966 ac_build_kill(&ctx
->ac
, arg
);
1968 ac_build_kill(&ctx
->ac
, NULL
);
1972 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
1974 unsigned samplemask_param
)
1976 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1977 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1978 LLVMValueRef coverage
;
1980 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
1981 coverage
= LLVMGetParam(ctx
->main_fn
,
1983 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
1985 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
1987 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
1989 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
1992 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
1993 LLVMConstReal(ctx
->f32
,
1994 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
1996 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
1999 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2000 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2002 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2003 struct lp_build_context
*base
= &bld_base
->base
;
2006 unsigned const_chan
;
2007 LLVMValueRef base_elt
;
2008 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2009 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2010 SI_VS_CONST_CLIP_PLANES
, 0);
2011 LLVMValueRef const_resource
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, constbuf_index
);
2013 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2014 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2019 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2021 /* Compute dot products of position and user clip plane vectors */
2022 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2023 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2025 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2026 const_chan
) * 4, 0);
2027 base_elt
= buffer_load_const(ctx
, const_resource
,
2030 lp_build_add(base
, args
->out
[chan
],
2031 lp_build_mul(base
, base_elt
,
2032 out_elts
[const_chan
]));
2036 args
->enabled_channels
= 0xf;
2037 args
->valid_mask
= 0;
2039 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2044 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2048 if (so
->num_outputs
)
2049 fprintf(stderr
, "STREAMOUT\n");
2051 for (i
= 0; i
< so
->num_outputs
; i
++) {
2052 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2053 so
->output
[i
].start_component
;
2054 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2055 i
, so
->output
[i
].output_buffer
,
2056 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2057 so
->output
[i
].register_index
,
2058 mask
& 1 ? "x" : "",
2059 mask
& 2 ? "y" : "",
2060 mask
& 4 ? "z" : "",
2061 mask
& 8 ? "w" : "");
2065 static void emit_streamout_output(struct si_shader_context
*ctx
,
2066 LLVMValueRef
const *so_buffers
,
2067 LLVMValueRef
const *so_write_offsets
,
2068 struct pipe_stream_output
*stream_out
,
2069 struct si_shader_output_values
*shader_out
)
2071 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2072 LLVMBuilderRef builder
= gallivm
->builder
;
2073 unsigned buf_idx
= stream_out
->output_buffer
;
2074 unsigned start
= stream_out
->start_component
;
2075 unsigned num_comps
= stream_out
->num_components
;
2076 LLVMValueRef out
[4];
2078 assert(num_comps
&& num_comps
<= 4);
2079 if (!num_comps
|| num_comps
> 4)
2082 /* Load the output as int. */
2083 for (int j
= 0; j
< num_comps
; j
++) {
2084 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2086 out
[j
] = LLVMBuildBitCast(builder
,
2087 shader_out
->values
[start
+ j
],
2091 /* Pack the output. */
2092 LLVMValueRef vdata
= NULL
;
2094 switch (num_comps
) {
2095 case 1: /* as i32 */
2098 case 2: /* as v2i32 */
2099 case 3: /* as v4i32 (aligned to 4) */
2100 case 4: /* as v4i32 */
2101 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2102 for (int j
= 0; j
< num_comps
; j
++) {
2103 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2104 LLVMConstInt(ctx
->i32
, j
, 0), "");
2109 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2111 so_write_offsets
[buf_idx
],
2113 stream_out
->dst_offset
* 4, 1, 1, true, false);
2117 * Write streamout data to buffers for vertex stream @p stream (different
2118 * vertex streams can occur for GS copy shaders).
2120 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2121 struct si_shader_output_values
*outputs
,
2122 unsigned noutput
, unsigned stream
)
2124 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2125 struct pipe_stream_output_info
*so
= &sel
->so
;
2126 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2127 LLVMBuilderRef builder
= gallivm
->builder
;
2129 struct lp_build_if_state if_ctx
;
2131 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2132 LLVMValueRef so_vtx_count
=
2133 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2135 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2137 /* can_emit = tid < so_vtx_count; */
2138 LLVMValueRef can_emit
=
2139 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2141 /* Emit the streamout code conditionally. This actually avoids
2142 * out-of-bounds buffer access. The hw tells us via the SGPR
2143 * (so_vtx_count) which threads are allowed to emit streamout data. */
2144 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2146 /* The buffer offset is computed as follows:
2147 * ByteOffset = streamout_offset[buffer_id]*4 +
2148 * (streamout_write_index + thread_id)*stride[buffer_id] +
2152 LLVMValueRef so_write_index
=
2153 LLVMGetParam(ctx
->main_fn
,
2154 ctx
->param_streamout_write_index
);
2156 /* Compute (streamout_write_index + thread_id). */
2157 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2159 /* Load the descriptor and compute the write offset for each
2160 * enabled buffer. */
2161 LLVMValueRef so_write_offset
[4] = {};
2162 LLVMValueRef so_buffers
[4];
2163 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2164 ctx
->param_rw_buffers
);
2166 for (i
= 0; i
< 4; i
++) {
2170 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2171 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2173 so_buffers
[i
] = ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
2175 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2176 ctx
->param_streamout_offset
[i
]);
2177 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2179 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2180 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2181 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2184 /* Write streamout data. */
2185 for (i
= 0; i
< so
->num_outputs
; i
++) {
2186 unsigned reg
= so
->output
[i
].register_index
;
2191 if (stream
!= so
->output
[i
].stream
)
2194 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2195 &so
->output
[i
], &outputs
[reg
]);
2198 lp_build_endif(&if_ctx
);
2202 /* Generate export instructions for hardware VS shader stage */
2203 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2204 struct si_shader_output_values
*outputs
,
2207 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2208 struct si_shader
*shader
= ctx
->shader
;
2209 struct lp_build_context
*base
= &bld_base
->base
;
2210 struct ac_export_args args
, pos_args
[4] = {};
2211 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2212 unsigned semantic_name
, semantic_index
;
2214 unsigned param_count
= 0;
2218 for (i
= 0; i
< noutput
; i
++) {
2219 semantic_name
= outputs
[i
].semantic_name
;
2220 semantic_index
= outputs
[i
].semantic_index
;
2221 bool export_param
= true;
2223 switch (semantic_name
) {
2224 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2225 case TGSI_SEMANTIC_PSIZE
:
2226 case TGSI_SEMANTIC_CLIPVERTEX
:
2227 case TGSI_SEMANTIC_EDGEFLAG
:
2229 case TGSI_SEMANTIC_GENERIC
:
2230 case TGSI_SEMANTIC_CLIPDIST
:
2231 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2232 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2233 export_param
= false;
2236 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2237 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2238 export_param
= false;
2242 if (outputs
[i
].vertex_stream
[0] != 0 &&
2243 outputs
[i
].vertex_stream
[1] != 0 &&
2244 outputs
[i
].vertex_stream
[2] != 0 &&
2245 outputs
[i
].vertex_stream
[3] != 0)
2246 export_param
= false;
2249 /* Select the correct target */
2250 switch(semantic_name
) {
2251 case TGSI_SEMANTIC_PSIZE
:
2252 psize_value
= outputs
[i
].values
[0];
2254 case TGSI_SEMANTIC_EDGEFLAG
:
2255 edgeflag_value
= outputs
[i
].values
[0];
2257 case TGSI_SEMANTIC_LAYER
:
2258 layer_value
= outputs
[i
].values
[0];
2259 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2260 goto handle_semantic
;
2261 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2262 viewport_index_value
= outputs
[i
].values
[0];
2263 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2264 goto handle_semantic
;
2265 case TGSI_SEMANTIC_POSITION
:
2266 target
= V_008DFC_SQ_EXP_POS
;
2268 case TGSI_SEMANTIC_CLIPDIST
:
2269 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2270 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2271 goto handle_semantic
;
2273 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2275 case TGSI_SEMANTIC_CLIPVERTEX
:
2276 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2278 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2280 case TGSI_SEMANTIC_COLOR
:
2281 case TGSI_SEMANTIC_BCOLOR
:
2282 case TGSI_SEMANTIC_PRIMID
:
2283 case TGSI_SEMANTIC_FOG
:
2284 case TGSI_SEMANTIC_TEXCOORD
:
2285 case TGSI_SEMANTIC_GENERIC
:
2288 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2289 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2290 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2296 "Warning: SI unhandled vs output type:%d\n",
2300 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, &args
);
2302 if (target
>= V_008DFC_SQ_EXP_POS
&&
2303 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2304 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2305 &args
, sizeof(args
));
2307 ac_build_export(&ctx
->ac
, &args
);
2310 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2311 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2312 goto handle_semantic
;
2316 shader
->info
.nr_param_exports
= param_count
;
2318 /* We need to add the position output manually if it's missing. */
2319 if (!pos_args
[0].out
[0]) {
2320 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2321 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2322 pos_args
[0].done
= 0; /* last export? */
2323 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2324 pos_args
[0].compr
= 0; /* COMPR flag */
2325 pos_args
[0].out
[0] = base
->zero
; /* X */
2326 pos_args
[0].out
[1] = base
->zero
; /* Y */
2327 pos_args
[0].out
[2] = base
->zero
; /* Z */
2328 pos_args
[0].out
[3] = base
->one
; /* W */
2331 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2332 if (shader
->selector
->info
.writes_psize
||
2333 shader
->selector
->info
.writes_edgeflag
||
2334 shader
->selector
->info
.writes_viewport_index
||
2335 shader
->selector
->info
.writes_layer
) {
2336 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2337 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2338 (shader
->selector
->info
.writes_layer
<< 2) |
2339 (shader
->selector
->info
.writes_viewport_index
<< 3);
2340 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2341 pos_args
[1].done
= 0; /* last export? */
2342 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2343 pos_args
[1].compr
= 0; /* COMPR flag */
2344 pos_args
[1].out
[0] = base
->zero
; /* X */
2345 pos_args
[1].out
[1] = base
->zero
; /* Y */
2346 pos_args
[1].out
[2] = base
->zero
; /* Z */
2347 pos_args
[1].out
[3] = base
->zero
; /* W */
2349 if (shader
->selector
->info
.writes_psize
)
2350 pos_args
[1].out
[0] = psize_value
;
2352 if (shader
->selector
->info
.writes_edgeflag
) {
2353 /* The output is a float, but the hw expects an integer
2354 * with the first bit containing the edge flag. */
2355 edgeflag_value
= LLVMBuildFPToUI(ctx
->gallivm
.builder
,
2358 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2362 /* The LLVM intrinsic expects a float. */
2363 pos_args
[1].out
[1] = LLVMBuildBitCast(ctx
->gallivm
.builder
,
2368 if (shader
->selector
->info
.writes_layer
)
2369 pos_args
[1].out
[2] = layer_value
;
2371 if (shader
->selector
->info
.writes_viewport_index
)
2372 pos_args
[1].out
[3] = viewport_index_value
;
2375 for (i
= 0; i
< 4; i
++)
2376 if (pos_args
[i
].out
[0])
2377 shader
->info
.nr_pos_exports
++;
2380 for (i
= 0; i
< 4; i
++) {
2381 if (!pos_args
[i
].out
[0])
2384 /* Specify the target we are exporting */
2385 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2387 if (pos_idx
== shader
->info
.nr_pos_exports
)
2388 /* Specify that this is the last export */
2389 pos_args
[i
].done
= 1;
2391 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2396 * Forward all outputs from the vertex shader to the TES. This is only used
2397 * for the fixed function TCS.
2399 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2401 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2402 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2403 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2404 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2407 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2409 rw_buffers
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2410 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2411 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
2413 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2415 lds_vertex_stride
= unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
2416 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2417 lds_vertex_stride
, "");
2418 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2419 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2421 inputs
= ctx
->shader
->key
.mono
.ff_tcs_inputs_to_copy
;
2423 unsigned i
= u_bit_scan64(&inputs
);
2425 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2426 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2429 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2430 get_rel_patch_id(ctx
),
2432 LLVMConstInt(ctx
->i32
, i
, 0));
2434 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2437 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2438 buffer_offset
, 0, 1, 0, true, false);
2442 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2443 LLVMValueRef rel_patch_id
,
2444 LLVMValueRef invocation_id
,
2445 LLVMValueRef tcs_out_current_patch_data_offset
)
2447 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2448 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2449 struct si_shader
*shader
= ctx
->shader
;
2450 unsigned tess_inner_index
, tess_outer_index
;
2451 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2452 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
, inner
[4], outer
[4];
2453 unsigned stride
, outer_comps
, inner_comps
, i
;
2454 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2456 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2458 /* Do this only for invocation 0, because the tess levels are per-patch,
2461 * This can't jump, because invocation 0 executes this. It should
2462 * at least mask out the loads and stores for other invocations.
2464 lp_build_if(&if_ctx
, gallivm
,
2465 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2466 invocation_id
, ctx
->i32_0
, ""));
2468 /* Determine the layout of one tess factor element in the buffer. */
2469 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2470 case PIPE_PRIM_LINES
:
2471 stride
= 2; /* 2 dwords, 1 vec2 store */
2475 case PIPE_PRIM_TRIANGLES
:
2476 stride
= 4; /* 4 dwords, 1 vec4 store */
2480 case PIPE_PRIM_QUADS
:
2481 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2490 /* Load tess_inner and tess_outer from LDS.
2491 * Any invocation can write them, so we can't get them from a temporary.
2493 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2494 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2496 lds_base
= tcs_out_current_patch_data_offset
;
2497 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2498 LLVMConstInt(ctx
->i32
,
2499 tess_inner_index
* 4, 0), "");
2500 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2501 LLVMConstInt(ctx
->i32
,
2502 tess_outer_index
* 4, 0), "");
2504 for (i
= 0; i
< 4; i
++) {
2505 inner
[i
] = LLVMGetUndef(ctx
->i32
);
2506 outer
[i
] = LLVMGetUndef(ctx
->i32
);
2509 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2510 /* For isolines, the hardware expects tess factors in the
2511 * reverse order from what GLSL / TGSI specify.
2513 outer
[0] = out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2514 outer
[1] = out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2516 for (i
= 0; i
< outer_comps
; i
++) {
2518 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2520 for (i
= 0; i
< inner_comps
; i
++) {
2521 inner
[i
] = out
[outer_comps
+i
] =
2522 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2526 /* Convert the outputs to vectors for stores. */
2527 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2531 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2533 /* Get the buffer. */
2534 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2535 ctx
->param_rw_buffers
);
2536 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2537 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_FACTOR
, 0));
2539 /* Get the offset. */
2540 tf_base
= LLVMGetParam(ctx
->main_fn
,
2541 ctx
->param_tcs_factor_offset
);
2542 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2543 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
2545 lp_build_if(&inner_if_ctx
, gallivm
,
2546 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2547 rel_patch_id
, ctx
->i32_0
, ""));
2549 /* Store the dynamic HS control word. */
2550 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
2551 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
2552 1, ctx
->i32_0
, tf_base
,
2553 0, 1, 0, true, false);
2555 lp_build_endif(&inner_if_ctx
);
2557 /* Store the tessellation factors. */
2558 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
2559 MIN2(stride
, 4), byteoffset
, tf_base
,
2560 4, 1, 0, true, false);
2562 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
2563 stride
- 4, byteoffset
, tf_base
,
2564 20, 1, 0, true, false);
2566 /* Store the tess factors into the offchip buffer if TES reads them. */
2567 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
2568 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
2569 LLVMValueRef tf_inner_offset
;
2570 unsigned param_outer
, param_inner
;
2572 buf
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2573 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
2574 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2576 param_outer
= si_shader_io_get_unique_index(
2577 TGSI_SEMANTIC_TESSOUTER
, 0);
2578 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2579 LLVMConstInt(ctx
->i32
, param_outer
, 0));
2581 outer_vec
= lp_build_gather_values(gallivm
, outer
,
2582 util_next_power_of_two(outer_comps
));
2584 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
2585 outer_comps
, tf_outer_offset
,
2586 base
, 0, 1, 0, true, false);
2588 param_inner
= si_shader_io_get_unique_index(
2589 TGSI_SEMANTIC_TESSINNER
, 0);
2590 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2591 LLVMConstInt(ctx
->i32
, param_inner
, 0));
2593 inner_vec
= inner_comps
== 1 ? inner
[0] :
2594 lp_build_gather_values(gallivm
, inner
, inner_comps
);
2595 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
2596 inner_comps
, tf_inner_offset
,
2597 base
, 0, 1, 0, true, false);
2601 lp_build_endif(&if_ctx
);
2604 /* This only writes the tessellation factor levels. */
2605 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2607 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2608 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2609 LLVMValueRef offchip_soffset
, offchip_layout
;
2611 si_copy_tcs_inputs(bld_base
);
2613 rel_patch_id
= get_rel_patch_id(ctx
);
2614 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2615 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2617 /* Return epilog parameters from this function. */
2618 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
2619 LLVMValueRef ret
= ctx
->return_value
;
2620 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2623 /* RW_BUFFERS pointer */
2624 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2625 ctx
->param_rw_buffers
);
2626 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2627 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2628 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2630 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2632 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2633 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2635 /* Tess offchip and factor buffer soffset are after user SGPRs. */
2636 offchip_layout
= LLVMGetParam(ctx
->main_fn
,
2637 ctx
->param_tcs_offchip_layout
);
2638 offchip_soffset
= LLVMGetParam(ctx
->main_fn
,
2639 ctx
->param_tcs_offchip_offset
);
2640 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2641 ctx
->param_tcs_factor_offset
);
2642 ret
= LLVMBuildInsertValue(builder
, ret
, offchip_layout
,
2643 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
, "");
2644 ret
= LLVMBuildInsertValue(builder
, ret
, offchip_soffset
,
2645 GFX6_TCS_NUM_USER_SGPR
, "");
2646 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2647 GFX6_TCS_NUM_USER_SGPR
+ 1, "");
2650 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2651 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2652 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2654 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
2655 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2656 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2657 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2658 ctx
->return_value
= ret
;
2661 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2663 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2664 struct si_shader
*shader
= ctx
->shader
;
2665 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2666 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2668 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2669 ctx
->param_rel_auto_id
);
2670 LLVMValueRef vertex_dw_stride
=
2671 unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
2672 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2673 vertex_dw_stride
, "");
2675 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2676 * its inputs from it. */
2677 for (i
= 0; i
< info
->num_outputs
; i
++) {
2678 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2679 unsigned name
= info
->output_semantic_name
[i
];
2680 unsigned index
= info
->output_semantic_index
[i
];
2682 /* The ARB_shader_viewport_layer_array spec contains the
2685 * 2) What happens if gl_ViewportIndex or gl_Layer is
2686 * written in the vertex shader and a geometry shader is
2689 * RESOLVED: The value written by the last vertex processing
2690 * stage is used. If the last vertex processing stage
2691 * (vertex, tessellation evaluation or geometry) does not
2692 * statically assign to gl_ViewportIndex or gl_Layer, index
2693 * or layer zero is assumed.
2695 * So writes to those outputs in VS-as-LS are simply ignored.
2697 if (name
== TGSI_SEMANTIC_LAYER
||
2698 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
2701 int param
= si_shader_io_get_unique_index(name
, index
);
2702 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2703 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
2705 for (chan
= 0; chan
< 4; chan
++) {
2706 lds_store(bld_base
, chan
, dw_addr
,
2707 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2712 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2714 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2715 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2716 struct si_shader
*es
= ctx
->shader
;
2717 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2718 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2719 ctx
->param_es2gs_offset
);
2723 for (i
= 0; i
< info
->num_outputs
; i
++) {
2724 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2727 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2728 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2731 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2732 info
->output_semantic_index
[i
]);
2734 for (chan
= 0; chan
< 4; chan
++) {
2735 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2736 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2738 ac_build_buffer_store_dword(&ctx
->ac
,
2740 out_val
, 1, NULL
, soffset
,
2741 (4 * param_index
+ chan
) * 4,
2747 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2749 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2751 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
2752 LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
));
2755 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2757 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2758 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2759 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2760 struct si_shader_output_values
*outputs
= NULL
;
2763 assert(!ctx
->shader
->is_gs_copy_shader
);
2765 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2767 /* Vertex color clamping.
2769 * This uses a state constant loaded in a user data SGPR and
2770 * an IF statement is added that clamps all colors if the constant
2773 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2774 struct lp_build_if_state if_ctx
;
2775 LLVMValueRef cond
= NULL
;
2776 LLVMValueRef addr
, val
;
2778 for (i
= 0; i
< info
->num_outputs
; i
++) {
2779 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2780 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2783 /* We've found a color. */
2785 /* The state is in the first bit of the user SGPR. */
2786 cond
= LLVMGetParam(ctx
->main_fn
,
2787 ctx
->param_vs_state_bits
);
2788 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2790 lp_build_if(&if_ctx
, gallivm
, cond
);
2793 for (j
= 0; j
< 4; j
++) {
2794 addr
= ctx
->outputs
[i
][j
];
2795 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2796 val
= ac_build_clamp(&ctx
->ac
, val
);
2797 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2802 lp_build_endif(&if_ctx
);
2805 for (i
= 0; i
< info
->num_outputs
; i
++) {
2806 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
2807 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
2809 for (j
= 0; j
< 4; j
++) {
2810 outputs
[i
].values
[j
] =
2811 LLVMBuildLoad(gallivm
->builder
,
2814 outputs
[i
].vertex_stream
[j
] =
2815 (info
->output_streams
[i
] >> (2 * j
)) & 3;
2820 /* Return the primitive ID from the LLVM function. */
2822 LLVMBuildInsertValue(gallivm
->builder
,
2824 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2825 get_primitive_id(bld_base
, 0)),
2826 VS_EPILOG_PRIMID_LOC
, "");
2828 if (ctx
->shader
->selector
->so
.num_outputs
)
2829 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
2830 si_llvm_export_vs(bld_base
, outputs
, i
);
2834 struct si_ps_exports
{
2836 struct ac_export_args args
[10];
2839 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2840 bool writes_samplemask
)
2843 /* Z needs 32 bits. */
2844 if (writes_samplemask
)
2845 return V_028710_SPI_SHADER_32_ABGR
;
2846 else if (writes_stencil
)
2847 return V_028710_SPI_SHADER_32_GR
;
2849 return V_028710_SPI_SHADER_32_R
;
2850 } else if (writes_stencil
|| writes_samplemask
) {
2851 /* Both stencil and sample mask need only 16 bits. */
2852 return V_028710_SPI_SHADER_UINT16_ABGR
;
2854 return V_028710_SPI_SHADER_ZERO
;
2858 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
2859 LLVMValueRef depth
, LLVMValueRef stencil
,
2860 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
2862 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2863 struct lp_build_context
*base
= &bld_base
->base
;
2864 struct ac_export_args args
;
2866 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
2868 samplemask
!= NULL
);
2870 assert(depth
|| stencil
|| samplemask
);
2872 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
2873 args
.done
= 1; /* DONE bit */
2875 /* Specify the target we are exporting */
2876 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
2878 args
.compr
= 0; /* COMP flag */
2879 args
.out
[0] = base
->undef
; /* R, depth */
2880 args
.out
[1] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
2881 args
.out
[2] = base
->undef
; /* B, sample mask */
2882 args
.out
[3] = base
->undef
; /* A, alpha to mask */
2884 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
2886 args
.compr
= 1; /* COMPR flag */
2889 /* Stencil should be in X[23:16]. */
2890 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
2891 stencil
= LLVMBuildShl(ctx
->gallivm
.builder
, stencil
,
2892 LLVMConstInt(ctx
->i32
, 16, 0), "");
2893 args
.out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
2897 /* SampleMask should be in Y[15:0]. */
2898 args
.out
[1] = samplemask
;
2903 args
.out
[0] = depth
;
2907 args
.out
[1] = stencil
;
2911 args
.out
[2] = samplemask
;
2916 /* SI (except OLAND and HAINAN) has a bug that it only looks
2917 * at the X writemask component. */
2918 if (ctx
->screen
->b
.chip_class
== SI
&&
2919 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
2920 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
2923 /* Specify which components to enable */
2924 args
.enabled_channels
= mask
;
2926 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
2929 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
2930 LLVMValueRef
*color
, unsigned index
,
2931 unsigned samplemask_param
,
2932 bool is_last
, struct si_ps_exports
*exp
)
2934 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2935 struct lp_build_context
*base
= &bld_base
->base
;
2939 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
2940 for (i
= 0; i
< 4; i
++)
2941 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
2944 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
2945 color
[3] = base
->one
;
2949 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
2950 si_alpha_test(bld_base
, color
[3]);
2952 /* Line & polygon smoothing */
2953 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
2954 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
2957 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
2958 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
2959 struct ac_export_args args
[8];
2962 /* Get the export arguments, also find out what the last one is. */
2963 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2964 si_llvm_init_export_args(bld_base
, color
,
2965 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
2966 if (args
[c
].enabled_channels
)
2970 /* Emit all exports. */
2971 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2972 if (is_last
&& last
== c
) {
2973 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
2974 args
[c
].done
= 1; /* DONE bit */
2975 } else if (!args
[c
].enabled_channels
)
2976 continue; /* unnecessary NULL export */
2978 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
2981 struct ac_export_args args
;
2984 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
2987 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
2988 args
.done
= 1; /* DONE bit */
2989 } else if (!args
.enabled_channels
)
2990 return; /* unnecessary NULL export */
2992 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
2996 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
2997 struct si_ps_exports
*exp
)
2999 for (unsigned i
= 0; i
< exp
->num
; i
++)
3000 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3003 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3005 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3006 struct lp_build_context
*base
= &bld_base
->base
;
3007 struct ac_export_args args
;
3009 args
.enabled_channels
= 0x0; /* enabled channels */
3010 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3011 args
.done
= 1; /* DONE bit */
3012 args
.target
= V_008DFC_SQ_EXP_NULL
;
3013 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3014 args
.out
[0] = base
->undef
; /* R */
3015 args
.out
[1] = base
->undef
; /* G */
3016 args
.out
[2] = base
->undef
; /* B */
3017 args
.out
[3] = base
->undef
; /* A */
3019 ac_build_export(&ctx
->ac
, &args
);
3023 * Return PS outputs in this order:
3025 * v[0:3] = color0.xyzw
3026 * v[4:7] = color1.xyzw
3031 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3033 * The alpha-ref SGPR is returned via its original location.
3035 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3037 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3038 struct si_shader
*shader
= ctx
->shader
;
3039 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3040 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3041 unsigned i
, j
, first_vgpr
, vgpr
;
3043 LLVMValueRef color
[8][4] = {};
3044 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3047 /* Read the output values. */
3048 for (i
= 0; i
< info
->num_outputs
; i
++) {
3049 unsigned semantic_name
= info
->output_semantic_name
[i
];
3050 unsigned semantic_index
= info
->output_semantic_index
[i
];
3052 switch (semantic_name
) {
3053 case TGSI_SEMANTIC_COLOR
:
3054 assert(semantic_index
< 8);
3055 for (j
= 0; j
< 4; j
++) {
3056 LLVMValueRef ptr
= ctx
->outputs
[i
][j
];
3057 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3058 color
[semantic_index
][j
] = result
;
3061 case TGSI_SEMANTIC_POSITION
:
3062 depth
= LLVMBuildLoad(builder
,
3063 ctx
->outputs
[i
][2], "");
3065 case TGSI_SEMANTIC_STENCIL
:
3066 stencil
= LLVMBuildLoad(builder
,
3067 ctx
->outputs
[i
][1], "");
3069 case TGSI_SEMANTIC_SAMPLEMASK
:
3070 samplemask
= LLVMBuildLoad(builder
,
3071 ctx
->outputs
[i
][0], "");
3074 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3079 /* Fill the return structure. */
3080 ret
= ctx
->return_value
;
3083 ret
= LLVMBuildInsertValue(builder
, ret
,
3084 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3085 LLVMGetParam(ctx
->main_fn
,
3086 SI_PARAM_ALPHA_REF
)),
3087 SI_SGPR_ALPHA_REF
, "");
3090 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3091 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3095 for (j
= 0; j
< 4; j
++)
3096 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3099 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3101 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3103 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3105 /* Add the input sample mask for smoothing at the end. */
3106 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3107 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3108 ret
= LLVMBuildInsertValue(builder
, ret
,
3109 LLVMGetParam(ctx
->main_fn
,
3110 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3112 ctx
->return_value
= ret
;
3116 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3117 * buffer in number of elements and return it as an i32.
3119 static LLVMValueRef
get_buffer_size(
3120 struct lp_build_tgsi_context
*bld_base
,
3121 LLVMValueRef descriptor
)
3123 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3124 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3125 LLVMBuilderRef builder
= gallivm
->builder
;
3127 LLVMBuildExtractElement(builder
, descriptor
,
3128 LLVMConstInt(ctx
->i32
, 2, 0), "");
3130 if (ctx
->screen
->b
.chip_class
== VI
) {
3131 /* On VI, the descriptor contains the size in bytes,
3132 * but TXQ must return the size in elements.
3133 * The stride is always non-zero for resources using TXQ.
3135 LLVMValueRef stride
=
3136 LLVMBuildExtractElement(builder
, descriptor
,
3138 stride
= LLVMBuildLShr(builder
, stride
,
3139 LLVMConstInt(ctx
->i32
, 16, 0), "");
3140 stride
= LLVMBuildAnd(builder
, stride
,
3141 LLVMConstInt(ctx
->i32
, 0x3FFF, 0), "");
3143 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3149 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3150 struct lp_build_tgsi_context
*bld_base
,
3151 struct lp_build_emit_data
*emit_data
);
3153 /* Prevent optimizations (at least of memory accesses) across the current
3154 * point in the program by emitting empty inline assembly that is marked as
3155 * having side effects.
3157 * Optionally, a value can be passed through the inline assembly to prevent
3158 * LLVM from hoisting calls to ReadNone functions.
3160 static void emit_optimization_barrier(struct si_shader_context
*ctx
,
3161 LLVMValueRef
*pvgpr
)
3163 static int counter
= 0;
3165 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3168 snprintf(code
, sizeof(code
), "; %d", p_atomic_inc_return(&counter
));
3171 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3172 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "", true, false);
3173 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3175 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->i32
, &ctx
->i32
, 1, false);
3176 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "=v,0", true, false);
3177 LLVMValueRef vgpr
= *pvgpr
;
3178 LLVMTypeRef vgpr_type
= LLVMTypeOf(vgpr
);
3179 unsigned vgpr_size
= llvm_get_type_size(vgpr_type
);
3182 assert(vgpr_size
% 4 == 0);
3184 vgpr
= LLVMBuildBitCast(builder
, vgpr
, LLVMVectorType(ctx
->i32
, vgpr_size
/ 4), "");
3185 vgpr0
= LLVMBuildExtractElement(builder
, vgpr
, ctx
->i32_0
, "");
3186 vgpr0
= LLVMBuildCall(builder
, inlineasm
, &vgpr0
, 1, "");
3187 vgpr
= LLVMBuildInsertElement(builder
, vgpr
, vgpr0
, ctx
->i32_0
, "");
3188 vgpr
= LLVMBuildBitCast(builder
, vgpr
, vgpr_type
, "");
3194 /* Combine these with & instead of |. */
3195 #define NOOP_WAITCNT 0xf7f
3196 #define LGKM_CNT 0x07f
3197 #define VM_CNT 0xf70
3199 static void emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3201 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3202 LLVMBuilderRef builder
= gallivm
->builder
;
3203 LLVMValueRef args
[1] = {
3204 LLVMConstInt(ctx
->i32
, simm16
, 0)
3206 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3207 ctx
->voidt
, args
, 1, 0);
3210 static void membar_emit(
3211 const struct lp_build_tgsi_action
*action
,
3212 struct lp_build_tgsi_context
*bld_base
,
3213 struct lp_build_emit_data
*emit_data
)
3215 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3216 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3217 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3218 unsigned waitcnt
= NOOP_WAITCNT
;
3220 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3221 waitcnt
&= VM_CNT
& LGKM_CNT
;
3223 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3224 TGSI_MEMBAR_SHADER_BUFFER
|
3225 TGSI_MEMBAR_SHADER_IMAGE
))
3228 if (flags
& TGSI_MEMBAR_SHARED
)
3229 waitcnt
&= LGKM_CNT
;
3231 if (waitcnt
!= NOOP_WAITCNT
)
3232 emit_waitcnt(ctx
, waitcnt
);
3235 static void clock_emit(
3236 const struct lp_build_tgsi_action
*action
,
3237 struct lp_build_tgsi_context
*bld_base
,
3238 struct lp_build_emit_data
*emit_data
)
3240 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3241 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3244 tmp
= lp_build_intrinsic(gallivm
->builder
, "llvm.readcyclecounter",
3245 ctx
->i64
, NULL
, 0, 0);
3246 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->v2i32
, "");
3248 emit_data
->output
[0] =
3249 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_0
, "");
3250 emit_data
->output
[1] =
3251 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_1
, "");
3255 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3256 const struct tgsi_full_src_register
*reg
)
3259 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3260 ctx
->param_shader_buffers
);
3262 if (!reg
->Register
.Indirect
)
3263 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3265 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3266 reg
->Register
.Index
,
3267 SI_NUM_SHADER_BUFFERS
);
3269 return ac_build_indexed_load_const(&ctx
->ac
, rsrc_ptr
, index
);
3272 static bool tgsi_is_array_sampler(unsigned target
)
3274 return target
== TGSI_TEXTURE_1D_ARRAY
||
3275 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3276 target
== TGSI_TEXTURE_2D_ARRAY
||
3277 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3278 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3279 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3280 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3283 static bool tgsi_is_array_image(unsigned target
)
3285 return target
== TGSI_TEXTURE_3D
||
3286 target
== TGSI_TEXTURE_CUBE
||
3287 target
== TGSI_TEXTURE_1D_ARRAY
||
3288 target
== TGSI_TEXTURE_2D_ARRAY
||
3289 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3290 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3294 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3296 * At least on Tonga, executing image stores on images with DCC enabled and
3297 * non-trivial can eventually lead to lockups. This can occur when an
3298 * application binds an image as read-only but then uses a shader that writes
3299 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3300 * program termination) in this case, but it doesn't cost much to be a bit
3301 * nicer: disabling DCC in the shader still leads to undefined results but
3302 * avoids the lockup.
3304 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3307 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3310 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3311 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3312 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3315 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3316 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3317 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3321 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
3323 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3327 static LLVMValueRef
load_image_desc(struct si_shader_context
*ctx
,
3328 LLVMValueRef list
, LLVMValueRef index
,
3331 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3333 if (target
== TGSI_TEXTURE_BUFFER
) {
3334 index
= LLVMBuildMul(builder
, index
,
3335 LLVMConstInt(ctx
->i32
, 2, 0), "");
3336 index
= LLVMBuildAdd(builder
, index
,
3338 list
= LLVMBuildPointerCast(builder
, list
,
3339 const_array(ctx
->v4i32
, 0), "");
3342 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
3346 * Load the resource descriptor for \p image.
3350 struct lp_build_tgsi_context
*bld_base
,
3351 const struct tgsi_full_src_register
*image
,
3352 bool is_store
, unsigned target
,
3355 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3356 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3359 bool dcc_off
= is_store
;
3361 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3363 if (!image
->Register
.Indirect
) {
3364 const struct tgsi_shader_info
*info
= bld_base
->info
;
3365 unsigned images_writemask
= info
->images_store
|
3366 info
->images_atomic
;
3368 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3370 if (images_writemask
& (1 << image
->Register
.Index
))
3373 /* From the GL_ARB_shader_image_load_store extension spec:
3375 * If a shader performs an image load, store, or atomic
3376 * operation using an image variable declared as an array,
3377 * and if the index used to select an individual element is
3378 * negative or greater than or equal to the size of the
3379 * array, the results of the operation are undefined but may
3380 * not lead to termination.
3382 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3383 image
->Register
.Index
,
3387 *rsrc
= load_image_desc(ctx
, rsrc_ptr
, index
, target
);
3388 if (dcc_off
&& target
!= TGSI_TEXTURE_BUFFER
)
3389 *rsrc
= force_dcc_off(ctx
, *rsrc
);
3392 static LLVMValueRef
image_fetch_coords(
3393 struct lp_build_tgsi_context
*bld_base
,
3394 const struct tgsi_full_instruction
*inst
,
3395 unsigned src
, LLVMValueRef desc
)
3397 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3398 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3399 LLVMBuilderRef builder
= gallivm
->builder
;
3400 unsigned target
= inst
->Memory
.Texture
;
3401 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3402 LLVMValueRef coords
[4];
3406 for (chan
= 0; chan
< num_coords
; ++chan
) {
3407 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3408 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3412 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
3413 /* 1D textures are allocated and used as 2D on GFX9. */
3414 if (target
== TGSI_TEXTURE_1D
) {
3415 coords
[1] = ctx
->i32_0
;
3417 } else if (target
== TGSI_TEXTURE_1D_ARRAY
) {
3418 coords
[2] = coords
[1];
3419 coords
[1] = ctx
->i32_0
;
3421 } else if (target
== TGSI_TEXTURE_2D
) {
3422 /* The hw can't bind a slice of a 3D image as a 2D
3423 * image, because it ignores BASE_ARRAY if the target
3424 * is 3D. The workaround is to read BASE_ARRAY and set
3425 * it as the 3rd address operand for all 2D images.
3427 LLVMValueRef first_layer
, const5
, mask
;
3429 const5
= LLVMConstInt(ctx
->i32
, 5, 0);
3430 mask
= LLVMConstInt(ctx
->i32
, S_008F24_BASE_ARRAY(~0), 0);
3431 first_layer
= LLVMBuildExtractElement(builder
, desc
, const5
, "");
3432 first_layer
= LLVMBuildAnd(builder
, first_layer
, mask
, "");
3434 coords
[2] = first_layer
;
3439 if (num_coords
== 1)
3442 if (num_coords
== 3) {
3443 /* LLVM has difficulties lowering 3-element vectors. */
3444 coords
[3] = bld_base
->uint_bld
.undef
;
3448 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3452 * Append the extra mode bits that are used by image load and store.
3454 static void image_append_args(
3455 struct si_shader_context
*ctx
,
3456 struct lp_build_emit_data
* emit_data
,
3461 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3462 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3463 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3464 LLVMValueRef r128
= i1false
;
3465 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3468 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3470 LLVMValueRef slc
= i1false
;
3471 LLVMValueRef lwe
= i1false
;
3473 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3474 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3475 emit_data
->args
[emit_data
->arg_count
++] = da
;
3477 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3479 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3483 /* HAVE_LLVM >= 0x0400 */
3484 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3485 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3486 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3487 emit_data
->args
[emit_data
->arg_count
++] = da
;
3491 * Append the resource and indexing arguments for buffer intrinsics.
3493 * \param rsrc the v4i32 buffer resource
3494 * \param index index into the buffer (stride-based)
3495 * \param offset byte offset into the buffer
3497 static void buffer_append_args(
3498 struct si_shader_context
*ctx
,
3499 struct lp_build_emit_data
*emit_data
,
3502 LLVMValueRef offset
,
3506 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3507 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3508 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3510 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3511 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3512 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3514 emit_data
->args
[emit_data
->arg_count
++] =
3516 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3517 i1true
: i1false
; /* glc */
3519 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3522 static void load_fetch_args(
3523 struct lp_build_tgsi_context
* bld_base
,
3524 struct lp_build_emit_data
* emit_data
)
3526 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3527 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3528 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3529 unsigned target
= inst
->Memory
.Texture
;
3532 emit_data
->dst_type
= ctx
->v4f32
;
3534 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3535 LLVMBuilderRef builder
= gallivm
->builder
;
3536 LLVMValueRef offset
;
3539 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3541 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3542 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3544 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
3545 offset
, false, false);
3546 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3547 LLVMValueRef coords
;
3549 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3550 coords
= image_fetch_coords(bld_base
, inst
, 1, rsrc
);
3552 if (target
== TGSI_TEXTURE_BUFFER
) {
3553 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3554 ctx
->i32_0
, false, false);
3556 emit_data
->args
[0] = coords
;
3557 emit_data
->args
[1] = rsrc
;
3558 emit_data
->args
[2] = LLVMConstInt(ctx
->i32
, 15, 0); /* dmask */
3559 emit_data
->arg_count
= 3;
3561 image_append_args(ctx
, emit_data
, target
, false, false);
3566 static unsigned get_load_intr_attribs(bool readonly_memory
)
3568 /* READNONE means writes can't affect it, while READONLY means that
3569 * writes can affect it. */
3570 return readonly_memory
&& HAVE_LLVM
>= 0x0400 ?
3571 LP_FUNC_ATTR_READNONE
:
3572 LP_FUNC_ATTR_READONLY
;
3575 static unsigned get_store_intr_attribs(bool writeonly_memory
)
3577 return writeonly_memory
&& HAVE_LLVM
>= 0x0400 ?
3578 LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY
:
3579 LP_FUNC_ATTR_WRITEONLY
;
3582 static void load_emit_buffer(struct si_shader_context
*ctx
,
3583 struct lp_build_emit_data
*emit_data
,
3584 bool readonly_memory
)
3586 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3587 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3588 LLVMBuilderRef builder
= gallivm
->builder
;
3589 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3590 uint count
= util_last_bit(writemask
);
3591 const char *intrinsic_name
;
3592 LLVMTypeRef dst_type
;
3596 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3597 dst_type
= ctx
->f32
;
3600 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3601 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3604 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3605 dst_type
= ctx
->v4f32
;
3609 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3610 builder
, intrinsic_name
, dst_type
,
3611 emit_data
->args
, emit_data
->arg_count
,
3612 get_load_intr_attribs(readonly_memory
));
3615 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3616 const struct tgsi_full_instruction
*inst
,
3617 LLVMTypeRef type
, int arg
)
3619 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3620 LLVMBuilderRef builder
= gallivm
->builder
;
3621 LLVMValueRef offset
, ptr
;
3624 offset
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, arg
, 0);
3625 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3627 ptr
= ctx
->shared_memory
;
3628 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3629 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3630 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3635 static void load_emit_memory(
3636 struct si_shader_context
*ctx
,
3637 struct lp_build_emit_data
*emit_data
)
3639 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3640 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3641 LLVMBuilderRef builder
= gallivm
->builder
;
3642 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3643 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3646 ptr
= get_memory_ptr(ctx
, inst
, ctx
->f32
, 1);
3648 for (chan
= 0; chan
< 4; ++chan
) {
3649 if (!(writemask
& (1 << chan
))) {
3650 channels
[chan
] = LLVMGetUndef(ctx
->f32
);
3654 index
= LLVMConstInt(ctx
->i32
, chan
, 0);
3655 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3656 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3658 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3662 * Return true if the memory accessed by a LOAD or STORE instruction is
3663 * read-only or write-only, respectively.
3665 * \param shader_buffers_reverse_access_mask
3666 * For LOAD, set this to (store | atomic) slot usage in the shader.
3667 * For STORE, set this to (load | atomic) slot usage in the shader.
3668 * \param images_reverse_access_mask Same as above, but for images.
3670 static bool is_oneway_access_only(const struct tgsi_full_instruction
*inst
,
3671 const struct tgsi_shader_info
*info
,
3672 unsigned shader_buffers_reverse_access_mask
,
3673 unsigned images_reverse_access_mask
)
3675 /* RESTRICT means NOALIAS.
3676 * If there are no writes, we can assume the accessed memory is read-only.
3677 * If there are no reads, we can assume the accessed memory is write-only.
3679 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_RESTRICT
) {
3680 unsigned reverse_access_mask
;
3682 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3683 reverse_access_mask
= shader_buffers_reverse_access_mask
;
3684 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3685 reverse_access_mask
= info
->images_buffers
&
3686 images_reverse_access_mask
;
3688 reverse_access_mask
= ~info
->images_buffers
&
3689 images_reverse_access_mask
;
3692 if (inst
->Src
[0].Register
.Indirect
) {
3693 if (!reverse_access_mask
)
3696 if (!(reverse_access_mask
&
3697 (1u << inst
->Src
[0].Register
.Index
)))
3702 /* If there are no buffer writes (for both shader buffers & image
3703 * buffers), it implies that buffer memory is read-only.
3704 * If there are no buffer reads (for both shader buffers & image
3705 * buffers), it implies that buffer memory is write-only.
3707 * Same for the case when there are no writes/reads for non-buffer
3710 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
3711 (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
&&
3712 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
)) {
3713 if (!shader_buffers_reverse_access_mask
&&
3714 !(info
->images_buffers
& images_reverse_access_mask
))
3717 if (!(~info
->images_buffers
& images_reverse_access_mask
))
3723 static void load_emit(
3724 const struct lp_build_tgsi_action
*action
,
3725 struct lp_build_tgsi_context
*bld_base
,
3726 struct lp_build_emit_data
*emit_data
)
3728 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3729 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3730 LLVMBuilderRef builder
= gallivm
->builder
;
3731 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3732 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3733 char intrinsic_name
[64];
3734 bool readonly_memory
= false;
3736 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3737 load_emit_memory(ctx
, emit_data
);
3741 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3742 emit_waitcnt(ctx
, VM_CNT
);
3744 readonly_memory
= !(inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
) &&
3745 is_oneway_access_only(inst
, info
,
3746 info
->shader_buffers_store
|
3747 info
->shader_buffers_atomic
,
3748 info
->images_store
|
3749 info
->images_atomic
);
3751 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3752 load_emit_buffer(ctx
, emit_data
, readonly_memory
);
3756 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3757 emit_data
->output
[emit_data
->chan
] =
3759 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3760 emit_data
->args
, emit_data
->arg_count
,
3761 get_load_intr_attribs(readonly_memory
));
3763 ac_get_image_intr_name("llvm.amdgcn.image.load",
3764 emit_data
->dst_type
, /* vdata */
3765 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3766 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3767 intrinsic_name
, sizeof(intrinsic_name
));
3769 emit_data
->output
[emit_data
->chan
] =
3771 builder
, intrinsic_name
, emit_data
->dst_type
,
3772 emit_data
->args
, emit_data
->arg_count
,
3773 get_load_intr_attribs(readonly_memory
));
3777 static void store_fetch_args(
3778 struct lp_build_tgsi_context
* bld_base
,
3779 struct lp_build_emit_data
* emit_data
)
3781 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3782 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3783 LLVMBuilderRef builder
= gallivm
->builder
;
3784 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3785 struct tgsi_full_src_register memory
;
3786 LLVMValueRef chans
[4];
3791 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3793 for (chan
= 0; chan
< 4; ++chan
) {
3794 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3796 data
= lp_build_gather_values(gallivm
, chans
, 4);
3798 emit_data
->args
[emit_data
->arg_count
++] = data
;
3800 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3802 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3803 LLVMValueRef offset
;
3806 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3808 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3809 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3811 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
3812 offset
, false, false);
3813 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3814 unsigned target
= inst
->Memory
.Texture
;
3815 LLVMValueRef coords
;
3817 /* 8bit/16bit TC L1 write corruption bug on SI.
3818 * All store opcodes not aligned to a dword are affected.
3820 * The only way to get unaligned stores in radeonsi is through
3823 bool force_glc
= ctx
->screen
->b
.chip_class
== SI
;
3825 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3826 coords
= image_fetch_coords(bld_base
, inst
, 0, rsrc
);
3828 if (target
== TGSI_TEXTURE_BUFFER
) {
3829 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3830 ctx
->i32_0
, false, force_glc
);
3832 emit_data
->args
[1] = coords
;
3833 emit_data
->args
[2] = rsrc
;
3834 emit_data
->args
[3] = LLVMConstInt(ctx
->i32
, 15, 0); /* dmask */
3835 emit_data
->arg_count
= 4;
3837 image_append_args(ctx
, emit_data
, target
, false, force_glc
);
3842 static void store_emit_buffer(
3843 struct si_shader_context
*ctx
,
3844 struct lp_build_emit_data
*emit_data
,
3845 bool writeonly_memory
)
3847 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3848 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3849 LLVMBuilderRef builder
= gallivm
->builder
;
3850 LLVMValueRef base_data
= emit_data
->args
[0];
3851 LLVMValueRef base_offset
= emit_data
->args
[3];
3852 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3856 const char *intrinsic_name
;
3858 LLVMValueRef offset
;
3861 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3863 /* Due to an LLVM limitation, split 3-element writes
3864 * into a 2-element and a 1-element write. */
3866 writemask
|= 1 << (start
+ 2);
3872 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3873 } else if (count
== 2) {
3874 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3876 tmp
= LLVMBuildExtractElement(
3878 LLVMConstInt(ctx
->i32
, start
, 0), "");
3879 data
= LLVMBuildInsertElement(
3880 builder
, LLVMGetUndef(v2f32
), tmp
,
3883 tmp
= LLVMBuildExtractElement(
3885 LLVMConstInt(ctx
->i32
, start
+ 1, 0), "");
3886 data
= LLVMBuildInsertElement(
3887 builder
, data
, tmp
, ctx
->i32_1
, "");
3889 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3892 data
= LLVMBuildExtractElement(
3894 LLVMConstInt(ctx
->i32
, start
, 0), "");
3895 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3898 offset
= base_offset
;
3900 offset
= LLVMBuildAdd(
3902 LLVMConstInt(ctx
->i32
, start
* 4, 0), "");
3905 emit_data
->args
[0] = data
;
3906 emit_data
->args
[3] = offset
;
3909 builder
, intrinsic_name
, emit_data
->dst_type
,
3910 emit_data
->args
, emit_data
->arg_count
,
3911 get_store_intr_attribs(writeonly_memory
));
3915 static void store_emit_memory(
3916 struct si_shader_context
*ctx
,
3917 struct lp_build_emit_data
*emit_data
)
3919 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3920 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3921 LLVMBuilderRef builder
= gallivm
->builder
;
3922 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3923 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3926 ptr
= get_memory_ptr(ctx
, inst
, ctx
->f32
, 0);
3928 for (chan
= 0; chan
< 4; ++chan
) {
3929 if (!(writemask
& (1 << chan
))) {
3932 data
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 1, chan
);
3933 index
= LLVMConstInt(ctx
->i32
, chan
, 0);
3934 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3935 LLVMBuildStore(builder
, data
, derived_ptr
);
3939 static void store_emit(
3940 const struct lp_build_tgsi_action
*action
,
3941 struct lp_build_tgsi_context
*bld_base
,
3942 struct lp_build_emit_data
*emit_data
)
3944 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3945 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3946 LLVMBuilderRef builder
= gallivm
->builder
;
3947 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3948 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3949 unsigned target
= inst
->Memory
.Texture
;
3950 char intrinsic_name
[64];
3951 bool writeonly_memory
= false;
3953 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3954 store_emit_memory(ctx
, emit_data
);
3958 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3959 emit_waitcnt(ctx
, VM_CNT
);
3961 writeonly_memory
= is_oneway_access_only(inst
, info
,
3962 info
->shader_buffers_load
|
3963 info
->shader_buffers_atomic
,
3965 info
->images_atomic
);
3967 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3968 store_emit_buffer(ctx
, emit_data
, writeonly_memory
);
3972 if (target
== TGSI_TEXTURE_BUFFER
) {
3973 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3974 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
3975 emit_data
->dst_type
, emit_data
->args
,
3976 emit_data
->arg_count
,
3977 get_store_intr_attribs(writeonly_memory
));
3979 ac_get_image_intr_name("llvm.amdgcn.image.store",
3980 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
3981 LLVMTypeOf(emit_data
->args
[1]), /* coords */
3982 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
3983 intrinsic_name
, sizeof(intrinsic_name
));
3985 emit_data
->output
[emit_data
->chan
] =
3987 builder
, intrinsic_name
, emit_data
->dst_type
,
3988 emit_data
->args
, emit_data
->arg_count
,
3989 get_store_intr_attribs(writeonly_memory
));
3993 static void atomic_fetch_args(
3994 struct lp_build_tgsi_context
* bld_base
,
3995 struct lp_build_emit_data
* emit_data
)
3997 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3998 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3999 LLVMBuilderRef builder
= gallivm
->builder
;
4000 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4001 LLVMValueRef data1
, data2
;
4005 emit_data
->dst_type
= ctx
->f32
;
4007 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
4008 data1
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4010 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4011 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
4012 data2
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4015 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
4016 * of arguments, which is reversed relative to TGSI (and GLSL)
4018 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4019 emit_data
->args
[emit_data
->arg_count
++] = data2
;
4020 emit_data
->args
[emit_data
->arg_count
++] = data1
;
4022 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4023 LLVMValueRef offset
;
4025 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
4027 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
4028 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4030 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
4031 offset
, true, false);
4032 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
4033 unsigned target
= inst
->Memory
.Texture
;
4034 LLVMValueRef coords
;
4036 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
4037 coords
= image_fetch_coords(bld_base
, inst
, 1, rsrc
);
4039 if (target
== TGSI_TEXTURE_BUFFER
) {
4040 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
4041 ctx
->i32_0
, true, false);
4043 emit_data
->args
[emit_data
->arg_count
++] = coords
;
4044 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
4046 image_append_args(ctx
, emit_data
, target
, true, false);
4051 static void atomic_emit_memory(struct si_shader_context
*ctx
,
4052 struct lp_build_emit_data
*emit_data
) {
4053 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4054 LLVMBuilderRef builder
= gallivm
->builder
;
4055 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4056 LLVMValueRef ptr
, result
, arg
;
4058 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
4060 arg
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 2, 0);
4061 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
4063 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4064 LLVMValueRef new_data
;
4065 new_data
= lp_build_emit_fetch(&ctx
->bld_base
,
4068 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
4070 #if HAVE_LLVM >= 0x309
4071 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
4072 LLVMAtomicOrderingSequentiallyConsistent
,
4073 LLVMAtomicOrderingSequentiallyConsistent
,
4077 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
4079 LLVMAtomicRMWBinOp op
;
4081 switch(inst
->Instruction
.Opcode
) {
4082 case TGSI_OPCODE_ATOMUADD
:
4083 op
= LLVMAtomicRMWBinOpAdd
;
4085 case TGSI_OPCODE_ATOMXCHG
:
4086 op
= LLVMAtomicRMWBinOpXchg
;
4088 case TGSI_OPCODE_ATOMAND
:
4089 op
= LLVMAtomicRMWBinOpAnd
;
4091 case TGSI_OPCODE_ATOMOR
:
4092 op
= LLVMAtomicRMWBinOpOr
;
4094 case TGSI_OPCODE_ATOMXOR
:
4095 op
= LLVMAtomicRMWBinOpXor
;
4097 case TGSI_OPCODE_ATOMUMIN
:
4098 op
= LLVMAtomicRMWBinOpUMin
;
4100 case TGSI_OPCODE_ATOMUMAX
:
4101 op
= LLVMAtomicRMWBinOpUMax
;
4103 case TGSI_OPCODE_ATOMIMIN
:
4104 op
= LLVMAtomicRMWBinOpMin
;
4106 case TGSI_OPCODE_ATOMIMAX
:
4107 op
= LLVMAtomicRMWBinOpMax
;
4110 unreachable("unknown atomic opcode");
4113 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
4114 LLVMAtomicOrderingSequentiallyConsistent
,
4117 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
4120 static void atomic_emit(
4121 const struct lp_build_tgsi_action
*action
,
4122 struct lp_build_tgsi_context
*bld_base
,
4123 struct lp_build_emit_data
*emit_data
)
4125 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4126 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4127 LLVMBuilderRef builder
= gallivm
->builder
;
4128 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4129 char intrinsic_name
[40];
4132 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4133 atomic_emit_memory(ctx
, emit_data
);
4137 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
4138 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4139 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4140 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
4142 LLVMValueRef coords
;
4143 char coords_type
[8];
4145 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4146 coords
= emit_data
->args
[2];
4148 coords
= emit_data
->args
[1];
4150 ac_build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4151 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4152 "llvm.amdgcn.image.atomic.%s.%s",
4153 action
->intr_name
, coords_type
);
4156 tmp
= lp_build_intrinsic(
4157 builder
, intrinsic_name
, ctx
->i32
,
4158 emit_data
->args
, emit_data
->arg_count
, 0);
4159 emit_data
->output
[emit_data
->chan
] =
4160 LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4163 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4164 struct lp_build_emit_data
*emit_data
,
4166 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4167 LLVMValueRef
*param
, unsigned count
,
4170 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4171 struct ac_image_args args
= {};
4173 /* Pad to power of two vector */
4174 while (count
< util_next_power_of_two(count
))
4175 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4178 args
.addr
= lp_build_gather_values(gallivm
, param
, count
);
4180 args
.addr
= param
[0];
4182 args
.resource
= res_ptr
;
4183 args
.sampler
= samp_ptr
;
4185 args
.unorm
= target
== TGSI_TEXTURE_RECT
||
4186 target
== TGSI_TEXTURE_SHADOWRECT
;
4187 args
.da
= tgsi_is_array_sampler(target
);
4189 /* Ugly, but we seem to have no other choice right now. */
4190 STATIC_ASSERT(sizeof(args
) <= sizeof(emit_data
->args
));
4191 memcpy(emit_data
->args
, &args
, sizeof(args
));
4194 static LLVMValueRef
fix_resinfo(struct si_shader_context
*ctx
,
4195 unsigned target
, LLVMValueRef out
)
4197 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4199 /* 1D textures are allocated and used as 2D on GFX9. */
4200 if (ctx
->screen
->b
.chip_class
>= GFX9
&&
4201 (target
== TGSI_TEXTURE_1D_ARRAY
||
4202 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
)) {
4203 LLVMValueRef layers
=
4204 LLVMBuildExtractElement(builder
, out
,
4205 LLVMConstInt(ctx
->i32
, 2, 0), "");
4206 out
= LLVMBuildInsertElement(builder
, out
, layers
,
4210 /* Divide the number of layers by 6 to get the number of cubes. */
4211 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4212 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4213 LLVMValueRef imm2
= LLVMConstInt(ctx
->i32
, 2, 0);
4215 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4216 z
= LLVMBuildSDiv(builder
, z
, LLVMConstInt(ctx
->i32
, 6, 0), "");
4218 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4223 static void resq_fetch_args(
4224 struct lp_build_tgsi_context
* bld_base
,
4225 struct lp_build_emit_data
* emit_data
)
4227 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4228 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4229 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4231 emit_data
->dst_type
= ctx
->v4i32
;
4233 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4234 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4235 emit_data
->arg_count
= 1;
4236 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4237 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4238 &emit_data
->args
[0]);
4239 emit_data
->arg_count
= 1;
4241 LLVMValueRef res_ptr
;
4242 unsigned image_target
;
4244 if (inst
->Memory
.Texture
== TGSI_TEXTURE_3D
)
4245 image_target
= TGSI_TEXTURE_2D_ARRAY
;
4247 image_target
= inst
->Memory
.Texture
;
4249 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4251 set_tex_fetch_args(ctx
, emit_data
, image_target
,
4252 res_ptr
, NULL
, &ctx
->i32_0
, 1,
4257 static void resq_emit(
4258 const struct lp_build_tgsi_action
*action
,
4259 struct lp_build_tgsi_context
*bld_base
,
4260 struct lp_build_emit_data
*emit_data
)
4262 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4263 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4264 LLVMBuilderRef builder
= gallivm
->builder
;
4265 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4268 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4269 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4270 LLVMConstInt(ctx
->i32
, 2, 0), "");
4271 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4272 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4274 struct ac_image_args args
;
4276 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4277 args
.opcode
= ac_image_get_resinfo
;
4278 out
= ac_build_image_opcode(&ctx
->ac
, &args
);
4280 out
= fix_resinfo(ctx
, inst
->Memory
.Texture
, out
);
4283 emit_data
->output
[emit_data
->chan
] = out
;
4286 static const struct lp_build_tgsi_action tex_action
;
4296 * Load an image view, fmask view. or sampler state descriptor.
4298 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4299 LLVMValueRef list
, LLVMValueRef index
,
4300 enum desc_type type
)
4302 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4303 LLVMBuilderRef builder
= gallivm
->builder
;
4307 /* The image is at [0:7]. */
4308 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4311 /* The buffer is in [4:7]. */
4312 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4313 index
= LLVMBuildAdd(builder
, index
, ctx
->i32_1
, "");
4314 list
= LLVMBuildPointerCast(builder
, list
,
4315 const_array(ctx
->v4i32
, 0), "");
4318 /* The FMASK is at [8:15]. */
4319 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4320 index
= LLVMBuildAdd(builder
, index
, ctx
->i32_1
, "");
4323 /* The sampler state is at [12:15]. */
4324 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4325 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4326 list
= LLVMBuildPointerCast(builder
, list
,
4327 const_array(ctx
->v4i32
, 0), "");
4331 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4334 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4337 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4338 * filtering manually. The driver sets img7 to a mask clearing
4339 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4340 * s_and_b32 samp0, samp0, img7
4343 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4345 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4346 LLVMValueRef res
, LLVMValueRef samp
)
4348 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4349 LLVMValueRef img7
, samp0
;
4351 if (ctx
->screen
->b
.chip_class
>= VI
)
4354 img7
= LLVMBuildExtractElement(builder
, res
,
4355 LLVMConstInt(ctx
->i32
, 7, 0), "");
4356 samp0
= LLVMBuildExtractElement(builder
, samp
,
4358 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4359 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4363 static void tex_fetch_ptrs(
4364 struct lp_build_tgsi_context
*bld_base
,
4365 struct lp_build_emit_data
*emit_data
,
4366 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4368 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4369 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, ctx
->param_samplers
);
4370 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4371 const struct tgsi_full_src_register
*reg
;
4372 unsigned target
= inst
->Texture
.Texture
;
4373 unsigned sampler_src
;
4376 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4377 reg
= &emit_data
->inst
->Src
[sampler_src
];
4379 if (reg
->Register
.Indirect
) {
4380 index
= get_bounded_indirect_index(ctx
,
4382 reg
->Register
.Index
,
4385 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
4388 if (target
== TGSI_TEXTURE_BUFFER
)
4389 *res_ptr
= load_sampler_desc(ctx
, list
, index
, DESC_BUFFER
);
4391 *res_ptr
= load_sampler_desc(ctx
, list
, index
, DESC_IMAGE
);
4398 if (target
== TGSI_TEXTURE_2D_MSAA
||
4399 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4401 *fmask_ptr
= load_sampler_desc(ctx
, list
, index
,
4403 } else if (target
!= TGSI_TEXTURE_BUFFER
) {
4405 *samp_ptr
= load_sampler_desc(ctx
, list
, index
,
4407 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4412 static void txq_fetch_args(
4413 struct lp_build_tgsi_context
*bld_base
,
4414 struct lp_build_emit_data
*emit_data
)
4416 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4417 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4418 unsigned target
= inst
->Texture
.Texture
;
4419 LLVMValueRef res_ptr
;
4420 LLVMValueRef address
;
4422 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4424 if (target
== TGSI_TEXTURE_BUFFER
) {
4425 /* Read the size from the buffer descriptor directly. */
4426 emit_data
->args
[0] = get_buffer_size(bld_base
, res_ptr
);
4430 /* Textures - set the mip level. */
4431 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4433 set_tex_fetch_args(ctx
, emit_data
, target
, res_ptr
,
4434 NULL
, &address
, 1, 0xf);
4437 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4438 struct lp_build_tgsi_context
*bld_base
,
4439 struct lp_build_emit_data
*emit_data
)
4441 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4442 struct ac_image_args args
;
4443 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4445 if (target
== TGSI_TEXTURE_BUFFER
) {
4446 /* Just return the buffer size. */
4447 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4451 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4453 args
.opcode
= ac_image_get_resinfo
;
4454 LLVMValueRef result
= ac_build_image_opcode(&ctx
->ac
, &args
);
4456 emit_data
->output
[emit_data
->chan
] = fix_resinfo(ctx
, target
, result
);
4459 static void tex_fetch_args(
4460 struct lp_build_tgsi_context
*bld_base
,
4461 struct lp_build_emit_data
*emit_data
)
4463 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4464 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4465 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4466 unsigned opcode
= inst
->Instruction
.Opcode
;
4467 unsigned target
= inst
->Texture
.Texture
;
4468 LLVMValueRef coords
[5], derivs
[6];
4469 LLVMValueRef address
[16];
4470 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4471 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4474 unsigned num_deriv_channels
= 0;
4475 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4476 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4477 unsigned dmask
= 0xf;
4479 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4481 if (target
== TGSI_TEXTURE_BUFFER
) {
4482 emit_data
->dst_type
= ctx
->v4f32
;
4483 emit_data
->args
[0] = LLVMBuildBitCast(gallivm
->builder
, res_ptr
,
4485 emit_data
->args
[1] = ctx
->i32_0
;
4486 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4487 emit_data
->arg_count
= 3;
4491 /* Fetch and project texture coordinates */
4492 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4493 for (chan
= 0; chan
< 3; chan
++ ) {
4494 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4497 if (opcode
== TGSI_OPCODE_TXP
)
4498 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4504 if (opcode
== TGSI_OPCODE_TXP
)
4505 coords
[3] = bld_base
->base
.one
;
4509 opcode
!= TGSI_OPCODE_TXF
&&
4510 opcode
!= TGSI_OPCODE_TXF_LZ
) {
4511 /* The offsets are six-bit signed integers packed like this:
4512 * X=[5:0], Y=[13:8], and Z=[21:16].
4514 LLVMValueRef offset
[3], pack
;
4516 assert(inst
->Texture
.NumOffsets
== 1);
4518 for (chan
= 0; chan
< 3; chan
++) {
4519 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4520 emit_data
->inst
, 0, chan
);
4521 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4522 LLVMConstInt(ctx
->i32
, 0x3f, 0), "");
4524 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4525 LLVMConstInt(ctx
->i32
, chan
*8, 0), "");
4528 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4529 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4530 address
[count
++] = pack
;
4533 /* Pack LOD bias value */
4534 if (opcode
== TGSI_OPCODE_TXB
)
4535 address
[count
++] = coords
[3];
4536 if (opcode
== TGSI_OPCODE_TXB2
)
4537 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4539 /* Pack depth comparison value */
4540 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4543 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4544 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4546 assert(ref_pos
>= 0);
4547 z
= coords
[ref_pos
];
4550 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4551 * so the depth comparison value isn't clamped for Z16 and
4552 * Z24 anymore. Do it manually here.
4554 * It's unnecessary if the original texture format was
4555 * Z32_FLOAT, but we don't know that here.
4557 if (ctx
->screen
->b
.chip_class
== VI
)
4558 z
= ac_build_clamp(&ctx
->ac
, z
);
4560 address
[count
++] = z
;
4563 /* Pack user derivatives */
4564 if (opcode
== TGSI_OPCODE_TXD
) {
4565 int param
, num_src_deriv_channels
, num_dst_deriv_channels
;
4568 case TGSI_TEXTURE_3D
:
4569 num_src_deriv_channels
= 3;
4570 num_dst_deriv_channels
= 3;
4571 num_deriv_channels
= 3;
4573 case TGSI_TEXTURE_2D
:
4574 case TGSI_TEXTURE_SHADOW2D
:
4575 case TGSI_TEXTURE_RECT
:
4576 case TGSI_TEXTURE_SHADOWRECT
:
4577 case TGSI_TEXTURE_2D_ARRAY
:
4578 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4579 num_src_deriv_channels
= 2;
4580 num_dst_deriv_channels
= 2;
4581 num_deriv_channels
= 2;
4583 case TGSI_TEXTURE_CUBE
:
4584 case TGSI_TEXTURE_SHADOWCUBE
:
4585 case TGSI_TEXTURE_CUBE_ARRAY
:
4586 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4587 /* Cube derivatives will be converted to 2D. */
4588 num_src_deriv_channels
= 3;
4589 num_dst_deriv_channels
= 3;
4590 num_deriv_channels
= 2;
4592 case TGSI_TEXTURE_1D
:
4593 case TGSI_TEXTURE_SHADOW1D
:
4594 case TGSI_TEXTURE_1D_ARRAY
:
4595 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4596 num_src_deriv_channels
= 1;
4598 /* 1D textures are allocated and used as 2D on GFX9. */
4599 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4600 num_dst_deriv_channels
= 2;
4601 num_deriv_channels
= 2;
4603 num_dst_deriv_channels
= 1;
4604 num_deriv_channels
= 1;
4608 unreachable("invalid target");
4611 for (param
= 0; param
< 2; param
++) {
4612 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4613 derivs
[param
* num_dst_deriv_channels
+ chan
] =
4614 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4616 /* Fill in the rest with zeros. */
4617 for (chan
= num_src_deriv_channels
;
4618 chan
< num_dst_deriv_channels
; chan
++)
4619 derivs
[param
* num_dst_deriv_channels
+ chan
] =
4620 bld_base
->base
.zero
;
4624 if (target
== TGSI_TEXTURE_CUBE
||
4625 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4626 target
== TGSI_TEXTURE_SHADOWCUBE
||
4627 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4628 ac_prepare_cube_coords(&ctx
->ac
,
4629 opcode
== TGSI_OPCODE_TXD
,
4630 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4631 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
4634 if (opcode
== TGSI_OPCODE_TXD
)
4635 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4636 address
[count
++] = derivs
[i
];
4638 /* Pack texture coordinates */
4639 address
[count
++] = coords
[0];
4641 address
[count
++] = coords
[1];
4643 address
[count
++] = coords
[2];
4645 /* 1D textures are allocated and used as 2D on GFX9. */
4646 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4647 LLVMValueRef filler
;
4649 /* Use 0.5, so that we don't sample the border color. */
4650 if (opcode
== TGSI_OPCODE_TXF
)
4651 filler
= ctx
->i32_0
;
4653 filler
= LLVMConstReal(ctx
->f32
, 0.5);
4655 if (target
== TGSI_TEXTURE_1D
||
4656 target
== TGSI_TEXTURE_SHADOW1D
) {
4657 address
[count
++] = filler
;
4658 } else if (target
== TGSI_TEXTURE_1D_ARRAY
||
4659 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
) {
4660 address
[count
] = address
[count
- 1];
4661 address
[count
- 1] = filler
;
4666 /* Pack LOD or sample index */
4667 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4668 address
[count
++] = coords
[3];
4669 else if (opcode
== TGSI_OPCODE_TXL2
)
4670 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4673 assert(!"Cannot handle more than 16 texture address parameters");
4677 for (chan
= 0; chan
< count
; chan
++ ) {
4678 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4679 address
[chan
], ctx
->i32
, "");
4682 /* Adjust the sample index according to FMASK.
4684 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4685 * which is the identity mapping. Each nibble says which physical sample
4686 * should be fetched to get that sample.
4688 * For example, 0x11111100 means there are only 2 samples stored and
4689 * the second sample covers 3/4 of the pixel. When reading samples 0
4690 * and 1, return physical sample 0 (determined by the first two 0s
4691 * in FMASK), otherwise return physical sample 1.
4693 * The sample index should be adjusted as follows:
4694 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4696 if (target
== TGSI_TEXTURE_2D_MSAA
||
4697 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4698 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4699 LLVMValueRef txf_address
[4];
4700 /* We only need .xy for non-arrays, and .xyz for arrays. */
4701 unsigned txf_count
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4702 struct tgsi_full_instruction inst
= {};
4704 memcpy(txf_address
, address
, sizeof(txf_address
));
4706 /* Read FMASK using TXF_LZ. */
4707 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF_LZ
;
4708 inst
.Texture
.Texture
= target
;
4709 txf_emit_data
.inst
= &inst
;
4710 txf_emit_data
.chan
= 0;
4711 set_tex_fetch_args(ctx
, &txf_emit_data
,
4712 target
, fmask_ptr
, NULL
,
4713 txf_address
, txf_count
, 0xf);
4714 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4716 /* Initialize some constants. */
4717 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4718 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4720 /* Apply the formula. */
4721 LLVMValueRef fmask
=
4722 LLVMBuildExtractElement(gallivm
->builder
,
4723 txf_emit_data
.output
[0],
4726 unsigned sample_chan
= txf_count
; /* the sample index is last */
4728 LLVMValueRef sample_index4
=
4729 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4731 LLVMValueRef shifted_fmask
=
4732 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4734 LLVMValueRef final_sample
=
4735 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4737 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4738 * resource descriptor is 0 (invalid),
4740 LLVMValueRef fmask_desc
=
4741 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4744 LLVMValueRef fmask_word1
=
4745 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4748 LLVMValueRef word1_is_nonzero
=
4749 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4750 fmask_word1
, ctx
->i32_0
, "");
4752 /* Replace the MSAA sample index. */
4753 address
[sample_chan
] =
4754 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4755 final_sample
, address
[sample_chan
], "");
4758 if (opcode
== TGSI_OPCODE_TXF
||
4759 opcode
== TGSI_OPCODE_TXF_LZ
) {
4760 /* add tex offsets */
4761 if (inst
->Texture
.NumOffsets
) {
4762 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4763 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4765 assert(inst
->Texture
.NumOffsets
== 1);
4768 case TGSI_TEXTURE_3D
:
4769 address
[2] = lp_build_add(uint_bld
, address
[2],
4770 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleZ
]);
4772 case TGSI_TEXTURE_2D
:
4773 case TGSI_TEXTURE_SHADOW2D
:
4774 case TGSI_TEXTURE_RECT
:
4775 case TGSI_TEXTURE_SHADOWRECT
:
4776 case TGSI_TEXTURE_2D_ARRAY
:
4777 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4779 lp_build_add(uint_bld
, address
[1],
4780 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleY
]);
4782 case TGSI_TEXTURE_1D
:
4783 case TGSI_TEXTURE_SHADOW1D
:
4784 case TGSI_TEXTURE_1D_ARRAY
:
4785 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4787 lp_build_add(uint_bld
, address
[0],
4788 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleX
]);
4790 /* texture offsets do not apply to other texture targets */
4795 if (opcode
== TGSI_OPCODE_TG4
) {
4796 unsigned gather_comp
= 0;
4798 /* DMASK was repurposed for GATHER4. 4 components are always
4799 * returned and DMASK works like a swizzle - it selects
4800 * the component to fetch. The only valid DMASK values are
4801 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4802 * (red,red,red,red) etc.) The ISA document doesn't mention
4806 /* Get the component index from src1.x for Gather4. */
4807 if (!tgsi_is_shadow_target(target
)) {
4808 LLVMValueRef comp_imm
;
4809 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4811 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4813 comp_imm
= ctx
->imms
[src1
.Index
* TGSI_NUM_CHANNELS
+ src1
.SwizzleX
];
4814 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4815 gather_comp
= CLAMP(gather_comp
, 0, 3);
4818 dmask
= 1 << gather_comp
;
4821 set_tex_fetch_args(ctx
, emit_data
, target
, res_ptr
,
4822 samp_ptr
, address
, count
, dmask
);
4825 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4826 * incorrectly forces nearest filtering if the texture format is integer.
4827 * The only effect it has on Gather4, which always returns 4 texels for
4828 * bilinear filtering, is that the final coordinates are off by 0.5 of
4831 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4832 * or (0.5 / size) from the normalized coordinates.
4834 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4835 struct ac_image_args
*args
,
4838 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4839 LLVMValueRef coord
= args
->addr
;
4840 LLVMValueRef half_texel
[2];
4841 /* Texture coordinates start after:
4842 * {offset, bias, z-compare, derivatives}
4843 * Only the offset and z-compare can occur here.
4845 unsigned coord_vgpr_index
= (int)args
->offset
+ (int)args
->compare
;
4848 if (target
== TGSI_TEXTURE_RECT
||
4849 target
== TGSI_TEXTURE_SHADOWRECT
) {
4850 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4852 struct tgsi_full_instruction txq_inst
= {};
4853 struct lp_build_emit_data txq_emit_data
= {};
4855 /* Query the texture size. */
4856 txq_inst
.Texture
.Texture
= target
;
4857 txq_emit_data
.inst
= &txq_inst
;
4858 txq_emit_data
.dst_type
= ctx
->v4i32
;
4859 set_tex_fetch_args(ctx
, &txq_emit_data
, target
,
4860 args
->resource
, NULL
, &ctx
->i32_0
,
4862 txq_emit(NULL
, &ctx
->bld_base
, &txq_emit_data
);
4864 /* Compute -0.5 / size. */
4865 for (c
= 0; c
< 2; c
++) {
4867 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4868 LLVMConstInt(ctx
->i32
, c
, 0), "");
4869 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4871 lp_build_emit_llvm_unary(&ctx
->bld_base
,
4872 TGSI_OPCODE_RCP
, half_texel
[c
]);
4873 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4874 LLVMConstReal(ctx
->f32
, -0.5), "");
4878 for (c
= 0; c
< 2; c
++) {
4880 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4882 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4883 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4884 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4885 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4886 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4892 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4893 struct lp_build_tgsi_context
*bld_base
,
4894 struct lp_build_emit_data
*emit_data
)
4896 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4897 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4898 struct ac_image_args args
;
4899 unsigned opcode
= inst
->Instruction
.Opcode
;
4900 unsigned target
= inst
->Texture
.Texture
;
4902 if (target
== TGSI_TEXTURE_BUFFER
) {
4903 emit_data
->output
[emit_data
->chan
] =
4904 ac_build_buffer_load_format(&ctx
->ac
,
4912 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4914 args
.opcode
= ac_image_sample
;
4915 args
.compare
= tgsi_is_shadow_target(target
);
4916 args
.offset
= inst
->Texture
.NumOffsets
> 0;
4919 case TGSI_OPCODE_TXF
:
4920 case TGSI_OPCODE_TXF_LZ
:
4921 args
.opcode
= opcode
== TGSI_OPCODE_TXF_LZ
||
4922 target
== TGSI_TEXTURE_2D_MSAA
||
4923 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4924 ac_image_load
: ac_image_load_mip
;
4925 args
.compare
= false;
4926 args
.offset
= false;
4928 case TGSI_OPCODE_LODQ
:
4929 args
.opcode
= ac_image_get_lod
;
4930 args
.compare
= false;
4931 args
.offset
= false;
4933 case TGSI_OPCODE_TEX
:
4934 case TGSI_OPCODE_TEX2
:
4935 case TGSI_OPCODE_TXP
:
4936 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4937 args
.level_zero
= true;
4939 case TGSI_OPCODE_TEX_LZ
:
4940 args
.level_zero
= true;
4942 case TGSI_OPCODE_TXB
:
4943 case TGSI_OPCODE_TXB2
:
4944 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4947 case TGSI_OPCODE_TXL
:
4948 case TGSI_OPCODE_TXL2
:
4951 case TGSI_OPCODE_TXD
:
4954 case TGSI_OPCODE_TG4
:
4955 args
.opcode
= ac_image_gather4
;
4956 args
.level_zero
= true;
4963 /* The hardware needs special lowering for Gather4 with integer formats. */
4964 if (ctx
->screen
->b
.chip_class
<= VI
&&
4965 opcode
== TGSI_OPCODE_TG4
) {
4966 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4967 /* This will also work with non-constant indexing because of how
4968 * glsl_to_tgsi works and we intent to preserve that behavior.
4970 const unsigned src_idx
= 2;
4971 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4973 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4975 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4976 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
)
4977 si_lower_gather4_integer(ctx
, &args
, target
);
4980 emit_data
->output
[emit_data
->chan
] =
4981 ac_build_image_opcode(&ctx
->ac
, &args
);
4984 static void si_llvm_emit_txqs(
4985 const struct lp_build_tgsi_action
*action
,
4986 struct lp_build_tgsi_context
*bld_base
,
4987 struct lp_build_emit_data
*emit_data
)
4989 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4990 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4991 LLVMBuilderRef builder
= gallivm
->builder
;
4992 LLVMValueRef res
, samples
;
4993 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4995 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4998 /* Read the samples from the descriptor directly. */
4999 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
5000 samples
= LLVMBuildExtractElement(
5002 LLVMConstInt(ctx
->i32
, 3, 0), "");
5003 samples
= LLVMBuildLShr(builder
, samples
,
5004 LLVMConstInt(ctx
->i32
, 16, 0), "");
5005 samples
= LLVMBuildAnd(builder
, samples
,
5006 LLVMConstInt(ctx
->i32
, 0xf, 0), "");
5007 samples
= LLVMBuildShl(builder
, ctx
->i32_1
,
5010 emit_data
->output
[emit_data
->chan
] = samples
;
5013 static void si_llvm_emit_ddxy(
5014 const struct lp_build_tgsi_action
*action
,
5015 struct lp_build_tgsi_context
*bld_base
,
5016 struct lp_build_emit_data
*emit_data
)
5018 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5019 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5020 unsigned opcode
= emit_data
->info
->opcode
;
5025 if (opcode
== TGSI_OPCODE_DDX_FINE
)
5026 mask
= AC_TID_MASK_LEFT
;
5027 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
5028 mask
= AC_TID_MASK_TOP
;
5030 mask
= AC_TID_MASK_TOP_LEFT
;
5032 /* for DDX we want to next X pixel, DDY next Y pixel. */
5033 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
5035 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
5036 val
= ac_build_ddxy(&ctx
->ac
, ctx
->screen
->has_ds_bpermute
,
5037 mask
, idx
, ctx
->lds
, val
);
5038 emit_data
->output
[emit_data
->chan
] = val
;
5042 * this takes an I,J coordinate pair,
5043 * and works out the X and Y derivatives.
5044 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
5046 static LLVMValueRef
si_llvm_emit_ddxy_interp(
5047 struct lp_build_tgsi_context
*bld_base
,
5048 LLVMValueRef interp_ij
)
5050 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5051 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5052 LLVMValueRef result
[4], a
;
5055 for (i
= 0; i
< 2; i
++) {
5056 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
5057 LLVMConstInt(ctx
->i32
, i
, 0), "");
5058 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
5059 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
5062 return lp_build_gather_values(gallivm
, result
, 4);
5065 static void interp_fetch_args(
5066 struct lp_build_tgsi_context
*bld_base
,
5067 struct lp_build_emit_data
*emit_data
)
5069 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5070 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5071 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5073 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
5074 /* offset is in second src, first two channels */
5075 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
5078 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
5081 emit_data
->arg_count
= 2;
5082 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5083 LLVMValueRef sample_position
;
5084 LLVMValueRef sample_id
;
5085 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
5087 /* fetch sample ID, then fetch its sample position,
5088 * and place into first two channels.
5090 sample_id
= lp_build_emit_fetch(bld_base
,
5091 emit_data
->inst
, 1, TGSI_CHAN_X
);
5092 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
5094 sample_position
= load_sample_position(ctx
, sample_id
);
5096 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5100 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5101 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5104 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5105 emit_data
->arg_count
= 2;
5109 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5110 struct lp_build_tgsi_context
*bld_base
,
5111 struct lp_build_emit_data
*emit_data
)
5113 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5114 struct si_shader
*shader
= ctx
->shader
;
5115 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5116 LLVMValueRef interp_param
;
5117 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5118 int input_index
= inst
->Src
[0].Register
.Index
;
5121 LLVMValueRef attr_number
;
5122 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5123 int interp_param_idx
;
5124 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5127 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5129 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5130 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5131 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5133 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5135 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5136 if (interp_param_idx
== -1)
5138 else if (interp_param_idx
)
5139 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5141 interp_param
= NULL
;
5143 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
5145 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5146 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5147 LLVMValueRef ij_out
[2];
5148 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5151 * take the I then J parameters, and the DDX/Y for it, and
5152 * calculate the IJ inputs for the interpolator.
5153 * temp1 = ddx * offset/sample.x + I;
5154 * interp_param.I = ddy * offset/sample.y + temp1;
5155 * temp1 = ddx * offset/sample.x + J;
5156 * interp_param.J = ddy * offset/sample.y + temp1;
5158 for (i
= 0; i
< 2; i
++) {
5159 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
5160 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
5161 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5162 ddxy_out
, ix_ll
, "");
5163 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5164 ddxy_out
, iy_ll
, "");
5165 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5166 interp_param
, ix_ll
, "");
5167 LLVMValueRef temp1
, temp2
;
5169 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5172 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5174 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5176 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5178 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5180 interp_param
= lp_build_gather_values(gallivm
, ij_out
, 2);
5183 for (chan
= 0; chan
< 4; chan
++) {
5184 LLVMValueRef llvm_chan
;
5187 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5188 llvm_chan
= LLVMConstInt(ctx
->i32
, schan
, 0);
5191 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
5192 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
5193 LLVMValueRef i
= LLVMBuildExtractElement(
5194 gallivm
->builder
, interp_param
, ctx
->i32_0
, "");
5195 LLVMValueRef j
= LLVMBuildExtractElement(
5196 gallivm
->builder
, interp_param
, ctx
->i32_1
, "");
5197 emit_data
->output
[chan
] = ac_build_fs_interp(&ctx
->ac
,
5198 llvm_chan
, attr_number
, params
,
5201 emit_data
->output
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
5202 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
5203 llvm_chan
, attr_number
, params
);
5208 static LLVMValueRef
si_emit_ballot(struct si_shader_context
*ctx
,
5211 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5212 LLVMValueRef args
[3] = {
5215 LLVMConstInt(ctx
->i32
, LLVMIntNE
, 0)
5218 /* We currently have no other way to prevent LLVM from lifting the icmp
5219 * calls to a dominating basic block.
5221 emit_optimization_barrier(ctx
, &args
[0]);
5223 if (LLVMTypeOf(args
[0]) != ctx
->i32
)
5224 args
[0] = LLVMBuildBitCast(gallivm
->builder
, args
[0], ctx
->i32
, "");
5226 return lp_build_intrinsic(gallivm
->builder
,
5227 "llvm.amdgcn.icmp.i32",
5229 LP_FUNC_ATTR_NOUNWIND
|
5230 LP_FUNC_ATTR_READNONE
|
5231 LP_FUNC_ATTR_CONVERGENT
);
5234 static void vote_all_emit(
5235 const struct lp_build_tgsi_action
*action
,
5236 struct lp_build_tgsi_context
*bld_base
,
5237 struct lp_build_emit_data
*emit_data
)
5239 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5240 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5241 LLVMValueRef active_set
, vote_set
;
5244 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
5245 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5247 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
5248 emit_data
->output
[emit_data
->chan
] =
5249 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5252 static void vote_any_emit(
5253 const struct lp_build_tgsi_action
*action
,
5254 struct lp_build_tgsi_context
*bld_base
,
5255 struct lp_build_emit_data
*emit_data
)
5257 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5258 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5259 LLVMValueRef vote_set
;
5262 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5264 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
5265 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
5266 emit_data
->output
[emit_data
->chan
] =
5267 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5270 static void vote_eq_emit(
5271 const struct lp_build_tgsi_action
*action
,
5272 struct lp_build_tgsi_context
*bld_base
,
5273 struct lp_build_emit_data
*emit_data
)
5275 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5276 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5277 LLVMValueRef active_set
, vote_set
;
5278 LLVMValueRef all
, none
, tmp
;
5280 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
5281 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5283 all
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
5284 none
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
5285 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
5286 tmp
= LLVMBuildOr(gallivm
->builder
, all
, none
, "");
5287 emit_data
->output
[emit_data
->chan
] =
5288 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5291 static void ballot_emit(
5292 const struct lp_build_tgsi_action
*action
,
5293 struct lp_build_tgsi_context
*bld_base
,
5294 struct lp_build_emit_data
*emit_data
)
5296 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5297 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
5300 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
5301 tmp
= si_emit_ballot(ctx
, tmp
);
5302 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
5304 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
5305 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
5308 static void read_invoc_fetch_args(
5309 struct lp_build_tgsi_context
*bld_base
,
5310 struct lp_build_emit_data
*emit_data
)
5312 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
5313 0, emit_data
->src_chan
);
5315 /* Always read the source invocation (= lane) from the X channel. */
5316 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
5318 emit_data
->arg_count
= 2;
5321 static void read_lane_emit(
5322 const struct lp_build_tgsi_action
*action
,
5323 struct lp_build_tgsi_context
*bld_base
,
5324 struct lp_build_emit_data
*emit_data
)
5326 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5327 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
5329 /* We currently have no other way to prevent LLVM from lifting the icmp
5330 * calls to a dominating basic block.
5332 emit_optimization_barrier(ctx
, &emit_data
->args
[0]);
5334 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
) {
5335 emit_data
->args
[i
] = LLVMBuildBitCast(builder
, emit_data
->args
[i
],
5339 emit_data
->output
[emit_data
->chan
] =
5340 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
5341 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
5342 AC_FUNC_ATTR_READNONE
|
5343 AC_FUNC_ATTR_CONVERGENT
);
5346 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5347 struct lp_build_emit_data
*emit_data
)
5349 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5350 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5354 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5356 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
5357 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
5361 /* Emit one vertex from the geometry shader */
5362 static void si_llvm_emit_vertex(
5363 const struct lp_build_tgsi_action
*action
,
5364 struct lp_build_tgsi_context
*bld_base
,
5365 struct lp_build_emit_data
*emit_data
)
5367 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5368 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5369 struct si_shader
*shader
= ctx
->shader
;
5370 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5371 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5372 struct lp_build_if_state if_state
;
5373 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5374 ctx
->param_gs2vs_offset
);
5375 LLVMValueRef gs_next_vertex
;
5376 LLVMValueRef can_emit
, kill
;
5377 unsigned chan
, offset
;
5381 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5383 /* Write vertex attribute values to GSVS ring */
5384 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5385 ctx
->gs_next_vertex
[stream
],
5388 /* If this thread has already emitted the declared maximum number of
5389 * vertices, skip the write: excessive vertex emissions are not
5390 * supposed to have any effect.
5392 * If the shader has no writes to memory, kill it instead. This skips
5393 * further memory loads and may allow LLVM to skip to the end
5396 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
5397 LLVMConstInt(ctx
->i32
,
5398 shader
->selector
->gs_max_out_vertices
, 0), "");
5400 bool use_kill
= !info
->writes_memory
;
5402 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5403 LLVMConstReal(ctx
->f32
, 1.0f
),
5404 LLVMConstReal(ctx
->f32
, -1.0f
));
5406 ac_build_kill(&ctx
->ac
, kill
);
5408 lp_build_if(&if_state
, gallivm
, can_emit
);
5412 for (i
= 0; i
< info
->num_outputs
; i
++) {
5413 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
5415 for (chan
= 0; chan
< 4; chan
++) {
5416 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
5417 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
5420 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5421 LLVMValueRef voffset
=
5422 LLVMConstInt(ctx
->i32
, offset
*
5423 shader
->selector
->gs_max_out_vertices
, 0);
5426 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5427 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5429 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5431 ac_build_buffer_store_dword(&ctx
->ac
,
5432 ctx
->gsvs_ring
[stream
],
5434 voffset
, soffset
, 0,
5439 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5442 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5444 /* Signal vertex emission */
5445 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
5446 LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
));
5448 lp_build_endif(&if_state
);
5451 /* Cut one primitive from the geometry shader */
5452 static void si_llvm_emit_primitive(
5453 const struct lp_build_tgsi_action
*action
,
5454 struct lp_build_tgsi_context
*bld_base
,
5455 struct lp_build_emit_data
*emit_data
)
5457 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5460 /* Signal primitive cut */
5461 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5462 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
5463 LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
));
5466 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5467 struct lp_build_tgsi_context
*bld_base
,
5468 struct lp_build_emit_data
*emit_data
)
5470 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5471 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5473 /* SI only (thanks to a hw bug workaround):
5474 * The real barrier instruction isn’t needed, because an entire patch
5475 * always fits into a single wave.
5477 if (HAVE_LLVM
>= 0x0309 &&
5478 ctx
->screen
->b
.chip_class
== SI
&&
5479 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5480 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
5484 lp_build_intrinsic(gallivm
->builder
,
5485 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5486 : "llvm.AMDGPU.barrier.local",
5487 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
5490 static const struct lp_build_tgsi_action tex_action
= {
5491 .fetch_args
= tex_fetch_args
,
5492 .emit
= build_tex_intrinsic
,
5495 static const struct lp_build_tgsi_action interp_action
= {
5496 .fetch_args
= interp_fetch_args
,
5497 .emit
= build_interp_intrinsic
,
5500 static void si_create_function(struct si_shader_context
*ctx
,
5502 LLVMTypeRef
*returns
, unsigned num_returns
,
5503 LLVMTypeRef
*params
, unsigned num_params
,
5508 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5509 params
, num_params
);
5510 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5511 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5513 for (i
= 0; i
<= last_sgpr
; ++i
) {
5514 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5516 /* The combination of:
5520 * allows the optimization passes to move loads and reduces
5521 * SGPR spilling significantly.
5523 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5524 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5525 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
5526 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
5528 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5531 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5532 "no-signed-zeros-fp-math",
5535 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5536 /* These were copied from some LLVM test. */
5537 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5538 "less-precise-fpmad",
5540 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5543 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5546 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5552 static void declare_streamout_params(struct si_shader_context
*ctx
,
5553 struct pipe_stream_output_info
*so
,
5554 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5555 unsigned *num_params
)
5559 /* Streamout SGPRs. */
5560 if (so
->num_outputs
) {
5561 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5562 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5564 ctx
->param_streamout_config
= *num_params
- 1;
5566 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5568 /* A streamout buffer offset is loaded if the stride is non-zero. */
5569 for (i
= 0; i
< 4; i
++) {
5573 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5577 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5579 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5582 case LLVMIntegerTypeKind
:
5583 return LLVMGetIntTypeWidth(type
) / 8;
5584 case LLVMFloatTypeKind
:
5586 case LLVMPointerTypeKind
:
5588 case LLVMVectorTypeKind
:
5589 return LLVMGetVectorSize(type
) *
5590 llvm_get_type_size(LLVMGetElementType(type
));
5591 case LLVMArrayTypeKind
:
5592 return LLVMGetArrayLength(type
) *
5593 llvm_get_type_size(LLVMGetElementType(type
));
5600 static void declare_tess_lds(struct si_shader_context
*ctx
)
5602 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5604 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5605 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, ctx
->i32_0
,
5606 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5610 static unsigned si_get_max_workgroup_size(struct si_shader
*shader
)
5612 const unsigned *properties
= shader
->selector
->info
.properties
;
5613 unsigned max_work_group_size
=
5614 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5615 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5616 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5618 if (!max_work_group_size
) {
5619 /* This is a variable group size compute shader,
5620 * compile it for the maximum possible group size.
5622 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5624 return max_work_group_size
;
5627 static void create_function(struct si_shader_context
*ctx
)
5629 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5630 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5631 struct si_shader
*shader
= ctx
->shader
;
5632 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_MAX_ATTRIBS
], v3i32
;
5633 LLVMTypeRef returns
[16+32*4];
5634 unsigned i
, last_sgpr
, num_params
= 0, num_return_sgprs
;
5635 unsigned num_returns
= 0;
5636 unsigned num_prolog_vgprs
= 0;
5638 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5640 params
[ctx
->param_rw_buffers
= num_params
++] =
5641 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5642 params
[ctx
->param_const_buffers
= num_params
++] =
5643 const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5644 params
[ctx
->param_samplers
= num_params
++] =
5645 const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5646 params
[ctx
->param_images
= num_params
++] =
5647 const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5648 params
[ctx
->param_shader_buffers
= num_params
++] =
5649 const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5651 switch (ctx
->type
) {
5652 case PIPE_SHADER_VERTEX
:
5653 params
[ctx
->param_vertex_buffers
= num_params
++] =
5654 const_array(ctx
->v16i8
, SI_NUM_VERTEX_BUFFERS
);
5655 params
[ctx
->param_base_vertex
= num_params
++] = ctx
->i32
;
5656 params
[ctx
->param_start_instance
= num_params
++] = ctx
->i32
;
5657 params
[ctx
->param_draw_id
= num_params
++] = ctx
->i32
;
5658 params
[ctx
->param_vs_state_bits
= num_params
++] = ctx
->i32
;
5660 if (shader
->key
.as_es
) {
5661 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5662 } else if (shader
->key
.as_ls
) {
5663 /* no extra parameters */
5665 if (shader
->is_gs_copy_shader
)
5666 num_params
= ctx
->param_rw_buffers
+ 1;
5668 /* The locations of the other parameters are assigned dynamically. */
5669 declare_streamout_params(ctx
, &shader
->selector
->so
,
5670 params
, ctx
->i32
, &num_params
);
5673 last_sgpr
= num_params
-1;
5676 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5677 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5678 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5679 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5681 if (!shader
->is_gs_copy_shader
) {
5682 /* Vertex load indices. */
5683 ctx
->param_vertex_index0
= num_params
;
5685 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5686 params
[num_params
++] = ctx
->i32
;
5688 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5690 /* PrimitiveID output. */
5691 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5692 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5693 returns
[num_returns
++] = ctx
->f32
;
5697 case PIPE_SHADER_TESS_CTRL
:
5698 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
5699 params
[ctx
->param_tcs_out_lds_offsets
= num_params
++] = ctx
->i32
;
5700 params
[ctx
->param_tcs_out_lds_layout
= num_params
++] = ctx
->i32
;
5701 params
[ctx
->param_vs_state_bits
= num_params
++] = ctx
->i32
;
5702 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
5703 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
5704 last_sgpr
= num_params
- 1;
5707 params
[ctx
->param_tcs_patch_id
= num_params
++] = ctx
->i32
;
5708 params
[ctx
->param_tcs_rel_ids
= num_params
++] = ctx
->i32
;
5710 /* param_tcs_offchip_offset and param_tcs_factor_offset are
5711 * placed after the user SGPRs.
5713 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
5714 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5716 for (i
= 0; i
< 3; i
++)
5717 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5720 case PIPE_SHADER_TESS_EVAL
:
5721 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
5723 if (shader
->key
.as_es
) {
5724 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
5725 params
[num_params
++] = ctx
->i32
;
5726 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5728 params
[num_params
++] = ctx
->i32
;
5729 declare_streamout_params(ctx
, &shader
->selector
->so
,
5730 params
, ctx
->i32
, &num_params
);
5731 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
5733 last_sgpr
= num_params
- 1;
5736 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5737 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5738 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5739 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5741 /* PrimitiveID output. */
5742 if (!shader
->key
.as_es
)
5743 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5744 returns
[num_returns
++] = ctx
->f32
;
5747 case PIPE_SHADER_GEOMETRY
:
5748 params
[ctx
->param_gs2vs_offset
= num_params
++] = ctx
->i32
;
5749 params
[ctx
->param_gs_wave_id
= num_params
++] = ctx
->i32
;
5750 last_sgpr
= num_params
- 1;
5753 params
[ctx
->param_gs_vtx0_offset
= num_params
++] = ctx
->i32
;
5754 params
[ctx
->param_gs_vtx1_offset
= num_params
++] = ctx
->i32
;
5755 params
[ctx
->param_gs_prim_id
= num_params
++] = ctx
->i32
;
5756 params
[ctx
->param_gs_vtx2_offset
= num_params
++] = ctx
->i32
;
5757 params
[ctx
->param_gs_vtx3_offset
= num_params
++] = ctx
->i32
;
5758 params
[ctx
->param_gs_vtx4_offset
= num_params
++] = ctx
->i32
;
5759 params
[ctx
->param_gs_vtx5_offset
= num_params
++] = ctx
->i32
;
5760 params
[ctx
->param_gs_instance_id
= num_params
++] = ctx
->i32
;
5763 case PIPE_SHADER_FRAGMENT
:
5764 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5765 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5766 last_sgpr
= SI_PARAM_PRIM_MASK
;
5767 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5768 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5769 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5770 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5771 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5772 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5773 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5774 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5775 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5776 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5777 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5778 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5779 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5780 shader
->info
.face_vgpr_index
= 20;
5781 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5782 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5783 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5784 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5786 /* Color inputs from the prolog. */
5787 if (shader
->selector
->info
.colors_read
) {
5788 unsigned num_color_elements
=
5789 util_bitcount(shader
->selector
->info
.colors_read
);
5791 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5792 for (i
= 0; i
< num_color_elements
; i
++)
5793 params
[num_params
++] = ctx
->f32
;
5795 num_prolog_vgprs
+= num_color_elements
;
5798 /* Outputs for the epilog. */
5799 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5802 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5803 shader
->selector
->info
.writes_z
+
5804 shader
->selector
->info
.writes_stencil
+
5805 shader
->selector
->info
.writes_samplemask
+
5806 1 /* SampleMaskIn */;
5808 num_returns
= MAX2(num_returns
,
5810 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5812 for (i
= 0; i
< num_return_sgprs
; i
++)
5813 returns
[i
] = ctx
->i32
;
5814 for (; i
< num_returns
; i
++)
5815 returns
[i
] = ctx
->f32
;
5818 case PIPE_SHADER_COMPUTE
:
5819 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5820 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5821 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5822 last_sgpr
= SI_PARAM_BLOCK_ID
;
5824 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5825 num_params
= SI_PARAM_THREAD_ID
+ 1;
5828 assert(0 && "unimplemented shader");
5832 assert(num_params
<= ARRAY_SIZE(params
));
5834 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5835 num_params
, last_sgpr
);
5837 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5838 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5839 ctx
->separate_prolog
) {
5840 si_llvm_add_attribute(ctx
->main_fn
,
5841 "InitialPSInputAddr",
5842 S_0286D0_PERSP_SAMPLE_ENA(1) |
5843 S_0286D0_PERSP_CENTER_ENA(1) |
5844 S_0286D0_PERSP_CENTROID_ENA(1) |
5845 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5846 S_0286D0_LINEAR_CENTER_ENA(1) |
5847 S_0286D0_LINEAR_CENTROID_ENA(1) |
5848 S_0286D0_FRONT_FACE_ENA(1) |
5849 S_0286D0_POS_FIXED_PT_ENA(1));
5850 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5851 si_llvm_add_attribute(ctx
->main_fn
,
5852 "amdgpu-max-work-group-size",
5853 si_get_max_workgroup_size(shader
));
5856 shader
->info
.num_input_sgprs
= 0;
5857 shader
->info
.num_input_vgprs
= 0;
5859 for (i
= 0; i
<= last_sgpr
; ++i
)
5860 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5862 for (; i
< num_params
; ++i
)
5863 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5865 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5866 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5868 if (!ctx
->screen
->has_ds_bpermute
&&
5870 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5871 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5872 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5873 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5874 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5875 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5877 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5878 LLVMArrayType(ctx
->i32
, 64),
5882 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5883 ctx
->type
== PIPE_SHADER_TESS_CTRL
)
5884 declare_tess_lds(ctx
);
5888 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5891 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5893 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5894 LLVMBuilderRef builder
= gallivm
->builder
;
5896 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5897 ctx
->param_rw_buffers
);
5899 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5900 ctx
->shader
->key
.as_es
) ||
5901 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5902 ctx
->shader
->key
.as_es
) ||
5903 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5905 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5907 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5910 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5913 if (ctx
->shader
->is_gs_copy_shader
) {
5914 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5917 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5918 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5919 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5920 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5921 LLVMValueRef base_ring
;
5923 base_ring
= ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5925 /* The conceptual layout of the GSVS ring is
5926 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5927 * but the real memory layout is swizzled across
5929 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5931 * Override the buffer descriptor accordingly.
5933 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5934 uint64_t stream_offset
= 0;
5936 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5937 unsigned num_components
;
5939 unsigned num_records
;
5940 LLVMValueRef ring
, tmp
;
5942 num_components
= sel
->info
.num_stream_output_components
[stream
];
5943 if (!num_components
)
5946 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5948 /* Limit on the stride field for <= CIK. */
5949 assert(stride
< (1 << 14));
5953 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5954 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5955 tmp
= LLVMBuildAdd(builder
, tmp
,
5956 LLVMConstInt(ctx
->i64
,
5957 stream_offset
, 0), "");
5958 stream_offset
+= stride
* 64;
5960 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5961 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5962 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5963 tmp
= LLVMBuildOr(builder
, tmp
,
5964 LLVMConstInt(ctx
->i32
,
5965 S_008F04_STRIDE(stride
) |
5966 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5967 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5968 ring
= LLVMBuildInsertElement(builder
, ring
,
5969 LLVMConstInt(ctx
->i32
, num_records
, 0),
5970 LLVMConstInt(ctx
->i32
, 2, 0), "");
5971 ring
= LLVMBuildInsertElement(builder
, ring
,
5972 LLVMConstInt(ctx
->i32
,
5973 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5974 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5975 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5976 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5977 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5978 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5979 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5980 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5981 S_008F0C_ADD_TID_ENABLE(1),
5983 LLVMConstInt(ctx
->i32
, 3, 0), "");
5984 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v16i8
, "");
5986 ctx
->gsvs_ring
[stream
] = ring
;
5991 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5992 LLVMValueRef param_rw_buffers
,
5993 unsigned param_pos_fixed_pt
)
5995 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5996 LLVMBuilderRef builder
= gallivm
->builder
;
5997 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5999 /* Use the fixed-point gl_FragCoord input.
6000 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
6001 * per coordinate to get the repeating effect.
6003 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
6004 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
6006 /* Load the buffer descriptor. */
6007 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
6008 desc
= ac_build_indexed_load_const(&ctx
->ac
, param_rw_buffers
, slot
);
6010 /* The stipple pattern is 32x32, each row has 32 bits. */
6011 offset
= LLVMBuildMul(builder
, address
[1],
6012 LLVMConstInt(ctx
->i32
, 4, 0), "");
6013 row
= buffer_load_const(ctx
, desc
, offset
);
6014 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
6015 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
6016 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
6018 /* The intrinsic kills the thread if arg < 0. */
6019 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
6020 LLVMConstReal(ctx
->f32
, -1), "");
6021 ac_build_kill(&ctx
->ac
, bit
);
6024 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
6025 struct si_shader_config
*conf
,
6026 unsigned symbol_offset
)
6029 const unsigned char *config
=
6030 ac_shader_binary_config_start(binary
, symbol_offset
);
6031 bool really_needs_scratch
= false;
6033 /* LLVM adds SGPR spills to the scratch size.
6034 * Find out if we really need the scratch buffer.
6036 for (i
= 0; i
< binary
->reloc_count
; i
++) {
6037 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
6039 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
6040 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6041 really_needs_scratch
= true;
6046 /* XXX: We may be able to emit some of these values directly rather than
6047 * extracting fields to be emitted later.
6050 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
6051 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
6052 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
6054 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
6055 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
6056 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
6057 case R_00B848_COMPUTE_PGM_RSRC1
:
6058 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
6059 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
6060 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
6061 conf
->rsrc1
= value
;
6063 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
6064 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
6066 case R_00B84C_COMPUTE_PGM_RSRC2
:
6067 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
6068 conf
->rsrc2
= value
;
6070 case R_0286CC_SPI_PS_INPUT_ENA
:
6071 conf
->spi_ps_input_ena
= value
;
6073 case R_0286D0_SPI_PS_INPUT_ADDR
:
6074 conf
->spi_ps_input_addr
= value
;
6076 case R_0286E8_SPI_TMPRING_SIZE
:
6077 case R_00B860_COMPUTE_TMPRING_SIZE
:
6078 /* WAVESIZE is in units of 256 dwords. */
6079 if (really_needs_scratch
)
6080 conf
->scratch_bytes_per_wave
=
6081 G_00B860_WAVESIZE(value
) * 256 * 4;
6083 case 0x4: /* SPILLED_SGPRS */
6084 conf
->spilled_sgprs
= value
;
6086 case 0x8: /* SPILLED_VGPRS */
6087 conf
->spilled_vgprs
= value
;
6091 static bool printed
;
6094 fprintf(stderr
, "Warning: LLVM emitted unknown "
6095 "config register: 0x%x\n", reg
);
6103 if (!conf
->spi_ps_input_addr
)
6104 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
6107 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
6108 struct si_shader
*shader
,
6109 struct si_shader_config
*config
,
6110 uint64_t scratch_va
)
6113 uint32_t scratch_rsrc_dword0
= scratch_va
;
6114 uint32_t scratch_rsrc_dword1
=
6115 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
6117 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
6120 if (HAVE_LLVM
>= 0x0309)
6121 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
6123 scratch_rsrc_dword1
|=
6124 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
6126 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
6127 const struct ac_shader_reloc
*reloc
=
6128 &shader
->binary
.relocs
[i
];
6129 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
6130 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6131 &scratch_rsrc_dword0
, 4);
6132 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6133 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6134 &scratch_rsrc_dword1
, 4);
6139 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
6141 unsigned size
= shader
->binary
.code_size
;
6144 size
+= shader
->prolog
->binary
.code_size
;
6145 if (shader
->previous_stage
)
6146 size
+= shader
->previous_stage
->binary
.code_size
;
6148 size
+= shader
->epilog
->binary
.code_size
;
6152 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
6154 const struct ac_shader_binary
*prolog
=
6155 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
6156 const struct ac_shader_binary
*previous_stage
=
6157 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
6158 const struct ac_shader_binary
*epilog
=
6159 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
6160 const struct ac_shader_binary
*mainb
= &shader
->binary
;
6161 unsigned bo_size
= si_get_shader_binary_size(shader
) +
6162 (!epilog
? mainb
->rodata_size
: 0);
6165 assert(!prolog
|| !prolog
->rodata_size
);
6166 assert(!previous_stage
|| !previous_stage
->rodata_size
);
6167 assert((!prolog
&& !previous_stage
&& !epilog
) || !mainb
->rodata_size
);
6168 assert(!epilog
|| !epilog
->rodata_size
);
6170 /* GFX9 can fetch at most 128 bytes past the end of the shader.
6171 * Prevent VM faults.
6173 if (sscreen
->b
.chip_class
>= GFX9
)
6176 r600_resource_reference(&shader
->bo
, NULL
);
6177 shader
->bo
= (struct r600_resource
*)
6178 pipe_buffer_create(&sscreen
->b
.b
, 0,
6179 PIPE_USAGE_IMMUTABLE
,
6180 align(bo_size
, SI_CPDMA_ALIGNMENT
));
6185 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
6186 PIPE_TRANSFER_READ_WRITE
|
6187 PIPE_TRANSFER_UNSYNCHRONIZED
);
6190 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
6191 ptr
+= prolog
->code_size
;
6193 if (previous_stage
) {
6194 util_memcpy_cpu_to_le32(ptr
, previous_stage
->code
,
6195 previous_stage
->code_size
);
6196 ptr
+= previous_stage
->code_size
;
6199 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
6200 ptr
+= mainb
->code_size
;
6203 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
6204 else if (mainb
->rodata_size
> 0)
6205 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
6207 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
6211 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
6212 struct pipe_debug_callback
*debug
,
6213 const char *name
, FILE *file
)
6218 if (binary
->disasm_string
) {
6219 fprintf(file
, "Shader %s disassembly:\n", name
);
6220 fprintf(file
, "%s", binary
->disasm_string
);
6222 if (debug
&& debug
->debug_message
) {
6223 /* Very long debug messages are cut off, so send the
6224 * disassembly one line at a time. This causes more
6225 * overhead, but on the plus side it simplifies
6226 * parsing of resulting logs.
6228 pipe_debug_message(debug
, SHADER_INFO
,
6229 "Shader Disassembly Begin");
6231 line
= binary
->disasm_string
;
6233 p
= util_strchrnul(line
, '\n');
6237 pipe_debug_message(debug
, SHADER_INFO
,
6238 "%.*s", count
, line
);
6246 pipe_debug_message(debug
, SHADER_INFO
,
6247 "Shader Disassembly End");
6250 fprintf(file
, "Shader %s binary:\n", name
);
6251 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
6252 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
6253 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
6254 binary
->code
[i
+ 1], binary
->code
[i
]);
6259 static void si_shader_dump_stats(struct si_screen
*sscreen
,
6260 struct si_shader
*shader
,
6261 struct pipe_debug_callback
*debug
,
6264 bool check_debug_option
)
6266 struct si_shader_config
*conf
= &shader
->config
;
6267 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
6268 unsigned code_size
= si_get_shader_binary_size(shader
);
6269 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
6270 unsigned lds_per_wave
= 0;
6271 unsigned max_simd_waves
= 10;
6273 /* Compute LDS usage for PS. */
6274 switch (processor
) {
6275 case PIPE_SHADER_FRAGMENT
:
6276 /* The minimum usage per wave is (num_inputs * 48). The maximum
6277 * usage is (num_inputs * 48 * 16).
6278 * We can get anything in between and it varies between waves.
6280 * The 48 bytes per input for a single primitive is equal to
6281 * 4 bytes/component * 4 components/input * 3 points.
6283 * Other stages don't know the size at compile time or don't
6284 * allocate LDS per wave, but instead they do it per thread group.
6286 lds_per_wave
= conf
->lds_size
* lds_increment
+
6287 align(num_inputs
* 48, lds_increment
);
6289 case PIPE_SHADER_COMPUTE
:
6290 if (shader
->selector
) {
6291 unsigned max_workgroup_size
=
6292 si_get_max_workgroup_size(shader
);
6293 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
6294 DIV_ROUND_UP(max_workgroup_size
, 64);
6299 /* Compute the per-SIMD wave counts. */
6300 if (conf
->num_sgprs
) {
6301 if (sscreen
->b
.chip_class
>= VI
)
6302 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
6304 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
6307 if (conf
->num_vgprs
)
6308 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
6310 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
6311 * 16KB makes some SIMDs unoccupied). */
6313 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
6315 if (!check_debug_option
||
6316 r600_can_dump_shader(&sscreen
->b
, processor
)) {
6317 if (processor
== PIPE_SHADER_FRAGMENT
) {
6318 fprintf(file
, "*** SHADER CONFIG ***\n"
6319 "SPI_PS_INPUT_ADDR = 0x%04x\n"
6320 "SPI_PS_INPUT_ENA = 0x%04x\n",
6321 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
6324 fprintf(file
, "*** SHADER STATS ***\n"
6327 "Spilled SGPRs: %d\n"
6328 "Spilled VGPRs: %d\n"
6329 "Private memory VGPRs: %d\n"
6330 "Code Size: %d bytes\n"
6332 "Scratch: %d bytes per wave\n"
6334 "********************\n\n\n",
6335 conf
->num_sgprs
, conf
->num_vgprs
,
6336 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
6337 conf
->private_mem_vgprs
, code_size
,
6338 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6342 pipe_debug_message(debug
, SHADER_INFO
,
6343 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6344 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6345 "Spilled VGPRs: %d PrivMem VGPRs: %d",
6346 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6347 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6348 max_simd_waves
, conf
->spilled_sgprs
,
6349 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
6352 const char *si_get_shader_name(struct si_shader
*shader
, unsigned processor
)
6354 switch (processor
) {
6355 case PIPE_SHADER_VERTEX
:
6356 if (shader
->key
.as_es
)
6357 return "Vertex Shader as ES";
6358 else if (shader
->key
.as_ls
)
6359 return "Vertex Shader as LS";
6361 return "Vertex Shader as VS";
6362 case PIPE_SHADER_TESS_CTRL
:
6363 return "Tessellation Control Shader";
6364 case PIPE_SHADER_TESS_EVAL
:
6365 if (shader
->key
.as_es
)
6366 return "Tessellation Evaluation Shader as ES";
6368 return "Tessellation Evaluation Shader as VS";
6369 case PIPE_SHADER_GEOMETRY
:
6370 if (shader
->is_gs_copy_shader
)
6371 return "GS Copy Shader as VS";
6373 return "Geometry Shader";
6374 case PIPE_SHADER_FRAGMENT
:
6375 return "Pixel Shader";
6376 case PIPE_SHADER_COMPUTE
:
6377 return "Compute Shader";
6379 return "Unknown Shader";
6383 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6384 struct pipe_debug_callback
*debug
, unsigned processor
,
6385 FILE *file
, bool check_debug_option
)
6387 if (!check_debug_option
||
6388 r600_can_dump_shader(&sscreen
->b
, processor
))
6389 si_dump_shader_key(processor
, shader
, file
);
6391 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
6392 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6393 si_get_shader_name(shader
, processor
));
6394 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6397 if (!check_debug_option
||
6398 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6399 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6400 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6403 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6404 debug
, "prolog", file
);
6405 if (shader
->previous_stage
)
6406 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
6407 debug
, "previous stage", file
);
6409 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6412 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6413 debug
, "epilog", file
);
6414 fprintf(file
, "\n");
6417 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
6418 check_debug_option
);
6421 int si_compile_llvm(struct si_screen
*sscreen
,
6422 struct ac_shader_binary
*binary
,
6423 struct si_shader_config
*conf
,
6424 LLVMTargetMachineRef tm
,
6426 struct pipe_debug_callback
*debug
,
6431 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6433 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6434 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6436 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6437 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6438 ac_dump_module(mod
);
6439 fprintf(stderr
, "\n");
6443 if (sscreen
->record_llvm_ir
) {
6444 char *ir
= LLVMPrintModuleToString(mod
);
6445 binary
->llvm_ir_string
= strdup(ir
);
6446 LLVMDisposeMessage(ir
);
6449 if (!si_replace_shader(count
, binary
)) {
6450 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6455 si_shader_binary_read_config(binary
, conf
, 0);
6457 /* Enable 64-bit and 16-bit denormals, because there is no performance
6460 * If denormals are enabled, all floating-point output modifiers are
6463 * Don't enable denormals for 32-bit floats, because:
6464 * - Floating-point output modifiers would be ignored by the hw.
6465 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6466 * have to stop using those.
6467 * - SI & CI would be very slow.
6469 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6471 FREE(binary
->config
);
6472 FREE(binary
->global_symbol_offsets
);
6473 binary
->config
= NULL
;
6474 binary
->global_symbol_offsets
= NULL
;
6476 /* Some shaders can't have rodata because their binaries can be
6479 if (binary
->rodata_size
&&
6480 (processor
== PIPE_SHADER_VERTEX
||
6481 processor
== PIPE_SHADER_TESS_CTRL
||
6482 processor
== PIPE_SHADER_TESS_EVAL
||
6483 processor
== PIPE_SHADER_FRAGMENT
)) {
6484 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6491 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6493 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6494 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6496 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6499 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6501 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6502 LLVMTargetMachineRef tm
,
6503 struct si_shader_selector
*gs_selector
,
6504 struct pipe_debug_callback
*debug
)
6506 struct si_shader_context ctx
;
6507 struct si_shader
*shader
;
6508 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6509 LLVMBuilderRef builder
;
6510 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
6511 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6512 struct si_shader_output_values
*outputs
;
6513 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6516 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6521 shader
= CALLOC_STRUCT(si_shader
);
6528 shader
->selector
= gs_selector
;
6529 shader
->is_gs_copy_shader
= true;
6531 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6532 ctx
.shader
= shader
;
6533 ctx
.type
= PIPE_SHADER_VERTEX
;
6535 builder
= gallivm
->builder
;
6537 create_function(&ctx
);
6538 preload_ring_buffers(&ctx
);
6540 LLVMValueRef voffset
=
6541 lp_build_mul_imm(uint
, LLVMGetParam(ctx
.main_fn
,
6542 ctx
.param_vertex_id
), 4);
6544 /* Fetch the vertex stream ID.*/
6545 LLVMValueRef stream_id
;
6547 if (gs_selector
->so
.num_outputs
)
6548 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
6550 stream_id
= ctx
.i32_0
;
6552 /* Fill in output information. */
6553 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6554 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
6555 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
6557 for (int chan
= 0; chan
< 4; chan
++) {
6558 outputs
[i
].vertex_stream
[chan
] =
6559 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
6563 LLVMBasicBlockRef end_bb
;
6564 LLVMValueRef switch_inst
;
6566 end_bb
= LLVMAppendBasicBlockInContext(gallivm
->context
, ctx
.main_fn
, "end");
6567 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
6569 for (int stream
= 0; stream
< 4; stream
++) {
6570 LLVMBasicBlockRef bb
;
6573 if (!gsinfo
->num_stream_output_components
[stream
])
6576 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
6579 bb
= LLVMInsertBasicBlockInContext(gallivm
->context
, end_bb
, "out");
6580 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
6581 LLVMPositionBuilderAtEnd(builder
, bb
);
6583 /* Fetch vertex data from GSVS ring */
6585 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6586 for (unsigned chan
= 0; chan
< 4; chan
++) {
6587 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
6588 outputs
[i
].vertex_stream
[chan
] != stream
) {
6589 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
6593 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
6594 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
6597 outputs
[i
].values
[chan
] =
6598 ac_build_buffer_load(&ctx
.ac
,
6599 ctx
.gsvs_ring
[0], 1,
6601 soffset
, 0, 1, 1, true);
6605 /* Streamout and exports. */
6606 if (gs_selector
->so
.num_outputs
) {
6607 si_llvm_emit_streamout(&ctx
, outputs
,
6608 gsinfo
->num_outputs
,
6613 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6615 LLVMBuildBr(builder
, end_bb
);
6618 LLVMPositionBuilderAtEnd(builder
, end_bb
);
6620 LLVMBuildRetVoid(gallivm
->builder
);
6622 /* Dump LLVM IR before any optimization passes */
6623 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6624 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6625 ac_dump_module(ctx
.gallivm
.module
);
6627 si_llvm_finalize_module(&ctx
,
6628 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6630 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6631 &ctx
.shader
->config
, ctx
.tm
,
6633 debug
, PIPE_SHADER_GEOMETRY
,
6636 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6637 fprintf(stderr
, "GS Copy Shader:\n");
6638 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6639 PIPE_SHADER_GEOMETRY
, stderr
, true);
6640 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6643 si_llvm_dispose(&ctx
);
6654 static void si_dump_shader_key_vs(struct si_shader_key
*key
,
6655 struct si_vs_prolog_bits
*prolog
,
6656 const char *prefix
, FILE *f
)
6658 fprintf(f
, " %s.instance_divisors = {", prefix
);
6659 for (int i
= 0; i
< ARRAY_SIZE(prolog
->instance_divisors
); i
++) {
6660 fprintf(f
, !i
? "%u" : ", %u",
6661 prolog
->instance_divisors
[i
]);
6665 fprintf(f
, " mono.vs.fix_fetch = {");
6666 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
6667 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
6671 static void si_dump_shader_key(unsigned processor
, struct si_shader
*shader
,
6674 struct si_shader_key
*key
= &shader
->key
;
6676 fprintf(f
, "SHADER KEY\n");
6678 switch (processor
) {
6679 case PIPE_SHADER_VERTEX
:
6680 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
6681 "part.vs.prolog", f
);
6682 fprintf(f
, " as_es = %u\n", key
->as_es
);
6683 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6684 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n",
6685 key
->part
.vs
.epilog
.export_prim_id
);
6688 case PIPE_SHADER_TESS_CTRL
:
6689 if (shader
->selector
->screen
->b
.chip_class
>= GFX9
) {
6690 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
6691 "part.tcs.ls_prolog", f
);
6693 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6694 fprintf(f
, " mono.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.ff_tcs_inputs_to_copy
);
6697 case PIPE_SHADER_TESS_EVAL
:
6698 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6699 fprintf(f
, " as_es = %u\n", key
->as_es
);
6702 case PIPE_SHADER_GEOMETRY
:
6703 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6706 case PIPE_SHADER_COMPUTE
:
6709 case PIPE_SHADER_FRAGMENT
:
6710 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6711 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6712 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6713 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6714 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6715 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6716 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6717 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6718 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6719 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6720 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6721 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
6722 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6723 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6724 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6725 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6726 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6733 if ((processor
== PIPE_SHADER_GEOMETRY
||
6734 processor
== PIPE_SHADER_TESS_EVAL
||
6735 processor
== PIPE_SHADER_VERTEX
) &&
6736 !key
->as_es
&& !key
->as_ls
) {
6737 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6738 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6739 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6743 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6744 struct si_screen
*sscreen
,
6745 LLVMTargetMachineRef tm
)
6747 struct lp_build_tgsi_context
*bld_base
;
6748 struct lp_build_tgsi_action tmpl
= {};
6750 si_llvm_context_init(ctx
, sscreen
, tm
);
6752 bld_base
= &ctx
->bld_base
;
6753 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6755 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6756 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6757 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6759 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6760 bld_base
->op_actions
[TGSI_OPCODE_TEX_LZ
] = tex_action
;
6761 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6762 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6763 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6764 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6765 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6766 bld_base
->op_actions
[TGSI_OPCODE_TXF_LZ
] = tex_action
;
6767 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6768 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6769 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6770 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6771 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6772 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6773 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6774 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6776 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6777 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6778 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6779 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6780 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6781 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6783 tmpl
.fetch_args
= atomic_fetch_args
;
6784 tmpl
.emit
= atomic_emit
;
6785 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6786 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6787 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6788 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6789 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6790 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6791 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6792 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6793 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6794 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6795 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6796 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6797 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6798 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6799 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6800 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6801 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6802 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6803 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6804 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6806 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6808 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
6810 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6811 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6812 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6813 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6815 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6816 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6817 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6818 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6819 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6820 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6821 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6822 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
6823 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6825 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6826 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6827 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6830 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6832 struct si_shader
*shader
= ctx
->shader
;
6833 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6835 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6836 ctx
->type
== PIPE_SHADER_COMPUTE
||
6837 shader
->key
.as_es
||
6841 ac_eliminate_const_vs_outputs(&ctx
->ac
,
6843 shader
->info
.vs_output_param_offset
,
6845 &shader
->info
.nr_param_exports
);
6848 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
6850 ctx
->shader
->config
.private_mem_vgprs
= 0;
6852 /* Process all LLVM instructions. */
6853 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6855 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
6858 LLVMValueRef inst
= next
;
6859 next
= LLVMGetNextInstruction(next
);
6861 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
6864 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
6865 /* No idea why LLVM aligns allocas to 4 elements. */
6866 unsigned alignment
= LLVMGetAlignment(inst
);
6867 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
6868 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
6870 bb
= LLVMGetNextBasicBlock(bb
);
6874 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6875 struct si_shader
*shader
)
6877 struct si_shader_selector
*sel
= shader
->selector
;
6878 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6880 switch (ctx
->type
) {
6881 case PIPE_SHADER_VERTEX
:
6882 ctx
->load_input
= declare_input_vs
;
6883 if (shader
->key
.as_ls
)
6884 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6885 else if (shader
->key
.as_es
)
6886 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6888 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6890 case PIPE_SHADER_TESS_CTRL
:
6891 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6892 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6893 bld_base
->emit_store
= store_output_tcs
;
6894 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
6896 case PIPE_SHADER_TESS_EVAL
:
6897 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6898 if (shader
->key
.as_es
)
6899 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6901 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6903 case PIPE_SHADER_GEOMETRY
:
6904 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6905 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
6907 case PIPE_SHADER_FRAGMENT
:
6908 ctx
->load_input
= declare_input_fs
;
6909 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
6911 case PIPE_SHADER_COMPUTE
:
6912 ctx
->declare_memory_region
= declare_compute_memory
;
6915 assert(!"Unsupported shader type");
6919 create_function(ctx
);
6920 preload_ring_buffers(ctx
);
6922 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6924 for (i
= 0; i
< 4; i
++) {
6925 ctx
->gs_next_vertex
[i
] =
6926 lp_build_alloca(&ctx
->gallivm
,
6931 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6932 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6936 si_llvm_build_ret(ctx
, ctx
->return_value
);
6941 * Compute the VS prolog key, which contains all the information needed to
6942 * build the VS prolog function, and set shader->info bits where needed.
6944 * \param info Shader info of the vertex shader.
6945 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6946 * \param prolog_key Key of the VS prolog
6947 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6948 * \param key Output shader part key.
6950 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6951 unsigned num_input_sgprs
,
6952 const struct si_vs_prolog_bits
*prolog_key
,
6953 struct si_shader
*shader_out
,
6954 union si_shader_part_key
*key
)
6956 memset(key
, 0, sizeof(*key
));
6957 key
->vs_prolog
.states
= *prolog_key
;
6958 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6959 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6961 /* Set the instanceID flag. */
6962 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
6963 if (key
->vs_prolog
.states
.instance_divisors
[i
])
6964 shader_out
->info
.uses_instanceid
= true;
6968 * Compute the VS epilog key, which contains all the information needed to
6969 * build the VS epilog function, and set the PrimitiveID output offset.
6971 static void si_get_vs_epilog_key(struct si_shader
*shader
,
6972 struct si_vs_epilog_bits
*states
,
6973 union si_shader_part_key
*key
)
6975 memset(key
, 0, sizeof(*key
));
6976 key
->vs_epilog
.states
= *states
;
6978 /* Set up the PrimitiveID output. */
6979 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
6980 unsigned index
= shader
->selector
->info
.num_outputs
;
6981 unsigned offset
= shader
->info
.nr_param_exports
++;
6983 key
->vs_epilog
.prim_id_param_offset
= offset
;
6984 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
6985 shader
->info
.vs_output_param_offset
[index
] = offset
;
6990 * Compute the PS prolog key, which contains all the information needed to
6991 * build the PS prolog function, and set related bits in shader->config.
6993 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6994 union si_shader_part_key
*key
,
6995 bool separate_prolog
)
6997 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6999 memset(key
, 0, sizeof(*key
));
7000 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
7001 key
->ps_prolog
.colors_read
= info
->colors_read
;
7002 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
7003 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
7004 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
7005 (key
->ps_prolog
.colors_read
||
7006 key
->ps_prolog
.states
.force_persp_sample_interp
||
7007 key
->ps_prolog
.states
.force_linear_sample_interp
||
7008 key
->ps_prolog
.states
.force_persp_center_interp
||
7009 key
->ps_prolog
.states
.force_linear_center_interp
||
7010 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7011 key
->ps_prolog
.states
.bc_optimize_for_linear
);
7013 if (info
->colors_read
) {
7014 unsigned *color
= shader
->selector
->color_attr_index
;
7016 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
7017 /* BCOLORs are stored after the last input. */
7018 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
7019 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
7020 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
7023 for (unsigned i
= 0; i
< 2; i
++) {
7024 unsigned interp
= info
->input_interpolate
[color
[i
]];
7025 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
7027 if (!(info
->colors_read
& (0xf << i
*4)))
7030 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
7032 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
7033 interp
== TGSI_INTERPOLATE_COLOR
)
7034 interp
= TGSI_INTERPOLATE_CONSTANT
;
7037 case TGSI_INTERPOLATE_CONSTANT
:
7038 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
7040 case TGSI_INTERPOLATE_PERSPECTIVE
:
7041 case TGSI_INTERPOLATE_COLOR
:
7042 /* Force the interpolation location for colors here. */
7043 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
7044 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7045 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
7046 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7049 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7050 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
7051 shader
->config
.spi_ps_input_ena
|=
7052 S_0286CC_PERSP_SAMPLE_ENA(1);
7054 case TGSI_INTERPOLATE_LOC_CENTER
:
7055 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
7056 shader
->config
.spi_ps_input_ena
|=
7057 S_0286CC_PERSP_CENTER_ENA(1);
7059 case TGSI_INTERPOLATE_LOC_CENTROID
:
7060 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
7061 shader
->config
.spi_ps_input_ena
|=
7062 S_0286CC_PERSP_CENTROID_ENA(1);
7068 case TGSI_INTERPOLATE_LINEAR
:
7069 /* Force the interpolation location for colors here. */
7070 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
7071 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7072 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
7073 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7075 /* The VGPR assignment for non-monolithic shaders
7076 * works because InitialPSInputAddr is set on the
7077 * main shader and PERSP_PULL_MODEL is never used.
7080 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7081 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7082 separate_prolog
? 6 : 9;
7083 shader
->config
.spi_ps_input_ena
|=
7084 S_0286CC_LINEAR_SAMPLE_ENA(1);
7086 case TGSI_INTERPOLATE_LOC_CENTER
:
7087 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7088 separate_prolog
? 8 : 11;
7089 shader
->config
.spi_ps_input_ena
|=
7090 S_0286CC_LINEAR_CENTER_ENA(1);
7092 case TGSI_INTERPOLATE_LOC_CENTROID
:
7093 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7094 separate_prolog
? 10 : 13;
7095 shader
->config
.spi_ps_input_ena
|=
7096 S_0286CC_LINEAR_CENTROID_ENA(1);
7110 * Check whether a PS prolog is required based on the key.
7112 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
7114 return key
->ps_prolog
.colors_read
||
7115 key
->ps_prolog
.states
.force_persp_sample_interp
||
7116 key
->ps_prolog
.states
.force_linear_sample_interp
||
7117 key
->ps_prolog
.states
.force_persp_center_interp
||
7118 key
->ps_prolog
.states
.force_linear_center_interp
||
7119 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7120 key
->ps_prolog
.states
.bc_optimize_for_linear
||
7121 key
->ps_prolog
.states
.poly_stipple
;
7125 * Compute the PS epilog key, which contains all the information needed to
7126 * build the PS epilog function.
7128 static void si_get_ps_epilog_key(struct si_shader
*shader
,
7129 union si_shader_part_key
*key
)
7131 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7132 memset(key
, 0, sizeof(*key
));
7133 key
->ps_epilog
.colors_written
= info
->colors_written
;
7134 key
->ps_epilog
.writes_z
= info
->writes_z
;
7135 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
7136 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
7137 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
7141 * Build the GS prolog function. Rotate the input vertices for triangle strips
7144 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
7145 union si_shader_part_key
*key
)
7147 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
7148 const unsigned num_vgprs
= 8;
7149 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7150 LLVMBuilderRef builder
= gallivm
->builder
;
7151 LLVMTypeRef params
[32];
7152 LLVMTypeRef returns
[32];
7153 LLVMValueRef func
, ret
;
7155 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
7156 params
[i
] = ctx
->i32
;
7157 returns
[i
] = ctx
->i32
;
7160 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
7161 params
[num_sgprs
+ i
] = ctx
->i32
;
7162 returns
[num_sgprs
+ i
] = ctx
->f32
;
7165 /* Create the function. */
7166 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
7167 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
7168 func
= ctx
->main_fn
;
7170 /* Copy inputs to outputs. This should be no-op, as the registers match,
7171 * but it will prevent the compiler from overwriting them unintentionally.
7173 ret
= ctx
->return_value
;
7174 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
7175 LLVMValueRef p
= LLVMGetParam(func
, i
);
7176 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
7178 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
7179 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
7180 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
7181 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
7184 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
7185 /* Remap the input vertices for every other primitive. */
7186 const unsigned vtx_params
[6] = {
7194 LLVMValueRef prim_id
, rotate
;
7196 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
7197 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
7199 for (unsigned i
= 0; i
< 6; ++i
) {
7200 LLVMValueRef base
, rotated
, actual
;
7201 base
= LLVMGetParam(func
, vtx_params
[i
]);
7202 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
7203 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
7204 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
7205 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
7209 LLVMBuildRet(builder
, ret
);
7213 * Given a list of shader part functions, build a wrapper function that
7214 * runs them in sequence to form a monolithic shader.
7216 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
7217 LLVMValueRef
*parts
,
7221 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7222 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
7223 /* PS epilog has one arg per color component */
7224 LLVMTypeRef param_types
[48];
7225 LLVMValueRef out
[48];
7226 LLVMTypeRef function_type
;
7227 unsigned num_params
;
7229 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
7230 unsigned num_sgprs
, num_vgprs
;
7231 unsigned last_sgpr_param
;
7234 for (unsigned i
= 0; i
< num_parts
; ++i
) {
7235 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
7236 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
7239 /* The parameters of the wrapper function correspond to those of the
7240 * first part in terms of SGPRs and VGPRs, but we use the types of the
7241 * main part to get the right types. This is relevant for the
7242 * dereferenceable attribute on descriptor table pointers.
7247 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
7248 num_params
= LLVMCountParamTypes(function_type
);
7250 for (unsigned i
= 0; i
< num_params
; ++i
) {
7251 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
7253 if (ac_is_sgpr_param(param
)) {
7254 assert(num_vgprs
== 0);
7255 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7257 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7260 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
7263 last_sgpr_param
= 0;
7265 while (gprs
< num_sgprs
+ num_vgprs
) {
7266 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
7269 param_types
[num_params
] = LLVMTypeOf(param
);
7270 if (gprs
< num_sgprs
)
7271 last_sgpr_param
= num_params
;
7272 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
7275 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
7276 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
7277 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
7282 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
7284 /* Record the arguments of the function as if they were an output of
7290 for (unsigned i
= 0; i
< num_params
; ++i
) {
7291 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
7292 LLVMTypeRef param_type
= LLVMTypeOf(param
);
7293 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
7294 unsigned size
= llvm_get_type_size(param_type
) / 4;
7297 if (param_type
!= out_type
)
7298 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
7299 out
[num_out
++] = param
;
7301 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
7303 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7304 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
7305 param_type
= ctx
->i64
;
7308 if (param_type
!= vector_type
)
7309 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7311 for (unsigned j
= 0; j
< size
; ++j
)
7312 out
[num_out
++] = LLVMBuildExtractElement(
7313 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7316 if (i
<= last_sgpr_param
)
7317 num_out_sgpr
= num_out
;
7320 /* Now chain the parts. */
7321 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7322 LLVMValueRef in
[48];
7324 LLVMTypeRef ret_type
;
7325 unsigned out_idx
= 0;
7327 num_params
= LLVMCountParams(parts
[part
]);
7328 assert(num_params
<= ARRAY_SIZE(param_types
));
7330 /* Derive arguments for the next part from outputs of the
7333 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7335 LLVMTypeRef param_type
;
7337 unsigned param_size
;
7338 LLVMValueRef arg
= NULL
;
7340 param
= LLVMGetParam(parts
[part
], param_idx
);
7341 param_type
= LLVMTypeOf(param
);
7342 param_size
= llvm_get_type_size(param_type
) / 4;
7343 is_sgpr
= ac_is_sgpr_param(param
);
7346 #if HAVE_LLVM < 0x0400
7347 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7349 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7350 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7352 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7355 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7356 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7358 if (param_size
== 1)
7361 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7363 if (LLVMTypeOf(arg
) != param_type
) {
7364 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7365 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7366 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7368 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7372 in
[param_idx
] = arg
;
7373 out_idx
+= param_size
;
7376 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7377 ret_type
= LLVMTypeOf(ret
);
7379 /* Extract the returned GPRs. */
7383 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7384 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7386 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7388 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7390 LLVMBuildExtractValue(builder
, ret
, i
, "");
7392 out
[num_out
++] = val
;
7394 if (LLVMTypeOf(val
) == ctx
->i32
) {
7395 assert(num_out_sgpr
+ 1 == num_out
);
7396 num_out_sgpr
= num_out
;
7402 LLVMBuildRetVoid(builder
);
7405 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7406 LLVMTargetMachineRef tm
,
7407 struct si_shader
*shader
,
7409 struct pipe_debug_callback
*debug
)
7411 struct si_shader_selector
*sel
= shader
->selector
;
7412 struct si_shader_context ctx
;
7415 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7416 * conversion fails. */
7417 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7418 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7419 tgsi_dump(sel
->tokens
, 0);
7420 si_dump_streamout(&sel
->so
);
7423 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7424 si_llvm_context_set_tgsi(&ctx
, shader
);
7425 ctx
.separate_prolog
= !is_monolithic
;
7427 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
7428 sizeof(shader
->info
.vs_output_param_offset
));
7430 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7432 ctx
.load_system_value
= declare_system_value
;
7434 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7435 si_llvm_dispose(&ctx
);
7439 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7440 LLVMValueRef parts
[3];
7444 need_prolog
= sel
->vs_needs_prolog
;
7445 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7447 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7450 union si_shader_part_key prolog_key
;
7451 si_get_vs_prolog_key(&sel
->info
,
7452 shader
->info
.num_input_sgprs
,
7453 &shader
->key
.part
.vs
.prolog
,
7454 shader
, &prolog_key
);
7455 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7456 parts
[0] = ctx
.main_fn
;
7460 union si_shader_part_key epilog_key
;
7461 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7462 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7463 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7466 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7467 need_prolog
? 1 : 0);
7468 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7469 LLVMValueRef parts
[2];
7470 union si_shader_part_key epilog_key
;
7472 parts
[0] = ctx
.main_fn
;
7474 memset(&epilog_key
, 0, sizeof(epilog_key
));
7475 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7476 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7477 parts
[1] = ctx
.main_fn
;
7479 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7480 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7481 !shader
->key
.as_es
) {
7482 LLVMValueRef parts
[2];
7483 union si_shader_part_key epilog_key
;
7485 parts
[0] = ctx
.main_fn
;
7487 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7488 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7489 parts
[1] = ctx
.main_fn
;
7491 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7492 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7493 LLVMValueRef parts
[2];
7494 union si_shader_part_key prolog_key
;
7496 parts
[1] = ctx
.main_fn
;
7498 memset(&prolog_key
, 0, sizeof(prolog_key
));
7499 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7500 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7501 parts
[0] = ctx
.main_fn
;
7503 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7504 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7505 LLVMValueRef parts
[3];
7506 union si_shader_part_key prolog_key
;
7507 union si_shader_part_key epilog_key
;
7510 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7511 need_prolog
= si_need_ps_prolog(&prolog_key
);
7513 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7516 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7517 parts
[0] = ctx
.main_fn
;
7520 si_get_ps_epilog_key(shader
, &epilog_key
);
7521 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7522 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7524 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7527 /* Dump LLVM IR before any optimization passes */
7528 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7529 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7530 LLVMDumpModule(ctx
.gallivm
.module
);
7532 si_llvm_finalize_module(&ctx
,
7533 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7535 /* Post-optimization transformations and analysis. */
7536 si_eliminate_const_vs_outputs(&ctx
);
7538 if ((debug
&& debug
->debug_message
) ||
7539 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7540 si_count_scratch_private_memory(&ctx
);
7542 /* Compile to bytecode. */
7543 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7544 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
7545 si_llvm_dispose(&ctx
);
7547 fprintf(stderr
, "LLVM failed to compile shader\n");
7551 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7552 * LLVM 3.9svn has this bug.
7554 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7555 unsigned wave_size
= 64;
7556 unsigned max_vgprs
= 256;
7557 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7558 unsigned max_sgprs_per_wave
= 128;
7559 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7560 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7561 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7563 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7564 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7566 if (shader
->config
.num_sgprs
> max_sgprs
||
7567 shader
->config
.num_vgprs
> max_vgprs
) {
7568 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7569 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7570 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7571 max_sgprs
, max_vgprs
);
7573 /* Just terminate the process, because dependent
7574 * shaders can hang due to bad input data, but use
7575 * the env var to allow shader-db to work.
7577 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7582 /* Add the scratch offset to input SGPRs. */
7583 if (shader
->config
.scratch_bytes_per_wave
)
7584 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7586 /* Calculate the number of fragment input VGPRs. */
7587 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7588 shader
->info
.num_input_vgprs
= 0;
7589 shader
->info
.face_vgpr_index
= -1;
7591 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7592 shader
->info
.num_input_vgprs
+= 2;
7593 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7594 shader
->info
.num_input_vgprs
+= 2;
7595 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7596 shader
->info
.num_input_vgprs
+= 2;
7597 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7598 shader
->info
.num_input_vgprs
+= 3;
7599 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7600 shader
->info
.num_input_vgprs
+= 2;
7601 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7602 shader
->info
.num_input_vgprs
+= 2;
7603 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7604 shader
->info
.num_input_vgprs
+= 2;
7605 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7606 shader
->info
.num_input_vgprs
+= 1;
7607 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7608 shader
->info
.num_input_vgprs
+= 1;
7609 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7610 shader
->info
.num_input_vgprs
+= 1;
7611 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7612 shader
->info
.num_input_vgprs
+= 1;
7613 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7614 shader
->info
.num_input_vgprs
+= 1;
7615 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7616 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7617 shader
->info
.num_input_vgprs
+= 1;
7619 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7620 shader
->info
.num_input_vgprs
+= 1;
7621 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7622 shader
->info
.num_input_vgprs
+= 1;
7623 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7624 shader
->info
.num_input_vgprs
+= 1;
7631 * Create, compile and return a shader part (prolog or epilog).
7633 * \param sscreen screen
7634 * \param list list of shader parts of the same category
7635 * \param type shader type
7636 * \param key shader part key
7637 * \param prolog whether the part being requested is a prolog
7638 * \param tm LLVM target machine
7639 * \param debug debug callback
7640 * \param build the callback responsible for building the main function
7641 * \return non-NULL on success
7643 static struct si_shader_part
*
7644 si_get_shader_part(struct si_screen
*sscreen
,
7645 struct si_shader_part
**list
,
7646 enum pipe_shader_type type
,
7648 union si_shader_part_key
*key
,
7649 LLVMTargetMachineRef tm
,
7650 struct pipe_debug_callback
*debug
,
7651 void (*build
)(struct si_shader_context
*,
7652 union si_shader_part_key
*),
7655 struct si_shader_part
*result
;
7657 mtx_lock(&sscreen
->shader_parts_mutex
);
7659 /* Find existing. */
7660 for (result
= *list
; result
; result
= result
->next
) {
7661 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7662 mtx_unlock(&sscreen
->shader_parts_mutex
);
7667 /* Compile a new one. */
7668 result
= CALLOC_STRUCT(si_shader_part
);
7671 struct si_shader shader
= {};
7672 struct si_shader_context ctx
;
7673 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7675 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7676 ctx
.shader
= &shader
;
7680 case PIPE_SHADER_VERTEX
:
7682 case PIPE_SHADER_TESS_CTRL
:
7684 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7686 case PIPE_SHADER_GEOMETRY
:
7689 case PIPE_SHADER_FRAGMENT
:
7691 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7693 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7696 unreachable("bad shader part");
7702 si_llvm_finalize_module(&ctx
,
7703 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7705 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7706 gallivm
->module
, debug
, ctx
.type
, name
)) {
7712 result
->next
= *list
;
7716 si_llvm_dispose(&ctx
);
7717 mtx_unlock(&sscreen
->shader_parts_mutex
);
7722 * Build the vertex shader prolog function.
7724 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7725 * All inputs are returned unmodified. The vertex load indices are
7726 * stored after them, which will be used by the API VS for fetching inputs.
7728 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7733 * (VertexID + BaseVertex),
7734 * (InstanceID + StartInstance),
7735 * (InstanceID / 2 + StartInstance)
7737 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7738 union si_shader_part_key
*key
)
7740 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7741 LLVMTypeRef
*params
, *returns
;
7742 LLVMValueRef ret
, func
;
7743 int last_sgpr
, num_params
, num_returns
, i
;
7745 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7746 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7748 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7749 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7750 sizeof(LLVMTypeRef
));
7751 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7752 key
->vs_prolog
.last_input
+ 1) *
7753 sizeof(LLVMTypeRef
));
7757 /* Declare input and output SGPRs. */
7759 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7760 params
[num_params
++] = ctx
->i32
;
7761 returns
[num_returns
++] = ctx
->i32
;
7763 last_sgpr
= num_params
- 1;
7765 /* 4 preloaded VGPRs (outputs must be floats) */
7766 for (i
= 0; i
< 4; i
++) {
7767 params
[num_params
++] = ctx
->i32
;
7768 returns
[num_returns
++] = ctx
->f32
;
7771 /* Vertex load indices. */
7772 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7773 returns
[num_returns
++] = ctx
->f32
;
7775 /* Create the function. */
7776 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7777 num_params
, last_sgpr
);
7778 func
= ctx
->main_fn
;
7780 /* Copy inputs to outputs. This should be no-op, as the registers match,
7781 * but it will prevent the compiler from overwriting them unintentionally.
7783 ret
= ctx
->return_value
;
7784 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7785 LLVMValueRef p
= LLVMGetParam(func
, i
);
7786 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7788 for (i
= num_params
- 4; i
< num_params
; i
++) {
7789 LLVMValueRef p
= LLVMGetParam(func
, i
);
7790 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7791 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7794 /* Compute vertex load indices from instance divisors. */
7795 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7796 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7800 /* InstanceID / Divisor + StartInstance */
7801 index
= get_instance_index_for_fetch(ctx
,
7802 SI_SGPR_START_INSTANCE
,
7805 /* VertexID + BaseVertex */
7806 index
= LLVMBuildAdd(gallivm
->builder
,
7807 LLVMGetParam(func
, ctx
->param_vertex_id
),
7808 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7811 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7812 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7816 si_llvm_build_ret(ctx
, ret
);
7820 * Build the vertex shader epilog function. This is also used by the tessellation
7821 * evaluation shader compiled as VS.
7823 * The input is PrimitiveID.
7825 * If PrimitiveID is required by the pixel shader, export it.
7826 * Otherwise, do nothing.
7828 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7829 union si_shader_part_key
*key
)
7831 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7832 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7833 LLVMTypeRef params
[5];
7836 /* Declare input VGPRs. */
7837 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7838 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7839 assert(num_params
<= ARRAY_SIZE(params
));
7841 for (i
= 0; i
< num_params
; i
++)
7842 params
[i
] = ctx
->f32
;
7844 /* Create the function. */
7845 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7848 if (key
->vs_epilog
.states
.export_prim_id
) {
7849 struct lp_build_context
*base
= &bld_base
->base
;
7850 struct ac_export_args args
;
7852 args
.enabled_channels
= 0x1; /* enabled channels */
7853 args
.valid_mask
= 0; /* whether the EXEC mask is valid */
7854 args
.done
= 0; /* DONE bit */
7855 args
.target
= V_008DFC_SQ_EXP_PARAM
+
7856 key
->vs_epilog
.prim_id_param_offset
;
7857 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
7858 args
.out
[0] = LLVMGetParam(ctx
->main_fn
,
7859 VS_EPILOG_PRIMID_LOC
); /* X */
7860 args
.out
[1] = base
->undef
; /* Y */
7861 args
.out
[2] = base
->undef
; /* Z */
7862 args
.out
[3] = base
->undef
; /* W */
7864 ac_build_export(&ctx
->ac
, &args
);
7867 LLVMBuildRetVoid(gallivm
->builder
);
7870 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7871 LLVMTargetMachineRef tm
,
7872 struct si_shader
*shader
,
7873 struct pipe_debug_callback
*debug
,
7874 struct si_shader
*main_part
,
7875 const struct si_vs_prolog_bits
*key
)
7877 struct si_shader_selector
*vs
= main_part
->selector
;
7879 /* The prolog is a no-op if there are no inputs. */
7880 if (!vs
->vs_needs_prolog
)
7883 /* Get the prolog. */
7884 union si_shader_part_key prolog_key
;
7885 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7886 key
, shader
, &prolog_key
);
7889 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7890 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7891 debug
, si_build_vs_prolog_function
,
7892 "Vertex Shader Prolog");
7893 return shader
->prolog
!= NULL
;
7897 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7899 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7900 LLVMTargetMachineRef tm
,
7901 struct si_shader
*shader
,
7902 struct pipe_debug_callback
*debug
,
7903 struct si_vs_epilog_bits
*states
)
7905 union si_shader_part_key epilog_key
;
7907 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7909 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7910 PIPE_SHADER_VERTEX
, true,
7911 &epilog_key
, tm
, debug
,
7912 si_build_vs_epilog_function
,
7913 "Vertex Shader Epilog");
7914 return shader
->epilog
!= NULL
;
7918 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7920 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7921 LLVMTargetMachineRef tm
,
7922 struct si_shader
*shader
,
7923 struct pipe_debug_callback
*debug
)
7925 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7926 &shader
->key
.part
.vs
.prolog
))
7929 /* Get the epilog. */
7930 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
7931 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7932 &shader
->key
.part
.vs
.epilog
))
7939 * Select and compile (or reuse) TES parts (epilog).
7941 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
7942 LLVMTargetMachineRef tm
,
7943 struct si_shader
*shader
,
7944 struct pipe_debug_callback
*debug
)
7946 if (shader
->key
.as_es
)
7949 /* TES compiled as VS. */
7950 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7951 &shader
->key
.part
.tes
.epilog
);
7955 * Compile the TCS epilog function. This writes tesselation factors to memory
7956 * based on the output primitive type of the tesselator (determined by TES).
7958 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7959 union si_shader_part_key
*key
)
7961 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7962 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7963 LLVMTypeRef params
[16];
7965 int last_sgpr
, num_params
= 0;
7967 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
7968 params
[ctx
->param_rw_buffers
= num_params
++] =
7969 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
7970 params
[ctx
->param_const_buffers
= num_params
++] = ctx
->i64
;
7971 params
[ctx
->param_samplers
= num_params
++] = ctx
->i64
;
7972 params
[ctx
->param_images
= num_params
++] = ctx
->i64
;
7973 params
[ctx
->param_shader_buffers
= num_params
++] = ctx
->i64
;
7974 params
[ctx
->param_tcs_offchip_layout
= num_params
++] = ctx
->i32
;
7975 params
[ctx
->param_tcs_out_lds_offsets
= num_params
++] = ctx
->i32
;
7976 params
[ctx
->param_tcs_out_lds_layout
= num_params
++] = ctx
->i32
;
7977 params
[ctx
->param_vs_state_bits
= num_params
++] = ctx
->i32
;
7978 params
[ctx
->param_tcs_offchip_offset
= num_params
++] = ctx
->i32
;
7979 params
[ctx
->param_tcs_factor_offset
= num_params
++] = ctx
->i32
;
7980 last_sgpr
= num_params
- 1;
7982 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
7983 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
7984 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
7986 /* Create the function. */
7987 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
7988 declare_tess_lds(ctx
);
7989 func
= ctx
->main_fn
;
7991 si_write_tess_factors(bld_base
,
7992 LLVMGetParam(func
, last_sgpr
+ 1),
7993 LLVMGetParam(func
, last_sgpr
+ 2),
7994 LLVMGetParam(func
, last_sgpr
+ 3));
7996 LLVMBuildRetVoid(gallivm
->builder
);
8000 * Select and compile (or reuse) TCS parts (epilog).
8002 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
8003 LLVMTargetMachineRef tm
,
8004 struct si_shader
*shader
,
8005 struct pipe_debug_callback
*debug
)
8007 if (sscreen
->b
.chip_class
>= GFX9
) {
8008 struct si_shader
*ls_main_part
=
8009 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
8011 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
8012 &shader
->key
.part
.tcs
.ls_prolog
))
8015 shader
->previous_stage
= ls_main_part
;
8018 /* Get the epilog. */
8019 union si_shader_part_key epilog_key
;
8020 memset(&epilog_key
, 0, sizeof(epilog_key
));
8021 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
8023 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
8024 PIPE_SHADER_TESS_CTRL
, false,
8025 &epilog_key
, tm
, debug
,
8026 si_build_tcs_epilog_function
,
8027 "Tessellation Control Shader Epilog");
8028 return shader
->epilog
!= NULL
;
8032 * Select and compile (or reuse) GS parts (prolog).
8034 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
8035 LLVMTargetMachineRef tm
,
8036 struct si_shader
*shader
,
8037 struct pipe_debug_callback
*debug
)
8039 union si_shader_part_key prolog_key
;
8041 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
8044 memset(&prolog_key
, 0, sizeof(prolog_key
));
8045 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
8047 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
8048 PIPE_SHADER_GEOMETRY
, true,
8049 &prolog_key
, tm
, debug
,
8050 si_build_gs_prolog_function
,
8051 "Geometry Shader Prolog");
8052 return shader
->prolog
!= NULL
;
8056 * Build the pixel shader prolog function. This handles:
8057 * - two-side color selection and interpolation
8058 * - overriding interpolation parameters for the API PS
8059 * - polygon stippling
8061 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
8062 * overriden by other states. (e.g. per-sample interpolation)
8063 * Interpolated colors are stored after the preloaded VGPRs.
8065 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
8066 union si_shader_part_key
*key
)
8068 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8069 LLVMTypeRef
*params
;
8070 LLVMValueRef ret
, func
;
8071 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
8073 assert(si_need_ps_prolog(key
));
8075 /* Number of inputs + 8 color elements. */
8076 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
8077 key
->ps_prolog
.num_input_vgprs
+ 8) *
8078 sizeof(LLVMTypeRef
));
8080 /* Declare inputs. */
8082 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
8083 params
[num_params
++] = ctx
->i32
;
8084 last_sgpr
= num_params
- 1;
8086 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
8087 params
[num_params
++] = ctx
->f32
;
8089 /* Declare outputs (same as inputs + add colors if needed) */
8090 num_returns
= num_params
;
8091 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
8092 for (i
= 0; i
< num_color_channels
; i
++)
8093 params
[num_returns
++] = ctx
->f32
;
8095 /* Create the function. */
8096 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
8097 num_params
, last_sgpr
);
8098 func
= ctx
->main_fn
;
8100 /* Copy inputs to outputs. This should be no-op, as the registers match,
8101 * but it will prevent the compiler from overwriting them unintentionally.
8103 ret
= ctx
->return_value
;
8104 for (i
= 0; i
< num_params
; i
++) {
8105 LLVMValueRef p
= LLVMGetParam(func
, i
);
8106 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
8109 /* Polygon stippling. */
8110 if (key
->ps_prolog
.states
.poly_stipple
) {
8111 /* POS_FIXED_PT is always last. */
8112 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
8113 key
->ps_prolog
.num_input_vgprs
- 1;
8114 LLVMValueRef ptr
[2], list
;
8116 /* Get the pointer to rw buffers. */
8117 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
8118 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
8119 list
= lp_build_gather_values(gallivm
, ptr
, 2);
8120 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
8121 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
8122 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
8124 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
8127 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
8128 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8129 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8130 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
8132 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
8133 * The hw doesn't compute CENTROID if the whole wave only
8134 * contains fully-covered quads.
8136 * PRIM_MASK is after user SGPRs.
8138 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8139 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
8140 LLVMConstInt(ctx
->i32
, 31, 0), "");
8141 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
8144 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
8145 /* Read PERSP_CENTER. */
8146 for (i
= 0; i
< 2; i
++)
8147 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8148 /* Read PERSP_CENTROID. */
8149 for (i
= 0; i
< 2; i
++)
8150 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
8151 /* Select PERSP_CENTROID. */
8152 for (i
= 0; i
< 2; i
++) {
8153 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8154 center
[i
], centroid
[i
], "");
8155 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8156 tmp
, base
+ 4 + i
, "");
8159 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8160 /* Read LINEAR_CENTER. */
8161 for (i
= 0; i
< 2; i
++)
8162 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8163 /* Read LINEAR_CENTROID. */
8164 for (i
= 0; i
< 2; i
++)
8165 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
8166 /* Select LINEAR_CENTROID. */
8167 for (i
= 0; i
< 2; i
++) {
8168 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8169 center
[i
], centroid
[i
], "");
8170 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8171 tmp
, base
+ 10 + i
, "");
8176 /* Force per-sample interpolation. */
8177 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
8178 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8179 LLVMValueRef persp_sample
[2];
8181 /* Read PERSP_SAMPLE. */
8182 for (i
= 0; i
< 2; i
++)
8183 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
8184 /* Overwrite PERSP_CENTER. */
8185 for (i
= 0; i
< 2; i
++)
8186 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8187 persp_sample
[i
], base
+ 2 + i
, "");
8188 /* Overwrite PERSP_CENTROID. */
8189 for (i
= 0; i
< 2; i
++)
8190 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8191 persp_sample
[i
], base
+ 4 + i
, "");
8193 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
8194 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8195 LLVMValueRef linear_sample
[2];
8197 /* Read LINEAR_SAMPLE. */
8198 for (i
= 0; i
< 2; i
++)
8199 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
8200 /* Overwrite LINEAR_CENTER. */
8201 for (i
= 0; i
< 2; i
++)
8202 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8203 linear_sample
[i
], base
+ 8 + i
, "");
8204 /* Overwrite LINEAR_CENTROID. */
8205 for (i
= 0; i
< 2; i
++)
8206 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8207 linear_sample
[i
], base
+ 10 + i
, "");
8210 /* Force center interpolation. */
8211 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
8212 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8213 LLVMValueRef persp_center
[2];
8215 /* Read PERSP_CENTER. */
8216 for (i
= 0; i
< 2; i
++)
8217 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8218 /* Overwrite PERSP_SAMPLE. */
8219 for (i
= 0; i
< 2; i
++)
8220 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8221 persp_center
[i
], base
+ i
, "");
8222 /* Overwrite PERSP_CENTROID. */
8223 for (i
= 0; i
< 2; i
++)
8224 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8225 persp_center
[i
], base
+ 4 + i
, "");
8227 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
8228 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8229 LLVMValueRef linear_center
[2];
8231 /* Read LINEAR_CENTER. */
8232 for (i
= 0; i
< 2; i
++)
8233 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8234 /* Overwrite LINEAR_SAMPLE. */
8235 for (i
= 0; i
< 2; i
++)
8236 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8237 linear_center
[i
], base
+ 6 + i
, "");
8238 /* Overwrite LINEAR_CENTROID. */
8239 for (i
= 0; i
< 2; i
++)
8240 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8241 linear_center
[i
], base
+ 10 + i
, "");
8244 /* Interpolate colors. */
8245 for (i
= 0; i
< 2; i
++) {
8246 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
8247 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8248 key
->ps_prolog
.face_vgpr_index
;
8249 LLVMValueRef interp
[2], color
[4];
8250 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
8255 /* If the interpolation qualifier is not CONSTANT (-1). */
8256 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
8257 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8258 key
->ps_prolog
.color_interp_vgpr_index
[i
];
8260 /* Get the (i,j) updated by bc_optimize handling. */
8261 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8263 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8264 interp_vgpr
+ 1, "");
8265 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
8268 /* Use the absolute location of the input. */
8269 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8271 if (key
->ps_prolog
.states
.color_two_side
) {
8272 face
= LLVMGetParam(func
, face_vgpr
);
8273 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
8276 interp_fs_input(ctx
,
8277 key
->ps_prolog
.color_attr_index
[i
],
8278 TGSI_SEMANTIC_COLOR
, i
,
8279 key
->ps_prolog
.num_interp_inputs
,
8280 key
->ps_prolog
.colors_read
, interp_ij
,
8281 prim_mask
, face
, color
);
8284 unsigned chan
= u_bit_scan(&writemask
);
8285 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
8290 /* Tell LLVM to insert WQM instruction sequence when needed. */
8291 if (key
->ps_prolog
.wqm
) {
8292 LLVMAddTargetDependentFunctionAttr(func
,
8293 "amdgpu-ps-wqm-outputs", "");
8296 si_llvm_build_ret(ctx
, ret
);
8300 * Build the pixel shader epilog function. This handles everything that must be
8301 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8303 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8304 union si_shader_part_key
*key
)
8306 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8307 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8308 LLVMTypeRef params
[16+8*4+3];
8309 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8310 int last_sgpr
, num_params
= 0, i
;
8311 struct si_ps_exports exp
= {};
8313 /* Declare input SGPRs. */
8314 params
[ctx
->param_rw_buffers
= num_params
++] = ctx
->i64
;
8315 params
[ctx
->param_const_buffers
= num_params
++] = ctx
->i64
;
8316 params
[ctx
->param_samplers
= num_params
++] = ctx
->i64
;
8317 params
[ctx
->param_images
= num_params
++] = ctx
->i64
;
8318 params
[ctx
->param_shader_buffers
= num_params
++] = ctx
->i64
;
8319 assert(num_params
== SI_PARAM_ALPHA_REF
);
8320 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8321 last_sgpr
= SI_PARAM_ALPHA_REF
;
8323 /* Declare input VGPRs. */
8324 num_params
= (last_sgpr
+ 1) +
8325 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8326 key
->ps_epilog
.writes_z
+
8327 key
->ps_epilog
.writes_stencil
+
8328 key
->ps_epilog
.writes_samplemask
;
8330 num_params
= MAX2(num_params
,
8331 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8333 assert(num_params
<= ARRAY_SIZE(params
));
8335 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8336 params
[i
] = ctx
->f32
;
8338 /* Create the function. */
8339 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8340 /* Disable elimination of unused inputs. */
8341 si_llvm_add_attribute(ctx
->main_fn
,
8342 "InitialPSInputAddr", 0xffffff);
8344 /* Process colors. */
8345 unsigned vgpr
= last_sgpr
+ 1;
8346 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8347 int last_color_export
= -1;
8349 /* Find the last color export. */
8350 if (!key
->ps_epilog
.writes_z
&&
8351 !key
->ps_epilog
.writes_stencil
&&
8352 !key
->ps_epilog
.writes_samplemask
) {
8353 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8355 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8356 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8357 /* Just set this if any of the colorbuffers are enabled. */
8359 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8360 last_color_export
= 0;
8362 for (i
= 0; i
< 8; i
++)
8363 if (colors_written
& (1 << i
) &&
8364 (spi_format
>> (i
* 4)) & 0xf)
8365 last_color_export
= i
;
8369 while (colors_written
) {
8370 LLVMValueRef color
[4];
8371 int mrt
= u_bit_scan(&colors_written
);
8373 for (i
= 0; i
< 4; i
++)
8374 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8376 si_export_mrt_color(bld_base
, color
, mrt
,
8378 mrt
== last_color_export
, &exp
);
8381 /* Process depth, stencil, samplemask. */
8382 if (key
->ps_epilog
.writes_z
)
8383 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8384 if (key
->ps_epilog
.writes_stencil
)
8385 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8386 if (key
->ps_epilog
.writes_samplemask
)
8387 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8389 if (depth
|| stencil
|| samplemask
)
8390 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8391 else if (last_color_export
== -1)
8392 si_export_null(bld_base
);
8395 si_emit_ps_exports(ctx
, &exp
);
8398 LLVMBuildRetVoid(gallivm
->builder
);
8402 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8404 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8405 LLVMTargetMachineRef tm
,
8406 struct si_shader
*shader
,
8407 struct pipe_debug_callback
*debug
)
8409 union si_shader_part_key prolog_key
;
8410 union si_shader_part_key epilog_key
;
8412 /* Get the prolog. */
8413 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8415 /* The prolog is a no-op if these aren't set. */
8416 if (si_need_ps_prolog(&prolog_key
)) {
8418 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8419 PIPE_SHADER_FRAGMENT
, true,
8420 &prolog_key
, tm
, debug
,
8421 si_build_ps_prolog_function
,
8422 "Fragment Shader Prolog");
8423 if (!shader
->prolog
)
8427 /* Get the epilog. */
8428 si_get_ps_epilog_key(shader
, &epilog_key
);
8431 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8432 PIPE_SHADER_FRAGMENT
, false,
8433 &epilog_key
, tm
, debug
,
8434 si_build_ps_epilog_function
,
8435 "Fragment Shader Epilog");
8436 if (!shader
->epilog
)
8439 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8440 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8441 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8442 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8445 /* Set up the enable bits for per-sample shading if needed. */
8446 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8447 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8448 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8449 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8450 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8451 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8453 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8454 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8455 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8456 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8457 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8458 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8460 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8461 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8462 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8463 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8464 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8465 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8467 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8468 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8469 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8470 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8471 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8472 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8475 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8476 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8477 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8478 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8479 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8482 /* At least one pair of interpolation weights must be enabled. */
8483 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8484 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8485 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8488 /* The sample mask input is always enabled, because the API shader always
8489 * passes it through to the epilog. Disable it here if it's unused.
8491 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8492 !shader
->selector
->info
.reads_samplemask
)
8493 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8498 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8501 /* SPI barrier management bug:
8502 * Make sure we have at least 4k of LDS in use to avoid the bug.
8503 * It applies to workgroup sizes of more than one wavefront.
8505 if (sscreen
->b
.family
== CHIP_BONAIRE
||
8506 sscreen
->b
.family
== CHIP_KABINI
||
8507 sscreen
->b
.family
== CHIP_MULLINS
)
8508 *lds_size
= MAX2(*lds_size
, 8);
8511 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8512 struct si_shader
*shader
)
8514 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8516 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8518 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8519 si_get_max_workgroup_size(shader
) > 64) {
8520 si_multiwave_lds_size_workaround(sscreen
,
8521 &shader
->config
.lds_size
);
8525 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8526 struct si_shader
*shader
,
8527 struct pipe_debug_callback
*debug
)
8529 struct si_shader_selector
*sel
= shader
->selector
;
8530 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8533 /* LS, ES, VS are compiled on demand if the main part hasn't been
8534 * compiled for that stage.
8536 * Vertex shaders are compiled on demand when a vertex fetch
8537 * workaround must be applied.
8539 if (shader
->is_monolithic
) {
8540 /* Monolithic shader (compiled as a whole, has many variants,
8541 * may take a long time to compile).
8543 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8547 /* The shader consists of 2-3 parts:
8549 * - the middle part is the user shader, it has 1 variant only
8550 * and it was compiled during the creation of the shader
8552 * - the prolog part is inserted at the beginning
8553 * - the epilog part is inserted at the end
8555 * The prolog and epilog have many (but simple) variants.
8558 /* Copy the compiled TGSI shader data over. */
8559 shader
->is_binary_shared
= true;
8560 shader
->binary
= mainp
->binary
;
8561 shader
->config
= mainp
->config
;
8562 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8563 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8564 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8565 memcpy(shader
->info
.vs_output_param_offset
,
8566 mainp
->info
.vs_output_param_offset
,
8567 sizeof(mainp
->info
.vs_output_param_offset
));
8568 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8569 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8570 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8572 /* Select prologs and/or epilogs. */
8573 switch (sel
->type
) {
8574 case PIPE_SHADER_VERTEX
:
8575 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8578 case PIPE_SHADER_TESS_CTRL
:
8579 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8582 case PIPE_SHADER_TESS_EVAL
:
8583 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8586 case PIPE_SHADER_GEOMETRY
:
8587 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8590 case PIPE_SHADER_FRAGMENT
:
8591 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8594 /* Make sure we have at least as many VGPRs as there
8595 * are allocated inputs.
8597 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8598 shader
->info
.num_input_vgprs
);
8602 /* Update SGPR and VGPR counts. */
8603 if (shader
->prolog
) {
8604 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8605 shader
->prolog
->config
.num_sgprs
);
8606 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8607 shader
->prolog
->config
.num_vgprs
);
8609 if (shader
->previous_stage
) {
8610 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8611 shader
->previous_stage
->config
.num_sgprs
);
8612 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8613 shader
->previous_stage
->config
.num_vgprs
);
8614 shader
->config
.spilled_sgprs
=
8615 MAX2(shader
->config
.spilled_sgprs
,
8616 shader
->previous_stage
->config
.spilled_sgprs
);
8617 shader
->config
.spilled_vgprs
=
8618 MAX2(shader
->config
.spilled_vgprs
,
8619 shader
->previous_stage
->config
.spilled_vgprs
);
8620 shader
->config
.private_mem_vgprs
=
8621 MAX2(shader
->config
.private_mem_vgprs
,
8622 shader
->previous_stage
->config
.private_mem_vgprs
);
8623 shader
->config
.scratch_bytes_per_wave
=
8624 MAX2(shader
->config
.scratch_bytes_per_wave
,
8625 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8626 shader
->info
.uses_instanceid
|=
8627 shader
->previous_stage
->info
.uses_instanceid
;
8629 if (shader
->epilog
) {
8630 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8631 shader
->epilog
->config
.num_sgprs
);
8632 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8633 shader
->epilog
->config
.num_vgprs
);
8637 si_fix_resource_usage(sscreen
, shader
);
8638 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8642 r
= si_shader_binary_upload(sscreen
, shader
);
8644 fprintf(stderr
, "LLVM failed to upload shader\n");
8651 void si_shader_destroy(struct si_shader
*shader
)
8653 if (shader
->scratch_bo
)
8654 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8656 r600_resource_reference(&shader
->bo
, NULL
);
8658 if (!shader
->is_binary_shared
)
8659 radeon_shader_binary_clean(&shader
->binary
);
8661 free(shader
->shader_log
);