2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "ac_exp_param.h"
27 #include "compiler/nir/nir.h"
28 #include "compiler/nir/nir_serialize.h"
30 #include "si_shader_internal.h"
32 #include "tgsi/tgsi_from_mesa.h"
33 #include "tgsi/tgsi_strings.h"
34 #include "util/u_memory.h"
36 static const char scratch_rsrc_dword0_symbol
[] = "SCRATCH_RSRC_DWORD0";
38 static const char scratch_rsrc_dword1_symbol
[] = "SCRATCH_RSRC_DWORD1";
40 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
42 /** Whether the shader runs as a combination of multiple API shaders */
43 bool si_is_multi_part_shader(struct si_shader
*shader
)
45 if (shader
->selector
->screen
->info
.chip_class
<= GFX8
)
48 return shader
->key
.as_ls
|| shader
->key
.as_es
||
49 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
50 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
53 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
54 bool si_is_merged_shader(struct si_shader
*shader
)
56 return shader
->key
.as_ngg
|| si_is_multi_part_shader(shader
);
60 * Returns a unique index for a per-patch semantic name and index. The index
61 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
64 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
66 switch (semantic_name
) {
67 case TGSI_SEMANTIC_TESSOUTER
:
69 case TGSI_SEMANTIC_TESSINNER
:
71 case TGSI_SEMANTIC_PATCH
:
76 assert(!"invalid semantic name");
82 * Returns a unique index for a semantic name and index. The index must be
83 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
86 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
, unsigned is_varying
)
88 switch (semantic_name
) {
89 case TGSI_SEMANTIC_POSITION
:
91 case TGSI_SEMANTIC_GENERIC
:
92 /* Since some shader stages use the the highest used IO index
93 * to determine the size to allocate for inputs/outputs
94 * (in LDS, tess and GS rings). GENERIC should be placed right
95 * after POSITION to make that size as small as possible.
97 if (index
< SI_MAX_IO_GENERIC
)
100 assert(!"invalid generic index");
102 case TGSI_SEMANTIC_FOG
:
103 return SI_MAX_IO_GENERIC
+ 1;
104 case TGSI_SEMANTIC_COLOR
:
106 return SI_MAX_IO_GENERIC
+ 2 + index
;
107 case TGSI_SEMANTIC_BCOLOR
:
109 /* If it's a varying, COLOR and BCOLOR alias. */
111 return SI_MAX_IO_GENERIC
+ 2 + index
;
113 return SI_MAX_IO_GENERIC
+ 4 + index
;
114 case TGSI_SEMANTIC_TEXCOORD
:
116 return SI_MAX_IO_GENERIC
+ 6 + index
;
118 /* These are rarely used between LS and HS or ES and GS. */
119 case TGSI_SEMANTIC_CLIPDIST
:
121 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
122 case TGSI_SEMANTIC_CLIPVERTEX
:
123 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
124 case TGSI_SEMANTIC_PSIZE
:
125 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
127 /* These can't be written by LS, HS, and ES. */
128 case TGSI_SEMANTIC_LAYER
:
129 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
130 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
131 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
132 case TGSI_SEMANTIC_PRIMID
:
133 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
134 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
136 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
137 assert(!"invalid semantic name");
142 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
147 fprintf(stderr
, "STREAMOUT\n");
149 for (i
= 0; i
< so
->num_outputs
; i
++) {
150 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) << so
->output
[i
].start_component
;
151 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n", i
, so
->output
[i
].output_buffer
,
152 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
153 so
->output
[i
].register_index
, mask
& 1 ? "x" : "", mask
& 2 ? "y" : "",
154 mask
& 4 ? "z" : "", mask
& 8 ? "w" : "");
158 static void declare_streamout_params(struct si_shader_context
*ctx
,
159 struct pipe_stream_output_info
*so
)
161 if (ctx
->screen
->use_ngg_streamout
) {
162 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
163 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
167 /* Streamout SGPRs. */
168 if (so
->num_outputs
) {
169 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
170 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
171 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
172 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
175 /* A streamout buffer offset is loaded if the stride is non-zero. */
176 for (int i
= 0; i
< 4; i
++) {
180 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
184 unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
186 switch (shader
->selector
->type
) {
187 case PIPE_SHADER_VERTEX
:
188 case PIPE_SHADER_TESS_EVAL
:
189 return shader
->key
.as_ngg
? 128 : 0;
191 case PIPE_SHADER_TESS_CTRL
:
192 /* Return this so that LLVM doesn't remove s_barrier
193 * instructions on chips where we use s_barrier. */
194 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
196 case PIPE_SHADER_GEOMETRY
:
197 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
199 case PIPE_SHADER_COMPUTE
:
200 break; /* see below */
206 const unsigned *properties
= shader
->selector
->info
.properties
;
207 unsigned max_work_group_size
= properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
208 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
209 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
211 if (!max_work_group_size
) {
212 /* This is a variable group size compute shader,
213 * compile it for the maximum possible group size.
215 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
217 return max_work_group_size
;
220 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
, bool assign_params
)
222 enum ac_arg_type const_shader_buf_type
;
224 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
225 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
226 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
228 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
231 &ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
232 assign_params
? &ctx
->const_and_shader_buffers
: &ctx
->other_const_and_shader_buffers
);
235 static void declare_samplers_and_images(struct si_shader_context
*ctx
, bool assign_params
)
237 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
238 assign_params
? &ctx
->samplers_and_images
: &ctx
->other_samplers_and_images
);
241 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
, bool assign_params
)
243 declare_const_and_shader_buffers(ctx
, assign_params
);
244 declare_samplers_and_images(ctx
, assign_params
);
247 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
249 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->rw_buffers
);
250 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
251 &ctx
->bindless_samplers_and_images
);
254 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
256 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
257 if (!ctx
->shader
->is_gs_copy_shader
) {
258 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
259 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
260 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
264 static void declare_vb_descriptor_input_sgprs(struct si_shader_context
*ctx
)
266 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
268 unsigned num_vbos_in_user_sgprs
= ctx
->shader
->selector
->num_vbos_in_user_sgprs
;
269 if (num_vbos_in_user_sgprs
) {
270 unsigned user_sgprs
= ctx
->args
.num_sgprs_used
;
272 if (si_is_merged_shader(ctx
->shader
))
274 assert(user_sgprs
<= SI_SGPR_VS_VB_DESCRIPTOR_FIRST
);
276 /* Declare unused SGPRs to align VB descriptors to 4 SGPRs (hw requirement). */
277 for (unsigned i
= user_sgprs
; i
< SI_SGPR_VS_VB_DESCRIPTOR_FIRST
; i
++)
278 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
280 assert(num_vbos_in_user_sgprs
<= ARRAY_SIZE(ctx
->vb_descriptors
));
281 for (unsigned i
= 0; i
< num_vbos_in_user_sgprs
; i
++)
282 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 4, AC_ARG_INT
, &ctx
->vb_descriptors
[i
]);
286 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
, unsigned *num_prolog_vgprs
,
287 bool ngg_cull_shader
)
289 struct si_shader
*shader
= ctx
->shader
;
291 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
292 if (shader
->key
.as_ls
) {
293 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
294 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
295 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
296 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
298 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
299 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
301 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
302 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
303 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
304 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
305 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
307 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
308 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
309 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
312 if (!shader
->is_gs_copy_shader
) {
313 if (shader
->key
.opt
.ngg_culling
&& !ngg_cull_shader
) {
314 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->ngg_old_thread_id
);
317 /* Vertex load indices. */
318 if (shader
->selector
->info
.num_inputs
) {
319 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vertex_index0
);
320 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
321 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
323 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
327 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
, unsigned vs_blit_property
)
329 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
330 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
331 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
333 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
334 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
335 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
336 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
337 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
338 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
339 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
340 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
341 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
342 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
343 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
344 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
348 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
, bool ngg_cull_shader
)
350 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
351 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
352 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
353 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
355 if (ctx
->shader
->key
.opt
.ngg_culling
&& !ngg_cull_shader
) {
356 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->ngg_old_thread_id
);
362 /* Convenient merged shader definitions. */
363 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
364 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
367 void si_add_arg_checked(struct ac_shader_args
*args
, enum ac_arg_regfile file
, unsigned registers
,
368 enum ac_arg_type type
, struct ac_arg
*arg
, unsigned idx
)
370 assert(args
->arg_count
== idx
);
371 ac_add_arg(args
, file
, registers
, type
, arg
);
374 void si_create_function(struct si_shader_context
*ctx
, bool ngg_cull_shader
)
376 struct si_shader
*shader
= ctx
->shader
;
377 LLVMTypeRef returns
[AC_MAX_ARGS
];
378 unsigned i
, num_return_sgprs
;
379 unsigned num_returns
= 0;
380 unsigned num_prolog_vgprs
= 0;
381 unsigned type
= ctx
->type
;
382 unsigned vs_blit_property
= shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
384 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
386 /* Set MERGED shaders. */
387 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
388 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
389 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
390 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
391 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
395 case PIPE_SHADER_VERTEX
:
396 declare_global_desc_pointers(ctx
);
398 if (vs_blit_property
) {
399 declare_vs_blit_inputs(ctx
, vs_blit_property
);
402 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
, ngg_cull_shader
);
406 declare_per_stage_desc_pointers(ctx
, true);
407 declare_vs_specific_input_sgprs(ctx
);
408 if (!shader
->is_gs_copy_shader
)
409 declare_vb_descriptor_input_sgprs(ctx
);
411 if (shader
->key
.as_es
) {
412 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
413 } else if (shader
->key
.as_ls
) {
414 /* no extra parameters */
416 /* The locations of the other parameters are assigned dynamically. */
417 declare_streamout_params(ctx
, &shader
->selector
->so
);
421 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
, ngg_cull_shader
);
424 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
425 for (i
= 0; i
< 4; i
++)
426 returns
[num_returns
++] = ctx
->ac
.f32
; /* VGPRs */
430 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
431 declare_global_desc_pointers(ctx
);
432 declare_per_stage_desc_pointers(ctx
, true);
433 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
434 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
435 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
436 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
437 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
438 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
441 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
442 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
444 /* param_tcs_offchip_offset and param_tcs_factor_offset are
445 * placed after the user SGPRs.
447 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
448 returns
[num_returns
++] = ctx
->ac
.i32
; /* SGPRs */
449 for (i
= 0; i
< 11; i
++)
450 returns
[num_returns
++] = ctx
->ac
.f32
; /* VGPRs */
453 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
454 /* Merged stages have 8 system SGPRs at the beginning. */
455 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
456 declare_per_stage_desc_pointers(ctx
, ctx
->type
== PIPE_SHADER_TESS_CTRL
);
457 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
458 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
459 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
460 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
461 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
462 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
464 declare_global_desc_pointers(ctx
);
465 declare_per_stage_desc_pointers(ctx
, ctx
->type
== PIPE_SHADER_VERTEX
);
466 declare_vs_specific_input_sgprs(ctx
);
468 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
469 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
470 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
471 declare_vb_descriptor_input_sgprs(ctx
);
473 /* VGPRs (first TCS, then VS) */
474 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
475 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
477 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
478 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
, ngg_cull_shader
);
480 /* LS return values are inputs to the TCS main shader part. */
481 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
482 returns
[num_returns
++] = ctx
->ac
.i32
; /* SGPRs */
483 for (i
= 0; i
< 2; i
++)
484 returns
[num_returns
++] = ctx
->ac
.f32
; /* VGPRs */
486 /* TCS return values are inputs to the TCS epilog.
488 * param_tcs_offchip_offset, param_tcs_factor_offset,
489 * param_tcs_offchip_layout, and param_rw_buffers
490 * should be passed to the epilog.
492 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
493 returns
[num_returns
++] = ctx
->ac
.i32
; /* SGPRs */
494 for (i
= 0; i
< 11; i
++)
495 returns
[num_returns
++] = ctx
->ac
.f32
; /* VGPRs */
499 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
500 /* Merged stages have 8 system SGPRs at the beginning. */
501 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
502 declare_per_stage_desc_pointers(ctx
, ctx
->type
== PIPE_SHADER_GEOMETRY
);
504 if (ctx
->shader
->key
.as_ngg
)
505 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
507 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
509 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
510 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
511 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
512 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
513 &ctx
->small_prim_cull_info
); /* SPI_SHADER_PGM_LO_GS << 8 */
514 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
515 NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
517 declare_global_desc_pointers(ctx
);
518 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
519 declare_per_stage_desc_pointers(
520 ctx
, (ctx
->type
== PIPE_SHADER_VERTEX
|| ctx
->type
== PIPE_SHADER_TESS_EVAL
));
523 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
524 if (vs_blit_property
)
525 declare_vs_blit_inputs(ctx
, vs_blit_property
);
527 declare_vs_specific_input_sgprs(ctx
);
529 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
530 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
531 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
532 /* Declare as many input SGPRs as the VS has. */
535 if (ctx
->type
== PIPE_SHADER_VERTEX
)
536 declare_vb_descriptor_input_sgprs(ctx
);
538 /* VGPRs (first GS, then VS/TES) */
539 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
540 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
541 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
542 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
543 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
545 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
546 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
, ngg_cull_shader
);
547 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
548 declare_tes_input_vgprs(ctx
, ngg_cull_shader
);
551 if ((ctx
->shader
->key
.as_es
|| ngg_cull_shader
) &&
552 (ctx
->type
== PIPE_SHADER_VERTEX
|| ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
553 unsigned num_user_sgprs
, num_vgprs
;
555 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
556 /* For the NGG cull shader, add 1 SGPR to hold
557 * the vertex buffer pointer.
559 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
+ ngg_cull_shader
;
561 if (ngg_cull_shader
&& shader
->selector
->num_vbos_in_user_sgprs
) {
562 assert(num_user_sgprs
<= 8 + SI_SGPR_VS_VB_DESCRIPTOR_FIRST
);
564 SI_SGPR_VS_VB_DESCRIPTOR_FIRST
+ shader
->selector
->num_vbos_in_user_sgprs
* 4;
567 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
570 /* The NGG cull shader has to return all 9 VGPRs + the old thread ID.
572 * The normal merged ESGS shader only has to return the 5 VGPRs
575 num_vgprs
= ngg_cull_shader
? 10 : 5;
577 /* ES return values are inputs to GS. */
578 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
579 returns
[num_returns
++] = ctx
->ac
.i32
; /* SGPRs */
580 for (i
= 0; i
< num_vgprs
; i
++)
581 returns
[num_returns
++] = ctx
->ac
.f32
; /* VGPRs */
585 case PIPE_SHADER_TESS_EVAL
:
586 declare_global_desc_pointers(ctx
);
587 declare_per_stage_desc_pointers(ctx
, true);
588 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
589 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
590 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
592 if (shader
->key
.as_es
) {
593 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
594 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
595 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
597 declare_streamout_params(ctx
, &shader
->selector
->so
);
598 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
602 declare_tes_input_vgprs(ctx
, ngg_cull_shader
);
605 case PIPE_SHADER_GEOMETRY
:
606 declare_global_desc_pointers(ctx
);
607 declare_per_stage_desc_pointers(ctx
, true);
608 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
609 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
612 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
613 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
614 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
615 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
616 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
617 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
618 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
619 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
622 case PIPE_SHADER_FRAGMENT
:
623 declare_global_desc_pointers(ctx
);
624 declare_per_stage_desc_pointers(ctx
, true);
625 si_add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
, SI_PARAM_ALPHA_REF
);
626 si_add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.prim_mask
,
629 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
630 SI_PARAM_PERSP_SAMPLE
);
631 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_center
,
632 SI_PARAM_PERSP_CENTER
);
633 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_centroid
,
634 SI_PARAM_PERSP_CENTROID
);
635 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
, NULL
, SI_PARAM_PERSP_PULL_MODEL
);
636 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.linear_sample
,
637 SI_PARAM_LINEAR_SAMPLE
);
638 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.linear_center
,
639 SI_PARAM_LINEAR_CENTER
);
640 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.linear_centroid
,
641 SI_PARAM_LINEAR_CENTROID
);
642 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
, NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
643 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->args
.frag_pos
[0],
644 SI_PARAM_POS_X_FLOAT
);
645 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->args
.frag_pos
[1],
646 SI_PARAM_POS_Y_FLOAT
);
647 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->args
.frag_pos
[2],
648 SI_PARAM_POS_Z_FLOAT
);
649 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->args
.frag_pos
[3],
650 SI_PARAM_POS_W_FLOAT
);
651 shader
->info
.face_vgpr_index
= ctx
->args
.num_vgprs_used
;
652 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.front_face
,
653 SI_PARAM_FRONT_FACE
);
654 shader
->info
.ancillary_vgpr_index
= ctx
->args
.num_vgprs_used
;
655 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.ancillary
,
657 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->args
.sample_coverage
,
658 SI_PARAM_SAMPLE_COVERAGE
);
659 si_add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->pos_fixed_pt
,
660 SI_PARAM_POS_FIXED_PT
);
662 /* Color inputs from the prolog. */
663 if (shader
->selector
->info
.colors_read
) {
664 unsigned num_color_elements
= util_bitcount(shader
->selector
->info
.colors_read
);
666 for (i
= 0; i
< num_color_elements
; i
++)
667 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
669 num_prolog_vgprs
+= num_color_elements
;
672 /* Outputs for the epilog. */
673 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
674 num_returns
= num_return_sgprs
+ util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
675 shader
->selector
->info
.writes_z
+ shader
->selector
->info
.writes_stencil
+
676 shader
->selector
->info
.writes_samplemask
+ 1 /* SampleMaskIn */;
678 num_returns
= MAX2(num_returns
, num_return_sgprs
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
680 for (i
= 0; i
< num_return_sgprs
; i
++)
681 returns
[i
] = ctx
->ac
.i32
;
682 for (; i
< num_returns
; i
++)
683 returns
[i
] = ctx
->ac
.f32
;
686 case PIPE_SHADER_COMPUTE
:
687 declare_global_desc_pointers(ctx
);
688 declare_per_stage_desc_pointers(ctx
, true);
689 if (shader
->selector
->info
.uses_grid_size
)
690 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->args
.num_work_groups
);
691 if (shader
->selector
->info
.uses_block_size
&&
692 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
693 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
695 unsigned cs_user_data_dwords
=
696 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
697 if (cs_user_data_dwords
) {
698 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
, &ctx
->cs_user_data
);
701 /* Some descriptors can be in user SGPRs. */
702 /* Shader buffers in user SGPRs. */
703 for (unsigned i
= 0; i
< shader
->selector
->cs_num_shaderbufs_in_user_sgprs
; i
++) {
704 while (ctx
->args
.num_sgprs_used
% 4 != 0)
705 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
707 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 4, AC_ARG_INT
, &ctx
->cs_shaderbuf
[i
]);
709 /* Images in user SGPRs. */
710 for (unsigned i
= 0; i
< shader
->selector
->cs_num_images_in_user_sgprs
; i
++) {
711 unsigned num_sgprs
= shader
->selector
->info
.image_buffers
& (1 << i
) ? 4 : 8;
713 while (ctx
->args
.num_sgprs_used
% num_sgprs
!= 0)
714 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
716 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, num_sgprs
, AC_ARG_INT
, &ctx
->cs_image
[i
]);
719 /* Hardware SGPRs. */
720 for (i
= 0; i
< 3; i
++) {
721 if (shader
->selector
->info
.uses_block_id
[i
]) {
722 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.workgroup_ids
[i
]);
725 if (shader
->selector
->info
.uses_subgroup_info
)
726 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
728 /* Hardware VGPRs. */
729 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
, &ctx
->args
.local_invocation_ids
);
732 assert(0 && "unimplemented shader");
736 si_llvm_create_func(ctx
, ngg_cull_shader
? "ngg_cull_main" : "main", returns
, num_returns
,
737 si_get_max_workgroup_size(shader
));
739 /* Reserve register locations for VGPR inputs the PS prolog may need. */
740 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
741 ac_llvm_add_target_dep_function_attr(
742 ctx
->main_fn
, "InitialPSInputAddr",
743 S_0286D0_PERSP_SAMPLE_ENA(1) | S_0286D0_PERSP_CENTER_ENA(1) |
744 S_0286D0_PERSP_CENTROID_ENA(1) | S_0286D0_LINEAR_SAMPLE_ENA(1) |
745 S_0286D0_LINEAR_CENTER_ENA(1) | S_0286D0_LINEAR_CENTROID_ENA(1) |
746 S_0286D0_FRONT_FACE_ENA(1) | S_0286D0_ANCILLARY_ENA(1) | S_0286D0_POS_FIXED_PT_ENA(1));
749 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
750 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
752 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
753 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
755 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
756 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
757 /* The LSHS size is not known until draw time, so we append it
758 * at the end of whatever LDS use there may be in the rest of
759 * the shader (currently none, unless LLVM decides to do its
760 * own LDS-based lowering).
762 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
, LLVMArrayType(ctx
->ac
.i32
, 0),
763 "__lds_end", AC_ADDR_SPACE_LDS
);
764 LLVMSetAlignment(ctx
->ac
.lds
, 256);
766 ac_declare_lds_as_pointer(&ctx
->ac
);
770 /* Unlike radv, we override these arguments in the prolog, so to the
771 * API shader they appear as normal arguments.
773 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
774 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
775 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
776 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
777 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
778 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
782 /* For the UMR disassembler. */
783 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
784 #define DEBUGGER_NUM_MARKERS 5
786 static bool si_shader_binary_open(struct si_screen
*screen
, struct si_shader
*shader
,
787 struct ac_rtld_binary
*rtld
)
789 const struct si_shader_selector
*sel
= shader
->selector
;
790 const char *part_elfs
[5];
791 size_t part_sizes
[5];
792 unsigned num_parts
= 0;
794 #define add_part(shader_or_part) \
795 if (shader_or_part) { \
796 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
797 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
801 add_part(shader
->prolog
);
802 add_part(shader
->previous_stage
);
803 add_part(shader
->prolog2
);
805 add_part(shader
->epilog
);
809 struct ac_rtld_symbol lds_symbols
[2];
810 unsigned num_lds_symbols
= 0;
812 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
813 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
814 /* We add this symbol even on LLVM <= 8 to ensure that
815 * shader->config.lds_size is set correctly below.
817 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
818 sym
->name
= "esgs_ring";
819 sym
->size
= shader
->gs_info
.esgs_ring_size
* 4;
820 sym
->align
= 64 * 1024;
823 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
824 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
825 sym
->name
= "ngg_emit";
826 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
830 bool ok
= ac_rtld_open(
831 rtld
, (struct ac_rtld_open_info
){.info
= &screen
->info
,
834 .halt_at_entry
= screen
->options
.halt_shaders
,
836 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
837 .wave_size
= si_get_shader_wave_size(shader
),
838 .num_parts
= num_parts
,
839 .elf_ptrs
= part_elfs
,
840 .elf_sizes
= part_sizes
,
841 .num_shared_lds_symbols
= num_lds_symbols
,
842 .shared_lds_symbols
= lds_symbols
});
844 if (rtld
->lds_size
> 0) {
845 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
846 shader
->config
.lds_size
= align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
852 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
854 struct ac_rtld_binary rtld
;
855 si_shader_binary_open(screen
, shader
, &rtld
);
856 return rtld
.exec_size
;
859 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
861 uint64_t *scratch_va
= data
;
863 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
864 *value
= (uint32_t)*scratch_va
;
867 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
868 /* Enable scratch coalescing. */
869 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) | S_008F04_SWIZZLE_ENABLE(1);
876 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
879 struct ac_rtld_binary binary
;
880 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
883 si_resource_reference(&shader
->bo
, NULL
);
884 shader
->bo
= si_aligned_buffer_create(
885 &sscreen
->b
, sscreen
->info
.cpdma_prefetch_writes_memory
? 0 : SI_RESOURCE_FLAG_READ_ONLY
,
886 PIPE_USAGE_IMMUTABLE
, align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
), 256);
891 struct ac_rtld_upload_info u
= {};
893 u
.get_external_symbol
= si_get_external_symbol
;
894 u
.cb_data
= &scratch_va
;
895 u
.rx_va
= shader
->bo
->gpu_address
;
896 u
.rx_ptr
= sscreen
->ws
->buffer_map(
897 shader
->bo
->buf
, NULL
,
898 PIPE_TRANSFER_READ_WRITE
| PIPE_TRANSFER_UNSYNCHRONIZED
| RADEON_TRANSFER_TEMPORARY
);
902 bool ok
= ac_rtld_upload(&u
);
904 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
905 ac_rtld_close(&binary
);
910 static void si_shader_dump_disassembly(struct si_screen
*screen
,
911 const struct si_shader_binary
*binary
,
912 enum pipe_shader_type shader_type
, unsigned wave_size
,
913 struct pipe_debug_callback
*debug
, const char *name
,
916 struct ac_rtld_binary rtld_binary
;
918 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
919 .info
= &screen
->info
,
920 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
921 .wave_size
= wave_size
,
923 .elf_ptrs
= &binary
->elf_buffer
,
924 .elf_sizes
= &binary
->elf_size
}))
930 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
933 if (nbytes
> INT_MAX
)
936 if (debug
&& debug
->debug_message
) {
937 /* Very long debug messages are cut off, so send the
938 * disassembly one line at a time. This causes more
939 * overhead, but on the plus side it simplifies
940 * parsing of resulting logs.
942 pipe_debug_message(debug
, SHADER_INFO
, "Shader Disassembly Begin");
945 while (line
< nbytes
) {
946 int count
= nbytes
- line
;
947 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
949 count
= nl
- (disasm
+ line
);
952 pipe_debug_message(debug
, SHADER_INFO
, "%.*s", count
, disasm
+ line
);
958 pipe_debug_message(debug
, SHADER_INFO
, "Shader Disassembly End");
962 fprintf(file
, "Shader %s disassembly:\n", name
);
963 fprintf(file
, "%*s", (int)nbytes
, disasm
);
967 ac_rtld_close(&rtld_binary
);
970 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
972 struct si_screen
*sscreen
= shader
->selector
->screen
;
973 struct ac_shader_config
*conf
= &shader
->config
;
974 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
975 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
976 unsigned lds_per_wave
= 0;
977 unsigned max_simd_waves
;
979 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
981 /* Compute LDS usage for PS. */
982 switch (shader
->selector
->type
) {
983 case PIPE_SHADER_FRAGMENT
:
984 /* The minimum usage per wave is (num_inputs * 48). The maximum
985 * usage is (num_inputs * 48 * 16).
986 * We can get anything in between and it varies between waves.
988 * The 48 bytes per input for a single primitive is equal to
989 * 4 bytes/component * 4 components/input * 3 points.
991 * Other stages don't know the size at compile time or don't
992 * allocate LDS per wave, but instead they do it per thread group.
994 lds_per_wave
= conf
->lds_size
* lds_increment
+ align(num_inputs
* 48, lds_increment
);
996 case PIPE_SHADER_COMPUTE
:
997 if (shader
->selector
) {
998 unsigned max_workgroup_size
= si_get_max_workgroup_size(shader
);
999 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
1000 DIV_ROUND_UP(max_workgroup_size
, sscreen
->compute_wave_size
);
1006 /* Compute the per-SIMD wave counts. */
1007 if (conf
->num_sgprs
) {
1009 MIN2(max_simd_waves
, sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
1012 if (conf
->num_vgprs
) {
1013 /* Always print wave limits as Wave64, so that we can compare
1014 * Wave32 and Wave64 with shader-db fairly. */
1015 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
1016 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
1019 unsigned max_lds_per_simd
= sscreen
->info
.lds_size_per_workgroup
/ 4;
1021 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
1023 shader
->info
.max_simd_waves
= max_simd_waves
;
1026 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
, struct si_shader
*shader
,
1027 struct pipe_debug_callback
*debug
)
1029 const struct ac_shader_config
*conf
= &shader
->config
;
1031 if (screen
->options
.debug_disassembly
)
1032 si_shader_dump_disassembly(screen
, &shader
->binary
, shader
->selector
->type
,
1033 si_get_shader_wave_size(shader
), debug
, "main", NULL
);
1035 pipe_debug_message(debug
, SHADER_INFO
,
1036 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
1037 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
1038 "Spilled VGPRs: %d PrivMem VGPRs: %d",
1039 conf
->num_sgprs
, conf
->num_vgprs
, si_get_shader_binary_size(screen
, shader
),
1040 conf
->lds_size
, conf
->scratch_bytes_per_wave
, shader
->info
.max_simd_waves
,
1041 conf
->spilled_sgprs
, conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
1044 static void si_shader_dump_stats(struct si_screen
*sscreen
, struct si_shader
*shader
, FILE *file
,
1045 bool check_debug_option
)
1047 const struct ac_shader_config
*conf
= &shader
->config
;
1049 if (!check_debug_option
|| si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
1050 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
1052 "*** SHADER CONFIG ***\n"
1053 "SPI_PS_INPUT_ADDR = 0x%04x\n"
1054 "SPI_PS_INPUT_ENA = 0x%04x\n",
1055 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
1059 "*** SHADER STATS ***\n"
1062 "Spilled SGPRs: %d\n"
1063 "Spilled VGPRs: %d\n"
1064 "Private memory VGPRs: %d\n"
1065 "Code Size: %d bytes\n"
1067 "Scratch: %d bytes per wave\n"
1069 "********************\n\n\n",
1070 conf
->num_sgprs
, conf
->num_vgprs
, conf
->spilled_sgprs
, conf
->spilled_vgprs
,
1071 shader
->info
.private_mem_vgprs
, si_get_shader_binary_size(sscreen
, shader
),
1072 conf
->lds_size
, conf
->scratch_bytes_per_wave
, shader
->info
.max_simd_waves
);
1076 const char *si_get_shader_name(const struct si_shader
*shader
)
1078 switch (shader
->selector
->type
) {
1079 case PIPE_SHADER_VERTEX
:
1080 if (shader
->key
.as_es
)
1081 return "Vertex Shader as ES";
1082 else if (shader
->key
.as_ls
)
1083 return "Vertex Shader as LS";
1084 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
1085 return "Vertex Shader as Primitive Discard CS";
1086 else if (shader
->key
.as_ngg
)
1087 return "Vertex Shader as ESGS";
1089 return "Vertex Shader as VS";
1090 case PIPE_SHADER_TESS_CTRL
:
1091 return "Tessellation Control Shader";
1092 case PIPE_SHADER_TESS_EVAL
:
1093 if (shader
->key
.as_es
)
1094 return "Tessellation Evaluation Shader as ES";
1095 else if (shader
->key
.as_ngg
)
1096 return "Tessellation Evaluation Shader as ESGS";
1098 return "Tessellation Evaluation Shader as VS";
1099 case PIPE_SHADER_GEOMETRY
:
1100 if (shader
->is_gs_copy_shader
)
1101 return "GS Copy Shader as VS";
1103 return "Geometry Shader";
1104 case PIPE_SHADER_FRAGMENT
:
1105 return "Pixel Shader";
1106 case PIPE_SHADER_COMPUTE
:
1107 return "Compute Shader";
1109 return "Unknown Shader";
1113 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
1114 struct pipe_debug_callback
*debug
, FILE *file
, bool check_debug_option
)
1116 enum pipe_shader_type shader_type
= shader
->selector
->type
;
1118 if (!check_debug_option
|| si_can_dump_shader(sscreen
, shader_type
))
1119 si_dump_shader_key(shader
, file
);
1121 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
1122 if (shader
->previous_stage
&& shader
->previous_stage
->binary
.llvm_ir_string
) {
1123 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n", si_get_shader_name(shader
));
1124 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
1127 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n", si_get_shader_name(shader
));
1128 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
1131 if (!check_debug_option
||
1132 (si_can_dump_shader(sscreen
, shader_type
) && !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
1133 unsigned wave_size
= si_get_shader_wave_size(shader
);
1135 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
1138 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
, shader_type
, wave_size
, debug
,
1140 if (shader
->previous_stage
)
1141 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
, shader_type
,
1142 wave_size
, debug
, "previous stage", file
);
1143 if (shader
->prolog2
)
1144 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
, shader_type
, wave_size
,
1145 debug
, "prolog2", file
);
1147 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
, wave_size
, debug
, "main",
1151 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
, shader_type
, wave_size
, debug
,
1153 fprintf(file
, "\n");
1156 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
1159 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
1160 const struct si_vs_prolog_bits
*prolog
, const char *prefix
,
1163 fprintf(f
, " %s.instance_divisor_is_one = %u\n", prefix
, prolog
->instance_divisor_is_one
);
1164 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n", prefix
,
1165 prolog
->instance_divisor_is_fetched
);
1166 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n", prefix
,
1167 prolog
->unpack_instance_id_from_vertex_id
);
1168 fprintf(f
, " %s.ls_vgpr_fix = %u\n", prefix
, prolog
->ls_vgpr_fix
);
1170 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
1171 fprintf(f
, " mono.vs.fix_fetch = {");
1172 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
1173 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
1179 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
, fix
.u
.num_channels_m1
,
1185 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
1187 const struct si_shader_key
*key
= &shader
->key
;
1188 enum pipe_shader_type shader_type
= shader
->selector
->type
;
1190 fprintf(f
, "SHADER KEY\n");
1192 switch (shader_type
) {
1193 case PIPE_SHADER_VERTEX
:
1194 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
, "part.vs.prolog", f
);
1195 fprintf(f
, " as_es = %u\n", key
->as_es
);
1196 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
1197 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
1198 fprintf(f
, " mono.u.vs_export_prim_id = %u\n", key
->mono
.u
.vs_export_prim_id
);
1199 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n", key
->opt
.vs_as_prim_discard_cs
);
1200 fprintf(f
, " opt.cs_prim_type = %s\n", tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
1201 fprintf(f
, " opt.cs_indexed = %u\n", key
->opt
.cs_indexed
);
1202 fprintf(f
, " opt.cs_instancing = %u\n", key
->opt
.cs_instancing
);
1203 fprintf(f
, " opt.cs_primitive_restart = %u\n", key
->opt
.cs_primitive_restart
);
1204 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n", key
->opt
.cs_provoking_vertex_first
);
1205 fprintf(f
, " opt.cs_need_correct_orientation = %u\n", key
->opt
.cs_need_correct_orientation
);
1206 fprintf(f
, " opt.cs_cull_front = %u\n", key
->opt
.cs_cull_front
);
1207 fprintf(f
, " opt.cs_cull_back = %u\n", key
->opt
.cs_cull_back
);
1208 fprintf(f
, " opt.cs_cull_z = %u\n", key
->opt
.cs_cull_z
);
1209 fprintf(f
, " opt.cs_halfz_clip_space = %u\n", key
->opt
.cs_halfz_clip_space
);
1212 case PIPE_SHADER_TESS_CTRL
:
1213 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
1214 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
, "part.tcs.ls_prolog", f
);
1216 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
1217 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%" PRIx64
"\n",
1218 key
->mono
.u
.ff_tcs_inputs_to_copy
);
1221 case PIPE_SHADER_TESS_EVAL
:
1222 fprintf(f
, " as_es = %u\n", key
->as_es
);
1223 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
1224 fprintf(f
, " mono.u.vs_export_prim_id = %u\n", key
->mono
.u
.vs_export_prim_id
);
1227 case PIPE_SHADER_GEOMETRY
:
1228 if (shader
->is_gs_copy_shader
)
1231 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
1232 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
1233 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
, "part.gs.vs_prolog", f
);
1235 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n",
1236 key
->part
.gs
.prolog
.tri_strip_adj_fix
);
1237 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
1238 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
1241 case PIPE_SHADER_COMPUTE
:
1244 case PIPE_SHADER_FRAGMENT
:
1245 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
1246 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
1247 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
1248 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n",
1249 key
->part
.ps
.prolog
.force_persp_sample_interp
);
1250 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n",
1251 key
->part
.ps
.prolog
.force_linear_sample_interp
);
1252 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n",
1253 key
->part
.ps
.prolog
.force_persp_center_interp
);
1254 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n",
1255 key
->part
.ps
.prolog
.force_linear_center_interp
);
1256 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n",
1257 key
->part
.ps
.prolog
.bc_optimize_for_persp
);
1258 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n",
1259 key
->part
.ps
.prolog
.bc_optimize_for_linear
);
1260 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n",
1261 key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
1262 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n",
1263 key
->part
.ps
.epilog
.spi_shader_col_format
);
1264 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
1265 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
1266 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
1267 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
1268 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
1269 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n",
1270 key
->part
.ps
.epilog
.poly_line_smoothing
);
1271 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
1272 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n",
1273 key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
1274 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
1275 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
1276 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
1283 if ((shader_type
== PIPE_SHADER_GEOMETRY
|| shader_type
== PIPE_SHADER_TESS_EVAL
||
1284 shader_type
== PIPE_SHADER_VERTEX
) &&
1285 !key
->as_es
&& !key
->as_ls
) {
1286 fprintf(f
, " opt.kill_outputs = 0x%" PRIx64
"\n", key
->opt
.kill_outputs
);
1287 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
1288 if (shader_type
!= PIPE_SHADER_GEOMETRY
)
1289 fprintf(f
, " opt.ngg_culling = 0x%x\n", key
->opt
.ngg_culling
);
1293 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
1295 struct si_shader
*shader
= ctx
->shader
;
1296 struct si_shader_info
*info
= &shader
->selector
->info
;
1297 unsigned skip_vs_optim_mask
= 0;
1299 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&& ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
1300 shader
->key
.as_ls
|| shader
->key
.as_es
)
1303 /* Optimizing these outputs is not possible, since they might be overriden
1304 * at runtime with S_028644_PT_SPRITE_TEX. */
1305 for (int i
= 0; i
< info
->num_outputs
; i
++) {
1306 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_PCOORD
||
1307 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_TEXCOORD
) {
1308 skip_vs_optim_mask
|= 1u << shader
->info
.vs_output_param_offset
[i
];
1312 ac_optimize_vs_outputs(&ctx
->ac
, ctx
->main_fn
, shader
->info
.vs_output_param_offset
,
1313 info
->num_outputs
, skip_vs_optim_mask
,
1314 &shader
->info
.nr_param_exports
);
1317 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
1318 const struct si_vs_prolog_bits
*prolog_key
,
1319 const struct si_shader_key
*key
, bool ngg_cull_shader
)
1321 /* VGPR initialization fixup for Vega10 and Raven is always done in the
1323 return sel
->vs_needs_prolog
|| prolog_key
->ls_vgpr_fix
||
1324 prolog_key
->unpack_instance_id_from_vertex_id
||
1325 (ngg_cull_shader
&& key
->opt
.ngg_culling
& SI_NGG_CULL_GS_FAST_LAUNCH_ALL
);
1328 static bool si_build_main_function(struct si_shader_context
*ctx
, struct si_shader
*shader
,
1329 struct nir_shader
*nir
, bool free_nir
, bool ngg_cull_shader
)
1331 struct si_shader_selector
*sel
= shader
->selector
;
1332 const struct si_shader_info
*info
= &sel
->info
;
1334 ctx
->shader
= shader
;
1335 ctx
->type
= sel
->type
;
1337 ctx
->num_const_buffers
= util_last_bit(info
->const_buffers_declared
);
1338 ctx
->num_shader_buffers
= util_last_bit(info
->shader_buffers_declared
);
1340 ctx
->num_samplers
= util_last_bit(info
->samplers_declared
);
1341 ctx
->num_images
= util_last_bit(info
->images_declared
);
1343 si_llvm_init_resource_callbacks(ctx
);
1345 switch (ctx
->type
) {
1346 case PIPE_SHADER_VERTEX
:
1347 si_llvm_init_vs_callbacks(ctx
, ngg_cull_shader
);
1349 case PIPE_SHADER_TESS_CTRL
:
1350 si_llvm_init_tcs_callbacks(ctx
);
1352 case PIPE_SHADER_TESS_EVAL
:
1353 si_llvm_init_tes_callbacks(ctx
, ngg_cull_shader
);
1355 case PIPE_SHADER_GEOMETRY
:
1356 si_llvm_init_gs_callbacks(ctx
);
1358 case PIPE_SHADER_FRAGMENT
:
1359 si_llvm_init_ps_callbacks(ctx
);
1361 case PIPE_SHADER_COMPUTE
:
1362 ctx
->abi
.load_local_group_size
= si_llvm_get_block_size
;
1365 assert(!"Unsupported shader type");
1369 si_create_function(ctx
, ngg_cull_shader
);
1371 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)
1372 si_preload_esgs_ring(ctx
);
1374 if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1375 si_preload_gs_rings(ctx
);
1376 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1377 si_llvm_preload_tes_rings(ctx
);
1379 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& sel
->info
.tessfactors_are_def_in_all_invocs
) {
1380 for (unsigned i
= 0; i
< 6; i
++) {
1381 ctx
->invoc0_tess_factors
[i
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->ac
.i32
, "");
1385 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
1386 for (unsigned i
= 0; i
< 4; i
++) {
1387 ctx
->gs_next_vertex
[i
] = ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
1389 if (shader
->key
.as_ngg
) {
1390 for (unsigned i
= 0; i
< 4; ++i
) {
1391 ctx
->gs_curprim_verts
[i
] = ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
1392 ctx
->gs_generated_prims
[i
] = ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
1395 unsigned scratch_size
= 8;
1396 if (sel
->so
.num_outputs
)
1399 assert(!ctx
->gs_ngg_scratch
);
1400 LLVMTypeRef ai32
= LLVMArrayType(ctx
->ac
.i32
, scratch_size
);
1401 ctx
->gs_ngg_scratch
=
1402 LLVMAddGlobalInAddressSpace(ctx
->ac
.module
, ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
1403 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
1404 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
1406 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(
1407 ctx
->ac
.module
, LLVMArrayType(ctx
->ac
.i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
1408 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
1409 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
1413 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&& (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
1414 /* Unconditionally declare scratch space base for streamout and
1415 * vertex compaction. Whether space is actually allocated is
1416 * determined during linking / PM4 creation.
1418 * Add an extra dword per vertex to ensure an odd stride, which
1419 * avoids bank conflicts for SoA accesses.
1421 if (!gfx10_is_ngg_passthrough(shader
))
1422 si_llvm_declare_esgs_ring(ctx
);
1424 /* This is really only needed when streamout and / or vertex
1425 * compaction is enabled.
1427 if (!ctx
->gs_ngg_scratch
&& (sel
->so
.num_outputs
|| shader
->key
.opt
.ngg_culling
)) {
1428 LLVMTypeRef asi32
= LLVMArrayType(ctx
->ac
.i32
, 8);
1429 ctx
->gs_ngg_scratch
=
1430 LLVMAddGlobalInAddressSpace(ctx
->ac
.module
, asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
1431 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
1432 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
1436 /* For GFX9 merged shaders:
1437 * - Set EXEC for the first shader. If the prolog is present, set
1438 * EXEC there instead.
1439 * - Add a barrier before the second shader.
1440 * - In the second shader, reset EXEC to ~0 and wrap the main part in
1441 * an if-statement. This is required for correctness in geometry
1442 * shaders, to ensure that empty GS waves do not send GS_EMIT and
1445 * For monolithic merged shaders, the first shader is wrapped in an
1446 * if-block together with its prolog in si_build_wrapper_function.
1448 * NGG vertex and tess eval shaders running as the last
1449 * vertex/geometry stage handle execution explicitly using
1452 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1453 if (!shader
->is_monolithic
&& (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
1454 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
1455 (ctx
->type
== PIPE_SHADER_VERTEX
&&
1456 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
, &shader
->key
, ngg_cull_shader
)))) {
1457 si_init_exec_from_input(ctx
, ctx
->merged_wave_info
, 0);
1458 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
|| ctx
->type
== PIPE_SHADER_GEOMETRY
||
1459 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
1460 LLVMValueRef thread_enabled
;
1461 bool nested_barrier
;
1463 if (!shader
->is_monolithic
|| (ctx
->type
== PIPE_SHADER_TESS_EVAL
&& shader
->key
.as_ngg
&&
1464 !shader
->key
.as_es
&& !shader
->key
.opt
.ngg_culling
))
1465 ac_init_exec_full_mask(&ctx
->ac
);
1467 if ((ctx
->type
== PIPE_SHADER_VERTEX
|| ctx
->type
== PIPE_SHADER_TESS_EVAL
) &&
1468 shader
->key
.as_ngg
&& !shader
->key
.as_es
&& !shader
->key
.opt
.ngg_culling
) {
1469 gfx10_ngg_build_sendmsg_gs_alloc_req(ctx
);
1471 /* Build the primitive export at the beginning
1472 * of the shader if possible.
1474 if (gfx10_ngg_export_prim_early(shader
))
1475 gfx10_ngg_build_export_prim(ctx
, NULL
, NULL
);
1478 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
1479 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
1480 gfx10_ngg_gs_emit_prologue(ctx
);
1481 nested_barrier
= false;
1483 nested_barrier
= true;
1486 thread_enabled
= si_is_gs_thread(ctx
);
1488 thread_enabled
= si_is_es_thread(ctx
);
1489 nested_barrier
= false;
1492 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
1493 ctx
->merged_wrap_if_label
= 11500;
1494 ac_build_ifcc(&ctx
->ac
, thread_enabled
, ctx
->merged_wrap_if_label
);
1496 if (nested_barrier
) {
1497 /* Execute a barrier before the second shader in
1500 * Execute the barrier inside the conditional block,
1501 * so that empty waves can jump directly to s_endpgm,
1502 * which will also signal the barrier.
1504 * This is possible in gfx9, because an empty wave
1505 * for the second shader does not participate in
1506 * the epilogue. With NGG, empty waves may still
1507 * be required to export data (e.g. GS output vertices),
1508 * so we cannot let them exit early.
1510 * If the shader is TCS and the TCS epilog is present
1511 * and contains a barrier, it will wait there and then
1514 si_llvm_emit_barrier(ctx
);
1519 bool success
= si_nir_build_llvm(ctx
, nir
);
1523 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
1527 si_llvm_build_ret(ctx
, ctx
->return_value
);
1532 * Compute the VS prolog key, which contains all the information needed to
1533 * build the VS prolog function, and set shader->info bits where needed.
1535 * \param info Shader info of the vertex shader.
1536 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
1537 * \param has_old_ Whether the preceding shader part is the NGG cull shader.
1538 * \param prolog_key Key of the VS prolog
1539 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
1540 * \param key Output shader part key.
1542 static void si_get_vs_prolog_key(const struct si_shader_info
*info
, unsigned num_input_sgprs
,
1543 bool ngg_cull_shader
, const struct si_vs_prolog_bits
*prolog_key
,
1544 struct si_shader
*shader_out
, union si_shader_part_key
*key
)
1546 memset(key
, 0, sizeof(*key
));
1547 key
->vs_prolog
.states
= *prolog_key
;
1548 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
1549 key
->vs_prolog
.num_inputs
= info
->num_inputs
;
1550 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
1551 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
1552 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
1553 key
->vs_prolog
.as_prim_discard_cs
= shader_out
->key
.opt
.vs_as_prim_discard_cs
;
1555 if (ngg_cull_shader
) {
1556 key
->vs_prolog
.gs_fast_launch_tri_list
=
1557 !!(shader_out
->key
.opt
.ngg_culling
& SI_NGG_CULL_GS_FAST_LAUNCH_TRI_LIST
);
1558 key
->vs_prolog
.gs_fast_launch_tri_strip
=
1559 !!(shader_out
->key
.opt
.ngg_culling
& SI_NGG_CULL_GS_FAST_LAUNCH_TRI_STRIP
);
1561 key
->vs_prolog
.has_ngg_cull_inputs
= !!shader_out
->key
.opt
.ngg_culling
;
1564 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
1565 key
->vs_prolog
.as_ls
= 1;
1566 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
1567 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
1568 key
->vs_prolog
.as_es
= 1;
1569 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
1570 } else if (shader_out
->key
.as_ngg
) {
1571 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
1574 /* Only one of these combinations can be set. as_ngg can be set with as_es. */
1575 assert(key
->vs_prolog
.as_ls
+ key
->vs_prolog
.as_ngg
+
1576 (key
->vs_prolog
.as_es
&& !key
->vs_prolog
.as_ngg
) + key
->vs_prolog
.as_prim_discard_cs
<=
1579 /* Enable loading the InstanceID VGPR. */
1580 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
1582 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
1583 key
->vs_prolog
.states
.instance_divisor_is_fetched
) &
1585 shader_out
->info
.uses_instanceid
= true;
1588 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
1589 struct si_shader_selector
*sel
)
1591 if (!compiler
->low_opt_passes
)
1594 /* Assume a slow CPU. */
1595 assert(!sel
->screen
->info
.has_dedicated_vram
&& sel
->screen
->info
.chip_class
<= GFX8
);
1597 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
1599 return sel
->type
== PIPE_SHADER_COMPUTE
&& sel
->info
.num_memory_instructions
> 1000;
1602 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
, bool *free_nir
)
1608 } else if (sel
->nir_binary
) {
1609 struct pipe_screen
*screen
= &sel
->screen
->b
;
1610 const void *options
= screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
, sel
->type
);
1612 struct blob_reader blob_reader
;
1613 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
1615 return nir_deserialize(NULL
, options
, &blob_reader
);
1620 static bool si_llvm_compile_shader(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
1621 struct si_shader
*shader
, struct pipe_debug_callback
*debug
,
1622 struct nir_shader
*nir
, bool free_nir
)
1624 struct si_shader_selector
*sel
= shader
->selector
;
1625 struct si_shader_context ctx
;
1627 si_llvm_context_init(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
));
1629 LLVMValueRef ngg_cull_main_fn
= NULL
;
1630 if (shader
->key
.opt
.ngg_culling
) {
1631 if (!si_build_main_function(&ctx
, shader
, nir
, false, true)) {
1632 si_llvm_dispose(&ctx
);
1635 ngg_cull_main_fn
= ctx
.main_fn
;
1639 if (!si_build_main_function(&ctx
, shader
, nir
, free_nir
, false)) {
1640 si_llvm_dispose(&ctx
);
1644 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
1645 LLVMValueRef parts
[4];
1646 unsigned num_parts
= 0;
1647 bool has_prolog
= false;
1648 LLVMValueRef main_fn
= ctx
.main_fn
;
1650 if (ngg_cull_main_fn
) {
1651 if (si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
, &shader
->key
, true)) {
1652 union si_shader_part_key prolog_key
;
1653 si_get_vs_prolog_key(&sel
->info
, shader
->info
.num_input_sgprs
, true,
1654 &shader
->key
.part
.vs
.prolog
, shader
, &prolog_key
);
1655 prolog_key
.vs_prolog
.is_monolithic
= true;
1656 si_llvm_build_vs_prolog(&ctx
, &prolog_key
);
1657 parts
[num_parts
++] = ctx
.main_fn
;
1660 parts
[num_parts
++] = ngg_cull_main_fn
;
1663 if (si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
, &shader
->key
, false)) {
1664 union si_shader_part_key prolog_key
;
1665 si_get_vs_prolog_key(&sel
->info
, shader
->info
.num_input_sgprs
, false,
1666 &shader
->key
.part
.vs
.prolog
, shader
, &prolog_key
);
1667 prolog_key
.vs_prolog
.is_monolithic
= true;
1668 si_llvm_build_vs_prolog(&ctx
, &prolog_key
);
1669 parts
[num_parts
++] = ctx
.main_fn
;
1672 parts
[num_parts
++] = main_fn
;
1674 si_build_wrapper_function(&ctx
, parts
, num_parts
, has_prolog
? 1 : 0, 0);
1676 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
1677 si_build_prim_discard_compute_shader(&ctx
);
1678 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&& ngg_cull_main_fn
) {
1679 LLVMValueRef parts
[2];
1681 parts
[0] = ngg_cull_main_fn
;
1682 parts
[1] = ctx
.main_fn
;
1684 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
1685 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
1686 if (sscreen
->info
.chip_class
>= GFX9
) {
1687 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
1688 LLVMValueRef parts
[4];
1689 bool vs_needs_prolog
=
1690 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
, &shader
->key
, false);
1693 parts
[2] = ctx
.main_fn
;
1696 union si_shader_part_key tcs_epilog_key
;
1697 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
1698 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
1699 si_llvm_build_tcs_epilog(&ctx
, &tcs_epilog_key
);
1700 parts
[3] = ctx
.main_fn
;
1702 /* VS as LS main part */
1703 nir
= get_nir_shader(ls
, &free_nir
);
1704 struct si_shader shader_ls
= {};
1705 shader_ls
.selector
= ls
;
1706 shader_ls
.key
.as_ls
= 1;
1707 shader_ls
.key
.mono
= shader
->key
.mono
;
1708 shader_ls
.key
.opt
= shader
->key
.opt
;
1709 shader_ls
.is_monolithic
= true;
1711 if (!si_build_main_function(&ctx
, &shader_ls
, nir
, free_nir
, false)) {
1712 si_llvm_dispose(&ctx
);
1715 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
1716 parts
[1] = ctx
.main_fn
;
1719 if (vs_needs_prolog
) {
1720 union si_shader_part_key vs_prolog_key
;
1721 si_get_vs_prolog_key(&ls
->info
, shader_ls
.info
.num_input_sgprs
, false,
1722 &shader
->key
.part
.tcs
.ls_prolog
, shader
, &vs_prolog_key
);
1723 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
1724 si_llvm_build_vs_prolog(&ctx
, &vs_prolog_key
);
1725 parts
[0] = ctx
.main_fn
;
1728 /* Reset the shader context. */
1729 ctx
.shader
= shader
;
1730 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
1732 si_build_wrapper_function(&ctx
, parts
+ !vs_needs_prolog
, 4 - !vs_needs_prolog
,
1733 vs_needs_prolog
, vs_needs_prolog
? 2 : 1);
1735 LLVMValueRef parts
[2];
1736 union si_shader_part_key epilog_key
;
1738 parts
[0] = ctx
.main_fn
;
1740 memset(&epilog_key
, 0, sizeof(epilog_key
));
1741 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
1742 si_llvm_build_tcs_epilog(&ctx
, &epilog_key
);
1743 parts
[1] = ctx
.main_fn
;
1745 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
1747 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
1748 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
1749 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
1750 LLVMValueRef es_prolog
= NULL
;
1751 LLVMValueRef es_main
= NULL
;
1752 LLVMValueRef gs_prolog
= NULL
;
1753 LLVMValueRef gs_main
= ctx
.main_fn
;
1756 union si_shader_part_key gs_prolog_key
;
1757 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
1758 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
1759 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
1760 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
1761 si_llvm_build_gs_prolog(&ctx
, &gs_prolog_key
);
1762 gs_prolog
= ctx
.main_fn
;
1765 nir
= get_nir_shader(es
, &free_nir
);
1766 struct si_shader shader_es
= {};
1767 shader_es
.selector
= es
;
1768 shader_es
.key
.as_es
= 1;
1769 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
1770 shader_es
.key
.mono
= shader
->key
.mono
;
1771 shader_es
.key
.opt
= shader
->key
.opt
;
1772 shader_es
.is_monolithic
= true;
1774 if (!si_build_main_function(&ctx
, &shader_es
, nir
, free_nir
, false)) {
1775 si_llvm_dispose(&ctx
);
1778 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
1779 es_main
= ctx
.main_fn
;
1782 if (es
->type
== PIPE_SHADER_VERTEX
&&
1783 si_vs_needs_prolog(es
, &shader
->key
.part
.gs
.vs_prolog
, &shader
->key
, false)) {
1784 union si_shader_part_key vs_prolog_key
;
1785 si_get_vs_prolog_key(&es
->info
, shader_es
.info
.num_input_sgprs
, false,
1786 &shader
->key
.part
.gs
.vs_prolog
, shader
, &vs_prolog_key
);
1787 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
1788 si_llvm_build_vs_prolog(&ctx
, &vs_prolog_key
);
1789 es_prolog
= ctx
.main_fn
;
1792 /* Reset the shader context. */
1793 ctx
.shader
= shader
;
1794 ctx
.type
= PIPE_SHADER_GEOMETRY
;
1796 /* Prepare the array of shader parts. */
1797 LLVMValueRef parts
[4];
1798 unsigned num_parts
= 0, main_part
, next_first_part
;
1801 parts
[num_parts
++] = es_prolog
;
1803 parts
[main_part
= num_parts
++] = es_main
;
1804 parts
[next_first_part
= num_parts
++] = gs_prolog
;
1805 parts
[num_parts
++] = gs_main
;
1807 si_build_wrapper_function(&ctx
, parts
, num_parts
, main_part
, next_first_part
);
1809 LLVMValueRef parts
[2];
1810 union si_shader_part_key prolog_key
;
1812 parts
[1] = ctx
.main_fn
;
1814 memset(&prolog_key
, 0, sizeof(prolog_key
));
1815 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
1816 si_llvm_build_gs_prolog(&ctx
, &prolog_key
);
1817 parts
[0] = ctx
.main_fn
;
1819 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
1821 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
1822 si_llvm_build_monolithic_ps(&ctx
, shader
);
1825 si_llvm_optimize_module(&ctx
);
1827 /* Post-optimization transformations and analysis. */
1828 si_optimize_vs_outputs(&ctx
);
1830 if ((debug
&& debug
->debug_message
) || si_can_dump_shader(sscreen
, ctx
.type
)) {
1831 ctx
.shader
->info
.private_mem_vgprs
= ac_count_scratch_private_memory(ctx
.main_fn
);
1834 /* Make sure the input is a pointer and not integer followed by inttoptr. */
1835 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) == LLVMPointerTypeKind
);
1837 /* Compile to bytecode. */
1838 if (!si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
, &ctx
.ac
, debug
,
1839 ctx
.type
, si_get_shader_name(shader
),
1840 si_should_optimize_less(compiler
, shader
->selector
))) {
1841 si_llvm_dispose(&ctx
);
1842 fprintf(stderr
, "LLVM failed to compile shader\n");
1846 si_llvm_dispose(&ctx
);
1850 bool si_compile_shader(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
1851 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
1853 struct si_shader_selector
*sel
= shader
->selector
;
1855 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
1857 /* Dump NIR before doing NIR->LLVM conversion in case the
1858 * conversion fails. */
1859 if (si_can_dump_shader(sscreen
, sel
->type
) && !(sscreen
->debug_flags
& DBG(NO_NIR
))) {
1860 nir_print_shader(nir
, stderr
);
1861 si_dump_streamout(&sel
->so
);
1864 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
1865 sizeof(shader
->info
.vs_output_param_offset
));
1867 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
1869 /* TODO: ACO could compile non-monolithic shaders here (starting
1870 * with PS and NGG VS), but monolithic shaders should be compiled
1871 * by LLVM due to more complicated compilation.
1873 if (!si_llvm_compile_shader(sscreen
, compiler
, shader
, debug
, nir
, free_nir
))
1876 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
1877 * LLVM 3.9svn has this bug.
1879 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
1880 unsigned wave_size
= sscreen
->compute_wave_size
;
1881 unsigned max_vgprs
=
1882 sscreen
->info
.num_physical_wave64_vgprs_per_simd
* (wave_size
== 32 ? 2 : 1);
1883 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
1884 unsigned max_sgprs_per_wave
= 128;
1885 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
1886 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
1887 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
1888 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
1890 max_vgprs
= max_vgprs
/ waves_per_simd
;
1891 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
1893 if (shader
->config
.num_sgprs
> max_sgprs
|| shader
->config
.num_vgprs
> max_vgprs
) {
1895 "LLVM failed to compile a shader correctly: "
1896 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
1897 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
, max_sgprs
, max_vgprs
);
1899 /* Just terminate the process, because dependent
1900 * shaders can hang due to bad input data, but use
1901 * the env var to allow shader-db to work.
1903 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
1908 /* Add the scratch offset to input SGPRs. */
1909 if (shader
->config
.scratch_bytes_per_wave
&& !si_is_merged_shader(shader
))
1910 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
1912 /* Calculate the number of fragment input VGPRs. */
1913 if (sel
->type
== PIPE_SHADER_FRAGMENT
) {
1914 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(
1915 &shader
->config
, &shader
->info
.face_vgpr_index
, &shader
->info
.ancillary_vgpr_index
);
1918 si_calculate_max_simd_waves(shader
);
1919 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
1924 * Create, compile and return a shader part (prolog or epilog).
1926 * \param sscreen screen
1927 * \param list list of shader parts of the same category
1928 * \param type shader type
1929 * \param key shader part key
1930 * \param prolog whether the part being requested is a prolog
1931 * \param tm LLVM target machine
1932 * \param debug debug callback
1933 * \param build the callback responsible for building the main function
1934 * \return non-NULL on success
1936 static struct si_shader_part
*
1937 si_get_shader_part(struct si_screen
*sscreen
, struct si_shader_part
**list
,
1938 enum pipe_shader_type type
, bool prolog
, union si_shader_part_key
*key
,
1939 struct ac_llvm_compiler
*compiler
, struct pipe_debug_callback
*debug
,
1940 void (*build
)(struct si_shader_context
*, union si_shader_part_key
*),
1943 struct si_shader_part
*result
;
1945 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
1947 /* Find existing. */
1948 for (result
= *list
; result
; result
= result
->next
) {
1949 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
1950 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
1955 /* Compile a new one. */
1956 result
= CALLOC_STRUCT(si_shader_part
);
1959 struct si_shader_selector sel
= {};
1960 sel
.screen
= sscreen
;
1962 struct si_shader shader
= {};
1963 shader
.selector
= &sel
;
1966 case PIPE_SHADER_VERTEX
:
1967 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
1968 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
1969 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
1970 shader
.key
.opt
.ngg_culling
=
1971 (key
->vs_prolog
.gs_fast_launch_tri_list
? SI_NGG_CULL_GS_FAST_LAUNCH_TRI_LIST
: 0) |
1972 (key
->vs_prolog
.gs_fast_launch_tri_strip
? SI_NGG_CULL_GS_FAST_LAUNCH_TRI_STRIP
: 0);
1973 shader
.key
.opt
.vs_as_prim_discard_cs
= key
->vs_prolog
.as_prim_discard_cs
;
1975 case PIPE_SHADER_TESS_CTRL
:
1977 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
1979 case PIPE_SHADER_GEOMETRY
:
1981 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
1983 case PIPE_SHADER_FRAGMENT
:
1985 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
1987 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
1990 unreachable("bad shader part");
1993 struct si_shader_context ctx
;
1994 si_llvm_context_init(&ctx
, sscreen
, compiler
,
1995 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
, shader
.key
.as_es
,
1996 shader
.key
.opt
.ngg_culling
& SI_NGG_CULL_GS_FAST_LAUNCH_ALL
,
1997 shader
.key
.opt
.vs_as_prim_discard_cs
));
1998 ctx
.shader
= &shader
;
2004 si_llvm_optimize_module(&ctx
);
2006 if (!si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
, &ctx
.ac
, debug
,
2007 ctx
.type
, name
, false)) {
2013 result
->next
= *list
;
2017 si_llvm_dispose(&ctx
);
2018 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
2022 static bool si_get_vs_prolog(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2023 struct si_shader
*shader
, struct pipe_debug_callback
*debug
,
2024 struct si_shader
*main_part
, const struct si_vs_prolog_bits
*key
)
2026 struct si_shader_selector
*vs
= main_part
->selector
;
2028 if (!si_vs_needs_prolog(vs
, key
, &shader
->key
, false))
2031 /* Get the prolog. */
2032 union si_shader_part_key prolog_key
;
2033 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
, false, key
, shader
,
2037 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
, PIPE_SHADER_VERTEX
, true, &prolog_key
,
2038 compiler
, debug
, si_llvm_build_vs_prolog
, "Vertex Shader Prolog");
2039 return shader
->prolog
!= NULL
;
2043 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
2045 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2046 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
2048 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
, &shader
->key
.part
.vs
.prolog
);
2052 * Select and compile (or reuse) TCS parts (epilog).
2054 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2055 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
2057 if (sscreen
->info
.chip_class
>= GFX9
) {
2058 struct si_shader
*ls_main_part
= shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
2060 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
2061 &shader
->key
.part
.tcs
.ls_prolog
))
2064 shader
->previous_stage
= ls_main_part
;
2067 /* Get the epilog. */
2068 union si_shader_part_key epilog_key
;
2069 memset(&epilog_key
, 0, sizeof(epilog_key
));
2070 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
2072 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
, PIPE_SHADER_TESS_CTRL
, false,
2073 &epilog_key
, compiler
, debug
, si_llvm_build_tcs_epilog
,
2074 "Tessellation Control Shader Epilog");
2075 return shader
->epilog
!= NULL
;
2079 * Select and compile (or reuse) GS parts (prolog).
2081 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2082 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
2084 if (sscreen
->info
.chip_class
>= GFX9
) {
2085 struct si_shader
*es_main_part
;
2086 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
2088 if (shader
->key
.as_ngg
)
2089 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
2091 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
2093 if (es_type
== PIPE_SHADER_VERTEX
&&
2094 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
2095 &shader
->key
.part
.gs
.vs_prolog
))
2098 shader
->previous_stage
= es_main_part
;
2101 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
2104 union si_shader_part_key prolog_key
;
2105 memset(&prolog_key
, 0, sizeof(prolog_key
));
2106 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
2107 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
2110 si_get_shader_part(sscreen
, &sscreen
->gs_prologs
, PIPE_SHADER_GEOMETRY
, true, &prolog_key
,
2111 compiler
, debug
, si_llvm_build_gs_prolog
, "Geometry Shader Prolog");
2112 return shader
->prolog2
!= NULL
;
2116 * Compute the PS prolog key, which contains all the information needed to
2117 * build the PS prolog function, and set related bits in shader->config.
2119 void si_get_ps_prolog_key(struct si_shader
*shader
, union si_shader_part_key
*key
,
2120 bool separate_prolog
)
2122 struct si_shader_info
*info
= &shader
->selector
->info
;
2124 memset(key
, 0, sizeof(*key
));
2125 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
2126 key
->ps_prolog
.colors_read
= info
->colors_read
;
2127 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
2128 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
2129 key
->ps_prolog
.wqm
=
2130 info
->uses_derivatives
&&
2131 (key
->ps_prolog
.colors_read
|| key
->ps_prolog
.states
.force_persp_sample_interp
||
2132 key
->ps_prolog
.states
.force_linear_sample_interp
||
2133 key
->ps_prolog
.states
.force_persp_center_interp
||
2134 key
->ps_prolog
.states
.force_linear_center_interp
||
2135 key
->ps_prolog
.states
.bc_optimize_for_persp
|| key
->ps_prolog
.states
.bc_optimize_for_linear
);
2136 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
2138 if (info
->colors_read
) {
2139 unsigned *color
= shader
->selector
->color_attr_index
;
2141 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
2142 /* BCOLORs are stored after the last input. */
2143 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
2144 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
2145 if (separate_prolog
)
2146 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
2149 for (unsigned i
= 0; i
< 2; i
++) {
2150 unsigned interp
= info
->input_interpolate
[color
[i
]];
2151 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
2153 if (!(info
->colors_read
& (0xf << i
* 4)))
2156 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
2158 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&& interp
== TGSI_INTERPOLATE_COLOR
)
2159 interp
= TGSI_INTERPOLATE_CONSTANT
;
2162 case TGSI_INTERPOLATE_CONSTANT
:
2163 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
2165 case TGSI_INTERPOLATE_PERSPECTIVE
:
2166 case TGSI_INTERPOLATE_COLOR
:
2167 /* Force the interpolation location for colors here. */
2168 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
2169 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
2170 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
2171 location
= TGSI_INTERPOLATE_LOC_CENTER
;
2174 case TGSI_INTERPOLATE_LOC_SAMPLE
:
2175 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
2176 if (separate_prolog
) {
2177 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
2180 case TGSI_INTERPOLATE_LOC_CENTER
:
2181 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
2182 if (separate_prolog
) {
2183 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
2186 case TGSI_INTERPOLATE_LOC_CENTROID
:
2187 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
2188 if (separate_prolog
) {
2189 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTROID_ENA(1);
2196 case TGSI_INTERPOLATE_LINEAR
:
2197 /* Force the interpolation location for colors here. */
2198 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
2199 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
2200 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
2201 location
= TGSI_INTERPOLATE_LOC_CENTER
;
2203 /* The VGPR assignment for non-monolithic shaders
2204 * works because InitialPSInputAddr is set on the
2205 * main shader and PERSP_PULL_MODEL is never used.
2208 case TGSI_INTERPOLATE_LOC_SAMPLE
:
2209 key
->ps_prolog
.color_interp_vgpr_index
[i
] = separate_prolog
? 6 : 9;
2210 if (separate_prolog
) {
2211 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
2214 case TGSI_INTERPOLATE_LOC_CENTER
:
2215 key
->ps_prolog
.color_interp_vgpr_index
[i
] = separate_prolog
? 8 : 11;
2216 if (separate_prolog
) {
2217 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
2220 case TGSI_INTERPOLATE_LOC_CENTROID
:
2221 key
->ps_prolog
.color_interp_vgpr_index
[i
] = separate_prolog
? 10 : 13;
2222 if (separate_prolog
) {
2223 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTROID_ENA(1);
2238 * Check whether a PS prolog is required based on the key.
2240 bool si_need_ps_prolog(const union si_shader_part_key
*key
)
2242 return key
->ps_prolog
.colors_read
|| key
->ps_prolog
.states
.force_persp_sample_interp
||
2243 key
->ps_prolog
.states
.force_linear_sample_interp
||
2244 key
->ps_prolog
.states
.force_persp_center_interp
||
2245 key
->ps_prolog
.states
.force_linear_center_interp
||
2246 key
->ps_prolog
.states
.bc_optimize_for_persp
||
2247 key
->ps_prolog
.states
.bc_optimize_for_linear
|| key
->ps_prolog
.states
.poly_stipple
||
2248 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
2252 * Compute the PS epilog key, which contains all the information needed to
2253 * build the PS epilog function.
2255 void si_get_ps_epilog_key(struct si_shader
*shader
, union si_shader_part_key
*key
)
2257 struct si_shader_info
*info
= &shader
->selector
->info
;
2258 memset(key
, 0, sizeof(*key
));
2259 key
->ps_epilog
.colors_written
= info
->colors_written
;
2260 key
->ps_epilog
.writes_z
= info
->writes_z
;
2261 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
2262 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
2263 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
2267 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
2269 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2270 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
2272 union si_shader_part_key prolog_key
;
2273 union si_shader_part_key epilog_key
;
2275 /* Get the prolog. */
2276 si_get_ps_prolog_key(shader
, &prolog_key
, true);
2278 /* The prolog is a no-op if these aren't set. */
2279 if (si_need_ps_prolog(&prolog_key
)) {
2281 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
, PIPE_SHADER_FRAGMENT
, true, &prolog_key
,
2282 compiler
, debug
, si_llvm_build_ps_prolog
, "Fragment Shader Prolog");
2283 if (!shader
->prolog
)
2287 /* Get the epilog. */
2288 si_get_ps_epilog_key(shader
, &epilog_key
);
2291 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
, PIPE_SHADER_FRAGMENT
, false, &epilog_key
,
2292 compiler
, debug
, si_llvm_build_ps_epilog
, "Fragment Shader Epilog");
2293 if (!shader
->epilog
)
2296 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
2297 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
2298 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
2299 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
2302 /* Set up the enable bits for per-sample shading if needed. */
2303 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
2304 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
2305 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
2306 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
2307 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
2308 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
2310 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
2311 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
2312 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
2313 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
2314 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
2315 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
2317 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
2318 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
2319 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
2320 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
2321 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
2322 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
2324 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
2325 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
2326 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
2327 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
2328 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
2329 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
2332 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
2333 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
2334 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
2335 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
2336 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
2339 /* At least one pair of interpolation weights must be enabled. */
2340 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
2341 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
2342 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
2345 /* Samplemask fixup requires the sample ID. */
2346 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
2347 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
2348 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
2351 /* The sample mask input is always enabled, because the API shader always
2352 * passes it through to the epilog. Disable it here if it's unused.
2354 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&& !shader
->selector
->info
.reads_samplemask
)
2355 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
2360 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
, unsigned *lds_size
)
2362 /* If tessellation is all offchip and on-chip GS isn't used, this
2363 * workaround is not needed.
2367 /* SPI barrier management bug:
2368 * Make sure we have at least 4k of LDS in use to avoid the bug.
2369 * It applies to workgroup sizes of more than one wavefront.
2371 if (sscreen
->info
.family
== CHIP_BONAIRE
|| sscreen
->info
.family
== CHIP_KABINI
)
2372 *lds_size
= MAX2(*lds_size
, 8);
2375 void si_fix_resource_usage(struct si_screen
*sscreen
, struct si_shader
*shader
)
2377 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
2379 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
2381 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
2382 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
2383 si_multiwave_lds_size_workaround(sscreen
, &shader
->config
.lds_size
);
2387 bool si_create_shader_variant(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
2388 struct si_shader
*shader
, struct pipe_debug_callback
*debug
)
2390 struct si_shader_selector
*sel
= shader
->selector
;
2391 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
2393 /* LS, ES, VS are compiled on demand if the main part hasn't been
2394 * compiled for that stage.
2396 * GS are compiled on demand if the main part hasn't been compiled
2397 * for the chosen NGG-ness.
2399 * Vertex shaders are compiled on demand when a vertex fetch
2400 * workaround must be applied.
2402 if (shader
->is_monolithic
) {
2403 /* Monolithic shader (compiled as a whole, has many variants,
2404 * may take a long time to compile).
2406 if (!si_compile_shader(sscreen
, compiler
, shader
, debug
))
2409 /* The shader consists of several parts:
2411 * - the middle part is the user shader, it has 1 variant only
2412 * and it was compiled during the creation of the shader
2414 * - the prolog part is inserted at the beginning
2415 * - the epilog part is inserted at the end
2417 * The prolog and epilog have many (but simple) variants.
2419 * Starting with gfx9, geometry and tessellation control
2420 * shaders also contain the prolog and user shader parts of
2421 * the previous shader stage.
2427 /* Copy the compiled shader data over. */
2428 shader
->is_binary_shared
= true;
2429 shader
->binary
= mainp
->binary
;
2430 shader
->config
= mainp
->config
;
2431 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
2432 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
2433 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
2434 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
2435 memcpy(shader
->info
.vs_output_param_offset
, mainp
->info
.vs_output_param_offset
,
2436 sizeof(mainp
->info
.vs_output_param_offset
));
2437 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
2438 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
2439 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
2441 /* Select prologs and/or epilogs. */
2442 switch (sel
->type
) {
2443 case PIPE_SHADER_VERTEX
:
2444 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
2447 case PIPE_SHADER_TESS_CTRL
:
2448 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
2451 case PIPE_SHADER_TESS_EVAL
:
2453 case PIPE_SHADER_GEOMETRY
:
2454 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
2457 case PIPE_SHADER_FRAGMENT
:
2458 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
2461 /* Make sure we have at least as many VGPRs as there
2462 * are allocated inputs.
2464 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
, shader
->info
.num_input_vgprs
);
2469 /* Update SGPR and VGPR counts. */
2470 if (shader
->prolog
) {
2471 shader
->config
.num_sgprs
=
2472 MAX2(shader
->config
.num_sgprs
, shader
->prolog
->config
.num_sgprs
);
2473 shader
->config
.num_vgprs
=
2474 MAX2(shader
->config
.num_vgprs
, shader
->prolog
->config
.num_vgprs
);
2476 if (shader
->previous_stage
) {
2477 shader
->config
.num_sgprs
=
2478 MAX2(shader
->config
.num_sgprs
, shader
->previous_stage
->config
.num_sgprs
);
2479 shader
->config
.num_vgprs
=
2480 MAX2(shader
->config
.num_vgprs
, shader
->previous_stage
->config
.num_vgprs
);
2481 shader
->config
.spilled_sgprs
=
2482 MAX2(shader
->config
.spilled_sgprs
, shader
->previous_stage
->config
.spilled_sgprs
);
2483 shader
->config
.spilled_vgprs
=
2484 MAX2(shader
->config
.spilled_vgprs
, shader
->previous_stage
->config
.spilled_vgprs
);
2485 shader
->info
.private_mem_vgprs
=
2486 MAX2(shader
->info
.private_mem_vgprs
, shader
->previous_stage
->info
.private_mem_vgprs
);
2487 shader
->config
.scratch_bytes_per_wave
=
2488 MAX2(shader
->config
.scratch_bytes_per_wave
,
2489 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
2490 shader
->info
.uses_instanceid
|= shader
->previous_stage
->info
.uses_instanceid
;
2492 if (shader
->prolog2
) {
2493 shader
->config
.num_sgprs
=
2494 MAX2(shader
->config
.num_sgprs
, shader
->prolog2
->config
.num_sgprs
);
2495 shader
->config
.num_vgprs
=
2496 MAX2(shader
->config
.num_vgprs
, shader
->prolog2
->config
.num_vgprs
);
2498 if (shader
->epilog
) {
2499 shader
->config
.num_sgprs
=
2500 MAX2(shader
->config
.num_sgprs
, shader
->epilog
->config
.num_sgprs
);
2501 shader
->config
.num_vgprs
=
2502 MAX2(shader
->config
.num_vgprs
, shader
->epilog
->config
.num_vgprs
);
2504 si_calculate_max_simd_waves(shader
);
2507 if (shader
->key
.as_ngg
) {
2508 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
2509 if (!gfx10_ngg_calculate_subgroup_info(shader
)) {
2510 fprintf(stderr
, "Failed to compute subgroup info\n");
2513 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
2514 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
2517 si_fix_resource_usage(sscreen
, shader
);
2518 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
2521 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
2522 fprintf(stderr
, "LLVM failed to upload shader\n");
2529 void si_shader_binary_clean(struct si_shader_binary
*binary
)
2531 free((void *)binary
->elf_buffer
);
2532 binary
->elf_buffer
= NULL
;
2534 free(binary
->llvm_ir_string
);
2535 binary
->llvm_ir_string
= NULL
;
2538 void si_shader_destroy(struct si_shader
*shader
)
2540 if (shader
->scratch_bo
)
2541 si_resource_reference(&shader
->scratch_bo
, NULL
);
2543 si_resource_reference(&shader
->bo
, NULL
);
2545 if (!shader
->is_binary_shared
)
2546 si_shader_binary_clean(&shader
->binary
);
2548 free(shader
->shader_log
);