2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
32 #include "ac_exp_param.h"
33 #include "ac_shader_util.h"
34 #include "ac_llvm_util.h"
35 #include "si_shader_internal.h"
39 #include "compiler/nir/nir.h"
41 static const char scratch_rsrc_dword0_symbol
[] =
42 "SCRATCH_RSRC_DWORD0";
44 static const char scratch_rsrc_dword1_symbol
[] =
45 "SCRATCH_RSRC_DWORD1";
47 struct si_shader_output_values
49 LLVMValueRef values
[4];
50 unsigned semantic_name
;
51 unsigned semantic_index
;
52 ubyte vertex_stream
[4];
55 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
56 struct si_screen
*sscreen
,
57 struct ac_llvm_compiler
*compiler
);
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
66 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
67 union si_shader_part_key
*key
);
68 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
69 union si_shader_part_key
*key
);
70 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
71 union si_shader_part_key
*key
);
72 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
73 union si_shader_part_key
*key
);
74 static void si_fix_resource_usage(struct si_screen
*sscreen
,
75 struct si_shader
*shader
);
77 /* Ideally pass the sample mask input to the PS epilog as v14, which
78 * is its usual location, so that the shader doesn't have to add v_mov.
80 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
82 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
85 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
91 static bool is_merged_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 void si_init_function_info(struct si_function_info
*fninfo
)
104 fninfo
->num_params
= 0;
105 fninfo
->num_sgpr_params
= 0;
108 unsigned add_arg_assign(struct si_function_info
*fninfo
,
109 enum si_arg_regfile regfile
, LLVMTypeRef type
,
110 LLVMValueRef
*assign
)
112 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
114 unsigned idx
= fninfo
->num_params
++;
115 assert(idx
< ARRAY_SIZE(fninfo
->types
));
117 if (regfile
== ARG_SGPR
)
118 fninfo
->num_sgpr_params
= fninfo
->num_params
;
120 fninfo
->types
[idx
] = type
;
121 fninfo
->assign
[idx
] = assign
;
125 static unsigned add_arg(struct si_function_info
*fninfo
,
126 enum si_arg_regfile regfile
, LLVMTypeRef type
)
128 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
131 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
132 enum si_arg_regfile regfile
, LLVMTypeRef type
,
133 LLVMValueRef
*assign
, unsigned idx
)
135 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
136 assert(actual
== idx
);
139 static void add_arg_checked(struct si_function_info
*fninfo
,
140 enum si_arg_regfile regfile
, LLVMTypeRef type
,
143 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
147 * Returns a unique index for a per-patch semantic name and index. The index
148 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
151 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
153 switch (semantic_name
) {
154 case TGSI_SEMANTIC_TESSOUTER
:
156 case TGSI_SEMANTIC_TESSINNER
:
158 case TGSI_SEMANTIC_PATCH
:
163 assert(!"invalid semantic name");
169 * Returns a unique index for a semantic name and index. The index must be
170 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
173 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
176 switch (semantic_name
) {
177 case TGSI_SEMANTIC_POSITION
:
179 case TGSI_SEMANTIC_GENERIC
:
180 /* Since some shader stages use the the highest used IO index
181 * to determine the size to allocate for inputs/outputs
182 * (in LDS, tess and GS rings). GENERIC should be placed right
183 * after POSITION to make that size as small as possible.
185 if (index
< SI_MAX_IO_GENERIC
)
188 assert(!"invalid generic index");
190 case TGSI_SEMANTIC_PSIZE
:
191 return SI_MAX_IO_GENERIC
+ 1;
192 case TGSI_SEMANTIC_CLIPDIST
:
194 return SI_MAX_IO_GENERIC
+ 2 + index
;
195 case TGSI_SEMANTIC_FOG
:
196 return SI_MAX_IO_GENERIC
+ 4;
197 case TGSI_SEMANTIC_LAYER
:
198 return SI_MAX_IO_GENERIC
+ 5;
199 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
200 return SI_MAX_IO_GENERIC
+ 6;
201 case TGSI_SEMANTIC_PRIMID
:
202 return SI_MAX_IO_GENERIC
+ 7;
203 case TGSI_SEMANTIC_COLOR
:
205 return SI_MAX_IO_GENERIC
+ 8 + index
;
206 case TGSI_SEMANTIC_BCOLOR
:
208 /* If it's a varying, COLOR and BCOLOR alias. */
210 return SI_MAX_IO_GENERIC
+ 8 + index
;
212 return SI_MAX_IO_GENERIC
+ 10 + index
;
213 case TGSI_SEMANTIC_TEXCOORD
:
215 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 12 + 8 <= 63);
216 return SI_MAX_IO_GENERIC
+ 12 + index
;
217 case TGSI_SEMANTIC_CLIPVERTEX
:
220 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
221 assert(!"invalid semantic name");
227 * Get the value of a shader input parameter and extract a bitfield.
229 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
230 LLVMValueRef value
, unsigned rshift
,
233 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
234 value
= ac_to_integer(&ctx
->ac
, value
);
237 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
238 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
240 if (rshift
+ bitwidth
< 32) {
241 unsigned mask
= (1 << bitwidth
) - 1;
242 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
243 LLVMConstInt(ctx
->i32
, mask
, 0), "");
249 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
250 unsigned param
, unsigned rshift
,
253 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
255 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
258 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
261 case PIPE_SHADER_TESS_CTRL
:
262 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
264 case PIPE_SHADER_TESS_EVAL
:
265 return LLVMGetParam(ctx
->main_fn
,
266 ctx
->param_tes_rel_patch_id
);
274 /* Tessellation shaders pass outputs to the next shader using LDS.
276 * LS outputs = TCS inputs
277 * TCS outputs = TES inputs
280 * - TCS inputs for patch 0
281 * - TCS inputs for patch 1
282 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
284 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
285 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
286 * - TCS outputs for patch 1
287 * - Per-patch TCS outputs for patch 1
288 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
289 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
292 * All three shaders VS(LS), TCS, TES share the same LDS space.
296 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
298 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
301 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
303 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
305 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
306 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
308 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
311 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
313 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
315 return LLVMConstInt(ctx
->i32
, stride
, 0);
318 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
320 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
321 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
323 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
324 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
325 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
326 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
327 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
328 num_patch_outputs
* 4;
329 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
333 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
335 return LLVMBuildMul(ctx
->ac
.builder
,
337 ctx
->param_tcs_out_lds_offsets
,
339 LLVMConstInt(ctx
->i32
, 4, 0), "");
343 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
345 return LLVMBuildMul(ctx
->ac
.builder
,
347 ctx
->param_tcs_out_lds_offsets
,
349 LLVMConstInt(ctx
->i32
, 4, 0), "");
353 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
355 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
356 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
358 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
362 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
364 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
365 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
366 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
368 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
372 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
374 LLVMValueRef patch0_patch_data_offset
=
375 get_tcs_out_patch0_patch_data_offset(ctx
);
376 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
377 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
379 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
382 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
384 unsigned tcs_out_vertices
=
385 ctx
->shader
->selector
?
386 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
388 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
389 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
390 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
392 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
395 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
400 case PIPE_SHADER_VERTEX
:
401 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
402 return LLVMConstInt(ctx
->i32
, stride
, 0);
404 case PIPE_SHADER_TESS_CTRL
:
405 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
406 ctx
->shader
->is_monolithic
) {
407 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
408 return LLVMConstInt(ctx
->i32
, stride
, 0);
410 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
418 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
419 LLVMValueRef i32
, unsigned index
)
424 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
425 LLVMConstInt(ctx
->i32
, 16, 0), "");
427 return LLVMBuildSExt(ctx
->ac
.builder
,
428 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
433 void si_llvm_load_input_vs(
434 struct si_shader_context
*ctx
,
435 unsigned input_index
,
438 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
439 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
441 if (vs_blit_property
) {
442 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
443 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
444 LLVMIntULE
, vertex_id
,
446 /* Use LLVMIntNE, because we have 3 vertices and only
447 * the middle one should use y2.
449 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
450 LLVMIntNE
, vertex_id
,
453 if (input_index
== 0) {
455 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
456 ctx
->param_vs_blit_inputs
);
457 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
458 ctx
->param_vs_blit_inputs
+ 1);
460 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
461 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
462 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
463 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
465 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
467 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
470 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
471 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
472 out
[2] = LLVMGetParam(ctx
->main_fn
,
473 ctx
->param_vs_blit_inputs
+ 2);
474 out
[3] = ctx
->ac
.f32_1
;
478 /* Color or texture coordinates: */
479 assert(input_index
== 1);
481 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
482 for (int i
= 0; i
< 4; i
++) {
483 out
[i
] = LLVMGetParam(ctx
->main_fn
,
484 ctx
->param_vs_blit_inputs
+ 3 + i
);
487 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
488 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
489 ctx
->param_vs_blit_inputs
+ 3);
490 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
491 ctx
->param_vs_blit_inputs
+ 4);
492 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
493 ctx
->param_vs_blit_inputs
+ 5);
494 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
495 ctx
->param_vs_blit_inputs
+ 6);
497 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
499 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
501 out
[2] = LLVMGetParam(ctx
->main_fn
,
502 ctx
->param_vs_blit_inputs
+ 7);
503 out
[3] = LLVMGetParam(ctx
->main_fn
,
504 ctx
->param_vs_blit_inputs
+ 8);
509 union si_vs_fix_fetch fix_fetch
;
510 LLVMValueRef t_list_ptr
;
511 LLVMValueRef t_offset
;
513 LLVMValueRef vertex_index
;
516 /* Load the T list */
517 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
519 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
521 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
523 vertex_index
= LLVMGetParam(ctx
->main_fn
,
524 ctx
->param_vertex_index0
+
527 /* Use the open-coded implementation for all loads of doubles and
528 * of dword-sized data that needs fixups. We need to insert conversion
529 * code anyway, and the amd/common code does it for us.
531 * Note: On LLVM <= 8, we can only open-code formats with
532 * channel size >= 4 bytes.
534 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
535 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
537 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
538 (fix_fetch
.u
.log_size
== 2)) {
539 tmp
= ac_build_opencoded_load_format(
540 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
541 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
542 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
,
544 for (unsigned i
= 0; i
< 4; ++i
)
545 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
549 /* Do multiple loads for special formats. */
550 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
551 LLVMValueRef fetches
[4];
552 unsigned num_fetches
;
553 unsigned fetch_stride
;
554 unsigned channels_per_fetch
;
556 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
557 num_fetches
= MIN2(required_channels
, 3);
558 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
559 channels_per_fetch
= 1;
563 channels_per_fetch
= required_channels
;
566 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
567 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
568 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
569 channels_per_fetch
, false, true);
572 if (num_fetches
== 1 && channels_per_fetch
> 1) {
573 LLVMValueRef fetch
= fetches
[0];
574 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
575 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
576 fetches
[i
] = LLVMBuildExtractElement(
577 ctx
->ac
.builder
, fetch
, tmp
, "");
579 num_fetches
= channels_per_fetch
;
580 channels_per_fetch
= 1;
583 for (unsigned i
= num_fetches
; i
< 4; ++i
)
584 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
586 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
587 required_channels
== 4) {
588 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
589 fetches
[3] = ctx
->ac
.i32_1
;
591 fetches
[3] = ctx
->ac
.f32_1
;
592 } else if (fix_fetch
.u
.log_size
== 3 &&
593 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
594 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
595 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
596 required_channels
== 4) {
597 /* For 2_10_10_10, the hardware returns an unsigned value;
598 * convert it to a signed one.
600 LLVMValueRef tmp
= fetches
[3];
601 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
603 /* First, recover the sign-extended signed integer value. */
604 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
605 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
607 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
609 /* For the integer-like cases, do a natural sign extension.
611 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
612 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
615 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
616 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
617 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
618 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
620 /* Convert back to the right type. */
621 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
623 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
624 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
625 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
626 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
627 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
628 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
634 for (unsigned i
= 0; i
< 4; ++i
)
635 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
638 static void declare_input_vs(
639 struct si_shader_context
*ctx
,
640 unsigned input_index
,
641 const struct tgsi_full_declaration
*decl
,
644 si_llvm_load_input_vs(ctx
, input_index
, out
);
647 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
654 case PIPE_SHADER_VERTEX
:
655 return LLVMGetParam(ctx
->main_fn
,
656 ctx
->param_vs_prim_id
);
657 case PIPE_SHADER_TESS_CTRL
:
658 return ctx
->abi
.tcs_patch_id
;
659 case PIPE_SHADER_TESS_EVAL
:
660 return ctx
->abi
.tes_patch_id
;
661 case PIPE_SHADER_GEOMETRY
:
662 return ctx
->abi
.gs_prim_id
;
670 * Return the value of tgsi_ind_register for indexing.
671 * This is the indirect index with the constant offset added to it.
673 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
674 const struct tgsi_ind_register
*ind
,
680 if (ind
->File
== TGSI_FILE_ADDRESS
) {
681 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
682 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
684 struct tgsi_full_src_register src
= {};
686 src
.Register
.File
= ind
->File
;
687 src
.Register
.Index
= ind
->Index
;
689 /* Set the second index to 0 for constants. */
690 if (ind
->File
== TGSI_FILE_CONSTANT
)
691 src
.Register
.Dimension
= 1;
693 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
696 result
= ac_to_integer(&ctx
->ac
, result
);
699 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
700 LLVMConstInt(ctx
->i32
, rel_index
, 0));
704 * Like si_get_indirect_index, but restricts the return value to a (possibly
705 * undefined) value inside [0..num).
707 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
708 const struct tgsi_ind_register
*ind
,
709 int rel_index
, unsigned num
)
711 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
713 return si_llvm_bound_index(ctx
, result
, num
);
716 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
717 LLVMValueRef vertex_dw_stride
,
718 LLVMValueRef base_addr
,
719 LLVMValueRef vertex_index
,
720 LLVMValueRef param_index
,
721 unsigned input_index
,
726 if (vertex_dw_stride
) {
727 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
728 vertex_dw_stride
, base_addr
);
732 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
733 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
736 int param
= is_patch
?
737 si_shader_io_get_unique_index_patch(name
[input_index
],
738 index
[input_index
]) :
739 si_shader_io_get_unique_index(name
[input_index
],
740 index
[input_index
], false);
742 /* Add the base address of the element. */
743 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
744 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
748 * Calculate a dword address given an input or output register and a stride.
750 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
751 const struct tgsi_full_dst_register
*dst
,
752 const struct tgsi_full_src_register
*src
,
753 LLVMValueRef vertex_dw_stride
,
754 LLVMValueRef base_addr
)
756 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
757 ubyte
*name
, *index
, *array_first
;
759 struct tgsi_full_dst_register reg
;
760 LLVMValueRef vertex_index
= NULL
;
761 LLVMValueRef ind_index
= NULL
;
763 /* Set the register description. The address computation is the same
764 * for sources and destinations. */
766 reg
.Register
.File
= src
->Register
.File
;
767 reg
.Register
.Index
= src
->Register
.Index
;
768 reg
.Register
.Indirect
= src
->Register
.Indirect
;
769 reg
.Register
.Dimension
= src
->Register
.Dimension
;
770 reg
.Indirect
= src
->Indirect
;
771 reg
.Dimension
= src
->Dimension
;
772 reg
.DimIndirect
= src
->DimIndirect
;
776 /* If the register is 2-dimensional (e.g. an array of vertices
777 * in a primitive), calculate the base address of the vertex. */
778 if (reg
.Register
.Dimension
) {
779 if (reg
.Dimension
.Indirect
)
780 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
781 1, reg
.Dimension
.Index
);
783 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
786 /* Get information about the register. */
787 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
788 name
= info
->input_semantic_name
;
789 index
= info
->input_semantic_index
;
790 array_first
= info
->input_array_first
;
791 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
792 name
= info
->output_semantic_name
;
793 index
= info
->output_semantic_index
;
794 array_first
= info
->output_array_first
;
800 if (reg
.Register
.Indirect
) {
801 /* Add the relative address of the element. */
802 if (reg
.Indirect
.ArrayID
)
803 input_index
= array_first
[reg
.Indirect
.ArrayID
];
805 input_index
= reg
.Register
.Index
;
807 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
808 1, reg
.Register
.Index
- input_index
);
810 input_index
= reg
.Register
.Index
;
813 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
814 base_addr
, vertex_index
,
815 ind_index
, input_index
,
817 !reg
.Register
.Dimension
);
820 /* The offchip buffer layout for TCS->TES is
822 * - attribute 0 of patch 0 vertex 0
823 * - attribute 0 of patch 0 vertex 1
824 * - attribute 0 of patch 0 vertex 2
826 * - attribute 0 of patch 1 vertex 0
827 * - attribute 0 of patch 1 vertex 1
829 * - attribute 1 of patch 0 vertex 0
830 * - attribute 1 of patch 0 vertex 1
832 * - per patch attribute 0 of patch 0
833 * - per patch attribute 0 of patch 1
836 * Note that every attribute has 4 components.
838 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
839 LLVMValueRef rel_patch_id
,
840 LLVMValueRef vertex_index
,
841 LLVMValueRef param_index
)
843 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
844 LLVMValueRef param_stride
, constant16
;
846 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
847 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
848 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
851 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
853 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
854 vertices_per_patch
, vertex_index
);
855 param_stride
= total_vertices
;
857 base_addr
= rel_patch_id
;
858 param_stride
= num_patches
;
861 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
862 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
865 LLVMValueRef patch_data_offset
=
866 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
868 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
869 patch_data_offset
, "");
874 /* This is a generic helper that can be shared by the NIR and TGSI backends */
875 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
876 struct si_shader_context
*ctx
,
877 LLVMValueRef vertex_index
,
878 LLVMValueRef param_index
,
884 unsigned param_index_base
;
886 param_index_base
= is_patch
?
887 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
888 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
891 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
892 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
895 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
898 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
899 vertex_index
, param_index
);
902 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
903 struct si_shader_context
*ctx
,
904 const struct tgsi_full_dst_register
*dst
,
905 const struct tgsi_full_src_register
*src
)
907 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
908 ubyte
*name
, *index
, *array_first
;
909 struct tgsi_full_src_register reg
;
910 LLVMValueRef vertex_index
= NULL
;
911 LLVMValueRef param_index
= NULL
;
914 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
916 if (reg
.Register
.Dimension
) {
918 if (reg
.Dimension
.Indirect
)
919 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
920 1, reg
.Dimension
.Index
);
922 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
925 /* Get information about the register. */
926 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
927 name
= info
->input_semantic_name
;
928 index
= info
->input_semantic_index
;
929 array_first
= info
->input_array_first
;
930 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
931 name
= info
->output_semantic_name
;
932 index
= info
->output_semantic_index
;
933 array_first
= info
->output_array_first
;
939 if (reg
.Register
.Indirect
) {
940 if (reg
.Indirect
.ArrayID
)
941 param_base
= array_first
[reg
.Indirect
.ArrayID
];
943 param_base
= reg
.Register
.Index
;
945 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
946 1, reg
.Register
.Index
- param_base
);
949 param_base
= reg
.Register
.Index
;
952 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
953 param_index
, param_base
,
954 name
, index
, !reg
.Register
.Dimension
);
957 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
958 LLVMTypeRef type
, unsigned swizzle
,
959 LLVMValueRef buffer
, LLVMValueRef offset
,
960 LLVMValueRef base
, bool can_speculate
)
962 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
963 LLVMValueRef value
, value2
;
964 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
967 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
968 0, 1, 0, can_speculate
, false);
970 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
973 if (!llvm_type_is_64bit(ctx
, type
)) {
974 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
975 0, 1, 0, can_speculate
, false);
977 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
978 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
979 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
982 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
983 swizzle
* 4, 1, 0, can_speculate
, false);
985 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
986 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
988 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
994 * \param type output value type
995 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
996 * \param dw_addr address in dwords
998 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
999 LLVMTypeRef type
, unsigned swizzle
,
1000 LLVMValueRef dw_addr
)
1002 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1005 if (swizzle
== ~0) {
1006 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1008 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1009 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1011 return ac_build_gather_values(&ctx
->ac
, values
,
1015 /* Split 64-bit loads. */
1016 if (llvm_type_is_64bit(ctx
, type
)) {
1017 LLVMValueRef lo
, hi
;
1019 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1020 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1021 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1024 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1025 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1027 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1029 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1035 * \param swizzle offset (typically 0..3)
1036 * \param dw_addr address in dwords
1037 * \param value value to store
1039 static void lds_store(struct si_shader_context
*ctx
,
1040 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1043 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1044 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1046 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1051 TESS_OFFCHIP_RING_TCS
,
1052 TESS_OFFCHIP_RING_TES
,
1055 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1056 enum si_tess_ring ring
)
1058 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1059 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1060 ctx
->param_tcs_out_lds_layout
;
1061 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1063 /* TCS only receives high 13 bits of the address. */
1064 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1065 addr
= LLVMBuildAnd(builder
, addr
,
1066 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1069 if (ring
== TCS_FACTOR_RING
) {
1070 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1071 addr
= LLVMBuildAdd(builder
, addr
,
1072 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1075 LLVMValueRef desc
[4];
1077 desc
[1] = LLVMConstInt(ctx
->i32
,
1078 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1079 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1080 desc
[3] = LLVMConstInt(ctx
->i32
,
1081 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1082 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1083 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1084 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1085 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1086 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1088 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1091 static LLVMValueRef
fetch_input_tcs(
1092 struct lp_build_tgsi_context
*bld_base
,
1093 const struct tgsi_full_src_register
*reg
,
1094 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1096 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1097 LLVMValueRef dw_addr
, stride
;
1098 unsigned swizzle
= swizzle_in
& 0xffff;
1099 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1100 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1101 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1103 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1106 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1108 LLVMValueRef vertex_index
,
1109 LLVMValueRef param_index
,
1110 unsigned const_index
,
1112 unsigned driver_location
,
1114 unsigned num_components
,
1119 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1120 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1121 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1122 LLVMValueRef dw_addr
, stride
;
1124 driver_location
= driver_location
/ 4;
1127 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1128 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1132 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1134 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1135 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1140 /* Add the constant index to the indirect index */
1141 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1142 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1144 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1150 names
= info
->input_semantic_name
;
1151 indices
= info
->input_semantic_index
;
1153 names
= info
->output_semantic_name
;
1154 indices
= info
->output_semantic_index
;
1157 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1158 vertex_index
, param_index
,
1163 LLVMValueRef value
[4];
1164 for (unsigned i
= 0; i
< num_components
; i
++) {
1165 unsigned offset
= i
;
1166 if (llvm_type_is_64bit(ctx
, type
))
1169 offset
+= component
;
1170 value
[i
+ component
] = lds_load(bld_base
, type
, offset
, dw_addr
);
1173 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1176 static LLVMValueRef
fetch_output_tcs(
1177 struct lp_build_tgsi_context
*bld_base
,
1178 const struct tgsi_full_src_register
*reg
,
1179 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1181 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1182 LLVMValueRef dw_addr
, stride
;
1183 unsigned swizzle
= (swizzle_in
& 0xffff);
1185 if (reg
->Register
.Dimension
) {
1186 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1187 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1188 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1190 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1191 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1194 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1197 static LLVMValueRef
fetch_input_tes(
1198 struct lp_build_tgsi_context
*bld_base
,
1199 const struct tgsi_full_src_register
*reg
,
1200 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1202 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1203 LLVMValueRef base
, addr
;
1204 unsigned swizzle
= (swizzle_in
& 0xffff);
1206 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1207 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1209 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1210 ctx
->tess_offchip_ring
, base
, addr
, true);
1213 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1215 LLVMValueRef vertex_index
,
1216 LLVMValueRef param_index
,
1217 unsigned const_index
,
1219 unsigned driver_location
,
1221 unsigned num_components
,
1226 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1227 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1228 LLVMValueRef base
, addr
;
1230 driver_location
= driver_location
/ 4;
1232 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1235 /* Add the constant index to the indirect index */
1236 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1237 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1239 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1242 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1243 param_index
, driver_location
,
1244 info
->input_semantic_name
,
1245 info
->input_semantic_index
,
1248 /* TODO: This will generate rather ordinary llvm code, although it
1249 * should be easy for the optimiser to fix up. In future we might want
1250 * to refactor buffer_load(), but for now this maximises code sharing
1251 * between the NIR and TGSI backends.
1253 LLVMValueRef value
[4];
1254 for (unsigned i
= 0; i
< num_components
; i
++) {
1255 unsigned offset
= i
;
1256 if (llvm_type_is_64bit(ctx
, type
)) {
1259 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1262 driver_location
+ 1,
1263 info
->input_semantic_name
,
1264 info
->input_semantic_index
,
1268 offset
= offset
% 4;
1271 offset
+= component
;
1272 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1273 ctx
->tess_offchip_ring
, base
, addr
, true);
1276 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1279 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1280 const struct tgsi_full_instruction
*inst
,
1281 const struct tgsi_opcode_info
*info
,
1283 LLVMValueRef dst
[4])
1285 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1286 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1287 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1288 unsigned chan_index
;
1289 LLVMValueRef dw_addr
, stride
;
1290 LLVMValueRef buffer
, base
, buf_addr
;
1291 LLVMValueRef values
[4];
1292 bool skip_lds_store
;
1293 bool is_tess_factor
= false, is_tess_inner
= false;
1295 /* Only handle per-patch and per-vertex outputs here.
1296 * Vectors will be lowered to scalars and this function will be called again.
1298 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1299 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1300 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1304 if (reg
->Register
.Dimension
) {
1305 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1306 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1307 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1308 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1310 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1311 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1312 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1314 if (!reg
->Register
.Indirect
) {
1315 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1317 /* Always write tess factors into LDS for the TCS epilog. */
1318 if (name
== TGSI_SEMANTIC_TESSINNER
||
1319 name
== TGSI_SEMANTIC_TESSOUTER
) {
1320 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1321 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1322 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1323 is_tess_factor
= true;
1324 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1329 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1331 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1332 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1334 uint32_t writemask
= reg
->Register
.WriteMask
;
1336 chan_index
= u_bit_scan(&writemask
);
1337 LLVMValueRef value
= dst
[chan_index
];
1339 if (inst
->Instruction
.Saturate
)
1340 value
= ac_build_clamp(&ctx
->ac
, value
);
1342 /* Skip LDS stores if there is no LDS read of this output. */
1343 if (!skip_lds_store
)
1344 lds_store(ctx
, chan_index
, dw_addr
, value
);
1346 value
= ac_to_integer(&ctx
->ac
, value
);
1347 values
[chan_index
] = value
;
1349 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1350 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1352 4 * chan_index
, 1, 0, true, false);
1355 /* Write tess factors into VGPRs for the epilog. */
1356 if (is_tess_factor
&&
1357 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1358 if (!is_tess_inner
) {
1359 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1360 ctx
->invoc0_tess_factors
[chan_index
]);
1361 } else if (chan_index
< 2) {
1362 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1363 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1368 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1369 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1371 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1372 base
, 0, 1, 0, true, false);
1376 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1377 const struct nir_variable
*var
,
1378 LLVMValueRef vertex_index
,
1379 LLVMValueRef param_index
,
1380 unsigned const_index
,
1384 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1385 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1386 const unsigned component
= var
->data
.location_frac
;
1387 const bool is_patch
= var
->data
.patch
;
1388 unsigned driver_location
= var
->data
.driver_location
;
1389 LLVMValueRef dw_addr
, stride
;
1390 LLVMValueRef buffer
, base
, addr
;
1391 LLVMValueRef values
[8];
1392 bool skip_lds_store
;
1393 bool is_tess_factor
= false, is_tess_inner
= false;
1395 driver_location
= driver_location
/ 4;
1398 /* Add the constant index to the indirect index */
1399 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1400 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1402 if (const_index
!= 0)
1403 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1407 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1408 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1409 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1410 vertex_index
, param_index
,
1412 info
->output_semantic_name
,
1413 info
->output_semantic_index
,
1416 skip_lds_store
= !info
->reads_pervertex_outputs
;
1418 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1419 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1420 vertex_index
, param_index
,
1422 info
->output_semantic_name
,
1423 info
->output_semantic_index
,
1426 skip_lds_store
= !info
->reads_perpatch_outputs
;
1429 int name
= info
->output_semantic_name
[driver_location
];
1431 /* Always write tess factors into LDS for the TCS epilog. */
1432 if (name
== TGSI_SEMANTIC_TESSINNER
||
1433 name
== TGSI_SEMANTIC_TESSOUTER
) {
1434 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1435 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1436 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1437 is_tess_factor
= true;
1438 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1443 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1445 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1447 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1448 param_index
, driver_location
,
1449 info
->output_semantic_name
,
1450 info
->output_semantic_index
,
1453 for (unsigned chan
= 0; chan
< 8; chan
++) {
1454 if (!(writemask
& (1 << chan
)))
1456 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1458 unsigned buffer_store_offset
= chan
% 4;
1460 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1463 driver_location
+ 1,
1464 info
->output_semantic_name
,
1465 info
->output_semantic_index
,
1469 /* Skip LDS stores if there is no LDS read of this output. */
1470 if (!skip_lds_store
)
1471 lds_store(ctx
, chan
, dw_addr
, value
);
1473 value
= ac_to_integer(&ctx
->ac
, value
);
1474 values
[chan
] = value
;
1476 if (writemask
!= 0xF && !is_tess_factor
) {
1477 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1479 4 * buffer_store_offset
,
1483 /* Write tess factors into VGPRs for the epilog. */
1484 if (is_tess_factor
&&
1485 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1486 if (!is_tess_inner
) {
1487 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1488 ctx
->invoc0_tess_factors
[chan
]);
1489 } else if (chan
< 2) {
1490 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1491 ctx
->invoc0_tess_factors
[4 + chan
]);
1496 if (writemask
== 0xF && !is_tess_factor
) {
1497 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1499 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1500 base
, 0, 1, 0, true, false);
1504 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1505 unsigned input_index
,
1506 unsigned vtx_offset_param
,
1510 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1511 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1512 struct si_shader
*shader
= ctx
->shader
;
1513 LLVMValueRef vtx_offset
, soffset
;
1514 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1515 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1516 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1520 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1522 /* GFX9 has the ESGS ring in LDS. */
1523 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1524 unsigned index
= vtx_offset_param
;
1526 switch (index
/ 2) {
1528 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1529 index
% 2 ? 16 : 0, 16);
1532 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1533 index
% 2 ? 16 : 0, 16);
1536 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1537 index
% 2 ? 16 : 0, 16);
1544 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1545 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1546 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1549 /* GFX6: input load from the ESGS ring in memory. */
1550 if (swizzle
== ~0) {
1551 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1553 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1554 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1557 return ac_build_gather_values(&ctx
->ac
, values
,
1561 /* Get the vertex offset parameter on GFX6. */
1562 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1564 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1565 LLVMConstInt(ctx
->i32
, 4, 0), "");
1567 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1569 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1570 vtx_offset
, soffset
, 0, 1, 0, true, false);
1571 if (llvm_type_is_64bit(ctx
, type
)) {
1572 LLVMValueRef value2
;
1573 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1575 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1576 ctx
->i32_0
, vtx_offset
, soffset
,
1577 0, 1, 0, true, false);
1578 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1580 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1583 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1585 unsigned driver_location
,
1587 unsigned num_components
,
1588 unsigned vertex_index
,
1589 unsigned const_index
,
1592 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1594 LLVMValueRef value
[4];
1595 for (unsigned i
= 0; i
< num_components
; i
++) {
1596 unsigned offset
= i
;
1597 if (llvm_type_is_64bit(ctx
, type
))
1600 offset
+= component
;
1601 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1602 vertex_index
, type
, offset
);
1605 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1608 static LLVMValueRef
fetch_input_gs(
1609 struct lp_build_tgsi_context
*bld_base
,
1610 const struct tgsi_full_src_register
*reg
,
1611 enum tgsi_opcode_type type
,
1612 unsigned swizzle_in
)
1614 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1615 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1616 unsigned swizzle
= swizzle_in
& 0xffff;
1618 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1619 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1620 return get_primitive_id(ctx
, swizzle
);
1622 if (!reg
->Register
.Dimension
)
1625 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1626 reg
->Dimension
.Index
,
1627 tgsi2llvmtype(bld_base
, type
),
1631 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1633 switch (interpolate
) {
1634 case TGSI_INTERPOLATE_CONSTANT
:
1637 case TGSI_INTERPOLATE_LINEAR
:
1638 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1639 return SI_PARAM_LINEAR_SAMPLE
;
1640 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1641 return SI_PARAM_LINEAR_CENTROID
;
1643 return SI_PARAM_LINEAR_CENTER
;
1645 case TGSI_INTERPOLATE_COLOR
:
1646 case TGSI_INTERPOLATE_PERSPECTIVE
:
1647 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1648 return SI_PARAM_PERSP_SAMPLE
;
1649 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1650 return SI_PARAM_PERSP_CENTROID
;
1652 return SI_PARAM_PERSP_CENTER
;
1655 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1660 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1661 unsigned attr_index
, unsigned chan
,
1662 LLVMValueRef prim_mask
,
1663 LLVMValueRef i
, LLVMValueRef j
)
1666 return ac_build_fs_interp(&ctx
->ac
,
1667 LLVMConstInt(ctx
->i32
, chan
, 0),
1668 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1671 return ac_build_fs_interp_mov(&ctx
->ac
,
1672 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1673 LLVMConstInt(ctx
->i32
, chan
, 0),
1674 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1679 * Interpolate a fragment shader input.
1681 * @param ctx context
1682 * @param input_index index of the input in hardware
1683 * @param semantic_name TGSI_SEMANTIC_*
1684 * @param semantic_index semantic index
1685 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1686 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1687 * @param interp_param interpolation weights (i,j)
1688 * @param prim_mask SI_PARAM_PRIM_MASK
1689 * @param face SI_PARAM_FRONT_FACE
1690 * @param result the return value (4 components)
1692 static void interp_fs_input(struct si_shader_context
*ctx
,
1693 unsigned input_index
,
1694 unsigned semantic_name
,
1695 unsigned semantic_index
,
1696 unsigned num_interp_inputs
,
1697 unsigned colors_read_mask
,
1698 LLVMValueRef interp_param
,
1699 LLVMValueRef prim_mask
,
1701 LLVMValueRef result
[4])
1703 LLVMValueRef i
= NULL
, j
= NULL
;
1706 /* fs.constant returns the param from the middle vertex, so it's not
1707 * really useful for flat shading. It's meant to be used for custom
1708 * interpolation (but the intrinsic can't fetch from the other two
1711 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1712 * to do the right thing. The only reason we use fs.constant is that
1713 * fs.interp cannot be used on integers, because they can be equal
1716 * When interp is false we will use fs.constant or for newer llvm,
1717 * amdgcn.interp.mov.
1719 bool interp
= interp_param
!= NULL
;
1722 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1723 LLVMVectorType(ctx
->f32
, 2), "");
1725 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1727 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1731 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1732 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1733 LLVMValueRef is_face_positive
;
1735 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1736 * otherwise it's at offset "num_inputs".
1738 unsigned back_attr_offset
= num_interp_inputs
;
1739 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1740 back_attr_offset
+= 1;
1742 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1743 face
, ctx
->i32_0
, "");
1745 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1746 LLVMValueRef front
, back
;
1748 front
= si_build_fs_interp(ctx
,
1751 back
= si_build_fs_interp(ctx
,
1752 back_attr_offset
, chan
,
1755 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1761 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1762 result
[0] = si_build_fs_interp(ctx
, input_index
,
1763 0, prim_mask
, i
, j
);
1765 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1766 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1768 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1769 result
[chan
] = si_build_fs_interp(ctx
,
1776 void si_llvm_load_input_fs(
1777 struct si_shader_context
*ctx
,
1778 unsigned input_index
,
1779 LLVMValueRef out
[4])
1781 struct si_shader
*shader
= ctx
->shader
;
1782 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1783 LLVMValueRef main_fn
= ctx
->main_fn
;
1784 LLVMValueRef interp_param
= NULL
;
1785 int interp_param_idx
;
1786 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1787 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1788 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1789 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1791 /* Get colors from input VGPRs (set by the prolog). */
1792 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1793 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1794 unsigned mask
= colors_read
>> (semantic_index
* 4);
1795 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1796 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1797 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1799 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1800 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1801 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1802 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1806 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1807 if (interp_param_idx
== -1)
1809 else if (interp_param_idx
) {
1810 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1813 interp_fs_input(ctx
, input_index
, semantic_name
,
1814 semantic_index
, 0, /* this param is unused */
1815 shader
->selector
->info
.colors_read
, interp_param
,
1817 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1821 static void declare_input_fs(
1822 struct si_shader_context
*ctx
,
1823 unsigned input_index
,
1824 const struct tgsi_full_declaration
*decl
,
1825 LLVMValueRef out
[4])
1827 si_llvm_load_input_fs(ctx
, input_index
, out
);
1830 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1832 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1835 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1837 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1839 /* For non-indexed draws, the base vertex set by the driver
1840 * (for direct draws) or the CP (for indirect draws) is the
1841 * first vertex ID, but GLSL expects 0 to be returned.
1843 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1844 ctx
->param_vs_state_bits
);
1845 LLVMValueRef indexed
;
1847 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1848 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1850 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1854 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1856 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1858 LLVMValueRef values
[3];
1859 LLVMValueRef result
;
1861 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1863 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1864 unsigned sizes
[3] = {
1865 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1866 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1867 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1870 for (i
= 0; i
< 3; ++i
)
1871 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1873 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1875 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1882 * Load a dword from a constant buffer.
1884 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1885 LLVMValueRef resource
,
1886 LLVMValueRef offset
)
1888 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1889 0, 0, 0, true, true);
1892 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1894 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1895 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1896 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1897 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1899 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1900 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1901 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1903 LLVMValueRef pos
[4] = {
1904 buffer_load_const(ctx
, resource
, offset0
),
1905 buffer_load_const(ctx
, resource
, offset1
),
1906 LLVMConstReal(ctx
->f32
, 0),
1907 LLVMConstReal(ctx
->f32
, 0)
1910 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1913 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1915 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1916 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1919 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1921 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1922 LLVMValueRef coord
[4] = {
1923 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1924 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1929 /* For triangles, the vector should be (u, v, 1-u-v). */
1930 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1931 PIPE_PRIM_TRIANGLES
) {
1932 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1933 LLVMBuildFAdd(ctx
->ac
.builder
,
1934 coord
[0], coord
[1], ""), "");
1936 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1939 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1940 unsigned semantic_name
)
1942 LLVMValueRef base
, addr
;
1944 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1946 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1947 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1948 LLVMConstInt(ctx
->i32
, param
, 0));
1950 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1951 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1955 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1956 unsigned varying_id
)
1958 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1959 unsigned semantic_name
;
1961 switch (varying_id
) {
1962 case VARYING_SLOT_TESS_LEVEL_INNER
:
1963 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1965 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1966 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1969 unreachable("unknown tess level");
1972 return load_tess_level(ctx
, semantic_name
);
1976 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1978 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1979 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1980 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
1981 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1982 return get_num_tcs_out_vertices(ctx
);
1984 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1987 void si_load_system_value(struct si_shader_context
*ctx
,
1989 const struct tgsi_full_declaration
*decl
)
1991 LLVMValueRef value
= 0;
1993 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1995 switch (decl
->Semantic
.Name
) {
1996 case TGSI_SEMANTIC_INSTANCEID
:
1997 value
= ctx
->abi
.instance_id
;
2000 case TGSI_SEMANTIC_VERTEXID
:
2001 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2003 ctx
->abi
.base_vertex
, "");
2006 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2007 /* Unused. Clarify the meaning in indexed vs. non-indexed
2008 * draws if this is ever used again. */
2012 case TGSI_SEMANTIC_BASEVERTEX
:
2013 value
= get_base_vertex(&ctx
->abi
);
2016 case TGSI_SEMANTIC_BASEINSTANCE
:
2017 value
= ctx
->abi
.start_instance
;
2020 case TGSI_SEMANTIC_DRAWID
:
2021 value
= ctx
->abi
.draw_id
;
2024 case TGSI_SEMANTIC_INVOCATIONID
:
2025 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2026 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2027 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2028 value
= ctx
->abi
.gs_invocation_id
;
2030 assert(!"INVOCATIONID not implemented");
2033 case TGSI_SEMANTIC_POSITION
:
2035 LLVMValueRef pos
[4] = {
2036 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2037 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2038 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2039 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2040 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2042 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2046 case TGSI_SEMANTIC_FACE
:
2047 value
= ctx
->abi
.front_face
;
2050 case TGSI_SEMANTIC_SAMPLEID
:
2051 value
= si_get_sample_id(ctx
);
2054 case TGSI_SEMANTIC_SAMPLEPOS
: {
2055 LLVMValueRef pos
[4] = {
2056 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2057 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2058 LLVMConstReal(ctx
->f32
, 0),
2059 LLVMConstReal(ctx
->f32
, 0)
2061 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2062 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2063 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2067 case TGSI_SEMANTIC_SAMPLEMASK
:
2068 /* This can only occur with the OpenGL Core profile, which
2069 * doesn't support smoothing.
2071 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2074 case TGSI_SEMANTIC_TESSCOORD
:
2075 value
= si_load_tess_coord(&ctx
->abi
);
2078 case TGSI_SEMANTIC_VERTICESIN
:
2079 value
= si_load_patch_vertices_in(&ctx
->abi
);
2082 case TGSI_SEMANTIC_TESSINNER
:
2083 case TGSI_SEMANTIC_TESSOUTER
:
2084 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2087 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2088 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2090 LLVMValueRef buf
, slot
, val
[4];
2093 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2094 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2095 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2096 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2098 for (i
= 0; i
< 4; i
++)
2099 val
[i
] = buffer_load_const(ctx
, buf
,
2100 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2101 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2105 case TGSI_SEMANTIC_PRIMID
:
2106 value
= get_primitive_id(ctx
, 0);
2109 case TGSI_SEMANTIC_GRID_SIZE
:
2110 value
= ctx
->abi
.num_work_groups
;
2113 case TGSI_SEMANTIC_BLOCK_SIZE
:
2114 value
= get_block_size(&ctx
->abi
);
2117 case TGSI_SEMANTIC_BLOCK_ID
:
2119 LLVMValueRef values
[3];
2121 for (int i
= 0; i
< 3; i
++) {
2122 values
[i
] = ctx
->i32_0
;
2123 if (ctx
->abi
.workgroup_ids
[i
]) {
2124 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2127 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2131 case TGSI_SEMANTIC_THREAD_ID
:
2132 value
= ctx
->abi
.local_invocation_ids
;
2135 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2136 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2139 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2140 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2143 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2144 value
= ac_get_thread_id(&ctx
->ac
);
2147 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2149 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2150 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2151 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2152 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2156 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2157 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2158 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2159 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2161 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2162 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2163 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2164 /* All bits set except LSB */
2165 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2168 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2170 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2171 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2172 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2173 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2174 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2175 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2179 case TGSI_SEMANTIC_CS_USER_DATA
:
2180 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2184 assert(!"unknown system value");
2188 ctx
->system_values
[index
] = value
;
2191 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2193 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2194 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2196 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2199 assert(!ctx
->ac
.lds
);
2201 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2202 LLVMArrayType(ctx
->i8
, lds_size
),
2205 LLVMSetAlignment(var
, 4);
2207 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2210 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2211 const struct tgsi_full_declaration
*decl
)
2213 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2214 assert(decl
->Range
.First
== decl
->Range
.Last
);
2216 si_declare_compute_memory(ctx
);
2219 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2222 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2223 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2225 /* Do the bounds checking with a descriptor, because
2226 * doing computation and manual bounds checking of 64-bit
2227 * addresses generates horrible VALU code with very high
2228 * VGPR usage and very low SIMD occupancy.
2230 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2232 LLVMValueRef desc0
, desc1
;
2234 desc1
= LLVMConstInt(ctx
->i32
,
2235 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2237 LLVMValueRef desc_elems
[] = {
2240 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2241 LLVMConstInt(ctx
->i32
,
2242 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2243 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2244 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2245 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2246 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2247 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2250 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2253 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2255 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2256 ctx
->param_const_and_shader_buffers
);
2258 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2259 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2262 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2264 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2265 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2267 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2269 if (sel
->info
.const_buffers_declared
== 1 &&
2270 sel
->info
.shader_buffers_declared
== 0) {
2271 return load_const_buffer_desc_fast_path(ctx
);
2274 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2275 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2276 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2278 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2282 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2284 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2285 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2286 ctx
->param_const_and_shader_buffers
);
2288 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2289 index
= LLVMBuildSub(ctx
->ac
.builder
,
2290 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2293 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2296 static LLVMValueRef
fetch_constant(
2297 struct lp_build_tgsi_context
*bld_base
,
2298 const struct tgsi_full_src_register
*reg
,
2299 enum tgsi_opcode_type type
,
2300 unsigned swizzle_in
)
2302 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2303 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2304 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2306 unsigned swizzle
= swizzle_in
& 0xffff;
2308 LLVMValueRef addr
, bufp
;
2310 if (swizzle_in
== LP_CHAN_ALL
) {
2312 LLVMValueRef values
[4];
2313 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2314 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2316 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2319 /* Split 64-bit loads. */
2320 if (tgsi_type_is_64bit(type
)) {
2321 LLVMValueRef lo
, hi
;
2323 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2324 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2325 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2329 idx
= reg
->Register
.Index
* 4 + swizzle
;
2330 if (reg
->Register
.Indirect
) {
2331 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2333 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2336 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2337 if (sel
->info
.const_buffers_declared
== 1 &&
2338 sel
->info
.shader_buffers_declared
== 0) {
2339 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2340 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2341 return bitcast(bld_base
, type
, result
);
2344 assert(reg
->Register
.Dimension
);
2345 buf
= reg
->Dimension
.Index
;
2347 if (reg
->Dimension
.Indirect
) {
2348 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2350 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2351 reg
->Dimension
.Index
,
2352 ctx
->num_const_buffers
);
2353 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2354 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2355 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2357 bufp
= load_const_buffer_desc(ctx
, buf
);
2359 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2362 /* Initialize arguments for the shader export intrinsic */
2363 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2364 LLVMValueRef
*values
,
2366 struct ac_export_args
*args
)
2368 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2369 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2371 bool is_int8
, is_int10
;
2373 /* Default is 0xf. Adjusted below depending on the format. */
2374 args
->enabled_channels
= 0xf; /* writemask */
2376 /* Specify whether the EXEC mask represents the valid mask */
2377 args
->valid_mask
= 0;
2379 /* Specify whether this is the last export */
2382 /* Specify the target we are exporting */
2383 args
->target
= target
;
2385 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2386 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2387 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2388 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2390 assert(cbuf
>= 0 && cbuf
< 8);
2391 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2392 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2393 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2396 args
->compr
= false;
2397 args
->out
[0] = f32undef
;
2398 args
->out
[1] = f32undef
;
2399 args
->out
[2] = f32undef
;
2400 args
->out
[3] = f32undef
;
2402 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2403 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2404 unsigned bits
, bool hi
) = NULL
;
2406 switch (spi_shader_col_format
) {
2407 case V_028714_SPI_SHADER_ZERO
:
2408 args
->enabled_channels
= 0; /* writemask */
2409 args
->target
= V_008DFC_SQ_EXP_NULL
;
2412 case V_028714_SPI_SHADER_32_R
:
2413 args
->enabled_channels
= 1; /* writemask */
2414 args
->out
[0] = values
[0];
2417 case V_028714_SPI_SHADER_32_GR
:
2418 args
->enabled_channels
= 0x3; /* writemask */
2419 args
->out
[0] = values
[0];
2420 args
->out
[1] = values
[1];
2423 case V_028714_SPI_SHADER_32_AR
:
2424 args
->enabled_channels
= 0x9; /* writemask */
2425 args
->out
[0] = values
[0];
2426 args
->out
[3] = values
[3];
2429 case V_028714_SPI_SHADER_FP16_ABGR
:
2430 packf
= ac_build_cvt_pkrtz_f16
;
2433 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2434 packf
= ac_build_cvt_pknorm_u16
;
2437 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2438 packf
= ac_build_cvt_pknorm_i16
;
2441 case V_028714_SPI_SHADER_UINT16_ABGR
:
2442 packi
= ac_build_cvt_pk_u16
;
2445 case V_028714_SPI_SHADER_SINT16_ABGR
:
2446 packi
= ac_build_cvt_pk_i16
;
2449 case V_028714_SPI_SHADER_32_ABGR
:
2450 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2454 /* Pack f16 or norm_i16/u16. */
2456 for (chan
= 0; chan
< 2; chan
++) {
2457 LLVMValueRef pack_args
[2] = {
2459 values
[2 * chan
+ 1]
2461 LLVMValueRef packed
;
2463 packed
= packf(&ctx
->ac
, pack_args
);
2464 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2466 args
->compr
= 1; /* COMPR flag */
2470 for (chan
= 0; chan
< 2; chan
++) {
2471 LLVMValueRef pack_args
[2] = {
2472 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2473 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2475 LLVMValueRef packed
;
2477 packed
= packi(&ctx
->ac
, pack_args
,
2478 is_int8
? 8 : is_int10
? 10 : 16,
2480 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2482 args
->compr
= 1; /* COMPR flag */
2486 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2489 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2491 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2492 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2493 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2494 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2495 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2496 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2497 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2498 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2500 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2503 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2504 SI_PARAM_ALPHA_REF
);
2505 LLVMValueRef alpha_pass
=
2506 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2507 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2509 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2513 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2515 unsigned samplemask_param
)
2517 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2518 LLVMValueRef coverage
;
2520 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2521 coverage
= LLVMGetParam(ctx
->main_fn
,
2523 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2525 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2527 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2529 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2532 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2533 LLVMConstReal(ctx
->f32
,
2534 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2536 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2539 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2540 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2544 unsigned const_chan
;
2545 LLVMValueRef base_elt
;
2546 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2547 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2548 SI_VS_CONST_CLIP_PLANES
, 0);
2549 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2551 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2552 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2557 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2559 /* Compute dot products of position and user clip plane vectors */
2560 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2561 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2563 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2564 const_chan
) * 4, 0);
2565 base_elt
= buffer_load_const(ctx
, const_resource
,
2567 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2568 out_elts
[const_chan
], args
->out
[chan
]);
2572 args
->enabled_channels
= 0xf;
2573 args
->valid_mask
= 0;
2575 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2580 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2584 if (so
->num_outputs
)
2585 fprintf(stderr
, "STREAMOUT\n");
2587 for (i
= 0; i
< so
->num_outputs
; i
++) {
2588 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2589 so
->output
[i
].start_component
;
2590 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2591 i
, so
->output
[i
].output_buffer
,
2592 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2593 so
->output
[i
].register_index
,
2594 mask
& 1 ? "x" : "",
2595 mask
& 2 ? "y" : "",
2596 mask
& 4 ? "z" : "",
2597 mask
& 8 ? "w" : "");
2601 static void emit_streamout_output(struct si_shader_context
*ctx
,
2602 LLVMValueRef
const *so_buffers
,
2603 LLVMValueRef
const *so_write_offsets
,
2604 struct pipe_stream_output
*stream_out
,
2605 struct si_shader_output_values
*shader_out
)
2607 unsigned buf_idx
= stream_out
->output_buffer
;
2608 unsigned start
= stream_out
->start_component
;
2609 unsigned num_comps
= stream_out
->num_components
;
2610 LLVMValueRef out
[4];
2612 assert(num_comps
&& num_comps
<= 4);
2613 if (!num_comps
|| num_comps
> 4)
2616 /* Load the output as int. */
2617 for (int j
= 0; j
< num_comps
; j
++) {
2618 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2620 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2623 /* Pack the output. */
2624 LLVMValueRef vdata
= NULL
;
2626 switch (num_comps
) {
2627 case 1: /* as i32 */
2630 case 2: /* as v2i32 */
2631 case 3: /* as v3i32 */
2632 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2633 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2636 /* as v4i32 (aligned to 4) */
2637 out
[3] = LLVMGetUndef(ctx
->i32
);
2639 case 4: /* as v4i32 */
2640 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2644 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2646 so_write_offsets
[buf_idx
],
2648 stream_out
->dst_offset
* 4, 1, 1, true, false);
2652 * Write streamout data to buffers for vertex stream @p stream (different
2653 * vertex streams can occur for GS copy shaders).
2655 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2656 struct si_shader_output_values
*outputs
,
2657 unsigned noutput
, unsigned stream
)
2659 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2660 struct pipe_stream_output_info
*so
= &sel
->so
;
2661 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2663 struct lp_build_if_state if_ctx
;
2665 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2666 LLVMValueRef so_vtx_count
=
2667 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2669 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2671 /* can_emit = tid < so_vtx_count; */
2672 LLVMValueRef can_emit
=
2673 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2675 /* Emit the streamout code conditionally. This actually avoids
2676 * out-of-bounds buffer access. The hw tells us via the SGPR
2677 * (so_vtx_count) which threads are allowed to emit streamout data. */
2678 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2680 /* The buffer offset is computed as follows:
2681 * ByteOffset = streamout_offset[buffer_id]*4 +
2682 * (streamout_write_index + thread_id)*stride[buffer_id] +
2686 LLVMValueRef so_write_index
=
2687 LLVMGetParam(ctx
->main_fn
,
2688 ctx
->param_streamout_write_index
);
2690 /* Compute (streamout_write_index + thread_id). */
2691 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2693 /* Load the descriptor and compute the write offset for each
2694 * enabled buffer. */
2695 LLVMValueRef so_write_offset
[4] = {};
2696 LLVMValueRef so_buffers
[4];
2697 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2698 ctx
->param_rw_buffers
);
2700 for (i
= 0; i
< 4; i
++) {
2704 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2705 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2707 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2709 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2710 ctx
->param_streamout_offset
[i
]);
2711 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2713 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2714 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2718 /* Write streamout data. */
2719 for (i
= 0; i
< so
->num_outputs
; i
++) {
2720 unsigned reg
= so
->output
[i
].register_index
;
2725 if (stream
!= so
->output
[i
].stream
)
2728 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2729 &so
->output
[i
], &outputs
[reg
]);
2732 lp_build_endif(&if_ctx
);
2735 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2736 LLVMValueRef
*values
)
2738 struct ac_export_args args
;
2740 si_llvm_init_export_args(ctx
, values
,
2741 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2742 ac_build_export(&ctx
->ac
, &args
);
2745 static void si_build_param_exports(struct si_shader_context
*ctx
,
2746 struct si_shader_output_values
*outputs
,
2749 struct si_shader
*shader
= ctx
->shader
;
2750 unsigned param_count
= 0;
2752 for (unsigned i
= 0; i
< noutput
; i
++) {
2753 unsigned semantic_name
= outputs
[i
].semantic_name
;
2754 unsigned semantic_index
= outputs
[i
].semantic_index
;
2756 if (outputs
[i
].vertex_stream
[0] != 0 &&
2757 outputs
[i
].vertex_stream
[1] != 0 &&
2758 outputs
[i
].vertex_stream
[2] != 0 &&
2759 outputs
[i
].vertex_stream
[3] != 0)
2762 switch (semantic_name
) {
2763 case TGSI_SEMANTIC_LAYER
:
2764 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2765 case TGSI_SEMANTIC_CLIPDIST
:
2766 case TGSI_SEMANTIC_COLOR
:
2767 case TGSI_SEMANTIC_BCOLOR
:
2768 case TGSI_SEMANTIC_PRIMID
:
2769 case TGSI_SEMANTIC_FOG
:
2770 case TGSI_SEMANTIC_TEXCOORD
:
2771 case TGSI_SEMANTIC_GENERIC
:
2777 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2778 semantic_index
< SI_MAX_IO_GENERIC
) &&
2779 shader
->key
.opt
.kill_outputs
&
2780 (1ull << si_shader_io_get_unique_index(semantic_name
,
2781 semantic_index
, true)))
2784 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2786 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2787 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2790 shader
->info
.nr_param_exports
= param_count
;
2794 * Vertex color clamping.
2796 * This uses a state constant loaded in a user data SGPR and
2797 * an IF statement is added that clamps all colors if the constant
2800 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2801 struct si_shader_output_values
*outputs
,
2804 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2805 bool has_colors
= false;
2807 /* Store original colors to alloca variables. */
2808 for (unsigned i
= 0; i
< noutput
; i
++) {
2809 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2810 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2813 for (unsigned j
= 0; j
< 4; j
++) {
2814 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2815 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2823 /* The state is in the first bit of the user SGPR. */
2824 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2825 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2827 struct lp_build_if_state if_ctx
;
2828 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
2830 /* Store clamped colors to alloca variables within the conditional block. */
2831 for (unsigned i
= 0; i
< noutput
; i
++) {
2832 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2833 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2836 for (unsigned j
= 0; j
< 4; j
++) {
2837 LLVMBuildStore(ctx
->ac
.builder
,
2838 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2842 lp_build_endif(&if_ctx
);
2844 /* Load clamped colors */
2845 for (unsigned i
= 0; i
< noutput
; i
++) {
2846 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2847 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2850 for (unsigned j
= 0; j
< 4; j
++) {
2851 outputs
[i
].values
[j
] =
2852 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2857 /* Generate export instructions for hardware VS shader stage */
2858 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2859 struct si_shader_output_values
*outputs
,
2862 struct si_shader
*shader
= ctx
->shader
;
2863 struct ac_export_args pos_args
[4] = {};
2864 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2868 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2870 /* Build position exports. */
2871 for (i
= 0; i
< noutput
; i
++) {
2872 switch (outputs
[i
].semantic_name
) {
2873 case TGSI_SEMANTIC_POSITION
:
2874 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2875 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2877 case TGSI_SEMANTIC_PSIZE
:
2878 psize_value
= outputs
[i
].values
[0];
2880 case TGSI_SEMANTIC_LAYER
:
2881 layer_value
= outputs
[i
].values
[0];
2883 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2884 viewport_index_value
= outputs
[i
].values
[0];
2886 case TGSI_SEMANTIC_EDGEFLAG
:
2887 edgeflag_value
= outputs
[i
].values
[0];
2889 case TGSI_SEMANTIC_CLIPDIST
:
2890 if (!shader
->key
.opt
.clip_disable
) {
2891 unsigned index
= 2 + outputs
[i
].semantic_index
;
2892 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2893 V_008DFC_SQ_EXP_POS
+ index
,
2897 case TGSI_SEMANTIC_CLIPVERTEX
:
2898 if (!shader
->key
.opt
.clip_disable
) {
2899 si_llvm_emit_clipvertex(ctx
, pos_args
,
2906 /* We need to add the position output manually if it's missing. */
2907 if (!pos_args
[0].out
[0]) {
2908 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2909 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2910 pos_args
[0].done
= 0; /* last export? */
2911 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2912 pos_args
[0].compr
= 0; /* COMPR flag */
2913 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2914 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2915 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2916 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2919 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2920 if (shader
->selector
->info
.writes_psize
||
2921 shader
->selector
->info
.writes_edgeflag
||
2922 shader
->selector
->info
.writes_viewport_index
||
2923 shader
->selector
->info
.writes_layer
) {
2924 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2925 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2926 (shader
->selector
->info
.writes_layer
<< 2);
2928 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2929 pos_args
[1].done
= 0; /* last export? */
2930 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2931 pos_args
[1].compr
= 0; /* COMPR flag */
2932 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2933 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2934 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2935 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2937 if (shader
->selector
->info
.writes_psize
)
2938 pos_args
[1].out
[0] = psize_value
;
2940 if (shader
->selector
->info
.writes_edgeflag
) {
2941 /* The output is a float, but the hw expects an integer
2942 * with the first bit containing the edge flag. */
2943 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2946 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2950 /* The LLVM intrinsic expects a float. */
2951 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2954 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2955 /* GFX9 has the layer in out.z[10:0] and the viewport
2956 * index in out.z[19:16].
2958 if (shader
->selector
->info
.writes_layer
)
2959 pos_args
[1].out
[2] = layer_value
;
2961 if (shader
->selector
->info
.writes_viewport_index
) {
2962 LLVMValueRef v
= viewport_index_value
;
2964 v
= ac_to_integer(&ctx
->ac
, v
);
2965 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2966 LLVMConstInt(ctx
->i32
, 16, 0), "");
2967 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2968 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2969 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2970 pos_args
[1].enabled_channels
|= 1 << 2;
2973 if (shader
->selector
->info
.writes_layer
)
2974 pos_args
[1].out
[2] = layer_value
;
2976 if (shader
->selector
->info
.writes_viewport_index
) {
2977 pos_args
[1].out
[3] = viewport_index_value
;
2978 pos_args
[1].enabled_channels
|= 1 << 3;
2983 for (i
= 0; i
< 4; i
++)
2984 if (pos_args
[i
].out
[0])
2985 shader
->info
.nr_pos_exports
++;
2988 for (i
= 0; i
< 4; i
++) {
2989 if (!pos_args
[i
].out
[0])
2992 /* Specify the target we are exporting */
2993 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2995 if (pos_idx
== shader
->info
.nr_pos_exports
)
2996 /* Specify that this is the last export */
2997 pos_args
[i
].done
= 1;
2999 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3002 /* Build parameter exports. */
3003 si_build_param_exports(ctx
, outputs
, noutput
);
3007 * Forward all outputs from the vertex shader to the TES. This is only used
3008 * for the fixed function TCS.
3010 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3012 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3013 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3014 LLVMValueRef lds_vertex_stride
, lds_base
;
3017 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3018 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3019 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3021 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3022 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3023 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3026 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3028 unsigned i
= u_bit_scan64(&inputs
);
3030 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3031 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3034 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3035 get_rel_patch_id(ctx
),
3037 LLVMConstInt(ctx
->i32
, i
, 0));
3039 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3042 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3043 buffer_offset
, 0, 1, 0, true, false);
3047 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3048 LLVMValueRef rel_patch_id
,
3049 LLVMValueRef invocation_id
,
3050 LLVMValueRef tcs_out_current_patch_data_offset
,
3051 LLVMValueRef invoc0_tf_outer
[4],
3052 LLVMValueRef invoc0_tf_inner
[2])
3054 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3055 struct si_shader
*shader
= ctx
->shader
;
3056 unsigned tess_inner_index
, tess_outer_index
;
3057 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3058 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3059 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3060 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3062 /* Add a barrier before loading tess factors from LDS. */
3063 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3064 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3066 /* Do this only for invocation 0, because the tess levels are per-patch,
3069 * This can't jump, because invocation 0 executes this. It should
3070 * at least mask out the loads and stores for other invocations.
3072 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3073 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3074 invocation_id
, ctx
->i32_0
, ""));
3076 /* Determine the layout of one tess factor element in the buffer. */
3077 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3078 case PIPE_PRIM_LINES
:
3079 stride
= 2; /* 2 dwords, 1 vec2 store */
3083 case PIPE_PRIM_TRIANGLES
:
3084 stride
= 4; /* 4 dwords, 1 vec4 store */
3088 case PIPE_PRIM_QUADS
:
3089 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3098 for (i
= 0; i
< 4; i
++) {
3099 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3100 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3103 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3104 /* Tess factors are in VGPRs. */
3105 for (i
= 0; i
< outer_comps
; i
++)
3106 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3107 for (i
= 0; i
< inner_comps
; i
++)
3108 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3110 /* Load tess_inner and tess_outer from LDS.
3111 * Any invocation can write them, so we can't get them from a temporary.
3113 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3114 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3116 lds_base
= tcs_out_current_patch_data_offset
;
3117 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3118 LLVMConstInt(ctx
->i32
,
3119 tess_inner_index
* 4, 0), "");
3120 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3121 LLVMConstInt(ctx
->i32
,
3122 tess_outer_index
* 4, 0), "");
3124 for (i
= 0; i
< outer_comps
; i
++) {
3126 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3128 for (i
= 0; i
< inner_comps
; i
++) {
3129 inner
[i
] = out
[outer_comps
+i
] =
3130 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3134 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3135 /* For isolines, the hardware expects tess factors in the
3136 * reverse order from what GLSL / TGSI specify.
3138 LLVMValueRef tmp
= out
[0];
3143 /* Convert the outputs to vectors for stores. */
3144 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3148 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3150 /* Get the buffer. */
3151 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3153 /* Get the offset. */
3154 tf_base
= LLVMGetParam(ctx
->main_fn
,
3155 ctx
->param_tcs_factor_offset
);
3156 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3157 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3159 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3160 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3161 rel_patch_id
, ctx
->i32_0
, ""));
3163 /* Store the dynamic HS control word. */
3165 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3166 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3167 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3168 1, ctx
->i32_0
, tf_base
,
3169 offset
, 1, 0, true, false);
3173 lp_build_endif(&inner_if_ctx
);
3175 /* Store the tessellation factors. */
3176 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3177 MIN2(stride
, 4), byteoffset
, tf_base
,
3178 offset
, 1, 0, true, false);
3181 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3182 stride
- 4, byteoffset
, tf_base
,
3183 offset
, 1, 0, true, false);
3185 /* Store the tess factors into the offchip buffer if TES reads them. */
3186 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3187 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3188 LLVMValueRef tf_inner_offset
;
3189 unsigned param_outer
, param_inner
;
3191 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3192 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3194 param_outer
= si_shader_io_get_unique_index_patch(
3195 TGSI_SEMANTIC_TESSOUTER
, 0);
3196 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3197 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3199 unsigned outer_vec_size
=
3200 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3201 outer_comps
: util_next_power_of_two(outer_comps
);
3202 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3204 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3205 outer_comps
, tf_outer_offset
,
3206 base
, 0, 1, 0, true, false);
3208 param_inner
= si_shader_io_get_unique_index_patch(
3209 TGSI_SEMANTIC_TESSINNER
, 0);
3210 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3211 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3213 inner_vec
= inner_comps
== 1 ? inner
[0] :
3214 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3215 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3216 inner_comps
, tf_inner_offset
,
3217 base
, 0, 1, 0, true, false);
3221 lp_build_endif(&if_ctx
);
3225 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3226 unsigned param
, unsigned return_index
)
3228 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3229 LLVMGetParam(ctx
->main_fn
, param
),
3234 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3235 unsigned param
, unsigned return_index
)
3237 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3238 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3240 return LLVMBuildInsertValue(builder
, ret
,
3241 ac_to_float(&ctx
->ac
, p
),
3246 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3247 unsigned param
, unsigned return_index
)
3249 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3250 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3251 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3252 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3255 /* This only writes the tessellation factor levels. */
3256 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3257 unsigned max_outputs
,
3258 LLVMValueRef
*addrs
)
3260 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3261 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3262 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3263 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3265 si_copy_tcs_inputs(bld_base
);
3267 rel_patch_id
= get_rel_patch_id(ctx
);
3268 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3269 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3271 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3272 LLVMBasicBlockRef blocks
[2] = {
3273 LLVMGetInsertBlock(builder
),
3274 ctx
->merged_wrap_if_state
.entry_block
3276 LLVMValueRef values
[2];
3278 lp_build_endif(&ctx
->merged_wrap_if_state
);
3280 values
[0] = rel_patch_id
;
3281 values
[1] = LLVMGetUndef(ctx
->i32
);
3282 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3284 values
[0] = tf_lds_offset
;
3285 values
[1] = LLVMGetUndef(ctx
->i32
);
3286 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3288 values
[0] = invocation_id
;
3289 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3290 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3293 /* Return epilog parameters from this function. */
3294 LLVMValueRef ret
= ctx
->return_value
;
3297 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3298 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3299 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3300 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3301 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3302 /* Tess offchip and tess factor offsets are at the beginning. */
3303 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3304 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3305 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3307 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3308 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3309 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3310 GFX6_SGPR_TCS_OUT_LAYOUT
);
3311 /* Tess offchip and tess factor offsets are after user SGPRs. */
3312 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3313 GFX6_TCS_NUM_USER_SGPR
);
3314 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3315 GFX6_TCS_NUM_USER_SGPR
+ 1);
3316 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3320 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3321 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3322 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3324 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3325 * the invocation_id output does not alias the tcs_rel_ids input,
3326 * which saves a V_MOV on gfx9.
3330 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3331 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3333 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3334 vgpr
++; /* skip the tess factor LDS offset */
3335 for (unsigned i
= 0; i
< 6; i
++) {
3336 LLVMValueRef value
=
3337 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3338 value
= ac_to_float(&ctx
->ac
, value
);
3339 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3342 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3344 ctx
->return_value
= ret
;
3347 /* Pass TCS inputs from LS to TCS on GFX9. */
3348 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3350 LLVMValueRef ret
= ctx
->return_value
;
3352 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3353 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3354 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3355 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3356 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3357 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3359 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3360 8 + SI_SGPR_RW_BUFFERS
);
3361 ret
= si_insert_input_ptr(ctx
, ret
,
3362 ctx
->param_bindless_samplers_and_images
,
3363 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3365 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3366 8 + SI_SGPR_VS_STATE_BITS
);
3368 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3369 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3370 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3371 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3373 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3375 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3376 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3377 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3379 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3380 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3382 ctx
->return_value
= ret
;
3385 /* Pass GS inputs from ES to GS on GFX9. */
3386 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3388 LLVMValueRef ret
= ctx
->return_value
;
3390 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3391 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3392 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3393 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3394 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3396 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3397 8 + SI_SGPR_RW_BUFFERS
);
3398 ret
= si_insert_input_ptr(ctx
, ret
,
3399 ctx
->param_bindless_samplers_and_images
,
3400 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3403 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3404 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3406 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3408 for (unsigned i
= 0; i
< 5; i
++) {
3409 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3410 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3412 ctx
->return_value
= ret
;
3415 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3416 unsigned max_outputs
,
3417 LLVMValueRef
*addrs
)
3419 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3420 struct si_shader
*shader
= ctx
->shader
;
3421 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3423 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3424 ctx
->param_rel_auto_id
);
3425 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3426 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3427 vertex_dw_stride
, "");
3429 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3430 * its inputs from it. */
3431 for (i
= 0; i
< info
->num_outputs
; i
++) {
3432 unsigned name
= info
->output_semantic_name
[i
];
3433 unsigned index
= info
->output_semantic_index
[i
];
3435 /* The ARB_shader_viewport_layer_array spec contains the
3438 * 2) What happens if gl_ViewportIndex or gl_Layer is
3439 * written in the vertex shader and a geometry shader is
3442 * RESOLVED: The value written by the last vertex processing
3443 * stage is used. If the last vertex processing stage
3444 * (vertex, tessellation evaluation or geometry) does not
3445 * statically assign to gl_ViewportIndex or gl_Layer, index
3446 * or layer zero is assumed.
3448 * So writes to those outputs in VS-as-LS are simply ignored.
3450 if (name
== TGSI_SEMANTIC_LAYER
||
3451 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3454 int param
= si_shader_io_get_unique_index(name
, index
, false);
3455 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3456 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3458 for (chan
= 0; chan
< 4; chan
++) {
3459 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3462 lds_store(ctx
, chan
, dw_addr
,
3463 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3467 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3468 si_set_ls_return_value_for_tcs(ctx
);
3471 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3472 unsigned max_outputs
,
3473 LLVMValueRef
*addrs
)
3475 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3476 struct si_shader
*es
= ctx
->shader
;
3477 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3478 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3479 ctx
->param_es2gs_offset
);
3480 LLVMValueRef lds_base
= NULL
;
3484 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3485 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3486 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3487 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3488 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3489 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3490 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3491 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3492 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3495 for (i
= 0; i
< info
->num_outputs
; i
++) {
3498 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3499 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3502 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3503 info
->output_semantic_index
[i
], false);
3505 for (chan
= 0; chan
< 4; chan
++) {
3506 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3509 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3510 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3512 /* GFX9 has the ESGS ring in LDS. */
3513 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3514 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3518 ac_build_buffer_store_dword(&ctx
->ac
,
3520 out_val
, 1, NULL
, soffset
,
3521 (4 * param
+ chan
) * 4,
3526 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3527 si_set_es_return_value_for_gs(ctx
);
3530 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3532 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3533 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3535 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3538 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3540 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3541 si_get_gs_wave_id(ctx
));
3543 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3544 lp_build_endif(&ctx
->merged_wrap_if_state
);
3547 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3548 unsigned max_outputs
,
3549 LLVMValueRef
*addrs
)
3551 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3552 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3554 assert(info
->num_outputs
<= max_outputs
);
3556 emit_gs_epilogue(ctx
);
3559 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3561 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3562 emit_gs_epilogue(ctx
);
3565 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3566 unsigned max_outputs
,
3567 LLVMValueRef
*addrs
)
3569 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3570 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3571 struct si_shader_output_values
*outputs
= NULL
;
3574 assert(!ctx
->shader
->is_gs_copy_shader
);
3575 assert(info
->num_outputs
<= max_outputs
);
3577 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3579 for (i
= 0; i
< info
->num_outputs
; i
++) {
3580 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3581 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3583 for (j
= 0; j
< 4; j
++) {
3584 outputs
[i
].values
[j
] =
3585 LLVMBuildLoad(ctx
->ac
.builder
,
3588 outputs
[i
].vertex_stream
[j
] =
3589 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3593 if (ctx
->shader
->selector
->so
.num_outputs
)
3594 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3596 /* Export PrimitiveID. */
3597 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3598 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3599 outputs
[i
].semantic_index
= 0;
3600 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3601 for (j
= 1; j
< 4; j
++)
3602 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3604 memset(outputs
[i
].vertex_stream
, 0,
3605 sizeof(outputs
[i
].vertex_stream
));
3609 si_llvm_export_vs(ctx
, outputs
, i
);
3613 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3614 unsigned max_outputs
,
3615 LLVMValueRef
*addrs
)
3617 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3618 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3619 LLVMValueRef pos
[4] = {};
3621 assert(info
->num_outputs
<= max_outputs
);
3623 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3624 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3627 for (unsigned chan
= 0; chan
< 4; chan
++)
3628 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3631 assert(pos
[0] != NULL
);
3633 /* Return the position output. */
3634 LLVMValueRef ret
= ctx
->return_value
;
3635 for (unsigned chan
= 0; chan
< 4; chan
++)
3636 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3637 ctx
->return_value
= ret
;
3640 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3642 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3644 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3645 &ctx
->outputs
[0][0]);
3648 struct si_ps_exports
{
3650 struct ac_export_args args
[10];
3653 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3654 LLVMValueRef depth
, LLVMValueRef stencil
,
3655 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3657 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3658 struct ac_export_args args
;
3660 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3662 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3665 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3666 LLVMValueRef
*color
, unsigned index
,
3667 unsigned samplemask_param
,
3668 bool is_last
, struct si_ps_exports
*exp
)
3670 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3674 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3675 for (i
= 0; i
< 4; i
++)
3676 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3679 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3680 color
[3] = ctx
->ac
.f32_1
;
3684 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3685 si_alpha_test(bld_base
, color
[3]);
3687 /* Line & polygon smoothing */
3688 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3689 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3692 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3693 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3694 struct ac_export_args args
[8];
3697 /* Get the export arguments, also find out what the last one is. */
3698 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3699 si_llvm_init_export_args(ctx
, color
,
3700 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3701 if (args
[c
].enabled_channels
)
3705 /* Emit all exports. */
3706 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3707 if (is_last
&& last
== c
) {
3708 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3709 args
[c
].done
= 1; /* DONE bit */
3710 } else if (!args
[c
].enabled_channels
)
3711 continue; /* unnecessary NULL export */
3713 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3716 struct ac_export_args args
;
3719 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3722 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3723 args
.done
= 1; /* DONE bit */
3724 } else if (!args
.enabled_channels
)
3725 return; /* unnecessary NULL export */
3727 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3731 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3732 struct si_ps_exports
*exp
)
3734 for (unsigned i
= 0; i
< exp
->num
; i
++)
3735 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3739 * Return PS outputs in this order:
3741 * v[0:3] = color0.xyzw
3742 * v[4:7] = color1.xyzw
3747 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3749 * The alpha-ref SGPR is returned via its original location.
3751 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3752 unsigned max_outputs
,
3753 LLVMValueRef
*addrs
)
3755 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3756 struct si_shader
*shader
= ctx
->shader
;
3757 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3758 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3759 unsigned i
, j
, first_vgpr
, vgpr
;
3761 LLVMValueRef color
[8][4] = {};
3762 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3765 if (ctx
->postponed_kill
)
3766 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3768 /* Read the output values. */
3769 for (i
= 0; i
< info
->num_outputs
; i
++) {
3770 unsigned semantic_name
= info
->output_semantic_name
[i
];
3771 unsigned semantic_index
= info
->output_semantic_index
[i
];
3773 switch (semantic_name
) {
3774 case TGSI_SEMANTIC_COLOR
:
3775 assert(semantic_index
< 8);
3776 for (j
= 0; j
< 4; j
++) {
3777 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3778 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3779 color
[semantic_index
][j
] = result
;
3782 case TGSI_SEMANTIC_POSITION
:
3783 depth
= LLVMBuildLoad(builder
,
3784 addrs
[4 * i
+ 2], "");
3786 case TGSI_SEMANTIC_STENCIL
:
3787 stencil
= LLVMBuildLoad(builder
,
3788 addrs
[4 * i
+ 1], "");
3790 case TGSI_SEMANTIC_SAMPLEMASK
:
3791 samplemask
= LLVMBuildLoad(builder
,
3792 addrs
[4 * i
+ 0], "");
3795 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3800 /* Fill the return structure. */
3801 ret
= ctx
->return_value
;
3804 ret
= LLVMBuildInsertValue(builder
, ret
,
3805 ac_to_integer(&ctx
->ac
,
3806 LLVMGetParam(ctx
->main_fn
,
3807 SI_PARAM_ALPHA_REF
)),
3808 SI_SGPR_ALPHA_REF
, "");
3811 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3812 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3816 for (j
= 0; j
< 4; j
++)
3817 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3820 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3822 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3824 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3826 /* Add the input sample mask for smoothing at the end. */
3827 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3828 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3829 ret
= LLVMBuildInsertValue(builder
, ret
,
3830 LLVMGetParam(ctx
->main_fn
,
3831 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3833 ctx
->return_value
= ret
;
3836 static void membar_emit(
3837 const struct lp_build_tgsi_action
*action
,
3838 struct lp_build_tgsi_context
*bld_base
,
3839 struct lp_build_emit_data
*emit_data
)
3841 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3842 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3843 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3844 unsigned waitcnt
= NOOP_WAITCNT
;
3846 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3847 waitcnt
&= VM_CNT
& LGKM_CNT
;
3849 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3850 TGSI_MEMBAR_SHADER_BUFFER
|
3851 TGSI_MEMBAR_SHADER_IMAGE
))
3854 if (flags
& TGSI_MEMBAR_SHARED
)
3855 waitcnt
&= LGKM_CNT
;
3857 if (waitcnt
!= NOOP_WAITCNT
)
3858 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3861 static void clock_emit(
3862 const struct lp_build_tgsi_action
*action
,
3863 struct lp_build_tgsi_context
*bld_base
,
3864 struct lp_build_emit_data
*emit_data
)
3866 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3867 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3869 emit_data
->output
[0] =
3870 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3871 emit_data
->output
[1] =
3872 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3875 static void si_llvm_emit_ddxy(
3876 const struct lp_build_tgsi_action
*action
,
3877 struct lp_build_tgsi_context
*bld_base
,
3878 struct lp_build_emit_data
*emit_data
)
3880 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3881 unsigned opcode
= emit_data
->info
->opcode
;
3886 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3887 mask
= AC_TID_MASK_LEFT
;
3888 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3889 mask
= AC_TID_MASK_TOP
;
3891 mask
= AC_TID_MASK_TOP_LEFT
;
3893 /* for DDX we want to next X pixel, DDY next Y pixel. */
3894 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3896 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3897 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3898 emit_data
->output
[emit_data
->chan
] = val
;
3901 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3902 struct lp_build_tgsi_context
*bld_base
,
3903 struct lp_build_emit_data
*emit_data
)
3905 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3906 struct si_shader
*shader
= ctx
->shader
;
3907 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3908 LLVMValueRef interp_param
;
3909 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3910 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3911 int input_base
, input_array_size
;
3914 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3915 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3916 int interp_param_idx
;
3920 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3921 /* offset is in second src, first two channels */
3922 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3924 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3926 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3927 LLVMValueRef sample_position
;
3928 LLVMValueRef sample_id
;
3929 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3931 /* fetch sample ID, then fetch its sample position,
3932 * and place into first two channels.
3934 sample_id
= lp_build_emit_fetch(bld_base
,
3935 emit_data
->inst
, 1, TGSI_CHAN_X
);
3936 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3938 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3939 * Language 4.50 spec says about interpolateAtSample:
3941 * "Returns the value of the input interpolant variable at
3942 * the location of sample number sample. If multisample
3943 * buffers are not available, the input variable will be
3944 * evaluated at the center of the pixel. If sample sample
3945 * does not exist, the position used to interpolate the
3946 * input variable is undefined."
3948 * This means that sample_id values outside of the valid are
3949 * in fact valid input, and the usual mechanism for loading the
3950 * sample position doesn't work.
3952 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3953 LLVMValueRef center
[4] = {
3954 LLVMConstReal(ctx
->f32
, 0.5),
3955 LLVMConstReal(ctx
->f32
, 0.5),
3960 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3962 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
3965 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3968 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
3969 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3971 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
3974 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
3976 if (input
->Register
.Indirect
) {
3977 unsigned array_id
= input
->Indirect
.ArrayID
;
3980 input_base
= info
->input_array_first
[array_id
];
3981 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
3983 input_base
= inst
->Src
[0].Register
.Index
;
3984 input_array_size
= info
->num_inputs
- input_base
;
3987 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
3988 1, input
->Register
.Index
- input_base
);
3990 input_base
= inst
->Src
[0].Register
.Index
;
3991 input_array_size
= 1;
3992 array_idx
= ctx
->i32_0
;
3995 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
3997 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3998 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
3999 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4001 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4003 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4004 if (interp_param_idx
== -1)
4006 else if (interp_param_idx
)
4007 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4009 interp_param
= NULL
;
4011 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4012 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4013 LLVMValueRef ij_out
[2];
4014 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4017 * take the I then J parameters, and the DDX/Y for it, and
4018 * calculate the IJ inputs for the interpolator.
4019 * temp1 = ddx * offset/sample.x + I;
4020 * interp_param.I = ddy * offset/sample.y + temp1;
4021 * temp1 = ddx * offset/sample.x + J;
4022 * interp_param.J = ddy * offset/sample.y + temp1;
4024 for (i
= 0; i
< 2; i
++) {
4025 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4026 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4027 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4028 ddxy_out
, ix_ll
, "");
4029 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4030 ddxy_out
, iy_ll
, "");
4031 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4032 interp_param
, ix_ll
, "");
4035 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4037 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4038 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4040 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4044 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4046 for (chan
= 0; chan
< 4; chan
++) {
4047 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4048 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4050 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4051 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4054 i
= LLVMBuildExtractElement(
4055 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4056 j
= LLVMBuildExtractElement(
4057 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4059 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4062 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4063 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4066 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4067 ctx
->ac
.builder
, gather
, array_idx
, "");
4071 static void vote_all_emit(
4072 const struct lp_build_tgsi_action
*action
,
4073 struct lp_build_tgsi_context
*bld_base
,
4074 struct lp_build_emit_data
*emit_data
)
4076 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4078 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4079 emit_data
->output
[emit_data
->chan
] =
4080 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4083 static void vote_any_emit(
4084 const struct lp_build_tgsi_action
*action
,
4085 struct lp_build_tgsi_context
*bld_base
,
4086 struct lp_build_emit_data
*emit_data
)
4088 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4090 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4091 emit_data
->output
[emit_data
->chan
] =
4092 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4095 static void vote_eq_emit(
4096 const struct lp_build_tgsi_action
*action
,
4097 struct lp_build_tgsi_context
*bld_base
,
4098 struct lp_build_emit_data
*emit_data
)
4100 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4102 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4103 emit_data
->output
[emit_data
->chan
] =
4104 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4107 static void ballot_emit(
4108 const struct lp_build_tgsi_action
*action
,
4109 struct lp_build_tgsi_context
*bld_base
,
4110 struct lp_build_emit_data
*emit_data
)
4112 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4113 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4116 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4117 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4118 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4120 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4121 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4124 static void read_lane_emit(
4125 const struct lp_build_tgsi_action
*action
,
4126 struct lp_build_tgsi_context
*bld_base
,
4127 struct lp_build_emit_data
*emit_data
)
4129 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4131 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4132 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4133 0, emit_data
->src_chan
);
4135 /* Always read the source invocation (= lane) from the X channel. */
4136 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4138 emit_data
->arg_count
= 2;
4141 /* We currently have no other way to prevent LLVM from lifting the icmp
4142 * calls to a dominating basic block.
4144 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4146 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4147 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4149 emit_data
->output
[emit_data
->chan
] =
4150 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4151 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4152 AC_FUNC_ATTR_READNONE
|
4153 AC_FUNC_ATTR_CONVERGENT
);
4156 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4157 struct lp_build_emit_data
*emit_data
)
4159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4160 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4164 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4166 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4167 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4171 /* Emit one vertex from the geometry shader */
4172 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4174 LLVMValueRef
*addrs
)
4176 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4177 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4178 struct si_shader
*shader
= ctx
->shader
;
4179 struct lp_build_if_state if_state
;
4180 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4181 ctx
->param_gs2vs_offset
);
4182 LLVMValueRef gs_next_vertex
;
4183 LLVMValueRef can_emit
;
4184 unsigned chan
, offset
;
4187 /* Write vertex attribute values to GSVS ring */
4188 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4189 ctx
->gs_next_vertex
[stream
],
4192 /* If this thread has already emitted the declared maximum number of
4193 * vertices, skip the write: excessive vertex emissions are not
4194 * supposed to have any effect.
4196 * If the shader has no writes to memory, kill it instead. This skips
4197 * further memory loads and may allow LLVM to skip to the end
4200 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4201 LLVMConstInt(ctx
->i32
,
4202 shader
->selector
->gs_max_out_vertices
, 0), "");
4204 bool use_kill
= !info
->writes_memory
;
4206 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4208 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4212 for (i
= 0; i
< info
->num_outputs
; i
++) {
4213 for (chan
= 0; chan
< 4; chan
++) {
4214 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4215 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4218 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4219 LLVMValueRef voffset
=
4220 LLVMConstInt(ctx
->i32
, offset
*
4221 shader
->selector
->gs_max_out_vertices
, 0);
4224 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4225 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4226 LLVMConstInt(ctx
->i32
, 4, 0), "");
4228 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4230 ac_build_buffer_store_dword(&ctx
->ac
,
4231 ctx
->gsvs_ring
[stream
],
4233 voffset
, soffset
, 0,
4238 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4239 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4241 /* Signal vertex emission if vertex data was written. */
4243 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4244 si_get_gs_wave_id(ctx
));
4248 lp_build_endif(&if_state
);
4251 /* Emit one vertex from the geometry shader */
4252 static void si_tgsi_emit_vertex(
4253 const struct lp_build_tgsi_action
*action
,
4254 struct lp_build_tgsi_context
*bld_base
,
4255 struct lp_build_emit_data
*emit_data
)
4257 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4258 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4260 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4263 /* Cut one primitive from the geometry shader */
4264 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4267 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4269 /* Signal primitive cut */
4270 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4271 si_get_gs_wave_id(ctx
));
4274 /* Cut one primitive from the geometry shader */
4275 static void si_tgsi_emit_primitive(
4276 const struct lp_build_tgsi_action
*action
,
4277 struct lp_build_tgsi_context
*bld_base
,
4278 struct lp_build_emit_data
*emit_data
)
4280 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4282 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4285 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4286 struct lp_build_tgsi_context
*bld_base
,
4287 struct lp_build_emit_data
*emit_data
)
4289 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4291 /* GFX6 only (thanks to a hw bug workaround):
4292 * The real barrier instruction isn’t needed, because an entire patch
4293 * always fits into a single wave.
4295 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4296 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4297 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4301 ac_build_s_barrier(&ctx
->ac
);
4304 void si_create_function(struct si_shader_context
*ctx
,
4306 LLVMTypeRef
*returns
, unsigned num_returns
,
4307 struct si_function_info
*fninfo
,
4308 unsigned max_workgroup_size
)
4312 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4313 fninfo
->types
, fninfo
->num_params
);
4314 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4316 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4317 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4319 /* The combination of:
4323 * allows the optimization passes to move loads and reduces
4324 * SGPR spilling significantly.
4326 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4327 AC_FUNC_ATTR_INREG
);
4329 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4330 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4331 AC_FUNC_ATTR_NOALIAS
);
4332 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4336 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4337 if (fninfo
->assign
[i
])
4338 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4341 if (ctx
->screen
->info
.address32_hi
) {
4342 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4343 "amdgpu-32bit-address-high-bits",
4344 ctx
->screen
->info
.address32_hi
);
4347 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4349 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4350 "no-signed-zeros-fp-math",
4353 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4354 /* These were copied from some LLVM test. */
4355 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4356 "less-precise-fpmad",
4358 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4361 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4364 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4370 static void declare_streamout_params(struct si_shader_context
*ctx
,
4371 struct pipe_stream_output_info
*so
,
4372 struct si_function_info
*fninfo
)
4376 /* Streamout SGPRs. */
4377 if (so
->num_outputs
) {
4378 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4379 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4381 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4383 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4385 /* A streamout buffer offset is loaded if the stride is non-zero. */
4386 for (i
= 0; i
< 4; i
++) {
4390 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4394 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4396 switch (shader
->selector
->type
) {
4397 case PIPE_SHADER_TESS_CTRL
:
4398 /* Return this so that LLVM doesn't remove s_barrier
4399 * instructions on chips where we use s_barrier. */
4400 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 64;
4402 case PIPE_SHADER_GEOMETRY
:
4403 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4405 case PIPE_SHADER_COMPUTE
:
4406 break; /* see below */
4412 const unsigned *properties
= shader
->selector
->info
.properties
;
4413 unsigned max_work_group_size
=
4414 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4415 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4416 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4418 if (!max_work_group_size
) {
4419 /* This is a variable group size compute shader,
4420 * compile it for the maximum possible group size.
4422 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4424 return max_work_group_size
;
4427 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4428 struct si_function_info
*fninfo
,
4431 LLVMTypeRef const_shader_buf_type
;
4433 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4434 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4435 const_shader_buf_type
= ctx
->f32
;
4437 const_shader_buf_type
= ctx
->v4i32
;
4439 unsigned const_and_shader_buffers
=
4440 add_arg(fninfo
, ARG_SGPR
,
4441 ac_array_in_const32_addr_space(const_shader_buf_type
));
4444 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4447 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4448 struct si_function_info
*fninfo
,
4451 unsigned samplers_and_images
=
4452 add_arg(fninfo
, ARG_SGPR
,
4453 ac_array_in_const32_addr_space(ctx
->v8i32
));
4456 ctx
->param_samplers_and_images
= samplers_and_images
;
4459 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4460 struct si_function_info
*fninfo
,
4463 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4464 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4467 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4468 struct si_function_info
*fninfo
)
4470 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4471 ac_array_in_const32_addr_space(ctx
->v4i32
));
4472 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4473 ac_array_in_const32_addr_space(ctx
->v8i32
));
4476 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4477 struct si_function_info
*fninfo
)
4479 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4480 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4481 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4482 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4485 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4486 struct si_function_info
*fninfo
,
4487 unsigned *num_prolog_vgprs
)
4489 struct si_shader
*shader
= ctx
->shader
;
4491 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4492 if (shader
->key
.as_ls
) {
4493 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4494 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4496 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4497 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4499 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4501 if (!shader
->is_gs_copy_shader
) {
4502 /* Vertex load indices. */
4503 ctx
->param_vertex_index0
= fninfo
->num_params
;
4504 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4505 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4506 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4510 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4511 struct si_function_info
*fninfo
,
4512 unsigned vs_blit_property
)
4514 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4515 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4516 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4517 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4519 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4520 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4521 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4522 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4523 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4524 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4525 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4526 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4527 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4528 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4529 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4530 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4534 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4535 struct si_function_info
*fninfo
)
4537 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4538 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4539 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4540 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4544 /* Convenient merged shader definitions. */
4545 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4546 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4549 static void create_function(struct si_shader_context
*ctx
)
4551 struct si_shader
*shader
= ctx
->shader
;
4552 struct si_function_info fninfo
;
4553 LLVMTypeRef returns
[16+32*4];
4554 unsigned i
, num_return_sgprs
;
4555 unsigned num_returns
= 0;
4556 unsigned num_prolog_vgprs
= 0;
4557 unsigned type
= ctx
->type
;
4558 unsigned vs_blit_property
=
4559 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4561 si_init_function_info(&fninfo
);
4563 /* Set MERGED shaders. */
4564 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4565 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4566 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4567 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4568 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4571 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4574 case PIPE_SHADER_VERTEX
:
4575 declare_global_desc_pointers(ctx
, &fninfo
);
4577 if (vs_blit_property
) {
4578 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4581 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4585 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4586 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4587 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4588 ac_array_in_const32_addr_space(ctx
->v4i32
));
4590 if (shader
->key
.as_es
) {
4591 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4592 } else if (shader
->key
.as_ls
) {
4593 /* no extra parameters */
4595 if (shader
->is_gs_copy_shader
) {
4596 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4597 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4600 /* The locations of the other parameters are assigned dynamically. */
4601 declare_streamout_params(ctx
, &shader
->selector
->so
,
4606 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4609 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4610 for (i
= 0; i
< 4; i
++)
4611 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4615 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4616 declare_global_desc_pointers(ctx
, &fninfo
);
4617 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4618 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4619 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4620 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4621 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4622 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4623 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4626 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4627 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4629 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4630 * placed after the user SGPRs.
4632 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4633 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4634 for (i
= 0; i
< 11; i
++)
4635 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4638 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4639 /* Merged stages have 8 system SGPRs at the beginning. */
4640 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4641 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4642 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4643 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4644 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4645 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4646 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4647 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4648 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4650 declare_global_desc_pointers(ctx
, &fninfo
);
4651 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4652 ctx
->type
== PIPE_SHADER_VERTEX
);
4653 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4655 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4656 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4657 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4658 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4659 ac_array_in_const32_addr_space(ctx
->v4i32
));
4661 /* VGPRs (first TCS, then VS) */
4662 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4663 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4665 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4666 declare_vs_input_vgprs(ctx
, &fninfo
,
4669 /* LS return values are inputs to the TCS main shader part. */
4670 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4671 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4672 for (i
= 0; i
< 2; i
++)
4673 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4675 /* TCS return values are inputs to the TCS epilog.
4677 * param_tcs_offchip_offset, param_tcs_factor_offset,
4678 * param_tcs_offchip_layout, and param_rw_buffers
4679 * should be passed to the epilog.
4681 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4682 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4683 for (i
= 0; i
< 11; i
++)
4684 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4688 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4689 /* Merged stages have 8 system SGPRs at the beginning. */
4690 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4691 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4692 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4693 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4694 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4695 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4696 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4697 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4698 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4700 declare_global_desc_pointers(ctx
, &fninfo
);
4701 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4702 (ctx
->type
== PIPE_SHADER_VERTEX
||
4703 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4704 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4705 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4707 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4708 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4709 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4710 /* Declare as many input SGPRs as the VS has. */
4713 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4714 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4715 ac_array_in_const32_addr_space(ctx
->v4i32
));
4718 /* VGPRs (first GS, then VS/TES) */
4719 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4720 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4721 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4722 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4723 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4725 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4726 declare_vs_input_vgprs(ctx
, &fninfo
,
4728 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4729 declare_tes_input_vgprs(ctx
, &fninfo
);
4732 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4733 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4734 unsigned num_user_sgprs
;
4736 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4737 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4739 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4741 /* ES return values are inputs to GS. */
4742 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4743 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4744 for (i
= 0; i
< 5; i
++)
4745 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4749 case PIPE_SHADER_TESS_EVAL
:
4750 declare_global_desc_pointers(ctx
, &fninfo
);
4751 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4752 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4753 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4754 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4756 if (shader
->key
.as_es
) {
4757 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4758 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4759 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4761 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4762 declare_streamout_params(ctx
, &shader
->selector
->so
,
4764 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4768 declare_tes_input_vgprs(ctx
, &fninfo
);
4771 case PIPE_SHADER_GEOMETRY
:
4772 declare_global_desc_pointers(ctx
, &fninfo
);
4773 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4774 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4775 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4778 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4779 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4780 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4781 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4782 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4783 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4784 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4785 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4788 case PIPE_SHADER_FRAGMENT
:
4789 declare_global_desc_pointers(ctx
, &fninfo
);
4790 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4791 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4792 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4793 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4795 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4796 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4797 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4798 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4799 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4800 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4801 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4802 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4803 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4804 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4805 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4806 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4807 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4808 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4809 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4810 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4811 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4812 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4813 shader
->info
.face_vgpr_index
= 20;
4814 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4815 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4816 shader
->info
.ancillary_vgpr_index
= 21;
4817 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4818 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4819 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4821 /* Color inputs from the prolog. */
4822 if (shader
->selector
->info
.colors_read
) {
4823 unsigned num_color_elements
=
4824 util_bitcount(shader
->selector
->info
.colors_read
);
4826 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4827 for (i
= 0; i
< num_color_elements
; i
++)
4828 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4830 num_prolog_vgprs
+= num_color_elements
;
4833 /* Outputs for the epilog. */
4834 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4837 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4838 shader
->selector
->info
.writes_z
+
4839 shader
->selector
->info
.writes_stencil
+
4840 shader
->selector
->info
.writes_samplemask
+
4841 1 /* SampleMaskIn */;
4843 num_returns
= MAX2(num_returns
,
4845 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4847 for (i
= 0; i
< num_return_sgprs
; i
++)
4848 returns
[i
] = ctx
->i32
;
4849 for (; i
< num_returns
; i
++)
4850 returns
[i
] = ctx
->f32
;
4853 case PIPE_SHADER_COMPUTE
:
4854 declare_global_desc_pointers(ctx
, &fninfo
);
4855 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4856 if (shader
->selector
->info
.uses_grid_size
)
4857 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4858 if (shader
->selector
->info
.uses_block_size
&&
4859 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4860 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4862 unsigned cs_user_data_dwords
=
4863 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_DWORDS
];
4864 if (cs_user_data_dwords
) {
4865 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4866 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4869 for (i
= 0; i
< 3; i
++) {
4870 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4871 if (shader
->selector
->info
.uses_block_id
[i
])
4872 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4875 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4878 assert(0 && "unimplemented shader");
4882 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4883 si_get_max_workgroup_size(shader
));
4885 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4886 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4887 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4888 "InitialPSInputAddr",
4889 S_0286D0_PERSP_SAMPLE_ENA(1) |
4890 S_0286D0_PERSP_CENTER_ENA(1) |
4891 S_0286D0_PERSP_CENTROID_ENA(1) |
4892 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4893 S_0286D0_LINEAR_CENTER_ENA(1) |
4894 S_0286D0_LINEAR_CENTROID_ENA(1) |
4895 S_0286D0_FRONT_FACE_ENA(1) |
4896 S_0286D0_ANCILLARY_ENA(1) |
4897 S_0286D0_POS_FIXED_PT_ENA(1));
4900 shader
->info
.num_input_sgprs
= 0;
4901 shader
->info
.num_input_vgprs
= 0;
4903 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4904 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4906 for (; i
< fninfo
.num_params
; ++i
)
4907 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4909 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4910 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4912 if (shader
->key
.as_ls
||
4913 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4914 /* GFX9 has the ESGS ring buffer in LDS. */
4915 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4916 ac_declare_lds_as_pointer(&ctx
->ac
);
4920 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4923 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4925 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4927 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4928 ctx
->param_rw_buffers
);
4930 if (ctx
->screen
->info
.chip_class
<= GFX8
&&
4931 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4933 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4935 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4938 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4941 if (ctx
->shader
->is_gs_copy_shader
) {
4942 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4945 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4946 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4947 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4948 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4949 LLVMValueRef base_ring
;
4951 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4953 /* The conceptual layout of the GSVS ring is
4954 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4955 * but the real memory layout is swizzled across
4957 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
4959 * Override the buffer descriptor accordingly.
4961 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
4962 uint64_t stream_offset
= 0;
4964 for (unsigned stream
= 0; stream
< 4; ++stream
) {
4965 unsigned num_components
;
4967 unsigned num_records
;
4968 LLVMValueRef ring
, tmp
;
4970 num_components
= sel
->info
.num_stream_output_components
[stream
];
4971 if (!num_components
)
4974 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
4976 /* Limit on the stride field for <= GFX7. */
4977 assert(stride
< (1 << 14));
4981 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
4982 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
4983 tmp
= LLVMBuildAdd(builder
, tmp
,
4984 LLVMConstInt(ctx
->i64
,
4985 stream_offset
, 0), "");
4986 stream_offset
+= stride
* 64;
4988 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
4989 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
4990 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
4991 tmp
= LLVMBuildOr(builder
, tmp
,
4992 LLVMConstInt(ctx
->i32
,
4993 S_008F04_STRIDE(stride
) |
4994 S_008F04_SWIZZLE_ENABLE(1), 0), "");
4995 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
4996 ring
= LLVMBuildInsertElement(builder
, ring
,
4997 LLVMConstInt(ctx
->i32
, num_records
, 0),
4998 LLVMConstInt(ctx
->i32
, 2, 0), "");
4999 ring
= LLVMBuildInsertElement(builder
, ring
,
5000 LLVMConstInt(ctx
->i32
,
5001 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5002 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5003 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5004 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5005 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5006 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5007 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5008 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5009 S_008F0C_ADD_TID_ENABLE(1),
5011 LLVMConstInt(ctx
->i32
, 3, 0), "");
5013 ctx
->gsvs_ring
[stream
] = ring
;
5015 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5016 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5020 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5021 LLVMValueRef param_rw_buffers
,
5022 unsigned param_pos_fixed_pt
)
5024 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5025 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5027 /* Use the fixed-point gl_FragCoord input.
5028 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5029 * per coordinate to get the repeating effect.
5031 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5032 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5034 /* Load the buffer descriptor. */
5035 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5036 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5038 /* The stipple pattern is 32x32, each row has 32 bits. */
5039 offset
= LLVMBuildMul(builder
, address
[1],
5040 LLVMConstInt(ctx
->i32
, 4, 0), "");
5041 row
= buffer_load_const(ctx
, desc
, offset
);
5042 row
= ac_to_integer(&ctx
->ac
, row
);
5043 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5044 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5045 ac_build_kill_if_false(&ctx
->ac
, bit
);
5048 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5049 uint64_t scratch_va
)
5052 uint32_t scratch_rsrc_dword0
= scratch_va
;
5053 uint32_t scratch_rsrc_dword1
=
5054 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5056 /* Enable scratch coalescing. */
5057 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5059 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5060 const struct ac_shader_reloc
*reloc
=
5061 &shader
->binary
.relocs
[i
];
5062 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5063 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5064 &scratch_rsrc_dword0
, 4);
5065 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5066 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5067 &scratch_rsrc_dword1
, 4);
5072 /* For the UMR disassembler. */
5073 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5074 #define DEBUGGER_NUM_MARKERS 5
5076 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5078 unsigned size
= shader
->binary
.code_size
;
5081 size
+= shader
->prolog
->binary
.code_size
;
5082 if (shader
->previous_stage
)
5083 size
+= shader
->previous_stage
->binary
.code_size
;
5084 if (shader
->prolog2
)
5085 size
+= shader
->prolog2
->binary
.code_size
;
5087 size
+= shader
->epilog
->binary
.code_size
;
5088 return size
+ DEBUGGER_NUM_MARKERS
* 4;
5091 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5093 const struct ac_shader_binary
*prolog
=
5094 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5095 const struct ac_shader_binary
*previous_stage
=
5096 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5097 const struct ac_shader_binary
*prolog2
=
5098 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5099 const struct ac_shader_binary
*epilog
=
5100 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5101 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5102 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5103 (!epilog
? mainb
->rodata_size
: 0);
5106 assert(!prolog
|| !prolog
->rodata_size
);
5107 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5108 assert(!prolog2
|| !prolog2
->rodata_size
);
5109 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5110 !mainb
->rodata_size
);
5111 assert(!epilog
|| !epilog
->rodata_size
);
5113 si_resource_reference(&shader
->bo
, NULL
);
5114 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5115 sscreen
->cpdma_prefetch_writes_memory
?
5116 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5117 PIPE_USAGE_IMMUTABLE
,
5118 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5124 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5125 PIPE_TRANSFER_READ_WRITE
|
5126 PIPE_TRANSFER_UNSYNCHRONIZED
|
5127 RADEON_TRANSFER_TEMPORARY
);
5129 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5130 * endian-independent. */
5132 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5133 ptr
+= prolog
->code_size
;
5135 if (previous_stage
) {
5136 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5137 ptr
+= previous_stage
->code_size
;
5140 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5141 ptr
+= prolog2
->code_size
;
5144 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5145 ptr
+= mainb
->code_size
;
5148 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5149 ptr
+= epilog
->code_size
;
5150 } else if (mainb
->rodata_size
> 0) {
5151 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5152 ptr
+= mainb
->rodata_size
;
5155 /* Add end-of-code markers for the UMR disassembler. */
5156 uint32_t *ptr32
= (uint32_t*)ptr
;
5157 for (unsigned i
= 0; i
< DEBUGGER_NUM_MARKERS
; i
++)
5158 ptr32
[i
] = DEBUGGER_END_OF_CODE_MARKER
;
5160 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5164 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5165 struct pipe_debug_callback
*debug
,
5166 const char *name
, FILE *file
)
5171 if (binary
->disasm_string
) {
5172 fprintf(file
, "Shader %s disassembly:\n", name
);
5173 fprintf(file
, "%s", binary
->disasm_string
);
5175 if (debug
&& debug
->debug_message
) {
5176 /* Very long debug messages are cut off, so send the
5177 * disassembly one line at a time. This causes more
5178 * overhead, but on the plus side it simplifies
5179 * parsing of resulting logs.
5181 pipe_debug_message(debug
, SHADER_INFO
,
5182 "Shader Disassembly Begin");
5184 line
= binary
->disasm_string
;
5186 p
= util_strchrnul(line
, '\n');
5190 pipe_debug_message(debug
, SHADER_INFO
,
5191 "%.*s", count
, line
);
5199 pipe_debug_message(debug
, SHADER_INFO
,
5200 "Shader Disassembly End");
5203 fprintf(file
, "Shader %s binary:\n", name
);
5204 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5205 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5206 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5207 binary
->code
[i
+ 1], binary
->code
[i
]);
5212 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5214 struct si_screen
*sscreen
= shader
->selector
->screen
;
5215 struct ac_shader_config
*conf
= &shader
->config
;
5216 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5217 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5218 unsigned lds_per_wave
= 0;
5219 unsigned max_simd_waves
;
5221 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5223 /* Compute LDS usage for PS. */
5224 switch (shader
->selector
->type
) {
5225 case PIPE_SHADER_FRAGMENT
:
5226 /* The minimum usage per wave is (num_inputs * 48). The maximum
5227 * usage is (num_inputs * 48 * 16).
5228 * We can get anything in between and it varies between waves.
5230 * The 48 bytes per input for a single primitive is equal to
5231 * 4 bytes/component * 4 components/input * 3 points.
5233 * Other stages don't know the size at compile time or don't
5234 * allocate LDS per wave, but instead they do it per thread group.
5236 lds_per_wave
= conf
->lds_size
* lds_increment
+
5237 align(num_inputs
* 48, lds_increment
);
5239 case PIPE_SHADER_COMPUTE
:
5240 if (shader
->selector
) {
5241 unsigned max_workgroup_size
=
5242 si_get_max_workgroup_size(shader
);
5243 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5244 DIV_ROUND_UP(max_workgroup_size
, 64);
5249 /* Compute the per-SIMD wave counts. */
5250 if (conf
->num_sgprs
) {
5252 MIN2(max_simd_waves
,
5253 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5256 if (conf
->num_vgprs
)
5257 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5259 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5260 * 16KB makes some SIMDs unoccupied). */
5262 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5264 shader
->info
.max_simd_waves
= max_simd_waves
;
5267 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5268 struct pipe_debug_callback
*debug
)
5270 const struct ac_shader_config
*conf
= &shader
->config
;
5272 pipe_debug_message(debug
, SHADER_INFO
,
5273 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5274 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5275 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5276 conf
->num_sgprs
, conf
->num_vgprs
,
5277 si_get_shader_binary_size(shader
),
5278 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5279 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5280 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5283 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5284 const struct si_shader
*shader
,
5287 bool check_debug_option
)
5289 const struct ac_shader_config
*conf
= &shader
->config
;
5291 if (!check_debug_option
||
5292 si_can_dump_shader(sscreen
, processor
)) {
5293 if (processor
== PIPE_SHADER_FRAGMENT
) {
5294 fprintf(file
, "*** SHADER CONFIG ***\n"
5295 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5296 "SPI_PS_INPUT_ENA = 0x%04x\n",
5297 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5300 fprintf(file
, "*** SHADER STATS ***\n"
5303 "Spilled SGPRs: %d\n"
5304 "Spilled VGPRs: %d\n"
5305 "Private memory VGPRs: %d\n"
5306 "Code Size: %d bytes\n"
5308 "Scratch: %d bytes per wave\n"
5310 "********************\n\n\n",
5311 conf
->num_sgprs
, conf
->num_vgprs
,
5312 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5313 shader
->info
.private_mem_vgprs
,
5314 si_get_shader_binary_size(shader
),
5315 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5316 shader
->info
.max_simd_waves
);
5320 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5322 switch (processor
) {
5323 case PIPE_SHADER_VERTEX
:
5324 if (shader
->key
.as_es
)
5325 return "Vertex Shader as ES";
5326 else if (shader
->key
.as_ls
)
5327 return "Vertex Shader as LS";
5328 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5329 return "Vertex Shader as Primitive Discard CS";
5331 return "Vertex Shader as VS";
5332 case PIPE_SHADER_TESS_CTRL
:
5333 return "Tessellation Control Shader";
5334 case PIPE_SHADER_TESS_EVAL
:
5335 if (shader
->key
.as_es
)
5336 return "Tessellation Evaluation Shader as ES";
5338 return "Tessellation Evaluation Shader as VS";
5339 case PIPE_SHADER_GEOMETRY
:
5340 if (shader
->is_gs_copy_shader
)
5341 return "GS Copy Shader as VS";
5343 return "Geometry Shader";
5344 case PIPE_SHADER_FRAGMENT
:
5345 return "Pixel Shader";
5346 case PIPE_SHADER_COMPUTE
:
5347 return "Compute Shader";
5349 return "Unknown Shader";
5353 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5354 struct pipe_debug_callback
*debug
, unsigned processor
,
5355 FILE *file
, bool check_debug_option
)
5357 if (!check_debug_option
||
5358 si_can_dump_shader(sscreen
, processor
))
5359 si_dump_shader_key(processor
, shader
, file
);
5361 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5362 if (shader
->previous_stage
&&
5363 shader
->previous_stage
->binary
.llvm_ir_string
) {
5364 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5365 si_get_shader_name(shader
, processor
));
5366 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5369 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5370 si_get_shader_name(shader
, processor
));
5371 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5374 if (!check_debug_option
||
5375 (si_can_dump_shader(sscreen
, processor
) &&
5376 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5377 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5380 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5381 debug
, "prolog", file
);
5382 if (shader
->previous_stage
)
5383 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5384 debug
, "previous stage", file
);
5385 if (shader
->prolog2
)
5386 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5387 debug
, "prolog2", file
);
5389 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5392 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5393 debug
, "epilog", file
);
5394 fprintf(file
, "\n");
5397 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5398 check_debug_option
);
5401 static int si_compile_llvm(struct si_screen
*sscreen
,
5402 struct ac_shader_binary
*binary
,
5403 struct ac_shader_config
*conf
,
5404 struct ac_llvm_compiler
*compiler
,
5406 struct pipe_debug_callback
*debug
,
5409 bool less_optimized
)
5412 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5414 if (si_can_dump_shader(sscreen
, processor
)) {
5415 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5417 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5418 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5419 ac_dump_module(mod
);
5420 fprintf(stderr
, "\n");
5424 if (sscreen
->record_llvm_ir
) {
5425 char *ir
= LLVMPrintModuleToString(mod
);
5426 binary
->llvm_ir_string
= strdup(ir
);
5427 LLVMDisposeMessage(ir
);
5430 if (!si_replace_shader(count
, binary
)) {
5431 r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5437 ac_shader_binary_read_config(binary
, conf
, 0, false);
5439 /* Enable 64-bit and 16-bit denormals, because there is no performance
5442 * If denormals are enabled, all floating-point output modifiers are
5445 * Don't enable denormals for 32-bit floats, because:
5446 * - Floating-point output modifiers would be ignored by the hw.
5447 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5448 * have to stop using those.
5449 * - GFX6 & GFX7 would be very slow.
5451 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5453 FREE(binary
->config
);
5454 FREE(binary
->global_symbol_offsets
);
5455 binary
->config
= NULL
;
5456 binary
->global_symbol_offsets
= NULL
;
5458 /* Some shaders can't have rodata because their binaries can be
5461 if (binary
->rodata_size
&&
5462 (processor
== PIPE_SHADER_VERTEX
||
5463 processor
== PIPE_SHADER_TESS_CTRL
||
5464 processor
== PIPE_SHADER_TESS_EVAL
||
5465 processor
== PIPE_SHADER_FRAGMENT
)) {
5466 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5473 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5475 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5476 LLVMBuildRetVoid(ctx
->ac
.builder
);
5478 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5481 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5483 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5484 struct ac_llvm_compiler
*compiler
,
5485 struct si_shader_selector
*gs_selector
,
5486 struct pipe_debug_callback
*debug
)
5488 struct si_shader_context ctx
;
5489 struct si_shader
*shader
;
5490 LLVMBuilderRef builder
;
5491 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5492 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5496 shader
= CALLOC_STRUCT(si_shader
);
5500 /* We can leave the fence as permanently signaled because the GS copy
5501 * shader only becomes visible globally after it has been compiled. */
5502 util_queue_fence_init(&shader
->ready
);
5504 shader
->selector
= gs_selector
;
5505 shader
->is_gs_copy_shader
= true;
5507 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5508 ctx
.shader
= shader
;
5509 ctx
.type
= PIPE_SHADER_VERTEX
;
5511 builder
= ctx
.ac
.builder
;
5513 create_function(&ctx
);
5514 preload_ring_buffers(&ctx
);
5516 LLVMValueRef voffset
=
5517 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5518 LLVMConstInt(ctx
.i32
, 4, 0), "");
5520 /* Fetch the vertex stream ID.*/
5521 LLVMValueRef stream_id
;
5523 if (gs_selector
->so
.num_outputs
)
5524 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5526 stream_id
= ctx
.i32_0
;
5528 /* Fill in output information. */
5529 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5530 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5531 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5533 for (int chan
= 0; chan
< 4; chan
++) {
5534 outputs
[i
].vertex_stream
[chan
] =
5535 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5539 LLVMBasicBlockRef end_bb
;
5540 LLVMValueRef switch_inst
;
5542 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5543 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5545 for (int stream
= 0; stream
< 4; stream
++) {
5546 LLVMBasicBlockRef bb
;
5549 if (!gsinfo
->num_stream_output_components
[stream
])
5552 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5555 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5556 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5557 LLVMPositionBuilderAtEnd(builder
, bb
);
5559 /* Fetch vertex data from GSVS ring */
5561 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5562 for (unsigned chan
= 0; chan
< 4; chan
++) {
5563 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5564 outputs
[i
].vertex_stream
[chan
] != stream
) {
5565 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5569 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5570 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5573 outputs
[i
].values
[chan
] =
5574 ac_build_buffer_load(&ctx
.ac
,
5575 ctx
.gsvs_ring
[0], 1,
5582 /* Streamout and exports. */
5583 if (gs_selector
->so
.num_outputs
) {
5584 si_llvm_emit_streamout(&ctx
, outputs
,
5585 gsinfo
->num_outputs
,
5590 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5592 LLVMBuildBr(builder
, end_bb
);
5595 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5597 LLVMBuildRetVoid(ctx
.ac
.builder
);
5599 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5600 si_llvm_optimize_module(&ctx
);
5603 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5604 &ctx
.shader
->config
, ctx
.compiler
,
5606 debug
, PIPE_SHADER_GEOMETRY
,
5607 "GS Copy Shader", false) == 0) {
5608 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5609 fprintf(stderr
, "GS Copy Shader:\n");
5610 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5611 PIPE_SHADER_GEOMETRY
, stderr
, true);
5612 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5615 si_llvm_dispose(&ctx
);
5621 si_fix_resource_usage(sscreen
, shader
);
5626 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5627 const struct si_vs_prolog_bits
*prolog
,
5628 const char *prefix
, FILE *f
)
5630 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5631 prefix
, prolog
->instance_divisor_is_one
);
5632 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5633 prefix
, prolog
->instance_divisor_is_fetched
);
5634 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5635 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5636 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5637 prefix
, prolog
->ls_vgpr_fix
);
5639 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5640 fprintf(f
, " mono.vs.fix_fetch = {");
5641 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5642 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5648 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5649 fix
.u
.num_channels_m1
, fix
.u
.format
);
5654 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5657 const struct si_shader_key
*key
= &shader
->key
;
5659 fprintf(f
, "SHADER KEY\n");
5661 switch (processor
) {
5662 case PIPE_SHADER_VERTEX
:
5663 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5664 "part.vs.prolog", f
);
5665 fprintf(f
, " as_es = %u\n", key
->as_es
);
5666 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5667 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5668 key
->mono
.u
.vs_export_prim_id
);
5669 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5670 key
->opt
.vs_as_prim_discard_cs
);
5671 fprintf(f
, " opt.cs_prim_type = %s\n",
5672 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5673 fprintf(f
, " opt.cs_indexed = %u\n",
5674 key
->opt
.cs_indexed
);
5675 fprintf(f
, " opt.cs_instancing = %u\n",
5676 key
->opt
.cs_instancing
);
5677 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5678 key
->opt
.cs_primitive_restart
);
5679 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5680 key
->opt
.cs_provoking_vertex_first
);
5681 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5682 key
->opt
.cs_need_correct_orientation
);
5683 fprintf(f
, " opt.cs_cull_front = %u\n",
5684 key
->opt
.cs_cull_front
);
5685 fprintf(f
, " opt.cs_cull_back = %u\n",
5686 key
->opt
.cs_cull_back
);
5687 fprintf(f
, " opt.cs_cull_z = %u\n",
5688 key
->opt
.cs_cull_z
);
5689 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5690 key
->opt
.cs_halfz_clip_space
);
5693 case PIPE_SHADER_TESS_CTRL
:
5694 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5695 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5696 "part.tcs.ls_prolog", f
);
5698 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5699 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5702 case PIPE_SHADER_TESS_EVAL
:
5703 fprintf(f
, " as_es = %u\n", key
->as_es
);
5704 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5705 key
->mono
.u
.vs_export_prim_id
);
5708 case PIPE_SHADER_GEOMETRY
:
5709 if (shader
->is_gs_copy_shader
)
5712 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5713 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5714 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5715 "part.gs.vs_prolog", f
);
5717 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5720 case PIPE_SHADER_COMPUTE
:
5723 case PIPE_SHADER_FRAGMENT
:
5724 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5725 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5726 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5727 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5728 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5729 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5730 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5731 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5732 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5733 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5734 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5735 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5736 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5737 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5738 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5739 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5740 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5747 if ((processor
== PIPE_SHADER_GEOMETRY
||
5748 processor
== PIPE_SHADER_TESS_EVAL
||
5749 processor
== PIPE_SHADER_VERTEX
) &&
5750 !key
->as_es
&& !key
->as_ls
) {
5751 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5752 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5756 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5757 struct si_screen
*sscreen
,
5758 struct ac_llvm_compiler
*compiler
)
5760 struct lp_build_tgsi_context
*bld_base
;
5762 si_llvm_context_init(ctx
, sscreen
, compiler
);
5764 bld_base
= &ctx
->bld_base
;
5765 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5767 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5768 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5769 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5771 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5773 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5775 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5776 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5777 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5778 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5780 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5781 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5782 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5783 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5784 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5785 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5786 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5787 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5789 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5790 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5791 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5794 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5796 struct si_shader
*shader
= ctx
->shader
;
5797 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5799 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5800 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5801 shader
->key
.as_ls
||
5805 ac_optimize_vs_outputs(&ctx
->ac
,
5807 shader
->info
.vs_output_param_offset
,
5809 &shader
->info
.nr_param_exports
);
5812 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5813 unsigned param
, unsigned bitoffset
)
5815 LLVMValueRef args
[] = {
5816 LLVMGetParam(ctx
->main_fn
, param
),
5817 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5819 ac_build_intrinsic(&ctx
->ac
,
5820 "llvm.amdgcn.init.exec.from.input",
5821 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5824 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5825 const struct si_vs_prolog_bits
*key
)
5827 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5829 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5832 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
5834 struct si_shader
*shader
= ctx
->shader
;
5835 struct si_shader_selector
*sel
= shader
->selector
;
5836 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5838 // TODO clean all this up!
5839 switch (ctx
->type
) {
5840 case PIPE_SHADER_VERTEX
:
5841 ctx
->load_input
= declare_input_vs
;
5842 if (shader
->key
.as_ls
)
5843 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5844 else if (shader
->key
.as_es
)
5845 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5846 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5847 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
5849 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5850 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5851 ctx
->abi
.load_base_vertex
= get_base_vertex
;
5853 case PIPE_SHADER_TESS_CTRL
:
5854 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5855 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5856 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5857 bld_base
->emit_store
= store_output_tcs
;
5858 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
5859 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
5860 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5861 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5863 case PIPE_SHADER_TESS_EVAL
:
5864 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5865 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
5866 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
5867 ctx
->abi
.load_tess_level
= si_load_tess_level
;
5868 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5869 if (shader
->key
.as_es
)
5870 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5872 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5873 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5875 case PIPE_SHADER_GEOMETRY
:
5876 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5877 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
5878 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
5879 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
5880 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
5881 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
5883 case PIPE_SHADER_FRAGMENT
:
5884 ctx
->load_input
= declare_input_fs
;
5885 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
5886 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5887 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
5888 ctx
->abi
.load_sample_position
= load_sample_position
;
5889 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
5890 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
5892 case PIPE_SHADER_COMPUTE
:
5893 ctx
->abi
.load_local_group_size
= get_block_size
;
5896 assert(!"Unsupported shader type");
5900 ctx
->abi
.load_ubo
= load_ubo
;
5901 ctx
->abi
.load_ssbo
= load_ssbo
;
5903 create_function(ctx
);
5904 preload_ring_buffers(ctx
);
5906 /* For GFX9 merged shaders:
5907 * - Set EXEC for the first shader. If the prolog is present, set
5908 * EXEC there instead.
5909 * - Add a barrier before the second shader.
5910 * - In the second shader, reset EXEC to ~0 and wrap the main part in
5911 * an if-statement. This is required for correctness in geometry
5912 * shaders, to ensure that empty GS waves do not send GS_EMIT and
5915 * For monolithic merged shaders, the first shader is wrapped in an
5916 * if-block together with its prolog in si_build_wrapper_function.
5918 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
5919 if (!shader
->is_monolithic
&&
5920 sel
->info
.num_instructions
> 1 && /* not empty shader */
5921 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5922 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5923 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5924 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
5925 si_init_exec_from_input(ctx
,
5926 ctx
->param_merged_wave_info
, 0);
5927 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5928 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5929 if (!shader
->is_monolithic
)
5930 ac_init_exec_full_mask(&ctx
->ac
);
5932 LLVMValueRef num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
5934 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
5935 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
5936 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
5938 /* The barrier must execute for all shaders in a
5941 * Execute the barrier inside the conditional block,
5942 * so that empty waves can jump directly to s_endpgm,
5943 * which will also signal the barrier.
5945 * If the shader is TCS and the TCS epilog is present
5946 * and contains a barrier, it will wait there and then
5949 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
5953 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
5954 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
5955 for (unsigned i
= 0; i
< 6; i
++) {
5956 ctx
->invoc0_tess_factors
[i
] =
5957 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
5961 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5963 for (i
= 0; i
< 4; i
++) {
5964 ctx
->gs_next_vertex
[i
] =
5965 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
5969 if (sel
->force_correct_derivs_after_kill
) {
5970 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
5971 /* true = don't kill. */
5972 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
5973 ctx
->postponed_kill
);
5977 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
5978 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
5982 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
5983 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
5988 si_llvm_build_ret(ctx
, ctx
->return_value
);
5993 * Compute the VS prolog key, which contains all the information needed to
5994 * build the VS prolog function, and set shader->info bits where needed.
5996 * \param info Shader info of the vertex shader.
5997 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
5998 * \param prolog_key Key of the VS prolog
5999 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6000 * \param key Output shader part key.
6002 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6003 unsigned num_input_sgprs
,
6004 const struct si_vs_prolog_bits
*prolog_key
,
6005 struct si_shader
*shader_out
,
6006 union si_shader_part_key
*key
)
6008 memset(key
, 0, sizeof(*key
));
6009 key
->vs_prolog
.states
= *prolog_key
;
6010 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6011 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6012 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6013 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6015 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6016 key
->vs_prolog
.as_ls
= 1;
6017 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6018 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6019 key
->vs_prolog
.as_es
= 1;
6020 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6023 /* Enable loading the InstanceID VGPR. */
6024 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6026 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6027 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6028 shader_out
->info
.uses_instanceid
= true;
6032 * Compute the PS prolog key, which contains all the information needed to
6033 * build the PS prolog function, and set related bits in shader->config.
6035 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6036 union si_shader_part_key
*key
,
6037 bool separate_prolog
)
6039 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6041 memset(key
, 0, sizeof(*key
));
6042 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6043 key
->ps_prolog
.colors_read
= info
->colors_read
;
6044 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6045 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6046 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6047 (key
->ps_prolog
.colors_read
||
6048 key
->ps_prolog
.states
.force_persp_sample_interp
||
6049 key
->ps_prolog
.states
.force_linear_sample_interp
||
6050 key
->ps_prolog
.states
.force_persp_center_interp
||
6051 key
->ps_prolog
.states
.force_linear_center_interp
||
6052 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6053 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6054 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6056 if (info
->colors_read
) {
6057 unsigned *color
= shader
->selector
->color_attr_index
;
6059 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6060 /* BCOLORs are stored after the last input. */
6061 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6062 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6063 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6066 for (unsigned i
= 0; i
< 2; i
++) {
6067 unsigned interp
= info
->input_interpolate
[color
[i
]];
6068 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6070 if (!(info
->colors_read
& (0xf << i
*4)))
6073 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6075 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6076 interp
== TGSI_INTERPOLATE_COLOR
)
6077 interp
= TGSI_INTERPOLATE_CONSTANT
;
6080 case TGSI_INTERPOLATE_CONSTANT
:
6081 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6083 case TGSI_INTERPOLATE_PERSPECTIVE
:
6084 case TGSI_INTERPOLATE_COLOR
:
6085 /* Force the interpolation location for colors here. */
6086 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6087 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6088 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6089 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6092 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6093 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6094 shader
->config
.spi_ps_input_ena
|=
6095 S_0286CC_PERSP_SAMPLE_ENA(1);
6097 case TGSI_INTERPOLATE_LOC_CENTER
:
6098 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6099 shader
->config
.spi_ps_input_ena
|=
6100 S_0286CC_PERSP_CENTER_ENA(1);
6102 case TGSI_INTERPOLATE_LOC_CENTROID
:
6103 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6104 shader
->config
.spi_ps_input_ena
|=
6105 S_0286CC_PERSP_CENTROID_ENA(1);
6111 case TGSI_INTERPOLATE_LINEAR
:
6112 /* Force the interpolation location for colors here. */
6113 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6114 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6115 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6116 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6118 /* The VGPR assignment for non-monolithic shaders
6119 * works because InitialPSInputAddr is set on the
6120 * main shader and PERSP_PULL_MODEL is never used.
6123 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6124 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6125 separate_prolog
? 6 : 9;
6126 shader
->config
.spi_ps_input_ena
|=
6127 S_0286CC_LINEAR_SAMPLE_ENA(1);
6129 case TGSI_INTERPOLATE_LOC_CENTER
:
6130 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6131 separate_prolog
? 8 : 11;
6132 shader
->config
.spi_ps_input_ena
|=
6133 S_0286CC_LINEAR_CENTER_ENA(1);
6135 case TGSI_INTERPOLATE_LOC_CENTROID
:
6136 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6137 separate_prolog
? 10 : 13;
6138 shader
->config
.spi_ps_input_ena
|=
6139 S_0286CC_LINEAR_CENTROID_ENA(1);
6153 * Check whether a PS prolog is required based on the key.
6155 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6157 return key
->ps_prolog
.colors_read
||
6158 key
->ps_prolog
.states
.force_persp_sample_interp
||
6159 key
->ps_prolog
.states
.force_linear_sample_interp
||
6160 key
->ps_prolog
.states
.force_persp_center_interp
||
6161 key
->ps_prolog
.states
.force_linear_center_interp
||
6162 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6163 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6164 key
->ps_prolog
.states
.poly_stipple
||
6165 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6169 * Compute the PS epilog key, which contains all the information needed to
6170 * build the PS epilog function.
6172 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6173 union si_shader_part_key
*key
)
6175 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6176 memset(key
, 0, sizeof(*key
));
6177 key
->ps_epilog
.colors_written
= info
->colors_written
;
6178 key
->ps_epilog
.writes_z
= info
->writes_z
;
6179 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6180 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6181 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6185 * Build the GS prolog function. Rotate the input vertices for triangle strips
6188 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6189 union si_shader_part_key
*key
)
6191 unsigned num_sgprs
, num_vgprs
;
6192 struct si_function_info fninfo
;
6193 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6194 LLVMTypeRef returns
[48];
6195 LLVMValueRef func
, ret
;
6197 si_init_function_info(&fninfo
);
6199 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6200 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6201 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6203 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6204 num_vgprs
= 5; /* ES inputs are not needed by GS */
6206 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6210 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6211 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6212 returns
[i
] = ctx
->i32
;
6215 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6216 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6217 returns
[num_sgprs
+ i
] = ctx
->f32
;
6220 /* Create the function. */
6221 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6223 func
= ctx
->main_fn
;
6225 /* Set the full EXEC mask for the prolog, because we are only fiddling
6226 * with registers here. The main shader part will set the correct EXEC
6229 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6230 ac_init_exec_full_mask(&ctx
->ac
);
6232 /* Copy inputs to outputs. This should be no-op, as the registers match,
6233 * but it will prevent the compiler from overwriting them unintentionally.
6235 ret
= ctx
->return_value
;
6236 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6237 LLVMValueRef p
= LLVMGetParam(func
, i
);
6238 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6240 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6241 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6242 p
= ac_to_float(&ctx
->ac
, p
);
6243 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6246 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6247 /* Remap the input vertices for every other primitive. */
6248 const unsigned gfx6_vtx_params
[6] = {
6256 const unsigned gfx9_vtx_params
[3] = {
6261 LLVMValueRef vtx_in
[6], vtx_out
[6];
6262 LLVMValueRef prim_id
, rotate
;
6264 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6265 for (unsigned i
= 0; i
< 3; i
++) {
6266 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6267 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6270 for (unsigned i
= 0; i
< 6; i
++)
6271 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6274 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6275 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6277 for (unsigned i
= 0; i
< 6; ++i
) {
6278 LLVMValueRef base
, rotated
;
6280 rotated
= vtx_in
[(i
+ 4) % 6];
6281 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6284 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6285 for (unsigned i
= 0; i
< 3; i
++) {
6286 LLVMValueRef hi
, out
;
6288 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6289 LLVMConstInt(ctx
->i32
, 16, 0), "");
6290 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6291 out
= ac_to_float(&ctx
->ac
, out
);
6292 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6293 gfx9_vtx_params
[i
], "");
6296 for (unsigned i
= 0; i
< 6; i
++) {
6299 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6300 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6301 gfx6_vtx_params
[i
], "");
6306 LLVMBuildRet(builder
, ret
);
6310 * Given a list of shader part functions, build a wrapper function that
6311 * runs them in sequence to form a monolithic shader.
6313 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6314 LLVMValueRef
*parts
,
6317 unsigned next_shader_first_part
)
6319 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6320 /* PS epilog has one arg per color component; gfx9 merged shader
6321 * prologs need to forward 32 user SGPRs.
6323 struct si_function_info fninfo
;
6324 LLVMValueRef initial
[64], out
[64];
6325 LLVMTypeRef function_type
;
6326 unsigned num_first_params
;
6327 unsigned num_out
, initial_num_out
;
6328 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6329 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6330 unsigned num_sgprs
, num_vgprs
;
6332 struct lp_build_if_state if_state
;
6334 si_init_function_info(&fninfo
);
6336 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6337 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6338 AC_FUNC_ATTR_ALWAYSINLINE
);
6339 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6342 /* The parameters of the wrapper function correspond to those of the
6343 * first part in terms of SGPRs and VGPRs, but we use the types of the
6344 * main part to get the right types. This is relevant for the
6345 * dereferenceable attribute on descriptor table pointers.
6350 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6351 num_first_params
= LLVMCountParamTypes(function_type
);
6353 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6354 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6356 if (ac_is_sgpr_param(param
)) {
6357 assert(num_vgprs
== 0);
6358 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6360 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6365 while (gprs
< num_sgprs
+ num_vgprs
) {
6366 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6367 LLVMTypeRef type
= LLVMTypeOf(param
);
6368 unsigned size
= ac_get_type_size(type
) / 4;
6370 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6372 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6373 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6374 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6379 /* Prepare the return type. */
6380 unsigned num_returns
= 0;
6381 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6383 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6384 return_type
= LLVMGetReturnType(last_func_type
);
6386 switch (LLVMGetTypeKind(return_type
)) {
6387 case LLVMStructTypeKind
:
6388 num_returns
= LLVMCountStructElementTypes(return_type
);
6389 assert(num_returns
<= ARRAY_SIZE(returns
));
6390 LLVMGetStructElementTypes(return_type
, returns
);
6392 case LLVMVoidTypeKind
:
6395 unreachable("unexpected type");
6398 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6399 si_get_max_workgroup_size(ctx
->shader
));
6401 if (is_merged_shader(ctx
))
6402 ac_init_exec_full_mask(&ctx
->ac
);
6404 /* Record the arguments of the function as if they were an output of
6410 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6411 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6412 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6413 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6414 unsigned size
= ac_get_type_size(param_type
) / 4;
6417 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6418 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6419 param_type
= ctx
->i32
;
6422 if (param_type
!= out_type
)
6423 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6424 out
[num_out
++] = param
;
6426 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6428 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6429 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6430 param_type
= ctx
->i64
;
6433 if (param_type
!= vector_type
)
6434 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6436 for (unsigned j
= 0; j
< size
; ++j
)
6437 out
[num_out
++] = LLVMBuildExtractElement(
6438 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6441 if (i
< fninfo
.num_sgpr_params
)
6442 num_out_sgpr
= num_out
;
6445 memcpy(initial
, out
, sizeof(out
));
6446 initial_num_out
= num_out
;
6447 initial_num_out_sgpr
= num_out_sgpr
;
6449 /* Now chain the parts. */
6451 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6452 LLVMValueRef in
[48];
6453 LLVMTypeRef ret_type
;
6454 unsigned out_idx
= 0;
6455 unsigned num_params
= LLVMCountParams(parts
[part
]);
6457 /* Merged shaders are executed conditionally depending
6458 * on the number of enabled threads passed in the input SGPRs. */
6459 if (is_merged_shader(ctx
) && part
== 0) {
6460 LLVMValueRef ena
, count
= initial
[3];
6462 count
= LLVMBuildAnd(builder
, count
,
6463 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6464 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6465 ac_get_thread_id(&ctx
->ac
), count
, "");
6466 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6469 /* Derive arguments for the next part from outputs of the
6472 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6474 LLVMTypeRef param_type
;
6476 unsigned param_size
;
6477 LLVMValueRef arg
= NULL
;
6479 param
= LLVMGetParam(parts
[part
], param_idx
);
6480 param_type
= LLVMTypeOf(param
);
6481 param_size
= ac_get_type_size(param_type
) / 4;
6482 is_sgpr
= ac_is_sgpr_param(param
);
6485 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6486 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6487 } else if (out_idx
< num_out_sgpr
) {
6488 /* Skip returned SGPRs the current part doesn't
6489 * declare on the input. */
6490 out_idx
= num_out_sgpr
;
6493 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6495 if (param_size
== 1)
6498 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6500 if (LLVMTypeOf(arg
) != param_type
) {
6501 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6502 if (LLVMGetPointerAddressSpace(param_type
) ==
6503 AC_ADDR_SPACE_CONST_32BIT
) {
6504 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6505 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6507 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6508 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6511 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6515 in
[param_idx
] = arg
;
6516 out_idx
+= param_size
;
6519 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6521 if (is_merged_shader(ctx
) &&
6522 part
+ 1 == next_shader_first_part
) {
6523 lp_build_endif(&if_state
);
6525 /* The second half of the merged shader should use
6526 * the inputs from the toplevel (wrapper) function,
6527 * not the return value from the last call.
6529 * That's because the last call was executed condi-
6530 * tionally, so we can't consume it in the main
6533 memcpy(out
, initial
, sizeof(initial
));
6534 num_out
= initial_num_out
;
6535 num_out_sgpr
= initial_num_out_sgpr
;
6539 /* Extract the returned GPRs. */
6540 ret_type
= LLVMTypeOf(ret
);
6544 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6545 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6547 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6549 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6551 LLVMBuildExtractValue(builder
, ret
, i
, "");
6553 assert(num_out
< ARRAY_SIZE(out
));
6554 out
[num_out
++] = val
;
6556 if (LLVMTypeOf(val
) == ctx
->i32
) {
6557 assert(num_out_sgpr
+ 1 == num_out
);
6558 num_out_sgpr
= num_out
;
6564 /* Return the value from the last part. */
6565 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6566 LLVMBuildRetVoid(builder
);
6568 LLVMBuildRet(builder
, ret
);
6571 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6572 struct si_shader_selector
*sel
)
6574 if (!compiler
->low_opt_passes
)
6577 /* Assume a slow CPU. */
6578 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6579 sel
->screen
->info
.chip_class
<= GFX8
);
6581 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6583 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6584 sel
->info
.num_memory_instructions
> 1000;
6587 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6588 struct ac_llvm_compiler
*compiler
,
6589 struct si_shader
*shader
,
6590 struct pipe_debug_callback
*debug
)
6592 struct si_shader_selector
*sel
= shader
->selector
;
6593 struct si_shader_context ctx
;
6596 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6597 * conversion fails. */
6598 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6599 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6601 tgsi_dump(sel
->tokens
, 0);
6603 nir_print_shader(sel
->nir
, stderr
);
6604 si_dump_streamout(&sel
->so
);
6607 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6608 si_llvm_context_set_tgsi(&ctx
, shader
);
6610 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6611 sizeof(shader
->info
.vs_output_param_offset
));
6613 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6615 if (!si_compile_tgsi_main(&ctx
)) {
6616 si_llvm_dispose(&ctx
);
6620 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6621 LLVMValueRef parts
[2];
6622 bool need_prolog
= sel
->vs_needs_prolog
;
6624 parts
[1] = ctx
.main_fn
;
6627 union si_shader_part_key prolog_key
;
6628 si_get_vs_prolog_key(&sel
->info
,
6629 shader
->info
.num_input_sgprs
,
6630 &shader
->key
.part
.vs
.prolog
,
6631 shader
, &prolog_key
);
6632 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6633 parts
[0] = ctx
.main_fn
;
6636 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6637 1 + need_prolog
, need_prolog
, 0);
6639 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6640 si_build_prim_discard_compute_shader(&ctx
);
6641 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6642 if (sscreen
->info
.chip_class
>= GFX9
) {
6643 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6644 LLVMValueRef parts
[4];
6645 bool vs_needs_prolog
=
6646 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6649 parts
[2] = ctx
.main_fn
;
6652 union si_shader_part_key tcs_epilog_key
;
6653 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6654 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6655 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6656 parts
[3] = ctx
.main_fn
;
6658 /* VS as LS main part */
6659 struct si_shader shader_ls
= {};
6660 shader_ls
.selector
= ls
;
6661 shader_ls
.key
.as_ls
= 1;
6662 shader_ls
.key
.mono
= shader
->key
.mono
;
6663 shader_ls
.key
.opt
= shader
->key
.opt
;
6664 shader_ls
.is_monolithic
= true;
6665 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6667 if (!si_compile_tgsi_main(&ctx
)) {
6668 si_llvm_dispose(&ctx
);
6671 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6672 parts
[1] = ctx
.main_fn
;
6675 if (vs_needs_prolog
) {
6676 union si_shader_part_key vs_prolog_key
;
6677 si_get_vs_prolog_key(&ls
->info
,
6678 shader_ls
.info
.num_input_sgprs
,
6679 &shader
->key
.part
.tcs
.ls_prolog
,
6680 shader
, &vs_prolog_key
);
6681 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6682 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6683 parts
[0] = ctx
.main_fn
;
6686 /* Reset the shader context. */
6687 ctx
.shader
= shader
;
6688 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6690 si_build_wrapper_function(&ctx
,
6691 parts
+ !vs_needs_prolog
,
6692 4 - !vs_needs_prolog
, vs_needs_prolog
,
6693 vs_needs_prolog
? 2 : 1);
6695 LLVMValueRef parts
[2];
6696 union si_shader_part_key epilog_key
;
6698 parts
[0] = ctx
.main_fn
;
6700 memset(&epilog_key
, 0, sizeof(epilog_key
));
6701 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6702 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6703 parts
[1] = ctx
.main_fn
;
6705 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6707 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6708 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6709 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6710 LLVMValueRef es_prolog
= NULL
;
6711 LLVMValueRef es_main
= NULL
;
6712 LLVMValueRef gs_prolog
= NULL
;
6713 LLVMValueRef gs_main
= ctx
.main_fn
;
6716 union si_shader_part_key gs_prolog_key
;
6717 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6718 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6719 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6720 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6721 gs_prolog
= ctx
.main_fn
;
6724 struct si_shader shader_es
= {};
6725 shader_es
.selector
= es
;
6726 shader_es
.key
.as_es
= 1;
6727 shader_es
.key
.mono
= shader
->key
.mono
;
6728 shader_es
.key
.opt
= shader
->key
.opt
;
6729 shader_es
.is_monolithic
= true;
6730 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6732 if (!si_compile_tgsi_main(&ctx
)) {
6733 si_llvm_dispose(&ctx
);
6736 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6737 es_main
= ctx
.main_fn
;
6740 if (es
->vs_needs_prolog
) {
6741 union si_shader_part_key vs_prolog_key
;
6742 si_get_vs_prolog_key(&es
->info
,
6743 shader_es
.info
.num_input_sgprs
,
6744 &shader
->key
.part
.gs
.vs_prolog
,
6745 shader
, &vs_prolog_key
);
6746 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6747 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6748 es_prolog
= ctx
.main_fn
;
6751 /* Reset the shader context. */
6752 ctx
.shader
= shader
;
6753 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6755 /* Prepare the array of shader parts. */
6756 LLVMValueRef parts
[4];
6757 unsigned num_parts
= 0, main_part
, next_first_part
;
6760 parts
[num_parts
++] = es_prolog
;
6762 parts
[main_part
= num_parts
++] = es_main
;
6763 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6764 parts
[num_parts
++] = gs_main
;
6766 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6767 main_part
, next_first_part
);
6769 LLVMValueRef parts
[2];
6770 union si_shader_part_key prolog_key
;
6772 parts
[1] = ctx
.main_fn
;
6774 memset(&prolog_key
, 0, sizeof(prolog_key
));
6775 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6776 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6777 parts
[0] = ctx
.main_fn
;
6779 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6781 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6782 LLVMValueRef parts
[3];
6783 union si_shader_part_key prolog_key
;
6784 union si_shader_part_key epilog_key
;
6787 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6788 need_prolog
= si_need_ps_prolog(&prolog_key
);
6790 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6793 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6794 parts
[0] = ctx
.main_fn
;
6797 si_get_ps_epilog_key(shader
, &epilog_key
);
6798 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6799 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6801 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6802 need_prolog
? 1 : 0, 0);
6805 si_llvm_optimize_module(&ctx
);
6807 /* Post-optimization transformations and analysis. */
6808 si_optimize_vs_outputs(&ctx
);
6810 if ((debug
&& debug
->debug_message
) ||
6811 si_can_dump_shader(sscreen
, ctx
.type
)) {
6812 ctx
.shader
->info
.private_mem_vgprs
=
6813 ac_count_scratch_private_memory(ctx
.main_fn
);
6816 /* Make sure the input is a pointer and not integer followed by inttoptr. */
6817 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
6818 LLVMPointerTypeKind
);
6820 /* Compile to bytecode. */
6821 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
6822 ctx
.ac
.module
, debug
, ctx
.type
,
6823 si_get_shader_name(shader
, ctx
.type
),
6824 si_should_optimize_less(compiler
, shader
->selector
));
6825 si_llvm_dispose(&ctx
);
6827 fprintf(stderr
, "LLVM failed to compile shader\n");
6831 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6832 * LLVM 3.9svn has this bug.
6834 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6835 unsigned wave_size
= 64;
6836 unsigned max_vgprs
= 256;
6837 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
6838 unsigned max_sgprs_per_wave
= 128;
6839 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6840 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6841 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6843 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6844 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6846 if (shader
->config
.num_sgprs
> max_sgprs
||
6847 shader
->config
.num_vgprs
> max_vgprs
) {
6848 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6849 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6850 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6851 max_sgprs
, max_vgprs
);
6853 /* Just terminate the process, because dependent
6854 * shaders can hang due to bad input data, but use
6855 * the env var to allow shader-db to work.
6857 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6862 /* Add the scratch offset to input SGPRs. */
6863 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
6864 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6866 /* Calculate the number of fragment input VGPRs. */
6867 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6868 shader
->info
.num_input_vgprs
= 0;
6869 shader
->info
.face_vgpr_index
= -1;
6870 shader
->info
.ancillary_vgpr_index
= -1;
6872 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6873 shader
->info
.num_input_vgprs
+= 2;
6874 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6875 shader
->info
.num_input_vgprs
+= 2;
6876 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6877 shader
->info
.num_input_vgprs
+= 2;
6878 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6879 shader
->info
.num_input_vgprs
+= 3;
6880 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6881 shader
->info
.num_input_vgprs
+= 2;
6882 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6883 shader
->info
.num_input_vgprs
+= 2;
6884 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6885 shader
->info
.num_input_vgprs
+= 2;
6886 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6887 shader
->info
.num_input_vgprs
+= 1;
6888 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6889 shader
->info
.num_input_vgprs
+= 1;
6890 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6891 shader
->info
.num_input_vgprs
+= 1;
6892 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6893 shader
->info
.num_input_vgprs
+= 1;
6894 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6895 shader
->info
.num_input_vgprs
+= 1;
6896 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6897 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6898 shader
->info
.num_input_vgprs
+= 1;
6900 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6901 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6902 shader
->info
.num_input_vgprs
+= 1;
6904 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6905 shader
->info
.num_input_vgprs
+= 1;
6906 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6907 shader
->info
.num_input_vgprs
+= 1;
6910 si_calculate_max_simd_waves(shader
);
6911 si_shader_dump_stats_for_shader_db(shader
, debug
);
6916 * Create, compile and return a shader part (prolog or epilog).
6918 * \param sscreen screen
6919 * \param list list of shader parts of the same category
6920 * \param type shader type
6921 * \param key shader part key
6922 * \param prolog whether the part being requested is a prolog
6923 * \param tm LLVM target machine
6924 * \param debug debug callback
6925 * \param build the callback responsible for building the main function
6926 * \return non-NULL on success
6928 static struct si_shader_part
*
6929 si_get_shader_part(struct si_screen
*sscreen
,
6930 struct si_shader_part
**list
,
6931 enum pipe_shader_type type
,
6933 union si_shader_part_key
*key
,
6934 struct ac_llvm_compiler
*compiler
,
6935 struct pipe_debug_callback
*debug
,
6936 void (*build
)(struct si_shader_context
*,
6937 union si_shader_part_key
*),
6940 struct si_shader_part
*result
;
6942 mtx_lock(&sscreen
->shader_parts_mutex
);
6944 /* Find existing. */
6945 for (result
= *list
; result
; result
= result
->next
) {
6946 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
6947 mtx_unlock(&sscreen
->shader_parts_mutex
);
6952 /* Compile a new one. */
6953 result
= CALLOC_STRUCT(si_shader_part
);
6956 struct si_shader shader
= {};
6957 struct si_shader_context ctx
;
6959 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6960 ctx
.shader
= &shader
;
6964 case PIPE_SHADER_VERTEX
:
6965 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
6966 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
6968 case PIPE_SHADER_TESS_CTRL
:
6970 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
6972 case PIPE_SHADER_GEOMETRY
:
6975 case PIPE_SHADER_FRAGMENT
:
6977 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
6979 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
6982 unreachable("bad shader part");
6988 si_llvm_optimize_module(&ctx
);
6990 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
6991 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
6997 result
->next
= *list
;
7001 si_llvm_dispose(&ctx
);
7002 mtx_unlock(&sscreen
->shader_parts_mutex
);
7006 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7008 LLVMValueRef ptr
[2], list
;
7009 bool merged_shader
= is_merged_shader(ctx
);
7011 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7012 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7013 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7018 * Build the vertex shader prolog function.
7020 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7021 * All inputs are returned unmodified. The vertex load indices are
7022 * stored after them, which will be used by the API VS for fetching inputs.
7024 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7029 * (VertexID + BaseVertex),
7030 * (InstanceID + StartInstance),
7031 * (InstanceID / 2 + StartInstance)
7033 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7034 union si_shader_part_key
*key
)
7036 struct si_function_info fninfo
;
7037 LLVMTypeRef
*returns
;
7038 LLVMValueRef ret
, func
;
7040 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7041 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7042 LLVMValueRef input_vgprs
[9];
7043 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7045 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7047 si_init_function_info(&fninfo
);
7049 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7050 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7051 sizeof(LLVMTypeRef
));
7054 /* Declare input and output SGPRs. */
7055 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7056 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7057 returns
[num_returns
++] = ctx
->i32
;
7060 /* Preloaded VGPRs (outputs must be floats) */
7061 for (i
= 0; i
< num_input_vgprs
; i
++) {
7062 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7063 returns
[num_returns
++] = ctx
->f32
;
7066 /* Vertex load indices. */
7067 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7068 returns
[num_returns
++] = ctx
->f32
;
7070 /* Create the function. */
7071 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7072 func
= ctx
->main_fn
;
7074 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7075 if (!key
->vs_prolog
.is_monolithic
)
7076 si_init_exec_from_input(ctx
, 3, 0);
7078 if (key
->vs_prolog
.as_ls
&&
7079 ctx
->screen
->has_ls_vgpr_init_bug
) {
7080 /* If there are no HS threads, SPI loads the LS VGPRs
7081 * starting at VGPR 0. Shift them back to where they
7084 LLVMValueRef has_hs_threads
=
7085 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7086 si_unpack_param(ctx
, 3, 8, 8),
7089 for (i
= 4; i
> 0; --i
) {
7090 input_vgprs
[i
+ 1] =
7091 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7093 input_vgprs
[i
- 1], "");
7098 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7099 unsigned instance_id_vgpr
= first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7101 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7102 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7104 /* InstanceID = VertexID >> 16;
7105 * VertexID = VertexID & 0xffff;
7107 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7108 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7109 LLVMConstInt(ctx
->i32
, 16, 0), "");
7110 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7111 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7114 /* Copy inputs to outputs. This should be no-op, as the registers match,
7115 * but it will prevent the compiler from overwriting them unintentionally.
7117 ret
= ctx
->return_value
;
7118 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7119 LLVMValueRef p
= LLVMGetParam(func
, i
);
7120 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7122 for (i
= 0; i
< num_input_vgprs
; i
++) {
7123 LLVMValueRef p
= input_vgprs
[i
];
7125 if (i
== vertex_id_vgpr
)
7126 p
= ctx
->abi
.vertex_id
;
7127 else if (i
== instance_id_vgpr
)
7128 p
= ctx
->abi
.instance_id
;
7130 p
= ac_to_float(&ctx
->ac
, p
);
7131 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7132 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7135 /* Compute vertex load indices from instance divisors. */
7136 LLVMValueRef instance_divisor_constbuf
= NULL
;
7138 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7139 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7140 LLVMValueRef buf_index
=
7141 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7142 instance_divisor_constbuf
=
7143 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7146 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7147 bool divisor_is_one
=
7148 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7149 bool divisor_is_fetched
=
7150 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7151 LLVMValueRef index
= NULL
;
7153 if (divisor_is_one
) {
7154 index
= ctx
->abi
.instance_id
;
7155 } else if (divisor_is_fetched
) {
7156 LLVMValueRef udiv_factors
[4];
7158 for (unsigned j
= 0; j
< 4; j
++) {
7160 buffer_load_const(ctx
, instance_divisor_constbuf
,
7161 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7162 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7164 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7165 * Such InstanceID might not be achievable in a reasonable time though.
7167 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7168 udiv_factors
[0], udiv_factors
[1],
7169 udiv_factors
[2], udiv_factors
[3]);
7172 if (divisor_is_one
|| divisor_is_fetched
) {
7173 /* Add StartInstance. */
7174 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7175 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7176 SI_SGPR_START_INSTANCE
), "");
7178 /* VertexID + BaseVertex */
7179 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7181 LLVMGetParam(func
, user_sgpr_base
+
7182 SI_SGPR_BASE_VERTEX
), "");
7185 index
= ac_to_float(&ctx
->ac
, index
);
7186 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7187 fninfo
.num_params
+ i
, "");
7190 si_llvm_build_ret(ctx
, ret
);
7193 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7194 struct ac_llvm_compiler
*compiler
,
7195 struct si_shader
*shader
,
7196 struct pipe_debug_callback
*debug
,
7197 struct si_shader
*main_part
,
7198 const struct si_vs_prolog_bits
*key
)
7200 struct si_shader_selector
*vs
= main_part
->selector
;
7202 if (!si_vs_needs_prolog(vs
, key
))
7205 /* Get the prolog. */
7206 union si_shader_part_key prolog_key
;
7207 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7208 key
, shader
, &prolog_key
);
7211 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7212 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7213 debug
, si_build_vs_prolog_function
,
7214 "Vertex Shader Prolog");
7215 return shader
->prolog
!= NULL
;
7219 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7221 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7222 struct ac_llvm_compiler
*compiler
,
7223 struct si_shader
*shader
,
7224 struct pipe_debug_callback
*debug
)
7226 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7227 &shader
->key
.part
.vs
.prolog
);
7231 * Compile the TCS epilog function. This writes tesselation factors to memory
7232 * based on the output primitive type of the tesselator (determined by TES).
7234 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7235 union si_shader_part_key
*key
)
7237 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7238 struct si_function_info fninfo
;
7241 si_init_function_info(&fninfo
);
7243 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7244 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7245 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7246 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7247 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7248 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7249 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7250 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7251 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7252 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7253 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7254 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7255 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7256 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7257 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7258 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7259 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7260 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7261 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7262 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7264 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7265 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7266 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7267 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7268 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7269 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7270 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7271 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7272 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7273 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7276 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7277 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7278 unsigned tess_factors_idx
=
7279 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7280 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7281 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7283 for (unsigned i
= 0; i
< 6; i
++)
7284 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7286 /* Create the function. */
7287 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7288 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 64);
7289 ac_declare_lds_as_pointer(&ctx
->ac
);
7290 func
= ctx
->main_fn
;
7292 LLVMValueRef invoc0_tess_factors
[6];
7293 for (unsigned i
= 0; i
< 6; i
++)
7294 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7296 si_write_tess_factors(bld_base
,
7297 LLVMGetParam(func
, tess_factors_idx
),
7298 LLVMGetParam(func
, tess_factors_idx
+ 1),
7299 LLVMGetParam(func
, tess_factors_idx
+ 2),
7300 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7302 LLVMBuildRetVoid(ctx
->ac
.builder
);
7306 * Select and compile (or reuse) TCS parts (epilog).
7308 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7309 struct ac_llvm_compiler
*compiler
,
7310 struct si_shader
*shader
,
7311 struct pipe_debug_callback
*debug
)
7313 if (sscreen
->info
.chip_class
>= GFX9
) {
7314 struct si_shader
*ls_main_part
=
7315 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7317 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7318 &shader
->key
.part
.tcs
.ls_prolog
))
7321 shader
->previous_stage
= ls_main_part
;
7324 /* Get the epilog. */
7325 union si_shader_part_key epilog_key
;
7326 memset(&epilog_key
, 0, sizeof(epilog_key
));
7327 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7329 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7330 PIPE_SHADER_TESS_CTRL
, false,
7331 &epilog_key
, compiler
, debug
,
7332 si_build_tcs_epilog_function
,
7333 "Tessellation Control Shader Epilog");
7334 return shader
->epilog
!= NULL
;
7338 * Select and compile (or reuse) GS parts (prolog).
7340 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7341 struct ac_llvm_compiler
*compiler
,
7342 struct si_shader
*shader
,
7343 struct pipe_debug_callback
*debug
)
7345 if (sscreen
->info
.chip_class
>= GFX9
) {
7346 struct si_shader
*es_main_part
=
7347 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7349 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7350 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7351 &shader
->key
.part
.gs
.vs_prolog
))
7354 shader
->previous_stage
= es_main_part
;
7357 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7360 union si_shader_part_key prolog_key
;
7361 memset(&prolog_key
, 0, sizeof(prolog_key
));
7362 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7364 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7365 PIPE_SHADER_GEOMETRY
, true,
7366 &prolog_key
, compiler
, debug
,
7367 si_build_gs_prolog_function
,
7368 "Geometry Shader Prolog");
7369 return shader
->prolog2
!= NULL
;
7373 * Build the pixel shader prolog function. This handles:
7374 * - two-side color selection and interpolation
7375 * - overriding interpolation parameters for the API PS
7376 * - polygon stippling
7378 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7379 * overriden by other states. (e.g. per-sample interpolation)
7380 * Interpolated colors are stored after the preloaded VGPRs.
7382 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7383 union si_shader_part_key
*key
)
7385 struct si_function_info fninfo
;
7386 LLVMValueRef ret
, func
;
7387 int num_returns
, i
, num_color_channels
;
7389 assert(si_need_ps_prolog(key
));
7391 si_init_function_info(&fninfo
);
7393 /* Declare inputs. */
7394 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7395 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7397 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7398 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7400 /* Declare outputs (same as inputs + add colors if needed) */
7401 num_returns
= fninfo
.num_params
;
7402 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7403 for (i
= 0; i
< num_color_channels
; i
++)
7404 fninfo
.types
[num_returns
++] = ctx
->f32
;
7406 /* Create the function. */
7407 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7409 func
= ctx
->main_fn
;
7411 /* Copy inputs to outputs. This should be no-op, as the registers match,
7412 * but it will prevent the compiler from overwriting them unintentionally.
7414 ret
= ctx
->return_value
;
7415 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7416 LLVMValueRef p
= LLVMGetParam(func
, i
);
7417 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7420 /* Polygon stippling. */
7421 if (key
->ps_prolog
.states
.poly_stipple
) {
7422 /* POS_FIXED_PT is always last. */
7423 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7424 key
->ps_prolog
.num_input_vgprs
- 1;
7425 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7427 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7430 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7431 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7432 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7433 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7435 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7436 * The hw doesn't compute CENTROID if the whole wave only
7437 * contains fully-covered quads.
7439 * PRIM_MASK is after user SGPRs.
7441 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7442 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7443 LLVMConstInt(ctx
->i32
, 31, 0), "");
7444 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7447 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7448 /* Read PERSP_CENTER. */
7449 for (i
= 0; i
< 2; i
++)
7450 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7451 /* Read PERSP_CENTROID. */
7452 for (i
= 0; i
< 2; i
++)
7453 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7454 /* Select PERSP_CENTROID. */
7455 for (i
= 0; i
< 2; i
++) {
7456 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7457 center
[i
], centroid
[i
], "");
7458 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7459 tmp
, base
+ 4 + i
, "");
7462 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7463 /* Read LINEAR_CENTER. */
7464 for (i
= 0; i
< 2; i
++)
7465 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7466 /* Read LINEAR_CENTROID. */
7467 for (i
= 0; i
< 2; i
++)
7468 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7469 /* Select LINEAR_CENTROID. */
7470 for (i
= 0; i
< 2; i
++) {
7471 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7472 center
[i
], centroid
[i
], "");
7473 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7474 tmp
, base
+ 10 + i
, "");
7479 /* Force per-sample interpolation. */
7480 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7481 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7482 LLVMValueRef persp_sample
[2];
7484 /* Read PERSP_SAMPLE. */
7485 for (i
= 0; i
< 2; i
++)
7486 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7487 /* Overwrite PERSP_CENTER. */
7488 for (i
= 0; i
< 2; i
++)
7489 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7490 persp_sample
[i
], base
+ 2 + i
, "");
7491 /* Overwrite PERSP_CENTROID. */
7492 for (i
= 0; i
< 2; i
++)
7493 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7494 persp_sample
[i
], base
+ 4 + i
, "");
7496 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7497 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7498 LLVMValueRef linear_sample
[2];
7500 /* Read LINEAR_SAMPLE. */
7501 for (i
= 0; i
< 2; i
++)
7502 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7503 /* Overwrite LINEAR_CENTER. */
7504 for (i
= 0; i
< 2; i
++)
7505 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7506 linear_sample
[i
], base
+ 8 + i
, "");
7507 /* Overwrite LINEAR_CENTROID. */
7508 for (i
= 0; i
< 2; i
++)
7509 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7510 linear_sample
[i
], base
+ 10 + i
, "");
7513 /* Force center interpolation. */
7514 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7515 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7516 LLVMValueRef persp_center
[2];
7518 /* Read PERSP_CENTER. */
7519 for (i
= 0; i
< 2; i
++)
7520 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7521 /* Overwrite PERSP_SAMPLE. */
7522 for (i
= 0; i
< 2; i
++)
7523 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7524 persp_center
[i
], base
+ i
, "");
7525 /* Overwrite PERSP_CENTROID. */
7526 for (i
= 0; i
< 2; i
++)
7527 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7528 persp_center
[i
], base
+ 4 + i
, "");
7530 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7531 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7532 LLVMValueRef linear_center
[2];
7534 /* Read LINEAR_CENTER. */
7535 for (i
= 0; i
< 2; i
++)
7536 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7537 /* Overwrite LINEAR_SAMPLE. */
7538 for (i
= 0; i
< 2; i
++)
7539 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7540 linear_center
[i
], base
+ 6 + i
, "");
7541 /* Overwrite LINEAR_CENTROID. */
7542 for (i
= 0; i
< 2; i
++)
7543 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7544 linear_center
[i
], base
+ 10 + i
, "");
7547 /* Interpolate colors. */
7548 unsigned color_out_idx
= 0;
7549 for (i
= 0; i
< 2; i
++) {
7550 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7551 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7552 key
->ps_prolog
.face_vgpr_index
;
7553 LLVMValueRef interp
[2], color
[4];
7554 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7559 /* If the interpolation qualifier is not CONSTANT (-1). */
7560 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7561 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7562 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7564 /* Get the (i,j) updated by bc_optimize handling. */
7565 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7567 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7568 interp_vgpr
+ 1, "");
7569 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7572 /* Use the absolute location of the input. */
7573 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7575 if (key
->ps_prolog
.states
.color_two_side
) {
7576 face
= LLVMGetParam(func
, face_vgpr
);
7577 face
= ac_to_integer(&ctx
->ac
, face
);
7580 interp_fs_input(ctx
,
7581 key
->ps_prolog
.color_attr_index
[i
],
7582 TGSI_SEMANTIC_COLOR
, i
,
7583 key
->ps_prolog
.num_interp_inputs
,
7584 key
->ps_prolog
.colors_read
, interp_ij
,
7585 prim_mask
, face
, color
);
7588 unsigned chan
= u_bit_scan(&writemask
);
7589 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7590 fninfo
.num_params
+ color_out_idx
++, "");
7594 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7597 * "When per-sample shading is active due to the use of a fragment
7598 * input qualified by sample or due to the use of the gl_SampleID
7599 * or gl_SamplePosition variables, only the bit for the current
7600 * sample is set in gl_SampleMaskIn. When state specifies multiple
7601 * fragment shader invocations for a given fragment, the sample
7602 * mask for any single fragment shader invocation may specify a
7603 * subset of the covered samples for the fragment. In this case,
7604 * the bit corresponding to each covered sample will be set in
7605 * exactly one fragment shader invocation."
7607 * The samplemask loaded by hardware is always the coverage of the
7608 * entire pixel/fragment, so mask bits out based on the sample ID.
7610 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7611 /* The bit pattern matches that used by fixed function fragment
7613 static const uint16_t ps_iter_masks
[] = {
7614 0xffff, /* not used */
7620 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7622 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7623 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7624 key
->ps_prolog
.ancillary_vgpr_index
;
7625 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7626 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7628 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7629 samplemask
= LLVMBuildAnd(
7632 LLVMBuildShl(ctx
->ac
.builder
,
7633 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7636 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7638 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7639 ancillary_vgpr
+ 1, "");
7642 /* Tell LLVM to insert WQM instruction sequence when needed. */
7643 if (key
->ps_prolog
.wqm
) {
7644 LLVMAddTargetDependentFunctionAttr(func
,
7645 "amdgpu-ps-wqm-outputs", "");
7648 si_llvm_build_ret(ctx
, ret
);
7652 * Build the pixel shader epilog function. This handles everything that must be
7653 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7655 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7656 union si_shader_part_key
*key
)
7658 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7659 struct si_function_info fninfo
;
7660 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7662 struct si_ps_exports exp
= {};
7664 si_init_function_info(&fninfo
);
7666 /* Declare input SGPRs. */
7667 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7668 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7669 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7670 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7671 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7673 /* Declare input VGPRs. */
7674 unsigned required_num_params
=
7675 fninfo
.num_sgpr_params
+
7676 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7677 key
->ps_epilog
.writes_z
+
7678 key
->ps_epilog
.writes_stencil
+
7679 key
->ps_epilog
.writes_samplemask
;
7681 required_num_params
= MAX2(required_num_params
,
7682 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7684 while (fninfo
.num_params
< required_num_params
)
7685 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7687 /* Create the function. */
7688 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7689 /* Disable elimination of unused inputs. */
7690 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7691 "InitialPSInputAddr", 0xffffff);
7693 /* Process colors. */
7694 unsigned vgpr
= fninfo
.num_sgpr_params
;
7695 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7696 int last_color_export
= -1;
7698 /* Find the last color export. */
7699 if (!key
->ps_epilog
.writes_z
&&
7700 !key
->ps_epilog
.writes_stencil
&&
7701 !key
->ps_epilog
.writes_samplemask
) {
7702 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7704 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7705 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7706 /* Just set this if any of the colorbuffers are enabled. */
7708 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7709 last_color_export
= 0;
7711 for (i
= 0; i
< 8; i
++)
7712 if (colors_written
& (1 << i
) &&
7713 (spi_format
>> (i
* 4)) & 0xf)
7714 last_color_export
= i
;
7718 while (colors_written
) {
7719 LLVMValueRef color
[4];
7720 int mrt
= u_bit_scan(&colors_written
);
7722 for (i
= 0; i
< 4; i
++)
7723 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7725 si_export_mrt_color(bld_base
, color
, mrt
,
7726 fninfo
.num_params
- 1,
7727 mrt
== last_color_export
, &exp
);
7730 /* Process depth, stencil, samplemask. */
7731 if (key
->ps_epilog
.writes_z
)
7732 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7733 if (key
->ps_epilog
.writes_stencil
)
7734 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7735 if (key
->ps_epilog
.writes_samplemask
)
7736 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7738 if (depth
|| stencil
|| samplemask
)
7739 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7740 else if (last_color_export
== -1)
7741 ac_build_export_null(&ctx
->ac
);
7744 si_emit_ps_exports(ctx
, &exp
);
7747 LLVMBuildRetVoid(ctx
->ac
.builder
);
7751 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7753 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7754 struct ac_llvm_compiler
*compiler
,
7755 struct si_shader
*shader
,
7756 struct pipe_debug_callback
*debug
)
7758 union si_shader_part_key prolog_key
;
7759 union si_shader_part_key epilog_key
;
7761 /* Get the prolog. */
7762 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7764 /* The prolog is a no-op if these aren't set. */
7765 if (si_need_ps_prolog(&prolog_key
)) {
7767 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7768 PIPE_SHADER_FRAGMENT
, true,
7769 &prolog_key
, compiler
, debug
,
7770 si_build_ps_prolog_function
,
7771 "Fragment Shader Prolog");
7772 if (!shader
->prolog
)
7776 /* Get the epilog. */
7777 si_get_ps_epilog_key(shader
, &epilog_key
);
7780 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7781 PIPE_SHADER_FRAGMENT
, false,
7782 &epilog_key
, compiler
, debug
,
7783 si_build_ps_epilog_function
,
7784 "Fragment Shader Epilog");
7785 if (!shader
->epilog
)
7788 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7789 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7790 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7791 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7794 /* Set up the enable bits for per-sample shading if needed. */
7795 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7796 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7797 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7798 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7799 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7800 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7802 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7803 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7804 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7805 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7806 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7807 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7809 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7810 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7811 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7812 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7813 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7814 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7816 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7817 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7818 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7819 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7820 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7821 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7824 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7825 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7826 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7827 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7828 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7831 /* At least one pair of interpolation weights must be enabled. */
7832 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7833 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7834 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7837 /* Samplemask fixup requires the sample ID. */
7838 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7839 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7840 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7843 /* The sample mask input is always enabled, because the API shader always
7844 * passes it through to the epilog. Disable it here if it's unused.
7846 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7847 !shader
->selector
->info
.reads_samplemask
)
7848 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7853 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7856 /* If tessellation is all offchip and on-chip GS isn't used, this
7857 * workaround is not needed.
7861 /* SPI barrier management bug:
7862 * Make sure we have at least 4k of LDS in use to avoid the bug.
7863 * It applies to workgroup sizes of more than one wavefront.
7865 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7866 sscreen
->info
.family
== CHIP_KABINI
)
7867 *lds_size
= MAX2(*lds_size
, 8);
7870 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7871 struct si_shader
*shader
)
7873 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7875 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7877 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7878 si_get_max_workgroup_size(shader
) > 64) {
7879 si_multiwave_lds_size_workaround(sscreen
,
7880 &shader
->config
.lds_size
);
7884 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
7885 struct si_shader
*shader
,
7886 struct pipe_debug_callback
*debug
)
7888 struct si_shader_selector
*sel
= shader
->selector
;
7889 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7892 /* LS, ES, VS are compiled on demand if the main part hasn't been
7893 * compiled for that stage.
7895 * Vertex shaders are compiled on demand when a vertex fetch
7896 * workaround must be applied.
7898 if (shader
->is_monolithic
) {
7899 /* Monolithic shader (compiled as a whole, has many variants,
7900 * may take a long time to compile).
7902 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
7906 /* The shader consists of several parts:
7908 * - the middle part is the user shader, it has 1 variant only
7909 * and it was compiled during the creation of the shader
7911 * - the prolog part is inserted at the beginning
7912 * - the epilog part is inserted at the end
7914 * The prolog and epilog have many (but simple) variants.
7916 * Starting with gfx9, geometry and tessellation control
7917 * shaders also contain the prolog and user shader parts of
7918 * the previous shader stage.
7924 /* Copy the compiled TGSI shader data over. */
7925 shader
->is_binary_shared
= true;
7926 shader
->binary
= mainp
->binary
;
7927 shader
->config
= mainp
->config
;
7928 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7929 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7930 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7931 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7932 memcpy(shader
->info
.vs_output_param_offset
,
7933 mainp
->info
.vs_output_param_offset
,
7934 sizeof(mainp
->info
.vs_output_param_offset
));
7935 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7936 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7937 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7939 /* Select prologs and/or epilogs. */
7940 switch (sel
->type
) {
7941 case PIPE_SHADER_VERTEX
:
7942 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
7945 case PIPE_SHADER_TESS_CTRL
:
7946 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
7949 case PIPE_SHADER_TESS_EVAL
:
7951 case PIPE_SHADER_GEOMETRY
:
7952 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
7955 case PIPE_SHADER_FRAGMENT
:
7956 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
7959 /* Make sure we have at least as many VGPRs as there
7960 * are allocated inputs.
7962 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7963 shader
->info
.num_input_vgprs
);
7967 /* Update SGPR and VGPR counts. */
7968 if (shader
->prolog
) {
7969 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7970 shader
->prolog
->config
.num_sgprs
);
7971 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7972 shader
->prolog
->config
.num_vgprs
);
7974 if (shader
->previous_stage
) {
7975 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7976 shader
->previous_stage
->config
.num_sgprs
);
7977 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7978 shader
->previous_stage
->config
.num_vgprs
);
7979 shader
->config
.spilled_sgprs
=
7980 MAX2(shader
->config
.spilled_sgprs
,
7981 shader
->previous_stage
->config
.spilled_sgprs
);
7982 shader
->config
.spilled_vgprs
=
7983 MAX2(shader
->config
.spilled_vgprs
,
7984 shader
->previous_stage
->config
.spilled_vgprs
);
7985 shader
->info
.private_mem_vgprs
=
7986 MAX2(shader
->info
.private_mem_vgprs
,
7987 shader
->previous_stage
->info
.private_mem_vgprs
);
7988 shader
->config
.scratch_bytes_per_wave
=
7989 MAX2(shader
->config
.scratch_bytes_per_wave
,
7990 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
7991 shader
->info
.uses_instanceid
|=
7992 shader
->previous_stage
->info
.uses_instanceid
;
7994 if (shader
->prolog2
) {
7995 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7996 shader
->prolog2
->config
.num_sgprs
);
7997 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7998 shader
->prolog2
->config
.num_vgprs
);
8000 if (shader
->epilog
) {
8001 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8002 shader
->epilog
->config
.num_sgprs
);
8003 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8004 shader
->epilog
->config
.num_vgprs
);
8006 si_calculate_max_simd_waves(shader
);
8009 si_fix_resource_usage(sscreen
, shader
);
8010 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8014 if (!si_shader_binary_upload(sscreen
, shader
)) {
8015 fprintf(stderr
, "LLVM failed to upload shader\n");
8022 void si_shader_destroy(struct si_shader
*shader
)
8024 if (shader
->scratch_bo
)
8025 si_resource_reference(&shader
->scratch_bo
, NULL
);
8027 si_resource_reference(&shader
->bo
, NULL
);
8029 if (!shader
->is_binary_shared
)
8030 ac_shader_binary_clean(&shader
->binary
);
8032 free(shader
->shader_log
);