2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <llvm/Config/llvm-config.h>
27 #include "util/u_memory.h"
28 #include "util/u_string.h"
29 #include "tgsi/tgsi_build.h"
30 #include "tgsi/tgsi_strings.h"
31 #include "tgsi/tgsi_util.h"
32 #include "tgsi/tgsi_dump.h"
33 #include "tgsi/tgsi_from_mesa.h"
35 #include "ac_binary.h"
36 #include "ac_exp_param.h"
37 #include "ac_shader_util.h"
39 #include "ac_llvm_util.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/nir/nir_serialize.h"
47 static const char scratch_rsrc_dword0_symbol
[] =
48 "SCRATCH_RSRC_DWORD0";
50 static const char scratch_rsrc_dword1_symbol
[] =
51 "SCRATCH_RSRC_DWORD1";
53 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
54 struct si_screen
*sscreen
,
55 struct ac_llvm_compiler
*compiler
,
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 /** Whether the shader runs as a combination of multiple API shaders */
91 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
103 static bool is_merged_shader(struct si_shader_context
*ctx
)
105 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
109 * Returns a unique index for a per-patch semantic name and index. The index
110 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
113 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_TESSOUTER
:
118 case TGSI_SEMANTIC_TESSINNER
:
120 case TGSI_SEMANTIC_PATCH
:
125 assert(!"invalid semantic name");
131 * Returns a unique index for a semantic name and index. The index must be
132 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
135 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
138 switch (semantic_name
) {
139 case TGSI_SEMANTIC_POSITION
:
141 case TGSI_SEMANTIC_GENERIC
:
142 /* Since some shader stages use the the highest used IO index
143 * to determine the size to allocate for inputs/outputs
144 * (in LDS, tess and GS rings). GENERIC should be placed right
145 * after POSITION to make that size as small as possible.
147 if (index
< SI_MAX_IO_GENERIC
)
150 assert(!"invalid generic index");
152 case TGSI_SEMANTIC_FOG
:
153 return SI_MAX_IO_GENERIC
+ 1;
154 case TGSI_SEMANTIC_COLOR
:
156 return SI_MAX_IO_GENERIC
+ 2 + index
;
157 case TGSI_SEMANTIC_BCOLOR
:
159 /* If it's a varying, COLOR and BCOLOR alias. */
161 return SI_MAX_IO_GENERIC
+ 2 + index
;
163 return SI_MAX_IO_GENERIC
+ 4 + index
;
164 case TGSI_SEMANTIC_TEXCOORD
:
166 return SI_MAX_IO_GENERIC
+ 6 + index
;
168 /* These are rarely used between LS and HS or ES and GS. */
169 case TGSI_SEMANTIC_CLIPDIST
:
171 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
172 case TGSI_SEMANTIC_CLIPVERTEX
:
173 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
174 case TGSI_SEMANTIC_PSIZE
:
175 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
177 /* These can't be written by LS, HS, and ES. */
178 case TGSI_SEMANTIC_LAYER
:
179 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
180 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
181 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
182 case TGSI_SEMANTIC_PRIMID
:
183 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
184 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
186 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
187 assert(!"invalid semantic name");
193 * Get the value of a shader input parameter and extract a bitfield.
195 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
196 LLVMValueRef value
, unsigned rshift
,
199 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
200 value
= ac_to_integer(&ctx
->ac
, value
);
203 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
204 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
206 if (rshift
+ bitwidth
< 32) {
207 unsigned mask
= (1 << bitwidth
) - 1;
208 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
209 LLVMConstInt(ctx
->i32
, mask
, 0), "");
215 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
216 struct ac_arg param
, unsigned rshift
,
219 LLVMValueRef value
= ac_get_arg(&ctx
->ac
, param
);
221 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
224 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
227 case PIPE_SHADER_TESS_CTRL
:
228 return si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 0, 8);
230 case PIPE_SHADER_TESS_EVAL
:
231 return ac_get_arg(&ctx
->ac
, ctx
->tes_rel_patch_id
);
239 /* Tessellation shaders pass outputs to the next shader using LDS.
241 * LS outputs = TCS inputs
242 * TCS outputs = TES inputs
245 * - TCS inputs for patch 0
246 * - TCS inputs for patch 1
247 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
249 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
250 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
251 * - TCS outputs for patch 1
252 * - Per-patch TCS outputs for patch 1
253 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
254 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
257 * All three shaders VS(LS), TCS, TES share the same LDS space.
261 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
263 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 8, 13);
266 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
268 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
270 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
271 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
273 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
276 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
278 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
280 return LLVMConstInt(ctx
->i32
, stride
, 0);
283 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
285 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
286 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 0, 13);
288 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
289 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
290 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
291 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
292 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
293 num_patch_outputs
* 4;
294 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
298 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
300 return LLVMBuildMul(ctx
->ac
.builder
,
301 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 0, 16),
302 LLVMConstInt(ctx
->i32
, 4, 0), "");
306 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
308 return LLVMBuildMul(ctx
->ac
.builder
,
309 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 16, 16),
310 LLVMConstInt(ctx
->i32
, 4, 0), "");
314 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
316 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
317 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
319 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
323 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
325 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
326 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
327 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
329 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
333 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
335 LLVMValueRef patch0_patch_data_offset
=
336 get_tcs_out_patch0_patch_data_offset(ctx
);
337 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
338 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
340 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
343 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
345 unsigned tcs_out_vertices
=
346 ctx
->shader
->selector
?
347 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
349 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
350 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
351 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
353 return si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 6, 6);
356 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
361 case PIPE_SHADER_VERTEX
:
362 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
363 return LLVMConstInt(ctx
->i32
, stride
, 0);
365 case PIPE_SHADER_TESS_CTRL
:
366 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
367 ctx
->shader
->is_monolithic
) {
368 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
369 return LLVMConstInt(ctx
->i32
, stride
, 0);
371 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 24, 8);
379 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
380 LLVMValueRef i32
, unsigned index
)
385 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
386 LLVMConstInt(ctx
->i32
, 16, 0), "");
388 return LLVMBuildSExt(ctx
->ac
.builder
,
389 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
394 void si_llvm_load_input_vs(
395 struct si_shader_context
*ctx
,
396 unsigned input_index
,
399 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
400 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
402 if (vs_blit_property
) {
403 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
404 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
405 LLVMIntULE
, vertex_id
,
407 /* Use LLVMIntNE, because we have 3 vertices and only
408 * the middle one should use y2.
410 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
411 LLVMIntNE
, vertex_id
,
414 unsigned param_vs_blit_inputs
= ctx
->vs_blit_inputs
.arg_index
;
415 if (input_index
== 0) {
417 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
418 param_vs_blit_inputs
);
419 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
420 param_vs_blit_inputs
+ 1);
422 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
423 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
424 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
425 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
427 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
429 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
432 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
433 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
434 out
[2] = LLVMGetParam(ctx
->main_fn
,
435 param_vs_blit_inputs
+ 2);
436 out
[3] = ctx
->ac
.f32_1
;
440 /* Color or texture coordinates: */
441 assert(input_index
== 1);
443 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
444 for (int i
= 0; i
< 4; i
++) {
445 out
[i
] = LLVMGetParam(ctx
->main_fn
,
446 param_vs_blit_inputs
+ 3 + i
);
449 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
450 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
451 param_vs_blit_inputs
+ 3);
452 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
453 param_vs_blit_inputs
+ 4);
454 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
455 param_vs_blit_inputs
+ 5);
456 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
457 param_vs_blit_inputs
+ 6);
459 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
461 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
463 out
[2] = LLVMGetParam(ctx
->main_fn
,
464 param_vs_blit_inputs
+ 7);
465 out
[3] = LLVMGetParam(ctx
->main_fn
,
466 param_vs_blit_inputs
+ 8);
471 union si_vs_fix_fetch fix_fetch
;
472 LLVMValueRef t_list_ptr
;
473 LLVMValueRef t_offset
;
475 LLVMValueRef vertex_index
;
478 /* Load the T list */
479 t_list_ptr
= ac_get_arg(&ctx
->ac
, ctx
->vertex_buffers
);
481 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
483 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
485 vertex_index
= LLVMGetParam(ctx
->main_fn
,
486 ctx
->vertex_index0
.arg_index
+
489 /* Use the open-coded implementation for all loads of doubles and
490 * of dword-sized data that needs fixups. We need to insert conversion
491 * code anyway, and the amd/common code does it for us.
493 * Note: On LLVM <= 8, we can only open-code formats with
494 * channel size >= 4 bytes.
496 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
497 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
499 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
500 (fix_fetch
.u
.log_size
== 2)) {
501 tmp
= ac_build_opencoded_load_format(
502 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
503 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
504 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
505 for (unsigned i
= 0; i
< 4; ++i
)
506 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
510 /* Do multiple loads for special formats. */
511 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
512 LLVMValueRef fetches
[4];
513 unsigned num_fetches
;
514 unsigned fetch_stride
;
515 unsigned channels_per_fetch
;
517 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
518 num_fetches
= MIN2(required_channels
, 3);
519 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
520 channels_per_fetch
= 1;
524 channels_per_fetch
= required_channels
;
527 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
528 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
529 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
530 channels_per_fetch
, 0, true);
533 if (num_fetches
== 1 && channels_per_fetch
> 1) {
534 LLVMValueRef fetch
= fetches
[0];
535 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
536 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
537 fetches
[i
] = LLVMBuildExtractElement(
538 ctx
->ac
.builder
, fetch
, tmp
, "");
540 num_fetches
= channels_per_fetch
;
541 channels_per_fetch
= 1;
544 for (unsigned i
= num_fetches
; i
< 4; ++i
)
545 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
547 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
548 required_channels
== 4) {
549 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
550 fetches
[3] = ctx
->ac
.i32_1
;
552 fetches
[3] = ctx
->ac
.f32_1
;
553 } else if (fix_fetch
.u
.log_size
== 3 &&
554 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
555 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
556 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
557 required_channels
== 4) {
558 /* For 2_10_10_10, the hardware returns an unsigned value;
559 * convert it to a signed one.
561 LLVMValueRef tmp
= fetches
[3];
562 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
564 /* First, recover the sign-extended signed integer value. */
565 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
566 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
568 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
570 /* For the integer-like cases, do a natural sign extension.
572 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
573 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
576 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
577 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
578 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
579 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
581 /* Convert back to the right type. */
582 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
584 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
585 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
586 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
587 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
588 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
589 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
595 for (unsigned i
= 0; i
< 4; ++i
)
596 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
599 static void declare_input_vs(
600 struct si_shader_context
*ctx
,
601 unsigned input_index
,
602 const struct tgsi_full_declaration
*decl
,
605 si_llvm_load_input_vs(ctx
, input_index
, out
);
608 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
615 case PIPE_SHADER_VERTEX
:
616 return ac_get_arg(&ctx
->ac
, ctx
->vs_prim_id
);
617 case PIPE_SHADER_TESS_CTRL
:
618 return ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
);
619 case PIPE_SHADER_TESS_EVAL
:
620 return ac_get_arg(&ctx
->ac
, ctx
->args
.tes_patch_id
);
621 case PIPE_SHADER_GEOMETRY
:
622 return ac_get_arg(&ctx
->ac
, ctx
->args
.gs_prim_id
);
630 * Return the value of tgsi_ind_register for indexing.
631 * This is the indirect index with the constant offset added to it.
633 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
634 const struct tgsi_ind_register
*ind
,
640 if (ind
->File
== TGSI_FILE_ADDRESS
) {
641 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
642 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
644 struct tgsi_full_src_register src
= {};
646 src
.Register
.File
= ind
->File
;
647 src
.Register
.Index
= ind
->Index
;
649 /* Set the second index to 0 for constants. */
650 if (ind
->File
== TGSI_FILE_CONSTANT
)
651 src
.Register
.Dimension
= 1;
653 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
656 result
= ac_to_integer(&ctx
->ac
, result
);
659 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
660 LLVMConstInt(ctx
->i32
, rel_index
, 0));
664 * Like si_get_indirect_index, but restricts the return value to a (possibly
665 * undefined) value inside [0..num).
667 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
668 const struct tgsi_ind_register
*ind
,
669 int rel_index
, unsigned num
)
671 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
673 return si_llvm_bound_index(ctx
, result
, num
);
676 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
677 LLVMValueRef vertex_dw_stride
,
678 LLVMValueRef base_addr
,
679 LLVMValueRef vertex_index
,
680 LLVMValueRef param_index
,
681 ubyte name
, ubyte index
)
683 if (vertex_dw_stride
) {
684 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
685 vertex_dw_stride
, base_addr
);
689 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
690 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
693 int param
= name
== TGSI_SEMANTIC_PATCH
||
694 name
== TGSI_SEMANTIC_TESSINNER
||
695 name
== TGSI_SEMANTIC_TESSOUTER
?
696 si_shader_io_get_unique_index_patch(name
, index
) :
697 si_shader_io_get_unique_index(name
, index
, false);
699 /* Add the base address of the element. */
700 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
701 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
705 * Calculate a dword address given an input or output register and a stride.
707 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
708 const struct tgsi_full_dst_register
*dst
,
709 const struct tgsi_full_src_register
*src
,
710 LLVMValueRef vertex_dw_stride
,
711 LLVMValueRef base_addr
)
713 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
714 ubyte
*name
, *index
, *array_first
;
716 struct tgsi_full_dst_register reg
;
717 LLVMValueRef vertex_index
= NULL
;
718 LLVMValueRef ind_index
= NULL
;
720 /* Set the register description. The address computation is the same
721 * for sources and destinations. */
723 reg
.Register
.File
= src
->Register
.File
;
724 reg
.Register
.Index
= src
->Register
.Index
;
725 reg
.Register
.Indirect
= src
->Register
.Indirect
;
726 reg
.Register
.Dimension
= src
->Register
.Dimension
;
727 reg
.Indirect
= src
->Indirect
;
728 reg
.Dimension
= src
->Dimension
;
729 reg
.DimIndirect
= src
->DimIndirect
;
733 /* If the register is 2-dimensional (e.g. an array of vertices
734 * in a primitive), calculate the base address of the vertex. */
735 if (reg
.Register
.Dimension
) {
736 if (reg
.Dimension
.Indirect
)
737 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
738 1, reg
.Dimension
.Index
);
740 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
743 /* Get information about the register. */
744 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
745 name
= info
->input_semantic_name
;
746 index
= info
->input_semantic_index
;
747 array_first
= info
->input_array_first
;
748 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
749 name
= info
->output_semantic_name
;
750 index
= info
->output_semantic_index
;
751 array_first
= info
->output_array_first
;
757 if (reg
.Register
.Indirect
) {
758 /* Add the relative address of the element. */
759 if (reg
.Indirect
.ArrayID
)
760 input_index
= array_first
[reg
.Indirect
.ArrayID
];
762 input_index
= reg
.Register
.Index
;
764 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
765 1, reg
.Register
.Index
- input_index
);
767 input_index
= reg
.Register
.Index
;
770 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
771 base_addr
, vertex_index
,
772 ind_index
, name
[input_index
],
776 /* The offchip buffer layout for TCS->TES is
778 * - attribute 0 of patch 0 vertex 0
779 * - attribute 0 of patch 0 vertex 1
780 * - attribute 0 of patch 0 vertex 2
782 * - attribute 0 of patch 1 vertex 0
783 * - attribute 0 of patch 1 vertex 1
785 * - attribute 1 of patch 0 vertex 0
786 * - attribute 1 of patch 0 vertex 1
788 * - per patch attribute 0 of patch 0
789 * - per patch attribute 0 of patch 1
792 * Note that every attribute has 4 components.
794 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
795 LLVMValueRef rel_patch_id
,
796 LLVMValueRef vertex_index
,
797 LLVMValueRef param_index
)
799 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
800 LLVMValueRef param_stride
, constant16
;
802 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
803 num_patches
= si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 6);
804 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
807 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
809 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
810 vertices_per_patch
, vertex_index
);
811 param_stride
= total_vertices
;
813 base_addr
= rel_patch_id
;
814 param_stride
= num_patches
;
817 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
818 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
821 LLVMValueRef patch_data_offset
=
822 si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 12, 20);
824 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
825 patch_data_offset
, "");
830 /* This is a generic helper that can be shared by the NIR and TGSI backends */
831 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
832 struct si_shader_context
*ctx
,
833 LLVMValueRef vertex_index
,
834 LLVMValueRef param_index
,
835 ubyte name
, ubyte index
)
837 unsigned param_index_base
;
839 param_index_base
= name
== TGSI_SEMANTIC_PATCH
||
840 name
== TGSI_SEMANTIC_TESSINNER
||
841 name
== TGSI_SEMANTIC_TESSOUTER
?
842 si_shader_io_get_unique_index_patch(name
, index
) :
843 si_shader_io_get_unique_index(name
, index
, false);
846 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
847 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
850 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
853 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
854 vertex_index
, param_index
);
857 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
858 struct si_shader_context
*ctx
,
859 const struct tgsi_full_dst_register
*dst
,
860 const struct tgsi_full_src_register
*src
)
862 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
863 ubyte
*name
, *index
, *array_first
;
864 struct tgsi_full_src_register reg
;
865 LLVMValueRef vertex_index
= NULL
;
866 LLVMValueRef param_index
= NULL
;
869 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
871 if (reg
.Register
.Dimension
) {
872 if (reg
.Dimension
.Indirect
)
873 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
874 1, reg
.Dimension
.Index
);
876 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
879 /* Get information about the register. */
880 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
881 name
= info
->input_semantic_name
;
882 index
= info
->input_semantic_index
;
883 array_first
= info
->input_array_first
;
884 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
885 name
= info
->output_semantic_name
;
886 index
= info
->output_semantic_index
;
887 array_first
= info
->output_array_first
;
893 if (reg
.Register
.Indirect
) {
894 if (reg
.Indirect
.ArrayID
)
895 param_base
= array_first
[reg
.Indirect
.ArrayID
];
897 param_base
= reg
.Register
.Index
;
899 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
900 1, reg
.Register
.Index
- param_base
);
902 param_base
= reg
.Register
.Index
;
905 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
906 param_index
, name
[param_base
],
910 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
911 LLVMTypeRef type
, unsigned swizzle
,
912 LLVMValueRef buffer
, LLVMValueRef offset
,
913 LLVMValueRef base
, bool can_speculate
)
915 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
916 LLVMValueRef value
, value2
;
917 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
920 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
921 0, ac_glc
, can_speculate
, false);
923 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
926 if (!llvm_type_is_64bit(ctx
, type
)) {
927 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
928 0, ac_glc
, can_speculate
, false);
930 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
931 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
932 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
935 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
936 swizzle
* 4, ac_glc
, can_speculate
, false);
938 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
939 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
941 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
945 * Load from LSHS LDS storage.
947 * \param type output value type
948 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
949 * \param dw_addr address in dwords
951 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
952 LLVMTypeRef type
, unsigned swizzle
,
953 LLVMValueRef dw_addr
)
955 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
959 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
961 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
962 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
964 return ac_build_gather_values(&ctx
->ac
, values
,
968 /* Split 64-bit loads. */
969 if (llvm_type_is_64bit(ctx
, type
)) {
972 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
973 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
974 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
977 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
978 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
980 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
982 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
986 * Store to LSHS LDS storage.
988 * \param swizzle offset (typically 0..3)
989 * \param dw_addr address in dwords
990 * \param value value to store
992 static void lshs_lds_store(struct si_shader_context
*ctx
,
993 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
996 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
997 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
999 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1004 TESS_OFFCHIP_RING_TCS
,
1005 TESS_OFFCHIP_RING_TES
,
1008 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1009 enum si_tess_ring ring
)
1011 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1012 LLVMValueRef addr
= ac_get_arg(&ctx
->ac
,
1013 ring
== TESS_OFFCHIP_RING_TES
?
1014 ctx
->tes_offchip_addr
:
1015 ctx
->tcs_out_lds_layout
);
1017 /* TCS only receives high 13 bits of the address. */
1018 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1019 addr
= LLVMBuildAnd(builder
, addr
,
1020 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1023 if (ring
== TCS_FACTOR_RING
) {
1024 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1025 addr
= LLVMBuildAdd(builder
, addr
,
1026 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1029 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1030 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1031 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1032 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1034 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1035 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1036 S_008F0C_OOB_SELECT(3) |
1037 S_008F0C_RESOURCE_LEVEL(1);
1039 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1040 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1042 LLVMValueRef desc
[4];
1044 desc
[1] = LLVMConstInt(ctx
->i32
,
1045 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1046 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1047 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1049 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1052 static LLVMValueRef
fetch_input_tcs(
1053 struct lp_build_tgsi_context
*bld_base
,
1054 const struct tgsi_full_src_register
*reg
,
1055 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1057 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1058 LLVMValueRef dw_addr
, stride
;
1059 unsigned swizzle
= swizzle_in
& 0xffff;
1060 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1061 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1062 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1064 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1067 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1069 LLVMValueRef vertex_index
,
1070 LLVMValueRef param_index
,
1071 unsigned const_index
,
1073 unsigned driver_location
,
1075 unsigned num_components
,
1080 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1081 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1082 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1083 LLVMValueRef dw_addr
, stride
;
1085 driver_location
= driver_location
/ 4;
1088 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1089 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1093 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1095 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1096 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1101 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1107 name
= info
->input_semantic_name
[driver_location
];
1108 index
= info
->input_semantic_index
[driver_location
];
1110 name
= info
->output_semantic_name
[driver_location
];
1111 index
= info
->output_semantic_index
[driver_location
];
1114 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1115 vertex_index
, param_index
,
1118 LLVMValueRef value
[4];
1119 for (unsigned i
= 0; i
< num_components
; i
++) {
1120 unsigned offset
= i
;
1121 if (llvm_type_is_64bit(ctx
, type
))
1124 offset
+= component
;
1125 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1128 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1131 static LLVMValueRef
fetch_output_tcs(
1132 struct lp_build_tgsi_context
*bld_base
,
1133 const struct tgsi_full_src_register
*reg
,
1134 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1136 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1137 LLVMValueRef dw_addr
, stride
;
1138 unsigned swizzle
= (swizzle_in
& 0xffff);
1140 if (reg
->Register
.Dimension
) {
1141 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1142 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1143 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1145 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1146 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1149 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1152 static LLVMValueRef
fetch_input_tes(
1153 struct lp_build_tgsi_context
*bld_base
,
1154 const struct tgsi_full_src_register
*reg
,
1155 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1157 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1158 LLVMValueRef base
, addr
;
1159 unsigned swizzle
= (swizzle_in
& 0xffff);
1161 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1162 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1164 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1165 ctx
->tess_offchip_ring
, base
, addr
, true);
1168 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1170 LLVMValueRef vertex_index
,
1171 LLVMValueRef param_index
,
1172 unsigned const_index
,
1174 unsigned driver_location
,
1176 unsigned num_components
,
1181 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1182 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1183 LLVMValueRef base
, addr
;
1185 driver_location
= driver_location
/ 4;
1186 ubyte name
= info
->input_semantic_name
[driver_location
];
1187 ubyte index
= info
->input_semantic_index
[driver_location
];
1189 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1192 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1195 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1199 /* TODO: This will generate rather ordinary llvm code, although it
1200 * should be easy for the optimiser to fix up. In future we might want
1201 * to refactor buffer_load(), but for now this maximises code sharing
1202 * between the NIR and TGSI backends.
1204 LLVMValueRef value
[4];
1205 for (unsigned i
= 0; i
< num_components
; i
++) {
1206 unsigned offset
= i
;
1207 if (llvm_type_is_64bit(ctx
, type
)) {
1210 ubyte name
= info
->input_semantic_name
[driver_location
+ 1];
1211 ubyte index
= info
->input_semantic_index
[driver_location
+ 1];
1212 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1218 offset
= offset
% 4;
1221 offset
+= component
;
1222 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1223 ctx
->tess_offchip_ring
, base
, addr
, true);
1226 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1229 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1230 const struct tgsi_full_instruction
*inst
,
1231 const struct tgsi_opcode_info
*info
,
1233 LLVMValueRef dst
[4])
1235 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1236 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1237 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1238 unsigned chan_index
;
1239 LLVMValueRef dw_addr
, stride
;
1240 LLVMValueRef buffer
, base
, buf_addr
;
1241 LLVMValueRef values
[4];
1242 bool skip_lds_store
;
1243 bool is_tess_factor
= false, is_tess_inner
= false;
1245 /* Only handle per-patch and per-vertex outputs here.
1246 * Vectors will be lowered to scalars and this function will be called again.
1248 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1249 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1250 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1254 if (reg
->Register
.Dimension
) {
1255 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1256 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1257 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1258 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1260 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1261 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1262 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1264 if (!reg
->Register
.Indirect
) {
1265 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1267 /* Always write tess factors into LDS for the TCS epilog. */
1268 if (name
== TGSI_SEMANTIC_TESSINNER
||
1269 name
== TGSI_SEMANTIC_TESSOUTER
) {
1270 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1271 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1272 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1273 is_tess_factor
= true;
1274 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1279 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1281 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1282 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1284 uint32_t writemask
= reg
->Register
.WriteMask
;
1286 chan_index
= u_bit_scan(&writemask
);
1287 LLVMValueRef value
= dst
[chan_index
];
1289 if (inst
->Instruction
.Saturate
)
1290 value
= ac_build_clamp(&ctx
->ac
, value
);
1292 /* Skip LDS stores if there is no LDS read of this output. */
1293 if (!skip_lds_store
)
1294 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1296 value
= ac_to_integer(&ctx
->ac
, value
);
1297 values
[chan_index
] = value
;
1299 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1300 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1302 4 * chan_index
, ac_glc
);
1305 /* Write tess factors into VGPRs for the epilog. */
1306 if (is_tess_factor
&&
1307 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1308 if (!is_tess_inner
) {
1309 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1310 ctx
->invoc0_tess_factors
[chan_index
]);
1311 } else if (chan_index
< 2) {
1312 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1313 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1318 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1319 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1321 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1326 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1327 const struct nir_variable
*var
,
1328 LLVMValueRef vertex_index
,
1329 LLVMValueRef param_index
,
1330 unsigned const_index
,
1334 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1335 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1336 const unsigned component
= var
->data
.location_frac
;
1337 const bool is_patch
= var
->data
.patch
;
1338 unsigned driver_location
= var
->data
.driver_location
;
1339 LLVMValueRef dw_addr
, stride
;
1340 LLVMValueRef buffer
, base
, addr
;
1341 LLVMValueRef values
[8];
1342 bool skip_lds_store
;
1343 bool is_tess_factor
= false, is_tess_inner
= false;
1345 driver_location
= driver_location
/ 4;
1346 ubyte name
= info
->output_semantic_name
[driver_location
];
1347 ubyte index
= info
->output_semantic_index
[driver_location
];
1349 bool is_const
= !param_index
;
1351 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1354 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1355 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1356 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1357 vertex_index
, param_index
,
1360 skip_lds_store
= !info
->reads_pervertex_outputs
;
1362 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1363 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1364 vertex_index
, param_index
,
1367 skip_lds_store
= !info
->reads_perpatch_outputs
;
1369 if (is_const
&& const_index
== 0) {
1370 int name
= info
->output_semantic_name
[driver_location
];
1372 /* Always write tess factors into LDS for the TCS epilog. */
1373 if (name
== TGSI_SEMANTIC_TESSINNER
||
1374 name
== TGSI_SEMANTIC_TESSOUTER
) {
1375 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1376 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1377 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1378 is_tess_factor
= true;
1379 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1384 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1386 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1388 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1389 param_index
, name
, index
);
1391 for (unsigned chan
= 0; chan
< 8; chan
++) {
1392 if (!(writemask
& (1 << chan
)))
1394 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1396 unsigned buffer_store_offset
= chan
% 4;
1398 ubyte name
= info
->output_semantic_name
[driver_location
+ 1];
1399 ubyte index
= info
->output_semantic_index
[driver_location
+ 1];
1400 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1406 /* Skip LDS stores if there is no LDS read of this output. */
1407 if (!skip_lds_store
)
1408 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1410 value
= ac_to_integer(&ctx
->ac
, value
);
1411 values
[chan
] = value
;
1413 if (writemask
!= 0xF && !is_tess_factor
) {
1414 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1416 4 * buffer_store_offset
,
1420 /* Write tess factors into VGPRs for the epilog. */
1421 if (is_tess_factor
&&
1422 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1423 if (!is_tess_inner
) {
1424 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1425 ctx
->invoc0_tess_factors
[chan
]);
1426 } else if (chan
< 2) {
1427 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1428 ctx
->invoc0_tess_factors
[4 + chan
]);
1433 if (writemask
== 0xF && !is_tess_factor
) {
1434 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1436 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1441 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1442 unsigned input_index
,
1443 unsigned vtx_offset_param
,
1447 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1448 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1449 struct si_shader
*shader
= ctx
->shader
;
1450 LLVMValueRef vtx_offset
, soffset
;
1451 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1452 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1453 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1457 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1459 /* GFX9 has the ESGS ring in LDS. */
1460 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1461 unsigned index
= vtx_offset_param
;
1463 switch (index
/ 2) {
1465 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx01_offset
,
1466 index
% 2 ? 16 : 0, 16);
1469 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx23_offset
,
1470 index
% 2 ? 16 : 0, 16);
1473 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx45_offset
,
1474 index
% 2 ? 16 : 0, 16);
1481 unsigned offset
= param
* 4 + swizzle
;
1482 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1483 LLVMConstInt(ctx
->i32
, offset
, false), "");
1485 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1486 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1487 if (llvm_type_is_64bit(ctx
, type
)) {
1488 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1489 &ctx
->ac
.i32_1
, 1, "");
1490 LLVMValueRef values
[2] = {
1492 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1494 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1496 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1499 /* GFX6: input load from the ESGS ring in memory. */
1500 if (swizzle
== ~0) {
1501 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1503 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1504 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1507 return ac_build_gather_values(&ctx
->ac
, values
,
1511 /* Get the vertex offset parameter on GFX6. */
1512 LLVMValueRef gs_vtx_offset
= ac_get_arg(&ctx
->ac
,
1513 ctx
->gs_vtx_offset
[vtx_offset_param
]);
1515 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1516 LLVMConstInt(ctx
->i32
, 4, 0), "");
1518 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1520 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1521 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1522 if (llvm_type_is_64bit(ctx
, type
)) {
1523 LLVMValueRef value2
;
1524 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1526 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1527 ctx
->i32_0
, vtx_offset
, soffset
,
1528 0, ac_glc
, true, false);
1529 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1531 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1534 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1536 unsigned driver_location
,
1538 unsigned num_components
,
1539 unsigned vertex_index
,
1540 unsigned const_index
,
1543 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1545 LLVMValueRef value
[4];
1546 for (unsigned i
= 0; i
< num_components
; i
++) {
1547 unsigned offset
= i
;
1548 if (llvm_type_is_64bit(ctx
, type
))
1551 offset
+= component
;
1552 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1553 vertex_index
, type
, offset
);
1556 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1559 static LLVMValueRef
fetch_input_gs(
1560 struct lp_build_tgsi_context
*bld_base
,
1561 const struct tgsi_full_src_register
*reg
,
1562 enum tgsi_opcode_type type
,
1563 unsigned swizzle_in
)
1565 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1566 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1567 unsigned swizzle
= swizzle_in
& 0xffff;
1569 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1570 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1571 return si_get_primitive_id(ctx
, swizzle
);
1573 if (!reg
->Register
.Dimension
)
1576 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1577 reg
->Dimension
.Index
,
1578 tgsi2llvmtype(bld_base
, type
),
1582 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1584 switch (interpolate
) {
1585 case TGSI_INTERPOLATE_CONSTANT
:
1588 case TGSI_INTERPOLATE_LINEAR
:
1589 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1590 return SI_PARAM_LINEAR_SAMPLE
;
1591 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1592 return SI_PARAM_LINEAR_CENTROID
;
1594 return SI_PARAM_LINEAR_CENTER
;
1596 case TGSI_INTERPOLATE_COLOR
:
1597 case TGSI_INTERPOLATE_PERSPECTIVE
:
1598 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1599 return SI_PARAM_PERSP_SAMPLE
;
1600 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1601 return SI_PARAM_PERSP_CENTROID
;
1603 return SI_PARAM_PERSP_CENTER
;
1606 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1611 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1612 unsigned attr_index
, unsigned chan
,
1613 LLVMValueRef prim_mask
,
1614 LLVMValueRef i
, LLVMValueRef j
)
1617 return ac_build_fs_interp(&ctx
->ac
,
1618 LLVMConstInt(ctx
->i32
, chan
, 0),
1619 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1622 return ac_build_fs_interp_mov(&ctx
->ac
,
1623 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1624 LLVMConstInt(ctx
->i32
, chan
, 0),
1625 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1630 * Interpolate a fragment shader input.
1632 * @param ctx context
1633 * @param input_index index of the input in hardware
1634 * @param semantic_name TGSI_SEMANTIC_*
1635 * @param semantic_index semantic index
1636 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1637 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1638 * @param interp_param interpolation weights (i,j)
1639 * @param prim_mask SI_PARAM_PRIM_MASK
1640 * @param face SI_PARAM_FRONT_FACE
1641 * @param result the return value (4 components)
1643 static void interp_fs_input(struct si_shader_context
*ctx
,
1644 unsigned input_index
,
1645 unsigned semantic_name
,
1646 unsigned semantic_index
,
1647 unsigned num_interp_inputs
,
1648 unsigned colors_read_mask
,
1649 LLVMValueRef interp_param
,
1650 LLVMValueRef prim_mask
,
1652 LLVMValueRef result
[4])
1654 LLVMValueRef i
= NULL
, j
= NULL
;
1657 /* fs.constant returns the param from the middle vertex, so it's not
1658 * really useful for flat shading. It's meant to be used for custom
1659 * interpolation (but the intrinsic can't fetch from the other two
1662 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1663 * to do the right thing. The only reason we use fs.constant is that
1664 * fs.interp cannot be used on integers, because they can be equal
1667 * When interp is false we will use fs.constant or for newer llvm,
1668 * amdgcn.interp.mov.
1670 bool interp
= interp_param
!= NULL
;
1673 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1674 LLVMVectorType(ctx
->f32
, 2), "");
1676 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1678 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1682 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1683 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1684 LLVMValueRef is_face_positive
;
1686 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1687 * otherwise it's at offset "num_inputs".
1689 unsigned back_attr_offset
= num_interp_inputs
;
1690 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1691 back_attr_offset
+= 1;
1693 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1694 face
, ctx
->i32_0
, "");
1696 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1697 LLVMValueRef front
, back
;
1699 front
= si_build_fs_interp(ctx
,
1702 back
= si_build_fs_interp(ctx
,
1703 back_attr_offset
, chan
,
1706 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1712 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1713 result
[0] = si_build_fs_interp(ctx
, input_index
,
1714 0, prim_mask
, i
, j
);
1716 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1717 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1719 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1720 result
[chan
] = si_build_fs_interp(ctx
,
1727 void si_llvm_load_input_fs(
1728 struct si_shader_context
*ctx
,
1729 unsigned input_index
,
1730 LLVMValueRef out
[4])
1732 struct si_shader
*shader
= ctx
->shader
;
1733 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1734 LLVMValueRef main_fn
= ctx
->main_fn
;
1735 LLVMValueRef interp_param
= NULL
;
1736 int interp_param_idx
;
1737 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1738 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1739 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1740 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1742 /* Get colors from input VGPRs (set by the prolog). */
1743 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1744 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1745 unsigned mask
= colors_read
>> (semantic_index
* 4);
1746 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1747 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1748 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1750 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1751 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1752 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1753 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1757 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1758 if (interp_param_idx
== -1)
1760 else if (interp_param_idx
) {
1761 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1764 interp_fs_input(ctx
, input_index
, semantic_name
,
1765 semantic_index
, 0, /* this param is unused */
1766 shader
->selector
->info
.colors_read
, interp_param
,
1767 ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
),
1768 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1772 static void declare_input_fs(
1773 struct si_shader_context
*ctx
,
1774 unsigned input_index
,
1775 const struct tgsi_full_declaration
*decl
,
1776 LLVMValueRef out
[4])
1778 si_llvm_load_input_fs(ctx
, input_index
, out
);
1781 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1783 return si_unpack_param(ctx
, ctx
->args
.ancillary
, 8, 4);
1786 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1788 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1790 /* For non-indexed draws, the base vertex set by the driver
1791 * (for direct draws) or the CP (for indirect draws) is the
1792 * first vertex ID, but GLSL expects 0 to be returned.
1794 LLVMValueRef vs_state
= ac_get_arg(&ctx
->ac
,
1795 ctx
->vs_state_bits
);
1796 LLVMValueRef indexed
;
1798 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1799 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1801 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1802 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
),
1806 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1808 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1810 LLVMValueRef values
[3];
1811 LLVMValueRef result
;
1813 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1815 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1816 unsigned sizes
[3] = {
1817 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1818 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1819 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1822 for (i
= 0; i
< 3; ++i
)
1823 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1825 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1827 result
= ac_get_arg(&ctx
->ac
, ctx
->block_size
);
1834 * Load a dword from a constant buffer.
1836 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1837 LLVMValueRef resource
,
1838 LLVMValueRef offset
)
1840 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1844 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1846 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1847 LLVMValueRef desc
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1848 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1849 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1851 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1852 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1853 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1855 LLVMValueRef pos
[4] = {
1856 buffer_load_const(ctx
, resource
, offset0
),
1857 buffer_load_const(ctx
, resource
, offset1
),
1858 LLVMConstReal(ctx
->f32
, 0),
1859 LLVMConstReal(ctx
->f32
, 0)
1862 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1865 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1867 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1868 return ac_to_integer(&ctx
->ac
, ac_get_arg(&ctx
->ac
, ctx
->args
.sample_coverage
));
1871 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1873 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1874 LLVMValueRef coord
[4] = {
1875 ac_get_arg(&ctx
->ac
, ctx
->tes_u
),
1876 ac_get_arg(&ctx
->ac
, ctx
->tes_v
),
1881 /* For triangles, the vector should be (u, v, 1-u-v). */
1882 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1883 PIPE_PRIM_TRIANGLES
) {
1884 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1885 LLVMBuildFAdd(ctx
->ac
.builder
,
1886 coord
[0], coord
[1], ""), "");
1888 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1891 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1892 unsigned semantic_name
)
1894 LLVMValueRef base
, addr
;
1896 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1898 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1899 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1900 LLVMConstInt(ctx
->i32
, param
, 0));
1902 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1903 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1907 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1908 unsigned semantic_name
)
1910 LLVMValueRef buf
, slot
, val
[4];
1913 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1914 buf
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1915 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1916 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1918 for (i
= 0; i
< 4; i
++)
1919 val
[i
] = buffer_load_const(ctx
, buf
,
1920 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1921 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1924 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1925 unsigned varying_id
,
1926 bool load_default_state
)
1928 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1929 unsigned semantic_name
;
1931 if (load_default_state
) {
1932 switch (varying_id
) {
1933 case VARYING_SLOT_TESS_LEVEL_INNER
:
1934 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1936 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1937 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
1940 unreachable("unknown tess level");
1942 return load_tess_level_default(ctx
, semantic_name
);
1945 switch (varying_id
) {
1946 case VARYING_SLOT_TESS_LEVEL_INNER
:
1947 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1949 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1950 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1953 unreachable("unknown tess level");
1956 return load_tess_level(ctx
, semantic_name
);
1960 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1962 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1963 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1964 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 13, 6);
1965 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1966 return get_num_tcs_out_vertices(ctx
);
1968 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1971 void si_load_system_value(struct si_shader_context
*ctx
,
1973 const struct tgsi_full_declaration
*decl
)
1975 LLVMValueRef value
= 0;
1977 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1979 switch (decl
->Semantic
.Name
) {
1980 case TGSI_SEMANTIC_INSTANCEID
:
1981 value
= ctx
->abi
.instance_id
;
1984 case TGSI_SEMANTIC_VERTEXID
:
1985 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1987 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
), "");
1990 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1991 /* Unused. Clarify the meaning in indexed vs. non-indexed
1992 * draws if this is ever used again. */
1996 case TGSI_SEMANTIC_BASEVERTEX
:
1997 value
= get_base_vertex(&ctx
->abi
);
2000 case TGSI_SEMANTIC_BASEINSTANCE
:
2001 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.start_instance
);
2004 case TGSI_SEMANTIC_DRAWID
:
2005 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.draw_id
);
2008 case TGSI_SEMANTIC_INVOCATIONID
:
2009 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2010 value
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
2011 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2012 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2013 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2014 ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
),
2015 LLVMConstInt(ctx
->i32
, 127, 0), "");
2017 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
);
2020 assert(!"INVOCATIONID not implemented");
2024 case TGSI_SEMANTIC_POSITION
:
2026 LLVMValueRef pos
[4] = {
2027 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2028 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2029 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2030 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2031 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2033 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2037 case TGSI_SEMANTIC_FACE
:
2038 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.front_face
);
2041 case TGSI_SEMANTIC_SAMPLEID
:
2042 value
= si_get_sample_id(ctx
);
2045 case TGSI_SEMANTIC_SAMPLEPOS
: {
2046 LLVMValueRef pos
[4] = {
2047 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2048 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2049 LLVMConstReal(ctx
->f32
, 0),
2050 LLVMConstReal(ctx
->f32
, 0)
2052 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2053 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2054 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2058 case TGSI_SEMANTIC_SAMPLEMASK
:
2059 /* This can only occur with the OpenGL Core profile, which
2060 * doesn't support smoothing.
2062 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2065 case TGSI_SEMANTIC_TESSCOORD
:
2066 value
= si_load_tess_coord(&ctx
->abi
);
2069 case TGSI_SEMANTIC_VERTICESIN
:
2070 value
= si_load_patch_vertices_in(&ctx
->abi
);
2073 case TGSI_SEMANTIC_TESSINNER
:
2074 case TGSI_SEMANTIC_TESSOUTER
:
2075 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2078 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2079 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2080 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2083 case TGSI_SEMANTIC_PRIMID
:
2084 value
= si_get_primitive_id(ctx
, 0);
2087 case TGSI_SEMANTIC_GRID_SIZE
:
2088 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.num_work_groups
);
2091 case TGSI_SEMANTIC_BLOCK_SIZE
:
2092 value
= get_block_size(&ctx
->abi
);
2095 case TGSI_SEMANTIC_BLOCK_ID
:
2097 LLVMValueRef values
[3];
2099 for (int i
= 0; i
< 3; i
++) {
2100 values
[i
] = ctx
->i32_0
;
2101 if (ctx
->args
.workgroup_ids
[i
].used
) {
2102 values
[i
] = ac_get_arg(&ctx
->ac
, ctx
->args
.workgroup_ids
[i
]);
2105 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2109 case TGSI_SEMANTIC_THREAD_ID
:
2110 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.local_invocation_ids
);
2113 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2114 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2117 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2118 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2121 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2122 value
= ac_get_thread_id(&ctx
->ac
);
2125 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2127 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2128 if (ctx
->ac
.wave_size
== 64)
2129 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2130 value
= LLVMBuildShl(ctx
->ac
.builder
,
2131 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2132 if (ctx
->ac
.wave_size
== 32)
2133 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2134 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2138 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2139 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2140 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2141 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2143 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2144 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2145 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2146 /* All bits set except LSB */
2147 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2150 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2152 if (ctx
->ac
.wave_size
== 64)
2153 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2154 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2155 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2156 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2157 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2158 if (ctx
->ac
.wave_size
== 32)
2159 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2160 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2164 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2165 value
= ac_get_arg(&ctx
->ac
, ctx
->cs_user_data
);
2169 assert(!"unknown system value");
2173 ctx
->system_values
[index
] = value
;
2176 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2178 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2179 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2181 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2184 assert(!ctx
->ac
.lds
);
2186 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2187 LLVMArrayType(ctx
->i8
, lds_size
),
2190 LLVMSetAlignment(var
, 64 * 1024);
2192 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2195 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2196 const struct tgsi_full_declaration
*decl
)
2198 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2199 assert(decl
->Range
.First
== decl
->Range
.Last
);
2201 si_declare_compute_memory(ctx
);
2204 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2207 ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2208 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2210 /* Do the bounds checking with a descriptor, because
2211 * doing computation and manual bounds checking of 64-bit
2212 * addresses generates horrible VALU code with very high
2213 * VGPR usage and very low SIMD occupancy.
2215 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2217 LLVMValueRef desc0
, desc1
;
2219 desc1
= LLVMConstInt(ctx
->i32
,
2220 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2222 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2223 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2224 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2225 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2227 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2228 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2229 S_008F0C_OOB_SELECT(3) |
2230 S_008F0C_RESOURCE_LEVEL(1);
2232 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2233 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2235 LLVMValueRef desc_elems
[] = {
2238 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2239 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2242 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2245 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2247 LLVMValueRef list_ptr
= ac_get_arg(&ctx
->ac
,
2248 ctx
->const_and_shader_buffers
);
2250 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2251 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2254 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2256 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2257 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2259 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2261 if (sel
->info
.const_buffers_declared
== 1 &&
2262 sel
->info
.shader_buffers_declared
== 0) {
2263 return load_const_buffer_desc_fast_path(ctx
);
2266 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2267 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2268 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2270 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2274 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2276 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2277 LLVMValueRef rsrc_ptr
= ac_get_arg(&ctx
->ac
,
2278 ctx
->const_and_shader_buffers
);
2280 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2281 index
= LLVMBuildSub(ctx
->ac
.builder
,
2282 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2285 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2288 static LLVMValueRef
fetch_constant(
2289 struct lp_build_tgsi_context
*bld_base
,
2290 const struct tgsi_full_src_register
*reg
,
2291 enum tgsi_opcode_type type
,
2292 unsigned swizzle_in
)
2294 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2295 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2296 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2298 unsigned swizzle
= swizzle_in
& 0xffff;
2300 LLVMValueRef addr
, bufp
;
2302 if (swizzle_in
== LP_CHAN_ALL
) {
2304 LLVMValueRef values
[4];
2305 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2306 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2308 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2311 /* Split 64-bit loads. */
2312 if (tgsi_type_is_64bit(type
)) {
2313 LLVMValueRef lo
, hi
;
2315 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2316 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2317 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2321 idx
= reg
->Register
.Index
* 4 + swizzle
;
2322 if (reg
->Register
.Indirect
) {
2323 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2325 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2328 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2329 if (sel
->info
.const_buffers_declared
== 1 &&
2330 sel
->info
.shader_buffers_declared
== 0) {
2331 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2332 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2333 return bitcast(bld_base
, type
, result
);
2336 assert(reg
->Register
.Dimension
);
2337 buf
= reg
->Dimension
.Index
;
2339 if (reg
->Dimension
.Indirect
) {
2340 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2342 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2343 reg
->Dimension
.Index
,
2344 ctx
->num_const_buffers
);
2345 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2346 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2347 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2349 bufp
= load_const_buffer_desc(ctx
, buf
);
2351 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2354 /* Initialize arguments for the shader export intrinsic */
2355 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2356 LLVMValueRef
*values
,
2358 struct ac_export_args
*args
)
2360 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2361 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2363 bool is_int8
, is_int10
;
2365 /* Default is 0xf. Adjusted below depending on the format. */
2366 args
->enabled_channels
= 0xf; /* writemask */
2368 /* Specify whether the EXEC mask represents the valid mask */
2369 args
->valid_mask
= 0;
2371 /* Specify whether this is the last export */
2374 /* Specify the target we are exporting */
2375 args
->target
= target
;
2377 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2378 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2379 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2380 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2382 assert(cbuf
>= 0 && cbuf
< 8);
2383 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2384 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2385 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2388 args
->compr
= false;
2389 args
->out
[0] = f32undef
;
2390 args
->out
[1] = f32undef
;
2391 args
->out
[2] = f32undef
;
2392 args
->out
[3] = f32undef
;
2394 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2395 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2396 unsigned bits
, bool hi
) = NULL
;
2398 switch (spi_shader_col_format
) {
2399 case V_028714_SPI_SHADER_ZERO
:
2400 args
->enabled_channels
= 0; /* writemask */
2401 args
->target
= V_008DFC_SQ_EXP_NULL
;
2404 case V_028714_SPI_SHADER_32_R
:
2405 args
->enabled_channels
= 1; /* writemask */
2406 args
->out
[0] = values
[0];
2409 case V_028714_SPI_SHADER_32_GR
:
2410 args
->enabled_channels
= 0x3; /* writemask */
2411 args
->out
[0] = values
[0];
2412 args
->out
[1] = values
[1];
2415 case V_028714_SPI_SHADER_32_AR
:
2416 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2417 args
->enabled_channels
= 0x3; /* writemask */
2418 args
->out
[0] = values
[0];
2419 args
->out
[1] = values
[3];
2421 args
->enabled_channels
= 0x9; /* writemask */
2422 args
->out
[0] = values
[0];
2423 args
->out
[3] = values
[3];
2427 case V_028714_SPI_SHADER_FP16_ABGR
:
2428 packf
= ac_build_cvt_pkrtz_f16
;
2431 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2432 packf
= ac_build_cvt_pknorm_u16
;
2435 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2436 packf
= ac_build_cvt_pknorm_i16
;
2439 case V_028714_SPI_SHADER_UINT16_ABGR
:
2440 packi
= ac_build_cvt_pk_u16
;
2443 case V_028714_SPI_SHADER_SINT16_ABGR
:
2444 packi
= ac_build_cvt_pk_i16
;
2447 case V_028714_SPI_SHADER_32_ABGR
:
2448 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2452 /* Pack f16 or norm_i16/u16. */
2454 for (chan
= 0; chan
< 2; chan
++) {
2455 LLVMValueRef pack_args
[2] = {
2457 values
[2 * chan
+ 1]
2459 LLVMValueRef packed
;
2461 packed
= packf(&ctx
->ac
, pack_args
);
2462 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2464 args
->compr
= 1; /* COMPR flag */
2468 for (chan
= 0; chan
< 2; chan
++) {
2469 LLVMValueRef pack_args
[2] = {
2470 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2471 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2473 LLVMValueRef packed
;
2475 packed
= packi(&ctx
->ac
, pack_args
,
2476 is_int8
? 8 : is_int10
? 10 : 16,
2478 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2480 args
->compr
= 1; /* COMPR flag */
2484 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2487 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2489 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2490 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2491 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2492 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2493 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2494 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2495 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2496 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2498 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2501 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2502 SI_PARAM_ALPHA_REF
);
2503 LLVMValueRef alpha_pass
=
2504 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2505 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2507 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2511 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2513 unsigned samplemask_param
)
2515 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2516 LLVMValueRef coverage
;
2518 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2519 coverage
= LLVMGetParam(ctx
->main_fn
,
2521 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2523 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2525 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2527 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2530 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2531 LLVMConstReal(ctx
->f32
,
2532 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2534 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2537 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2538 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2542 unsigned const_chan
;
2543 LLVMValueRef base_elt
;
2544 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
2545 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2546 SI_VS_CONST_CLIP_PLANES
, 0);
2547 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2549 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2550 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2555 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2557 /* Compute dot products of position and user clip plane vectors */
2558 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2559 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2561 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2562 const_chan
) * 4, 0);
2563 base_elt
= buffer_load_const(ctx
, const_resource
,
2565 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2566 out_elts
[const_chan
], args
->out
[chan
]);
2570 args
->enabled_channels
= 0xf;
2571 args
->valid_mask
= 0;
2573 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2578 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2582 if (so
->num_outputs
)
2583 fprintf(stderr
, "STREAMOUT\n");
2585 for (i
= 0; i
< so
->num_outputs
; i
++) {
2586 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2587 so
->output
[i
].start_component
;
2588 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2589 i
, so
->output
[i
].output_buffer
,
2590 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2591 so
->output
[i
].register_index
,
2592 mask
& 1 ? "x" : "",
2593 mask
& 2 ? "y" : "",
2594 mask
& 4 ? "z" : "",
2595 mask
& 8 ? "w" : "");
2599 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2600 LLVMValueRef
const *so_buffers
,
2601 LLVMValueRef
const *so_write_offsets
,
2602 struct pipe_stream_output
*stream_out
,
2603 struct si_shader_output_values
*shader_out
)
2605 unsigned buf_idx
= stream_out
->output_buffer
;
2606 unsigned start
= stream_out
->start_component
;
2607 unsigned num_comps
= stream_out
->num_components
;
2608 LLVMValueRef out
[4];
2610 assert(num_comps
&& num_comps
<= 4);
2611 if (!num_comps
|| num_comps
> 4)
2614 /* Load the output as int. */
2615 for (int j
= 0; j
< num_comps
; j
++) {
2616 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2618 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2621 /* Pack the output. */
2622 LLVMValueRef vdata
= NULL
;
2624 switch (num_comps
) {
2625 case 1: /* as i32 */
2628 case 2: /* as v2i32 */
2629 case 3: /* as v3i32 */
2630 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2631 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2634 /* as v4i32 (aligned to 4) */
2635 out
[3] = LLVMGetUndef(ctx
->i32
);
2637 case 4: /* as v4i32 */
2638 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2642 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2644 so_write_offsets
[buf_idx
],
2646 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
);
2650 * Write streamout data to buffers for vertex stream @p stream (different
2651 * vertex streams can occur for GS copy shaders).
2653 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2654 struct si_shader_output_values
*outputs
,
2655 unsigned noutput
, unsigned stream
)
2657 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2658 struct pipe_stream_output_info
*so
= &sel
->so
;
2659 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2662 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2663 LLVMValueRef so_vtx_count
=
2664 si_unpack_param(ctx
, ctx
->streamout_config
, 16, 7);
2666 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2668 /* can_emit = tid < so_vtx_count; */
2669 LLVMValueRef can_emit
=
2670 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2672 /* Emit the streamout code conditionally. This actually avoids
2673 * out-of-bounds buffer access. The hw tells us via the SGPR
2674 * (so_vtx_count) which threads are allowed to emit streamout data. */
2675 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2677 /* The buffer offset is computed as follows:
2678 * ByteOffset = streamout_offset[buffer_id]*4 +
2679 * (streamout_write_index + thread_id)*stride[buffer_id] +
2683 LLVMValueRef so_write_index
=
2684 ac_get_arg(&ctx
->ac
,
2685 ctx
->streamout_write_index
);
2687 /* Compute (streamout_write_index + thread_id). */
2688 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2690 /* Load the descriptor and compute the write offset for each
2691 * enabled buffer. */
2692 LLVMValueRef so_write_offset
[4] = {};
2693 LLVMValueRef so_buffers
[4];
2694 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
,
2697 for (i
= 0; i
< 4; i
++) {
2701 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2702 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2704 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2706 LLVMValueRef so_offset
= ac_get_arg(&ctx
->ac
,
2707 ctx
->streamout_offset
[i
]);
2708 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2710 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2711 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2715 /* Write streamout data. */
2716 for (i
= 0; i
< so
->num_outputs
; i
++) {
2717 unsigned reg
= so
->output
[i
].register_index
;
2722 if (stream
!= so
->output
[i
].stream
)
2725 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2726 &so
->output
[i
], &outputs
[reg
]);
2729 ac_build_endif(&ctx
->ac
, 6501);
2732 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2733 LLVMValueRef
*values
)
2735 struct ac_export_args args
;
2737 si_llvm_init_export_args(ctx
, values
,
2738 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2739 ac_build_export(&ctx
->ac
, &args
);
2742 static void si_build_param_exports(struct si_shader_context
*ctx
,
2743 struct si_shader_output_values
*outputs
,
2746 struct si_shader
*shader
= ctx
->shader
;
2747 unsigned param_count
= 0;
2749 for (unsigned i
= 0; i
< noutput
; i
++) {
2750 unsigned semantic_name
= outputs
[i
].semantic_name
;
2751 unsigned semantic_index
= outputs
[i
].semantic_index
;
2753 if (outputs
[i
].vertex_stream
[0] != 0 &&
2754 outputs
[i
].vertex_stream
[1] != 0 &&
2755 outputs
[i
].vertex_stream
[2] != 0 &&
2756 outputs
[i
].vertex_stream
[3] != 0)
2759 switch (semantic_name
) {
2760 case TGSI_SEMANTIC_LAYER
:
2761 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2762 case TGSI_SEMANTIC_CLIPDIST
:
2763 case TGSI_SEMANTIC_COLOR
:
2764 case TGSI_SEMANTIC_BCOLOR
:
2765 case TGSI_SEMANTIC_PRIMID
:
2766 case TGSI_SEMANTIC_FOG
:
2767 case TGSI_SEMANTIC_TEXCOORD
:
2768 case TGSI_SEMANTIC_GENERIC
:
2774 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2775 semantic_index
< SI_MAX_IO_GENERIC
) &&
2776 shader
->key
.opt
.kill_outputs
&
2777 (1ull << si_shader_io_get_unique_index(semantic_name
,
2778 semantic_index
, true)))
2781 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2783 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2784 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2787 shader
->info
.nr_param_exports
= param_count
;
2791 * Vertex color clamping.
2793 * This uses a state constant loaded in a user data SGPR and
2794 * an IF statement is added that clamps all colors if the constant
2797 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2798 struct si_shader_output_values
*outputs
,
2801 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2802 bool has_colors
= false;
2804 /* Store original colors to alloca variables. */
2805 for (unsigned i
= 0; i
< noutput
; i
++) {
2806 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2807 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2810 for (unsigned j
= 0; j
< 4; j
++) {
2811 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2812 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2820 /* The state is in the first bit of the user SGPR. */
2821 LLVMValueRef cond
= ac_get_arg(&ctx
->ac
, ctx
->vs_state_bits
);
2822 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2824 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2826 /* Store clamped colors to alloca variables within the conditional block. */
2827 for (unsigned i
= 0; i
< noutput
; i
++) {
2828 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2829 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2832 for (unsigned j
= 0; j
< 4; j
++) {
2833 LLVMBuildStore(ctx
->ac
.builder
,
2834 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2838 ac_build_endif(&ctx
->ac
, 6502);
2840 /* Load clamped colors */
2841 for (unsigned i
= 0; i
< noutput
; i
++) {
2842 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2843 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2846 for (unsigned j
= 0; j
< 4; j
++) {
2847 outputs
[i
].values
[j
] =
2848 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2853 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2854 * (position and parameter data only).
2856 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2857 struct si_shader_output_values
*outputs
,
2860 struct si_shader
*shader
= ctx
->shader
;
2861 struct ac_export_args pos_args
[4] = {};
2862 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2866 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2868 /* Build position exports. */
2869 for (i
= 0; i
< noutput
; i
++) {
2870 switch (outputs
[i
].semantic_name
) {
2871 case TGSI_SEMANTIC_POSITION
:
2872 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2873 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2875 case TGSI_SEMANTIC_PSIZE
:
2876 psize_value
= outputs
[i
].values
[0];
2878 case TGSI_SEMANTIC_LAYER
:
2879 layer_value
= outputs
[i
].values
[0];
2881 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2882 viewport_index_value
= outputs
[i
].values
[0];
2884 case TGSI_SEMANTIC_EDGEFLAG
:
2885 edgeflag_value
= outputs
[i
].values
[0];
2887 case TGSI_SEMANTIC_CLIPDIST
:
2888 if (!shader
->key
.opt
.clip_disable
) {
2889 unsigned index
= 2 + outputs
[i
].semantic_index
;
2890 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2891 V_008DFC_SQ_EXP_POS
+ index
,
2895 case TGSI_SEMANTIC_CLIPVERTEX
:
2896 if (!shader
->key
.opt
.clip_disable
) {
2897 si_llvm_emit_clipvertex(ctx
, pos_args
,
2904 /* We need to add the position output manually if it's missing. */
2905 if (!pos_args
[0].out
[0]) {
2906 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2907 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2908 pos_args
[0].done
= 0; /* last export? */
2909 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2910 pos_args
[0].compr
= 0; /* COMPR flag */
2911 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2912 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2913 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2914 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2917 bool pos_writes_edgeflag
= shader
->selector
->info
.writes_edgeflag
&&
2918 !shader
->key
.as_ngg
;
2920 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2921 if (shader
->selector
->info
.writes_psize
||
2922 pos_writes_edgeflag
||
2923 shader
->selector
->info
.writes_viewport_index
||
2924 shader
->selector
->info
.writes_layer
) {
2925 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2926 (pos_writes_edgeflag
<< 1) |
2927 (shader
->selector
->info
.writes_layer
<< 2);
2929 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2930 pos_args
[1].done
= 0; /* last export? */
2931 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2932 pos_args
[1].compr
= 0; /* COMPR flag */
2933 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2934 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2935 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2936 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2938 if (shader
->selector
->info
.writes_psize
)
2939 pos_args
[1].out
[0] = psize_value
;
2941 if (pos_writes_edgeflag
) {
2942 /* The output is a float, but the hw expects an integer
2943 * with the first bit containing the edge flag. */
2944 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2947 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2951 /* The LLVM intrinsic expects a float. */
2952 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2955 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2956 /* GFX9 has the layer in out.z[10:0] and the viewport
2957 * index in out.z[19:16].
2959 if (shader
->selector
->info
.writes_layer
)
2960 pos_args
[1].out
[2] = layer_value
;
2962 if (shader
->selector
->info
.writes_viewport_index
) {
2963 LLVMValueRef v
= viewport_index_value
;
2965 v
= ac_to_integer(&ctx
->ac
, v
);
2966 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2967 LLVMConstInt(ctx
->i32
, 16, 0), "");
2968 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2969 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2970 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2971 pos_args
[1].enabled_channels
|= 1 << 2;
2974 if (shader
->selector
->info
.writes_layer
)
2975 pos_args
[1].out
[2] = layer_value
;
2977 if (shader
->selector
->info
.writes_viewport_index
) {
2978 pos_args
[1].out
[3] = viewport_index_value
;
2979 pos_args
[1].enabled_channels
|= 1 << 3;
2984 for (i
= 0; i
< 4; i
++)
2985 if (pos_args
[i
].out
[0])
2986 shader
->info
.nr_pos_exports
++;
2988 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
2989 * Setting valid_mask=1 prevents it and has no other effect.
2991 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
2992 ctx
->screen
->info
.family
== CHIP_NAVI12
||
2993 ctx
->screen
->info
.family
== CHIP_NAVI14
)
2994 pos_args
[0].valid_mask
= 1;
2997 for (i
= 0; i
< 4; i
++) {
2998 if (!pos_args
[i
].out
[0])
3001 /* Specify the target we are exporting */
3002 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3004 if (pos_idx
== shader
->info
.nr_pos_exports
)
3005 /* Specify that this is the last export */
3006 pos_args
[i
].done
= 1;
3008 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3011 /* Build parameter exports. */
3012 si_build_param_exports(ctx
, outputs
, noutput
);
3016 * Forward all outputs from the vertex shader to the TES. This is only used
3017 * for the fixed function TCS.
3019 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3021 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3022 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3023 LLVMValueRef lds_vertex_stride
, lds_base
;
3026 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3027 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3028 buffer_offset
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3030 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3031 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3032 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3035 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3037 unsigned i
= u_bit_scan64(&inputs
);
3039 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3040 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3043 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3044 get_rel_patch_id(ctx
),
3046 LLVMConstInt(ctx
->i32
, i
, 0));
3048 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3050 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3051 buffer_offset
, 0, ac_glc
);
3055 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3056 LLVMValueRef rel_patch_id
,
3057 LLVMValueRef invocation_id
,
3058 LLVMValueRef tcs_out_current_patch_data_offset
,
3059 LLVMValueRef invoc0_tf_outer
[4],
3060 LLVMValueRef invoc0_tf_inner
[2])
3062 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3063 struct si_shader
*shader
= ctx
->shader
;
3064 unsigned tess_inner_index
, tess_outer_index
;
3065 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3066 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3067 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3069 /* Add a barrier before loading tess factors from LDS. */
3070 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3071 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3073 /* Do this only for invocation 0, because the tess levels are per-patch,
3076 * This can't jump, because invocation 0 executes this. It should
3077 * at least mask out the loads and stores for other invocations.
3079 ac_build_ifcc(&ctx
->ac
,
3080 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3081 invocation_id
, ctx
->i32_0
, ""), 6503);
3083 /* Determine the layout of one tess factor element in the buffer. */
3084 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3085 case PIPE_PRIM_LINES
:
3086 stride
= 2; /* 2 dwords, 1 vec2 store */
3090 case PIPE_PRIM_TRIANGLES
:
3091 stride
= 4; /* 4 dwords, 1 vec4 store */
3095 case PIPE_PRIM_QUADS
:
3096 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3105 for (i
= 0; i
< 4; i
++) {
3106 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3107 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3110 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3111 /* Tess factors are in VGPRs. */
3112 for (i
= 0; i
< outer_comps
; i
++)
3113 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3114 for (i
= 0; i
< inner_comps
; i
++)
3115 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3117 /* Load tess_inner and tess_outer from LDS.
3118 * Any invocation can write them, so we can't get them from a temporary.
3120 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3121 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3123 lds_base
= tcs_out_current_patch_data_offset
;
3124 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3125 LLVMConstInt(ctx
->i32
,
3126 tess_inner_index
* 4, 0), "");
3127 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3128 LLVMConstInt(ctx
->i32
,
3129 tess_outer_index
* 4, 0), "");
3131 for (i
= 0; i
< outer_comps
; i
++) {
3133 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3135 for (i
= 0; i
< inner_comps
; i
++) {
3136 inner
[i
] = out
[outer_comps
+i
] =
3137 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3141 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3142 /* For isolines, the hardware expects tess factors in the
3143 * reverse order from what GLSL / TGSI specify.
3145 LLVMValueRef tmp
= out
[0];
3150 /* Convert the outputs to vectors for stores. */
3151 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3155 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3157 /* Get the buffer. */
3158 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3160 /* Get the offset. */
3161 tf_base
= ac_get_arg(&ctx
->ac
,
3162 ctx
->tcs_factor_offset
);
3163 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3164 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3166 ac_build_ifcc(&ctx
->ac
,
3167 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3168 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3170 /* Store the dynamic HS control word. */
3172 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3173 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3174 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3175 1, ctx
->i32_0
, tf_base
,
3180 ac_build_endif(&ctx
->ac
, 6504);
3182 /* Store the tessellation factors. */
3183 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3184 MIN2(stride
, 4), byteoffset
, tf_base
,
3188 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3189 stride
- 4, byteoffset
, tf_base
,
3192 /* Store the tess factors into the offchip buffer if TES reads them. */
3193 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3194 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3195 LLVMValueRef tf_inner_offset
;
3196 unsigned param_outer
, param_inner
;
3198 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3199 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3201 param_outer
= si_shader_io_get_unique_index_patch(
3202 TGSI_SEMANTIC_TESSOUTER
, 0);
3203 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3204 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3206 unsigned outer_vec_size
=
3207 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3208 outer_comps
: util_next_power_of_two(outer_comps
);
3209 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3211 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3212 outer_comps
, tf_outer_offset
,
3215 param_inner
= si_shader_io_get_unique_index_patch(
3216 TGSI_SEMANTIC_TESSINNER
, 0);
3217 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3218 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3220 inner_vec
= inner_comps
== 1 ? inner
[0] :
3221 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3222 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3223 inner_comps
, tf_inner_offset
,
3228 ac_build_endif(&ctx
->ac
, 6503);
3232 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3233 struct ac_arg param
, unsigned return_index
)
3235 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3236 ac_get_arg(&ctx
->ac
, param
),
3241 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3242 struct ac_arg param
, unsigned return_index
)
3244 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3245 LLVMValueRef p
= ac_get_arg(&ctx
->ac
, param
);
3247 return LLVMBuildInsertValue(builder
, ret
,
3248 ac_to_float(&ctx
->ac
, p
),
3253 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3254 struct ac_arg param
, unsigned return_index
)
3256 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3257 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, param
);
3258 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3259 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3262 /* This only writes the tessellation factor levels. */
3263 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3264 unsigned max_outputs
,
3265 LLVMValueRef
*addrs
)
3267 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3268 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3269 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3270 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3272 si_copy_tcs_inputs(bld_base
);
3274 rel_patch_id
= get_rel_patch_id(ctx
);
3275 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3276 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3278 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3279 LLVMBasicBlockRef blocks
[2] = {
3280 LLVMGetInsertBlock(builder
),
3281 ctx
->merged_wrap_if_entry_block
3283 LLVMValueRef values
[2];
3285 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3287 values
[0] = rel_patch_id
;
3288 values
[1] = LLVMGetUndef(ctx
->i32
);
3289 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3291 values
[0] = tf_lds_offset
;
3292 values
[1] = LLVMGetUndef(ctx
->i32
);
3293 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3295 values
[0] = invocation_id
;
3296 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3297 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3300 /* Return epilog parameters from this function. */
3301 LLVMValueRef ret
= ctx
->return_value
;
3304 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3305 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3306 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3307 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3308 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3309 /* Tess offchip and tess factor offsets are at the beginning. */
3310 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3311 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3312 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3314 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3315 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3316 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3317 GFX6_SGPR_TCS_OUT_LAYOUT
);
3318 /* Tess offchip and tess factor offsets are after user SGPRs. */
3319 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
,
3320 GFX6_TCS_NUM_USER_SGPR
);
3321 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
,
3322 GFX6_TCS_NUM_USER_SGPR
+ 1);
3323 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3327 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3328 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3329 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3331 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3332 * the invocation_id output does not alias the tcs_rel_ids input,
3333 * which saves a V_MOV on gfx9.
3337 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3338 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3340 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3341 vgpr
++; /* skip the tess factor LDS offset */
3342 for (unsigned i
= 0; i
< 6; i
++) {
3343 LLVMValueRef value
=
3344 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3345 value
= ac_to_float(&ctx
->ac
, value
);
3346 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3349 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3351 ctx
->return_value
= ret
;
3354 /* Pass TCS inputs from LS to TCS on GFX9. */
3355 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3357 LLVMValueRef ret
= ctx
->return_value
;
3359 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3360 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3361 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3362 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3363 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3364 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3366 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3367 8 + SI_SGPR_RW_BUFFERS
);
3368 ret
= si_insert_input_ptr(ctx
, ret
,
3369 ctx
->bindless_samplers_and_images
,
3370 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->vs_state_bits
,
3373 8 + SI_SGPR_VS_STATE_BITS
);
3375 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3376 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3377 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_offsets
,
3378 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3379 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3380 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3382 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3383 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3384 ac_to_float(&ctx
->ac
,
3385 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
)),
3387 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3388 ac_to_float(&ctx
->ac
,
3389 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_rel_ids
)),
3391 ctx
->return_value
= ret
;
3394 /* Pass GS inputs from ES to GS on GFX9. */
3395 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3397 LLVMValueRef ret
= ctx
->return_value
;
3399 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3400 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3401 if (ctx
->shader
->key
.as_ngg
)
3402 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->gs_tg_info
, 2);
3404 ret
= si_insert_input_ret(ctx
, ret
, ctx
->gs2vs_offset
, 2);
3405 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3406 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3408 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3409 8 + SI_SGPR_RW_BUFFERS
);
3410 ret
= si_insert_input_ptr(ctx
, ret
,
3411 ctx
->bindless_samplers_and_images
,
3412 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3413 if (ctx
->screen
->use_ngg
) {
3414 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->vs_state_bits
,
3415 8 + SI_SGPR_VS_STATE_BITS
);
3419 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3420 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3422 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3424 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx01_offset
, vgpr
++);
3425 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx23_offset
, vgpr
++);
3426 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_prim_id
, vgpr
++);
3427 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_invocation_id
, vgpr
++);
3428 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx45_offset
, vgpr
++);
3429 ctx
->return_value
= ret
;
3432 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3433 unsigned max_outputs
,
3434 LLVMValueRef
*addrs
)
3436 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3437 struct si_shader
*shader
= ctx
->shader
;
3438 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3440 LLVMValueRef vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->rel_auto_id
);
3441 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3442 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3443 vertex_dw_stride
, "");
3445 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3446 * its inputs from it. */
3447 for (i
= 0; i
< info
->num_outputs
; i
++) {
3448 unsigned name
= info
->output_semantic_name
[i
];
3449 unsigned index
= info
->output_semantic_index
[i
];
3451 /* The ARB_shader_viewport_layer_array spec contains the
3454 * 2) What happens if gl_ViewportIndex or gl_Layer is
3455 * written in the vertex shader and a geometry shader is
3458 * RESOLVED: The value written by the last vertex processing
3459 * stage is used. If the last vertex processing stage
3460 * (vertex, tessellation evaluation or geometry) does not
3461 * statically assign to gl_ViewportIndex or gl_Layer, index
3462 * or layer zero is assumed.
3464 * So writes to those outputs in VS-as-LS are simply ignored.
3466 if (name
== TGSI_SEMANTIC_LAYER
||
3467 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3470 int param
= si_shader_io_get_unique_index(name
, index
, false);
3471 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3472 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3474 for (chan
= 0; chan
< 4; chan
++) {
3475 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3478 lshs_lds_store(ctx
, chan
, dw_addr
,
3479 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3483 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3484 si_set_ls_return_value_for_tcs(ctx
);
3487 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3488 unsigned max_outputs
,
3489 LLVMValueRef
*addrs
)
3491 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3492 struct si_shader
*es
= ctx
->shader
;
3493 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3494 LLVMValueRef lds_base
= NULL
;
3498 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3499 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3500 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3501 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 24, 4);
3502 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3503 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3504 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3505 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3506 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3509 for (i
= 0; i
< info
->num_outputs
; i
++) {
3512 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3513 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3516 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3517 info
->output_semantic_index
[i
], false);
3519 for (chan
= 0; chan
< 4; chan
++) {
3520 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3523 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3524 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3526 /* GFX9 has the ESGS ring in LDS. */
3527 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3528 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3529 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3530 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3534 ac_build_buffer_store_dword(&ctx
->ac
,
3537 ac_get_arg(&ctx
->ac
, ctx
->es2gs_offset
),
3538 (4 * param
+ chan
) * 4,
3539 ac_glc
| ac_slc
| ac_swizzled
);
3543 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3544 si_set_es_return_value_for_gs(ctx
);
3547 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3549 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3550 return si_unpack_param(ctx
, ctx
->merged_wave_info
, 16, 8);
3552 return ac_get_arg(&ctx
->ac
, ctx
->gs_wave_id
);
3555 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3557 if (ctx
->shader
->key
.as_ngg
) {
3558 gfx10_ngg_gs_emit_epilogue(ctx
);
3562 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3563 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3565 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3566 si_get_gs_wave_id(ctx
));
3568 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3569 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3572 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3573 unsigned max_outputs
,
3574 LLVMValueRef
*addrs
)
3576 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3577 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3579 assert(info
->num_outputs
<= max_outputs
);
3581 emit_gs_epilogue(ctx
);
3584 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3586 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3587 emit_gs_epilogue(ctx
);
3590 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3591 unsigned max_outputs
,
3592 LLVMValueRef
*addrs
)
3594 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3595 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3596 struct si_shader_output_values
*outputs
= NULL
;
3599 assert(!ctx
->shader
->is_gs_copy_shader
);
3600 assert(info
->num_outputs
<= max_outputs
);
3602 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3604 for (i
= 0; i
< info
->num_outputs
; i
++) {
3605 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3606 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3608 for (j
= 0; j
< 4; j
++) {
3609 outputs
[i
].values
[j
] =
3610 LLVMBuildLoad(ctx
->ac
.builder
,
3613 outputs
[i
].vertex_stream
[j
] =
3614 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3618 if (!ctx
->screen
->use_ngg_streamout
&&
3619 ctx
->shader
->selector
->so
.num_outputs
)
3620 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3622 /* Export PrimitiveID. */
3623 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3624 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3625 outputs
[i
].semantic_index
= 0;
3626 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3627 for (j
= 1; j
< 4; j
++)
3628 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3630 memset(outputs
[i
].vertex_stream
, 0,
3631 sizeof(outputs
[i
].vertex_stream
));
3635 si_llvm_export_vs(ctx
, outputs
, i
);
3639 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3640 unsigned max_outputs
,
3641 LLVMValueRef
*addrs
)
3643 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3644 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3645 LLVMValueRef pos
[4] = {};
3647 assert(info
->num_outputs
<= max_outputs
);
3649 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3650 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3653 for (unsigned chan
= 0; chan
< 4; chan
++)
3654 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3657 assert(pos
[0] != NULL
);
3659 /* Return the position output. */
3660 LLVMValueRef ret
= ctx
->return_value
;
3661 for (unsigned chan
= 0; chan
< 4; chan
++)
3662 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3663 ctx
->return_value
= ret
;
3666 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3668 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3670 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3671 &ctx
->outputs
[0][0]);
3674 struct si_ps_exports
{
3676 struct ac_export_args args
[10];
3679 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3680 LLVMValueRef depth
, LLVMValueRef stencil
,
3681 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3683 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3684 struct ac_export_args args
;
3686 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3688 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3691 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3692 LLVMValueRef
*color
, unsigned index
,
3693 unsigned samplemask_param
,
3694 bool is_last
, struct si_ps_exports
*exp
)
3696 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3700 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3701 for (i
= 0; i
< 4; i
++)
3702 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3705 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3706 color
[3] = ctx
->ac
.f32_1
;
3710 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3711 si_alpha_test(bld_base
, color
[3]);
3713 /* Line & polygon smoothing */
3714 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3715 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3718 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3719 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3720 struct ac_export_args args
[8];
3723 /* Get the export arguments, also find out what the last one is. */
3724 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3725 si_llvm_init_export_args(ctx
, color
,
3726 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3727 if (args
[c
].enabled_channels
)
3731 /* Emit all exports. */
3732 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3733 if (is_last
&& last
== c
) {
3734 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3735 args
[c
].done
= 1; /* DONE bit */
3736 } else if (!args
[c
].enabled_channels
)
3737 continue; /* unnecessary NULL export */
3739 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3742 struct ac_export_args args
;
3745 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3748 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3749 args
.done
= 1; /* DONE bit */
3750 } else if (!args
.enabled_channels
)
3751 return; /* unnecessary NULL export */
3753 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3757 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3758 struct si_ps_exports
*exp
)
3760 for (unsigned i
= 0; i
< exp
->num
; i
++)
3761 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3765 * Return PS outputs in this order:
3767 * v[0:3] = color0.xyzw
3768 * v[4:7] = color1.xyzw
3773 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3775 * The alpha-ref SGPR is returned via its original location.
3777 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3778 unsigned max_outputs
,
3779 LLVMValueRef
*addrs
)
3781 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3782 struct si_shader
*shader
= ctx
->shader
;
3783 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3784 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3785 unsigned i
, j
, first_vgpr
, vgpr
;
3787 LLVMValueRef color
[8][4] = {};
3788 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3791 if (ctx
->postponed_kill
)
3792 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3794 /* Read the output values. */
3795 for (i
= 0; i
< info
->num_outputs
; i
++) {
3796 unsigned semantic_name
= info
->output_semantic_name
[i
];
3797 unsigned semantic_index
= info
->output_semantic_index
[i
];
3799 switch (semantic_name
) {
3800 case TGSI_SEMANTIC_COLOR
:
3801 assert(semantic_index
< 8);
3802 for (j
= 0; j
< 4; j
++) {
3803 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3804 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3805 color
[semantic_index
][j
] = result
;
3808 case TGSI_SEMANTIC_POSITION
:
3809 depth
= LLVMBuildLoad(builder
,
3810 addrs
[4 * i
+ 2], "");
3812 case TGSI_SEMANTIC_STENCIL
:
3813 stencil
= LLVMBuildLoad(builder
,
3814 addrs
[4 * i
+ 1], "");
3816 case TGSI_SEMANTIC_SAMPLEMASK
:
3817 samplemask
= LLVMBuildLoad(builder
,
3818 addrs
[4 * i
+ 0], "");
3821 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3826 /* Fill the return structure. */
3827 ret
= ctx
->return_value
;
3830 ret
= LLVMBuildInsertValue(builder
, ret
,
3831 ac_to_integer(&ctx
->ac
,
3832 LLVMGetParam(ctx
->main_fn
,
3833 SI_PARAM_ALPHA_REF
)),
3834 SI_SGPR_ALPHA_REF
, "");
3837 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3838 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3842 for (j
= 0; j
< 4; j
++)
3843 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3846 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3848 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3850 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3852 /* Add the input sample mask for smoothing at the end. */
3853 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3854 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3855 ret
= LLVMBuildInsertValue(builder
, ret
,
3856 LLVMGetParam(ctx
->main_fn
,
3857 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3859 ctx
->return_value
= ret
;
3862 static void membar_emit(
3863 const struct lp_build_tgsi_action
*action
,
3864 struct lp_build_tgsi_context
*bld_base
,
3865 struct lp_build_emit_data
*emit_data
)
3867 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3868 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3869 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3870 unsigned wait_flags
= 0;
3872 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3873 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3875 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3876 TGSI_MEMBAR_SHADER_BUFFER
|
3877 TGSI_MEMBAR_SHADER_IMAGE
))
3878 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3880 if (flags
& TGSI_MEMBAR_SHARED
)
3881 wait_flags
|= AC_WAIT_LGKM
;
3883 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3886 static void clock_emit(
3887 const struct lp_build_tgsi_action
*action
,
3888 struct lp_build_tgsi_context
*bld_base
,
3889 struct lp_build_emit_data
*emit_data
)
3891 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3892 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3894 emit_data
->output
[0] =
3895 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3896 emit_data
->output
[1] =
3897 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3900 static void si_llvm_emit_ddxy(
3901 const struct lp_build_tgsi_action
*action
,
3902 struct lp_build_tgsi_context
*bld_base
,
3903 struct lp_build_emit_data
*emit_data
)
3905 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3906 unsigned opcode
= emit_data
->info
->opcode
;
3911 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3912 mask
= AC_TID_MASK_LEFT
;
3913 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3914 mask
= AC_TID_MASK_TOP
;
3916 mask
= AC_TID_MASK_TOP_LEFT
;
3918 /* for DDX we want to next X pixel, DDY next Y pixel. */
3919 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3921 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3922 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3923 emit_data
->output
[emit_data
->chan
] = val
;
3926 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3927 struct lp_build_tgsi_context
*bld_base
,
3928 struct lp_build_emit_data
*emit_data
)
3930 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3931 struct si_shader
*shader
= ctx
->shader
;
3932 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3933 LLVMValueRef interp_param
;
3934 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3935 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3936 int input_base
, input_array_size
;
3939 LLVMValueRef prim_mask
= ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
);
3940 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3941 int interp_param_idx
;
3945 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3946 /* offset is in second src, first two channels */
3947 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3949 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3951 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3952 LLVMValueRef sample_position
;
3953 LLVMValueRef sample_id
;
3954 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3956 /* fetch sample ID, then fetch its sample position,
3957 * and place into first two channels.
3959 sample_id
= lp_build_emit_fetch(bld_base
,
3960 emit_data
->inst
, 1, TGSI_CHAN_X
);
3961 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3963 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3964 * Language 4.50 spec says about interpolateAtSample:
3966 * "Returns the value of the input interpolant variable at
3967 * the location of sample number sample. If multisample
3968 * buffers are not available, the input variable will be
3969 * evaluated at the center of the pixel. If sample sample
3970 * does not exist, the position used to interpolate the
3971 * input variable is undefined."
3973 * This means that sample_id values outside of the valid are
3974 * in fact valid input, and the usual mechanism for loading the
3975 * sample position doesn't work.
3977 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3978 LLVMValueRef center
[4] = {
3979 LLVMConstReal(ctx
->f32
, 0.5),
3980 LLVMConstReal(ctx
->f32
, 0.5),
3985 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3987 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
3990 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3993 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
3994 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3996 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
3999 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4001 if (input
->Register
.Indirect
) {
4002 unsigned array_id
= input
->Indirect
.ArrayID
;
4005 input_base
= info
->input_array_first
[array_id
];
4006 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4008 input_base
= inst
->Src
[0].Register
.Index
;
4009 input_array_size
= info
->num_inputs
- input_base
;
4012 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4013 1, input
->Register
.Index
- input_base
);
4015 input_base
= inst
->Src
[0].Register
.Index
;
4016 input_array_size
= 1;
4017 array_idx
= ctx
->i32_0
;
4020 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4022 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4023 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4024 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4026 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4028 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4029 if (interp_param_idx
== -1)
4031 else if (interp_param_idx
)
4032 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4034 interp_param
= NULL
;
4036 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4037 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4038 LLVMValueRef ij_out
[2];
4039 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4042 * take the I then J parameters, and the DDX/Y for it, and
4043 * calculate the IJ inputs for the interpolator.
4044 * temp1 = ddx * offset/sample.x + I;
4045 * interp_param.I = ddy * offset/sample.y + temp1;
4046 * temp1 = ddx * offset/sample.x + J;
4047 * interp_param.J = ddy * offset/sample.y + temp1;
4049 for (i
= 0; i
< 2; i
++) {
4050 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4051 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4052 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4053 ddxy_out
, ix_ll
, "");
4054 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4055 ddxy_out
, iy_ll
, "");
4056 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4057 interp_param
, ix_ll
, "");
4060 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4062 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4063 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4065 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4069 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4071 for (chan
= 0; chan
< 4; chan
++) {
4072 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4073 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4075 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4076 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4079 i
= LLVMBuildExtractElement(
4080 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4081 j
= LLVMBuildExtractElement(
4082 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4084 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4087 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4088 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4091 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4092 ctx
->ac
.builder
, gather
, array_idx
, "");
4096 static void vote_all_emit(
4097 const struct lp_build_tgsi_action
*action
,
4098 struct lp_build_tgsi_context
*bld_base
,
4099 struct lp_build_emit_data
*emit_data
)
4101 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4103 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4104 emit_data
->output
[emit_data
->chan
] =
4105 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4108 static void vote_any_emit(
4109 const struct lp_build_tgsi_action
*action
,
4110 struct lp_build_tgsi_context
*bld_base
,
4111 struct lp_build_emit_data
*emit_data
)
4113 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4115 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4116 emit_data
->output
[emit_data
->chan
] =
4117 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4120 static void vote_eq_emit(
4121 const struct lp_build_tgsi_action
*action
,
4122 struct lp_build_tgsi_context
*bld_base
,
4123 struct lp_build_emit_data
*emit_data
)
4125 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4127 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4128 emit_data
->output
[emit_data
->chan
] =
4129 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4132 static void ballot_emit(
4133 const struct lp_build_tgsi_action
*action
,
4134 struct lp_build_tgsi_context
*bld_base
,
4135 struct lp_build_emit_data
*emit_data
)
4137 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4138 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4141 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4142 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4144 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4146 if (ctx
->ac
.wave_size
== 32) {
4147 emit_data
->output
[1] = ctx
->i32_0
;
4149 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4150 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4154 static void read_lane_emit(
4155 const struct lp_build_tgsi_action
*action
,
4156 struct lp_build_tgsi_context
*bld_base
,
4157 struct lp_build_emit_data
*emit_data
)
4159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4161 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4162 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4163 0, emit_data
->src_chan
);
4165 /* Always read the source invocation (= lane) from the X channel. */
4166 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4168 emit_data
->arg_count
= 2;
4171 /* We currently have no other way to prevent LLVM from lifting the icmp
4172 * calls to a dominating basic block.
4174 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4176 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4177 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4179 emit_data
->output
[emit_data
->chan
] =
4180 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4181 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4182 AC_FUNC_ATTR_READNONE
|
4183 AC_FUNC_ATTR_CONVERGENT
);
4186 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4187 struct lp_build_emit_data
*emit_data
)
4189 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4190 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4194 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4196 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4197 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4201 /* Emit one vertex from the geometry shader */
4202 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4204 LLVMValueRef
*addrs
)
4206 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4208 if (ctx
->shader
->key
.as_ngg
) {
4209 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4213 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4214 struct si_shader
*shader
= ctx
->shader
;
4215 LLVMValueRef soffset
= ac_get_arg(&ctx
->ac
, ctx
->gs2vs_offset
);
4216 LLVMValueRef gs_next_vertex
;
4217 LLVMValueRef can_emit
;
4218 unsigned chan
, offset
;
4221 /* Write vertex attribute values to GSVS ring */
4222 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4223 ctx
->gs_next_vertex
[stream
],
4226 /* If this thread has already emitted the declared maximum number of
4227 * vertices, skip the write: excessive vertex emissions are not
4228 * supposed to have any effect.
4230 * If the shader has no writes to memory, kill it instead. This skips
4231 * further memory loads and may allow LLVM to skip to the end
4234 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4235 LLVMConstInt(ctx
->i32
,
4236 shader
->selector
->gs_max_out_vertices
, 0), "");
4238 bool use_kill
= !info
->writes_memory
;
4240 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4242 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4246 for (i
= 0; i
< info
->num_outputs
; i
++) {
4247 for (chan
= 0; chan
< 4; chan
++) {
4248 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4249 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4252 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4253 LLVMValueRef voffset
=
4254 LLVMConstInt(ctx
->i32
, offset
*
4255 shader
->selector
->gs_max_out_vertices
, 0);
4258 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4259 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4260 LLVMConstInt(ctx
->i32
, 4, 0), "");
4262 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4264 ac_build_buffer_store_dword(&ctx
->ac
,
4265 ctx
->gsvs_ring
[stream
],
4267 voffset
, soffset
, 0,
4268 ac_glc
| ac_slc
| ac_swizzled
);
4272 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4273 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4275 /* Signal vertex emission if vertex data was written. */
4277 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4278 si_get_gs_wave_id(ctx
));
4282 ac_build_endif(&ctx
->ac
, 6505);
4285 /* Emit one vertex from the geometry shader */
4286 static void si_tgsi_emit_vertex(
4287 const struct lp_build_tgsi_action
*action
,
4288 struct lp_build_tgsi_context
*bld_base
,
4289 struct lp_build_emit_data
*emit_data
)
4291 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4292 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4294 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4297 /* Cut one primitive from the geometry shader */
4298 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4301 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4303 if (ctx
->shader
->key
.as_ngg
) {
4304 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4308 /* Signal primitive cut */
4309 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4310 si_get_gs_wave_id(ctx
));
4313 /* Cut one primitive from the geometry shader */
4314 static void si_tgsi_emit_primitive(
4315 const struct lp_build_tgsi_action
*action
,
4316 struct lp_build_tgsi_context
*bld_base
,
4317 struct lp_build_emit_data
*emit_data
)
4319 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4321 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4324 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4325 struct lp_build_tgsi_context
*bld_base
,
4326 struct lp_build_emit_data
*emit_data
)
4328 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4330 /* GFX6 only (thanks to a hw bug workaround):
4331 * The real barrier instruction isn’t needed, because an entire patch
4332 * always fits into a single wave.
4334 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4335 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4336 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4340 ac_build_s_barrier(&ctx
->ac
);
4343 void si_create_function(struct si_shader_context
*ctx
,
4345 LLVMTypeRef
*returns
, unsigned num_returns
,
4346 unsigned max_workgroup_size
)
4348 si_llvm_create_func(ctx
, name
, returns
, num_returns
);
4349 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4351 if (ctx
->screen
->info
.address32_hi
) {
4352 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4353 "amdgpu-32bit-address-high-bits",
4354 ctx
->screen
->info
.address32_hi
);
4357 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4358 "no-signed-zeros-fp-math",
4361 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4364 static void declare_streamout_params(struct si_shader_context
*ctx
,
4365 struct pipe_stream_output_info
*so
)
4367 if (ctx
->screen
->use_ngg_streamout
) {
4368 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
4369 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4373 /* Streamout SGPRs. */
4374 if (so
->num_outputs
) {
4375 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
4376 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
4377 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4378 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4381 /* A streamout buffer offset is loaded if the stride is non-zero. */
4382 for (int i
= 0; i
< 4; i
++) {
4386 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
4390 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4392 switch (shader
->selector
->type
) {
4393 case PIPE_SHADER_VERTEX
:
4394 case PIPE_SHADER_TESS_EVAL
:
4395 return shader
->key
.as_ngg
? 128 : 0;
4397 case PIPE_SHADER_TESS_CTRL
:
4398 /* Return this so that LLVM doesn't remove s_barrier
4399 * instructions on chips where we use s_barrier. */
4400 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4402 case PIPE_SHADER_GEOMETRY
:
4403 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4405 case PIPE_SHADER_COMPUTE
:
4406 break; /* see below */
4412 const unsigned *properties
= shader
->selector
->info
.properties
;
4413 unsigned max_work_group_size
=
4414 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4415 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4416 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4418 if (!max_work_group_size
) {
4419 /* This is a variable group size compute shader,
4420 * compile it for the maximum possible group size.
4422 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4424 return max_work_group_size
;
4427 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4430 enum ac_arg_type const_shader_buf_type
;
4432 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4433 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4434 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
4436 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
4438 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
4439 assign_params
? &ctx
->const_and_shader_buffers
:
4440 &ctx
->other_const_and_shader_buffers
);
4443 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4446 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4447 assign_params
? &ctx
->samplers_and_images
:
4448 &ctx
->other_samplers_and_images
);
4451 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4454 declare_const_and_shader_buffers(ctx
, assign_params
);
4455 declare_samplers_and_images(ctx
, assign_params
);
4458 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
4460 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4462 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4463 &ctx
->bindless_samplers_and_images
);
4466 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
4468 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4469 if (!ctx
->shader
->is_gs_copy_shader
) {
4470 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
4471 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
4472 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
4476 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4477 unsigned *num_prolog_vgprs
)
4479 struct si_shader
*shader
= ctx
->shader
;
4481 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
4482 if (shader
->key
.as_ls
) {
4483 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
4484 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4485 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4486 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4488 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4489 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4491 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4492 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4493 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4494 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
4495 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4497 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4498 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
4499 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4502 if (!shader
->is_gs_copy_shader
) {
4503 /* Vertex load indices. */
4504 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vertex_index0
);
4505 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
4506 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
4507 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4511 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4512 unsigned vs_blit_property
)
4514 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4515 &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
4516 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
4517 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
4519 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4520 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
4521 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
4522 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
4523 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
4524 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4525 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
4526 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
4527 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
4528 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
4529 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
4530 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
4534 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
)
4536 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
4537 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
4538 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
4539 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
4543 /* Convenient merged shader definitions. */
4544 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4545 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4548 static void add_arg_checked(struct ac_shader_args
*args
,
4549 enum ac_arg_regfile file
,
4550 unsigned registers
, enum ac_arg_type type
,
4554 assert(args
->arg_count
== idx
);
4555 ac_add_arg(args
, file
, registers
, type
, arg
);
4558 static void create_function(struct si_shader_context
*ctx
)
4560 struct si_shader
*shader
= ctx
->shader
;
4561 LLVMTypeRef returns
[16+32*4];
4562 unsigned i
, num_return_sgprs
;
4563 unsigned num_returns
= 0;
4564 unsigned num_prolog_vgprs
= 0;
4565 unsigned type
= ctx
->type
;
4566 unsigned vs_blit_property
=
4567 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4569 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
4571 /* Set MERGED shaders. */
4572 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4573 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4574 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4575 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4576 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4580 case PIPE_SHADER_VERTEX
:
4581 declare_global_desc_pointers(ctx
);
4583 if (vs_blit_property
) {
4584 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4587 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4591 declare_per_stage_desc_pointers(ctx
, true);
4592 declare_vs_specific_input_sgprs(ctx
);
4593 if (!shader
->is_gs_copy_shader
) {
4594 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4595 &ctx
->vertex_buffers
);
4598 if (shader
->key
.as_es
) {
4599 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4600 &ctx
->es2gs_offset
);
4601 } else if (shader
->key
.as_ls
) {
4602 /* no extra parameters */
4604 /* The locations of the other parameters are assigned dynamically. */
4605 declare_streamout_params(ctx
, &shader
->selector
->so
);
4609 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4612 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4613 for (i
= 0; i
< 4; i
++)
4614 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4618 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4619 declare_global_desc_pointers(ctx
);
4620 declare_per_stage_desc_pointers(ctx
, true);
4621 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4622 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4623 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4624 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4625 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4626 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4629 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4630 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4632 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4633 * placed after the user SGPRs.
4635 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4636 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4637 for (i
= 0; i
< 11; i
++)
4638 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4641 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4642 /* Merged stages have 8 system SGPRs at the beginning. */
4643 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4644 declare_per_stage_desc_pointers(ctx
,
4645 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4646 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4647 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4648 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4649 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4650 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4651 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4653 declare_global_desc_pointers(ctx
);
4654 declare_per_stage_desc_pointers(ctx
,
4655 ctx
->type
== PIPE_SHADER_VERTEX
);
4656 declare_vs_specific_input_sgprs(ctx
);
4658 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4659 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4660 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4661 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
4663 /* VGPRs (first TCS, then VS) */
4664 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4665 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4667 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4668 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4670 /* LS return values are inputs to the TCS main shader part. */
4671 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4672 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4673 for (i
= 0; i
< 2; i
++)
4674 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4676 /* TCS return values are inputs to the TCS epilog.
4678 * param_tcs_offchip_offset, param_tcs_factor_offset,
4679 * param_tcs_offchip_layout, and param_rw_buffers
4680 * should be passed to the epilog.
4682 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4683 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4684 for (i
= 0; i
< 11; i
++)
4685 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4689 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4690 /* Merged stages have 8 system SGPRs at the beginning. */
4691 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4692 declare_per_stage_desc_pointers(ctx
,
4693 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4695 if (ctx
->shader
->key
.as_ngg
)
4696 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
4698 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4700 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4701 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4702 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4703 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4704 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4706 declare_global_desc_pointers(ctx
);
4707 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4708 declare_per_stage_desc_pointers(ctx
,
4709 (ctx
->type
== PIPE_SHADER_VERTEX
||
4710 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4713 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4714 if (vs_blit_property
)
4715 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4717 declare_vs_specific_input_sgprs(ctx
);
4719 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4720 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4721 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4722 /* Declare as many input SGPRs as the VS has. */
4725 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4726 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4727 &ctx
->vertex_buffers
);
4730 /* VGPRs (first GS, then VS/TES) */
4731 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
4732 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
4733 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4734 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4735 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
4737 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4738 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4739 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4740 declare_tes_input_vgprs(ctx
);
4743 if (ctx
->shader
->key
.as_es
&&
4744 (ctx
->type
== PIPE_SHADER_VERTEX
||
4745 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4746 unsigned num_user_sgprs
;
4748 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4749 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4751 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4753 /* ES return values are inputs to GS. */
4754 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4755 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4756 for (i
= 0; i
< 5; i
++)
4757 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4761 case PIPE_SHADER_TESS_EVAL
:
4762 declare_global_desc_pointers(ctx
);
4763 declare_per_stage_desc_pointers(ctx
, true);
4764 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4765 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4766 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4768 if (shader
->key
.as_es
) {
4769 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4770 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4771 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
4773 declare_streamout_params(ctx
, &shader
->selector
->so
);
4774 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4778 declare_tes_input_vgprs(ctx
);
4781 case PIPE_SHADER_GEOMETRY
:
4782 declare_global_desc_pointers(ctx
);
4783 declare_per_stage_desc_pointers(ctx
, true);
4784 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4785 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
4788 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
4789 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
4790 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4791 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
4792 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
4793 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
4794 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
4795 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4798 case PIPE_SHADER_FRAGMENT
:
4799 declare_global_desc_pointers(ctx
);
4800 declare_per_stage_desc_pointers(ctx
, true);
4801 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
,
4802 SI_PARAM_ALPHA_REF
);
4803 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4804 &ctx
->args
.prim_mask
, SI_PARAM_PRIM_MASK
);
4806 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
4807 SI_PARAM_PERSP_SAMPLE
);
4808 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4809 &ctx
->args
.persp_center
, SI_PARAM_PERSP_CENTER
);
4810 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4811 &ctx
->args
.persp_centroid
, SI_PARAM_PERSP_CENTROID
);
4812 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4813 NULL
, SI_PARAM_PERSP_PULL_MODEL
);
4814 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4815 &ctx
->args
.linear_sample
, SI_PARAM_LINEAR_SAMPLE
);
4816 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4817 &ctx
->args
.linear_center
, SI_PARAM_LINEAR_CENTER
);
4818 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4819 &ctx
->args
.linear_centroid
, SI_PARAM_LINEAR_CENTROID
);
4820 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
,
4821 NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
4822 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4823 &ctx
->args
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4824 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4825 &ctx
->args
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4826 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4827 &ctx
->args
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4828 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4829 &ctx
->args
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4830 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4831 &ctx
->args
.front_face
, SI_PARAM_FRONT_FACE
);
4832 shader
->info
.face_vgpr_index
= 20;
4833 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4834 &ctx
->args
.ancillary
, SI_PARAM_ANCILLARY
);
4835 shader
->info
.ancillary_vgpr_index
= 21;
4836 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4837 &ctx
->args
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4838 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4839 &ctx
->pos_fixed_pt
, SI_PARAM_POS_FIXED_PT
);
4841 /* Color inputs from the prolog. */
4842 if (shader
->selector
->info
.colors_read
) {
4843 unsigned num_color_elements
=
4844 util_bitcount(shader
->selector
->info
.colors_read
);
4846 for (i
= 0; i
< num_color_elements
; i
++)
4847 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
4849 num_prolog_vgprs
+= num_color_elements
;
4852 /* Outputs for the epilog. */
4853 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4856 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4857 shader
->selector
->info
.writes_z
+
4858 shader
->selector
->info
.writes_stencil
+
4859 shader
->selector
->info
.writes_samplemask
+
4860 1 /* SampleMaskIn */;
4862 num_returns
= MAX2(num_returns
,
4864 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4866 for (i
= 0; i
< num_return_sgprs
; i
++)
4867 returns
[i
] = ctx
->i32
;
4868 for (; i
< num_returns
; i
++)
4869 returns
[i
] = ctx
->f32
;
4872 case PIPE_SHADER_COMPUTE
:
4873 declare_global_desc_pointers(ctx
);
4874 declare_per_stage_desc_pointers(ctx
, true);
4875 if (shader
->selector
->info
.uses_grid_size
)
4876 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
,
4877 &ctx
->args
.num_work_groups
);
4878 if (shader
->selector
->info
.uses_block_size
&&
4879 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4880 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
4882 unsigned cs_user_data_dwords
=
4883 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4884 if (cs_user_data_dwords
) {
4885 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
,
4886 &ctx
->cs_user_data
);
4889 /* Hardware SGPRs. */
4890 for (i
= 0; i
< 3; i
++) {
4891 if (shader
->selector
->info
.uses_block_id
[i
]) {
4892 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4893 &ctx
->args
.workgroup_ids
[i
]);
4896 if (shader
->selector
->info
.uses_subgroup_info
)
4897 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
4899 /* Hardware VGPRs. */
4900 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4901 &ctx
->args
.local_invocation_ids
);
4904 assert(0 && "unimplemented shader");
4908 si_create_function(ctx
, "main", returns
, num_returns
,
4909 si_get_max_workgroup_size(shader
));
4911 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4912 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4913 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4914 "InitialPSInputAddr",
4915 S_0286D0_PERSP_SAMPLE_ENA(1) |
4916 S_0286D0_PERSP_CENTER_ENA(1) |
4917 S_0286D0_PERSP_CENTROID_ENA(1) |
4918 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4919 S_0286D0_LINEAR_CENTER_ENA(1) |
4920 S_0286D0_LINEAR_CENTROID_ENA(1) |
4921 S_0286D0_FRONT_FACE_ENA(1) |
4922 S_0286D0_ANCILLARY_ENA(1) |
4923 S_0286D0_POS_FIXED_PT_ENA(1));
4926 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
4927 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
4929 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4930 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4932 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4933 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
4934 /* The LSHS size is not known until draw time, so we append it
4935 * at the end of whatever LDS use there may be in the rest of
4936 * the shader (currently none, unless LLVM decides to do its
4937 * own LDS-based lowering).
4939 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4940 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4941 "__lds_end", AC_ADDR_SPACE_LDS
);
4942 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4944 ac_declare_lds_as_pointer(&ctx
->ac
);
4948 /* Unlike radv, we override these arguments in the prolog, so to the
4949 * API shader they appear as normal arguments.
4951 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4952 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
4953 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
4954 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
4955 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
4956 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
4960 /* Ensure that the esgs ring is declared.
4962 * We declare it with 64KB alignment as a hint that the
4963 * pointer value will always be 0.
4965 static void declare_esgs_ring(struct si_shader_context
*ctx
)
4970 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
4972 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4973 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4976 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
4977 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4981 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4984 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4986 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4988 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
4990 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4991 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
4993 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4995 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4998 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5000 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
5001 /* Declare the ESGS ring as an explicit LDS symbol. */
5002 declare_esgs_ring(ctx
);
5004 ac_declare_lds_as_pointer(&ctx
->ac
);
5005 ctx
->esgs_ring
= ctx
->ac
.lds
;
5010 if (ctx
->shader
->is_gs_copy_shader
) {
5011 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5014 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5015 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5016 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5017 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5018 LLVMValueRef base_ring
;
5020 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5022 /* The conceptual layout of the GSVS ring is
5023 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5024 * but the real memory layout is swizzled across
5026 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5028 * Override the buffer descriptor accordingly.
5030 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5031 uint64_t stream_offset
= 0;
5033 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5034 unsigned num_components
;
5036 unsigned num_records
;
5037 LLVMValueRef ring
, tmp
;
5039 num_components
= sel
->info
.num_stream_output_components
[stream
];
5040 if (!num_components
)
5043 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5045 /* Limit on the stride field for <= GFX7. */
5046 assert(stride
< (1 << 14));
5048 num_records
= ctx
->ac
.wave_size
;
5050 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5051 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5052 tmp
= LLVMBuildAdd(builder
, tmp
,
5053 LLVMConstInt(ctx
->i64
,
5054 stream_offset
, 0), "");
5055 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5057 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5058 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5059 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5060 tmp
= LLVMBuildOr(builder
, tmp
,
5061 LLVMConstInt(ctx
->i32
,
5062 S_008F04_STRIDE(stride
) |
5063 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5064 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5065 ring
= LLVMBuildInsertElement(builder
, ring
,
5066 LLVMConstInt(ctx
->i32
, num_records
, 0),
5067 LLVMConstInt(ctx
->i32
, 2, 0), "");
5070 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5071 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5072 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5073 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5074 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5075 S_008F0C_ADD_TID_ENABLE(1);
5077 if (ctx
->ac
.chip_class
>= GFX10
) {
5078 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5079 S_008F0C_OOB_SELECT(2) |
5080 S_008F0C_RESOURCE_LEVEL(1);
5082 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5083 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5084 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5087 ring
= LLVMBuildInsertElement(builder
, ring
,
5088 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5089 LLVMConstInt(ctx
->i32
, 3, 0), "");
5091 ctx
->gsvs_ring
[stream
] = ring
;
5093 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5094 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5098 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5099 LLVMValueRef param_rw_buffers
,
5100 struct ac_arg param_pos_fixed_pt
)
5102 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5103 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5105 /* Use the fixed-point gl_FragCoord input.
5106 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5107 * per coordinate to get the repeating effect.
5109 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5110 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5112 /* Load the buffer descriptor. */
5113 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5114 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5116 /* The stipple pattern is 32x32, each row has 32 bits. */
5117 offset
= LLVMBuildMul(builder
, address
[1],
5118 LLVMConstInt(ctx
->i32
, 4, 0), "");
5119 row
= buffer_load_const(ctx
, desc
, offset
);
5120 row
= ac_to_integer(&ctx
->ac
, row
);
5121 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5122 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5123 ac_build_kill_if_false(&ctx
->ac
, bit
);
5126 /* For the UMR disassembler. */
5127 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5128 #define DEBUGGER_NUM_MARKERS 5
5130 static bool si_shader_binary_open(struct si_screen
*screen
,
5131 struct si_shader
*shader
,
5132 struct ac_rtld_binary
*rtld
)
5134 const struct si_shader_selector
*sel
= shader
->selector
;
5135 const char *part_elfs
[5];
5136 size_t part_sizes
[5];
5137 unsigned num_parts
= 0;
5139 #define add_part(shader_or_part) \
5140 if (shader_or_part) { \
5141 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5142 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5146 add_part(shader
->prolog
);
5147 add_part(shader
->previous_stage
);
5148 add_part(shader
->prolog2
);
5150 add_part(shader
->epilog
);
5154 struct ac_rtld_symbol lds_symbols
[2];
5155 unsigned num_lds_symbols
= 0;
5157 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5158 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5159 /* We add this symbol even on LLVM <= 8 to ensure that
5160 * shader->config.lds_size is set correctly below.
5162 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5163 sym
->name
= "esgs_ring";
5164 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5165 sym
->align
= 64 * 1024;
5168 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5169 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5170 sym
->name
= "ngg_emit";
5171 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5175 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5176 .info
= &screen
->info
,
5178 .halt_at_entry
= screen
->options
.halt_shaders
,
5180 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5181 .wave_size
= si_get_shader_wave_size(shader
),
5182 .num_parts
= num_parts
,
5183 .elf_ptrs
= part_elfs
,
5184 .elf_sizes
= part_sizes
,
5185 .num_shared_lds_symbols
= num_lds_symbols
,
5186 .shared_lds_symbols
= lds_symbols
});
5188 if (rtld
->lds_size
> 0) {
5189 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5190 shader
->config
.lds_size
=
5191 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5197 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5199 struct ac_rtld_binary rtld
;
5200 si_shader_binary_open(screen
, shader
, &rtld
);
5201 return rtld
.exec_size
;
5204 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5206 uint64_t *scratch_va
= data
;
5208 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5209 *value
= (uint32_t)*scratch_va
;
5212 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5213 /* Enable scratch coalescing. */
5214 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5215 S_008F04_SWIZZLE_ENABLE(1);
5222 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5223 uint64_t scratch_va
)
5225 struct ac_rtld_binary binary
;
5226 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5229 si_resource_reference(&shader
->bo
, NULL
);
5230 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5231 sscreen
->info
.cpdma_prefetch_writes_memory
?
5232 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5233 PIPE_USAGE_IMMUTABLE
,
5234 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5240 struct ac_rtld_upload_info u
= {};
5242 u
.get_external_symbol
= si_get_external_symbol
;
5243 u
.cb_data
= &scratch_va
;
5244 u
.rx_va
= shader
->bo
->gpu_address
;
5245 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5246 PIPE_TRANSFER_READ_WRITE
|
5247 PIPE_TRANSFER_UNSYNCHRONIZED
|
5248 RADEON_TRANSFER_TEMPORARY
);
5252 bool ok
= ac_rtld_upload(&u
);
5254 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5255 ac_rtld_close(&binary
);
5260 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5261 const struct si_shader_binary
*binary
,
5262 enum pipe_shader_type shader_type
,
5264 struct pipe_debug_callback
*debug
,
5265 const char *name
, FILE *file
)
5267 struct ac_rtld_binary rtld_binary
;
5269 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5270 .info
= &screen
->info
,
5271 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5272 .wave_size
= wave_size
,
5274 .elf_ptrs
= &binary
->elf_buffer
,
5275 .elf_sizes
= &binary
->elf_size
}))
5281 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5284 if (nbytes
> INT_MAX
)
5287 if (debug
&& debug
->debug_message
) {
5288 /* Very long debug messages are cut off, so send the
5289 * disassembly one line at a time. This causes more
5290 * overhead, but on the plus side it simplifies
5291 * parsing of resulting logs.
5293 pipe_debug_message(debug
, SHADER_INFO
,
5294 "Shader Disassembly Begin");
5297 while (line
< nbytes
) {
5298 int count
= nbytes
- line
;
5299 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5301 count
= nl
- (disasm
+ line
);
5304 pipe_debug_message(debug
, SHADER_INFO
,
5305 "%.*s", count
, disasm
+ line
);
5311 pipe_debug_message(debug
, SHADER_INFO
,
5312 "Shader Disassembly End");
5316 fprintf(file
, "Shader %s disassembly:\n", name
);
5317 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5321 ac_rtld_close(&rtld_binary
);
5324 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5326 struct si_screen
*sscreen
= shader
->selector
->screen
;
5327 struct ac_shader_config
*conf
= &shader
->config
;
5328 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5329 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5330 unsigned lds_per_wave
= 0;
5331 unsigned max_simd_waves
;
5333 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
5335 /* Compute LDS usage for PS. */
5336 switch (shader
->selector
->type
) {
5337 case PIPE_SHADER_FRAGMENT
:
5338 /* The minimum usage per wave is (num_inputs * 48). The maximum
5339 * usage is (num_inputs * 48 * 16).
5340 * We can get anything in between and it varies between waves.
5342 * The 48 bytes per input for a single primitive is equal to
5343 * 4 bytes/component * 4 components/input * 3 points.
5345 * Other stages don't know the size at compile time or don't
5346 * allocate LDS per wave, but instead they do it per thread group.
5348 lds_per_wave
= conf
->lds_size
* lds_increment
+
5349 align(num_inputs
* 48, lds_increment
);
5351 case PIPE_SHADER_COMPUTE
:
5352 if (shader
->selector
) {
5353 unsigned max_workgroup_size
=
5354 si_get_max_workgroup_size(shader
);
5355 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5356 DIV_ROUND_UP(max_workgroup_size
,
5357 sscreen
->compute_wave_size
);
5363 /* Compute the per-SIMD wave counts. */
5364 if (conf
->num_sgprs
) {
5366 MIN2(max_simd_waves
,
5367 sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
5370 if (conf
->num_vgprs
) {
5371 /* Always print wave limits as Wave64, so that we can compare
5372 * Wave32 and Wave64 with shader-db fairly. */
5373 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
5374 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
5377 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
5378 * 16KB makes some SIMDs unoccupied).
5380 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
5382 unsigned max_lds_size
= sscreen
->info
.chip_class
>= GFX10
? 128*1024 : 64*1024;
5383 unsigned max_lds_per_simd
= max_lds_size
/ 4;
5385 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
5387 shader
->info
.max_simd_waves
= max_simd_waves
;
5390 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5391 struct si_shader
*shader
,
5392 struct pipe_debug_callback
*debug
)
5394 const struct ac_shader_config
*conf
= &shader
->config
;
5396 if (screen
->options
.debug_disassembly
)
5397 si_shader_dump_disassembly(screen
, &shader
->binary
,
5398 shader
->selector
->type
,
5399 si_get_shader_wave_size(shader
),
5400 debug
, "main", NULL
);
5402 pipe_debug_message(debug
, SHADER_INFO
,
5403 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5404 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5405 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5406 conf
->num_sgprs
, conf
->num_vgprs
,
5407 si_get_shader_binary_size(screen
, shader
),
5408 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5409 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5410 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5413 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5414 struct si_shader
*shader
,
5416 bool check_debug_option
)
5418 const struct ac_shader_config
*conf
= &shader
->config
;
5420 if (!check_debug_option
||
5421 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5422 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5423 fprintf(file
, "*** SHADER CONFIG ***\n"
5424 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5425 "SPI_PS_INPUT_ENA = 0x%04x\n",
5426 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5429 fprintf(file
, "*** SHADER STATS ***\n"
5432 "Spilled SGPRs: %d\n"
5433 "Spilled VGPRs: %d\n"
5434 "Private memory VGPRs: %d\n"
5435 "Code Size: %d bytes\n"
5437 "Scratch: %d bytes per wave\n"
5439 "********************\n\n\n",
5440 conf
->num_sgprs
, conf
->num_vgprs
,
5441 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5442 shader
->info
.private_mem_vgprs
,
5443 si_get_shader_binary_size(sscreen
, shader
),
5444 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5445 shader
->info
.max_simd_waves
);
5449 const char *si_get_shader_name(const struct si_shader
*shader
)
5451 switch (shader
->selector
->type
) {
5452 case PIPE_SHADER_VERTEX
:
5453 if (shader
->key
.as_es
)
5454 return "Vertex Shader as ES";
5455 else if (shader
->key
.as_ls
)
5456 return "Vertex Shader as LS";
5457 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5458 return "Vertex Shader as Primitive Discard CS";
5459 else if (shader
->key
.as_ngg
)
5460 return "Vertex Shader as ESGS";
5462 return "Vertex Shader as VS";
5463 case PIPE_SHADER_TESS_CTRL
:
5464 return "Tessellation Control Shader";
5465 case PIPE_SHADER_TESS_EVAL
:
5466 if (shader
->key
.as_es
)
5467 return "Tessellation Evaluation Shader as ES";
5468 else if (shader
->key
.as_ngg
)
5469 return "Tessellation Evaluation Shader as ESGS";
5471 return "Tessellation Evaluation Shader as VS";
5472 case PIPE_SHADER_GEOMETRY
:
5473 if (shader
->is_gs_copy_shader
)
5474 return "GS Copy Shader as VS";
5476 return "Geometry Shader";
5477 case PIPE_SHADER_FRAGMENT
:
5478 return "Pixel Shader";
5479 case PIPE_SHADER_COMPUTE
:
5480 return "Compute Shader";
5482 return "Unknown Shader";
5486 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5487 struct pipe_debug_callback
*debug
,
5488 FILE *file
, bool check_debug_option
)
5490 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5492 if (!check_debug_option
||
5493 si_can_dump_shader(sscreen
, shader_type
))
5494 si_dump_shader_key(shader
, file
);
5496 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5497 if (shader
->previous_stage
&&
5498 shader
->previous_stage
->binary
.llvm_ir_string
) {
5499 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5500 si_get_shader_name(shader
));
5501 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5504 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5505 si_get_shader_name(shader
));
5506 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5509 if (!check_debug_option
||
5510 (si_can_dump_shader(sscreen
, shader_type
) &&
5511 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5512 unsigned wave_size
= si_get_shader_wave_size(shader
);
5514 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5517 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5518 shader_type
, wave_size
, debug
, "prolog", file
);
5519 if (shader
->previous_stage
)
5520 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5521 shader_type
, wave_size
, debug
, "previous stage", file
);
5522 if (shader
->prolog2
)
5523 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5524 shader_type
, wave_size
, debug
, "prolog2", file
);
5526 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5527 wave_size
, debug
, "main", file
);
5530 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5531 shader_type
, wave_size
, debug
, "epilog", file
);
5532 fprintf(file
, "\n");
5535 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5538 static int si_compile_llvm(struct si_screen
*sscreen
,
5539 struct si_shader_binary
*binary
,
5540 struct ac_shader_config
*conf
,
5541 struct ac_llvm_compiler
*compiler
,
5543 struct pipe_debug_callback
*debug
,
5544 enum pipe_shader_type shader_type
,
5547 bool less_optimized
)
5549 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5551 if (si_can_dump_shader(sscreen
, shader_type
)) {
5552 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5554 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5555 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5556 ac_dump_module(mod
);
5557 fprintf(stderr
, "\n");
5561 if (sscreen
->record_llvm_ir
) {
5562 char *ir
= LLVMPrintModuleToString(mod
);
5563 binary
->llvm_ir_string
= strdup(ir
);
5564 LLVMDisposeMessage(ir
);
5567 if (!si_replace_shader(count
, binary
)) {
5568 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5569 less_optimized
, wave_size
);
5574 struct ac_rtld_binary rtld
;
5575 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5576 .info
= &sscreen
->info
,
5577 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5578 .wave_size
= wave_size
,
5580 .elf_ptrs
= &binary
->elf_buffer
,
5581 .elf_sizes
= &binary
->elf_size
}))
5584 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5585 ac_rtld_close(&rtld
);
5589 /* Enable 64-bit and 16-bit denormals, because there is no performance
5592 * If denormals are enabled, all floating-point output modifiers are
5595 * Don't enable denormals for 32-bit floats, because:
5596 * - Floating-point output modifiers would be ignored by the hw.
5597 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5598 * have to stop using those.
5599 * - GFX6 & GFX7 would be very slow.
5601 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5606 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5608 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5609 LLVMBuildRetVoid(ctx
->ac
.builder
);
5611 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5614 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5616 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5617 struct ac_llvm_compiler
*compiler
,
5618 struct si_shader_selector
*gs_selector
,
5619 struct pipe_debug_callback
*debug
)
5621 struct si_shader_context ctx
;
5622 struct si_shader
*shader
;
5623 LLVMBuilderRef builder
;
5624 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5625 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5629 shader
= CALLOC_STRUCT(si_shader
);
5633 /* We can leave the fence as permanently signaled because the GS copy
5634 * shader only becomes visible globally after it has been compiled. */
5635 util_queue_fence_init(&shader
->ready
);
5637 shader
->selector
= gs_selector
;
5638 shader
->is_gs_copy_shader
= true;
5640 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5641 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5643 ctx
.shader
= shader
;
5644 ctx
.type
= PIPE_SHADER_VERTEX
;
5646 builder
= ctx
.ac
.builder
;
5648 create_function(&ctx
);
5649 preload_ring_buffers(&ctx
);
5651 LLVMValueRef voffset
=
5652 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5653 LLVMConstInt(ctx
.i32
, 4, 0), "");
5655 /* Fetch the vertex stream ID.*/
5656 LLVMValueRef stream_id
;
5658 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5659 stream_id
= si_unpack_param(&ctx
, ctx
.streamout_config
, 24, 2);
5661 stream_id
= ctx
.i32_0
;
5663 /* Fill in output information. */
5664 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5665 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5666 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5668 for (int chan
= 0; chan
< 4; chan
++) {
5669 outputs
[i
].vertex_stream
[chan
] =
5670 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5674 LLVMBasicBlockRef end_bb
;
5675 LLVMValueRef switch_inst
;
5677 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5678 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5680 for (int stream
= 0; stream
< 4; stream
++) {
5681 LLVMBasicBlockRef bb
;
5684 if (!gsinfo
->num_stream_output_components
[stream
])
5687 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5690 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5691 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5692 LLVMPositionBuilderAtEnd(builder
, bb
);
5694 /* Fetch vertex data from GSVS ring */
5696 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5697 for (unsigned chan
= 0; chan
< 4; chan
++) {
5698 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5699 outputs
[i
].vertex_stream
[chan
] != stream
) {
5700 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5704 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5705 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5708 outputs
[i
].values
[chan
] =
5709 ac_build_buffer_load(&ctx
.ac
,
5710 ctx
.gsvs_ring
[0], 1,
5712 soffset
, 0, ac_glc
| ac_slc
,
5717 /* Streamout and exports. */
5718 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5719 si_llvm_emit_streamout(&ctx
, outputs
,
5720 gsinfo
->num_outputs
,
5725 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5727 LLVMBuildBr(builder
, end_bb
);
5730 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5732 LLVMBuildRetVoid(ctx
.ac
.builder
);
5734 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5735 si_llvm_optimize_module(&ctx
);
5738 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5739 &ctx
.shader
->config
, ctx
.compiler
,
5741 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5742 "GS Copy Shader", false) == 0) {
5743 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5744 fprintf(stderr
, "GS Copy Shader:\n");
5745 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5747 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5748 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5753 si_llvm_dispose(&ctx
);
5759 si_fix_resource_usage(sscreen
, shader
);
5764 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5765 const struct si_vs_prolog_bits
*prolog
,
5766 const char *prefix
, FILE *f
)
5768 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5769 prefix
, prolog
->instance_divisor_is_one
);
5770 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5771 prefix
, prolog
->instance_divisor_is_fetched
);
5772 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5773 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5774 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5775 prefix
, prolog
->ls_vgpr_fix
);
5777 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5778 fprintf(f
, " mono.vs.fix_fetch = {");
5779 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5780 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5786 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5787 fix
.u
.num_channels_m1
, fix
.u
.format
);
5792 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5794 const struct si_shader_key
*key
= &shader
->key
;
5795 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5797 fprintf(f
, "SHADER KEY\n");
5799 switch (shader_type
) {
5800 case PIPE_SHADER_VERTEX
:
5801 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5802 "part.vs.prolog", f
);
5803 fprintf(f
, " as_es = %u\n", key
->as_es
);
5804 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5805 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5806 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5807 key
->mono
.u
.vs_export_prim_id
);
5808 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5809 key
->opt
.vs_as_prim_discard_cs
);
5810 fprintf(f
, " opt.cs_prim_type = %s\n",
5811 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5812 fprintf(f
, " opt.cs_indexed = %u\n",
5813 key
->opt
.cs_indexed
);
5814 fprintf(f
, " opt.cs_instancing = %u\n",
5815 key
->opt
.cs_instancing
);
5816 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5817 key
->opt
.cs_primitive_restart
);
5818 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5819 key
->opt
.cs_provoking_vertex_first
);
5820 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5821 key
->opt
.cs_need_correct_orientation
);
5822 fprintf(f
, " opt.cs_cull_front = %u\n",
5823 key
->opt
.cs_cull_front
);
5824 fprintf(f
, " opt.cs_cull_back = %u\n",
5825 key
->opt
.cs_cull_back
);
5826 fprintf(f
, " opt.cs_cull_z = %u\n",
5827 key
->opt
.cs_cull_z
);
5828 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5829 key
->opt
.cs_halfz_clip_space
);
5832 case PIPE_SHADER_TESS_CTRL
:
5833 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5834 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5835 "part.tcs.ls_prolog", f
);
5837 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5838 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5841 case PIPE_SHADER_TESS_EVAL
:
5842 fprintf(f
, " as_es = %u\n", key
->as_es
);
5843 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5844 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5845 key
->mono
.u
.vs_export_prim_id
);
5848 case PIPE_SHADER_GEOMETRY
:
5849 if (shader
->is_gs_copy_shader
)
5852 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5853 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5854 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5855 "part.gs.vs_prolog", f
);
5857 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5858 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5859 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5862 case PIPE_SHADER_COMPUTE
:
5865 case PIPE_SHADER_FRAGMENT
:
5866 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5867 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5868 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5869 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5870 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5871 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5872 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5873 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5874 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5875 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5876 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5877 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5878 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5879 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5880 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5881 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5882 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5883 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5884 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5885 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5886 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5887 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5894 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5895 shader_type
== PIPE_SHADER_TESS_EVAL
||
5896 shader_type
== PIPE_SHADER_VERTEX
) &&
5897 !key
->as_es
&& !key
->as_ls
) {
5898 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5899 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5903 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5904 struct si_screen
*sscreen
,
5905 struct ac_llvm_compiler
*compiler
,
5909 struct lp_build_tgsi_context
*bld_base
;
5911 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5912 nir
? 64 : wave_size
);
5914 bld_base
= &ctx
->bld_base
;
5915 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5917 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5918 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5919 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5921 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5923 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5925 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5926 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5927 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5928 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5930 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5931 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5932 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5933 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5934 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5935 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5936 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5937 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5939 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5940 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5941 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5944 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5946 struct si_shader
*shader
= ctx
->shader
;
5947 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5949 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5950 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5951 shader
->key
.as_ls
||
5955 ac_optimize_vs_outputs(&ctx
->ac
,
5957 shader
->info
.vs_output_param_offset
,
5959 &shader
->info
.nr_param_exports
);
5962 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5963 struct ac_arg param
, unsigned bitoffset
)
5965 LLVMValueRef args
[] = {
5966 ac_get_arg(&ctx
->ac
, param
),
5967 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5969 ac_build_intrinsic(&ctx
->ac
,
5970 "llvm.amdgcn.init.exec.from.input",
5971 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5974 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5975 const struct si_vs_prolog_bits
*key
)
5977 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5979 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5982 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5983 struct nir_shader
*nir
, bool free_nir
)
5985 struct si_shader
*shader
= ctx
->shader
;
5986 struct si_shader_selector
*sel
= shader
->selector
;
5987 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5989 // TODO clean all this up!
5990 switch (ctx
->type
) {
5991 case PIPE_SHADER_VERTEX
:
5992 ctx
->load_input
= declare_input_vs
;
5993 if (shader
->key
.as_ls
)
5994 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5995 else if (shader
->key
.as_es
)
5996 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5997 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5998 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
5999 else if (shader
->key
.as_ngg
)
6000 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6002 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6003 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6004 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6006 case PIPE_SHADER_TESS_CTRL
:
6007 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6008 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6009 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6010 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6011 bld_base
->emit_store
= store_output_tcs
;
6012 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6013 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6014 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6015 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6017 case PIPE_SHADER_TESS_EVAL
:
6018 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6019 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6020 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6021 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6022 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6023 if (shader
->key
.as_es
)
6024 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6025 else if (shader
->key
.as_ngg
)
6026 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6028 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6029 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6031 case PIPE_SHADER_GEOMETRY
:
6032 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6033 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6034 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6035 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6036 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6037 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6039 case PIPE_SHADER_FRAGMENT
:
6040 ctx
->load_input
= declare_input_fs
;
6041 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6042 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6043 ctx
->abi
.load_sample_position
= load_sample_position
;
6044 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6045 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6046 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6048 case PIPE_SHADER_COMPUTE
:
6049 ctx
->abi
.load_local_group_size
= get_block_size
;
6052 assert(!"Unsupported shader type");
6056 ctx
->abi
.load_ubo
= load_ubo
;
6057 ctx
->abi
.load_ssbo
= load_ssbo
;
6059 create_function(ctx
);
6060 preload_ring_buffers(ctx
);
6062 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6063 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6064 for (unsigned i
= 0; i
< 6; i
++) {
6065 ctx
->invoc0_tess_factors
[i
] =
6066 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6070 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6071 for (unsigned i
= 0; i
< 4; i
++) {
6072 ctx
->gs_next_vertex
[i
] =
6073 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6075 if (shader
->key
.as_ngg
) {
6076 for (unsigned i
= 0; i
< 4; ++i
) {
6077 ctx
->gs_curprim_verts
[i
] =
6078 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6079 ctx
->gs_generated_prims
[i
] =
6080 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6083 unsigned scratch_size
= 8;
6084 if (sel
->so
.num_outputs
)
6087 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6088 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6089 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6090 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6091 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6093 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6094 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6095 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6096 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6100 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6101 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6102 /* Unconditionally declare scratch space base for streamout and
6103 * vertex compaction. Whether space is actually allocated is
6104 * determined during linking / PM4 creation.
6106 * Add an extra dword per vertex to ensure an odd stride, which
6107 * avoids bank conflicts for SoA accesses.
6109 declare_esgs_ring(ctx
);
6111 /* This is really only needed when streamout and / or vertex
6112 * compaction is enabled.
6114 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6115 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6116 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6117 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6118 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6121 /* For GFX9 merged shaders:
6122 * - Set EXEC for the first shader. If the prolog is present, set
6123 * EXEC there instead.
6124 * - Add a barrier before the second shader.
6125 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6126 * an if-statement. This is required for correctness in geometry
6127 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6130 * For monolithic merged shaders, the first shader is wrapped in an
6131 * if-block together with its prolog in si_build_wrapper_function.
6133 * NGG vertex and tess eval shaders running as the last
6134 * vertex/geometry stage handle execution explicitly using
6137 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6138 if (!shader
->is_monolithic
&&
6139 sel
->info
.num_instructions
> 1 && /* not empty shader */
6140 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6141 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6142 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6143 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6144 si_init_exec_from_input(ctx
,
6145 ctx
->merged_wave_info
, 0);
6146 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6147 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6148 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6149 LLVMValueRef num_threads
;
6150 bool nested_barrier
;
6152 if (!shader
->is_monolithic
||
6153 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6154 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6155 ac_init_exec_full_mask(&ctx
->ac
);
6157 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6158 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6159 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6160 gfx10_ngg_gs_emit_prologue(ctx
);
6161 nested_barrier
= false;
6163 nested_barrier
= true;
6166 /* Number of patches / primitives */
6167 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 8, 8);
6169 /* Number of vertices */
6170 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 0, 8);
6171 nested_barrier
= false;
6175 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6176 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6178 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6179 ctx
->merged_wrap_if_label
= 11500;
6180 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6182 if (nested_barrier
) {
6183 /* Execute a barrier before the second shader in
6186 * Execute the barrier inside the conditional block,
6187 * so that empty waves can jump directly to s_endpgm,
6188 * which will also signal the barrier.
6190 * This is possible in gfx9, because an empty wave
6191 * for the second shader does not participate in
6192 * the epilogue. With NGG, empty waves may still
6193 * be required to export data (e.g. GS output vertices),
6194 * so we cannot let them exit early.
6196 * If the shader is TCS and the TCS epilog is present
6197 * and contains a barrier, it will wait there and then
6200 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6205 if (sel
->force_correct_derivs_after_kill
) {
6206 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6207 /* true = don't kill. */
6208 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6209 ctx
->postponed_kill
);
6213 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6214 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6218 bool success
= si_nir_build_llvm(ctx
, nir
);
6222 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6227 si_llvm_build_ret(ctx
, ctx
->return_value
);
6232 * Compute the VS prolog key, which contains all the information needed to
6233 * build the VS prolog function, and set shader->info bits where needed.
6235 * \param info Shader info of the vertex shader.
6236 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6237 * \param prolog_key Key of the VS prolog
6238 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6239 * \param key Output shader part key.
6241 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6242 unsigned num_input_sgprs
,
6243 const struct si_vs_prolog_bits
*prolog_key
,
6244 struct si_shader
*shader_out
,
6245 union si_shader_part_key
*key
)
6247 memset(key
, 0, sizeof(*key
));
6248 key
->vs_prolog
.states
= *prolog_key
;
6249 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6250 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6251 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6252 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6253 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6255 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6256 key
->vs_prolog
.as_ls
= 1;
6257 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6258 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6259 key
->vs_prolog
.as_es
= 1;
6260 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6261 } else if (shader_out
->key
.as_ngg
) {
6262 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6265 /* Enable loading the InstanceID VGPR. */
6266 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6268 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6269 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6270 shader_out
->info
.uses_instanceid
= true;
6274 * Compute the PS prolog key, which contains all the information needed to
6275 * build the PS prolog function, and set related bits in shader->config.
6277 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6278 union si_shader_part_key
*key
,
6279 bool separate_prolog
)
6281 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6283 memset(key
, 0, sizeof(*key
));
6284 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6285 key
->ps_prolog
.colors_read
= info
->colors_read
;
6286 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6287 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6288 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6289 (key
->ps_prolog
.colors_read
||
6290 key
->ps_prolog
.states
.force_persp_sample_interp
||
6291 key
->ps_prolog
.states
.force_linear_sample_interp
||
6292 key
->ps_prolog
.states
.force_persp_center_interp
||
6293 key
->ps_prolog
.states
.force_linear_center_interp
||
6294 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6295 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6296 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6298 if (info
->colors_read
) {
6299 unsigned *color
= shader
->selector
->color_attr_index
;
6301 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6302 /* BCOLORs are stored after the last input. */
6303 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6304 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6305 if (separate_prolog
)
6306 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6309 for (unsigned i
= 0; i
< 2; i
++) {
6310 unsigned interp
= info
->input_interpolate
[color
[i
]];
6311 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6313 if (!(info
->colors_read
& (0xf << i
*4)))
6316 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6318 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6319 interp
== TGSI_INTERPOLATE_COLOR
)
6320 interp
= TGSI_INTERPOLATE_CONSTANT
;
6323 case TGSI_INTERPOLATE_CONSTANT
:
6324 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6326 case TGSI_INTERPOLATE_PERSPECTIVE
:
6327 case TGSI_INTERPOLATE_COLOR
:
6328 /* Force the interpolation location for colors here. */
6329 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6330 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6331 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6332 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6335 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6336 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6337 if (separate_prolog
) {
6338 shader
->config
.spi_ps_input_ena
|=
6339 S_0286CC_PERSP_SAMPLE_ENA(1);
6342 case TGSI_INTERPOLATE_LOC_CENTER
:
6343 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6344 if (separate_prolog
) {
6345 shader
->config
.spi_ps_input_ena
|=
6346 S_0286CC_PERSP_CENTER_ENA(1);
6349 case TGSI_INTERPOLATE_LOC_CENTROID
:
6350 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6351 if (separate_prolog
) {
6352 shader
->config
.spi_ps_input_ena
|=
6353 S_0286CC_PERSP_CENTROID_ENA(1);
6360 case TGSI_INTERPOLATE_LINEAR
:
6361 /* Force the interpolation location for colors here. */
6362 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6363 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6364 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6365 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6367 /* The VGPR assignment for non-monolithic shaders
6368 * works because InitialPSInputAddr is set on the
6369 * main shader and PERSP_PULL_MODEL is never used.
6372 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6373 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6374 separate_prolog
? 6 : 9;
6375 if (separate_prolog
) {
6376 shader
->config
.spi_ps_input_ena
|=
6377 S_0286CC_LINEAR_SAMPLE_ENA(1);
6380 case TGSI_INTERPOLATE_LOC_CENTER
:
6381 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6382 separate_prolog
? 8 : 11;
6383 if (separate_prolog
) {
6384 shader
->config
.spi_ps_input_ena
|=
6385 S_0286CC_LINEAR_CENTER_ENA(1);
6388 case TGSI_INTERPOLATE_LOC_CENTROID
:
6389 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6390 separate_prolog
? 10 : 13;
6391 if (separate_prolog
) {
6392 shader
->config
.spi_ps_input_ena
|=
6393 S_0286CC_LINEAR_CENTROID_ENA(1);
6408 * Check whether a PS prolog is required based on the key.
6410 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6412 return key
->ps_prolog
.colors_read
||
6413 key
->ps_prolog
.states
.force_persp_sample_interp
||
6414 key
->ps_prolog
.states
.force_linear_sample_interp
||
6415 key
->ps_prolog
.states
.force_persp_center_interp
||
6416 key
->ps_prolog
.states
.force_linear_center_interp
||
6417 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6418 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6419 key
->ps_prolog
.states
.poly_stipple
||
6420 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6424 * Compute the PS epilog key, which contains all the information needed to
6425 * build the PS epilog function.
6427 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6428 union si_shader_part_key
*key
)
6430 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6431 memset(key
, 0, sizeof(*key
));
6432 key
->ps_epilog
.colors_written
= info
->colors_written
;
6433 key
->ps_epilog
.writes_z
= info
->writes_z
;
6434 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6435 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6436 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6440 * Build the GS prolog function. Rotate the input vertices for triangle strips
6443 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6444 union si_shader_part_key
*key
)
6446 unsigned num_sgprs
, num_vgprs
;
6447 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6448 LLVMTypeRef returns
[48];
6449 LLVMValueRef func
, ret
;
6451 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6453 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6454 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6455 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6457 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6458 num_vgprs
= 5; /* ES inputs are not needed by GS */
6460 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6464 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6465 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
6466 returns
[i
] = ctx
->i32
;
6469 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6470 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
6471 returns
[num_sgprs
+ i
] = ctx
->f32
;
6474 /* Create the function. */
6475 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6477 func
= ctx
->main_fn
;
6479 /* Set the full EXEC mask for the prolog, because we are only fiddling
6480 * with registers here. The main shader part will set the correct EXEC
6483 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6484 ac_init_exec_full_mask(&ctx
->ac
);
6486 /* Copy inputs to outputs. This should be no-op, as the registers match,
6487 * but it will prevent the compiler from overwriting them unintentionally.
6489 ret
= ctx
->return_value
;
6490 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6491 LLVMValueRef p
= LLVMGetParam(func
, i
);
6492 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6494 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6495 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6496 p
= ac_to_float(&ctx
->ac
, p
);
6497 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6500 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6501 /* Remap the input vertices for every other primitive. */
6502 const struct ac_arg gfx6_vtx_params
[6] = {
6503 { .used
= true, .arg_index
= num_sgprs
},
6504 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6505 { .used
= true, .arg_index
= num_sgprs
+ 3 },
6506 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6507 { .used
= true, .arg_index
= num_sgprs
+ 5 },
6508 { .used
= true, .arg_index
= num_sgprs
+ 6 },
6510 const struct ac_arg gfx9_vtx_params
[3] = {
6511 { .used
= true, .arg_index
= num_sgprs
},
6512 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6513 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6515 LLVMValueRef vtx_in
[6], vtx_out
[6];
6516 LLVMValueRef prim_id
, rotate
;
6518 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6519 for (unsigned i
= 0; i
< 3; i
++) {
6520 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6521 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6524 for (unsigned i
= 0; i
< 6; i
++)
6525 vtx_in
[i
] = ac_get_arg(&ctx
->ac
, gfx6_vtx_params
[i
]);
6528 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6529 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6531 for (unsigned i
= 0; i
< 6; ++i
) {
6532 LLVMValueRef base
, rotated
;
6534 rotated
= vtx_in
[(i
+ 4) % 6];
6535 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6538 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6539 for (unsigned i
= 0; i
< 3; i
++) {
6540 LLVMValueRef hi
, out
;
6542 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6543 LLVMConstInt(ctx
->i32
, 16, 0), "");
6544 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6545 out
= ac_to_float(&ctx
->ac
, out
);
6546 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6547 gfx9_vtx_params
[i
].arg_index
, "");
6550 for (unsigned i
= 0; i
< 6; i
++) {
6553 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6554 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6555 gfx6_vtx_params
[i
].arg_index
, "");
6560 LLVMBuildRet(builder
, ret
);
6564 * Given a list of shader part functions, build a wrapper function that
6565 * runs them in sequence to form a monolithic shader.
6567 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6568 LLVMValueRef
*parts
,
6571 unsigned next_shader_first_part
)
6573 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6574 /* PS epilog has one arg per color component; gfx9 merged shader
6575 * prologs need to forward 32 user SGPRs.
6577 LLVMValueRef initial
[64], out
[64];
6578 LLVMTypeRef function_type
;
6579 unsigned num_first_params
;
6580 unsigned num_out
, initial_num_out
;
6581 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6582 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6583 unsigned num_sgprs
, num_vgprs
;
6586 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6588 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6589 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6590 AC_FUNC_ATTR_ALWAYSINLINE
);
6591 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6594 /* The parameters of the wrapper function correspond to those of the
6595 * first part in terms of SGPRs and VGPRs, but we use the types of the
6596 * main part to get the right types. This is relevant for the
6597 * dereferenceable attribute on descriptor table pointers.
6602 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6603 num_first_params
= LLVMCountParamTypes(function_type
);
6605 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6606 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6608 if (ac_is_sgpr_param(param
)) {
6609 assert(num_vgprs
== 0);
6610 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6612 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6617 while (gprs
< num_sgprs
+ num_vgprs
) {
6618 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], ctx
->args
.arg_count
);
6619 LLVMTypeRef type
= LLVMTypeOf(param
);
6620 unsigned size
= ac_get_type_size(type
) / 4;
6622 /* This is going to get casted anyways, so we don't have to
6623 * have the exact same type. But we do have to preserve the
6624 * pointer-ness so that LLVM knows about it.
6626 enum ac_arg_type arg_type
= AC_ARG_INT
;
6627 if (LLVMGetTypeKind(type
) == LLVMPointerTypeKind
) {
6628 arg_type
= AC_ARG_CONST_PTR
;
6631 ac_add_arg(&ctx
->args
, gprs
< num_sgprs
? AC_ARG_SGPR
: AC_ARG_VGPR
,
6632 size
, arg_type
, NULL
);
6634 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6635 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6636 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6641 /* Prepare the return type. */
6642 unsigned num_returns
= 0;
6643 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6645 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6646 return_type
= LLVMGetReturnType(last_func_type
);
6648 switch (LLVMGetTypeKind(return_type
)) {
6649 case LLVMStructTypeKind
:
6650 num_returns
= LLVMCountStructElementTypes(return_type
);
6651 assert(num_returns
<= ARRAY_SIZE(returns
));
6652 LLVMGetStructElementTypes(return_type
, returns
);
6654 case LLVMVoidTypeKind
:
6657 unreachable("unexpected type");
6660 si_create_function(ctx
, "wrapper", returns
, num_returns
,
6661 si_get_max_workgroup_size(ctx
->shader
));
6663 if (is_merged_shader(ctx
))
6664 ac_init_exec_full_mask(&ctx
->ac
);
6666 /* Record the arguments of the function as if they were an output of
6672 for (unsigned i
= 0; i
< ctx
->args
.arg_count
; ++i
) {
6673 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6674 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6675 LLVMTypeRef out_type
= ctx
->args
.args
[i
].file
== AC_ARG_SGPR
? ctx
->i32
: ctx
->f32
;
6676 unsigned size
= ac_get_type_size(param_type
) / 4;
6679 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6680 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6681 param_type
= ctx
->i32
;
6684 if (param_type
!= out_type
)
6685 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6686 out
[num_out
++] = param
;
6688 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6690 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6691 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6692 param_type
= ctx
->i64
;
6695 if (param_type
!= vector_type
)
6696 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6698 for (unsigned j
= 0; j
< size
; ++j
)
6699 out
[num_out
++] = LLVMBuildExtractElement(
6700 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6703 if (ctx
->args
.args
[i
].file
== AC_ARG_SGPR
)
6704 num_out_sgpr
= num_out
;
6707 memcpy(initial
, out
, sizeof(out
));
6708 initial_num_out
= num_out
;
6709 initial_num_out_sgpr
= num_out_sgpr
;
6711 /* Now chain the parts. */
6712 LLVMValueRef ret
= NULL
;
6713 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6714 LLVMValueRef in
[48];
6715 LLVMTypeRef ret_type
;
6716 unsigned out_idx
= 0;
6717 unsigned num_params
= LLVMCountParams(parts
[part
]);
6719 /* Merged shaders are executed conditionally depending
6720 * on the number of enabled threads passed in the input SGPRs. */
6721 if (is_multi_part_shader(ctx
) && part
== 0) {
6722 LLVMValueRef ena
, count
= initial
[3];
6724 count
= LLVMBuildAnd(builder
, count
,
6725 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6726 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6727 ac_get_thread_id(&ctx
->ac
), count
, "");
6728 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6731 /* Derive arguments for the next part from outputs of the
6734 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6736 LLVMTypeRef param_type
;
6738 unsigned param_size
;
6739 LLVMValueRef arg
= NULL
;
6741 param
= LLVMGetParam(parts
[part
], param_idx
);
6742 param_type
= LLVMTypeOf(param
);
6743 param_size
= ac_get_type_size(param_type
) / 4;
6744 is_sgpr
= ac_is_sgpr_param(param
);
6747 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6748 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6749 } else if (out_idx
< num_out_sgpr
) {
6750 /* Skip returned SGPRs the current part doesn't
6751 * declare on the input. */
6752 out_idx
= num_out_sgpr
;
6755 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6757 if (param_size
== 1)
6760 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6762 if (LLVMTypeOf(arg
) != param_type
) {
6763 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6764 if (LLVMGetPointerAddressSpace(param_type
) ==
6765 AC_ADDR_SPACE_CONST_32BIT
) {
6766 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6767 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6769 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6770 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6773 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6777 in
[param_idx
] = arg
;
6778 out_idx
+= param_size
;
6781 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6783 if (is_multi_part_shader(ctx
) &&
6784 part
+ 1 == next_shader_first_part
) {
6785 ac_build_endif(&ctx
->ac
, 6506);
6787 /* The second half of the merged shader should use
6788 * the inputs from the toplevel (wrapper) function,
6789 * not the return value from the last call.
6791 * That's because the last call was executed condi-
6792 * tionally, so we can't consume it in the main
6795 memcpy(out
, initial
, sizeof(initial
));
6796 num_out
= initial_num_out
;
6797 num_out_sgpr
= initial_num_out_sgpr
;
6801 /* Extract the returned GPRs. */
6802 ret_type
= LLVMTypeOf(ret
);
6806 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6807 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6809 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6811 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6813 LLVMBuildExtractValue(builder
, ret
, i
, "");
6815 assert(num_out
< ARRAY_SIZE(out
));
6816 out
[num_out
++] = val
;
6818 if (LLVMTypeOf(val
) == ctx
->i32
) {
6819 assert(num_out_sgpr
+ 1 == num_out
);
6820 num_out_sgpr
= num_out
;
6826 /* Return the value from the last part. */
6827 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6828 LLVMBuildRetVoid(builder
);
6830 LLVMBuildRet(builder
, ret
);
6833 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6834 struct si_shader_selector
*sel
)
6836 if (!compiler
->low_opt_passes
)
6839 /* Assume a slow CPU. */
6840 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6841 sel
->screen
->info
.chip_class
<= GFX8
);
6843 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6845 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6846 sel
->info
.num_memory_instructions
> 1000;
6849 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
,
6856 } else if (sel
->nir_binary
) {
6857 struct pipe_screen
*screen
= &sel
->screen
->b
;
6858 const void *options
=
6859 screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
,
6862 struct blob_reader blob_reader
;
6863 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
6865 return nir_deserialize(NULL
, options
, &blob_reader
);
6870 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6871 struct ac_llvm_compiler
*compiler
,
6872 struct si_shader
*shader
,
6873 struct pipe_debug_callback
*debug
)
6875 struct si_shader_selector
*sel
= shader
->selector
;
6876 struct si_shader_context ctx
;
6878 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
6881 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6882 * conversion fails. */
6883 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6884 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6886 tgsi_dump(sel
->tokens
, 0);
6888 nir_print_shader(nir
, stderr
);
6889 si_dump_streamout(&sel
->so
);
6892 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6894 si_llvm_context_set_ir(&ctx
, shader
, nir
);
6896 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6897 sizeof(shader
->info
.vs_output_param_offset
));
6899 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6901 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6902 si_llvm_dispose(&ctx
);
6906 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6907 LLVMValueRef parts
[2];
6908 bool need_prolog
= sel
->vs_needs_prolog
;
6910 parts
[1] = ctx
.main_fn
;
6913 union si_shader_part_key prolog_key
;
6914 si_get_vs_prolog_key(&sel
->info
,
6915 shader
->info
.num_input_sgprs
,
6916 &shader
->key
.part
.vs
.prolog
,
6917 shader
, &prolog_key
);
6918 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6919 parts
[0] = ctx
.main_fn
;
6922 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6923 1 + need_prolog
, need_prolog
, 0);
6925 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6926 si_build_prim_discard_compute_shader(&ctx
);
6927 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6928 if (sscreen
->info
.chip_class
>= GFX9
) {
6929 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6930 LLVMValueRef parts
[4];
6931 bool vs_needs_prolog
=
6932 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6935 parts
[2] = ctx
.main_fn
;
6938 union si_shader_part_key tcs_epilog_key
;
6939 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6940 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6941 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6942 parts
[3] = ctx
.main_fn
;
6944 /* VS as LS main part */
6945 nir
= get_nir_shader(ls
, &free_nir
);
6946 struct si_shader shader_ls
= {};
6947 shader_ls
.selector
= ls
;
6948 shader_ls
.key
.as_ls
= 1;
6949 shader_ls
.key
.mono
= shader
->key
.mono
;
6950 shader_ls
.key
.opt
= shader
->key
.opt
;
6951 shader_ls
.is_monolithic
= true;
6952 si_llvm_context_set_ir(&ctx
, &shader_ls
, nir
);
6954 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6955 si_llvm_dispose(&ctx
);
6958 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6959 parts
[1] = ctx
.main_fn
;
6962 if (vs_needs_prolog
) {
6963 union si_shader_part_key vs_prolog_key
;
6964 si_get_vs_prolog_key(&ls
->info
,
6965 shader_ls
.info
.num_input_sgprs
,
6966 &shader
->key
.part
.tcs
.ls_prolog
,
6967 shader
, &vs_prolog_key
);
6968 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6969 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6970 parts
[0] = ctx
.main_fn
;
6973 /* Reset the shader context. */
6974 ctx
.shader
= shader
;
6975 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6977 si_build_wrapper_function(&ctx
,
6978 parts
+ !vs_needs_prolog
,
6979 4 - !vs_needs_prolog
, vs_needs_prolog
,
6980 vs_needs_prolog
? 2 : 1);
6982 LLVMValueRef parts
[2];
6983 union si_shader_part_key epilog_key
;
6985 parts
[0] = ctx
.main_fn
;
6987 memset(&epilog_key
, 0, sizeof(epilog_key
));
6988 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6989 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6990 parts
[1] = ctx
.main_fn
;
6992 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6994 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6995 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6996 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6997 LLVMValueRef es_prolog
= NULL
;
6998 LLVMValueRef es_main
= NULL
;
6999 LLVMValueRef gs_prolog
= NULL
;
7000 LLVMValueRef gs_main
= ctx
.main_fn
;
7003 union si_shader_part_key gs_prolog_key
;
7004 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7005 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7006 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7007 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7008 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7009 gs_prolog
= ctx
.main_fn
;
7012 nir
= get_nir_shader(es
, &free_nir
);
7013 struct si_shader shader_es
= {};
7014 shader_es
.selector
= es
;
7015 shader_es
.key
.as_es
= 1;
7016 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7017 shader_es
.key
.mono
= shader
->key
.mono
;
7018 shader_es
.key
.opt
= shader
->key
.opt
;
7019 shader_es
.is_monolithic
= true;
7020 si_llvm_context_set_ir(&ctx
, &shader_es
, nir
);
7022 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
7023 si_llvm_dispose(&ctx
);
7026 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7027 es_main
= ctx
.main_fn
;
7030 if (es
->vs_needs_prolog
) {
7031 union si_shader_part_key vs_prolog_key
;
7032 si_get_vs_prolog_key(&es
->info
,
7033 shader_es
.info
.num_input_sgprs
,
7034 &shader
->key
.part
.gs
.vs_prolog
,
7035 shader
, &vs_prolog_key
);
7036 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7037 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7038 es_prolog
= ctx
.main_fn
;
7041 /* Reset the shader context. */
7042 ctx
.shader
= shader
;
7043 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7045 /* Prepare the array of shader parts. */
7046 LLVMValueRef parts
[4];
7047 unsigned num_parts
= 0, main_part
, next_first_part
;
7050 parts
[num_parts
++] = es_prolog
;
7052 parts
[main_part
= num_parts
++] = es_main
;
7053 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7054 parts
[num_parts
++] = gs_main
;
7056 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7057 main_part
, next_first_part
);
7059 LLVMValueRef parts
[2];
7060 union si_shader_part_key prolog_key
;
7062 parts
[1] = ctx
.main_fn
;
7064 memset(&prolog_key
, 0, sizeof(prolog_key
));
7065 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7066 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7067 parts
[0] = ctx
.main_fn
;
7069 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7071 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7072 LLVMValueRef parts
[3];
7073 union si_shader_part_key prolog_key
;
7074 union si_shader_part_key epilog_key
;
7077 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7078 need_prolog
= si_need_ps_prolog(&prolog_key
);
7080 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7083 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7084 parts
[0] = ctx
.main_fn
;
7087 si_get_ps_epilog_key(shader
, &epilog_key
);
7088 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7089 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7091 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7092 need_prolog
? 1 : 0, 0);
7095 si_llvm_optimize_module(&ctx
);
7097 /* Post-optimization transformations and analysis. */
7098 si_optimize_vs_outputs(&ctx
);
7100 if ((debug
&& debug
->debug_message
) ||
7101 si_can_dump_shader(sscreen
, ctx
.type
)) {
7102 ctx
.shader
->info
.private_mem_vgprs
=
7103 ac_count_scratch_private_memory(ctx
.main_fn
);
7106 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7107 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7108 LLVMPointerTypeKind
);
7110 /* Compile to bytecode. */
7111 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7112 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7113 si_get_shader_name(shader
),
7114 si_should_optimize_less(compiler
, shader
->selector
));
7115 si_llvm_dispose(&ctx
);
7117 fprintf(stderr
, "LLVM failed to compile shader\n");
7121 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7122 * LLVM 3.9svn has this bug.
7124 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7125 unsigned wave_size
= sscreen
->compute_wave_size
;
7126 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
*
7127 (wave_size
== 32 ? 2 : 1);
7128 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
7129 unsigned max_sgprs_per_wave
= 128;
7130 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
7131 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
7132 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
7133 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
7135 max_vgprs
= max_vgprs
/ waves_per_simd
;
7136 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
7138 if (shader
->config
.num_sgprs
> max_sgprs
||
7139 shader
->config
.num_vgprs
> max_vgprs
) {
7140 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7141 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7142 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7143 max_sgprs
, max_vgprs
);
7145 /* Just terminate the process, because dependent
7146 * shaders can hang due to bad input data, but use
7147 * the env var to allow shader-db to work.
7149 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7154 /* Add the scratch offset to input SGPRs. */
7155 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7156 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7158 /* Calculate the number of fragment input VGPRs. */
7159 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7160 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(&shader
->config
,
7161 &shader
->info
.face_vgpr_index
,
7162 &shader
->info
.ancillary_vgpr_index
);
7165 si_calculate_max_simd_waves(shader
);
7166 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7171 * Create, compile and return a shader part (prolog or epilog).
7173 * \param sscreen screen
7174 * \param list list of shader parts of the same category
7175 * \param type shader type
7176 * \param key shader part key
7177 * \param prolog whether the part being requested is a prolog
7178 * \param tm LLVM target machine
7179 * \param debug debug callback
7180 * \param build the callback responsible for building the main function
7181 * \return non-NULL on success
7183 static struct si_shader_part
*
7184 si_get_shader_part(struct si_screen
*sscreen
,
7185 struct si_shader_part
**list
,
7186 enum pipe_shader_type type
,
7188 union si_shader_part_key
*key
,
7189 struct ac_llvm_compiler
*compiler
,
7190 struct pipe_debug_callback
*debug
,
7191 void (*build
)(struct si_shader_context
*,
7192 union si_shader_part_key
*),
7195 struct si_shader_part
*result
;
7197 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
7199 /* Find existing. */
7200 for (result
= *list
; result
; result
= result
->next
) {
7201 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7202 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7207 /* Compile a new one. */
7208 result
= CALLOC_STRUCT(si_shader_part
);
7211 struct si_shader shader
= {};
7214 case PIPE_SHADER_VERTEX
:
7215 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7216 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7217 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7219 case PIPE_SHADER_TESS_CTRL
:
7221 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7223 case PIPE_SHADER_GEOMETRY
:
7225 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7227 case PIPE_SHADER_FRAGMENT
:
7229 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7231 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7234 unreachable("bad shader part");
7237 struct si_shader_context ctx
;
7238 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7239 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7242 ctx
.shader
= &shader
;
7248 si_llvm_optimize_module(&ctx
);
7250 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7251 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7258 result
->next
= *list
;
7262 si_llvm_dispose(&ctx
);
7263 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7267 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7269 LLVMValueRef ptr
[2], list
;
7270 bool merged_shader
= is_merged_shader(ctx
);
7272 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7273 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7274 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7279 * Build the vertex shader prolog function.
7281 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7282 * All inputs are returned unmodified. The vertex load indices are
7283 * stored after them, which will be used by the API VS for fetching inputs.
7285 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7290 * (VertexID + BaseVertex),
7291 * (InstanceID + StartInstance),
7292 * (InstanceID / 2 + StartInstance)
7294 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7295 union si_shader_part_key
*key
)
7297 LLVMTypeRef
*returns
;
7298 LLVMValueRef ret
, func
;
7300 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7301 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7302 struct ac_arg input_sgpr_param
[key
->vs_prolog
.num_input_sgprs
];
7303 struct ac_arg input_vgpr_param
[9];
7304 LLVMValueRef input_vgprs
[9];
7305 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7307 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7309 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7311 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7312 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7313 sizeof(LLVMTypeRef
));
7316 /* Declare input and output SGPRs. */
7317 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7318 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7319 &input_sgpr_param
[i
]);
7320 returns
[num_returns
++] = ctx
->i32
;
7323 struct ac_arg merged_wave_info
= input_sgpr_param
[3];
7325 /* Preloaded VGPRs (outputs must be floats) */
7326 for (i
= 0; i
< num_input_vgprs
; i
++) {
7327 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &input_vgpr_param
[i
]);
7328 returns
[num_returns
++] = ctx
->f32
;
7331 /* Vertex load indices. */
7332 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7333 returns
[num_returns
++] = ctx
->f32
;
7335 /* Create the function. */
7336 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, 0);
7337 func
= ctx
->main_fn
;
7339 for (i
= 0; i
< num_input_vgprs
; i
++) {
7340 input_vgprs
[i
] = ac_get_arg(&ctx
->ac
, input_vgpr_param
[i
]);
7343 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7344 if (!key
->vs_prolog
.is_monolithic
)
7345 si_init_exec_from_input(ctx
, merged_wave_info
, 0);
7347 if (key
->vs_prolog
.as_ls
&&
7348 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7349 /* If there are no HS threads, SPI loads the LS VGPRs
7350 * starting at VGPR 0. Shift them back to where they
7353 LLVMValueRef has_hs_threads
=
7354 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7355 si_unpack_param(ctx
, input_sgpr_param
[3], 8, 8),
7358 for (i
= 4; i
> 0; --i
) {
7359 input_vgprs
[i
+ 1] =
7360 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7362 input_vgprs
[i
- 1], "");
7367 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7368 unsigned instance_id_vgpr
=
7369 ctx
->screen
->info
.chip_class
>= GFX10
?
7371 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7373 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7374 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7376 /* InstanceID = VertexID >> 16;
7377 * VertexID = VertexID & 0xffff;
7379 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7380 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7381 LLVMConstInt(ctx
->i32
, 16, 0), "");
7382 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7383 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7386 /* Copy inputs to outputs. This should be no-op, as the registers match,
7387 * but it will prevent the compiler from overwriting them unintentionally.
7389 ret
= ctx
->return_value
;
7390 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7391 LLVMValueRef p
= LLVMGetParam(func
, i
);
7392 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7394 for (i
= 0; i
< num_input_vgprs
; i
++) {
7395 LLVMValueRef p
= input_vgprs
[i
];
7397 if (i
== vertex_id_vgpr
)
7398 p
= ctx
->abi
.vertex_id
;
7399 else if (i
== instance_id_vgpr
)
7400 p
= ctx
->abi
.instance_id
;
7402 p
= ac_to_float(&ctx
->ac
, p
);
7403 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7404 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7407 LLVMValueRef original_ret
= ret
;
7408 bool wrapped
= false;
7409 LLVMBasicBlockRef if_entry_block
= NULL
;
7411 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7412 LLVMValueRef num_threads
;
7415 num_threads
= si_unpack_param(ctx
, merged_wave_info
, 0, 8);
7416 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7417 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7418 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7419 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7423 /* Compute vertex load indices from instance divisors. */
7424 LLVMValueRef instance_divisor_constbuf
= NULL
;
7426 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7427 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7428 LLVMValueRef buf_index
=
7429 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7430 instance_divisor_constbuf
=
7431 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7434 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7435 bool divisor_is_one
=
7436 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7437 bool divisor_is_fetched
=
7438 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7439 LLVMValueRef index
= NULL
;
7441 if (divisor_is_one
) {
7442 index
= ctx
->abi
.instance_id
;
7443 } else if (divisor_is_fetched
) {
7444 LLVMValueRef udiv_factors
[4];
7446 for (unsigned j
= 0; j
< 4; j
++) {
7448 buffer_load_const(ctx
, instance_divisor_constbuf
,
7449 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7450 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7452 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7453 * Such InstanceID might not be achievable in a reasonable time though.
7455 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7456 udiv_factors
[0], udiv_factors
[1],
7457 udiv_factors
[2], udiv_factors
[3]);
7460 if (divisor_is_one
|| divisor_is_fetched
) {
7461 /* Add StartInstance. */
7462 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7463 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7464 SI_SGPR_START_INSTANCE
), "");
7466 /* VertexID + BaseVertex */
7467 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7469 LLVMGetParam(func
, user_sgpr_base
+
7470 SI_SGPR_BASE_VERTEX
), "");
7473 index
= ac_to_float(&ctx
->ac
, index
);
7474 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7475 ctx
->args
.arg_count
+ i
, "");
7479 LLVMBasicBlockRef bbs
[2] = {
7480 LLVMGetInsertBlock(ctx
->ac
.builder
),
7483 ac_build_endif(&ctx
->ac
, 11501);
7485 LLVMValueRef values
[2] = {
7489 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7492 si_llvm_build_ret(ctx
, ret
);
7495 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7496 struct ac_llvm_compiler
*compiler
,
7497 struct si_shader
*shader
,
7498 struct pipe_debug_callback
*debug
,
7499 struct si_shader
*main_part
,
7500 const struct si_vs_prolog_bits
*key
)
7502 struct si_shader_selector
*vs
= main_part
->selector
;
7504 if (!si_vs_needs_prolog(vs
, key
))
7507 /* Get the prolog. */
7508 union si_shader_part_key prolog_key
;
7509 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7510 key
, shader
, &prolog_key
);
7513 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7514 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7515 debug
, si_build_vs_prolog_function
,
7516 "Vertex Shader Prolog");
7517 return shader
->prolog
!= NULL
;
7521 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7523 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7524 struct ac_llvm_compiler
*compiler
,
7525 struct si_shader
*shader
,
7526 struct pipe_debug_callback
*debug
)
7528 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7529 &shader
->key
.part
.vs
.prolog
);
7533 * Compile the TCS epilog function. This writes tesselation factors to memory
7534 * based on the output primitive type of the tesselator (determined by TES).
7536 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7537 union si_shader_part_key
*key
)
7539 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7541 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7543 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7544 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7545 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7546 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7547 &ctx
->tcs_offchip_offset
);
7548 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* wave info */
7549 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7550 &ctx
->tcs_factor_offset
);
7551 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7552 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7553 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7554 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7555 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7556 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7557 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7558 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7559 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7560 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7561 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7562 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7563 &ctx
->tcs_offchip_layout
);
7564 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7565 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7566 &ctx
->tcs_out_lds_layout
);
7568 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7569 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7570 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7571 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7572 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7573 &ctx
->tcs_offchip_layout
);
7574 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7575 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7576 &ctx
->tcs_out_lds_layout
);
7577 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7578 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7579 &ctx
->tcs_offchip_offset
);
7580 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7581 &ctx
->tcs_factor_offset
);
7584 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7585 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7586 struct ac_arg rel_patch_id
; /* patch index within the wave (REL_PATCH_ID) */
7587 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &rel_patch_id
);
7588 struct ac_arg invocation_id
; /* invocation ID within the patch */
7589 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &invocation_id
);
7590 struct ac_arg tcs_out_current_patch_data_offset
; /* LDS offset where tess factors should be loaded from */
7591 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
7592 &tcs_out_current_patch_data_offset
);
7594 struct ac_arg tess_factors
[6];
7595 for (unsigned i
= 0; i
< 6; i
++)
7596 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &tess_factors
[i
]);
7598 /* Create the function. */
7599 si_create_function(ctx
, "tcs_epilog", NULL
, 0,
7600 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7601 ac_declare_lds_as_pointer(&ctx
->ac
);
7603 LLVMValueRef invoc0_tess_factors
[6];
7604 for (unsigned i
= 0; i
< 6; i
++)
7605 invoc0_tess_factors
[i
] = ac_get_arg(&ctx
->ac
, tess_factors
[i
]);
7607 si_write_tess_factors(bld_base
,
7608 ac_get_arg(&ctx
->ac
, rel_patch_id
),
7609 ac_get_arg(&ctx
->ac
, invocation_id
),
7610 ac_get_arg(&ctx
->ac
, tcs_out_current_patch_data_offset
),
7611 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7613 LLVMBuildRetVoid(ctx
->ac
.builder
);
7617 * Select and compile (or reuse) TCS parts (epilog).
7619 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7620 struct ac_llvm_compiler
*compiler
,
7621 struct si_shader
*shader
,
7622 struct pipe_debug_callback
*debug
)
7624 if (sscreen
->info
.chip_class
>= GFX9
) {
7625 struct si_shader
*ls_main_part
=
7626 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7628 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7629 &shader
->key
.part
.tcs
.ls_prolog
))
7632 shader
->previous_stage
= ls_main_part
;
7635 /* Get the epilog. */
7636 union si_shader_part_key epilog_key
;
7637 memset(&epilog_key
, 0, sizeof(epilog_key
));
7638 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7640 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7641 PIPE_SHADER_TESS_CTRL
, false,
7642 &epilog_key
, compiler
, debug
,
7643 si_build_tcs_epilog_function
,
7644 "Tessellation Control Shader Epilog");
7645 return shader
->epilog
!= NULL
;
7649 * Select and compile (or reuse) GS parts (prolog).
7651 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7652 struct ac_llvm_compiler
*compiler
,
7653 struct si_shader
*shader
,
7654 struct pipe_debug_callback
*debug
)
7656 if (sscreen
->info
.chip_class
>= GFX9
) {
7657 struct si_shader
*es_main_part
;
7658 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7660 if (shader
->key
.as_ngg
)
7661 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7663 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7665 if (es_type
== PIPE_SHADER_VERTEX
&&
7666 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7667 &shader
->key
.part
.gs
.vs_prolog
))
7670 shader
->previous_stage
= es_main_part
;
7673 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7676 union si_shader_part_key prolog_key
;
7677 memset(&prolog_key
, 0, sizeof(prolog_key
));
7678 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7679 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7681 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7682 PIPE_SHADER_GEOMETRY
, true,
7683 &prolog_key
, compiler
, debug
,
7684 si_build_gs_prolog_function
,
7685 "Geometry Shader Prolog");
7686 return shader
->prolog2
!= NULL
;
7690 * Build the pixel shader prolog function. This handles:
7691 * - two-side color selection and interpolation
7692 * - overriding interpolation parameters for the API PS
7693 * - polygon stippling
7695 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7696 * overriden by other states. (e.g. per-sample interpolation)
7697 * Interpolated colors are stored after the preloaded VGPRs.
7699 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7700 union si_shader_part_key
*key
)
7702 LLVMValueRef ret
, func
;
7703 int num_returns
, i
, num_color_channels
;
7705 assert(si_need_ps_prolog(key
));
7707 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7709 /* Declare inputs. */
7710 LLVMTypeRef return_types
[AC_MAX_ARGS
];
7712 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7713 assert(key
->ps_prolog
.num_input_sgprs
+
7714 key
->ps_prolog
.num_input_vgprs
+
7715 num_color_channels
<= AC_MAX_ARGS
);
7716 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++) {
7717 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7718 return_types
[num_returns
++] = ctx
->i32
;
7722 struct ac_arg pos_fixed_pt
;
7723 struct ac_arg ancillary
;
7724 struct ac_arg param_sample_mask
;
7725 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++) {
7726 struct ac_arg
*arg
= NULL
;
7727 if (i
== key
->ps_prolog
.ancillary_vgpr_index
) {
7729 } else if (i
== key
->ps_prolog
.ancillary_vgpr_index
+ 1) {
7730 arg
= ¶m_sample_mask
;
7731 } else if (i
== key
->ps_prolog
.num_input_vgprs
- 1) {
7732 /* POS_FIXED_PT is always last. */
7733 arg
= &pos_fixed_pt
;
7735 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, arg
);
7736 return_types
[num_returns
++] = ctx
->f32
;
7739 /* Declare outputs (same as inputs + add colors if needed) */
7740 for (i
= 0; i
< num_color_channels
; i
++)
7741 return_types
[num_returns
++] = ctx
->f32
;
7743 /* Create the function. */
7744 si_create_function(ctx
, "ps_prolog", return_types
, num_returns
, 0);
7745 func
= ctx
->main_fn
;
7747 /* Copy inputs to outputs. This should be no-op, as the registers match,
7748 * but it will prevent the compiler from overwriting them unintentionally.
7750 ret
= ctx
->return_value
;
7751 for (i
= 0; i
< ctx
->args
.arg_count
; i
++) {
7752 LLVMValueRef p
= LLVMGetParam(func
, i
);
7753 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7756 /* Polygon stippling. */
7757 if (key
->ps_prolog
.states
.poly_stipple
) {
7758 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7760 si_llvm_emit_polygon_stipple(ctx
, list
, pos_fixed_pt
);
7763 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7764 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7765 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7766 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7768 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7769 * The hw doesn't compute CENTROID if the whole wave only
7770 * contains fully-covered quads.
7772 * PRIM_MASK is after user SGPRs.
7774 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7775 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7776 LLVMConstInt(ctx
->i32
, 31, 0), "");
7777 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7780 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7781 /* Read PERSP_CENTER. */
7782 for (i
= 0; i
< 2; i
++)
7783 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7784 /* Read PERSP_CENTROID. */
7785 for (i
= 0; i
< 2; i
++)
7786 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7787 /* Select PERSP_CENTROID. */
7788 for (i
= 0; i
< 2; i
++) {
7789 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7790 center
[i
], centroid
[i
], "");
7791 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7792 tmp
, base
+ 4 + i
, "");
7795 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7796 /* Read LINEAR_CENTER. */
7797 for (i
= 0; i
< 2; i
++)
7798 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7799 /* Read LINEAR_CENTROID. */
7800 for (i
= 0; i
< 2; i
++)
7801 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7802 /* Select LINEAR_CENTROID. */
7803 for (i
= 0; i
< 2; i
++) {
7804 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7805 center
[i
], centroid
[i
], "");
7806 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7807 tmp
, base
+ 10 + i
, "");
7812 /* Force per-sample interpolation. */
7813 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7814 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7815 LLVMValueRef persp_sample
[2];
7817 /* Read PERSP_SAMPLE. */
7818 for (i
= 0; i
< 2; i
++)
7819 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7820 /* Overwrite PERSP_CENTER. */
7821 for (i
= 0; i
< 2; i
++)
7822 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7823 persp_sample
[i
], base
+ 2 + i
, "");
7824 /* Overwrite PERSP_CENTROID. */
7825 for (i
= 0; i
< 2; i
++)
7826 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7827 persp_sample
[i
], base
+ 4 + i
, "");
7829 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7830 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7831 LLVMValueRef linear_sample
[2];
7833 /* Read LINEAR_SAMPLE. */
7834 for (i
= 0; i
< 2; i
++)
7835 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7836 /* Overwrite LINEAR_CENTER. */
7837 for (i
= 0; i
< 2; i
++)
7838 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7839 linear_sample
[i
], base
+ 8 + i
, "");
7840 /* Overwrite LINEAR_CENTROID. */
7841 for (i
= 0; i
< 2; i
++)
7842 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7843 linear_sample
[i
], base
+ 10 + i
, "");
7846 /* Force center interpolation. */
7847 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7848 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7849 LLVMValueRef persp_center
[2];
7851 /* Read PERSP_CENTER. */
7852 for (i
= 0; i
< 2; i
++)
7853 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7854 /* Overwrite PERSP_SAMPLE. */
7855 for (i
= 0; i
< 2; i
++)
7856 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7857 persp_center
[i
], base
+ i
, "");
7858 /* Overwrite PERSP_CENTROID. */
7859 for (i
= 0; i
< 2; i
++)
7860 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7861 persp_center
[i
], base
+ 4 + i
, "");
7863 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7864 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7865 LLVMValueRef linear_center
[2];
7867 /* Read LINEAR_CENTER. */
7868 for (i
= 0; i
< 2; i
++)
7869 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7870 /* Overwrite LINEAR_SAMPLE. */
7871 for (i
= 0; i
< 2; i
++)
7872 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7873 linear_center
[i
], base
+ 6 + i
, "");
7874 /* Overwrite LINEAR_CENTROID. */
7875 for (i
= 0; i
< 2; i
++)
7876 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7877 linear_center
[i
], base
+ 10 + i
, "");
7880 /* Interpolate colors. */
7881 unsigned color_out_idx
= 0;
7882 for (i
= 0; i
< 2; i
++) {
7883 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7884 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7885 key
->ps_prolog
.face_vgpr_index
;
7886 LLVMValueRef interp
[2], color
[4];
7887 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7892 /* If the interpolation qualifier is not CONSTANT (-1). */
7893 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7894 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7895 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7897 /* Get the (i,j) updated by bc_optimize handling. */
7898 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7900 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7901 interp_vgpr
+ 1, "");
7902 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7905 /* Use the absolute location of the input. */
7906 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7908 if (key
->ps_prolog
.states
.color_two_side
) {
7909 face
= LLVMGetParam(func
, face_vgpr
);
7910 face
= ac_to_integer(&ctx
->ac
, face
);
7913 interp_fs_input(ctx
,
7914 key
->ps_prolog
.color_attr_index
[i
],
7915 TGSI_SEMANTIC_COLOR
, i
,
7916 key
->ps_prolog
.num_interp_inputs
,
7917 key
->ps_prolog
.colors_read
, interp_ij
,
7918 prim_mask
, face
, color
);
7921 unsigned chan
= u_bit_scan(&writemask
);
7922 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7923 ctx
->args
.arg_count
+ color_out_idx
++, "");
7927 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7930 * "When per-sample shading is active due to the use of a fragment
7931 * input qualified by sample or due to the use of the gl_SampleID
7932 * or gl_SamplePosition variables, only the bit for the current
7933 * sample is set in gl_SampleMaskIn. When state specifies multiple
7934 * fragment shader invocations for a given fragment, the sample
7935 * mask for any single fragment shader invocation may specify a
7936 * subset of the covered samples for the fragment. In this case,
7937 * the bit corresponding to each covered sample will be set in
7938 * exactly one fragment shader invocation."
7940 * The samplemask loaded by hardware is always the coverage of the
7941 * entire pixel/fragment, so mask bits out based on the sample ID.
7943 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7944 /* The bit pattern matches that used by fixed function fragment
7946 static const uint16_t ps_iter_masks
[] = {
7947 0xffff, /* not used */
7953 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7955 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7956 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary
, 8, 4);
7957 LLVMValueRef samplemask
= ac_get_arg(&ctx
->ac
, param_sample_mask
);
7959 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7960 samplemask
= LLVMBuildAnd(
7963 LLVMBuildShl(ctx
->ac
.builder
,
7964 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7967 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7969 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7970 param_sample_mask
.arg_index
, "");
7973 /* Tell LLVM to insert WQM instruction sequence when needed. */
7974 if (key
->ps_prolog
.wqm
) {
7975 LLVMAddTargetDependentFunctionAttr(func
,
7976 "amdgpu-ps-wqm-outputs", "");
7979 si_llvm_build_ret(ctx
, ret
);
7983 * Build the pixel shader epilog function. This handles everything that must be
7984 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7986 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7987 union si_shader_part_key
*key
)
7989 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7990 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7992 struct si_ps_exports exp
= {};
7994 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7996 /* Declare input SGPRs. */
7997 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->rw_buffers
);
7998 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7999 &ctx
->bindless_samplers_and_images
);
8000 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8001 &ctx
->const_and_shader_buffers
);
8002 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8003 &ctx
->samplers_and_images
);
8004 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
,
8005 NULL
, SI_PARAM_ALPHA_REF
);
8007 /* Declare input VGPRs. */
8008 unsigned required_num_params
=
8009 ctx
->args
.num_sgprs_used
+
8010 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8011 key
->ps_epilog
.writes_z
+
8012 key
->ps_epilog
.writes_stencil
+
8013 key
->ps_epilog
.writes_samplemask
;
8015 required_num_params
= MAX2(required_num_params
,
8016 ctx
->args
.num_sgprs_used
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8018 while (ctx
->args
.arg_count
< required_num_params
)
8019 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
8021 /* Create the function. */
8022 si_create_function(ctx
, "ps_epilog", NULL
, 0, 0);
8023 /* Disable elimination of unused inputs. */
8024 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8025 "InitialPSInputAddr", 0xffffff);
8027 /* Process colors. */
8028 unsigned vgpr
= ctx
->args
.num_sgprs_used
;
8029 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8030 int last_color_export
= -1;
8032 /* Find the last color export. */
8033 if (!key
->ps_epilog
.writes_z
&&
8034 !key
->ps_epilog
.writes_stencil
&&
8035 !key
->ps_epilog
.writes_samplemask
) {
8036 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8038 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8039 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8040 /* Just set this if any of the colorbuffers are enabled. */
8042 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8043 last_color_export
= 0;
8045 for (i
= 0; i
< 8; i
++)
8046 if (colors_written
& (1 << i
) &&
8047 (spi_format
>> (i
* 4)) & 0xf)
8048 last_color_export
= i
;
8052 while (colors_written
) {
8053 LLVMValueRef color
[4];
8054 int mrt
= u_bit_scan(&colors_written
);
8056 for (i
= 0; i
< 4; i
++)
8057 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8059 si_export_mrt_color(bld_base
, color
, mrt
,
8060 ctx
->args
.arg_count
- 1,
8061 mrt
== last_color_export
, &exp
);
8064 /* Process depth, stencil, samplemask. */
8065 if (key
->ps_epilog
.writes_z
)
8066 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8067 if (key
->ps_epilog
.writes_stencil
)
8068 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8069 if (key
->ps_epilog
.writes_samplemask
)
8070 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8072 if (depth
|| stencil
|| samplemask
)
8073 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8074 else if (last_color_export
== -1)
8075 ac_build_export_null(&ctx
->ac
);
8078 si_emit_ps_exports(ctx
, &exp
);
8081 LLVMBuildRetVoid(ctx
->ac
.builder
);
8085 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8087 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8088 struct ac_llvm_compiler
*compiler
,
8089 struct si_shader
*shader
,
8090 struct pipe_debug_callback
*debug
)
8092 union si_shader_part_key prolog_key
;
8093 union si_shader_part_key epilog_key
;
8095 /* Get the prolog. */
8096 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8098 /* The prolog is a no-op if these aren't set. */
8099 if (si_need_ps_prolog(&prolog_key
)) {
8101 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8102 PIPE_SHADER_FRAGMENT
, true,
8103 &prolog_key
, compiler
, debug
,
8104 si_build_ps_prolog_function
,
8105 "Fragment Shader Prolog");
8106 if (!shader
->prolog
)
8110 /* Get the epilog. */
8111 si_get_ps_epilog_key(shader
, &epilog_key
);
8114 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8115 PIPE_SHADER_FRAGMENT
, false,
8116 &epilog_key
, compiler
, debug
,
8117 si_build_ps_epilog_function
,
8118 "Fragment Shader Epilog");
8119 if (!shader
->epilog
)
8122 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8123 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8124 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8125 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8128 /* Set up the enable bits for per-sample shading if needed. */
8129 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8130 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8131 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8132 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8133 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8134 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8136 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8137 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8138 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8139 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8140 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8141 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8143 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8144 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8145 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8146 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8147 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8148 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8150 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8151 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8152 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8153 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8154 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8155 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8158 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8159 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8160 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8161 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8162 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8165 /* At least one pair of interpolation weights must be enabled. */
8166 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8167 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8168 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8171 /* Samplemask fixup requires the sample ID. */
8172 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8173 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8174 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8177 /* The sample mask input is always enabled, because the API shader always
8178 * passes it through to the epilog. Disable it here if it's unused.
8180 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8181 !shader
->selector
->info
.reads_samplemask
)
8182 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8187 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8190 /* If tessellation is all offchip and on-chip GS isn't used, this
8191 * workaround is not needed.
8195 /* SPI barrier management bug:
8196 * Make sure we have at least 4k of LDS in use to avoid the bug.
8197 * It applies to workgroup sizes of more than one wavefront.
8199 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8200 sscreen
->info
.family
== CHIP_KABINI
)
8201 *lds_size
= MAX2(*lds_size
, 8);
8204 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8205 struct si_shader
*shader
)
8207 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8209 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8211 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8212 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8213 si_multiwave_lds_size_workaround(sscreen
,
8214 &shader
->config
.lds_size
);
8218 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8219 struct si_shader
*shader
,
8220 struct pipe_debug_callback
*debug
)
8222 struct si_shader_selector
*sel
= shader
->selector
;
8223 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8226 /* LS, ES, VS are compiled on demand if the main part hasn't been
8227 * compiled for that stage.
8229 * GS are compiled on demand if the main part hasn't been compiled
8230 * for the chosen NGG-ness.
8232 * Vertex shaders are compiled on demand when a vertex fetch
8233 * workaround must be applied.
8235 if (shader
->is_monolithic
) {
8236 /* Monolithic shader (compiled as a whole, has many variants,
8237 * may take a long time to compile).
8239 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8243 /* The shader consists of several parts:
8245 * - the middle part is the user shader, it has 1 variant only
8246 * and it was compiled during the creation of the shader
8248 * - the prolog part is inserted at the beginning
8249 * - the epilog part is inserted at the end
8251 * The prolog and epilog have many (but simple) variants.
8253 * Starting with gfx9, geometry and tessellation control
8254 * shaders also contain the prolog and user shader parts of
8255 * the previous shader stage.
8261 /* Copy the compiled TGSI shader data over. */
8262 shader
->is_binary_shared
= true;
8263 shader
->binary
= mainp
->binary
;
8264 shader
->config
= mainp
->config
;
8265 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8266 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8267 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8268 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8269 memcpy(shader
->info
.vs_output_param_offset
,
8270 mainp
->info
.vs_output_param_offset
,
8271 sizeof(mainp
->info
.vs_output_param_offset
));
8272 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8273 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8274 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8276 /* Select prologs and/or epilogs. */
8277 switch (sel
->type
) {
8278 case PIPE_SHADER_VERTEX
:
8279 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8282 case PIPE_SHADER_TESS_CTRL
:
8283 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8286 case PIPE_SHADER_TESS_EVAL
:
8288 case PIPE_SHADER_GEOMETRY
:
8289 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8292 case PIPE_SHADER_FRAGMENT
:
8293 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8296 /* Make sure we have at least as many VGPRs as there
8297 * are allocated inputs.
8299 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8300 shader
->info
.num_input_vgprs
);
8305 /* Update SGPR and VGPR counts. */
8306 if (shader
->prolog
) {
8307 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8308 shader
->prolog
->config
.num_sgprs
);
8309 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8310 shader
->prolog
->config
.num_vgprs
);
8312 if (shader
->previous_stage
) {
8313 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8314 shader
->previous_stage
->config
.num_sgprs
);
8315 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8316 shader
->previous_stage
->config
.num_vgprs
);
8317 shader
->config
.spilled_sgprs
=
8318 MAX2(shader
->config
.spilled_sgprs
,
8319 shader
->previous_stage
->config
.spilled_sgprs
);
8320 shader
->config
.spilled_vgprs
=
8321 MAX2(shader
->config
.spilled_vgprs
,
8322 shader
->previous_stage
->config
.spilled_vgprs
);
8323 shader
->info
.private_mem_vgprs
=
8324 MAX2(shader
->info
.private_mem_vgprs
,
8325 shader
->previous_stage
->info
.private_mem_vgprs
);
8326 shader
->config
.scratch_bytes_per_wave
=
8327 MAX2(shader
->config
.scratch_bytes_per_wave
,
8328 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8329 shader
->info
.uses_instanceid
|=
8330 shader
->previous_stage
->info
.uses_instanceid
;
8332 if (shader
->prolog2
) {
8333 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8334 shader
->prolog2
->config
.num_sgprs
);
8335 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8336 shader
->prolog2
->config
.num_vgprs
);
8338 if (shader
->epilog
) {
8339 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8340 shader
->epilog
->config
.num_sgprs
);
8341 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8342 shader
->epilog
->config
.num_vgprs
);
8344 si_calculate_max_simd_waves(shader
);
8347 if (shader
->key
.as_ngg
) {
8348 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8349 gfx10_ngg_calculate_subgroup_info(shader
);
8350 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8351 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8354 si_fix_resource_usage(sscreen
, shader
);
8355 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8358 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8359 fprintf(stderr
, "LLVM failed to upload shader\n");
8366 void si_shader_destroy(struct si_shader
*shader
)
8368 if (shader
->scratch_bo
)
8369 si_resource_reference(&shader
->scratch_bo
, NULL
);
8371 si_resource_reference(&shader
->bo
, NULL
);
8373 if (!shader
->is_binary_shared
)
8374 si_shader_binary_clean(&shader
->binary
);
8376 free(shader
->shader_log
);